From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.groups.io with SMTP id smtpd.web08.10210.1620723555620879711 for ; Tue, 11 May 2021 01:59:15 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=c2I0zmga; spf=pass (domain: redhat.com, ip: 216.205.24.124, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620723554; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7qBv4N7zIcmluSJeJ7YqfSWhKtCvHyTKDQN+JtbprbU=; b=c2I0zmgawMJAsJ50V/B/Ph7frsX/eA9rd+WkAgyM5kHRgaKFLT0QWbMEeBYejLA+ncyGy+ bAngwJ+J58k6uu4+84ebXFVKrY0mktnTF8rZi64vw3c9d5QqVuGifEJSgSaQ4F4HXP27yd QtlGKY6TkPJROytTHRuLNAouKJJO5a4= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-425-JsdUKEeqMZS6BZmawVK1Hg-1; Tue, 11 May 2021 04:59:11 -0400 X-MC-Unique: JsdUKEeqMZS6BZmawVK1Hg-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5595961244; Tue, 11 May 2021 08:59:08 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-112-233.ams2.redhat.com [10.36.112.233]) by smtp.corp.redhat.com (Postfix) with ESMTP id 48E955D6D1; Tue, 11 May 2021 08:59:04 +0000 (UTC) Subject: Re: [edk2-devel] [PATCH 05/13] MdePkg/Register/Amd: define GHCB macro for the Page State Change To: devel@edk2.groups.io, brijesh.singh@amd.com Cc: James Bottomley , Min Xu , Jiewen Yao , Tom Lendacky , Jordan Justen , Ard Biesheuvel , Erdem Aktas , Michael D Kinney , Liming Gao , Zhiguang Liu References: <20210507203838.23706-1-brijesh.singh@amd.com> <20210507203838.23706-6-brijesh.singh@amd.com> From: "Laszlo Ersek" Message-ID: Date: Tue, 11 May 2021 10:59:03 +0200 MIME-Version: 1.0 In-Reply-To: <20210507203838.23706-6-brijesh.singh@amd.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=lersek@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 05/07/21 22:38, Brijesh Singh wrote: > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 > > The Page State Change NAE exit will be used by the SEV-SNP guest to > request a page state change using the GHCB protocol. See the GHCB > spec section 4.1.6 and 2.3.1 for more detail on the structure > definitions. > > Cc: James Bottomley > Cc: Min Xu > Cc: Jiewen Yao > Cc: Tom Lendacky > Cc: Jordan Justen > Cc: Ard Biesheuvel > Cc: Laszlo Ersek > Cc: Erdem Aktas > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Signed-off-by: Brijesh Singh > --- > MdePkg/Include/Register/Amd/Fam17Msr.h | 15 ++++++++++++ > MdePkg/Include/Register/Amd/Ghcb.h | 33 ++++++++++++++++++++++++++ > 2 files changed, 48 insertions(+) > > diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h > index 542e4cdf4782..62014854d9b7 100644 > --- a/MdePkg/Include/Register/Amd/Fam17Msr.h > +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h > @@ -58,6 +58,19 @@ typedef union { > UINT64 GuestFrameNumber:52; > } GhcbGpaRegister; > > + struct { > + UINT64 Function:12; > + UINT64 GuestFrameNumber:40; > + UINT64 Operation:4; > + UINT64 Reserved:8; > + } SnpPageStateChangeRequest; > + > + struct { > + UINT32 Function:12; > + UINT32 Reserved:20; > + UINT32 ErrorCode; > + } SnpPageStateChangeResponse; > + > VOID *Ghcb; > > UINT64 GhcbPhysicalAddress; > @@ -69,6 +82,8 @@ typedef union { > #define GHCB_INFO_CPUID_RESPONSE 5 > #define GHCB_INFO_GHCB_GPA_REGISTER_REQUEST 18 > #define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE 19 > +#define GHCB_INFO_SNP_PAGE_STATE_CHANGE_REQUEST 20 > +#define GHCB_INFO_SNP_PAGE_STATE_CHANGE_RESPONSE 21 > #define GHCB_HYPERVISOR_FEATURES_REQUEST 128 > #define GHCB_HYPERVISOR_FEATURES_RESPONSE 129 > #define GHCB_INFO_TERMINATE_REQUEST 256 > diff --git a/MdePkg/Include/Register/Amd/Ghcb.h b/MdePkg/Include/Register/Amd/Ghcb.h > index 326b11479779..a15b4b7e2760 100644 > --- a/MdePkg/Include/Register/Amd/Ghcb.h > +++ b/MdePkg/Include/Register/Amd/Ghcb.h > @@ -54,6 +54,7 @@ > #define SVM_EXIT_NMI_COMPLETE 0x80000003ULL > #define SVM_EXIT_AP_RESET_HOLD 0x80000004ULL > #define SVM_EXIT_AP_JUMP_TABLE 0x80000005ULL > +#define SVM_EXIT_SNP_PAGE_STATE_CHANGE 0x80000010ULL > #define SVM_EXIT_HYPERVISOR_FEATURES 0x8000FFFDULL > #define SVM_EXIT_UNSUPPORTED 0x8000FFFFULL > > @@ -162,4 +163,36 @@ typedef union { > #define GHCB_HV_FEATURES_SNP_AP_CREATE (GHCB_HV_FEATURES_SNP | BIT1) > #define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION (GHCB_HV_FEATURES_SNP_AP_CREATE | BIT2) > #define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION_TIMER (GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION | BIT3) > + > +// > +// SNP Page State Change. > +// > +// Note that the PSMASH and UNSMASH operations are not supported when using the MSR protocol. > +// > +#define SNP_PAGE_STATE_PRIVATE 1 > +#define SNP_PAGE_STATE_SHARED 2 > +#define SNP_PAGE_STATE_PSMASH 3 > +#define SNP_PAGE_STATE_UNSMASH 4 > + > +typedef struct { > + UINT64 CurrentPage:12; > + UINT64 GuestFrameNumber:40; > + UINT64 Operation:4; > + UINT64 PageSize:1; > + UINT64 Reserved: 7; (1) You didn't remove the stray space: my point (6) in . I'll fix it up. Reviewed-by: Laszlo Ersek Thanks, Laszlo > +} SNP_PAGE_STATE_ENTRY; > + > +typedef struct { > + UINT16 CurrentEntry; > + UINT16 EndEntry; > + UINT32 Reserved; > +} SNP_PAGE_STATE_HEADER; > + > +#define SNP_PAGE_STATE_MAX_ENTRY 253 > + > +typedef struct { > + SNP_PAGE_STATE_HEADER Header; > + SNP_PAGE_STATE_ENTRY Entry[SNP_PAGE_STATE_MAX_ENTRY]; > +} SNP_PAGE_STATE_CHANGE_INFO; > + > #endif >