From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.26037.1685606903039035318 for ; Thu, 01 Jun 2023 01:08:23 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8Dxd_HyUXhkJzgDAA--.7249S3; Thu, 01 Jun 2023 16:08:18 +0800 (CST) Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxD7_uUXhkTt+DAA--.16991S3; Thu, 01 Jun 2023 16:08:15 +0800 (CST) Message-ID: Date: Thu, 1 Jun 2023 16:08:14 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [edk2-devel] [edk2-platforms][PATCH V2 1/1] Platform/Loongson: Set Dxe common page size to 16k To: devel@edk2.groups.io, lixianglai@loongson.cn Cc: Ard Biesheuvel , Bibo Mao , Leif Lindholm , Liming Gao , Michael D Kinney References: <175E4526EDF648E7.27409@groups.io> <32fc0480-020f-f5f4-f626-2ba6a1713e6f@loongson.cn> From: "Chao Li" In-Reply-To: <32fc0480-020f-f5f4-f626-2ba6a1713e6f@loongson.cn> X-CM-TRANSID: AQAAf8DxD7_uUXhkTt+DAA--.16991S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAJCGR3OQAU5wAAsZ X-Coremail-Antispam: 1Uk129KBjvJXoWxXF1DZr48WFy3ZrWkKF4rKrg_yoW5ArWUpr 1rCa47Kry8tr1xZw48Aa4Uu3ySq3yYyrZ8JF4DKw4093Z7J3Wvva4YqrsY9345WryFyFyU Zry09w4Uua1Uu3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUUbxxYFVCjjxCrM7AC8VAFwI0_Jr0_ Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_Jrv_JF1l8cAvFV AK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVWUCVW8JwA2 z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr 1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG 8wAqjxCEc2xF0cIa020Ex4CE44I27wAv7VC0I7IYx2IY67AKxVWUGVWUXwAv7VC2z280aV AFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcVAKI48JMx8GjcxK6IxK0xII j40E5I8CrwCYjI0SjxkI62AI1cAE67vIY487MxAIw28IcxkI7VAKI48JMxC20s026xCaFV Cjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_JrI_JrWlx2IqxVCjr7xvwVAFwI0_JrI_JrWl x4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r 1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_ JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCT nIWIevJa73UjIFyTuYvjxUFrWrDUUUU Content-Type: multipart/alternative; boundary="------------SibX0q0AaCvb9nkpWXyWTRNe" --------------SibX0q0AaCvb9nkpWXyWTRNe Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Reviewed-by: Chao Li Thanks, Chao 在 2023/6/1 14:56, xianglai 写道: > There has been no response for a long time, welcome to give me some > suggestions for this patch. > > > On 5/12/23 10:42 AM, xianglai wrote: >> The loongarch qemu tcg code section is 16K aligned by default. >> When UEFI keep 4K alignment, the code section and data section >> of UEFI are loaded into the same page by qemu, and when the data >> is written to the page containing the code section, it will cause >> qemu to refresh TB, resulting in qemu running slowly.Therefore, >> setting Dxe to 16K alignment can ensure that the code section is >> loaded into a page separately, avoid qemu repeatedly refreshing TB, >> and speed up the execution speed of qemu. >> >> The following shows the impact of Dxe 4K alignment and 16K alignment >> on image size: >> >> DXE 4k alignment: >> DXEFV.FV 7.2M >> After compression: >> FVMAIN_COMPACT.Fv 3.4M >> QEMU_EFI.fd 3.7M >> >> DXE 16k alignment: >> DXEFV.FV 9.5M >> After compression: >> FVMAIN_COMPACT.Fv 3.4M >> QEMU_EFI.fd 3.7M >> >> Cc: Ard Biesheuvel >> Cc: Bibo Mao >> Cc: Chao Li >> Cc: Leif Lindholm >> Cc: Liming Gao >> Cc: Michael D Kinney >> Signed-off-by: xianglai li >> --- >>   Platform/Loongson/LoongArchQemuPkg/Loongson.dsc | 7 ++++++- >>   1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc >> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc >> index 6875e39cc6..13b27d84b8 100644 >> --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc >> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc >> @@ -61,8 +61,13 @@ >>   [BuildOptions.LOONGARCH64.EDKII.SEC] >>     *_*_*_CC_FLAGS                 = >>   +# >> +# default page size is 16K for loongarch qemu tcg >> +# code section separated with data section with 16K page alignment, >> else data >> +# write operation in the same page with code section will cause qemu >> TB flush >> +# >> [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION] >> -  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 >> +  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x4000 >>     [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] >>     GCC:*_*_LOONGARCH64_DLINK_FLAGS = -z common-page-size=0x10000 > > > > > > --------------SibX0q0AaCvb9nkpWXyWTRNe Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit

Reviewed-by: Chao Li <lichao@loongson.cn>


Thanks,
Chao
在 2023/6/1 14:56, xianglai 写道:
There has been no response for a long time, welcome to give me some suggestions for this patch.


On 5/12/23 10:42 AM, xianglai wrote:
The loongarch qemu tcg code section is 16K aligned by default.
When UEFI keep 4K alignment, the code section and data section
of UEFI are loaded into the same page by qemu, and when the data
is written to the page containing the code section, it will cause
qemu to refresh TB, resulting in qemu running slowly.Therefore,
setting Dxe to 16K alignment can ensure that the code section is
loaded into a page separately, avoid qemu repeatedly refreshing TB,
and speed up the execution speed of qemu.

The following shows the impact of Dxe 4K alignment and 16K alignment
on image size:

DXE 4k alignment:
DXEFV.FV 7.2M
After compression:
FVMAIN_COMPACT.Fv 3.4M
QEMU_EFI.fd 3.7M

DXE 16k alignment:
DXEFV.FV 9.5M
After compression:
FVMAIN_COMPACT.Fv 3.4M
QEMU_EFI.fd 3.7M

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
---
  Platform/Loongson/LoongArchQemuPkg/Loongson.dsc | 7 ++++++-
  1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index 6875e39cc6..13b27d84b8 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -61,8 +61,13 @@
  [BuildOptions.LOONGARCH64.EDKII.SEC]
    *_*_*_CC_FLAGS                 =
  +#
+# default page size is 16K for loongarch qemu tcg
+# code section separated with data section with 16K page alignment, else data
+# write operation in the same page with code section will cause qemu TB flush
+#
  [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
-  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x4000
    [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
    GCC:*_*_LOONGARCH64_DLINK_FLAGS = -z common-page-size=0x10000






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