From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=65.50.211.136; helo=mail.zytor.com; envelope-from=pcacjr@zytor.com; receiver=edk2-devel@lists.01.org Received: from mail.zytor.com (terminus.zytor.com [65.50.211.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 018E421B00DE1 for ; Thu, 16 Nov 2017 13:55:12 -0800 (PST) Received: from thor.domain.name ([IPv6:2804:7f4:c480:16bd:0:0:0:1]) (authenticated bits=0) by mail.zytor.com (8.15.2/8.15.2) with ESMTPSA id vAGLupRd002460 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Thu, 16 Nov 2017 13:56:53 -0800 From: Paulo Alcantara To: edk2-devel@lists.01.org Cc: Paulo Alcantara , Rick Bramley , Andrew Fish , Eric Dong , Laszlo Ersek , brian.johnson@hpe.com, jiewen.yao@intel.com, Jeff Fan Date: Thu, 16 Nov 2017 19:56:29 -0200 Message-Id: X-Mailer: git-send-email 2.14.3 In-Reply-To: References: Subject: [RFC v3 0/3] Stack trace support in X64 exception handling X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Nov 2017 21:55:13 -0000 Hi, This series adds stack trace support during a X64 CPU exception. Informations like back trace, stack contents and image module names (that were part of the call stack) will be dumped out. We already have such support in ARM/AArch64 (IIRC) exception handling (thanks to Ard), and then I thought we'd also deserve it in X64 and IA-32 platforms. What do you think guys? BTW, I've tested this only with OVMF (X64 only), using: - gcc-6.3.0, GCC5, NOOPT Any other tests would be really appreciable. Thanks! Paulo Repo: https://github.com/pcacjr/edk2.git Branch: stacktrace_v2 Cc: Rick Bramley Cc: Andrew Fish Cc: Eric Dong Cc: Laszlo Ersek Cc: brian.johnson@hpe.com Cc: jiewen.yao@intel.com Cc: Jeff Fan Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Paulo Alcantara --- v1 -> v2: * Add IA32 arch support (GCC toolchain only) * Replace hard-coded stack alignment value (16) with CPU_STACK_ALIGNMENT. * Check for proper stack and frame pointer alignments. * Fix initialization of UnwoundStacksCount to 1. * Move GetPdbFileName() to common code since it will be used by both IA32 and X64 implementations. v2 -> v3: * Fixed wrong assumption about "RIP < ImageBase" to start searching for another PE/COFF image. That is, RIP may point to lower and higher addresses for any other PE/COFF images. Both IA32 & X64. (Thanks Andrew & Jiewen) * Fixed typo: unwond -> unwound. Both IA32 & X64. (Thanks Brian) Brian: I didn't have a chance to investigate on how to validate the RIP and RSP values yet as you've suggested, sorry. But I will any time soon. NOTE: This RFC for stack trace in IA32 & X64 supports *only* GCC at the moment. Paulo Alcantara (3): UefiCpuPkg/CpuExceptionHandlerLib/X64: Add stack trace support UefiCpuPkg/CpuExceptionHandlerLib: Export GetPdbFileName() UefiCpuPkg/CpuExceptionHandlerLib/Ia32: Add stack trace support UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c | 102 ++++--- UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h | 25 +- UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 310 ++++++++++++++++++- UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 317 +++++++++++++++++++- 4 files changed, 696 insertions(+), 58 deletions(-) -- 2.14.3