From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=34.238.86.106; helo=mail.paulo.ac; envelope-from=paulo@paulo.ac; receiver=edk2-devel@lists.01.org Received: from mail.paulo.ac (mail.paulo.ac [34.238.86.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DB27C222DDBEF for ; Sun, 14 Jan 2018 16:19:05 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by mail.paulo.ac (Postfix) with ESMTP id 03F8BC0888F; Mon, 15 Jan 2018 00:24:23 +0000 (UTC) X-Virus-Scanned: amavisd-new at paulo.ac X-Spam-Flag: NO X-Spam-Score: -1.099 X-Spam-Level: X-Spam-Status: No, score=-1.099 tagged_above=-999 required=6.31 tests=[ALL_TRUSTED=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, URIBL_BLOCKED=0.001] autolearn=ham autolearn_force=no Authentication-Results: mail.paulo.ac (amavisd-new); dkim=pass (1024-bit key) header.d=paulo.ac Received: from mail.paulo.ac ([127.0.0.1]) by localhost (mail.paulo.ac [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2heqvN9JM0Zy; Mon, 15 Jan 2018 00:23:50 +0000 (UTC) Received: from thor.domain.name (177.204.15.215.dynamic.adsl.gvt.net.br [177.204.15.215]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.paulo.ac (Postfix) with ESMTPSA id 64636C0888D; Mon, 15 Jan 2018 00:23:47 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.paulo.ac 64636C0888D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=paulo.ac; s=default; t=1515975830; bh=ixPeumP1Eo7obk4FcXE+ERZOmQpM7uD+K63WsYjN1Gk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PGdoTwD6teRc82god/NzvL0/Xerz6fl10j0dfBvojseOD7jlM2Fq7Dx1zBdUepiHD YuCYgIsuKyCrBZWju29ReK06O4wNmE89RpnrnLNl1rC7NPqfHfIFT/Hdc+8y4rMiQE rQThZQNJZBuhGuHSh35NbLvIPGVE8sqvpL+vgn3M= From: Paulo Alcantara To: edk2-devel@lists.01.org Cc: Paulo Alcantara , Rick Bramley , Kimon Berlin , Diego Medaglia , Andrew Fish , Eric Dong , Laszlo Ersek , Brian Johnson , Jeff Fan , Jiewen Yao , Paulo Alcantara Date: Sun, 14 Jan 2018 22:23:28 -0200 Message-Id: X-Mailer: git-send-email 2.14.3 In-Reply-To: References: Subject: [RFC v5 0/8] Stack trace support in X64 exception handling X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Jan 2018 00:19:06 -0000 Hi, This series adds stack trace support during IA32 and X64 CPU exceptions. Informations like back trace, stack contents and image module names (that were part of the call stack) will be dumped out. The current limitation is that it relies on available frame pointers (GCC only) in order to successfully unwind the stack. Jiewen, Thank you very much for your time on this. I've applied the changes you suggested, as well as tested it on IA32 PAE paging mode - it worked as expected. Other than that, I also tested the stack trace in SMM code by manually calling CpuBreakPoint() and then it broke with another exception (page fault). I didn't have much time to look into that, but what I've observed is that the page fault ocurred during the search of PE/COFF image base address (in PeCoffSearchImageBase). The function attempts to search for the image base from "Address" through 0, so any of those dereferenced addresses triggers the page fault. Do you know how we could fix that issue? Perhaps introducing a AddressValidationLib (as Brian suggested previously) and use it within PeCoffSearchImageBase()? I'd also like to thank Brian & Jeff for all the support! Thanks Paulo Repo: https://github.com/pcacjr/edk2.git Branch: stacktrace_v5 Cc: Rick Bramley Cc: Kimon Berlin Cc: Diego Medaglia Cc: Andrew Fish Cc: Eric Dong Cc: Laszlo Ersek Cc: Brian Johnson Cc: Jeff Fan Cc: Jiewen Yao Cc: Paulo Alcantara Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Paulo Alcantara --- v1 -> v2: * Add IA32 arch support (GCC toolchain only) * Replace hard-coded stack alignment value (16) with CPU_STACK_ALIGNMENT. * Check for proper stack and frame pointer alignments. * Fix initialization of UnwoundStacksCount to 1. * Move GetPdbFileName() to common code since it will be used by both IA32 and X64 implementations. v2 -> v3: * Fixed wrong assumption about "RIP < ImageBase" to start searching for another PE/COFF image. That is, RIP may point to lower and higher addresses for any other PE/COFF images. Both IA32 & X64. (Thanks Andrew & Jiewen) * Fixed typo: unwond -> unwound. Both IA32 & X64. (Thanks Brian) v3 -> v4: * Validate all frame/stack pointer addresses before dereferencing them as requested by Brian & Jiewen. * Correctly print out IP addresses during the stack traces (by Jeff) v4 -> v5: * Fixed address calculations and improved code as suggested by Jiewen. * Fixed parameter validation as suggested by Brian. * Tested stack stack with IA32 PAE paging mode. Paulo Alcantara (8): UefiCpuPkg/CpuExceptionHandlerLib/X64: Add stack trace support UefiCpuPkg/CpuExceptionHandlerLib: Export GetPdbFileName() UefiCpuPkg/CpuExceptionHandlerLib/Ia32: Add stack trace support UefiCpuPkg/CpuExceptionHandlerLib: Add helper to validate memory addresses UefiCpuPkg/CpuExceptionHandlerLib: Ensure valid frame/stack pointers UefiCpuPkg/CpuExceptionHandlerLib: Correctly print IP addresses UefiCpuPkg/CpuExceptionHandlerLib: Validate memory address ranges UefiCpuPkg/CpuExceptionHandlerLib: Add early check in DumpStackContents UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c | 537 ++++++++++++++++++-- UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h | 59 ++- UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 483 +++++++++++++++++- UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 426 +++++++++++++++- 4 files changed, 1435 insertions(+), 70 deletions(-) -- 2.14.3