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X-Microsoft-Antispam-Message-Info: +/8BLov8HxBeQD36m6iTrCjlDasxY0UcOju+r5UJwHcptaVUOYwtR56Hl9nnZk2+UPbvhICoM00sR4QyFKbp+GQ0WE4LKQBbjKznawOTwNqRMGhyXK85gbkbFH+uL5WgSYy1n+A08aNEOVC/FpdAvDKADH8BZGF26Ky4XN9FltMSLfapl43mxvOiak94lDUudsdyYrJk8Tq2YotKSaZOigYfQCwUXE9Yv5tJ34KMAT2KdwjpnP/tIw6WO63r7ioFnC+/9o4HF3en/VCdvMyhiKhn0WGv7qnMY4fsu+sN7QK2Pb4Rm5mMbTatrkJrBfvxLnZ7p3JkRJstHO5bIEzBWhnd0t/n4IvB4gRgnTyoOUoKPjTfRsQm36A9pj3KgvBPA6uGGUty7+hdWRcR+nJOCV/i2flt+YyM6IuiH9k9qfFnwSHdLXTuBvpZEoDEyS0kKvaoJSaLcg9lhLWsw+MNPtEW2TXAddpqLa/poo8owbS79g3ds4GJFG3A/AwJnibbL1uCioOR2hcx2lNMG4nJRw== X-MS-Exchange-AntiSpam-MessageData: cM/HQC1ZjmIcgy2042K7i3Lv7Tm35FkIyvZ/i8aCL0A1bVH1SPaZFx9BLNSUxpN6Mrh+spWsHqwgw3iSg6m1tDawELFwFp/852JiEtFOLmL7A5d1+L9r+0E+lI8xexpg/829E+OIITXFWGkTESQ5tw== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 44df7bb1-1353-4caf-c78d-08d7a9c63d5d X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2020 23:01:59.6528 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: EIyVFyjRrRIiPENMQyUTIeTFfhHxFUO/pN3Q6R5K1I7UNtkPIvnS7mVNmNr8VhQAo10HC+RjUmE+Iox9V4SILw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3930 Content-Type: text/plain This patch series provides support for running EDK2/OVMF under SEV-ES. Secure Encrypted Virtualization - Encrypted State (SEV-ES) expands on the SEV support to protect the guest register state from the hypervisor. See "AMD64 Architecture Programmer's Manual Volume 2: System Programming", section "15.35 Encrypted State (SEV-ES)" [1]. In order to allow a hypervisor to perform functions on behalf of a guest, there is architectural support for notifying a guest's operating system when certain types of VMEXITs are about to occur. This allows the guest to selectively share information with the hypervisor to satisfy the requested function. The notification is performed using a new exception, the VMM Communication exception (#VC). The information is shared through the Guest-Hypervisor Communication Block (GHCB) using the VMGEXIT instruction. The GHCB format and the protocol for using it is documented in "SEV-ES Guest-Hypervisor Communication Block Standardization" [2]. The main areas of the EDK2 code that are updated to support SEV-ES are around the exception handling support and the AP boot support. Exception support is required starting in Sec, continuing through Pei and into Dxe in order to handle #VC exceptions that are generated. Each AP requires it's own GHCB page as well as a page to hold values specific to that AP. AP booting poses some interesting challenges. The INIT-SIPI-SIPI sequence is typically used to boot the APs. However, the hypervisor is not allowed to update the guest registers. The GHCB document [2] talks about how SMP booting under SEV-ES is performed. Since the GHCB page must be a shared (unencrypted) page, the processor must be running in long mode in order for the guest and hypervisor to communicate with each other. As a result, SEV-ES is only supported under the X64 architecture. [1] https://www.amd.com/system/files/TechDocs/24593.pdf [2] https://developer.amd.com/wp-content/resources/56421.pdf --- These patches are based on commit: 3feea54eae33 ("CryptoPkg/BaseHashApiLib: Implement Unified Hash Calculation API") Proper execution of SEV-ES relies on Bugzilla 2340 being fixed. A version of the tree (with an extra patch to workaround Bugzilla 2340) can be found at: https://github.com/AMDESE/ovmf/tree/sev-es-v11 Cc: Ard Biesheuvel Cc: Benjamin You Cc: Dandan Bi Cc: Eric Dong Cc: Guo Dong Cc: Hao A Wu Cc: Jian J Wang Cc: Jordan Justen Cc: Laszlo Ersek Cc: Liming Gao Cc: Maurice Ma Cc: Michael D Kinney Cc: Ray Ni Changes since v3: - Remove the need for the MP library finalization routine. The AP jump table address will be held by the hypervisor rather than communicated via the GHCB MSR. This removes some fragility around the UEFI to OS transition. - Rename the SEV-ES RIP reset area to SEV-ES workarea and use it to communicate the SEV-ES status, so that SEC CPU exception handling is only established for an SEV-ES guest. - Fix SMM build breakageAdd around QemuFlashPtrWrite(). - Fix SMM build breakage by adding VC exception support the SMM CPU exception handling. - Add memory fencing around the invocation of AsmVmgExit(). - Clarify comments around the SEV-ES AP reset RIP values and usage. - Move some PCD definitions from MdeModulePkg to UefiCpuPkg. - Remove the 16-bit code selector definition from MdeModulePkg Changes since v2: - Added a way to locate the SEV-ES fixed AP RIP address for starting AP's to avoid updating the actual flash image (build time location that is identified with a GUID value). - Create a VmgExit library to replace static inline functions. - Move some PCDs to the appropriate packages - Add support for writing to QEMU flash under SEV-ES - Add additional MMIO opcode support - Cleaned up the GHCB MSR CPUID protocol support Changes since v1: - Patches reworked to be more specific to the component/area being updated and order of definition/usage - Created a library for VMGEXIT-related functions to replace use of inline functions - Allocation method for GDT changed from AllocatePool to AllocatePages - Early caching only enabled for SEV-ES guests - Ensure AP loop mode set to halt loop mode for SEV-ES guests - Reserved SEC GHCB-related memory areas when S3 is enabled Tom Lendacky (40): MdePkg: Create PCDs to be used in support of SEV-ES MdePkg: Add the MSR definition for the GHCB register MdePkg: Add a structure definition for the GHCB MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables MdePkg/BaseLib: Add support for the XGETBV instruction MdePkg/BaseLib: Add support for the VMGEXIT instruction UefiCpuPkg: Implement library support for VMGEXIT UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events UefiCpuPkg/CpuExceptionHandler: Support string IO for IOIO_PROT NAE events UefiCpuPkg/CpuExceptionHandler: Add support for CPUID NAE events UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT NAE events UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO) UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD NAE events UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC NAE events UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC NAE events UefiCpuPkg/CpuExceptionHandler: Add support for INVD NAE events UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL NAE events UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP NAE events UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX NAE events UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX NAE events UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write NAE events OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function OvmfPkg: Add support to perform SEV-ES initialization OvmfPkg: Create a GHCB page for use during Sec phase OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported OvmfPkg: Create GHCB pages for use during Pei and Dxe phase OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled UefiCpuPkg: Create an SEV-ES workarea PCD OvmfPkg: Reserve a page in memory for the SEV-ES usage OvmfPkg/ResetVector: Add support for a 32-bit SEV check OvmfPkg/Sec: Add #VC exception handling for Sec phase OvmfPkg/Sec: Enable cache early to speed up booting OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Bypass flash detection with SEV-ES is enabled UefiCpuPkg: Add a 16-bit protected mode code segment descriptor UefiCpuPkg/MpInitLib: Add a CPU MP data flag to indicate if SEV-ES is enabled UefiCpuPkg: Allow AP booting under SEV-ES OvmfPkg: Use the SEV-ES work area for the SEV-ES AP reset vector OvmfPkg: Move the GHCB allocations into reserved memory UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use MdeModulePkg/MdeModulePkg.dec | 9 + OvmfPkg/OvmfPkg.dec | 5 + UefiCpuPkg/UefiCpuPkg.dec | 25 + OvmfPkg/OvmfPkgIa32.dsc | 11 + OvmfPkg/OvmfPkgIa32X64.dsc | 11 + OvmfPkg/OvmfPkgX64.dsc | 11 + UefiCpuPkg/UefiCpuPkg.dsc | 5 + UefiPayloadPkg/UefiPayloadPkgIa32.dsc | 2 + UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc | 2 + OvmfPkg/OvmfPkgX64.fdf | 9 + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 2 + MdePkg/Library/BaseLib/BaseLib.inf | 4 + OvmfPkg/PlatformPei/PlatformPei.inf | 7 + .../FvbServicesRuntimeDxe.inf | 2 + OvmfPkg/ResetVector/ResetVector.inf | 8 + OvmfPkg/Sec/SecMain.inf | 2 + .../DxeCpuExceptionHandlerLib.inf | 5 + .../PeiCpuExceptionHandlerLib.inf | 5 + .../SecPeiCpuExceptionHandlerLib.inf | 8 + .../SmmCpuExceptionHandlerLib.inf | 5 + UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 4 + UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 4 + UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf | 33 + .../Core/DxeIplPeim/X64/VirtualMemory.h | 12 +- MdePkg/Include/Library/BaseLib.h | 31 + MdePkg/Include/Register/Amd/Fam17Msr.h | 31 + MdePkg/Include/Register/Amd/Ghcb.h | 136 ++ OvmfPkg/Include/Library/MemEncryptSevLib.h | 12 + .../QemuFlash.h | 6 + UefiCpuPkg/CpuDxe/CpuGdt.h | 4 +- UefiCpuPkg/Include/Library/VmgExitLib.h | 111 ++ .../CpuExceptionHandlerLib/AMDSevVcCommon.h | 26 + .../CpuExceptionCommon.h | 2 + UefiCpuPkg/Library/MpInitLib/MpLib.h | 68 +- .../Core/DxeIplPeim/Ia32/DxeLoadFunc.c | 4 +- .../Core/DxeIplPeim/X64/DxeLoadFunc.c | 11 +- .../Core/DxeIplPeim/X64/VirtualMemory.c | 49 +- MdePkg/Library/BaseLib/Ia32/GccInline.c | 45 + MdePkg/Library/BaseLib/X64/GccInline.c | 47 + .../MemEncryptSevLibInternal.c | 75 +- OvmfPkg/PlatformPei/AmdSev.c | 82 ++ OvmfPkg/PlatformPei/MemDetect.c | 23 + .../QemuFlash.c | 23 +- .../QemuFlashDxe.c | 15 + .../QemuFlashSmm.c | 9 + OvmfPkg/Sec/SecMain.c | 83 +- UefiCpuPkg/CpuDxe/CpuGdt.c | 8 +- .../CpuExceptionCommon.c | 2 +- .../Ia32/AMDSevVcCommon.c | 24 + .../PeiDxeAMDSevVcHandler.c | 29 + .../PeiDxeSmmCpuException.c | 16 + .../SecAMDSevVcHandler.c | 55 + .../SecPeiCpuException.c | 16 + .../X64/AMDSevVcCommon.c | 1237 +++++++++++++++++ UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 114 +- UefiCpuPkg/Library/MpInitLib/MpLib.c | 257 +++- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 19 + UefiCpuPkg/Library/VmgExitLib/VmgExitLib.c | 187 +++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 2 +- MdePkg/Library/BaseLib/Ia32/VmgExit.nasm | 37 + MdePkg/Library/BaseLib/Ia32/XGetBv.nasm | 31 + MdePkg/Library/BaseLib/X64/VmgExit.nasm | 32 + MdePkg/Library/BaseLib/X64/XGetBv.nasm | 34 + OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 100 ++ OvmfPkg/ResetVector/Ia32/PageTables64.asm | 351 ++++- OvmfPkg/ResetVector/ResetVector.nasmb | 20 + .../X64/ExceptionHandlerAsm.nasm | 17 + UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 2 +- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 15 + UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | 4 +- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 370 ++++- UefiCpuPkg/Library/VmgExitLib/VmgExitLib.uni | 15 + .../ResetVector/Vtf0/Ia16/Real16ToFlat32.asm | 9 + 73 files changed, 3988 insertions(+), 99 deletions(-) create mode 100644 UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf create mode 100644 MdePkg/Include/Register/Amd/Ghcb.h create mode 100644 UefiCpuPkg/Include/Library/VmgExitLib.h create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/AMDSevVcCommon.h create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/AMDSevVcCommon.c create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeAMDSevVcHandler.c create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/SecAMDSevVcHandler.c create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c create mode 100644 UefiCpuPkg/Library/VmgExitLib/VmgExitLib.c create mode 100644 MdePkg/Library/BaseLib/Ia32/VmgExit.nasm create mode 100644 MdePkg/Library/BaseLib/Ia32/XGetBv.nasm create mode 100644 MdePkg/Library/BaseLib/X64/VmgExit.nasm create mode 100644 MdePkg/Library/BaseLib/X64/XGetBv.nasm create mode 100644 OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm create mode 100644 UefiCpuPkg/Library/VmgExitLib/VmgExitLib.uni -- 2.17.1