[PATCH v2 0/8] Handling of multiple PCI host bridges specified

["Ojeda Leon, Nicolas" <ncoleon@amazon.com>]

Increased control is provided in Ovmf platforms to define and configure
the specifications of multiple PCI host bridges in the hypervisor. The
host propagates this information to the guest, initially through fw-cfg
interface.

In some AWS EC2 platforms, we expose a PCI topology including several
root bridges portraying information about physical distribution that
enables the guest to optimize accesses. Current PCI driver for Ovmf
enables the explicit definition of multiple root bridges and contains
the logic to fix their resources based on a platform-specific PCD entries.
However, we need a way to control, from the hypervisor, how many and which
resources each PCI host bridge can use. For this reason, this patch series
introduces a mechanism to provide PCI host bridges information like bus
number range, attributes, allocation attributes, PIO aperture as well as
32 and 64- bit prefetchable and non-prefetchable MMIO ranges through a
fw-cfg item created by the hypervisor and consumed by the guest firmware.
In order to offer a generic and extensible way to disclose non-discoverable
hardware information from the host to the guest, a new library called
HardwareInfoLib is created in the OvmfPkg. In essence, this library offers
the functionality to parse a generic BLOB into a list as well as the methods
to iterate over such list, including filtering options. The library is
conceived in a generic way so that further hardware elements can also be
described using it. For such purpose the length of the BLOB is not
restricted but instead regarded as a sequence of header-info elements that
allow the parsing during runtime. Furthermore, specific functionality is
provided wrapping QemuFwCfgReadBytes to extract hardware descriptions, in
the aforementioned format, in a static way so that early in the Pei stage
the library can be used to identify address space requirements. The core of
the library offers enough flexibility to process as many elements, even from
different hardware types (heterogenous), as needed in a single run. This
library is extended for the particular use case already exposed, PCI host
bridges, and this same code offers an example of how to tailor it for
further hardware components.

Furthermore, in this kind of high-performance platforms, we exploit PCIe
features like Access Control Services to configure peer-to-peer channels
between devices. This allows us to create direct communication channels
that do not require packets to reach the Root Complex but instead can
follow a direct path from source to target. To enable Guest Virtual Machines
to profit from this performance improvement, we configure resources (BARs)
of peer-to-peer intended devices with Host Physical Addresses. In this
scenario, devices can be instructed, from the guest VM, to perform DMA
operations targeting a peer address space, and the PCIe fabric can take
care of directly routing them. Therefore, long and busy links towards the
Root Complex are avoided. When we configure resources this way, the guest
must respect the pre-populated BARs so that devices preserve the address
ranges configured in the apertures of physical PCIe ports that enable
routing at the hardware level. Similarly, revealing details about the
underlying PCI hierarchy empowers the guest to perform topology-aware
optimizations and benefit from an enhanced performance.

Nicolas Ojeda Leon (8):
  OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges
  Ovmf/HardwareInfoLib: Parse data directly from fw-cfg
  Ovmf/HardwareInfoLib: Add core to parse heterogenous data
  Ovmf/PlatformPei: Extend 64-bit MMIO range to fit resources
  OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with
    spec
  MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs
  MdeModulePkg/Pci MdePkg: Create service to retrieve PCI base addresses
  MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs

 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h       |   1 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf  |   1 +
 .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c  |   5 +-
 MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c       |  21 +
 .../Bus/Pci/PciBusDxe/PciResourceSupport.c    | 277 +++++++++-
 .../Bus/Pci/PciBusDxe/PciResourceSupport.h    |  20 +
 .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c  |  81 +++
 .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.h  |  29 +
 MdeModulePkg/MdeModulePkg.dec                 |   6 +
 .../PciHostBridgeResourceAllocation.h         |  33 ++
 OvmfPkg/Include/Library/HardwareInfoLib.h     | 128 +++++
 .../Library/QemuFwCfgHardwareInfoLib.h        |  59 ++
 .../Library/HardwareInfoLib/HardwareInfoLib.c | 256 +++++++++
 .../HardwareInfoLib/HardwareInfoLib.inf       |  43 ++
 .../HardwareInfoPciHostBridgeLib.c            | 515 ++++++++++++++++++
 .../HardwareInfoPciHostBridgeLib.h            | 262 +++++++++
 .../HardwareInfoLib/HardwareInfoTypesLib.h    |  64 +++
 .../QemuFwCfgHardwareInfoLib.c                |  89 +++
 .../QemuFwCfgHardwareInfoLib.inf              |  42 ++
 .../PciHostBridgeUtilityLib.c                 | 362 +++++++++---
 .../PciHostBridgeUtilityLib.inf               |   5 +
 OvmfPkg/OvmfPkgX64.dsc                        |   3 +
 OvmfPkg/PlatformPei/MemDetect.c               | 110 ++++
 OvmfPkg/PlatformPei/PlatformPei.inf           |   2 +
 24 files changed, 2332 insertions(+), 82 deletions(-)
 create mode 100644 OvmfPkg/Include/Library/HardwareInfoLib.h
 create mode 100644 OvmfPkg/Include/Library/QemuFwCfgHardwareInfoLib.h
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoLib.c
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoLib.inf
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c
 create mode 100644 OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.inf

-- 
2.17.1




Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879