From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web11.1687.1643912625127981926 for ; Thu, 03 Feb 2022 10:23:46 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ThmQLiTU; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: isaac.w.oram@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643912625; x=1675448625; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=8nvcYZHOb7vWsPoFVevRcYRcE1+BR41sT6/ageQKdvs=; b=ThmQLiTUQhG6UMHVJrY9KJErKBQTzjizIXJGP5Lk5/FgbT5JhXosPLeE lyzZRm2fl+cnkCAdomg3itrnwotlDIZMW67zoOVk+FAm1SMmxXJkyEgs0 lWmkNg27qnUFXYOXWaxCNj/VeDmGEMrCa5tCRe7aMKu0ldwvbepLKN4sB r5Uw7Oa+bZ7fQIoyerKDEQLTh+nST0G4sGUB156Sc4hMBrfZjn4ioIjWc 1jz9dAFVRxL2NVx9Zhd/qg6TQ2mPhwc6Hjv0O1vHFMOrQwqY8V6ilBgDg Caorib6Uke0w61w3a+ydbBw3iGsznACaTNHOT7VZUImq8vXv+chKRVpBI Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10247"; a="308943890" X-IronPort-AV: E=Sophos;i="5.88,340,1635231600"; d="scan'208";a="308943890" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2022 10:17:25 -0800 X-IronPort-AV: E=Sophos;i="5.88,340,1635231600"; d="scan'208";a="631431415" Received: from iworam-desk.amr.corp.intel.com ([10.7.150.79]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2022 10:17:25 -0800 From: "Oram, Isaac W" To: devel@edk2.groups.io Cc: Nate DeSimone , Chasel Chiu , Daocheng Bu , Hongbin Zhang Subject: [edk2-devel][edk2-platforms][PATCH V2 0/2] WhitleyOpenBoardPkg board porting template Date: Thu, 3 Feb 2022 10:17:18 -0800 Message-Id: X-Mailer: git-send-email 2.27.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds a template for board porting and the infrastruture to support. V2: 1/2: No change 2/2: Updated Readme.md per feedback, elaborating on naming and fixing formatting issues. V1: The WhitleyOpenBoardPkg/Readme.md documents the step by step instructions to create a new board tip that builds. The BoardPortTemplate contains build files and typically required Universal Board Abstraction (UBA) modules that enable detailed customization. The UBA modules are customized to have fewer deltas between board ports. For DXE, this means I removed the board names in data structures, functions, etc. Because they are all compiled into different drivers per board anyway. PEI still has decorated names as the UBA module is a library and thus multiple board name collisions are a concern. The only other changes to UBA modules was to use newer DEBUG_INFO and DEBUG_ERROR styles. I did not add the BoardPortTemplate to Platform/Intel/build.cfg. It is buildable so it could be added. Cc: Nate DeSimone Cc: Chasel Chiu Cc: Daocheng Bu Cc: Hongbin Zhang Isaac Oram (2): WhitleyOpenBoardPkg/BoardPortTemplate: Add a template for board porting. WhitleyOpenBoardPkg/PlatformInfo: Add board ID vendor range Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Dsc/UbaSingleBoardPei.dsc | 36 + Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Fdf/UbaSingleBoardDxe.fdf | 12 + Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.dsc | 40 + Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.fdf | 807 ++++++++++++++++++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.c | 99 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h | 118 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf | 47 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c | 115 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h | 57 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf | 47 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c | 127 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.h | 27 + Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf | 44 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c | 52 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/GpioTable.c | 287 +++++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/IioBifurInit.c | 246 ++++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/KtiEparam.c | 68 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PcdData.c | 273 +++++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PchEarlyUpdate.c | 92 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInit.h | 77 ++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.c | 156 ++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.inf | 166 ++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SlotTable.c | 171 +++++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SoftStrapFixup.c | 119 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/UsbOC.c | 124 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_board.py | 125 +++ Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_config.cfg | 36 + Platform/Intel/WhitleyOpenBoardPkg/Platform/Pei/PlatformInfo/PlatformInfo.c | 3 +- Platform/Intel/WhitleyOpenBoardPkg/Readme.md | 124 +++ Silicon/Intel/WhitleySiliconPkg/Include/PlatformInfoTypes.h | 8 +- 30 files changed, 3701 insertions(+), 2 deletions(-) create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Dsc/UbaSingleBoardPei.dsc create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Include/Fdf/UbaSingleBoardDxe.fdf create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.dsc create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/PlatformPkg.fdf create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.h create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/IioCfgUpdateDxe/IioCfgUpdateDxe.inf create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.h create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/SlotDataUpdateDxe/SlotDataUpdateDxe.inf create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.h create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Dxe/UsbOcUpdateDxe/UsbOcUpdateDxe.inf create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/AcpiTablePcds.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/GpioTable.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/IioBifurInit.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/KtiEparam.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PcdData.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PchEarlyUpdate.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInit.h create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/PeiBoardInitLib.inf create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SlotTable.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/SoftStrapFixup.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/Uba/TypeBoardPortTemplate/Pei/UsbOC.c create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_board.py create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/BoardPortTemplate/build_config.cfg create mode 100644 Platform/Intel/WhitleyOpenBoardPkg/Readme.md -- 2.27.0.windows.1