From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp-fw-9102.amazon.com (smtp-fw-9102.amazon.com [207.171.184.29]) by mx.groups.io with SMTP id smtpd.web08.140.1643921854578749637 for ; Thu, 03 Feb 2022 12:57:34 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@amazon.com header.s=amazon201209 header.b=LG3wXODN; spf=pass (domain: amazon.de, ip: 207.171.184.29, mailfrom: prvs=026b83387=ncoleon@amazon.de) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1643921855; x=1675457855; h=from:to:cc:subject:date:message-id:mime-version; bh=tgiw/ktzpHdEnXX0A95S0DSynOsbMxKwp6hOkrMso9w=; b=LG3wXODNYPtMWhKiTD80rkg6A8hKGpweFaQfTurfuqFMD0GhveALDQqn +HHtOniFvXeNAVq5L6RoQUVNvcaMgtjHaydHSJgra7unJZZxB7y63kgcO YK0UcMdiOltTGsVYxYeLBnwCMNLUjpRmvYXoIVkVMrbTEMNMbFVbTIYca E=; X-IronPort-AV: E=Sophos;i="5.88,340,1635206400"; d="scan'208";a="192122414" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO email-inbound-relay-iad-1e-ccb3efe0.us-east-1.amazon.com) ([10.25.36.214]) by smtp-border-fw-9102.sea19.amazon.com with ESMTP; 03 Feb 2022 20:57:20 +0000 Received: from EX13D49EUC003.ant.amazon.com (iad12-ws-svc-p26-lb9-vlan3.iad.amazon.com [10.40.163.38]) by email-inbound-relay-iad-1e-ccb3efe0.us-east-1.amazon.com (Postfix) with ESMTPS id 6FA6BC032B for ; Thu, 3 Feb 2022 20:57:18 +0000 (UTC) Received: from ub4014a598e6c52.ant.amazon.com (10.43.160.114) by EX13D49EUC003.ant.amazon.com (10.43.164.91) with Microsoft SMTP Server (TLS) id 15.0.1497.28; Thu, 3 Feb 2022 20:57:16 +0000 From: "Ojeda Leon, Nicolas" To: CC: , Nicolas Ojeda Leon Subject: [PATCH v4 0/8] Handling of multiple PCI host bridges specified Date: Thu, 3 Feb 2022 21:56:20 +0100 Message-ID: X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.43.160.114] X-ClientProxiedBy: EX13D27UWB004.ant.amazon.com (10.43.161.101) To EX13D49EUC003.ant.amazon.com (10.43.164.91) Content-Type: text/plain Increased control is provided in Ovmf platforms to define and configure the specifications of multiple PCI host bridges in the hypervisor. The host propagates this information to the guest, initially through fw-cfg interface. In some AWS EC2 platforms, we expose a PCI topology including several root bridges portraying information about physical distribution that enables the guest to optimize accesses. Current PCI driver for Ovmf enables the explicit definition of multiple root bridges and contains the logic to fix their resources based on a platform-specific PCD entries. However, we need a way to control, from the hypervisor, how many and which resources each PCI host bridge can use. For this reason, this patch series introduces a mechanism to provide PCI host bridges information like bus number range, attributes, allocation attributes, PIO aperture as well as 32 and 64- bit prefetchable and non-prefetchable MMIO ranges through a fw-cfg item created by the hypervisor and consumed by the guest firmware. In order to offer a generic and extensible way to disclose non-discoverable hardware information from the host to the guest, a new library called HardwareInfoLib is created in the OvmfPkg. In essence, this library offers the functionality to parse a generic BLOB into a list as well as the methods to iterate over such list, including filtering options. The library is conceived in a generic way so that further hardware elements can also be described using it. For such purpose the length of the BLOB is not restricted but instead regarded as a sequence of header-info elements that allow the parsing during runtime. Furthermore, specific functionality is provided wrapping QemuFwCfgReadBytes to extract hardware descriptions, in the aforementioned format, in a static way so that early in the Pei stage the library can be used to identify address space requirements. The core of the library offers enough flexibility to process as many elements, even from different hardware types (heterogenous), as needed in a single run. This library is extended for the particular use case already exposed, PCI host bridges, and this same code offers an example of how to tailor it for further hardware components. Furthermore, in this kind of high-performance platforms, we exploit PCIe features like Access Control Services to configure peer-to-peer channels between devices. This allows us to create direct communication channels that do not require packets to reach the Root Complex but instead can follow a direct path from source to target. To enable Guest Virtual Machines to profit from this performance improvement, we configure resources (BARs) of peer-to-peer intended devices with Host Physical Addresses. In this scenario, devices can be instructed, from the guest VM, to perform DMA operations targeting a peer address space, and the PCIe fabric can take care of directly routing them. Therefore, long and busy links towards the Root Complex are avoided. When we configure resources this way, the guest must respect the pre-populated BARs so that devices preserve the address ranges configured in the apertures of physical PCIe ports that enable routing at the hardware level. Similarly, revealing details about the underlying PCI hierarchy empowers the guest to perform topology-aware optimizations and benefit from an enhanced performance. --- Notes: v4: - Minor modification to use MAX_UINT64 as global invalid base address when reading PCI host bridge information provided by the host (Patch 1) - Refactor PciHostBridgeUtilityGetRootBridges into a thin wrapper that calls 2 new function: one (BusScan) that performs the legacy bus scan population process and a new one (HostProvided) that populates Root Bridges with host provided values. (Patch 5) - Move code that sets value of PcdPciPreservePopulatedMappings token based on host-provided fw-cfg file into the function that populates root bridges with host provided data (Patch 6) - Restructured base address retrieval to leave PCI Resource Allocation protocol untouched and instead augment the existing services to enable base address retrieval before allocation. (Patch 7) - Use new method to retrieve Root Bridge base addresses before allocation and use that to handle pre-populated BARs (Patch 8) Nicolas Ojeda Leon (8): OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges Ovmf/HardwareInfoLib: Create Pei lib to parse directly from fw-cfg Ovmf/HardwareInfoLib: Add Dxe lib to dynamically parse heterogenous data Ovmf/PlatformPei: Use host-provided GPA end if available OvmfPkg/PciHostBridgeUtilityLib: Initialize RootBridges apertures with spec MdeModulePkg, OvmfPkg: Add Pcd token for PCI pre-populated BARs PciHostBridgeDxe: Extend service to get base addresses before allocation MdeModulePkg/PciBusDxe: Handling of pre-populated PCI BARs MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 2 + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 + .../Bus/Pci/PciBusDxe/PciEnumerator.c | 4 +- .../Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 5 +- MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 49 ++ .../Bus/Pci/PciBusDxe/PciResourceSupport.c | 277 +++++++++- .../Bus/Pci/PciBusDxe/PciResourceSupport.h | 20 + .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 93 +++- .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.h | 2 + .../Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 4 + .../Pci/PciHostBridgeDxe/PciHostResource.h | 1 + MdeModulePkg/Include/Library/PciResourceLib.h | 20 + MdeModulePkg/MdeModulePkg.dec | 6 + OvmfPkg/Include/Library/HardwareInfoLib.h | 165 ++++++ .../HardwareInfoLib/DxeHardwareInfoLib.inf | 43 ++ .../Library/HardwareInfoLib/HardwareInfoDxe.c | 255 +++++++++ .../HardwareInfoPciHostBridgeLib.c | 514 ++++++++++++++++++ .../HardwareInfoPciHostBridgeLib.h | 262 +++++++++ .../Library/HardwareInfoLib/HardwareInfoPei.c | 85 +++ .../HardwareInfoLib/HardwareInfoTypesLib.h | 64 +++ .../HardwareInfoLib/PeiHardwareInfoLib.inf | 43 ++ .../QemuFwCfgHardwareInfoLib.c | 89 +++ .../PciHostBridgeUtilityLib.c | 333 +++++++++++- .../PciHostBridgeUtilityLib.inf | 5 + OvmfPkg/OvmfPkgX64.dsc | 3 + OvmfPkg/PlatformPei/MemDetect.c | 146 ++++- OvmfPkg/PlatformPei/PlatformPei.inf | 2 + 27 files changed, 2475 insertions(+), 18 deletions(-) create mode 100644 MdeModulePkg/Include/Library/PciResourceLib.h create mode 100644 OvmfPkg/Include/Library/HardwareInfoLib.h create mode 100644 OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoDxe.c create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.c create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPciHostBridgeLib.h create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoPei.c create mode 100644 OvmfPkg/Library/HardwareInfoLib/HardwareInfoTypesLib.h create mode 100644 OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf create mode 100644 OvmfPkg/Library/HardwareInfoLib/QemuFwCfgHardwareInfoLib.c -- 2.17.1 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879