From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web08.8267.1661838502093840833 for ; Mon, 29 Aug 2022 22:48:22 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=lkJVvzDU; spf=permerror, err=too many SPF records (domain: intel.com, ip: 192.55.52.88, mailfrom: xiao.x.chen@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661838502; x=1693374502; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Hhkb1WK+SOe8dGmBq9Hz++TTLqGDtXk0Kh2d72UFbCU=; b=lkJVvzDU6PBDnDz4oA9jkt9OnZB1tfey+OFpIUZgNL1gZNWWiWK8ofCN fTxhi3Qgc/I1+VWX0N2me9/kKUldvEQKVEWaWq3vKa7aWq+9WyMXhy/aF thXMky54mYGWIi2M841D/PR6xNjrx2FwytYqq/JSs5NPYVX/puHIt83o0 PYbdOtOXJ/6X3Eq9InXIgFU4Sg52xV3HyOT0xZn2zley/8zl1C1iCYVuG Sa338mOyZda1tSYcRcBHaoHkJNUM0lSyiKX/1g18WZqC5ARQ+gJ7j69Ep 49Nqpn8tqoEMqivbjELiLKZBKsSMtZBtKu7KSP2J3qHqDwgYceYuXJWCh w==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="321214634" X-IronPort-AV: E=Sophos;i="5.93,274,1654585200"; d="scan'208";a="321214634" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 22:46:59 -0700 X-IronPort-AV: E=Sophos;i="5.93,274,1654585200"; d="scan'208";a="672695893" Received: from chenxia1-desk.ccr.corp.intel.com ([10.239.216.34]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 22:46:58 -0700 From: "chenxia1" To: devel@edk2.groups.io Cc: Xiao X Chen Subject: [PATCH v2 0/1] Use PCI_DEVICE_PPI to manage Nvme device Date: Tue, 30 Aug 2022 13:46:47 +0800 Message-Id: X-Mailer: git-send-email 2.37.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This change modifies NvmExpressPei library to allow usage EDKII_PCI_DEVICE_PPI to manage Nvme device. For now, the part that performs the enumeration and creates EDKII_PCI_DEVICE_PPI will be implemented in the silicon code. Sample code can be seen here: https://github.com/mczaj/edk2-platforms/commit/d443062e58f9fba228869b54f2546d9735b3b506 unit test: - verified the origin EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI flow in platform project, Nvme controller can successful initialize. - merged https://github.com/mczaj/edk2-platforms/commit/d443062e58f9fba228869b54f2546d9735b3b506 to platform project to enumerate pcie device and create the EDKII_PCI_DEVICE_PPI for Nvme, Nvme controller also can successful initialize by EDKII_PCI_DEVICE_PPI. v1: https://edk2.groups.io/g/devel/topic/93340344 v2 changes: - add the unit test information for cover letter - refine the BAR type check for no.1 commit Xiao X Chen (1): MdeModulePkg/NvmExpressPei: Use PCI_DEVICE_PPI to manage Nvme device .../Bus/Pci/NvmExpressPei/DevicePath.c | 44 -- .../Bus/Pci/NvmExpressPei/NvmExpressPei.c | 639 ++++++++++++------ .../Bus/Pci/NvmExpressPei/NvmExpressPei.h | 54 ++ .../Bus/Pci/NvmExpressPei/NvmExpressPei.inf | 3 +- 4 files changed, 488 insertions(+), 252 deletions(-) -- 2.37.0.windows.1