From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 112837803E1 for ; Thu, 7 Sep 2023 12:44:10 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=eDV1MsGWM70t4xh5qOtglVnzygm54QuYVo3u8ecKDes=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1694090649; v=1; b=RQvx25meN1Ua55/1bmiBFPh0jDFE0w5lo61nMt5gMBhmcv5TW0acAwAM2+6GJjyAMDFfCjqf cOYYk7cDZAVvGuRu6slDO2Kcd+oAuBZFrJ1KmDdpCRRfPOIV8KY3ESIScLKZ/AVPHU/se76W9pQ /pskxUcJUrL/1YASy0XL+ChY= X-Received: by 127.0.0.2 with SMTP id Cg39YY7687511xwSvM68Uu6d; Thu, 07 Sep 2023 05:44:09 -0700 X-Received: from m12.mail.163.com (m12.mail.163.com [220.181.12.217]) by mx.groups.io with SMTP id smtpd.web11.9790.1694082356703008721 for ; Thu, 07 Sep 2023 03:25:57 -0700 X-Received: from rv-uefi.. (unknown [211.87.236.31]) by zwqz-smtp-mta-g3-1 (Coremail) with SMTP id _____wD3_7Mvpflkm92eBQ--.53719S2; Thu, 07 Sep 2023 18:25:52 +0800 (CST) From: caiyuqing_hz@163.com To: devel@edk2.groups.io Cc: sunilvl@ventanamicro.com, quic_llindhol@quicinc.com, libing1202@outlook.com, inochiama@outlook.com Subject: [edk2-devel] [PATCH v3 0/8] EDK2 on RISC-V Sophgo SG2042 platform Date: Thu, 7 Sep 2023 18:25:43 +0800 Message-Id: MIME-Version: 1.0 X-CM-TRANSID: _____wD3_7Mvpflkm92eBQ--.53719S2 X-Coremail-Antispam: 1Uf129KBjvJXoW3Gry5CF4kXw1fJFW3CF47XFb_yoW3CF1Dpw 48Xanayr1xJ3W2qa1fKay0gr4rAF1xGrn8Grnruw43u34fZ3Z8Ja1qgF1fZa93XF4rJ3W2 grn8tF4rCasIqFUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jOfHUUUUUU= X-Originating-IP: [211.87.236.31] X-CM-SenderInfo: 5fdl535tlqwslk26il2tof0z/xtbBlwXjxWI0aL7qywABsU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,caiyuqing_hz@163.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: DqOansVWGbTI8wT9dHMejS5Hx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=RQvx25me; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=163.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: caiyuqing379 <202235273@mail.sdu.edu.cn> Description: Deploy EDK2 to run on 64-core CPU under RISC-V architecture, and successfully boot to OS. Implementation can be found on https://github.com/AII-SDU/edk2-platforms/tree/devel-Sophgo/SG2042Pkg/Platform/Sophgo. Current progress and status: 1.Adopted the scheme of separating OpenSBI and EDK2. It follows PEI less design. 2.The startup process is roughly: ZSBL + FSBL + OpenSBI + EDK2 + GRUB + Linux OS. The boot medium is SD card, where ZSBL is loaded and executed by an auxiliary MCU, performing initial initialization operations such as DIMM initialization. FSBL then continues with further initialization tasks. OpenSBI is used to initialize the hardware platform and kernel. Additionally, we have upgraded the OpenSBI from version V0.9 to V1.2 to align with community progress. EDK2, running in S-mode, handles configuration operations, primarily completing the SD card driver in the DXE stage, while PCIe driver testing and follow-up work are planned. GRUB2 is used to load the operating system, facilitating subsequent operations. Testing: 1.Test the project on Sophgo SG2042 EVB and be able to launch Linux OS 2.Test the project on Milk V Pioneer board and is able to boot into the UEFI shell. However, the SD card driver could not correctly recognize all partitions and start Linux OS. Current limitation: 1.PCIE driver is not currently supported. 2.MMU support SG2042 (Xuantie C920) MMU can be enabled in SV39 mode. Introduce the PCD variable PcdForceNoMMU to disable MMU configuration. Currently, enabling MMU results in a timeout for reading data blocks from the SD card, So MMU is disabled by default. 3.Clang toolchain support Build the port using the CLANGDWARF toolchain (clang version 18.0.0). It is able to build successfully but the compiled binary was not fully work. Signed-off-by: caiyuqing379 <202235273@mail.sdu.edu.cn> Co-authored-by: USER0FISH Cc: dahogn Cc: meng-cz Cc: yli147 Cc: ChaiEvan Cc: Sunil V L Cc: Leif Lindholm caiyuqing379 (8): Sophgo/SG2042Pkg: Add SmbiosPlatformDxe module. Sophgo/SG2042Pkg: Add PlatformUpdateMmuDxe module. Sophgo/SG2042Pkg: Add Sophgo SDHCI driver. Sophgo/SG2042Pkg: Add base MMC driver. Sophgo/SG2042Pkg: Add SEC module. Sophgo/SG2042_EVB_Board: Add Sophgo SG2042 platform. Sophgo/SG2042Pkg: Add SG2042Pkg. Sophgo/SG2042Pkg: Add platform readme and document. Platform/Sophgo/SG2042_EVB_Board/SG2042.dec | 19 + Silicon/Sophgo/SG2042Pkg/SG2042Pkg.dec | 35 + Platform/Sophgo/SG2042_EVB_Board/SG2042.dsc | 548 +++++++++++ Platform/Sophgo/SG2042_EVB_Board/SG2042.fdf | 248 +++++ .../SG2042Pkg/Drivers/MmcDxe/MmcDxe.inf | 46 + .../PlatformUpdateMmuDxe.inf | 34 + .../SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.inf | 47 + .../SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 39 + Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf | 68 ++ Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.h | 513 ++++++++++ .../SG2042Pkg/Drivers/SdHostDxe/SdHci.h | 309 ++++++ Silicon/Sophgo/SG2042Pkg/Include/MmcHost.h | 225 +++++ Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h | 104 ++ .../SG2042Pkg/Drivers/MmcDxe/ComponentName.c | 156 +++ .../SG2042Pkg/Drivers/MmcDxe/Diagnostics.c | 323 ++++++ Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.c | 527 ++++++++++ .../SG2042Pkg/Drivers/MmcDxe/MmcBlockIo.c | 643 ++++++++++++ .../SG2042Pkg/Drivers/MmcDxe/MmcDebug.c | 194 ++++ .../Drivers/MmcDxe/MmcIdentification.c | 719 ++++++++++++++ .../PlatformUpdateMmuDxe.c | 593 +++++++++++ .../SG2042Pkg/Drivers/SdHostDxe/SdHci.c | 929 ++++++++++++++++++ .../SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.c | 450 +++++++++ .../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 805 +++++++++++++++ Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c | 29 + Silicon/Sophgo/SG2042Pkg/Sec/Memory.c | 347 +++++++ Silicon/Sophgo/SG2042Pkg/Sec/Platform.c | 130 +++ Silicon/Sophgo/SG2042Pkg/Sec/SecMain.c | 115 +++ Platform/Sophgo/About_Sophgo_platform.md | 39 + .../Documents/Media/EDK2_SDU_Programme.png | Bin 0 -> 59830 bytes .../Sophgo/Documents/Media/SG2042_CPU.png | Bin 0 -> 806062 bytes .../Documents/Media/Sophgo_SG2042_EVB.png | Bin 0 -> 1445528 bytes Platform/Sophgo/Maintainers.md | 107 ++ Platform/Sophgo/SG2042_EVB_Board/Readme.md | 100 ++ .../Sophgo/SG2042_EVB_Board/SG2042.fdf.inc | 62 ++ .../Sophgo/SG2042_EVB_Board/VarStore.fdf.inc | 77 ++ Silicon/Sophgo/SG2042Pkg/SG2042Pkg.uni | 13 + Silicon/Sophgo/SG2042Pkg/SG2042PkgExtra.uni | 12 + Silicon/Sophgo/SG2042Pkg/Sec/SecEntry.S | 18 + 38 files changed, 8623 insertions(+) create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.dec create mode 100644 Silicon/Sophgo/SG2042Pkg/SG2042Pkg.dec create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.dsc create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.fdf create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcDxe.inf create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/PlatformUpdateMmuDxe/PlatformUpdateMmuDxe.inf create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.inf create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.h create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHci.h create mode 100644 Silicon/Sophgo/SG2042Pkg/Include/MmcHost.h create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/ComponentName.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Diagnostics.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcBlockIo.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcDebug.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcIdentification.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/PlatformUpdateMmuDxe/PlatformUpdateMmuDxe.c create mode 100755 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHci.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Memory.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Platform.c create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.c create mode 100644 Platform/Sophgo/About_Sophgo_platform.md create mode 100644 Platform/Sophgo/Documents/Media/EDK2_SDU_Programme.png create mode 100644 Platform/Sophgo/Documents/Media/SG2042_CPU.png create mode 100644 Platform/Sophgo/Documents/Media/Sophgo_SG2042_EVB.png create mode 100644 Platform/Sophgo/Maintainers.md create mode 100644 Platform/Sophgo/SG2042_EVB_Board/Readme.md create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.fdf.inc create mode 100644 Platform/Sophgo/SG2042_EVB_Board/VarStore.fdf.inc create mode 100644 Silicon/Sophgo/SG2042Pkg/SG2042Pkg.uni create mode 100644 Silicon/Sophgo/SG2042Pkg/SG2042PkgExtra.uni create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecEntry.S -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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