From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smarthost01a.sbp.mail.zen.net.uk (smarthost01a.sbp.mail.zen.net.uk [212.23.1.1]) by mx.groups.io with SMTP id smtpd.web12.28129.1647853821260416210 for ; Mon, 21 Mar 2022 02:10:22 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=permerror, err=parse error for token &{10 18 sdn.klaviyomail.com}: permanent DNS error (domain: starlabs.systems, ip: 212.23.1.1, mailfrom: sean@starlabs.systems) Received: from [51.148.147.4] (helo=sean-StarBook.lan) by smarthost01a.sbp.mail.zen.net.uk with esmtp (Exim 4.90_1) (envelope-from ) id 1nWE3O-0007HO-FN; Mon, 21 Mar 2022 09:10:18 +0000 From: "Sean Rhodes" To: devel@edk2.groups.io Cc: Patrick Rudolph , Guo Dong , Ray Ni , Maurice Ma , Benjamin You , Sean Rhodes Subject: [PATCH 2/5] UefiPayloadPkg/Include/Coreboot: Add headers for SMMSTOREv2 table Date: Mon, 21 Mar 2022 09:10:10 +0000 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 X-Originating-smarthost01a-IP: [51.148.147.4] Feedback-ID: 51.148.147.4 Content-Transfer-Encoding: quoted-printable From: Patrick Rudolph Since commit bc744f5893fc4d53275ed26dd8d968011c6a09c1 coreboot supports the SMMSTORE v2 feature. It implements a SMI handler that is able to write, read and erase pages in the boot media (SPI flash). The existence of this optional feature is advertised by a coreboot table. Add the tag and headers to parse the table. Cc: Guo Dong Cc: Ray Ni Cc: Maurice Ma Cc: Benjamin You Cc: Sean Rhodes Signed-off-by: Patrick Rudolph --- UefiPayloadPkg/Include/Coreboot.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/UefiPayloadPkg/Include/Coreboot.h b/UefiPayloadPkg/Include/Cor= eboot.h index a3e1109fe8..617e5e9bc0 100644 --- a/UefiPayloadPkg/Include/Coreboot.h +++ b/UefiPayloadPkg/Include/Coreboot.h @@ -236,6 +236,19 @@ struct cb_cbmem_tab { UINT64 cbmem_tab;=0D };=0D =0D +#define CB_TAG_SMMSTOREV2 0x0039=0D +struct cb_smmstorev2 {=0D + UINT32 tag;=0D + UINT32 size;=0D + UINT32 num_blocks; /* Number of writeable blocks in Smm */=0D + UINT32 block_size; /* Size of a block in byte. Default: 64 KiB *= /=0D + UINT32 mmap_addr; /* MMIO address of the store for read only ac= cess */=0D + UINT32 com_buffer; /* Physical address of the communication buff= er */=0D + UINT32 com_buffer_size; /* Size of the communication buffer in byte *= /=0D + UINT8 apm_cmd; /* The command byte to write to the APM I/O p= ort */=0D + UINT8 unused[3]; /* Set to zero */=0D +};=0D +=0D /* Helpful macros */=0D =0D #define MEM_RANGE_COUNT(_rec) \=0D --=20 2.32.0