From: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>
To: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: devel@edk2.groups.io, Graeme Gregory <graeme@xora.org.uk>,
Ard Biesheuvel <ardb+tianocore@kernel.org>
Subject: Re: [edk2-devel] [PATCH edk2-platforms 1/1] Platform/QemuSbsa: define NS EL2 virtual timer in GTDT
Date: Wed, 20 Sep 2023 13:49:17 +0200 [thread overview]
Message-ID: <d2c49d1f-64a2-4d80-af72-94dfb7675381@linaro.org> (raw)
In-Reply-To: <ZQrDoPfnrvAxUqfk@qc-i7.hemma.eciton.net>
W dniu 20.09.2023 o 12:04, Leif Lindholm pisze:
> On Wed, Sep 20, 2023 at 10:25:09 +0200, Marcin Juszkiewicz wrote:
>> Armv8.1+ cpus have Virtual Host Extension (VHE) which added non-secure
>> EL2 virtual timer.
> It's still valid to use other CPUs than "max" with this platform.
> Don't we need to conditionalise this based on the contents of the VH
> bits in ID_AA64MFR1_EL1?
Most of cpu cores available for SBSA Reference Platform are v8.2+ ones.
And default is Neoverse-N1.
> Ideally, we'd add a helper function in edk2
> ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c, like ArmHasCcidx(), and
> conditionalise on that.
>
> Hmm, but we'd probably also need to move from .aslc to manually
> construction GTDT in SbsaQemuAcpiDxe...
>
> If you're up for doing the GTDT rework, I could create the ArmLib
> helper function.
Sooner or later it needs to be done anyway as we need to add system
timers there (which iirc only Ampere does in EDK2).
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prev parent reply other threads:[~2023-09-20 11:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 8:25 [edk2-devel] [PATCH edk2-platforms 0/1] Platform/QemuSbsa: define NS EL2 virtual timer in GTDT Marcin Juszkiewicz
2023-09-20 8:25 ` [edk2-devel] [PATCH edk2-platforms 1/1] " Marcin Juszkiewicz
2023-09-20 10:04 ` Leif Lindholm
2023-09-20 11:49 ` Marcin Juszkiewicz [this message]
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