From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.3589.1668157959848818658 for ; Fri, 11 Nov 2022 01:12:40 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lixianglai@loongson.cn) Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxTLYEEm5jeBMGAA--.7231S3; Fri, 11 Nov 2022 17:12:36 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxFlcAEm5jXc0QAA--.27651S5; Fri, 11 Nov 2022 17:12:35 +0800 (CST) From: "xianglai" To: devel@edk2.groups.io Cc: Bibo Mao , Chao Li , Leif Lindholm , Liming Gao , Michael D Kinney Subject: [edk2-platforms][PATCH V5 03/15] Platform/Loongson: Add PeiServicesTablePointerLib. Date: Fri, 11 Nov 2022 17:12:18 +0800 Message-Id: X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxFlcAEm5jXc0QAA--.27651S5 X-CM-SenderInfo: 5ol0xt5qjotxo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBjvJXoW3ArWrWF4DuFyDJrWkXF15XFb_yoW3WFWkpr 43WFs7tr1UJrWIgryYqa15CFW5AFsrCr98Crs7XF1rC34kZry0qryjvFWFkFyrua45Aw1I gryFkw4Uu3WUXF7anT9S1TB71UUUUjUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU bFAFc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wA2ocxC64kIII0Yj41l84x0c7CEw4 AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF 7I0E14v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x 0267AKxVWxJr0_GcWln4kS14v26r1Y6r17M2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF 6xkI12xvs2x26I8E6xACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6x8ErcxFaVAv8V WrMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCF 04k20xvE74AGY7Cv6cx26rWl4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1l4IxYO2xFxVAFwI0_Jr v_JF1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY 17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcV C0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY 6I8E87Iv67AKxVWxJVW8Jr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2Kf nxnUUI43ZEXa7xRihFxUUUUUU== Content-Transfer-Encoding: quoted-printable Use a register to save PeiServicesTable pointer,=0D This lib Provides PeiServicesTable pointer saving=0D and retrieval services.=0D =0D REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4054=0D =0D Cc: Bibo Mao =0D Cc: Chao Li =0D Cc: Leif Lindholm =0D Cc: Liming Gao =0D Cc: Michael D Kinney =0D Signed-off-by: xianglai li =0D ---=0D .../PeiServicesTablePointer.c | 79 +++++++++++++++++++=0D .../PeiServicesTablePointer.h | 39 +++++++++=0D .../PeiServicesTablePointerLib.S | 40 ++++++++++=0D .../PeiServicesTablePointerLib.inf | 32 ++++++++=0D 4 files changed, 190 insertions(+)=0D create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesT= ablePointerLib/PeiServicesTablePointer.c=0D create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesT= ablePointerLib/PeiServicesTablePointer.h=0D create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesT= ablePointerLib/PeiServicesTablePointerLib.S=0D create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesT= ablePointerLib/PeiServicesTablePointerLib.inf=0D =0D diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePoi= nterLib/PeiServicesTablePointer.c b/Platform/Loongson/LoongArchQemuPkg/Libr= ary/PeiServicesTablePointerLib/PeiServicesTablePointer.c=0D new file mode 100644=0D index 0000000000..204def3bde=0D --- /dev/null=0D +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib= /PeiServicesTablePointer.c=0D @@ -0,0 +1,79 @@=0D +/** @file=0D + PEI Services Table Pointer Library.=0D +=0D + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include =0D +#include =0D +#include =0D +#include "Library/Cpu.h"=0D +#include "PeiServicesTablePointer.h"=0D +=0D +/**=0D + Caches a pointer PEI Services Table.=0D +=0D + Caches the pointer to the PEI Services Table specified by PeiServicesTab= lePointer=0D + in a platform specific manner.=0D +=0D + If PeiServicesTablePointer is NULL, then ASSERT ().=0D +=0D + @param PeiServicesTablePointer The address of PeiServices pointer.= =0D +**/=0D +VOID=0D +EFIAPI=0D +SetPeiServicesTablePointer (=0D + IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer=0D + )=0D +{=0D + LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);=0D +}=0D +=0D +/**=0D + Retrieves the cached value of the PEI Services Table pointer.=0D +=0D + Returns the cached value of the PEI Services Table pointer in a CPU spec= ific manner=0D + as specified in the CPU binding section of the Platform Initialization P= re-EFI=0D + Initialization Core Interface Specification.=0D +=0D + If the cached PEI Services Table pointer is NULL, then ASSERT ().=0D +=0D + @return The pointer to PeiServices.=0D +**/=0D +CONST EFI_PEI_SERVICES **=0D +EFIAPI=0D +GetPeiServicesTablePointer (=0D + VOID=0D + )=0D +{=0D + UINTN val;=0D +=0D + LoongarchReadqKs0 (&val);=0D +=0D + return (CONST EFI_PEI_SERVICES **)val;=0D +}=0D +=0D +/**=0D +Perform CPU specific actions required to migrate the PEI Services Table=0D +pointer from temporary RAM to permanent RAM.=0D +=0D +For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes=0D +immediately preceding the Interrupt Descriptor Table (IDT) in memory.=0D +For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes=0D +immediately preceding the Interrupt Descriptor Table (IDT) in memory.=0D +For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in=0D +a dedicated CPU register. This means that there is no memory storage=0D +associated with storing the PEI Services Table pointer, so no additional=0D +migration actions are required for Itanium or ARM CPUs.=0D +*/=0D +VOID=0D +EFIAPI=0D +MigratePeiServicesTablePointer (=0D +VOID=0D +)=0D +{=0D + return;=0D +}=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePoi= nterLib/PeiServicesTablePointer.h b/Platform/Loongson/LoongArchQemuPkg/Libr= ary/PeiServicesTablePointerLib/PeiServicesTablePointer.h=0D new file mode 100644=0D index 0000000000..5bcbc810d0=0D --- /dev/null=0D +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib= /PeiServicesTablePointer.h=0D @@ -0,0 +1,39 @@=0D +/** @file=0D + PeiServicesTablePointer=0D +=0D + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef PEISERVICESTABLEPOINTER_H_=0D +#define PEISERVICESTABLEPOINTER_H_=0D +=0D +/**=0D + Write Csr KS0 register.=0D +=0D + @param A0 The value used to write to the KS0 register=0D +=0D + @retval none=0D +**/=0D +extern=0D +VOID=0D +LoongarchWriteqKs0 (=0D + IN UINT64 Val=0D + );=0D +=0D +/**=0D + Read Csr KS0 register.=0D +=0D + @param Val Pointer to the variable used to store the KS0 register value= =0D +=0D + @retval none=0D +**/=0D +extern=0D +VOID=0D +LoongarchReadqKs0 (=0D + IN UINT64 *Val=0D + );=0D +=0D +#endif // PEISERVICESTABLEPOINTER_H_=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePoi= nterLib/PeiServicesTablePointerLib.S b/Platform/Loongson/LoongArchQemuPkg/L= ibrary/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S=0D new file mode 100644=0D index 0000000000..7c6170c5d6=0D --- /dev/null=0D +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib= /PeiServicesTablePointerLib.S=0D @@ -0,0 +1,40 @@=0D +#-------------------------------------------------------------------------= -----=0D +#=0D +# Timer Cfg for LoongArch=0D +#=0D +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +#ifndef __ASSEMBLY__=0D +#define __ASSEMBLY__=0D +#endif=0D +=0D +#include "Library/Cpu.h"=0D +=0D +ASM_GLOBAL ASM_PFX(LoongarchWriteqKs0)=0D +ASM_GLOBAL ASM_PFX(LoongarchReadqKs0)=0D +=0D +#=0D +# Write Csr KS0 register.=0D +# @param A0 The value used to write to the KS0 register=0D +# @retval none=0D +#=0D +=0D +ASM_PFX(LoongarchWriteqKs0):=0D + csrwr A0, LOONGARCH_CSR_KS0=0D + jirl ZERO, RA,0=0D +=0D +#=0D +# Write Csr KS0 register.=0D +# @param A0 Pointer to the variable used to store the KS0 register value=0D +# @retval none=0D +#=0D +=0D +ASM_PFX(LoongarchReadqKs0):=0D + csrrd T0, LOONGARCH_CSR_KS0=0D + stptr.d T0, A0, 0=0D + jirl ZERO, RA,0=0D + jirl ZERO, RA,0=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePoi= nterLib/PeiServicesTablePointerLib.inf b/Platform/Loongson/LoongArchQemuPkg= /Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf=0D new file mode 100644=0D index 0000000000..2ab0d53d4c=0D --- /dev/null=0D +++ b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib= /PeiServicesTablePointerLib.inf=0D @@ -0,0 +1,32 @@=0D +## @file=0D +# PEI Services Table Pointer Library.=0D +#=0D +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +[Defines]=0D + INF_VERSION =3D 0x00010005=0D + BASE_NAME =3D PeiServicesTablePointerLib=0D + FILE_GUID =3D C3C9C4ED-EB8A-4548-BE1B-ABB0B6F35B1E= =0D + MODULE_TYPE =3D PEIM=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D PeiServicesTablePointerLib|PEIM PEI_C= ORE SEC=0D +=0D +#=0D +# VALID_ARCHITECTURES =3D LOONGARCH64=0D +#=0D +=0D +[Sources]=0D + PeiServicesTablePointer.c=0D + PeiServicesTablePointerLib.S=0D +=0D +[Packages]=0D + Platform/Loongson/LoongArchQemuPkg/Loongson.dec=0D + MdePkg/MdePkg.dec=0D +=0D +[LibraryClasses]=0D + DebugLib=0D +=0D +[Pcd]=0D -- =0D 2.31.1=0D =0D