From: Giri P Mudusuru <giri.p.mudusuru@intel.com>
To: edk2-devel@lists.01.org
Cc: Jiewen Yao <jiewen.yao@intel.com>
Subject: [PATCH] IntelSiliconPkg: Fixed bug in IgdOpregion spec
Date: Mon, 17 Oct 2016 20:22:40 -0700 [thread overview]
Message-ID: <d623a8d059a4cc7c5576f21ee20cea3a67aa35e5.1476760891.git.giri.p.mudusuru@intel.com> (raw)
Spec documents Mailbox3 - RM31 size as 0x45(69) instead of 0x46(70)
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
index c66a452..fd6f813 100644
--- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
+++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
@@ -4,6 +4,8 @@
https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf
+ @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)
+
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -116,7 +118,7 @@ typedef struct {
UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature
UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer
UINT32 STAT; ///< Offset 0x3B6 State Indicator
- UINT8 RM31[0x45]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero
+ UINT8 RM31[0x46]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero. Bug in spec 0x45(69)
} IGD_OPREGION_MBOX3;
///
--
2.9.0.windows.1
next reply other threads:[~2016-10-18 3:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-18 3:22 Giri P Mudusuru [this message]
2016-10-18 7:36 ` [PATCH] IntelSiliconPkg: Fixed bug in IgdOpregion spec Yao, Jiewen
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