From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9956E80342 for ; Wed, 22 Mar 2017 09:03:55 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EB2AA37E72; Wed, 22 Mar 2017 16:03:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com EB2AA37E72 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=lersek@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com EB2AA37E72 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-105.phx2.redhat.com [10.3.116.105]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9C1105C6C9; Wed, 22 Mar 2017 16:03:53 +0000 (UTC) To: Brijesh Singh , michael.d.kinney@intel.com, jordan.l.justen@intel.com, edk2-devel@ml01.01.org, liming.gao@intel.com, Jeff Fan References: <149013076154.27235.10725020825643505862.stgit@brijesh-build-machine> <149013076888.27235.3173588515291478806.stgit@brijesh-build-machine> Cc: brijesh.singh@amd.com, leo.duran@amd.com, Thomas.Lendacky@amd.com From: Laszlo Ersek Message-ID: Date: Wed, 22 Mar 2017 17:03:51 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <149013076888.27235.3173588515291478806.stgit@brijesh-build-machine> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 22 Mar 2017 16:03:56 +0000 (UTC) Subject: Re: [RFC PATCH v2 01/10] OvmfPkg/Include: Define SEV specific CPUID and MSR X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Mar 2017 16:03:55 -0000 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Adding Jeff On 03/21/17 22:12, Brijesh Singh wrote: > The patch defines AMD's Memory Encryption Information CPUID leaf (0x8000_001F). > The complete description for this CPUID leaf is available in APM volume 2 [1] > Section 15.34 (Secure Encrypted Virtualization). > > [1] http://support.amd.com/TechDocs/24593.pdf > > Signed-off-by: Brijesh Singh > --- > OvmfPkg/Include/Register/AmdSevMap.h | 133 ++++++++++++++++++++++++++++++++++ > 1 file changed, 133 insertions(+) > create mode 100644 OvmfPkg/Include/Register/AmdSevMap.h > > diff --git a/OvmfPkg/Include/Register/AmdSevMap.h b/OvmfPkg/Include/Register/AmdSevMap.h > new file mode 100644 > index 0000000..de80f39 > --- /dev/null > +++ b/OvmfPkg/Include/Register/AmdSevMap.h > @@ -0,0 +1,133 @@ > +/** @file > + > +AMD Secure Encrypted Virtualization (SEV) specific CPUID and MSR definitions > + > +The complete description for this CPUID leaf is available in APM volume 2 (Section 15.34) > +http://support.amd.com/TechDocs/24593.pdf > + > +Copyright (c) 2017, Advanced Micro Devices. All rights reserved.
> + > +This program and the accompanying materials > +are licensed and made available under the terms and conditions of the BSD License > +which accompanies this distribution. The full text of the license may be found at > +http://opensource.org/licenses/bsd-license.php > + > +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > + > +**/ > + > +#ifndef __AMD_SEV_MAP_H__ > +#define __AMD_SEV_MAP_H__ > + > +#pragma pack (1) > + > +#define CPUID_MEMORY_ENCRYPTION_INFO 0x8000001F > + > +/** > + CPUID Memory Encryption support information EAX for CPUID leaf > + #CPUID_MEMORY_ENCRYPTION_INFO. > +**/ > +typedef union { > + /// > + /// Individual bit fields > + /// > + struct { > + /// > + /// [Bit 0] Secure Memory Encryption (Sme) Support > + /// > + UINT32 SmeBit:1; > + > + /// > + /// [Bit 1] Secure Encrypted Virtualization (Sev) Support > + /// > + UINT32 SevBit:1; > + > + /// > + /// [Bit 2] Page flush MSR support > + /// > + UINT32 PageFlushMsrBit:1; > + > + /// > + /// [Bit 3] Encrypted state support > + /// > + UINT32 SevEsBit:1; > + > + /// > + /// [Bit 4:31] Reserved > + /// > + UINT32 ReservedBits:28; > + } Bits; > + /// > + /// All bit fields as a 32-bit value > + /// > + UINT32 Uint32; > +} CPUID_MEMORY_ENCRYPTION_INFO_EAX; > + > +/** > + CPUID Memory Encryption support information EBX for CPUID leaf > + #CPUID_MEMORY_ENCRYPTION_INFO. > +**/ > +typedef union { > + /// > + /// Individual bit fields > + /// > + struct { > + /// > + /// [Bit 0:5] Page table bit number used to enable memory encryption > + /// > + UINT32 PtePosBits:6; > + > + /// > + /// [Bit 6:11] Reduction of system physical address space bits when memory encryption is enabled > + /// > + UINT32 ReducedPhysBits:5; > + > + /// > + /// [Bit 12:31] Reserved > + /// > + UINT32 ReservedBits:21; > + } Bits; > + /// > + /// All bit fields as a 32-bit value > + /// > + UINT32 Uint32; > +} CPUID_MEMORY_ENCRYPTION_INFO_EBX; > + > +/** > + Secure Encrypted Virtualization (SEV) status register > + > +**/ > +#define MSR_SEV_STATUS 0xc0010131 > + > +/** > + MSR information returned for #MSR_SEV_STATUS > +**/ > +typedef union { > + /// > + /// Individual bit fields > + /// > + struct { > + /// > + /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled > + /// > + UINT32 SevBit:1; > + > + /// > + /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled > + /// > + UINT32 SevEsBit:1; > + > + UINT32 Reserved:30; > + } Bits; > + /// > + /// All bit fields as a 32-bit value > + /// > + UINT32 Uint32; > + /// > + /// All bit fields as a 64-bit value > + /// > + UINT64 Uint64; > +} MSR_SEV_STATUS_REGISTER; > + > +#endif > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel > I feel that these definitions should be added to "UefiCpuPkg/Include/Register/Cpuid.h", or else to another (new) header file in that directory. Jeff, what do you think? Thanks! Laszlo