From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web09.21069.1628769481864596349 for ; Thu, 12 Aug 2021 04:58:08 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: min.m.xu@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10073"; a="202524290" X-IronPort-AV: E=Sophos;i="5.84,315,1620716400"; d="scan'208";a="202524290" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2021 04:58:07 -0700 X-IronPort-AV: E=Sophos;i="5.84,315,1620716400"; d="scan'208";a="517433795" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.249.175.248]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2021 04:58:05 -0700 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [PATCH 15/23] OvmfPkg: Add IntelTdx.h in OvmfPkg/Include/IndustryStandard Date: Thu, 12 Aug 2021 19:56:54 +0800 Message-Id: X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit RFC： https://bugzilla.tianocore.org/show_bug.cgi?id=3429 IntelTdx.h defines the defitions used by TDX in OvmfPkg: - Mailbox related defitions,such as the data structure, command code, AP relocation defitions. - EFI_HOB_PLATFORM_INFO describes the TDX platform information Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu --- OvmfPkg/Include/IndustryStandard/IntelTdx.h | 77 +++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 OvmfPkg/Include/IndustryStandard/IntelTdx.h diff --git a/OvmfPkg/Include/IndustryStandard/IntelTdx.h b/OvmfPkg/Include/IndustryStandard/IntelTdx.h new file mode 100644 index 000000000000..2370f18289a1 --- /dev/null +++ b/OvmfPkg/Include/IndustryStandard/IntelTdx.h @@ -0,0 +1,77 @@ +/** @file + TBD + + Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _OVMF_INTEL_TDX__H_ +#define _OVMF_INTEL_TDX__H_ + +#include +#include +#include +#include + +#define MP_CPU_PROTECTED_MODE_MAILBOX_APICID_INVALID 0xFFFFFFFF +#define MP_CPU_PROTECTED_MODE_MAILBOX_APICID_BROADCAST 0xFFFFFFFE + +typedef enum { + MpProtectedModeWakeupCommandNoop = 0, + MpProtectedModeWakeupCommandWakeup = 1, + MpProtectedModeWakeupCommandSleep = 2, + MpProtectedModeWakeupCommandAcceptPages = 3, +} MP_CPU_PROTECTED_MODE_WAKEUP_CMD; + +#pragma pack (1) + + // + // Describes the CPU MAILBOX control structure use to + // wakeup cpus spinning in long mode + // + typedef struct { + UINT16 Command; + UINT16 Resv; + UINT32 ApicId; + UINT64 WakeUpVector; + UINT8 ResvForOs[2032]; + // + // Arguments available for wakeup code + // + UINT64 WakeUpArgs1; + UINT64 WakeUpArgs2; + UINT64 WakeUpArgs3; + UINT64 WakeUpArgs4; + UINT8 Pad1[0xe0]; + UINT64 NumCpusArriving; + UINT8 Pad2[0xf8]; + UINT64 NumCpusExiting; + UINT32 Tallies[256]; + UINT8 Errors[256]; + UINT8 Pad3[0xf8]; + } MP_WAKEUP_MAILBOX; + + +// +// AP relocation code information including code address and size, +// this structure will be shared be C code and assembly code. +// It is natural aligned by design. +// +typedef struct { + UINT8 *RelocateApLoopFuncAddress; + UINTN RelocateApLoopFuncSize; +} MP_RELOCATION_MAP; + +typedef struct { + /// + EFI_HOB_GUID_TYPE GuidHeader; + UINT64 RelocatedMailBox; + UINT16 HostBridgePciDevId; + BOOLEAN SetNxForStack; + UINT8 SystemStates[6]; +} EFI_HOB_PLATFORM_INFO; + +#pragma pack() + +#endif -- 2.29.2.windows.2