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id 15.20.6886.034; Tue, 17 Oct 2023 11:38:22 +0000 Message-ID: Date: Tue, 17 Oct 2023 18:38:11 +0700 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [edk2-platforms PATCH 1/1] AmpereAltraPkg/Ac01PcieLib: drop useless link status register read To: devel@edk2.groups.io, lersek@redhat.com Cc: Chuong Tran , Leif Lindholm , Rebecca Cran References: <20231017100507.43573-1-lersek@redhat.com> From: "Nhi Pham via groups.io" In-Reply-To: <20231017100507.43573-1-lersek@redhat.com> X-ClientProxiedBy: KL1PR02CA0018.apcprd02.prod.outlook.com (2603:1096:820:c::23) To PH0PR01MB7287.prod.exchangelabs.com (2603:10b6:510:10a::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR01MB7287:EE_|SJ2PR01MB8372:EE_ X-MS-Office365-Filtering-Correlation-Id: 213eba21-d14d-45a5-3f60-08dbcf05914f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: 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Thanks, Laszlo for this patch. Reviewed-by: Nhi Pham Regards, Nhi On 10/17/2023 5:05 PM, Laszlo Ersek via groups.io wrote: > Nhi says that reading LINK_CONTROL_LINK_STATUS_REG is redundant; its only > use was debugging (before commit 380b4b40c60d). Thus, we can go farther > than commit 2e27c62ef000, and remove the MmioRead32() call altogether. >=20 > Build-tested with "Jade.dsc". >=20 > Cc: Chuong Tran > Cc: Leif Lindholm > Cc: Nhi Pham > Cc: Rebecca Cran > Suggested-by: Nhi Pham > Signed-off-by: Laszlo Ersek > --- > Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c | 3 --- > 1 file changed, 3 deletions(-) >=20 > diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c= b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c > index fa00c1e36999..dea2e6406dfd 100644 > --- a/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c > +++ b/Silicon/Ampere/AmpereAltraPkg/Library/Ac01PcieLib/PcieCore.c > @@ -1744,7 +1744,6 @@ Ac01PcieCoreUpdateLink ( > ) > { > AC01_PCIE_CONTROLLER *Pcie; > - PHYSICAL_ADDRESS CfgBase; > UINT8 PcieIndex; > UINT32 Index; > =20 > @@ -1761,12 +1760,10 @@ Ac01PcieCoreUpdateLink ( > // Loop for all controllers > for (PcieIndex =3D 0; PcieIndex < RootComplex->MaxPcieController; Pci= eIndex++) { > Pcie =3D &RootComplex->Pcie[PcieIndex]; > - CfgBase =3D RootComplex->MmcfgBase + (RootComplex->Pcie[PcieIndex].D= evNum << DEV_SHIFT); > =20 > if (Pcie->Active && !Pcie->LinkUp) { > if (PcieLinkUpCheck (Pcie)) { > Pcie->LinkUp =3D TRUE; > - (VOID)MmioRead32 (CfgBase + PCIE_CAPABILITY_BASE + LINK_CONTROL_= LINK_STATUS_REG); > =20 > // Doing link checking and recovery if needed > Ac01PcieCoreQoSLinkCheckRecovery (RootComplex, PcieIndex); >=20 >=20 >=20 >=20 >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109673): https://edk2.groups.io/g/devel/message/109673 Mute This Topic: https://groups.io/mt/102014532/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-