From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web11.428.1649264645457619554 for ; Wed, 06 Apr 2022 10:04:06 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=VckGoM8t; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: ted.kuo@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649264645; x=1680800645; h=from:to:cc:subject:date:message-id; bh=Kk1kClY9WGU/BeEDa7JOK1FQ6l01n+972DmtrqNjpJ8=; b=VckGoM8tgzDfKGcKgOI51yd2bVTEkG1IazX3KMYDSeaf4+VScrS3xhCS kuBTlw6baOEiOc4zVrsviHYF+kUh4n16KD1fPX4LP3hZQhhguIQk57g2k b6heS5T90q040BMdz2yEoRdD4Bsryk7kX4gwO/SUXe9HSzWN4e3pXMo3Q Lgs/YKkeF/CgLyPik6DjE64S7Hxh1MczdCy7WUBw/inIyzhYoW1j6Zs4X SSADlniofhLbH+i3/vM6h4U0RJdmow0M4BS3XTmWqpMLdQJp8qhx/IWcy lu+o2BchwrQtuA2cPYBfyrlGzrc5LuV44WFJ9TKUEPBDHzV2+7qX4tDuK g==; X-IronPort-AV: E=McAfee;i="6200,9189,10309"; a="347548628" X-IronPort-AV: E=Sophos;i="5.90,240,1643702400"; d="scan'208";a="347548628" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Apr 2022 10:03:00 -0700 X-IronPort-AV: E=Sophos;i="5.90,240,1643702400"; d="scan'208";a="642137786" Received: from tedkuo1-win10.gar.corp.intel.com ([10.5.215.13]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Apr 2022 10:02:59 -0700 From: "Kuo, Ted" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Star Zeng , Ashraf Ali S Subject: [edk2-devel][PATCH v3 5/8] IntelFsp2Pkg: SecFspSecPlatformLibNull support for X64 Date: Thu, 7 Apr 2022 01:02:36 +0800 Message-Id: X-Mailer: git-send-email 2.16.2.windows.1 In-Reply-To: References: In-Reply-To: References: REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 1.Added SecFspSecPlatformLibNull support for X64. 2.Added X64 support to IntelFsp2Pkg.dsc. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ashraf Ali S Signed-off-by: Ted Kuo --- IntelFsp2Pkg/IntelFsp2Pkg.dsc | 2 +- .../SecFspSecPlatformLibNull.inf | 6 +++- .../SecFspSecPlatformLibNull/X64/Long64.nasm | 31 +++++++++++++++++ .../SecFspSecPlatformLibNull/X64/SecCarInit.nasm | 40 ++++++++++++++++++++++ 4 files changed, 77 insertions(+), 2 deletions(-) create mode 100644 IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/Long64.nasm create mode 100644 IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/SecCarInit.nasm diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc index c1414f7e75..1284aa042c 100644 --- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc @@ -12,7 +12,7 @@ PLATFORM_VERSION = 0.1 DSC_SPECIFICATION = 0x00010005 OUTPUT_DIRECTORY = Build/IntelFsp2Pkg - SUPPORTED_ARCHITECTURES = IA32 + SUPPORTED_ARCHITECTURES = IA32|X64 BUILD_TARGETS = DEBUG|RELEASE|NOOPT SKUID_IDENTIFIER = DEFAULT diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf index 42e7d83c32..ef859d5ea5 100644 --- a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf +++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf @@ -23,7 +23,7 @@ # # The following information is for reference only and not required by the build tools. # -# VALID_ARCHITECTURES = IA32 +# VALID_ARCHITECTURES = IA32 X64 # ################################################################################ @@ -39,6 +39,10 @@ Ia32/Flat32.nasm Ia32/SecCarInit.nasm +[Sources.X64] + X64/Long64.nasm + X64/SecCarInit.nasm + ################################################################################ # # Package Dependency Section - list of Package files that are required for diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/Long64.nasm b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/Long64.nasm new file mode 100644 index 0000000000..836257f962 --- /dev/null +++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/Long64.nasm @@ -0,0 +1,31 @@ +;; @file +; This is the code that performs early platform initialization. +; It consumes the reset vector, configures the stack. +; +; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent +;; + +; +; Define assembler characteristics +; + +extern ASM_PFX(TempRamInitApi) + +SECTION .text + +%macro RET_RSI 0 + + movd rsi, mm7 ; restore RSI from MM7 + jmp rsi + +%endmacro + +; +; Perform early platform initialization +; +global ASM_PFX(SecPlatformInit) +ASM_PFX(SecPlatformInit): + + RET_RSI + diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/SecCarInit.nasm b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/SecCarInit.nasm new file mode 100644 index 0000000000..e64c77ed18 --- /dev/null +++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/X64/SecCarInit.nasm @@ -0,0 +1,40 @@ +;; @file +; SEC CAR function +; +; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent +;; + +; +; Define assembler characteristics +; + +%macro RET_RSI 0 + + movd rsi, mm7 ; move ReturnAddress from MM7 to RSI + jmp rsi + +%endmacro + +SECTION .text + +;----------------------------------------------------------------------------- +; +; Section: SecCarInit +; +; Description: This function initializes the Cache for Data, Stack, and Code +; +;----------------------------------------------------------------------------- +global ASM_PFX(SecCarInit) +ASM_PFX(SecCarInit): + + ; + ; Set up CAR + ; + + xor rax, rax + +SecCarInitExit: + + RET_RSI + -- 2.16.2.windows.1