From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 197ADAC12E3 for ; Thu, 11 Jan 2024 08:48:12 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=N0Ari2dwXTVsNxN5EazOyTv2PJogyYNLQ3VV2nQhoZQ=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1704962891; v=1; b=vtxKNUJuTwFIvDfpbXugU2fLg8WCxH4Nenn9kGYOGZ+BdjAy1gpn0br9cnaCKHFBNuHmp6L8 qsGHJ7zx889HJo8BlQNnQjA/r5lEqiowWvpRlXxOFP/h+UezpzmxWbafPh2i/CqFgHv2RvYVtpT SvGYa8RuTbdvza9H3C5wHtZ0= X-Received: by 127.0.0.2 with SMTP id wfeOYY7687511xzTAUdoiBay; Thu, 11 Jan 2024 00:48:11 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web11.7450.1704962890873598597 for ; Thu, 11 Jan 2024 00:48:11 -0800 X-Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-517-7H_bzbl9PjK55hqcs2tAbQ-1; Thu, 11 Jan 2024 03:48:06 -0500 X-MC-Unique: 7H_bzbl9PjK55hqcs2tAbQ-1 X-Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 1ADD9380406A; Thu, 11 Jan 2024 08:48:06 +0000 (UTC) X-Received: from [10.39.193.20] (unknown [10.39.193.20]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4F81B492BC6; Thu, 11 Jan 2024 08:48:05 +0000 (UTC) Message-ID: Date: Thu, 11 Jan 2024 09:48:04 +0100 MIME-Version: 1.0 Subject: Re: [edk2-devel] [Patch V2] UefiCpuPkg:Limit PhysicalAddressBits in speicial case To: Dun Tan , devel@edk2.groups.io Cc: Ray Ni , Rahul Kumar , Gerd Hoffmann References: <20240111021118.1453-1-dun.tan@intel.com> From: "Laszlo Ersek" In-Reply-To: <20240111021118.1453-1-dun.tan@intel.com> X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Y6XoIdk3Co4n6Jy0JWwm43Cax7686176AA= Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=vtxKNUJu; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On 1/11/24 03:11, Dun Tan wrote: > When creating smm page table, limit maximum > supported physical address bits returned by > CalculateMaximumSupportAddress() to 47 if > 5-Level Paging is disabled. > When 5-Level Paging is disabled and the > PhysicalAddressBits retrived from CPU HOB or > CpuId is bigger than 47, and since virtual > addresses are sign-extended, only [0, 2^47-1] > range in 52-bit physical address is mapped > in page table. >=20 > Signed-off-by: Dun Tan > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Rahul Kumar > Cc: Gerd Hoffmann > --- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) I'll let Gerd review this (thanks!), I just want to point out a typo in the subject: "speicial" should be "special". Thanks Laszlo >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCp= uDxeSmm/X64/PageTbl.c > index ddd9be66b5..35c282a771 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > @@ -137,11 +137,13 @@ GetSubEntriesNum ( > /** > Calculate the maximum support address. > =20 > + @param[in] Is5LevelPagingNeeded If 5-level paging enabling is neede= d. > + > @return the maximum support address. > **/ > UINT8 > CalculateMaximumSupportAddress ( > - VOID > + BOOLEAN Is5LevelPagingNeeded > ) > { > UINT32 RegEax; > @@ -164,6 +166,15 @@ CalculateMaximumSupportAddress ( > } > } > =20 > + // > + // Only [0, 2^47 -1] in 52-bit physical addresses is mapped in page ta= ble > + // when 5-Level Paging is disabled. > + // > + ASSERT (PhysicalAddressBits <=3D 52); > + if (!Is5LevelPagingNeeded && (PhysicalAddressBits > 47)) { > + PhysicalAddressBits =3D 47; > + } > + > return PhysicalAddressBits; > } > =20 > @@ -197,7 +208,7 @@ SmmInitPageTable ( > mCpuSmmRestrictedMemoryAccess =3D PcdGetBool (PcdCpuSmmRestrictedMemor= yAccess); > m1GPageTableSupport =3D Is1GPageSupport (); > m5LevelPagingNeeded =3D Is5LevelPagingNeeded (); > - mPhysicalAddressBits =3D CalculateMaximumSupportAddress (); > + mPhysicalAddressBits =3D CalculateMaximumSupportAddress (m5Le= velPagingNeeded); > PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1)= ; > if (m5LevelPagingNeeded) { > mPagingMode =3D m1GPageTableSupport ? Paging5Level1GB : Paging5Level= ; -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113596): https://edk2.groups.io/g/devel/message/113596 Mute This Topic: https://groups.io/mt/103655312/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/12367111/7686176/19134562= 12/xyzzy [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-