From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.5422.1655976963017199785 for ; Thu, 23 Jun 2022 02:36:03 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pierre.gondois@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CDCBA12FC; Thu, 23 Jun 2022 02:36:02 -0700 (PDT) Received: from [10.57.39.116] (unknown [10.57.39.116]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 34E343F792; Thu, 23 Jun 2022 02:36:01 -0700 (PDT) Message-ID: Date: Thu, 23 Jun 2022 11:35:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [edk2-devel] [edk2-platforms][PATCH V3 1/9] Platform/Sgi: Update ACPI version to v6.4 To: devel@edk2.groups.io, pranav.madhu@arm.com Cc: Ard Biesheuvel , Sami Mujawar References: <20220609165648.3012699-1-pranav.madhu@arm.com> <20220609165648.3012699-2-pranav.madhu@arm.com> From: "PierreGondois" In-Reply-To: <20220609165648.3012699-2-pranav.madhu@arm.com> Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hello Pranav, On 6/9/22 18:56, Pranav Madhu via groups.io wrote: > Update the common ACPI tables used by all the Neoverse Reference Design > platforms to ACPI version v6.4. Significant changes introduced are > update API/macro definitions to incorporate with the extra fields > introduced in ACPI 6.4, such as SPE overflow interrupt number field to > GICC structure of MADT table and adding cache ID field to the cache > structure of PPTT table. >=20 > Signed-off-by: Pranav Madhu > --- > Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 227 ++++++++++---------= - > Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc | 30 +-- > Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc | 38 ++-- > Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc | 69 +++--- > Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc | 26 +-- > Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc | 29 ++- > 6 files changed, 227 insertions(+), 192 deletions(-) >=20 > diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM= /SgiPkg/Include/SgiAcpiHeader.h > index e9b6923cb035..8393897cd4e8 100644 > --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h > +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2018-2021, ARM Limited. All rights reserved. > +* Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -41,134 +41,143 @@ > #define OSC_CAP_PLAT_COORDINATED_LPI (1U << 7) > #define OSC_CAP_OS_INITIATED_LPI (1U << 8) > =20 > +// Cache type identifier used to calculate unique cache ID for PPTT > +typedef enum { > + L1DataCache, > + L1InstructionCache, > + L2Cache, > + L3Cache, > +} RD_PPTT_CACHE; > + Would it make sense to also have one unique macro to generate the cache id ? This would avoid to have multiple definitions for each platform and sometimes multiple definitions for the same platform (e.g. RDE1EDGE_PPTT_[CLUSTER|CORE]_CACHE_ID()): /** Helper macro to calculate a unique cache ID. @param [in] PackageId Package instance number. -1 to ignore. @param [in] ClusterId Cluster instance number. -1 to ignore. @param [in] CoreId Core instance number. -1 to ignore. @param [in] CacheType Cache type. -1 to ignore. **/ #define PPTT_CACHE_ID(PackageId, ClusterId, CoreId, CacheType) \ (((PackageId) !=3D -1) ? ((PackageId) << 28) : (0xF << 28)) | \ (((ClusterId) !=3D -1) ? ((ClusterId) << 20) : (0xFF << 20)) | \ (((CoreId) !=3D -1) ? ((CoreId) << 8) : (0x3FF << 8)) | \ (((CacheType) !=3D -1) ? (CacheType) : 0xF) Other than this, Reviewed-by: Pierre Gondois > #pragma pack(1) > // PPTT processor core structure > typedef struct { > - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core; > + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Core; > UINT32 ResourceOffset[2]; > - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE DCache; > - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE ICache; > - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache; > + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE DCache; > + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE ICache; > + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE L2Cache; > } RD_PPTT_CORE; > =20 > // PPTT processor cluster structure > typedef struct { > - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; > + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Cluster; > UINT32 ResourceOffset; > - EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L3Cache; > + EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE L3Cache; > RD_PPTT_CORE Core[CORE_COUNT]; > } RD_PPTT_CLUSTER; > =20 > // PPTT processor cluster structure without cache > typedef struct { > - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; > + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Cluster; > RD_PPTT_CORE Core[CORE_COUNT]; > } RD_PPTT_MINIMAL_CLUSTER; > =20 > // PPTT processor package structure > typedef struct { > - EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; > + EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR Package; > RD_PPTT_MINIMAL_CLUSTER Cluster[CLUSTER_COUNT]; > } RD_PPTT_PACKAGE; > #pragma pack () > =20 > // > // PPTT processor structure flags for different SoC components as def= ined in > -// ACPI 6.3 specification > +// ACPI 6.4 specification > // > =20 > // Processor structure flags for SoC package > #define PPTT_PROCESSOR_PACKAGE_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ > - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ > + EFI_ACPI_6_4_PPTT_PACKAGE_PHYSICAL, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ > + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ > } > =20 > // Processor structure flags for cluster > #define PPTT_PROCESSOR_CLUSTER_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ > - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ > + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ > + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ > } > =20 > // Processor structure flags for cluster with multi-thread core > #define PPTT_PROCESSOR_CLUSTER_THREADED_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ > - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ > + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ > + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ > } > =20 > // Processor structure flags for single-thread core > #define PPTT_PROCESSOR_CORE_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ > + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > + EFI_ACPI_6_4_PPTT_NODE_IS_LEAF = \ > } > =20 > // Processor structure flags for multi-thread core > #define PPTT_PROCESSOR_CORE_THREADED_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > - EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ > - EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ > + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD, = \ > + EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF, = \ > + EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL = \ > } > =20 > // Processor structure flags for CPU thread > #define PPTT_PROCESSOR_THREAD_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ > - EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, = \ > - EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ > + EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID, = \ > + EFI_ACPI_6_4_PPTT_PROCESSOR_IS_THREAD, = \ > + EFI_ACPI_6_4_PPTT_NODE_IS_LEAF = \ > } > =20 > -// PPTT cache structure flags as defined in ACPI 6.3 Specification > +// PPTT cache structure flags as defined in ACPI 6.4 Specification > #define PPTT_CACHE_STRUCTURE_FLAGS = \ > { = \ > - EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID, = \ > - EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID, = \ > - EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID, = \ > - EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID, = \ > - EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID, = \ > - EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID, = \ > - EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID = \ > + EFI_ACPI_6_4_PPTT_CACHE_SIZE_VALID, = \ > + EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_VALID, = \ > + EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_VALID, = \ > + EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_VALID, = \ > + EFI_ACPI_6_4_PPTT_CACHE_TYPE_VALID, = \ > + EFI_ACPI_6_4_PPTT_WRITE_POLICY_VALID, = \ > + EFI_ACPI_6_4_PPTT_LINE_SIZE_VALID, = \ > + EFI_ACPI_6_4_PPTT_CACHE_ID_VALID = \ > } > =20 > // PPTT cache attributes for data cache > #define PPTT_DATA_CACHE_ATTR = \ > { = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ > } > =20 > // PPTT cache attributes for instruction cache > #define PPTT_INST_CACHE_ATTR = \ > { = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ > } > =20 > // PPTT cache attributes for unified cache > #define PPTT_UNIFIED_CACHE_ATTR = \ > { = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ > - EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ > + EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ > } > =20 > // A macro to initialise the common header part of EFI ACPI tables as= defined by > @@ -185,12 +194,13 @@ typedef struct { > EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ > } > =20 > -// EFI_ACPI_6_2_GIC_STRUCTURE > -#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Fla= gs, \ > - PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) = \ > +// EFI_ACPI_6_4_GIC_STRUCTURE > +#define EFI_ACPI_6_4_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Fla= gs, \ > + PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency, = \ > + SpeOverflowInterrupt) = \ > { = \ > - EFI_ACPI_6_2_GIC, /* Type */ = \ > - sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ = \ > + EFI_ACPI_6_4_GIC, /* Type */ = \ > + sizeof (EFI_ACPI_6_4_GIC_STRUCTURE), /* Length */ = \ > EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ > GicId, /* CPUInterfaceNumber */ = \ > AcpiCpuUid, /* AcpiProcessorUid */ = \ > @@ -205,19 +215,16 @@ typedef struct { > GicRBase, /* GICRBaseAddress */ = \ > Mpidr, /* MPIDR */ = \ > Efficiency, /* ProcessorPowerEfficiency= Class */ \ > - { = \ > - EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ = \ > - EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ = \ > - EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ = \ > - } = \ > + EFI_ACPI_RESERVED_BYTE, /* Reserved2 */ = \ > + SpeOverflowInterrupt /* SpeOverflowInterrupt */ = \ > } > =20 > -// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE > -#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, = \ > +// EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE > +#define EFI_ACPI_6_4_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, = \ > GicDistVector, GicVersion) = \ > { = \ > - EFI_ACPI_6_2_GICD, /* Type */ = \ > - sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), = \ > + EFI_ACPI_6_4_GICD, /* Type */ = \ > + sizeof (EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE), = \ > EFI_ACPI_RESERVED_WORD, /* Reserved1 */ = \ > GicDistHwId, /* GicId */ = \ > GicDistBase, /* PhysicalBaseAddress */ = \ > @@ -230,43 +237,43 @@ typedef struct { > } = \ > } > =20 > -// EFI_ACPI_6_2_GICR_STRUCTURE > -#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDisc= Length) \ > +// EFI_ACPI_6_4_GICR_STRUCTURE > +#define EFI_ACPI_6_4_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDisc= Length) \ > { = \ > - EFI_ACPI_6_2_GICR, /* Type */ = \ > - sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ = \ > + EFI_ACPI_6_4_GICR, /* Type */ = \ > + sizeof (EFI_ACPI_6_4_GICR_STRUCTURE), /* Length */ = \ > EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ > RedisRegionAddr, /* DiscoveryRangeBaseAddres= s */ \ > RedisDiscLength /* DiscoveryRangeLength */ = \ > } > =20 > -// EFI_ACPI_6_2_GIC_ITS_STRUCTURE > -#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) = \ > +// EFI_ACPI_6_4_GIC_ITS_STRUCTURE > +#define EFI_ACPI_6_4_GIC_ITS_INIT(GicItsId, GicItsBase) = \ > { = \ > - EFI_ACPI_6_2_GIC_ITS, /* Type */ = \ > - sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), = \ > + EFI_ACPI_6_4_GIC_ITS, /* Type */ = \ > + sizeof (EFI_ACPI_6_4_GIC_ITS_STRUCTURE), = \ > EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ > GicItsId, /* GicItsId */ = \ > GicItsBase, /* PhysicalBaseAddress */ = \ > EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ = \ > } > =20 > -// EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE > -#define EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT( = \ > +// EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE > +#define EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE_INIT( = \ > ProximityDomain, Base, Length, Flags) = \ > { = \ > - 1, sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE), ProximityDomai= n, \ > + 1, sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE), ProximityDomai= n, \ > EFI_ACPI_RESERVED_WORD, (Base) & 0xffffffff, = \ > (Base) >> 32, (Length) & 0xffffffff, = \ > (Length) >> 32, EFI_ACPI_RESERVED_DWORD, Flags, = \ > EFI_ACPI_RESERVED_QWORD = \ > } > =20 > -// EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE > -#define EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT( = \ > +// EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE > +#define EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE_INIT( = \ > ProximityDomain, ACPIProcessorUID, Flags, ClockDomain) = \ > { = \ > - 3, sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE), ProximityDomain,= \ > + 3, sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE), ProximityDomain,= \ > ACPIProcessorUID, Flags, ClockDomain = \ > } > =20 > @@ -274,16 +281,16 @@ typedef struct { > // HMAT related structures > // > // Memory Proximity Domain Attributes Structure > -// Refer Section 5.2.27.3 in ACPI Specification, Version 6.3 > -#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES= _INIT( \ > +// Refer Section 5.2.27.3 in ACPI Specification, Version 6.4 > +#define EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES= _INIT( \ > Flags, ProximityDomainForAttachedIntiator, ProximityDomainForMemo= ry) \ > { = \ > - EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES, = \ > + EFI_ACPI_6_4_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES, = \ > { = \ > EFI_ACPI_RESERVED_BYTE, = \ > EFI_ACPI_RESERVED_BYTE = \ > }, = \ > - sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIB= UTES), \ > + sizeof (EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIB= UTES), \ > { = \ > Flags, = \ > 0 = \ > @@ -319,28 +326,27 @@ typedef struct { > } > =20 > // System Locality Latency and Bandwidth Information Structure > -// Refer Section 5.2.27.4 in ACPI Specification, Version 6.3 > -#define EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWI= DTH_INFO_INIT( \ > - Flags, DataType, NumInitiatorProximityDomains, = \ > +// Refer Section 5.2.27.4 in ACPI Specification, Version 6.4 > +#define EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWI= DTH_INFO_INIT( \ > + Flags, DataType, MinTransferSize, NumInitiatorProximityDomains, = \ > NumTargetProximityDomains, EntryBaseUnit) = \ > { = \ > - EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO,= \ > + EFI_ACPI_6_4_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO,= \ > { = \ > EFI_ACPI_RESERVED_BYTE, = \ > EFI_ACPI_RESERVED_BYTE = \ > }, = \ > - sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BA= NDWIDTH_INFO) + \ > + sizeof (EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BA= NDWIDTH_INFO) + \ > (4 * NumInitiatorProximityDomains) + (4 * NumTargetProximityDom= ains) + \ > (2 * NumInitiatorProximityDomains * NumTargetProximityDomains),= \ > { = \ > Flags, = \ > + 0, = \ > 0 = \ > }, = \ > + MinTransferSize, = \ > DataType, = \ > - { = \ > - EFI_ACPI_RESERVED_BYTE, = \ > - EFI_ACPI_RESERVED_BYTE = \ > - }, = \ > + EFI_ACPI_RESERVED_BYTE, = \ > NumInitiatorProximityDomains, = \ > NumTargetProximityDomains, = \ > { = \ > @@ -353,17 +359,17 @@ typedef struct { > } > =20 > // Memory Side Cache Information Structure > -// Refer Section 5.2.27.5 in ACPI Specification, Version 6.3 > -#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( = \ > +// Refer Section 5.2.27.5 in ACPI Specification, Version 6.4 > +#define EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( = \ > MemoryProximityDomain, MemorySideCacheSize, CacheAttributes, = \ > NumberOfSmbiosHandles) = \ > { = \ > - EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO, = \ > + EFI_ACPI_6_4_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO, = \ > { = \ > EFI_ACPI_RESERVED_BYTE, = \ > EFI_ACPI_RESERVED_BYTE = \ > }, = \ > - sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + = \ > + sizeof (EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + = \ > (NumberOfSmbiosHandles * 2), = \ > MemoryProximityDomain, = \ > { = \ > @@ -382,7 +388,7 @@ typedef struct { > } > =20 > /** A macro to initialise the Memory Side Cache Information Attribute= s. > - See Table 5.124 in ACPI Specification, Version 6.3 > + See Table 5.130 in ACPI Specification, Version 6.4 > =20 > @param [in] TotalCacheLevels Total Cache Levels for this Memory = Proximity. > @param [in] CacheLevel Cache Level described in this struc= ture. > @@ -397,11 +403,11 @@ typedef struct { > TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, Cach= eLineSize \ > } > =20 > -// EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR > -#define EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT(Length, Flag, Paren= t, \ > +// EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR > +#define EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_INIT(Length, Flag, Paren= t, \ > ACPIProcessorID, NumberOfPrivateResource) = \ > { = \ > - EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type 0 */ = \ > + EFI_ACPI_6_4_PPTT_TYPE_PROCESSOR, /* Type 0 */ = \ > Length, /* Length */ = \ > { = \ > EFI_ACPI_RESERVED_BYTE, = \ > @@ -413,12 +419,12 @@ typedef struct { > NumberOfPrivateResource /* Resource cou= nt */ \ > } > =20 > -// EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE > -#define EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT(Flag, NextLevelCache, S= ize, \ > - NoOfSets, Associativity, Attributes, LineSize) = \ > +// EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE > +#define EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_INIT(Flag, NextLevelCache, S= ize, \ > + NoOfSets, Associativity, Attributes, LineSize, CacheId) = \ > { = \ > - EFI_ACPI_6_3_PPTT_TYPE_CACHE, /* Type 1 */ = \ > - sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), /* Length */ = \ > + EFI_ACPI_6_4_PPTT_TYPE_CACHE, /* Type 1 */ = \ > + sizeof (EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE), /* Length */ = \ > { = \ > EFI_ACPI_RESERVED_BYTE, = \ > EFI_ACPI_RESERVED_BYTE, = \ > @@ -429,7 +435,8 @@ typedef struct { > NoOfSets, /* Num of sets = */ \ > Associativity, /* Num of ways = */ \ > Attributes, /* Cache attrib= utes */ \ > - LineSize /* Line size in = bytes */ \ > + LineSize, /* Line size in = bytes */ \ > + CacheId /* Cache id */ = \ > } > =20 > /** Helper macro for CPPC _CPC object initialization. Use of this mac= ro is > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc b/Platform/ARM/Sg= iPkg/AcpiTables/Dbg2.aslc > index 279f847cce4c..b85e7272fd82 100644 > --- a/Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc > +++ b/Platform/ARM/SgiPkg/AcpiTables/Dbg2.aslc > @@ -1,16 +1,22 @@ > /** @file > -* Debug Port Table 2 (DBG2) > -* > -* Copyright (c) 2018, ARM Limited. All rights reserved. > -* > -* SPDX-License-Identifier: BSD-2-Clause-Patent > -* > + Debug Port Table 2 (DBPG2) > + > + Debug Port Table 2 is used in platform firmware to describe the debu= g > + ports available on the system to the OS. The reference design platfo= rms use > + the non-secure UART port in the compute subsystem as the debug port. > + > + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - https://docs.microsoft.com/en-us/windows-hardware/drivers/bringu= p > + /acpi-debug-port-table > **/ > =20 > -#include "SgiAcpiHeader.h" > -#include > -#include > #include > +#include > +#include "SgiAcpiHeader.h" > =20 > #define SGI_DBG2_NUM_DEBUG_PORTS 1 > #define SGI_DBG2_NUM_GAS 1 > @@ -21,7 +27,7 @@ > =20 > typedef struct { > EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device; > - EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; > + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; > UINT32 AddressSize; > UINT8 NameSpaceString[SGI_D= BG2_NS_STR_LENGTH]; > } DBG2_DEBUG_DEVICE_INFORMATION; > @@ -48,7 +54,7 @@ typedef struct { > OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /= * UINT16 BaseAddressRegister Offset */ \ > OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /= * UINT16 AddressSize Offset */ \ > }, = \ > - ARM_GAS32 (UartBase), /* EFI_ACPI_6_2_GEN= ERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \ > + ARM_GAS32 (UartBase), /* EFI_ACPI_6_4_GEN= ERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \ > UartAddrLen, /* UINT32 Address= Size */ \ > UartNameStr /* UINT8 NameSpa= ceString[MAX_DBG2_NAME_LEN] */ \ > } > @@ -56,7 +62,7 @@ typedef struct { > STATIC DBG2_TABLE Dbg2 =3D { > { > ARM_ACPI_HEADER ( > - EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE, > + EFI_ACPI_6_4_DEBUG_PORT_2_TABLE_SIGNATURE, > DBG2_TABLE, > EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION > ), > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc b/Platform/ARM/Sg= iPkg/AcpiTables/Fadt.aslc > index 9472aff2e054..5ad448d9c9d2 100644 > --- a/Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc > +++ b/Platform/ARM/SgiPkg/AcpiTables/Fadt.aslc > @@ -1,26 +1,32 @@ > /** @file > -* Fixed ACPI Description Table (FADT) > -* > -* Copyright (c) 2018, ARM Limited. All rights reserved. > -* > -* SPDX-License-Identifier: BSD-2-Clause-Patent > -* > + Fixed ACPI Description Table (FADT) > + > + FADT defines various fixed hardware ACPI information vital to an ACP= I > + compatible OS. FADT also has a pointer to the DSDT that contains the > + Differentiated Definition Block, which in turn provides variable inf= ormation > + to an ACPI-compatible OS concerning the base system design. > + > + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - ACPI 6.4, Chapter 5, Section 5.2.9, Fixed ACPI Description Table > **/ > =20 > -#include "SgiAcpiHeader.h" > #include > -#include > +#include "SgiAcpiHeader.h" > =20 > -STATIC EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { > +STATIC EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { > ARM_ACPI_HEADER ( > - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, > - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE, > - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION > + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, > + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE, > + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION > ), > 0, = // UINT32 FirmwareCtrl > 0, = // UINT32 Dsdt > EFI_ACPI_RESERVED_BYTE, = // UINT8 Reserved0 > - EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER, = // UINT8 PreferredPmProfile > + EFI_ACPI_6_4_PM_PROFILE_ENTERPRISE_SERVER, = // UINT8 PreferredPmProfile > 0, = // UINT16 SciInt > 0, = // UINT32 SmiCmd > 0, = // UINT8 AcpiEnable > @@ -54,11 +60,11 @@ STATIC EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fa= dt =3D { > 0, = // UINT8 Century > 0, = // UINT16 IaPcBootArch > 0, = // UINT8 Reserved1 > - EFI_ACPI_6_2_HW_REDUCED_ACPI | EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABL= E, // UINT32 Flags > + EFI_ACPI_6_4_HW_REDUCED_ACPI | EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABL= E, // UINT32 Flags > NULL_GAS, = // GAS ResetReg > 0, = // UINT8 ResetValue > - EFI_ACPI_6_2_ARM_PSCI_COMPLIANT, = // UINT16 ArmBootArchFlags > - EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, = // UINT8 MinorRevision > + EFI_ACPI_6_4_ARM_PSCI_COMPLIANT, = // UINT16 ArmBootArchFlags > + EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, = // UINT8 MinorRevision > 0, = // UINT64 XFirmwareCtrl > 0, = // UINT64 XDsdt > NULL_GAS, = // GAS XPm1aEvtBlk > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc b/Platform/ARM/Sg= iPkg/AcpiTables/Gtdt.aslc > index b53cbb228f92..70765f87e537 100644 > --- a/Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc > +++ b/Platform/ARM/SgiPkg/AcpiTables/Gtdt.aslc > @@ -1,16 +1,21 @@ > /** @file > -* Generic Timer Description Table (GTDT) > -* > -* Copyright (c) 2018, ARM Limited. All rights reserved. > -* > -* SPDX-License-Identifier: BSD-2-Clause-Patent > -* > + Generic Timer Description Table (GTDT) > + > + GTDT provides OSPM with information about a system=E2=80=99s Generic= Timers > + configuration. This table lists the watchdog and generic timer insta= nces > + available on the reference design platforms. > + > + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - ACPI 6.4, Chapter 5, Section 5.2.24, Generic Timer Description T= able > **/ > =20 > -#include "SgiAcpiHeader.h" > #include > #include > -#include > +#include "SgiAcpiHeader.h" > =20 > #define SGI_PLATFORM_WATCHDOG_COUNT 2 > #define SGI_PLATFORM_TIMER_COUNT (SGI_PLATFORM_WATCHDOG_COUN= T + 1) > @@ -18,7 +23,7 @@ > =20 > #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF > #define GTDT_GLOBAL_FLAGS 0 > -#define GTDT_GTIMER_FLAGS EFI_ACPI_6_2_GTDT_TIMER_FLAG= _TIMER_INTERRUPT_POLARITY > +#define GTDT_GTIMER_FLAGS EFI_ACPI_6_4_GTDT_TIMER_FLAG= _TIMER_INTERRUPT_POLARITY > =20 > #define SGI_GT_BLOCK_CTL_BASE 0x2A810000 > #define SGI_GT_BLOCK_FRAME1_CTL_BASE 0x2A820000 > @@ -30,18 +35,18 @@ > #define SGI_GT_BLOCK_FRAME0_GSIV FixedPcdGet32 (PcdGtFrame0G= siv) > =20 > #define SGI_GTX_TIMER_FLAGS 0 > -#define GTX_TIMER_SECURE EFI_ACPI_6_2_GTDT_GT_BLOCK_C= OMMON_FLAG_SECURE_TIMER > +#define GTX_TIMER_SECURE EFI_ACPI_6_4_GTDT_GT_BLOCK_C= OMMON_FLAG_SECURE_TIMER > #define GTX_TIMER_NON_SECURE 0 > -#define GTX_TIMER_SAVE_CONTEXT EFI_ACPI_6_2_GTDT_GT_BLOCK_C= OMMON_FLAG_ALWAYS_ON_CAPABILITY > +#define GTX_TIMER_SAVE_CONTEXT EFI_ACPI_6_4_GTDT_GT_BLOCK_C= OMMON_FLAG_ALWAYS_ON_CAPABILITY > #define SGI_GTX_COMMON_FLAGS_S (GTX_TIMER_SAVE_CONTEXT | G= TX_TIMER_SECURE) > #define SGI_GTX_COMMON_FLAGS_NS (GTX_TIMER_SAVE_CONTEXT | G= TX_TIMER_NON_SECURE) > =20 > -#define EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \ > +#define EFI_ACPI_6_4_ARM_GENERIC_WATCHDOG_STRUCTURE_INIT( \ > RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \ > WatchdogTimerGSIV, WatchdogTimerFlags) \ > { \ > - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG, \ > - sizeof (EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \ > + EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG, \ > + sizeof (EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE), \ > EFI_ACPI_RESERVED_WORD, \ > RefreshFramePhysicalAddress, \ > ControlFramePhysicalAddress, \ > @@ -52,20 +57,20 @@ > #pragma pack (1) > =20 > typedef struct { > - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > - EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE GtBlock; > - EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE Frames[SGI_TIMER_= FRAMES_COUNT]; > - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Watchdogs[SGI_PLA= TFORM_WATCHDOG_COUNT]; > -} EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES; > + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; > + EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE GtBlock; > + EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE Frames[SGI_TIMER_= FRAMES_COUNT]; > + EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE Watchdogs[SGI_PLA= TFORM_WATCHDOG_COUNT]; > +} EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLES; > =20 > #pragma pack () > =20 > -STATIC EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt =3D { > +STATIC EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt =3D { > { > ARM_ACPI_HEADER ( > - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLES, > - EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, > + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLES, > + EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION > ), > SYSTEM_TIMER_BASE_ADDRESS, // UINT64 Physical= Address > 0, // UINT32 Reserved > @@ -79,17 +84,19 @@ STATIC EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE= S Gtdt =3D { > GTDT_GTIMER_FLAGS, // UINT32 NonSecur= ePL2TimerFlags > 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadB= asePhysicalAddress > SGI_PLATFORM_TIMER_COUNT, // UINT32 Platform= TimerCount > - sizeof (EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 Pl= atfromTimerOffset > + sizeof (EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE), // UINT32 P= latfromTimerOffset > + 0, // UINT32 VirtualPL= 2TimerGSIV > + 0 // UINT32 VirtualPL= 2TimerFlags > }, > { > - EFI_ACPI_6_2_GTDT_GT_BLOCK, // UINT8 Typ= e > - sizeof (EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE) + // UINT16 Le= ngth > - sizeof (EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE) * > + EFI_ACPI_6_4_GTDT_GT_BLOCK, // UINT8 Typ= e > + sizeof (EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE) + // UINT16 Le= ngth > + sizeof (EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE) * > SGI_TIMER_FRAMES_COUNT, > EFI_ACPI_RESERVED_BYTE, // UINT8 Re= served > SGI_GT_BLOCK_CTL_BASE, // UINT64 C= ntCtlBase > SGI_TIMER_FRAMES_COUNT, // UINT32 G= TBlockTimerCount > - sizeof (EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE) // UINT32 GT= BlockTimerOffset > + sizeof (EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE) // UINT32 GT= BlockTimerOffset > }, > { > { > @@ -124,17 +131,17 @@ STATIC EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TAB= LES Gtdt =3D { > } > }, > { > - EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT ( > + EFI_ACPI_6_4_ARM_GENERIC_WATCHDOG_STRUCTURE_INIT ( > FixedPcdGet32 (PcdGenericWatchdogRefreshBase), > FixedPcdGet32 (PcdGenericWatchdogControlBase), > FixedPcdGet32 (PcdWdogWS0Gsiv), > 0 > ), > - EFI_ACPI_6_2_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT ( > + EFI_ACPI_6_4_ARM_GENERIC_WATCHDOG_STRUCTURE_INIT ( > FixedPcdGet32 (PcdGenericWatchdogRefreshBase), > FixedPcdGet32 (PcdGenericWatchdogControlBase), > FixedPcdGet32 (PcdWdogWS1Gsiv), > - EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER > + EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER > ) > } > }; > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc b/Platform/ARM/Sg= iPkg/AcpiTables/Mcfg.aslc > index 090297d9541a..96fb6281ea53 100644 > --- a/Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc > +++ b/Platform/ARM/SgiPkg/AcpiTables/Mcfg.aslc > @@ -1,22 +1,24 @@ > /** @file > -* Memory mapped configuration space base address description table (M= CFG) > -* > -* Copyright (c) 2018, ARM Ltd. All rights reserved. > -* > -* SPDX-License-Identifier: BSD-2-Clause-Patent > -* > + Memory mapped configuration space base address description table (MC= FG) > + > + The MCFG table provides the address of the PCI configuration space, = which > + is required by the OS to perform the PCIe bus enumeration. > + > + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - http://www.pcisig.com/home > **/ > =20 > -#include > #include > +#include > +#include > #include > #include "SgiAcpiHeader.h" > #include "SgiPlatform.h" > =20 > -#include > -#include > -#include > - > #pragma pack(1) > typedef struct > { > @@ -28,7 +30,7 @@ typedef struct > EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TAB= LE Mcfg =3D { > { > ARM_ACPI_HEADER ( > - EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_= ADDRESS_DESCRIPTION_TABLE_SIGNATURE, > + EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_= ADDRESS_DESCRIPTION_TABLE_SIGNATURE, > EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTI= ON_TABLE, > EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISIO= N > ), > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc b/Platform/ARM/Sg= iPkg/AcpiTables/Spcr.aslc > index 632144530076..6467fcdf4fd0 100644 > --- a/Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc > +++ b/Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc > @@ -1,20 +1,27 @@ > /** @file > -* Serial Port Console Redirection Table (SPCR) > -* > -* Copyright (c) 2018, ARM Limited. All rights reserved. > -* > -* SPDX-License-Identifier: BSD-2-Clause-Patent > -* > + Serial Port Console Redirection Table (SPCR) > + > + SPCR table provides information about the configuration and use of t= he serial > + port or non-legacy UART interface. This table list the non-secure UA= RT > + instance in the compute subsystem on the reference design platforms = as the > + available serial port. > + > + Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + @par Specification Reference: > + - https://docs.microsoft.com/en-us/windows-hardware/drivers/serpor= ts/ > + serial-port-console-redirection-table > **/ > =20 > -#include "SgiAcpiHeader.h" > -#include > -#include > #include > +#include > +#include "SgiAcpiHeader.h" > =20 > STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr =3D { > ARM_ACPI_HEADER ( > - EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, > + EFI_ACPI_6_4_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION > ), > @@ -26,7 +33,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE= Spcr =3D { > EFI_ACPI_RESERVED_BYTE, > EFI_ACPI_RESERVED_BYTE > }, > - // EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE BaseAddress; > + // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE BaseAddress; > ARM_GAS32 (FixedPcdGet64 (PcdSerialDbgRegisterBase)), > // UINT8 InterruptType; > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,