From: "Saloni Kasbekar" <saloni.kasbekar@intel.com>
To: devel@edk2.groups.io
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>,
Sai Chaganty <rangasai.v.chaganty@intel.com>,
Nate DeSimone <nathaniel.l.desimone@intel.com>,
Isaac Oram <isaac.w.oram@intel.com>,
Rosen Chuang <rosen.chuang@intel.com>
Subject: [PATCH 4/6] AlderlakeOpenBoardPkg: Add ACPI module
Date: Wed, 14 Jun 2023 12:17:26 -0700 [thread overview]
Message-ID: <e61b238a9c6c9263c76c2b5b5a63394182c1a055.1686770061.git.saloni.kasbekar@intel.com> (raw)
In-Reply-To: <cover.1686770061.git.saloni.kasbekar@intel.com>
Adds AcpiTables and AdvancedAcpiDxe drivers
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
---
.../Acpi/AcpiTables/AcpiTables.inf | 68 +
.../Acpi/AcpiTables/Dsdt/Dsdt.asl | 32 +
.../Acpi/AcpiTables/Dsdt/PciTree.asl | 17 +
.../Acpi/AcpiTables/Ecdt/Ecdt.act | 103 +
.../Acpi/AcpiTables/Ecdt/Ecdt.h | 26 +
.../Acpi/AcpiTables/Facs/Facs.act | 91 +
.../Acpi/AcpiTables/Facs/Facs.h | 34 +
.../Acpi/AcpiTables/Fadt/Fadt6.3.act | 236 +++
.../Acpi/AcpiTables/Fadt/Fadt6.3.h | 184 ++
.../Acpi/AcpiTables/Hpet/Hpet.act | 77 +
.../Acpi/AcpiTables/Hpet/Hpet.h | 43 +
.../Acpi/AcpiTables/Include/AcpiCommon.h | 16 +
.../Acpi/AcpiTables/Madt/Madt.act | 573 ++++++
.../Acpi/AcpiTables/Madt/Madt.h | 226 +++
.../Acpi/AcpiTables/Madt/MadtX2Apic.act | 522 +++++
.../Acpi/AcpiTables/Mcfg/Mcfg.act | 91 +
.../Acpi/AcpiTables/Mcfg/Mcfg.h | 53 +
.../Acpi/AdvancedAcpiDxe/AcpiByteStream.h | 137 ++
.../Acpi/AdvancedAcpiDxe/AcpiPlatform.c | 1716 +++++++++++++++++
.../Acpi/AdvancedAcpiDxe/AcpiPlatform.h | 142 ++
.../Acpi/AdvancedAcpiDxe/AdvancedAcpiDxe.inf | 154 ++
.../Acpi/AdvancedAcpiDxe/GenSsdtLib.c | 474 +++++
.../Acpi/AdvancedAcpiDxe/GenSsdtLib.h | 17 +
23 files changed, 5032 insertions(+)
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/AcpiTables.inf
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/Dsdt.asl
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/PciTree.asl
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Include/AcpiCommon.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/MadtX2Apic.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.act
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiByteStream.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.c
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.h
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AdvancedAcpiDxe.inf
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.c
create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.h
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/AcpiTables.inf b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/AcpiTables.inf
new file mode 100644
index 0000000000..ccf1f3f69b
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/AcpiTables.inf
@@ -0,0 +1,68 @@
+### @file
+# Component information file for the ACPI tables
+#
+# Copyright (c) 1999 - 2021, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = AcpiTables
+ FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Fadt/Fadt6.3.act
+ Facs/Facs.act
+ Hpet/Hpet.act
+ Madt/Madt.act
+ Madt/MadtX2Apic.act
+ Mcfg/Mcfg.act
+ Ecdt/Ecdt.act
+ Dsdt/Dsdt.asl
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+[Packages]
+ MdePkg/MdePkg.dec
+ AlderlakeSiliconPkg/SiPkg.dec
+ AlderlakeOpenBoardPkg/OpenBoardPkg.dec
+ PcAtChipsetPkg/PcAtChipsetPkg.dec
+
+################################################################################
+#
+# Library Class Section - list of Library Classes that are required for
+# this module.
+#
+################################################################################
+
+[LibraryClasses]
+
+[FixedPcd]
+ gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdTcoBaseAddress ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdApicLocalAddress ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdApicIoAddress ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdAcpiEnableSwSmi ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdAcpiDisableSwSmi ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdApicIoIdPch ## CONSUMES
+
+################################################################################
+#
+# Protocol C Name Section - list of Protocol and Protocol Notify C Names
+# that this module uses or produces.
+#
+################################################################################
+[Protocols]
+
+[PPIs]
+
+[Guids]
+
+[Depex]
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/Dsdt.asl b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/Dsdt.asl
new file mode 100644
index 0000000000..5a5a8698d6
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/Dsdt.asl
@@ -0,0 +1,32 @@
+/** @file
+ ACPI DSDT table
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PlatformBoardId.h"
+#include <Include/AcpiDebug.h>
+
+
+DefinitionBlock (
+ "DSDT.aml",
+ "DSDT",
+ 0x02, // DSDT revision.
+ // A Revision field value greater than or equal to 2 signifies that integers
+ // declared within the Definition Block are to be evaluated as 64-bit values
+ "INTEL", // OEM ID (6 byte string)
+ "SKL ",// OEM table ID (8 byte string)
+ 0x0 // OEM version of DSDT table (4 byte Integer)
+)
+
+// BEGIN OF ASL SCOPE
+{
+ Name (SANB, 0xFFFF0000) // SA NVS Base address
+ Name (SANL, 0xAA55) // SA NVS Length
+
+ Include ("SaNvs.asl")
+ Include ("PciTree.asl")
+
+}// End of ASL File
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/PciTree.asl b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/PciTree.asl
new file mode 100644
index 0000000000..bef0b6cccd
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Dsdt/PciTree.asl
@@ -0,0 +1,17 @@
+/** @file
+ ACPI DSDT table
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+Scope(\_SB) {
+//---------------------------------------------------------------------------
+// Begin PCI tree object scope
+//---------------------------------------------------------------------------
+ Device(PC00) { // PCI Bridge "Host Bridge"
+ Name(_HID, EISAID("PNP0A08")) // Indicates PCI Express/PCI-X Mode2 host hierarchy
+ Include("HostBus.asl")
+ } // end PC00 Bridge "Host Bridge"
+} // end _SB scope
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.act
new file mode 100644
index 0000000000..3e30b41d11
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.act
@@ -0,0 +1,103 @@
+/** @file
+ This file contains a structure definition for the ACPI Embedded Controller Boot
+ Resources Table (ECDT). The contents of this file should only be modified
+ for bug fixes, no porting is required.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Ecdt.h"
+
+//
+// Embedded Controller Boot Resources Table Structure
+//
+#pragma pack(1)
+typedef struct {
+ EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE ActionTable;
+ //
+ // ASCII, null terminated, string that contains a fully qualified
+ // reference to the namespace object that is this embedded controller device.
+ //
+ CHAR8 Ec_Id[40];
+} EFI_ACPI_EMBEDDED_CONTROLLER_BOOT_RESOURCES_ENTIRE_TABLE;
+#pragma pack()
+
+EFI_ACPI_EMBEDDED_CONTROLLER_BOOT_RESOURCES_ENTIRE_TABLE Ecdt = {
+ {
+ {
+ EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE) + 40,
+ EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION,
+
+ //
+ // Checksum will be updated at runtime
+ //
+ 0x00,
+
+ //
+ // It is expected that these values will be updated at runtime
+ //
+ { ' ', ' ', ' ', ' ', ' ', ' ' },
+
+ 0,
+ EFI_ACPI_OEM_ECDT_REVISION,
+ 0,
+ 0
+ },
+
+ //
+ // EC_CONTROL Register Block
+ //
+ {
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 8,
+ 0,
+ EFI_ACPI_RESERVED_BYTE,
+ 0x66
+ },
+
+ //
+ // EC_DATA Register Block
+ //
+ {
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 8,
+ 0,
+ EFI_ACPI_RESERVED_BYTE,
+ 0x62
+ },
+
+ 1, // UID
+ 0 // GPE_BIT
+ },
+ "\\_SB.PC00.LPCB.H_EC" //EC_ID
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the exeutable
+ //
+ return (VOID*)&Ecdt;
+}
+#else
+VOID
+main (
+ VOID
+ )
+
+{
+}
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.h
new file mode 100644
index 0000000000..4afa4874d2
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Ecdt/Ecdt.h
@@ -0,0 +1,26 @@
+/** @file
+ This file describes the contents of the ACPI Embedded Controller Boot
+ Resources Table (ECDT). All changes to the ECDT contents should be done
+ in this file.
+
+ Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+
+**/
+
+#ifndef _ECDT_H_
+#define _ECDT_H_
+
+//
+// Statements that include other files
+//
+
+#include <IndustryStandard/Acpi.h>
+
+//
+// ECDT Definitions
+//
+#define EFI_ACPI_OEM_ECDT_REVISION 0x00000001
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.act
new file mode 100644
index 0000000000..fde17b577c
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.act
@@ -0,0 +1,91 @@
+/** @file
+ This file contains a structure definition for the ACPI 5.0 Firmware ACPI
+ Control Structure (FACS). The contents of this file should only be modified
+ for bug fixes, no porting is required.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Facs.h"
+
+//
+// Firmware ACPI Control Structure
+// Please modify all values in Facs.h only.
+//
+
+EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = {
+ EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE,
+ sizeof (EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE),
+
+ //
+ // Hardware Signature will be updated at runtime
+ //
+ 0x00000000,
+
+ EFI_ACPI_FIRMWARE_WAKING_VECTOR,
+ EFI_ACPI_GLOBAL_LOCK,
+ EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS,
+ EFI_ACPI_X_FIRMWARE_WAKING_VECTOR,
+ EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION,
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ EFI_ACPI_RESERVED_DWORD, //EFI_ACPI_5_0_OSPM_64BIT_WAKE_F
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ }
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the exeutable
+ //
+ return (VOID*)&Facs;
+}
+#else
+VOID
+main (
+ VOID
+ )
+
+{
+}
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.h
new file mode 100644
index 0000000000..711d952583
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Facs/Facs.h
@@ -0,0 +1,34 @@
+/** @file
+ This file describes the contents of the ACPI Firmware ACPI Control
+ Structure (FACS). All changes to the FACS contents should be done
+ in this file.
+
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FACS_H_
+#define _FACS_H_
+
+//
+// Statements that include other files
+//
+
+#include <IndustryStandard/Acpi.h>
+
+//
+// FACS Definitions
+//
+
+#define EFI_ACPI_FIRMWARE_WAKING_VECTOR 0x00000000
+#define EFI_ACPI_GLOBAL_LOCK 0x00000000
+
+//
+// Firmware Control Structure Feature Flags are defined in AcpiX.0.h
+//
+#define EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS 0x00000000
+
+#define EFI_ACPI_X_FIRMWARE_WAKING_VECTOR 0x0000000000000000
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.act
new file mode 100644
index 0000000000..5acc63d744
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.act
@@ -0,0 +1,236 @@
+/** @file
+ This file contains a structure definition for the ACPI 6.1 Fixed ACPI
+ Description Table (FADT). The contents of this file should only be modified
+ for bug fixes, no porting is required.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Fadt6.3.h"
+
+//
+// Fixed ACPI Description Table
+// Please modify all values in Fadt.h only.
+//
+
+EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+ {
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE),
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
+
+ //
+ // Checksum will be updated at runtime
+ //
+ 0x00,
+
+ //
+ // It is expected that these values will be updated at runtime
+ //
+ { ' ', ' ', ' ', ' ', ' ', ' ' },
+
+ 0,
+ EFI_ACPI_OEM_FADT_REVISION,
+ 0,
+ 0
+ },
+
+ //
+ // These addresses will be updated at runtime
+ //
+ 0x00000000,
+ 0x00000000,
+
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_PREFERRED_PM_PROFILE,
+ EFI_ACPI_SCI_INT,
+ EFI_ACPI_SMI_CMD,
+ FixedPcdGet8 (PcdAcpiEnableSwSmi),
+ FixedPcdGet8 (PcdAcpiDisableSwSmi),
+ EFI_ACPI_S4_BIOS_REQ,
+ EFI_ACPI_PSTATE_CNT,
+
+ EFI_ACPI_PM1A_EVT_BLK_ADDRESS,
+ EFI_ACPI_PM1B_EVT_BLK_ADDRESS,
+ EFI_ACPI_PM1A_CNT_BLK_ADDRESS,
+ EFI_ACPI_PM1B_CNT_BLK_ADDRESS,
+ EFI_ACPI_PM2_CNT_BLK_ADDRESS,
+ EFI_ACPI_PM_TMR_BLK_ADDRESS,
+ EFI_ACPI_GPE0_BLK_ADDRESS,
+ EFI_ACPI_GPE1_BLK_ADDRESS,
+ EFI_ACPI_PM1_EVT_LEN,
+ EFI_ACPI_PM1_CNT_LEN,
+ EFI_ACPI_PM2_CNT_LEN,
+ EFI_ACPI_PM_TMR_LEN,
+ EFI_ACPI_GPE0_BLK_LEN,
+ EFI_ACPI_GPE1_BLK_LEN,
+ EFI_ACPI_GPE1_BASE,
+
+ //
+ // Latest OS have C-State capability and CST_CNT SMI doesn't need to be defined.
+ // CST_CNT SMI is not handled in BIOS and it can be removed safely.
+ //
+ EFI_ACPI_CST_CNT,
+ EFI_ACPI_P_LVL2_LAT,
+ EFI_ACPI_P_LVL3_LAT,
+ EFI_ACPI_FLUSH_SIZE,
+ EFI_ACPI_FLUSH_STRIDE,
+ EFI_ACPI_DUTY_OFFSET,
+ EFI_ACPI_DUTY_WIDTH,
+ EFI_ACPI_DAY_ALRM,
+ EFI_ACPI_MON_ALRM,
+ EFI_ACPI_CENTURY,
+ EFI_ACPI_IAPC_BOOT_ARCH,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_FIXED_FEATURE_FLAGS,
+
+ //
+ // Reset Register Block
+ //
+ {
+ EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID,
+ EFI_ACPI_RESET_REG_BIT_WIDTH,
+ EFI_ACPI_RESET_REG_BIT_OFFSET,
+ EFI_ACPI_6_3_BYTE,
+ EFI_ACPI_RESET_REG_ADDRESS
+ },
+ EFI_ACPI_RESET_VALUE,
+ 0, // ArmBootArch
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,
+
+ //
+ // These addresses will be updated at runtime
+ //
+ 0x0000000000000000, // X_FIRMWARE_CTRL
+ 0x0000000000000000, // X_DSDT
+
+ {
+ //
+ // X_PM1a Event Register Block
+ //
+ EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH,
+ EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_WORD,
+ EFI_ACPI_PM1A_EVT_BLK_ADDRESS
+ },
+ {
+ //
+ // X_PM1b Event Register Block
+ //
+ EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH,
+ EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_WORD,
+ EFI_ACPI_PM1B_EVT_BLK_ADDRESS
+ },
+ {
+ //
+ // X_PM1a Control Register Block
+ //
+ EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH,
+ EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_WORD,
+ EFI_ACPI_PM1A_CNT_BLK_ADDRESS
+ },
+ {
+ //
+ // X_PM1b Control Register Block
+ //
+ EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH,
+ EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_WORD,
+ EFI_ACPI_PM1B_CNT_BLK_ADDRESS
+ },
+ {
+ //
+ // X_PM2 Control Register Block
+ //
+ EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH,
+ EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_BYTE,
+ EFI_ACPI_PM2_CNT_BLK_ADDRESS
+ },
+ {
+ //
+ // X_PM Timer Control Register Block
+ //
+ EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_PM_TMR_BLK_BIT_WIDTH,
+ EFI_ACPI_PM_TMR_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_DWORD,
+ EFI_ACPI_PM_TMR_BLK_ADDRESS
+ },
+ {
+ //
+ // X_General Purpose Event 0 Register Block
+ //
+ EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID,
+ 0x0,
+ EFI_ACPI_GPE0_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_BYTE,
+ EFI_ACPI_GPE0_BLK_ADDRESS
+ },
+ {
+ //
+ // X_General Purpose Event 1 Register Block
+ //
+ EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID,
+ EFI_ACPI_GPE1_BLK_BIT_WIDTH,
+ EFI_ACPI_GPE1_BLK_BIT_OFFSET,
+ EFI_ACPI_6_3_BYTE,
+ EFI_ACPI_GPE1_BLK_ADDRESS
+ },
+ {
+ //
+ // Sleep Control Reg - update in DXE driver
+ //
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+ {
+ //
+ // Sleep Status Reg - update in DXE driver
+ //
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+ },
+ 0 // HypervisorVendorIdentity
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the exeutable
+ //
+ return (VOID*)&Fadt;
+}
+#else
+VOID
+main (
+ VOID
+ )
+{
+}
+#endif
\ No newline at end of file
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.h
new file mode 100644
index 0000000000..e2dffeb13c
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Fadt/Fadt6.3.h
@@ -0,0 +1,184 @@
+/** @file
+ This file describes the contents of the ACPI Fixed ACPI Description Table
+ (FADT). All changes to the FADT contents should be done in this file.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FADT_H_
+#define _FADT_H_
+
+//
+// Statements that include other files
+//
+
+#include <IndustryStandard/Acpi.h>
+
+#include "Register/PmcRegs.h"
+#include "Register/TcoRegs.h"
+
+//
+// FADT Definitions
+//
+#ifndef EFI_ACPI_OEM_FADT_REVISION
+#define EFI_ACPI_OEM_FADT_REVISION 0x00000000
+#endif
+
+//
+// For ACPI 1.0 support
+//
+/*
+1 Desktop
+2 Mobile
+3 Workstation
+4 Enterprise Server
+5 SOHO Server
+6 Appliance PC
+7 Performance Server
+*/
+#define EFI_ACPI_PREFERRED_PM_PROFILE 0x01
+#define EFI_ACPI_SCI_INT 0x0009
+#define EFI_ACPI_SMI_CMD 0x000000B2
+#define EFI_ACPI_S4_BIOS_REQ 0xF2
+#define EFI_ACPI_PSTATE_CNT 0x00
+#define EFI_ACPI_GPE1_BASE 0x10
+#define EFI_ACPI_CST_CNT 0x0
+#define EFI_ACPI_P_LVL2_LAT 101
+#define EFI_ACPI_P_LVL3_LAT 1001
+#define EFI_ACPI_FLUSH_SIZE 0x0000
+#define EFI_ACPI_FLUSH_STRIDE 0x0000
+#define EFI_ACPI_DUTY_OFFSET 0x01
+#define EFI_ACPI_DUTY_WIDTH 0x03
+#define EFI_ACPI_DAY_ALRM 0x0D
+#define EFI_ACPI_MON_ALRM 0x00
+#define EFI_ACPI_CENTURY 0x32
+
+//
+// IA-PC Boot Architecture Flags, see ACPI 6.3 table specification and Acpi61.h
+// We should not use EFI_ACPI_6_3_8042 for legacy free platform, or XP reset fail. No impact to mobile.
+//
+#define EFI_ACPI_IAPC_BOOT_ARCH (EFI_ACPI_6_3_LEGACY_DEVICES)
+
+//
+// Fixed Feature Flags, see ACPI 6.3 table specification and Acpi6_3.h
+//
+#define EFI_ACPI_FIXED_FEATURE_FLAGS (\
+ EFI_ACPI_6_3_USE_PLATFORM_CLOCK | \
+ EFI_ACPI_6_3_WBINVD | \
+ EFI_ACPI_6_3_DCK_CAP | \
+ EFI_ACPI_6_3_FIX_RTC | \
+ EFI_ACPI_6_3_RTC_S4 | \
+ EFI_ACPI_6_3_SLP_BUTTON | \
+ EFI_ACPI_6_3_PROC_C1 | \
+ EFI_ACPI_6_3_RESET_REG_SUP \
+ )
+
+//
+// PM1A Event Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
+#define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiBaseAddress)
+
+//
+// PM1B Event Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
+#define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS 0x0000000000000000
+
+//
+// PM1A Control Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
+#define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x04)
+
+//
+// PM1B Control Register Block Generic Address Information
+//
+#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
+#define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS 0x0000000000000000
+
+//
+// PM2 Control Register Block Generic Address Information
+//
+#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
+#define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM2_CNT_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x50)
+
+//
+// Power Management Timer Control Register Block Generic Address
+// Information
+//
+#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
+#define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_PM_TMR_BLK_ADDRESS (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x08)
+
+//
+// General Purpose Event 0 Register Block Generic Address
+// Information
+//
+#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0x100
+#define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_GPE0_BLK_ADDRESS 0x00
+
+//
+// General Purpose Event 1 Register Block Generic Address
+// Information
+//
+#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x00
+#define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x00
+#define EFI_ACPI_GPE1_BLK_ADDRESS 0x0000000000000000
+
+//
+// Reset Register Generic Address Information
+//
+#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_6_3_SYSTEM_IO
+#define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
+#define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
+#define EFI_ACPI_RESET_REG_ADDRESS 0x0000000000000CF9
+#define EFI_ACPI_RESET_VALUE 0x06
+
+//
+// Number of bytes decoded by PM1 event blocks (a and b)
+//
+#define EFI_ACPI_PM1_EVT_LEN ((EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH) / 8)
+
+//
+// Number of bytes decoded by PM1 control blocks (a and b)
+//
+#define EFI_ACPI_PM1_CNT_LEN ((EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH) / 8)
+
+//
+// Number of bytes decoded by PM2 control block
+//
+#define EFI_ACPI_PM2_CNT_LEN (EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH / 8)
+
+//
+// Number of bytes decoded by PM timer block
+//
+#define EFI_ACPI_PM_TMR_LEN (EFI_ACPI_PM_TMR_BLK_BIT_WIDTH / 8)
+
+//
+// Number of bytes decoded by GPE0 block
+//
+#define EFI_ACPI_GPE0_BLK_LEN (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 8)
+
+//
+// Number of bytes decoded by GPE1 block
+//
+#define EFI_ACPI_GPE1_BLK_LEN (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 8)
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.act
new file mode 100644
index 0000000000..c4b87cecdd
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.act
@@ -0,0 +1,77 @@
+/** @file
+ This file contains a structure definition for the ACPI 1.0 High Precision Event Timer
+ Description Table (HPET). The contents of this file should only be modified
+ for bug fixes, no porting is required.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Hpet.h"
+
+//
+// High Precision Event Timer Table
+// Please modify all values in Hpet.h only.
+//
+
+EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER Fadt = {
+ {
+ EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER),
+ EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_REVISION,
+
+ //
+ // Checksum will be updated at runtime
+ //
+ 0x00,
+
+ //
+ // It is expected that these values will be updated at runtime
+ //
+ { ' ', ' ', ' ', ' ', ' ', ' ' },
+
+ 0,
+ EFI_ACPI_OEM_HPET_REVISION,
+ 0,
+ 0
+ },
+
+ EFI_ACPI_EVENT_TIMER_BLOCK_ID,
+ {
+ EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS_SPACE_ID,
+ EFI_ACPI_EVENT_TIMER_BLOCK_BIT_WIDTH,
+ EFI_ACPI_EVENT_TIMER_BLOCK_BIT_OFFSET,
+ EFI_ACPI_EVENT_TIMER_ACCESS_SIZE,
+ EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS
+ },
+ EFI_ACPI_HPET_NUMBER,
+ EFI_ACPI_MIN_CLOCK_TICK,
+ EFI_ACPI_HPET_ATTRIBUTES
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the exeutable
+ //
+ return (VOID*)&Fadt;
+}
+#else
+VOID
+main (
+ VOID
+ )
+{
+}
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h
new file mode 100644
index 0000000000..7a0b3b7a59
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h
@@ -0,0 +1,43 @@
+/** @file
+ This file describes the contents of the ACPI High Precision Event Timer Description Table
+ (HPET). All changes to the HPET contents should be done in this file.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _HPET_H_
+#define _HPET_H_
+
+//
+// Statements that include other files
+//
+
+#include <IndustryStandard/Acpi30.h>
+#include <IndustryStandard/HighPrecisionEventTimerTable.h>
+
+//
+// HPET Definitions
+//
+
+#define EFI_ACPI_OEM_HPET_REVISION 0x00000001
+
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ID 0x8086A201
+
+//
+// Event Timer Block Base Address Information
+//
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS_SPACE_ID EFI_ACPI_3_0_SYSTEM_MEMORY
+#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_WIDTH 0x40
+#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_OFFSET 0x00
+#define EFI_ACPI_EVENT_TIMER_ACCESS_SIZE 0x00
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS 0x00000000FED00000
+
+#define EFI_ACPI_HPET_NUMBER 0x00
+
+#define EFI_ACPI_MIN_CLOCK_TICK 0x0080
+
+#define EFI_ACPI_HPET_ATTRIBUTES 0x00
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Include/AcpiCommon.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Include/AcpiCommon.h
new file mode 100644
index 0000000000..f689c7e339
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Include/AcpiCommon.h
@@ -0,0 +1,16 @@
+/** @file
+ Header file for ACPI common Initialization Driver.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _ACPI_COMMON_H_
+#define _ACPI_COMMON_H_
+
+
+
+
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.act
new file mode 100644
index 0000000000..9bb0884219
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.act
@@ -0,0 +1,573 @@
+/** @file
+ This file contains a structure definition for the ACPI 2.0 Multiple APIC
+ Description Table (MADT). Any changes to the MADT table require updating the
+ respective structure count in Madt.h and then adding the structure to the
+ MADT defined in this file.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Madt.h"
+
+//
+// Multiple APIC Description Table
+//
+
+EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ {
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE),
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
+
+ //
+ // Checksum will be updated at runtime
+ //
+ 0x00,
+
+ //
+ // It is expected that these values will be programmed at runtime
+ //
+ { ' ', ' ', ' ', ' ', ' ', ' ' },
+
+ 0,
+ EFI_ACPI_OEM_MADT_REVISION,
+ 0,
+ 0
+ },
+
+ //
+ // MADT specific fields
+ //
+ FixedPcdGet64 (PcdApicLocalAddress),
+ EFI_ACPI_6_3_MULTIPLE_APIC_FLAGS
+ },
+
+ //
+ // Sample Processor Local APIC Structure
+ //
+ //EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ //sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ //0x00 // Processor ID
+ //0x00 // Local APIC ID
+ //0x00000000, // Flags - Disabled (until initialized by platform driver)
+ {
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x01, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x02, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x03, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x04, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x05, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x06, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x07, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x08, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x09, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x0A, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x0B, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x0C, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x0D, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x0E, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x0F, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x10, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x11, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x12, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x13, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x14, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x15, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x16, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x17, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x18, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x19, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x1A, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x1B, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x1C, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x1D, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x1E, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x1F, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
+ 0x20, // Processor ID
+ 0xFF, // Local APIC ID
+ 0x00000000 // Flags - Disabled (until initialized by platform driver)
+ }
+ },
+
+ //
+ // Sample IO APIC Structure
+ //
+ //EFI_ACPI_6_3_IO_APIC, // Type
+ //sizeof (EFI_ACPI_6_3_IO_APIC_STRUCTURE), // Length
+ //0x00, // IO APIC ID
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ //0x00000000, // IO APIC Address (physical)
+ //0x00000000, // Global System Interrupt Base
+ {
+ {
+ //
+ // I/O SAPIC (ICH)
+ //
+ EFI_ACPI_6_3_IO_APIC, // Type
+ sizeof (EFI_ACPI_6_3_IO_APIC_STRUCTURE), // Length
+ FixedPcdGet8 (PcdApicIoIdPch), // IO APIC ID
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ FixedPcdGet64 (PcdApicIoAddress), // IO APIC Address (physical)
+ 0x18 * 0 // Global System Interrupt Base
+ }
+ },
+ //
+ // Sample Interrupt Source Override Structure
+ //
+ //EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, // Type
+ //sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE), // Length
+ //0x00, // Bus
+ //0x00, // Source
+ //0x00000000, // Global System Interrupt
+ //0x0000, // Flags
+ {
+ {
+ //
+ // IRQ0=>IRQ2 Interrupt Source Override Structure
+ //
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, // Type
+ sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
+ 0x00, // Bus - ISA
+ 0x00, // Source - IRQ0
+ 0x00000002, // Global System Interrupt - IRQ2
+ 0x0000 // Flags - Conforms to specifications of the bus
+ },
+ {
+ //
+ // ISO (SCI Active High) Interrupt Source Override Structure
+ //
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, // Type
+ sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
+ 0x00, // Bus - ISA
+ 0x09, // Source - IRQ9
+ 0x00000009, // Global System Interrupt - IRQ9
+ 0x000D // Flags - Level-tiggered, Active High
+ }
+ },
+ //
+ // Sample Non-Maskable Interrupt Source Structure
+ //
+ //EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE, // Type
+ //sizeof (EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE), // Length
+ //0x0000, // Flags
+ //0x00000000, // Global System Interrupt
+
+ //
+ // Sample Local APIC NMI Structure
+ //
+ //EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ //sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ //0x00, // ACPI Processor ID
+ //0x0000, // Flags
+ //0x00, // Local APIC LINT#
+
+ {
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x01, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x02, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x03, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x04, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x05, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x06, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x07, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x08, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x09, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x0A, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x0B, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x0C, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x0D, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x0E, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x0F, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x10, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x11, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x12, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x13, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x14, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x15, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x16, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x17, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ },
+ {
+ EFI_ACPI_6_3_LOCAL_APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE), // Length
+ 0x00, // ACPI Processor ID
+ 0x0005, // Flags - Edge-tiggered, Active High
+ 0x01 // Local APIC LINT#
+ }
+ }
+
+ //
+ // Sample Local APIC Address Override Structure
+ //
+ //EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE, // Type
+ //sizeof (EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE), // Length
+ //EFI_ACPI_RESERVED_WORD, // Reserved
+ //0x0000000000000000, // Local APIC Address
+
+ //
+ // Sample Platform Interrupt Sources Structure
+ //
+ //EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES, // Type
+ //sizeof (EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE), // Length
+ //0x0000, // Flags
+ //0x00, // Interrupt Type
+ //0x00, // Processor ID
+ //0x00, // Processor EID
+ //0x00, // IO SAPIC Vector
+ //0x00000000, // Global System Interrupt
+ //EFI_ACPI_RESERVED_DWORD, // Reserved
+
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the executable
+ //
+ return (VOID*)&Madt;
+}
+#else
+VOID
+main (
+ VOID
+ )
+{
+}
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.h
new file mode 100644
index 0000000000..b06b6efecd
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/Madt.h
@@ -0,0 +1,226 @@
+/** @file
+ This file describes the contents of the ACPI Multiple APIC Description
+ Table (MADT).
+ To make changes to the MADT, it is necessary to update the count for the
+ APIC structure being updated, and to modify table found in Madt.c.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _MADT_H_
+#define _MADT_H_
+
+//
+// Statements that include other files
+//
+
+#include <IndustryStandard/Acpi.h>
+
+//
+// MADT Definitions
+//
+
+#define EFI_ACPI_OEM_MADT_REVISION 0x00000001
+
+
+//
+// Multiple APIC Flags are defined in AcpiX.0.h
+//
+#define EFI_ACPI_6_3_MULTIPLE_APIC_FLAGS (EFI_ACPI_6_3_PCAT_COMPAT)
+
+//
+// Define the number of each table type.
+// This is where the table layout is modified.
+//
+
+#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 32
+#define EFI_ACPI_IO_APIC_COUNT 1
+#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2
+#define EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT 0
+#define EFI_ACPI_LOCAL_APIC_NMI_COUNT 24
+#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0
+#define EFI_ACPI_IO_SAPIC_COUNT 0
+#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0
+#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0
+#define EFI_ACPI_PROCESSOR_LOCAL_X2APIC_COUNT 32
+#define EFI_ACPI_LOCAL_X2APIC_NMI_COUNT 1
+
+//
+// MADT structure
+//
+
+//
+// Ensure proper structure formats
+//
+#pragma pack (1)
+
+//
+// ACPI 1.0 Table structure
+//
+typedef struct {
+ EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+
+#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
+ EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_IO_APIC_COUNT > 0
+ EFI_ACPI_1_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
+ EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0
+ EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0
+ EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0
+ EFI_ACPI_1_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
+#endif
+
+} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+//
+// ACPI 2.0 Table structure
+//
+typedef struct {
+ EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+
+#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
+ EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_IO_APIC_COUNT > 0
+ EFI_ACPI_2_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
+ EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0
+ EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0
+ EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0
+ EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_IO_SAPIC_COUNT > 0
+ EFI_ACPI_2_0_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0
+ EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0
+ EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
+#endif
+
+} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+//
+// ACPI 6.3 APIC Table structure
+//
+typedef struct {
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+
+#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0 // Type 0x09
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_IO_APIC_COUNT > 0 // Type 0x01
+ EFI_ACPI_6_3_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 // Type 0x02
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0 // Type 0x03
+ EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0 // Type 0x0A
+ EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi[EFI_ACPI_LOCAL_APIC_NMI_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0 // Type 0x05
+ EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_IO_SAPIC_COUNT > 0 // Type 0x06
+ EFI_ACPI_6_3_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0 // Type 0x07 : This table changes in madt 2.0
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0 // Type 0x08
+ EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
+#endif
+
+} EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+
+//
+// ACPI 6.3 X2APIC Table structure
+//
+typedef struct {
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+
+#if EFI_ACPI_PROCESSOR_LOCAL_X2APIC_COUNT > 0 // Type 0x09
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE LocalX2Apic[EFI_ACPI_PROCESSOR_LOCAL_X2APIC_COUNT];
+#endif
+
+#if EFI_ACPI_IO_APIC_COUNT > 0 // Type 0x01
+ EFI_ACPI_6_3_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 // Type 0x02
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0 // Type 0x03
+ EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_X2APIC_NMI_COUNT > 0 // Type 0x0A
+ EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE X2ApicNmi[EFI_ACPI_LOCAL_X2APIC_NMI_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0 // Type 0x05
+ EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_IO_SAPIC_COUNT > 0 // Type 0x06
+ EFI_ACPI_6_3_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0 // Type 0x07 : This table changes in madt 2.0
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0 // Type 0x08
+ EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
+#endif
+
+} EFI_ACPI_6_3_MULTIPLE_X2APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/MadtX2Apic.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/MadtX2Apic.act
new file mode 100644
index 0000000000..b6d4b6bd11
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Madt/MadtX2Apic.act
@@ -0,0 +1,522 @@
+/** @file
+ This file contains a structure definition for the ACPI 6.3 Multiple APIC
+ Description Table (MADT). Any changes to the MADT table require updating the
+ respective structure count in Madt.h and then adding the structure to the
+ MADT defined in this file.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Madt.h"
+
+//
+// Multiple APIC Description Table
+//
+
+EFI_ACPI_6_3_MULTIPLE_X2APIC_DESCRIPTION_TABLE Madtx2Apic = {
+ {
+ {
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE),
+ EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
+
+ //
+ // Checksum will be updated at runtime
+ //
+ 0x00,
+
+ //
+ // It is expected that these values will be programmed at runtime
+ //
+ { ' ', ' ', ' ', ' ', ' ', ' ' },
+
+ 0,
+ EFI_ACPI_OEM_MADT_REVISION,
+ 0,
+ 0
+ },
+
+ //
+ // MADT specific fields
+ //
+ FixedPcdGet64 (PcdApicLocalAddress),
+ EFI_ACPI_6_3_MULTIPLE_APIC_FLAGS
+ },
+
+ //
+ // Sample Processor Local X2APIC Structure
+ //
+ //EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type 0x09
+ //sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ //0xFFFFFFFF, // Local X2APIC ID
+ //0x00000000, // Flags - Disabled (until initialized by platform driver)
+ //0x00000000, // Processor ID
+ {
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000001, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000002, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000003, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000004, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000005, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000006, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000007, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000008, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000009, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000000A, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000000B, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000000C, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000000D, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000000E, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000000F, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000010, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000011, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000012, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000013, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000014, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000015, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000016, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000017, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000018, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000019, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000001A, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000001B, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000001C, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000001D, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000001E, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x0000001F, // Processor ID
+ },
+ {
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC, // Type
+ sizeof (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE), // Length
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ },
+ 0xFFFFFFFF, // Local X2APIC ID
+ 0x00000000, // Flags - Disabled (until initialized by platform driver)
+ 0x00000020, // Processor ID
+ }
+ },
+
+ //
+ // Sample IO APIC Structure
+ //
+ //EFI_ACPI_6_3_IO_APIC, // Type
+ //sizeof (EFI_ACPI_6_3_IO_APIC_STRUCTURE), // Length
+ //0x00, // IO APIC ID
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ //0x00000000, // IO APIC Address (physical)
+ //0x00000000, // Global System Interrupt Base
+ {
+ {
+ //
+ // I/O SAPIC (ICH)
+ //
+ EFI_ACPI_6_3_IO_APIC, // Type
+ sizeof (EFI_ACPI_6_3_IO_APIC_STRUCTURE), // Length
+ FixedPcdGet8 (PcdApicIoIdPch), // IO APIC ID
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ FixedPcdGet64 (PcdApicIoAddress), // IO APIC Address (physical)
+ 0x18 * 0 // Global System Interrupt Base
+ }
+ },
+
+ //
+ // Sample Interrupt Source Override Structure
+ //
+ //EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, // Type
+ //sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE), // Length
+ //0x00, // Bus
+ //0x00, // Source
+ //0x00000000, // Global System Interrupt
+ //0x0000, // Flags
+ {
+ {
+ //
+ // IRQ0=>IRQ2 Interrupt Source Override Structure
+ //
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, // Type
+ sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
+ 0x00, // Bus - ISA
+ 0x00, // Source - IRQ0
+ 0x00000002, // Global System Interrupt - IRQ2
+ 0x0000 // Flags - Conforms to specifications of the bus
+ },
+ {
+ //
+ // ISO (SCI Active High) Interrupt Source Override Structure
+ //
+ EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE, // Type
+ sizeof (EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
+ 0x00, // Bus - ISA
+ 0x09, // Source - IRQ9
+ 0x00000009, // Global System Interrupt - IRQ9
+ 0x000D // Flags - Level-tiggered, Active High
+ }
+ },
+
+ //
+ // Sample Local X2APIC NMI Structure
+ //
+ //EFI_ACPI_6_3_LOCAL_X2APIC_NMI, // Type 0x0A
+ //sizeof (EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE), // Length 0x0C
+ //0x000D, // Flags - Level-tiggered, Active High
+ //0xFFFFFFFF, // Processor ID
+ //0x01, // Local APIC LINT#
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ //EFI_ACPI_RESERVED_BYTE, // Reserved
+ {
+ {
+ EFI_ACPI_6_3_LOCAL_X2APIC_NMI, // Type
+ sizeof (EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE), // Length
+ 0x000D, // Flags - Level-tiggered, Active High
+ 0xFFFFFFFF, // Processor ID
+ 0x01, // Local APIC LINT#
+ {
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE, // Reserved
+ EFI_ACPI_RESERVED_BYTE // Reserved
+ }
+ }
+ }
+
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the executable
+ //
+ return (VOID*)&Madtx2Apic;
+}
+#else
+VOID
+main (
+ VOID
+ )
+{
+}
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.act b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.act
new file mode 100644
index 0000000000..47f2a15336
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.act
@@ -0,0 +1,91 @@
+/** @file
+ This file contains a structure definition for the ACPI Memory Mapped Configuration
+ Address Space table (MCFG). Any changes to the number of entries in the table require
+ updating the structure count in Mcfg.h and then adding the structure to the
+ MCFG defined in this file. The table layout is defined in Mcfg.h and the
+ table contents are defined in the MemoryMappedConfigurationSpaceAccessTable.h.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Statements that include other files
+//
+
+#include "Mcfg.h"
+
+//
+// Multiple APIC Description Table
+//
+
+EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Madt = {
+ {
+ EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE),
+ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
+
+ //
+ // Checksum will be updated at runtime
+ //
+ 0x00,
+
+ //
+ // It is expected that these values will be programmed at runtime
+ //
+ { ' ', ' ', ' ', ' ', ' ', ' ' },
+
+ 0,
+ EFI_ACPI_OEM_MCFG_REVISION,
+ 0,
+ 0
+ },
+
+ //
+ // Reserved
+ //
+ 0x0000000000000000,
+
+ //
+ // MCFG specific fields
+ //
+ {
+ {
+ 0x0000000000000000, // BaseAddress, will be updated by AcpiPlatform
+ 0x0000, // PciSegmentGroupNumber
+ 0x00, // StartBusNumber
+ 0x00, // EndBusNumber, will be updated by AcpiPlatform
+ 0x00000000 // Reserved
+ },
+ {
+ 0x0000000000000000, // BaseAddress, will be updated by AcpiPlatform
+ 0x0001, // PciSegmentGroupNumber
+ 0x00, // StartBusNumber
+ 0xFF, // EndBusNumber, If extra segment is presented, it must support Bus Number from 0x00 ~ 0xFF
+ 0x00000000 // Reserved
+ }
+ }
+};
+
+#ifdef __GNUC__
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+
+{
+ //
+ // Reference the table being generated to prevent the optimizer from removing the
+ // data structure from the exeutable
+ //
+ return (VOID*)&Madt;
+}
+#else
+VOID
+main (
+ VOID
+ )
+{
+}
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h
new file mode 100644
index 0000000000..627d66a81d
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h
@@ -0,0 +1,53 @@
+/** @file
+ This file describes the contents of the ACPI Memory Mapped Configuration
+ Space Access Table (MCFG).
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _MCFG_H_
+#define _MCFG_H_
+
+//
+// Statements that include other files
+//
+
+#include <IndustryStandard/Acpi30.h>
+#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
+
+//
+// MCFG Definitions
+//
+
+#define EFI_ACPI_OEM_MCFG_REVISION 0x00000001
+
+//
+// Define the number of allocation structures so that we can build the table structure.
+//
+#define EFI_ACPI_ALLOCATION_STRUCTURE_COUNT 2
+
+//
+// MCFG structure
+//
+
+//
+// Ensure proper structure formats
+//
+#pragma pack (1)
+
+//
+// MCFG Table structure
+//
+typedef struct {
+ EFI_ACPI_DESCRIPTION_HEADER Header;
+ UINT64 Reserved;
+#if EFI_ACPI_ALLOCATION_STRUCTURE_COUNT > 0
+ EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE AllocationStructure[EFI_ACPI_ALLOCATION_STRUCTURE_COUNT];
+#endif
+} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiByteStream.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiByteStream.h
new file mode 100644
index 0000000000..b2b6cdf77c
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiByteStream.h
@@ -0,0 +1,137 @@
+/**@file
+ Byte stream structures for ACPI
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _ACPI_BYTE_STREAM_H_
+#define _ACPI_BYTE_STREAM_H_
+
+#include <IndustryStandard/Acpi.h>
+
+// @todo: Push these macros to Acpi.h file in Edk2 core.
+
+//
+// Definition block ecoding
+//
+
+//
+// External byte stream values and offsets
+//
+#define ACPI_EXTERNAL_PCI_BUS_NUMBER_OFFSET 0xA
+
+
+#define ACPI_SCOPE_PCI_BUS_NUMBER_OFFSET 0x9
+
+
+
+#define ACPI_NAME_OBJECT_STRING_OFFSET 0x6
+
+
+#define ACPI_UNIQUE_ID_NUMBER_OFFSET 0x5
+
+
+#define ACPI_BYTE_PREFIX_OPCODE 0x0A
+#define ACPI_WORD_PREFIX_OPCODE 0x0B
+
+#define ACPI_I2C_RESOURCE_CONTROLLER_NUMBER_OFFSET 0x1F
+
+#define ACPI_STA_RETURN_VALUE_OFFSET 0x9
+#define ACPI_STA_RETURN_VALUE_DEVICE_ENABLED 0xF
+#define ACPI_STA_RETURN_VALUE_DEVICE_DISABLED 0x0
+
+#define ACPI_GPIO_RESOURCE_TYPE 0x1
+#define ACPI_GPIO_RESOURCE_TYPE_INTERRUPT 0x1
+#define ACPI_GPIO_RESOURCE_TYPE_IO 0x2
+
+#define ACPI_I2C_RESOURCE_TYPE 0x2
+
+#define ASCII_0_ORDINAL ((UINT32) '0')
+
+typedef struct {
+ UINT8 GpioConnectionDescriptor; // 0x8C
+ UINT8 Length1;
+ UINT8 Length2;
+ UINT8 RevisionId;
+ UINT8 GpioConnectionType; // 0x0 - Interrupt, 0x01 - IO Connection, 0x02-0xFF reserved
+ UINT8 GeneralFlags1;
+ UINT8 GeneralFlags2;
+ UINT8 InterruptAndIoFlags1;
+ UINT8 InterruptAndIoFlags2;
+ UINT8 PinConfiguration;
+ UINT8 OutputDriveStrength1;
+ UINT8 OutputDriveStrength2;
+ UINT8 DebounceTimeOut1;
+ UINT8 DebounceTimeOut2;
+ UINT8 PinTableOffset1;
+ UINT8 PinTableOffset2;
+ UINT8 ResourceSourceIndex;
+ UINT8 ResourceSourceNameOffset1;
+ UINT8 ResourceSourceNameOffset2;
+ UINT8 VendorDataOffset1;
+ UINT8 VendorDataOffset2;
+ UINT8 VendorDataLength1;
+ UINT8 VendorDataLength2;
+ UINT8 PinNumber1;
+ UINT8 PinNumber2;
+ CHAR8 ResourceSource[15];
+} GPIO_RESOURCE;
+
+typedef enum {
+ GpioInterrupt,
+ GpioIo
+} GPIO_CONNECTION_TYPE;
+
+typedef struct {
+ UINT8 I2cBusConnectionDescriptor; // 0x8E
+ UINT8 Length1;
+ UINT8 Length2;
+ UINT8 RevisionId;
+ UINT8 ResourceSourceIndex;
+ UINT8 SerialBusType; // 0x1 for I2C
+ UINT8 GeneralFlags;
+ UINT8 TypeSpecificFlags1;
+ UINT8 TypeSpecificFlags2;
+ UINT8 TypeSpecificRevisionId; // 0x1 for I2C
+ UINT8 TypeDataLength1; // minimum value 0x6
+ UINT8 TypeDataLength2; // minimum value 0x0
+ UINT32 ConnectionSpeed;
+ UINT16 SlaveAddress;
+ CHAR8 ResourceSource[15];
+} I2C_SERIAL_BUS_RESOURCE;
+
+typedef struct {
+ UINT8 ResourceType;
+ UINT16 GpioNumber;
+ UINT8 GpioResourceType;
+ BOOLEAN Shared;
+} GPIO_RESOURCE_DATA;
+
+typedef struct {
+ UINT8 ResourceType;
+ UINT32 I2cSlaveAddress;
+ UINT32 ConnectionSpeed;
+ UINT8 I2cSliceNumber;
+} I2C_RESOURCE_DATA;
+
+typedef struct {
+ CHAR8 DeviceName[4];
+ CHAR8 HardwareId[8];
+ CHAR8 CompatibilityId[8];
+ UINT32 UniqueId;
+ UINT8 Address;
+ CHAR8 DosDeviceName[32];
+ UINT8 EnableStatus;
+ UINT8 NumberOfResources;
+} SSDT_DEVICE_DATA;
+
+typedef struct {
+ EFI_GUID Guid;
+ UINT8 Revision;
+ UINT16 Count;
+ UINT8 Rsvd[5];
+} PCT_ACPI_BLOCK_HDR;
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.c b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.c
new file mode 100644
index 0000000000..3a70d0b1b7
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.c
@@ -0,0 +1,1716 @@
+/** @file
+ Advanced ACPI Driver
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include <Base.h>
+#include <Uefi.h>
+#include <Library/HobLib.h>
+#include <Guid/HobList.h>
+#include <Protocol/FirmwareVolume2.h>
+#include <PlatformBoardId.h>
+#include <IndustryStandard/AcpiAml.h>
+#include <IndustryStandard/Pci30.h>
+#include "AcpiPlatform.h"
+#include <Library/PciSegmentLib.h>
+#include <Library/PchInfoLib.h>
+#include <Library/PchPcieRpLib.h>
+#include <Library/GpioLib.h>
+#include <Library/EspiLib.h>
+#include <Library/PchPciBdfLib.h>
+#include <PlatformBoardConfig.h>
+#include <Library/CpuPlatformLib.h>
+#include <Protocol/VariableLock.h>
+#include <Mcfg.h>
+#include <Library/GraphicsInfoLib.h>
+#include "GenSsdtLib.h"
+// Global variables
+//
+GLOBAL_REMOVE_IF_UNREFERENCED VOID *mGfxNvsAddress;
+GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_NVS_AREA_PROTOCOL mPlatformNvsAreaProtocol;
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_IO2_PROTOCOL *mCpuIo;
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable;
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_APIC_ID_REORDER_MAP *mCpuApicIdReorderTable;
+GLOBAL_REMOVE_IF_UNREFERENCED UINTN mNumberOfCpus;
+GLOBAL_REMOVE_IF_UNREFERENCED UINTN mNumberOfEnabledCpus;
+GLOBAL_REMOVE_IF_UNREFERENCED BOOLEAN IsX2ApicMode;
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_CPU_PACKAGE_INFO mSbspPackageInfo;
+//
+// Function implementations
+//
+
+/**
+ Install Soc ACPI Table
+
+ @param[in] *SsdtTableGuid Pointer to GUID that identifies new SSDT table
+ @param[in] Signature Signature of the table
+
+**/
+VOID
+STATIC
+InstallSocAcpiTable (
+ IN EFI_GUID *SsdtTableGuid,
+ IN UINT64 Signature
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ UINTN Index;
+ INTN Instance;
+ UINTN Size;
+ UINT32 FvStatus;
+ UINTN TableHandle;
+ EFI_FV_FILETYPE FileType;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+ EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
+ EFI_ACPI_COMMON_HEADER *Table;
+
+ FwVol = NULL;
+ Table = NULL;
+
+ //
+ // Locate FV protocol.
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiFirmwareVolume2ProtocolGuid,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Look for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = gBS->HandleProtocol (
+ HandleBuffer[Index],
+ &gEfiFirmwareVolume2ProtocolGuid,
+ (VOID **) &FwVol
+ );
+ ASSERT_EFI_ERROR (Status);
+ if (FwVol == NULL) {
+ return;
+ }
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = FwVol->ReadFile (
+ FwVol,
+ SsdtTableGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+ if (!EFI_ERROR (Status)) {
+ break;
+ }
+ }
+ //
+ // Free any allocated buffers
+ //
+ FreePool (HandleBuffer);
+
+ //
+ // Sanity check that we found our data file
+ //
+ ASSERT (FwVol);
+
+ //
+ // Locate ACPI tables
+ //
+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **) &AcpiTable);
+
+ //
+ // Read tables from the storage file.
+ //
+ if (FwVol == NULL) {
+ ASSERT_EFI_ERROR (EFI_NOT_FOUND);
+ return;
+ }
+ Instance = 0;
+
+ while (Status == EFI_SUCCESS) {
+ //
+ // Read the ACPI tables
+ //
+ Status = FwVol->ReadSection (
+ FwVol,
+ SsdtTableGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ (VOID **) &Table,
+ &Size,
+ &FvStatus
+ );
+ if (!EFI_ERROR (Status)) {
+ TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
+
+ if (((EFI_ACPI_DESCRIPTION_HEADER *) TableHeader)->OemTableId == Signature) {
+ TableHandle = 0;
+ //
+ // Add the table
+ //
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ TableHeader,
+ TableHeader->Length,
+ &TableHandle
+ );
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ Table = NULL;
+ }
+ }
+}
+
+/**
+ Install Xhci ACPI Table
+**/
+VOID
+InstallXhciAcpiTable (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
+ EFI_ACPI_COMMON_HEADER *CurrentTable;
+ UINT32 FvStatus;
+ UINTN Size;
+ UINTN TableHandle;
+ INTN Instance;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+ EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
+ EFI_GUID EfiAcpiMultiTableStorageGuid;
+
+ EfiAcpiMultiTableStorageGuid = gAcpiTableStorageGuid;
+ Instance = 0;
+ TableHandle = 0;
+ CurrentTable = NULL;
+ FwVol = NULL;
+
+ DEBUG ((DEBUG_INFO, "InstallXhciAcpiTable\n"));
+ //
+ // Update OEM table ID
+ //
+ if (PcdGet64 (PcdXhciAcpiTableSignature) == 0) {
+ DEBUG ((DEBUG_INFO, "InstallXhciAcpiTable: Cannot find PcdXhciAcpiTableSignature\n"));
+ return;
+ }
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateSupportProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ EfiAcpiMultiTableStorageGuid,
+ (VOID **) &AcpiTable,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Locate the firmware volume protocol
+ //
+ Status = LocateSupportProtocol (
+ &gEfiFirmwareVolume2ProtocolGuid,
+ EfiAcpiMultiTableStorageGuid,
+ (VOID **) &FwVol,
+ TRUE
+ );
+
+ //
+ // Read tables from the storage file.
+ //
+ while (Status == EFI_SUCCESS) {
+ Status = FwVol->ReadSection (
+ FwVol,
+ &EfiAcpiMultiTableStorageGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ (VOID **) &CurrentTable,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+
+ TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) CurrentTable;
+
+ if (TableHeader->OemTableId == PcdGet64 (PcdXhciAcpiTableSignature)) {
+ DEBUG ((DEBUG_INFO, "Install xhci table: %x\n", TableHeader->OemTableId));
+ //
+ // Add the table
+ //
+ TableHandle = 0;
+
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ CurrentTable,
+ CurrentTable->Length,
+ &TableHandle
+ );
+
+ break;
+ }
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ gBS->FreePool (CurrentTable);
+ CurrentTable = NULL;
+ }
+ }
+
+ if (CurrentTable != NULL) {
+ gBS->FreePool (CurrentTable);
+ CurrentTable = NULL;
+ }
+}
+
+/**
+ Locate the first instance of a protocol. If the protocol requested is an
+ FV protocol, then it will return the first FV that contains the ACPI table
+ storage file.
+
+ @param[in] Protocol The protocol to find.
+ @param[in] Instance Return pointer to the first instance of the protocol.
+ @param[in] Type TRUE if the desired protocol is a FV protocol.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The protocol could not be located.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
+**/
+EFI_STATUS
+LocateSupportProtocol (
+ IN EFI_GUID *Protocol,
+ IN EFI_GUID gEfiAcpiMultiTableStorageGuid,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *HandleBuffer;
+ UINTN NumberOfHandles;
+ EFI_FV_FILETYPE FileType;
+ UINT32 FvStatus;
+ EFI_FV_FILE_ATTRIBUTES Attributes;
+ UINTN Size;
+ UINTN Index;
+
+ //
+ // Locate protocol.
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ Protocol,
+ NULL,
+ &NumberOfHandles,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ //
+ // Defined errors at this time are not found and out of resources.
+ //
+ return Status;
+ }
+
+ //
+ // Looking for FV with ACPI storage file
+ //
+ for (Index = 0; Index < NumberOfHandles; Index++) {
+
+ //
+ // Get the protocol on this handle
+ // This should not fail because of LocateHandleBuffer
+ //
+ Status = gBS->HandleProtocol (
+ HandleBuffer[Index],
+ Protocol,
+ Instance
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ if (!Type) {
+
+ //
+ // Not looking for the FV protocol, so find the first instance of the
+ // protocol. There should not be any errors because our handle buffer
+ // should always contain at least one or LocateHandleBuffer would have
+ // returned not found.
+ //
+ break;
+ }
+
+ //
+ // See if it has the ACPI storage file
+ //
+ Size = 0;
+ FvStatus = 0;
+ Status = ((EFI_FIRMWARE_VOLUME2_PROTOCOL *) (*Instance))->ReadFile (
+ *Instance,
+ &gEfiAcpiMultiTableStorageGuid,
+ NULL,
+ &Size,
+ &FileType,
+ &Attributes,
+ &FvStatus
+ );
+
+ //
+ // If we found it, then we are done
+ //
+ if (Status == EFI_SUCCESS) {
+ break;
+ }
+ }
+
+ //
+ // Our exit status is determined by the success of the previous operations
+ // If the protocol was found, Instance already points to it.
+ //
+ //
+ // Free any allocated buffers
+ //
+ FreePool (HandleBuffer);
+
+ return Status;
+}
+
+/**
+ This function will update any runtime platform specific information.
+ This currently includes:
+ Setting OEM table values, ID, table ID, creator ID and creator revision.
+ Enabling the proper processor entries in the APIC tables
+ It also indicates with which ACPI table version the table belongs.
+
+ @param[in] Table The table to update
+ @param[in] Version Where to install this table
+
+ @retval EFI_SUCCESS Updated tables commplete.
+**/
+EFI_STATUS
+PlatformUpdateTables (
+ IN OUT EFI_ACPI_COMMON_HEADER *Table,
+ IN OUT EFI_ACPI_TABLE_VERSION *Version
+ )
+{
+ EFI_ACPI_DESCRIPTION_HEADER *TableHeader;
+ UINT8 *CurrPtr;
+ UINT8 *TmpDsdtPointer;
+ UINT8 *EndPtr;
+ EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *ApicPtr;
+ EFI_STATUS Status;
+ EFI_MP_SERVICES_PROTOCOL *MpService;
+
+ UINT8 MaximumDsdtPointLength;
+
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ UINT32 LocalApicCounter;
+
+
+ CurrPtr = NULL;
+ EndPtr = NULL;
+ ApicPtr = NULL;
+
+ LocalApicCounter = 0;
+ MaximumDsdtPointLength = 20;
+
+ //
+ // This will be accurate except for FACS structure
+ //
+ TableHeader = (EFI_ACPI_DESCRIPTION_HEADER *) Table;
+
+ //
+ // Update the OEM and creator information for every table except FACS.
+ //
+ if (Table->Signature != EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) {
+ if ((Table->Signature == EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE) &&
+ (CompareMem (&TableHeader->OemId, "Rtd3", 4) == 0)) {
+ // For SsdtRtd3 table, "OemId" update is done later
+ } else {
+ CopyMem (TableHeader->OemId, PcdGetPtr (PcdAcpiDefaultOemId), sizeof (TableHeader->OemId));
+ }
+
+ //
+ // Skip OEM table ID and creator information for SSDT tables, since these are
+ // created by an ASL compiler and the creator information is useful.
+ //
+ if (Table->Signature != EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE) {
+ //
+ // Set through patchable PCD value
+ //
+ TableHeader->OemTableId = PcdGet64 (PcdAcpiDefaultOemTableId);
+ TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision);
+
+ //
+ // Update creator information
+ //
+ TableHeader->CreatorId = PcdGet32 (PcdAcpiDefaultCreatorId);
+ TableHeader->CreatorRevision = PcdGet32 (PcdAcpiDefaultCreatorRevision) ;
+ }
+ }
+
+ //
+ // Locate the PCI IO protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiPciRootBridgeIoProtocolGuid,
+ NULL,
+ (VOID **) &PciRootBridgeIo
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Locate the MP services protocol
+ // Find the MP Protocol. This is an MP platform, so MP protocol must be there.
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiMpServiceProtocolGuid,
+ NULL,
+ (VOID **) &MpService
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Get supported CPU Interrupt model (xApic or x2Apic)
+ //
+ IsX2ApicMode = (GetApicMode() == LOCAL_APIC_MODE_X2APIC) ? TRUE : FALSE;
+
+ //
+ // By default, a table belongs in all ACPI table versions published.
+ // Some tables will override this because they have different versions of the table.
+ //
+ *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | EFI_ACPI_TABLE_VERSION_3_0;
+
+ //
+ // Update the various table types with the necessary updates
+ //
+ switch (Table->Signature) {
+
+ case EFI_ACPI_1_0_APIC_SIGNATURE:
+ //
+ // if not MP and not APIC then don't publish the APIC tables.
+ //
+ //@todo mSystemConfiguration.ApicEnabled default value is 1. So, the following logic is not executed.
+ //if (mSystemConfiguration.ApicEnabled == 0) {
+ // *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ // break;
+ //}
+ CurrPtr = (UINT8 *) &((EFI_ACPI_DESCRIPTION_HEADER *) Table)[1];
+ CurrPtr = CurrPtr + 8;
+ //
+ // Size of Local APIC Address & Flag
+ //
+ EndPtr = (UINT8 *) Table;
+ EndPtr = EndPtr + Table->Length;
+
+ ApicPtr = (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *) CurrPtr;
+ DEBUG((DEBUG_INFO, "ApicPtr Type = %x \n ", ApicPtr->Type));
+ if ((IsX2ApicMode && ApicPtr->Type == EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC) ||(!IsX2ApicMode && ApicPtr->Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC)) {
+ // Lets skip the MADT table in below cases:
+ // 1. MADT table with Local APIC records when X2Apic Mode is enabled.
+ // 2. MADT table with x2Apic records when xApic Mode is enabled.
+
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ break;
+ }
+
+ //
+ // Call for Local APIC ID Reorder
+ //
+ SortCpuLocalApicInTable(MpService);
+
+ while (CurrPtr < EndPtr) {
+ ApicPtr = (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *) CurrPtr;
+
+ //
+ // Check table entry type
+ //
+ if ((ApicPtr->Type == EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC) || (ApicPtr->Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC)) {
+ AppendCpuMapTableEntry (
+ ApicPtr,
+ LocalApicCounter
+ );
+ LocalApicCounter++;
+ }
+
+ //
+ // Go to the next structure in the APIC table
+ //
+ CurrPtr = CurrPtr + ApicPtr->Length;
+ }
+ break;
+
+ case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE:
+ //
+ // Fix up all FACP Table values if configuration requires it.
+ // This code fixes up the following Table values:
+ // (1) C2/C3/CST Enable FACP values
+ // (2) RTC S4 Flag
+ //
+ {
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *FadtPointer;
+
+ FadtPointer = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
+
+ //
+ // Check the version of the table
+ //
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ if (FadtPointer->Header.Revision == EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ } else if (FadtPointer->Header.Revision == EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
+ *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0;
+ } else if (FadtPointer->Header.Revision == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
+ *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_3_0;
+ } else if (FadtPointer->Header.Revision == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
+ *Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_5_0;
+ } else if (FadtPointer->Header.Revision == EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
+ *Version = EFI_ACPI_TABLE_VERSION_5_0;
+ } else if (FadtPointer->Header.Revision == EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION) {
+ *Version = EFI_ACPI_TABLE_VERSION_5_0;
+ }
+
+
+ //
+ // Modify Preferred_PM_Profile field based on Board SKU's. Default is set to Mobile
+ //
+ FadtPointer->PreferredPmProfile = PcdGet8 (PcdPreferredPmProfile);
+
+
+ //
+ // PME WAKE supported, set PCI_EXP_WAK, BIT14 of Fixed feature flags.
+ //
+ FadtPointer->Flags |= (EFI_ACPI_6_0_PCI_EXP_WAK);
+
+ FadtPointer->Flags &= ~(EFI_ACPI_2_0_PWR_BUTTON); // clear indicates the power button is handled as a fixed feature programming model
+
+ //
+ // 1. set header revision.
+ //
+ FadtPointer->Header.Revision = EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION;
+
+ //
+ // 2. set all GAR register AccessSize to valid value.
+ //
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->ResetReg.AccessSize = EFI_ACPI_6_3_BYTE;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1aEvtBlk.AccessSize = EFI_ACPI_6_3_WORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1bEvtBlk.AccessSize = EFI_ACPI_6_3_WORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1aCntBlk.AccessSize = EFI_ACPI_6_3_WORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm1bCntBlk.AccessSize = EFI_ACPI_6_3_WORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPm2CntBlk.AccessSize = EFI_ACPI_6_3_BYTE;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XPmTmrBlk.AccessSize = EFI_ACPI_6_3_DWORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XGpe0Blk.AccessSize = EFI_ACPI_6_3_BYTE;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->XGpe1Blk.AccessSize = EFI_ACPI_6_3_BYTE;
+
+ //
+ // SLEEP_CONTROL_REG and SLEEP_STATUS_REG are optional
+ // Only implement in HW-Reduced ACPI system
+ // In non-HW-Reduced system will remain all 0 as default
+ //
+ if ((FadtPointer->Flags & EFI_ACPI_6_3_HW_REDUCED_ACPI) != 0) {
+ //
+ // If the HW_REDUCED_ACPI flag in the table is set, OSPM will ignore fields related to the ACPI HW
+ //
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.AddressSpaceId = 0x1;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.RegisterBitWidth = 0x8;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.RegisterBitOffset = 0;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.AccessSize = EFI_ACPI_6_3_DWORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepControlReg.Address = EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 4;
+
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.AddressSpaceId = 0x1;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.RegisterBitWidth = 0x8;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.RegisterBitOffset = 0;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.AccessSize = EFI_ACPI_6_3_DWORD;
+ ((EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *)FadtPointer)->SleepStatusReg.Address = EFI_ACPI_PM1A_EVT_BLK_ADDRESS;
+ }
+
+ //
+ // Set the S4BiosReq to 0 as we don't support it in the FACS for TGL.
+ //
+ FadtPointer->S4BiosReq = 0;
+
+ //@todo RtcS4WakeEnable and PmTimerEnable default value is 1. So, the following logic is not executed.
+ ////
+ //// Check if RTC S4 is enabled
+ ////
+ //if (!mSystemConfiguration.RtcS4WakeEnable) {
+
+ // //
+ // // Clear the S4 RTC flag
+ // //
+ // FadtPointer->Flags &= ~EFI_ACPI_2_0_RTC_S4;
+ //}
+
+ ////
+ //// Check if PM timer is enabled
+ ////
+ //if (!mSystemConfiguration.PmTimerEnable) {
+
+ // //
+ // // Clear the PM timer flag
+ // //
+ // FadtPointer->Flags &= ~EFI_ACPI_3_0_USE_PLATFORM_CLOCK;
+ //}
+ }
+ break;
+
+ case EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE:
+ //
+ // These items only belong in the 1.0 tables.
+ //
+ *Version = EFI_ACPI_TABLE_VERSION_1_0B;
+ break;
+
+ case EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE:
+ //
+ // Fix up the AML code in the DSDT affected by end user options.
+ // Fix up the following ASL Code:
+ // (1) ACPI Global NVS Memory Base and Size.
+ // (2) ACPI Graphics NVS Memory Base and Size.
+ // (3) SMBus I/O Base.
+ // (4) Thermal Management Methods.
+ //
+ {
+ UINT8 *DsdtPointer;
+ UINT32 *Signature;
+ UINT8 *Operation;
+ UINT32 *Address;
+ UINT8 *Value;
+ UINT16 *Size;
+ //
+ // Loop through the ASL looking for values that we must fix up.
+ //
+ CurrPtr = (UINT8 *) Table;
+ for (DsdtPointer = CurrPtr;
+ DsdtPointer < (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length - sizeof (UINT32));
+ DsdtPointer++
+ ) {
+ Signature = (UINT32 *) DsdtPointer;
+ switch (*Signature) {
+ //
+ // GNVS operation region
+ //
+ case (SIGNATURE_32 ('G', 'N', 'V', 'S')):
+ //
+ // Conditional match. For Region Objects, the Operator will always be the
+ // byte immediately before the specific name. Therefore, subtract 1 to check
+ // the Operator.
+ //
+ Operation = DsdtPointer - 1;
+ if (*Operation == AML_EXT_REGION_OP) {
+ Address = (UINT32 *) (DsdtPointer + 6);
+ *Address = (UINT32) (UINTN) mPlatformNvsAreaProtocol.Area;
+ Size = (UINT16 *) (DsdtPointer + 11);
+ *Size = sizeof (PLATFORM_NVS_AREA);
+ }
+ break;
+
+ //
+ // _UPC method for Device (\_SB.PC00.XHCI.RHUB)
+ //
+ case (SIGNATURE_32('H', 'S', '1', '3')):
+ for (TmpDsdtPointer = DsdtPointer;
+ TmpDsdtPointer <= DsdtPointer + MaximumDsdtPointLength;
+ TmpDsdtPointer++){
+ Signature = (UINT32 *) TmpDsdtPointer;
+ switch (*Signature) {
+ case(SIGNATURE_32('U', 'P', 'C', 'P')):
+ Value = (UINT8 *)((UINT32 *)TmpDsdtPointer + 2);
+ break;
+ default:
+ //
+ // Do nothing.
+ //
+ break;
+ }
+ }
+ break;
+
+
+
+ default:
+ //
+ // Do nothing.
+ //
+ break;
+ }
+ }
+ }
+ break;
+
+ case EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE:
+ break;
+
+ case EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE:
+ //
+ // Update MCFG base and end bus number
+ //
+ ((EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE *) Table)->AllocationStructure[0].BaseAddress
+ = PcdGet64 (PcdPciExpressBaseAddress);
+
+ ((EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE *) Table)->AllocationStructure[0].EndBusNumber
+ = (UINT8)(PcdGet32 (PcdPciExpressRegionLength) / 0x100000) - 1;
+
+
+ {
+ ((EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE *) Table)->Header.Length -= sizeof (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE);
+ }
+ break;
+
+ case EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE:
+ //
+ // If EC is not present, don't publish the table.
+ //
+ if (mPlatformNvsAreaProtocol.Area->EcAvailable == PLATFORM_NVS_DEVICE_DISABLE) {
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ }
+ break;
+
+/* @todo Need to uncomment once MSFT fully implements uPEP
+ case SIGNATURE_32 ('L', 'P', 'I', 'T'):
+ //
+ // If L0s is disabled in setup, don't publish the table.
+ //
+ if (mSystemConfiguration.LowPowerS0Idle == 0) {
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ }
+ break;
+*/
+ case EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE:
+ {
+ UINT8 *TablePointer;
+ UINT32 *Signature;
+
+ //
+ // Do not load the xHCI table. It is handled by separate function.
+ //
+ if (CompareMem (&TableHeader->OemTableId, "xh_", 3) == 0) {
+ DEBUG((DEBUG_INFO,"TableHeader->OemTableId = %x\n ", TableHeader->OemTableId));
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ }
+
+ //
+ // Load SSDT tables for the platforms based on boardID; default to RVP tables.
+ // Load Ther_Rvp for all others.
+ //
+ if (CompareMem (&TableHeader->OemTableId, "Ther_Rvp", 8) == 0) {
+ CurrPtr = (UINT8 *) Table;
+ for (TablePointer = CurrPtr;TablePointer < (CurrPtr + ((EFI_ACPI_COMMON_HEADER *) CurrPtr)->Length - sizeof (UINT32));TablePointer++)
+ {
+ Signature = (UINT32 *) TablePointer;
+ switch (*Signature) {
+ }
+ }
+ }
+
+ //
+ // Load RTD3 SSDT table for ADL RVP SKUs
+ // Note: "OemId" field is used to indentify whether SSDT table is for RTD3 usage
+ //
+ if ((CompareMem (&TableHeader->OemId, "Rtd3", 4) == 0)) {
+ //
+ // OemId should be replaced with PcdAcpiDefaultOemId
+ //
+ CopyMem (TableHeader->OemId, PcdGetPtr (PcdAcpiDefaultOemId), sizeof (TableHeader->OemId));
+ //
+ // set default = none
+ //
+ *Version = EFI_ACPI_TABLE_VERSION_NONE;
+ } // Load RTD3 SSDT table
+ }
+ break;
+
+ default:
+ break;
+ }
+ return EFI_SUCCESS;
+}
+
+/**
+ This function calculates RCR based on PCI Device ID and Vendor ID from the devices
+ available on the platform.
+ It also includes other instances of BIOS change to calculate CRC and provides as
+ HWSignature filed in FADT table.
+**/
+VOID
+IsHardwareChange (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ UINT32 CRC;
+ UINT32 *HWChange;
+ UINTN HWChangeSize;
+ UINT32 PciId;
+ UINTN Handle;
+ EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *FacsPtr;
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *pFADT;
+
+ HandleCount = 0;
+ HandleBuffer = NULL;
+
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiPciIoProtocolGuid,
+ NULL,
+ &HandleCount,
+ &HandleBuffer
+ );
+ if (EFI_ERROR (Status)) {
+ return; // PciIO protocol not installed yet!
+ }
+
+ if (HandleCount > 0x1FFF) { // PCI config space max limit
+ return;
+ }
+
+ //
+ // Allocate memory for HWChange and add additional entrie for
+ // pFADT->XDsdt
+ //
+ HWChangeSize = HandleCount + 1;
+ HWChange = AllocateZeroPool( sizeof(UINT32) * HWChangeSize );
+ ASSERT( HWChange != NULL );
+
+ if (HWChange == NULL) return;
+
+ //
+ // add HWChange inputs: PCI devices
+ //
+ for (Index = 0; HandleCount > 0; HandleCount--) {
+ PciId = 0;
+ Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID **) &PciIo);
+ if (!EFI_ERROR (Status)) {
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0, 1, &PciId);
+ if (EFI_ERROR (Status)) {
+ continue;
+ }
+ HWChange[Index++] = PciId;
+ }
+ }
+
+ //
+ // Locate FACP Table
+ //
+ Handle = 0;
+ Status = LocateAcpiTableBySignature (
+ EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ (EFI_ACPI_DESCRIPTION_HEADER **) &pFADT,
+ &Handle
+ );
+ if (EFI_ERROR (Status) || (pFADT == NULL)) {
+ return; //Table not found or out of memory resource for pFADT table
+ }
+
+ //
+ // add HWChange inputs: others
+ //
+ HWChange[Index++] = (UINT32)pFADT->XDsdt;
+
+ //
+ // Calculate CRC value with HWChange data.
+ //
+ Status = gBS->CalculateCrc32(HWChange, sizeof(UINT32) * HWChangeSize, &CRC);
+ DEBUG((DEBUG_INFO,"CRC = %x and Status = %r\n", CRC, Status));
+
+ //
+ // Set HardwareSignature value based on CRC value.
+ //
+ FacsPtr = (EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)(UINTN)pFADT->FirmwareCtrl;
+ FacsPtr->HardwareSignature = CRC;
+ FreePool( HWChange );
+}
+
+EFI_STATUS
+PublishAcpiTablesFromFv (
+ IN EFI_GUID gEfiAcpiMultiTableStorageGuid
+ )
+{
+ EFI_STATUS Status;
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol;
+ EFI_ACPI_COMMON_HEADER *CurrentTable;
+ UINT32 FvStatus;
+ UINTN Size;
+ EFI_ACPI_TABLE_VERSION Version;
+ UINTN TableHandle;
+ INTN Instance;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+
+ Instance = 0;
+ TableHandle = 0;
+ CurrentTable = NULL;
+ FwVol = NULL;
+
+ //
+ // Find the AcpiSupport protocol
+ //
+ Status = LocateSupportProtocol (
+ &gEfiAcpiTableProtocolGuid,
+ gEfiAcpiMultiTableStorageGuid,
+ (VOID **) &AcpiTable,
+ FALSE
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Locate the firmware volume protocol
+ //
+ Status = LocateSupportProtocol (
+ &gEfiFirmwareVolume2ProtocolGuid,
+ gEfiAcpiMultiTableStorageGuid,
+ (VOID **) &FwVol,
+ TRUE
+ );
+
+ /* TODO: Hang at native mode. Need to find the cause
+ * when the related drivers are finished for native support. */
+ //ASSERT_EFI_ERROR (Status);
+
+ //
+ // Read tables from the storage file.
+ //
+ while (Status == EFI_SUCCESS) {
+ Status = FwVol->ReadSection (
+ FwVol,
+ &gEfiAcpiMultiTableStorageGuid,
+ EFI_SECTION_RAW,
+ Instance,
+ (VOID **) &CurrentTable,
+ &Size,
+ &FvStatus
+ );
+
+ if (!EFI_ERROR (Status)) {
+
+ //
+ // Perform any table specific updates.
+ //
+ PlatformUpdateTables (CurrentTable, &Version);
+
+ //
+ // Add the table
+ //
+ TableHandle = 0;
+
+ if (Version != EFI_ACPI_TABLE_VERSION_NONE) {
+ DEBUG((DEBUG_INFO, "[Advanced ACPI] Installing table: %x : %x\n", CurrentTable->Signature, CurrentTable));
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ CurrentTable,
+ CurrentTable->Length,
+ &TableHandle
+ );
+ }
+
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Increment the instance
+ //
+ Instance++;
+ gBS->FreePool (CurrentTable);
+ CurrentTable = NULL;
+ }
+
+ if (CurrentTable != NULL) {
+ gBS->FreePool (CurrentTable);
+ CurrentTable = NULL;
+ }
+ }
+
+ //
+ // Finished
+ //
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Allocate MemoryType below 4G memory address.
+
+ @param[in] Size - Size of memory to allocate.
+ @param[in] Buffer - Allocated address for output.
+
+ @retval EFI_SUCCESS - Memory successfully allocated.
+ @retval Other - Other errors occur.
+
+**/
+EFI_STATUS
+AllocateMemoryBelow4G (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ )
+{
+ UINTN Pages;
+ EFI_PHYSICAL_ADDRESS Address;
+ EFI_STATUS Status;
+
+ Pages = EFI_SIZE_TO_PAGES (Size);
+ Address = 0xffffffff;
+
+ Status = (gBS->AllocatePages) (
+ AllocateMaxAddress,
+ MemoryType,
+ Pages,
+ &Address
+ );
+
+ *Buffer = (VOID *) (UINTN) Address;
+
+ return Status;
+}
+
+
+VOID
+EFIAPI
+AcpiEndOfDxeEvent (
+ EFI_EVENT Event,
+ VOID *ParentImageHandle
+ )
+{
+
+ if (Event != NULL) {
+ gBS->CloseEvent(Event);
+ }
+
+
+ //
+ // Install xHCI SSDT ACPI Table
+ //
+ InstallXhciAcpiTable ();
+
+ //
+ // Install Soc Gpe SSDT ACPI Table
+ //
+ InstallSocAcpiTable (&gSocGpeSsdtAcpiTableStorageGuid, SIGNATURE_64 ('S', 'o', 'c', 'G', 'p', 'e', ' ', 0));
+
+ //
+ // Install Soc Common SSDT ACPI Table
+ //
+ InstallSocAcpiTable (&gSocCmnSsdtAcpiTableStorageGuid, SIGNATURE_64 ('S', 'o', 'c', 'C', 'm', 'n', ' ', 0));
+
+ //
+ // Calculate Hardware Signature value based on current platform configurations
+ //
+ IsHardwareChange();
+
+}
+
+/**
+ Convert string containing GUID in the canonical form:
+ "aabbccdd-eeff-gghh-iijj-kkllmmnnoopp"
+ where aa - pp are unicode hexadecimal digits
+ to the buffer format to be used in ACPI, byte ordering:
+ [Byte 0] gg, hh, ee, ff, aa, bb, cc, dd [Byte 7]
+ [Byte 8] pp, oo, nn, mm, ll, kk, jj, ii [Byte 16]
+
+ @param[in] GuidString - GUID String null terminated (aligned on a 16-bit boundary)
+ @param[out] AcpiGuidPart1 - First half of buffer (bytes 0 - 7)
+ @param[out] AcpiGuidPart2 - Second half of buffer (bytes 8 - 16)
+
+ @retval EFI_SUCCESS - String converted successfully.
+ @retval EFI_UNSUPPORTED - Wrong input string format.
+
+**/
+EFI_STATUS
+GuidStringToAcpiBuffer (
+ IN CHAR16 *GuidString,
+ OUT UINT64 *AcpiGuidPart1,
+ OUT UINT64 *AcpiGuidPart2
+ )
+{
+ UINT32 GuidTempPart32 = 0;
+ UINT16 GuidTempPart16 = 0;
+ UINT8 GuidPartIndex;
+
+ DEBUG((DEBUG_INFO,"GuidStringToAcpiBuffer() - GUID = %s\n", GuidString));
+
+ for (GuidPartIndex = 0; GuidPartIndex < 4; GuidPartIndex++) {
+ switch (GuidPartIndex){
+ case 0:
+ GuidTempPart32 = SwapBytes32((UINT32)StrHexToUint64(GuidString));
+ *AcpiGuidPart1 = ((UINT64)GuidTempPart32 << 0x20);
+ break;
+ case 1:
+ GuidTempPart16 = SwapBytes16((UINT16)StrHexToUint64(GuidString));
+ *AcpiGuidPart1 += ((UINT64)GuidTempPart16 << 0x10);
+ break;
+ case 2:
+ GuidTempPart16 = SwapBytes16((UINT16)StrHexToUint64(GuidString));
+ *AcpiGuidPart1 += ((UINT64)GuidTempPart16);
+ break;
+ case 3:
+ GuidTempPart16 = (UINT16)StrHexToUint64(GuidString);
+ break;
+ default:
+ return EFI_UNSUPPORTED;
+ }
+
+ while ((*GuidString != L'-') && (*GuidString != L'\0')) {
+ GuidString++;
+ }
+
+ if (*GuidString == L'-') {
+ GuidString++;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+ }
+
+ *AcpiGuidPart2 = ((UINT64)GuidTempPart16 << 0x30) + StrHexToUint64(GuidString);
+
+ // Switch endianess because it will be swapped again in ACPI Buffer object
+ *AcpiGuidPart1 = SwapBytes64(*AcpiGuidPart1);
+ *AcpiGuidPart2 = SwapBytes64(*AcpiGuidPart2);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ ACPI Platform driver installation function.
+
+ @param[in] ImageHandle Handle for this drivers loaded image protocol.
+ @param[in] SystemTable EFI system table.
+
+ @retval EFI_SUCCESS The driver installed without error.
+ @retval EFI_ABORTED The driver encountered an error and could not complete installation of
+ the ACPI tables.
+
+**/
+EFI_STATUS
+EFIAPI
+InstallAcpiPlatform (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ CPUID_VERSION_INFO_EAX CpuidVersionInfoEax;
+ EFI_MP_SERVICES_PROTOCOL *MpService;
+ EFI_EVENT EndOfDxeEvent;
+
+
+
+ Handle = NULL;
+ mCpuApicIdOrderTable = NULL;
+ mCpuApicIdReorderTable = NULL;
+
+ AsmCpuid (
+ CPUID_VERSION_INFO,
+ &CpuidVersionInfoEax.Uint32,
+ NULL,
+ NULL,
+ NULL
+ );
+
+ //
+ // Locate the MP services protocol
+ // Find the MP Protocol. This is an MP platform, so MP protocol must be there.
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiMpServiceProtocolGuid,
+ NULL,
+ (VOID **) &MpService
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ //
+ // Determine the number of processors
+ //
+ MpService->GetNumberOfProcessors (
+ MpService,
+ &mNumberOfCpus,
+ &mNumberOfEnabledCpus
+ );
+
+ DEBUG ((DEBUG_INFO, "mNumberOfCpus - %x,mNumberOfEnabledCpus - %x\n", mNumberOfCpus, mNumberOfEnabledCpus));
+ mCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP));
+ if (mCpuApicIdOrderTable == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+ mCpuApicIdReorderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_APIC_ID_REORDER_MAP));
+ if (mCpuApicIdReorderTable == NULL) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Allocate and initialize the NVS area for SMM and ASL communication.
+ //
+ AcpiGnvsInit((VOID **) &mPlatformNvsAreaProtocol.Area);
+
+ //
+ // Create an End of DXE event.
+ //
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ AcpiEndOfDxeEvent,
+ NULL,
+ &gEfiEndOfDxeEventGroupGuid,
+ &EndOfDxeEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &Handle,
+ &gPlatformNvsAreaProtocolGuid,
+ &mPlatformNvsAreaProtocol,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Allocate NVS area for VBIOS. This is not currently used.
+ //
+ Status = AllocateMemoryBelow4G (
+ EfiACPIMemoryNVS,
+ 0x10000,
+ &mGfxNvsAddress
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Generate ACPI tables from configuration data
+ //
+ Status = GenerateSsdtFromConfigFile();
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Platform ACPI Tables
+ //
+ PublishAcpiTablesFromFv(gAcpiTableStorageGuid);
+
+ //
+ // Reference Code ACPI Tables
+ //
+ PublishAcpiTablesFromFv(gRcAcpiTableStorageGuid);
+
+
+ //
+ // Finished
+ //
+ return EFI_SUCCESS;
+}
+
+/**
+ Sort ordering of CPUs according to the priorities of cores and threads.
+ ** ASSUMPTION: 1) single CPU package systsem wide; 2) two threads per core
+
+ @param[in] MpService The MP servicde protocol (used to retrievel MP info)
+
+ @retval EFI_SUCCESS The driver installed without error.
+
+**/
+EFI_STATUS
+SortCpuLocalApicInTable (
+ IN EFI_MP_SERVICES_PROTOCOL *MpService
+ )
+{
+ EFI_PROCESSOR_INFORMATION *MpContext;
+ UINT8 Index;
+ UINTN BspIndex;
+ UINT8 CurrProcessor;
+ EFI_STATUS Status;
+ UINT8 MaxCpuCore;
+ UINT8 MaxCpuThread;
+
+ MpContext = NULL;
+ MaxCpuCore = 0;
+ MaxCpuThread = 0;
+
+ Status = MpService->WhoAmI (
+ MpService,
+ &BspIndex
+ );
+
+ //
+ // Fill mCpuApicIdOrderTable
+ //
+ for (CurrProcessor = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) {
+
+ MpContext = AllocatePool (sizeof(EFI_PROCESSOR_INFORMATION));
+ ASSERT (MpContext != NULL);
+ Status = MpService->GetProcessorInfo (
+ MpService,
+ CurrProcessor,
+ MpContext
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ if (MpContext == NULL) {
+ return Status;
+ }
+ mCpuApicIdOrderTable[CurrProcessor].ApicId = (UINT32) MpContext->ProcessorId;
+ DEBUG((DEBUG_INFO, "The CurrProcessor 0x%x ApicId is 0x%x\n", CurrProcessor, mCpuApicIdOrderTable[CurrProcessor].ApicId));
+ mCpuApicIdOrderTable[CurrProcessor].Flags = (MpContext->StatusFlag & PROCESSOR_ENABLED_BIT)? 1: 0;
+ mCpuApicIdOrderTable[CurrProcessor].Package = (UINT8) MpContext->Location.Package;
+ mCpuApicIdOrderTable[CurrProcessor].Die = (UINT8) 0;
+ mCpuApicIdOrderTable[CurrProcessor].Core = (UINT8) MpContext->Location.Core;
+ mCpuApicIdOrderTable[CurrProcessor].Thread = (UINT8) MpContext->Location.Thread;
+
+ if (MaxCpuThread < (UINT8) MpContext->Location.Thread) {
+ MaxCpuThread = (UINT8) MpContext->Location.Thread;
+ }
+
+ if (MaxCpuCore < (UINT8) MpContext->Location.Core) {
+ MaxCpuCore = (UINT8) MpContext->Location.Core;
+ }
+ }
+
+ //
+ // Do some statistics about the SBSP package
+ //
+ for (CurrProcessor = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) {
+ if (CurrProcessor == BspIndex) {
+ mSbspPackageInfo.BspApicId = mCpuApicIdOrderTable[CurrProcessor].ApicId;
+ mSbspPackageInfo.PackageNo = mCpuApicIdOrderTable[CurrProcessor].Package;
+ mSbspPackageInfo.TotalThreads = 0;
+ mSbspPackageInfo.CoreNo = 0;
+ mSbspPackageInfo.LogicalThreadNo = 0;
+ }
+ }
+
+ for (CurrProcessor = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) {
+ if (mCpuApicIdOrderTable[CurrProcessor].Package == mSbspPackageInfo.PackageNo) {
+ mSbspPackageInfo.TotalThreads++;
+ if (mCpuApicIdOrderTable[CurrProcessor].Thread == 0) {
+ mSbspPackageInfo.CoreNo++;
+ } else {
+ mSbspPackageInfo.LogicalThreadNo++;
+ }
+ }
+ }
+
+ //
+ // Output debug info
+ //
+ for (Index = 0; Index < mNumberOfCpus; Index++) {
+ DEBUG((DEBUG_INFO, "Package = %x, Die = %x, Core = %x, Thread = %x, ApicId = %x\n", \
+ mCpuApicIdOrderTable[Index].Package, \
+ mCpuApicIdOrderTable[Index].Die, \
+ mCpuApicIdOrderTable[Index].Core, \
+ mCpuApicIdOrderTable[Index].Thread, \
+ mCpuApicIdOrderTable[Index].ApicId));
+ }
+
+ DEBUG((DEBUG_INFO, "MaxCpuCore = %x\n", MaxCpuCore));
+ DEBUG((DEBUG_INFO, "MaxCpuThread = %x\n\n", MaxCpuThread));
+ DEBUG((DEBUG_INFO, "mSbspPackageInfo.BspApicId = %x\n", mSbspPackageInfo.BspApicId));
+ DEBUG((DEBUG_INFO, "mSbspPackageInfo.TotalThreads = %x\n", mSbspPackageInfo.TotalThreads));
+ DEBUG((DEBUG_INFO, "mSbspPackageInfo.PackageNo = %x\n", mSbspPackageInfo.PackageNo));
+ DEBUG((DEBUG_INFO, "mSbspPackageInfo.CoreNo = %x\n", mSbspPackageInfo.CoreNo));
+ DEBUG((DEBUG_INFO, "mSbspPackageInfo.LogicalThreadNo = %x\n", mSbspPackageInfo.LogicalThreadNo));
+
+ //
+ // First entry is always SBSP
+ //
+ CurrProcessor = 0;
+ mCpuApicIdReorderTable[CurrProcessor].ApicId = mSbspPackageInfo.BspApicId;
+ mCpuApicIdReorderTable[CurrProcessor].Package = mSbspPackageInfo.PackageNo;
+ mCpuApicIdReorderTable[CurrProcessor].Flags = 1;
+ CurrProcessor++;
+
+ //
+ // Output debug info
+ //
+ for (Index = 0; Index < mNumberOfCpus; Index++) {
+ DEBUG((DEBUG_INFO, "Index = %x, ApicId = %x, Package = %x\n", \
+ Index, \
+ mCpuApicIdOrderTable[Index].ApicId, \
+ mCpuApicIdOrderTable[Index].Package));
+ }
+
+ FreePool (MpContext);
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+AppendCpuMapTableEntry (
+ IN EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *AcpiLocalApic,
+ IN UINT32 LocalApicCounter
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE *LocalX2ApicPtr;
+
+ if (AcpiLocalApic->Type == EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC) {
+ if (LocalApicCounter < mNumberOfCpus) {
+ AcpiLocalApic->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
+ AcpiLocalApic->ApicId = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].ApicId;
+ //
+ // Make AcpiProcessorIds 0-based
+ //
+ AcpiLocalApic->AcpiProcessorId = (UINT8)LocalApicCounter;
+ } else {
+ AcpiLocalApic->Flags = 0;
+ AcpiLocalApic->ApicId = 0xFF;
+ //
+ // Make AcpiProcessorIds 0-based
+ //
+ AcpiLocalApic->AcpiProcessorId = (UINT8)LocalApicCounter;
+ Status = EFI_UNSUPPORTED;
+ }
+
+ //
+ // Display the results
+ //
+ DEBUG((DEBUG_INFO, "AcpiLocalApic: AcpiProcessorId=%x, ApicId=%x, Flags=%x\n", \
+ AcpiLocalApic->AcpiProcessorId, \
+ AcpiLocalApic->ApicId, \
+ AcpiLocalApic->Flags));
+ } else if (AcpiLocalApic->Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC) {
+ LocalX2ApicPtr = (EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE *)AcpiLocalApic;
+ if (LocalApicCounter < mNumberOfCpus) {
+ LocalX2ApicPtr->Flags = (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
+ LocalX2ApicPtr->X2ApicId = mCpuApicIdOrderTable[LocalApicCounter].ApicId;
+ LocalX2ApicPtr->AcpiProcessorUid = LocalApicCounter;
+ } else {
+ LocalX2ApicPtr->Flags = 0;
+ LocalX2ApicPtr->X2ApicId = (UINT32)-1;
+ LocalX2ApicPtr->AcpiProcessorUid = LocalApicCounter;
+ Status = EFI_UNSUPPORTED;
+ }
+ //
+ // Display the results
+ //
+ DEBUG((DEBUG_INFO, "AcpiLocalx2Apic: AcpiProcessorId=%x, ApicId=%x, Flags=%x\n", \
+ LocalX2ApicPtr->AcpiProcessorUid, \
+ LocalX2ApicPtr->X2ApicId, \
+ LocalX2ApicPtr->Flags));
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+ return Status;
+}
+
+/**
+ I/O work flow to wait input buffer empty in given time.
+
+ @param[in] Timeout Wating time.
+
+ @retval EFI_TIMEOUT if input is still not empty in given time.
+ @retval EFI_SUCCESS input is empty.
+**/
+EFI_STATUS
+WaitInputEmpty (
+ IN UINTN Timeout
+ )
+{
+ UINTN Delay;
+ UINT8 Data;
+
+ Delay = Timeout / 50;
+
+ do {
+ Data = IoRead8 (KBC_CMD_STS_PORT);
+
+ //
+ // Check keyboard controller status bit 0 and 1 (Output Buffer and Input Buffer status)
+ //
+ if ((Data & KBC_OUTB) != 0) {
+ IoRead8 (KBC_DATA_PORT);
+ } else if ((Data & KBC_INPB) == 0) {
+ break;
+ }
+
+ gBS->Stall (50);
+ Delay--;
+ } while (Delay != 0);
+
+ if (Delay == 0) {
+ return EFI_TIMEOUT;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ I/O work flow to wait output buffer full in given time.
+
+ @param[in] Timeout given time
+
+ @retval EFI_TIMEOUT output is not full in given time
+ @retval EFI_SUCCESS output is full in given time.
+**/
+EFI_STATUS
+WaitOutputFull (
+ IN UINTN Timeout
+ )
+{
+ UINTN Delay;
+ UINT8 Data;
+
+ Delay = Timeout / 50;
+
+ do {
+ Data = IoRead8 (KBC_CMD_STS_PORT);
+
+ //
+ // Check keyboard controller status bit 0(output buffer status)
+ // & bit5(output buffer for auxiliary device)
+ //
+ if ((Data & (KBC_OUTB | KBC_AUXB)) == (KBC_OUTB | KBC_AUXB)) {
+ break;
+ }
+
+ gBS->Stall (50);
+ Delay--;
+ } while (Delay != 0);
+
+ if (Delay == 0) {
+ return EFI_TIMEOUT;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ I/O work flow of in 8042 Aux data.
+
+ @param Data Buffer holding return value.
+
+ @retval EFI_SUCCESS Success to excute I/O work flow
+ @retval EFI_TIMEOUT Keyboard controller time out.
+**/
+EFI_STATUS
+In8042AuxData (
+ IN OUT UINT8 *Data
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // wait for output data
+ //
+ Status = WaitOutputFull (BAT_TIMEOUT);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ *Data = IoRead8 (KBC_DATA_PORT);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ I/O work flow of outing 8042 Aux command.
+
+ @param Command Aux I/O command
+
+ @retval EFI_SUCCESS Success to excute I/O work flow
+ @retval EFI_TIMEOUT Keyboard controller time out.
+**/
+EFI_STATUS
+Out8042AuxCommand (
+ IN UINT8 Command
+ )
+{
+ EFI_STATUS Status;
+ UINT8 Data;
+
+ //
+ // Wait keyboard controller input buffer empty
+ //
+ Status = WaitInputEmpty (TIMEOUT);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ //
+ // Send write to auxiliary device command
+ //
+ Data = WRITE_AUX_DEV;
+ IoWrite8 (KBC_CMD_STS_PORT, Data);
+
+ Status = WaitInputEmpty (TIMEOUT);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ //
+ // Send auxiliary device command
+ //
+ IoWrite8 (KBC_DATA_PORT, Command);
+
+ //
+ // Read return code
+ //
+ Status = In8042AuxData (&Data);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if (Data == PS2_ACK) {
+ //
+ // Receive mouse acknowledge, command send success
+ //
+ return EFI_SUCCESS;
+
+ } else if (Data == PS2_RESEND) {
+ //
+ // Resend command
+ //
+ Status = Out8042AuxCommand (Command);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ } else {
+ //
+ // Invalid return code
+ //
+ return EFI_DEVICE_ERROR;
+
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Issue command to enable Ps2 mouse.
+
+ @return Status of command issuing.
+**/
+EFI_STATUS
+PS2MouseEnable (
+ VOID
+ )
+{
+ //
+ // Send auxiliary command to enable mouse
+ //
+ return Out8042AuxCommand (ENABLE_CMD);
+}
+
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.h
new file mode 100644
index 0000000000..11b21cd675
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AcpiPlatform.h
@@ -0,0 +1,142 @@
+/** @file
+ This is an implementation of the Advanced ACPI driver.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _ACPI_PLATFORM_H_
+#define _ACPI_PLATFORM_H_
+
+//
+// Statements that include other header files
+//
+
+#include <IndustryStandard/Acpi.h>
+#include <Guid/EventGroup.h>
+#include <Guid/GlobalVariable.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/LocalApicLib.h>
+#include <Protocol/CpuIo2.h>
+#include <Protocol/AcpiTable.h>
+#include <Protocol/PciRootBridgeIo.h>
+#include <Protocol/MpService.h>
+#include <Register/Cpuid.h>
+#include <Protocol/PciIo.h>
+#include <Library/PchCycleDecodingLib.h>
+
+#include <IndustryStandard/HighPrecisionEventTimerTable.h>
+#include <Library/DxeAcpiGnvsInitLib.h>
+
+#include <Register/PchRegs.h>
+
+//
+// Produced protocols
+//
+#include <Protocol/PlatformNvsArea.h>
+
+#include <Platform.h>
+#include <Library/AslUpdateLib.h>
+
+#include <Acpi/AcpiTables/Fadt/Fadt6.3.h>
+
+//
+// ACPI table information used to initialize tables.
+//
+
+#define NAT_CONFIG_INDEX 0x2E
+#define NAT_CONFIG_DATA 0x2F
+#define WPCN381U_CONFIG_INDEX 0x2E
+#define WPCN381U_CONFIG_DATA 0x2F
+#define WPCN381U_CHIP_ID 0xF4
+#define WDCP376_CHIP_ID 0xF1
+
+#define KBC_DATA_PORT 0x60
+#define KBC_CMD_STS_PORT 0x64
+
+#define ENABLE_CMD 0xf4
+#define WRITE_AUX_DEV 0xd4
+
+#define PS2_ACK 0xfa
+#define PS2_RESEND 0xfe
+
+#define KBC_INPB 0x02
+#define KBC_OUTB 0x01
+#define KBC_AUXB 0x20
+
+#define TIMEOUT 50000
+#define BAT_TIMEOUT 5000
+
+#define IO_EXPANDER_DISABLED 0xFF
+
+typedef struct {
+ UINT32 ApicId;
+ UINT32 Flags;
+ UINT8 Package;
+ UINT8 Die;
+ UINT8 Core;
+ UINT8 Thread;
+} EFI_CPU_ID_ORDER_MAP;
+
+typedef struct {
+ UINT8 Package;
+ UINT32 ApicId;
+ UINT32 Flags;
+} EFI_CPU_APIC_ID_REORDER_MAP;
+
+typedef struct {
+ UINT32 BspApicId;
+ UINT8 TotalThreads;
+ UINT8 PackageNo;
+ UINT8 CoreNo;
+ UINT8 LogicalThreadNo;
+} EFI_CPU_PACKAGE_INFO;
+
+//
+// Function definitions
+//
+EFI_STATUS
+LocateSupportProtocol (
+ IN EFI_GUID *Protocol,
+ IN EFI_GUID gEfiAcpiMultiTableStorageGuid,
+ OUT VOID **Instance,
+ IN BOOLEAN Type
+ );
+
+/**
+ Entry point of the ACPI platform driver.
+
+ @param[in] ImageHandle A handle for the image that is initializing this driver
+ @param[in] SystemTable A pointer to the EFI system table
+
+ @retval EFI_SUCCESS The driver installed without error.
+ @retval EFI_ABORTED The driver encountered an error and could not complete
+ installation of the ACPI tables.
+**/
+EFI_STATUS
+EFIAPI
+InstallAcpiPlatform (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+EFI_STATUS
+SortCpuLocalApicInTable (
+ IN EFI_MP_SERVICES_PROTOCOL *MpService
+ );
+
+EFI_STATUS
+AppendCpuMapTableEntry (
+ IN EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE *AcpiLocalApic,
+ IN UINT32 LocalApicCounter
+ );
+
+#endif
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AdvancedAcpiDxe.inf b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AdvancedAcpiDxe.inf
new file mode 100644
index 0000000000..0e38852fbf
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/AdvancedAcpiDxe.inf
@@ -0,0 +1,154 @@
+### @file
+# Component information file for AdvancedAcpiDxe module
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+# @par Glossary:
+###
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = AdvancedAcpiDxe
+ FILE_GUID = C3E69EB2-0429-4BD6-AE4A-8CA02FBACC2E
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = InstallAcpiPlatform
+
+[Sources.common]
+ AcpiPlatform.h
+ AcpiPlatform.c
+ GenSsdtLib.c
+ GenSsdtLib.h
+ AcpiByteStream.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+ AlderlakeSiliconPkg/SiPkg.dec
+ AlderlakeOpenBoardPkg/OpenBoardPkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+
+[LibraryClasses]
+ UefiDriverEntryPoint
+ BaseLib
+ DebugLib
+ IoLib
+ PcdLib
+ AslUpdateLib
+ DxeAcpiGnvsInitLib
+ UefiBootServicesTableLib
+ UefiRuntimeServicesTableLib
+ BaseMemoryLib
+ MemoryAllocationLib
+ PchCycleDecodingLib
+ PchInfoLib
+ PchPcieRpLib
+ PciSegmentLib
+ HobLib
+ GpioLib
+ EspiLib
+ CpuPlatformLib
+ GraphicsInfoLib
+ PchPciBdfLib
+ LocalApicLib
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdRealBattery1Control ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdRealBattery2Control ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdNCT6776FCOM ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdNCT6776FSIO ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdNCT6776FHWMON ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdH8S2113SIO ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdH8S2113UAR ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdSmcRuntimeSciPin ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdVirtualButtonVolumeUpSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdVirtualButtonVolumeDownSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdVirtualButtonHomeButtonSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdVirtualButtonRotationLockSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdSlateModeSwitchSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdPmPowerButtonGpioPin ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdAcpiEnableAllButtonSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdAcpiHidDriverButtonSupport ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdTsOnDimmTemperature ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBatteryPresent ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId
+
+ # DXE PCD
+ gBoardModuleTokenSpaceGuid.PcdXhciAcpiTableSignature ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdPreferredPmProfile ## CONSUMES
+
+ gBoardModuleTokenSpaceGuid.PcdBoardRtd3TableSignature ## CONSUMES
+
+ gBoardModuleTokenSpaceGuid.PcdEnableVoltageMargining ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdPlatformGeneration ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBoardId ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBoardRev ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBoardType ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdPlatformType ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdPlatformFlavor ## CONSUMES
+
+ gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio1 ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio2 ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio3 ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdBoardUcmcGpio4 ## CONSUMES
+
+ # Onboard MR 1 GPIO configuration PCDs
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr1PowerEnableGpioNo ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr1PowerEnableGpioPolarity ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr1WakeGpioPin ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr1RootPort ## CONSUMES
+
+ # Onboard MR 2 GPIO configuration PCDs
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr2PowerEnableGpioNo ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr2PowerEnableGpioPolarity ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr2WakeGpioPin ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdOnBoardMr2RootPort ## CONSUMES
+
+ # PCH SATA port GPIO configuration PCDs
+ gBoardModuleTokenSpaceGuid.PcdPchSataPortPwrEnableGpioNo ## CONSUMES
+ gBoardModuleTokenSpaceGuid.PcdPchSataPortPwrEnableGpioPolarity ## CONSUMES
+
+ # ACPI configuration file data
+ gBoardModuleTokenSpaceGuid.PcdBoardAcpiData ## CONSUMES
+
+[FixedPcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress
+ gSiPkgTokenSpaceGuid.PcdAdlLpSupport ## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdAdlSSupport ## CONSUMES
+
+[Protocols]
+ gEfiAcpiTableProtocolGuid ## CONSUMES
+ gEfiFirmwareVolume2ProtocolGuid ## CONSUMES
+ gEfiPciRootBridgeIoProtocolGuid ## CONSUMES
+ gEfiMpServiceProtocolGuid ## CONSUMES
+ gEfiPciIoProtocolGuid ## CONSUMES
+ gIgdOpRegionProtocolGuid ## CONSUMES
+ gPchSerialIoUartDebugInfoProtocolGuid ## CONSUMES
+ gEfiCpuIo2ProtocolGuid ## CONSUMES
+ gEfiSimpleFileSystemProtocolGuid ## CONSUMES
+ gPlatformNvsAreaProtocolGuid ## PRODUCES
+
+[Guids]
+ gAcpiTableStorageGuid ## CONSUMES
+ gRcAcpiTableStorageGuid ## CONSUMES
+ gEfiHobListGuid ## CONSUMES
+ gEfiFileInfoGuid ## CONSUMES
+ gEfiEndOfDxeEventGroupGuid ## CONSUMES
+ gSocGpeSsdtAcpiTableStorageGuid ## CONSUMES
+ gSocCmnSsdtAcpiTableStorageGuid ## CONSUMES
+
+[Depex]
+ gEfiAcpiTableProtocolGuid AND
+ gEfiFirmwareVolume2ProtocolGuid AND
+ gEfiCpuIo2ProtocolGuid AND
+ gEfiMpServiceProtocolGuid AND
+ gEfiPciRootBridgeIoProtocolGuid
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.c b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.c
new file mode 100644
index 0000000000..0234d06cc3
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.c
@@ -0,0 +1,474 @@
+/** @file
+ ACPI SSDT table generation library
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "AcpiByteStream.h"
+#include <Base.h>
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/HobLib.h>
+#include <Guid/HobList.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <IndustryStandard/Acpi.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Protocol/AcpiTable.h>
+#include <Protocol/AcpiSystemDescriptionTable.h>
+#include <Library/MemoryAllocationLib.h>
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtHeader [] = {
+ 0x53,0x53,0x44,0x54,0x08,0x01,0x00,0x00, /* 00000000 "SSDT...." */
+ 0x02,0x06,0x49,0x6E,0x74,0x65,0x6C,0x20, /* 00000008 "..Intel " */
+ 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, /* 00000010 " " */
+ 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */
+ 0x27,0x05,0x16,0x20, /* 00000020 "'.. " */
+ 0xA0,0x0F,0x00 /* 00000024 "..." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtExternalDualName [] = {
+ 0x15,0x5C,0x2E,0x5F,0x53,0x42,0x5F,0x50, /* 00000000 ".\._SB_P" */
+ 0x43,0x49,0x58,0x06,0x00 /* 00000008 "CIX.." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtScopePkgLengthEncoding [] = {
+ 0x10, 0x00, 0x00, 0x00, 0x00 /* 00000000 "....." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtScopeDualName [] = {
+ 0x5C,0x2E,0x5F,0x53,0x42, /* 00000000 "\._SB" */
+ 0x5F,0x50,0x43,0x49,0x58 /* 00000008 "_PCIX" */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtDevicePkgLengthEncoding [] = {
+ 0x5B,0x82,0x00,0x00,0x00,0x00 /* 00000000 "......" */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtDeviceName [] = {
+ 0x54,0x4D,0x50,0x31 /* 00000000 "TMP1" */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtHardwareId [] = {
+ 0x08,0x5F,0x48,0x49,0x44,0x0D,0x49,0x4E, /* 00000000 "._HID.IN" */
+ 0x54,0x30,0x30,0x30,0x30,0x30,0x00 /* 00000008 "T0000." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtCompatibleId [] = {
+ 0x08,0x5F,0x43,0x49,0x44,0x0D,0x49,0x4E, /* 00000000 "._CID.IN" */
+ 0x54,0x30,0x30,0x30,0x30,0x30,0x00 /* 00000008 "T0000." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtUniqueId [] = {
+ 0x08,0x5F,0x55,0x49,0x44,0x00 /* 00000000 "._UID." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtCurrentResourceSettings [] = {
+ 0x08,0x5F,0x43,0x52,0x53, /* 00000000 "._CRS" */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtBufferPkgLengthEncoding [] = {
+ 0x11,0x00,0x00
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtCrsPkgLengthEncoding [] = {
+ 0x00,0x00, 0x00 /* 00000000 "....." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtGpioResource [] = {
+ 0x8C,0x20,0x00,0x01,0x01,0x01,0x00,0x02, /* 00000000 ". ......" */
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x17,0x00, /* 00000008 "........" */
+ 0x00,0x19,0x00,0x23,0x00,0x00,0x00,0x03, /* 00000010 "...#...." */
+ 0x00,0x5C,0x5F,0x53,0x42,0x2E,0x47,0x50, /* 00000018 ".\_SB.GP" */
+ 0x49,0x30,0x00, /* 00000020 "I0." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtI2cSerialBusResource [] = {
+ 0x8E,0x1E,0x00,0x01,0x00,0x01,0x02,0x00, /* 00000000 "........" */
+ 0x00,0x01,0x06,0x00,0x80,0x1A,0x06,0x00, /* 00000008 "........" */
+ 0x22,0x00,0x5C,0x5F,0x53,0x42,0x2E,0x50, /* 00000010 "".\_SB.P" */
+ 0x43,0x49,0x30,0x2E,0x49,0x32,0x43,0x58, /* 00000018 "CI0.I2CX" */
+ 0x00 /* 00000020 "." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtStatusMethod [] = {
+ 0x14,0x09,0x5F,0x53,0x54,0x41,0x00, /* 00000000 ".._STA." */
+ 0xA4,0x0A,0x0F /* 00000008 "..." */
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED UINT8 SsdtResourceTemplateEndTag [] = {
+ 0x79, 0x00
+};
+
+EFI_STATUS
+GetTableSize(
+ IN UINT8 *AcpiDataBase,
+ OUT UINT32 *SsdtTableSize
+ )
+{
+ UINTN GpioResources;
+ UINTN I2cResources;
+ UINT32 ResourceBufferLength;
+ UINT32 DevicePackageLength;
+ UINT32 ScopePackageLength;
+ UINT32 ResourceSize;
+ UINTN i;
+ UINTN ResourceOffset;
+ UINT8 ResourceType;
+ UINTN NextResource;
+ EFI_ACPI_SDT_HEADER *SsdtTableInfo;
+ SSDT_DEVICE_DATA *SsdtDeviceInfo;
+ UINT32 Size;
+ UINT8 *PrintData;
+
+ //
+ // Get table info from HOB
+ //
+ SsdtTableInfo = (EFI_ACPI_SDT_HEADER *) AcpiDataBase;
+ SsdtDeviceInfo = (SSDT_DEVICE_DATA *) (AcpiDataBase + sizeof(EFI_ACPI_SDT_HEADER));
+ ResourceOffset = sizeof(EFI_ACPI_SDT_HEADER) + sizeof(SSDT_DEVICE_DATA) - sizeof(UINT8);
+ NextResource = 0;
+ GpioResources = 0;
+ I2cResources = 0;
+ ResourceSize = 0;
+
+ Size = SsdtTableInfo->Length;
+
+ DEBUG_CODE_BEGIN();
+ DEBUG((DEBUG_INFO, "GenSsdt AcpiData print:\n"));
+ for (PrintData = AcpiDataBase; PrintData<(AcpiDataBase + Size); PrintData++) {
+ DEBUG((DEBUG_INFO, "%x ", *PrintData));
+ }
+ DEBUG((DEBUG_INFO, "\n"));
+ DEBUG_CODE_END();
+
+ DEBUG((DEBUG_INFO, "NumberOfResources: %x \n", SsdtDeviceInfo->NumberOfResources));
+
+ for (i = 0; i < SsdtDeviceInfo->NumberOfResources; i++) {
+ ResourceType = *(AcpiDataBase + ResourceOffset + NextResource);
+ DEBUG((DEBUG_INFO, "ResourceType: %x ", ResourceType));
+ switch (ResourceType) {
+ case ACPI_GPIO_RESOURCE_TYPE :
+ {
+ ResourceSize = ResourceSize + sizeof(GPIO_RESOURCE_DATA);
+ NextResource = NextResource + sizeof(GPIO_RESOURCE_DATA) - sizeof(UINT8);
+ GpioResources++;
+ break;
+ }
+ case ACPI_I2C_RESOURCE_TYPE :
+ {
+ ResourceSize = ResourceSize + sizeof(I2C_RESOURCE_DATA);
+ NextResource = NextResource + sizeof(I2C_RESOURCE_DATA) - sizeof(UINT8);
+ I2cResources++;
+ break;
+ }
+ default :
+ DEBUG ((DEBUG_INFO, "Unsupported resource type.\n"));
+ break;
+ }
+ }
+ DEBUG((DEBUG_INFO, "GenSsdt GpioResources:%d I2cResources:%d\n", GpioResources, I2cResources));
+ //
+ // Calculate the size of table to be generated
+ //
+ ResourceBufferLength = (UINT32) ((GpioResources * sizeof(SsdtGpioResource)) +
+ (I2cResources * sizeof(SsdtI2cSerialBusResource)) +
+ sizeof(SsdtResourceTemplateEndTag));
+ DEBUG((DEBUG_INFO, "GenSsdt ResourceBufferLength: 0x%x\n", ResourceBufferLength));
+
+ DevicePackageLength = (UINT32) (sizeof(SsdtDeviceName) + sizeof(SsdtHardwareId) +
+ sizeof(SsdtCompatibleId) + sizeof(SsdtUniqueId) +
+ sizeof(SsdtCurrentResourceSettings) + ResourceBufferLength +
+ sizeof(SsdtStatusMethod));
+ DEBUG((DEBUG_INFO, "GenSsdt DevicePkgLength: 0x%x\n", DevicePackageLength));
+
+ if (ResourceBufferLength < 254) {
+ SsdtCrsPkgLengthEncoding[0] = ACPI_BYTE_PREFIX_OPCODE;
+ SsdtCrsPkgLengthEncoding[1] = (UINT8) ResourceBufferLength;
+ DevicePackageLength = DevicePackageLength + 2; //Adding Package length encoding size
+ DEBUG((DEBUG_INFO, "GenSsdt CrsPkgLengthEncoding1: 0x%x\n", SsdtCrsPkgLengthEncoding[1]));
+ } else if (ResourceBufferLength < 65533) {
+ SsdtCrsPkgLengthEncoding[0] = ACPI_WORD_PREFIX_OPCODE;
+ SsdtCrsPkgLengthEncoding[1] = (UINT8) (ResourceBufferLength & 0x00FF);
+ SsdtCrsPkgLengthEncoding[2] = (UINT8) ((ResourceBufferLength & 0xFF00) >> 8);
+ DevicePackageLength = DevicePackageLength + 3; //Adding Package length encoding size
+ DEBUG((DEBUG_INFO, "GenSsdt CrsPkgLengthEncoding1: 0x%x\n", SsdtCrsPkgLengthEncoding[1]));
+ DEBUG((DEBUG_INFO, "GenSsdt CrsPkgLengthEncoding2: 0x%x\n", SsdtCrsPkgLengthEncoding[2]));
+ }
+
+ if (ResourceBufferLength < 61) {
+ SsdtBufferPkgLengthEncoding[1] = (UINT8) ResourceBufferLength + 3; //Taking CrsPackageLength encoding into account
+ DevicePackageLength = DevicePackageLength + 2; //Adding Package length encoding size
+ DEBUG((DEBUG_INFO, "GenSsdt BufferPkgLengthEncoding1: 0x%x\n", SsdtBufferPkgLengthEncoding[1]));
+ } else if (ResourceBufferLength < 4095) {
+ SsdtBufferPkgLengthEncoding[1] = 0x40 | ((UINT8)((ResourceBufferLength + 5) & 0x00F)); //Taking CrsPackageLength encoding into account
+ SsdtBufferPkgLengthEncoding[2] = (UINT8) (((ResourceBufferLength + 5) & 0xFF0) >> 4); //Taking CrsPackageLength encoding into account
+ DevicePackageLength = DevicePackageLength + 3; //Adding Package length encoding size
+ DEBUG((DEBUG_INFO, "GenSsdt BufferPkgLengthEncoding1: 0x%x\n", SsdtBufferPkgLengthEncoding[1]));
+ DEBUG((DEBUG_INFO, "GenSsdt BufferPkgLengthEncoding2: 0x%x\n", SsdtBufferPkgLengthEncoding[2]));
+ }
+
+ ScopePackageLength = 0;
+ if (DevicePackageLength < 63) {
+ SsdtDevicePkgLengthEncoding[2] = (UINT8) DevicePackageLength;
+ ScopePackageLength = ScopePackageLength + 3;
+ DEBUG((DEBUG_INFO, "GenSsdt DevicePkgLengthEncoding2: 0x%x\n", SsdtDevicePkgLengthEncoding[2]));
+ } else if (DevicePackageLength < 4094) {
+ SsdtDevicePkgLengthEncoding[2] = 0x40 | ((UINT8)((DevicePackageLength + 2) & 0x00F));
+ SsdtDevicePkgLengthEncoding[3] = (UINT8) (((DevicePackageLength + 2) & 0xFF0) >> 4);
+ ScopePackageLength = ScopePackageLength + 4;
+ DEBUG((DEBUG_INFO, "GenSsdt DevicePkgLengthEncoding2: 0x%x\n", SsdtDevicePkgLengthEncoding[2]));
+ DEBUG((DEBUG_INFO, "GenSsdt DevicePkgLengthEncoding3: 0x%x\n", SsdtDevicePkgLengthEncoding[3]));
+ }
+
+ ScopePackageLength = ScopePackageLength + sizeof(SsdtScopeDualName) + DevicePackageLength;
+ if (ScopePackageLength < 63) {
+ SsdtScopePkgLengthEncoding[1] = (UINT8) ScopePackageLength;
+ DEBUG((DEBUG_INFO, "GenSsdt ScopePkgLengthEncoding1: 0x%x\n", SsdtScopePkgLengthEncoding[1]));
+ } else if (ScopePackageLength < 4094) {
+ ScopePackageLength = ScopePackageLength + 2;
+ SsdtScopePkgLengthEncoding[1] = 0x40 | ((UINT8)(ScopePackageLength & 0x00F));
+ SsdtScopePkgLengthEncoding[2] = (UINT8) ((ScopePackageLength & 0xFF0) >> 4);
+ DEBUG((DEBUG_INFO, "GenSsdt ScopePkgLengthEncoding1: 0x%x\n", SsdtScopePkgLengthEncoding[1]));
+ DEBUG((DEBUG_INFO, "GenSsdt ScopePkgLengthEncoding2: 0x%x\n", SsdtScopePkgLengthEncoding[2]));
+ }
+
+ *SsdtTableSize = (UINT32) (sizeof(SsdtHeader) + sizeof(SsdtExternalDualName) + ScopePackageLength + 1);
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+CreateAcpiTableInMemory (
+ IN UINT8 *AcpiDataBase,
+ IN UINT32 *SsdtTableSize,
+ OUT UINT8 *CurrentTable
+ )
+{
+ UINT8 *CurrentTablePointer;
+ EFI_ACPI_SDT_HEADER *AcpiTableHeader;
+ EFI_ACPI_SDT_HEADER *SsdtTableInfo;
+ SSDT_DEVICE_DATA *SsdtDeviceInfo;
+ GPIO_RESOURCE_DATA *GpioResourceInfo;
+ I2C_RESOURCE_DATA *I2cResourceInfo;
+ GPIO_RESOURCE *TempGpioResource;
+ I2C_SERIAL_BUS_RESOURCE *TempI2cResource;
+ UINTN i;
+ UINTN ResourceOffset;
+ UINT8 ResourceType;
+ UINTN NextResource;
+ UINT32 Size;
+
+ SsdtTableInfo = (EFI_ACPI_SDT_HEADER *) AcpiDataBase;
+ SsdtDeviceInfo = (SSDT_DEVICE_DATA *) (AcpiDataBase + sizeof(EFI_ACPI_SDT_HEADER));
+ ResourceOffset = sizeof(EFI_ACPI_SDT_HEADER) + sizeof(SSDT_DEVICE_DATA) - sizeof(UINT8);
+ //
+ // Copy SSDT content to allocated space
+ //
+ CurrentTablePointer = (UINT8 *) CurrentTable;
+ CopyMem(CurrentTablePointer, &SsdtHeader, sizeof(SsdtHeader));
+ AcpiTableHeader = (EFI_ACPI_SDT_HEADER *) CurrentTablePointer;
+ AcpiTableHeader->Length = *SsdtTableSize;
+ CopyMem(AcpiTableHeader->OemId, SsdtTableInfo->OemId, 6);
+ CopyMem(AcpiTableHeader->OemTableId, SsdtTableInfo->OemTableId, 8);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTable + sizeof(SsdtHeader));
+ CopyMem(CurrentTablePointer, &SsdtExternalDualName, sizeof(SsdtExternalDualName));
+ *(CHAR8 *) (CurrentTablePointer + ACPI_EXTERNAL_PCI_BUS_NUMBER_OFFSET) = '0'; //PCI bus 0
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtExternalDualName));
+ Size = ((SsdtScopePkgLengthEncoding[1] & 0xC0) >> 6) + 2;
+ CopyMem(CurrentTablePointer, &SsdtScopePkgLengthEncoding, Size);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + Size);
+ CopyMem(CurrentTablePointer, &SsdtScopeDualName, sizeof(SsdtScopeDualName));
+ *(CHAR8 *) (CurrentTablePointer + ACPI_SCOPE_PCI_BUS_NUMBER_OFFSET) = '0'; //PCI bus 0
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtScopeDualName));
+ Size = ((SsdtDevicePkgLengthEncoding[2] & 0xC0) >> 6) + 3;
+ CopyMem(CurrentTablePointer, &SsdtDevicePkgLengthEncoding, Size);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + Size);
+ CopyMem(&SsdtDeviceName, SsdtDeviceInfo->DeviceName, 4);
+ CopyMem(CurrentTablePointer, &SsdtDeviceName, sizeof(SsdtDeviceName));
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtDeviceName));
+ CopyMem(CurrentTablePointer, &SsdtHardwareId, sizeof(SsdtHardwareId));
+ CopyMem(CurrentTablePointer + ACPI_NAME_OBJECT_STRING_OFFSET, SsdtDeviceInfo->HardwareId, 8);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtHardwareId));
+ CopyMem(CurrentTablePointer, &SsdtCompatibleId, sizeof(SsdtCompatibleId));
+ CopyMem(CurrentTablePointer + ACPI_NAME_OBJECT_STRING_OFFSET, SsdtDeviceInfo->CompatibilityId, 8);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtCompatibleId));
+ SsdtUniqueId[ACPI_UNIQUE_ID_NUMBER_OFFSET] = (UINT8) SsdtDeviceInfo->UniqueId;
+ CopyMem(CurrentTablePointer, &SsdtUniqueId, sizeof(SsdtUniqueId));
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtUniqueId));
+ CopyMem(CurrentTablePointer, &SsdtCurrentResourceSettings, sizeof(SsdtCurrentResourceSettings));
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + sizeof(SsdtCurrentResourceSettings));
+ Size = ((SsdtBufferPkgLengthEncoding[1] & 0xC0) >> 6) + 2;
+ CopyMem(CurrentTablePointer, &SsdtBufferPkgLengthEncoding, Size);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + Size);
+ if (SsdtCrsPkgLengthEncoding[0] == ACPI_BYTE_PREFIX_OPCODE) {
+ Size = 2;
+ } else if (SsdtCrsPkgLengthEncoding[0] == ACPI_WORD_PREFIX_OPCODE) {
+ Size = 3;
+ }
+ CopyMem(CurrentTablePointer, &SsdtCrsPkgLengthEncoding, Size);
+
+ CurrentTablePointer = (UINT8 *) (CurrentTablePointer + Size);
+ NextResource = 0;
+ for (i = 0; i < SsdtDeviceInfo->NumberOfResources; i++) {
+ ResourceType = *(UINT8 *)(AcpiDataBase + ResourceOffset + NextResource);
+ switch (ResourceType) {
+ case ACPI_GPIO_RESOURCE_TYPE :
+ {
+ CopyMem(CurrentTablePointer, &SsdtGpioResource, sizeof(SsdtGpioResource));
+ TempGpioResource = (GPIO_RESOURCE *) CurrentTablePointer;
+ DEBUG((DEBUG_INFO, "TempGpioConnDesc: %x\n", TempGpioResource->GpioConnectionDescriptor));
+ DEBUG((DEBUG_INFO, "TempGpioResourceNumber1 before: %x\n", TempGpioResource->PinNumber1));
+ DEBUG((DEBUG_INFO, "TempGpioResourceNumber2 before: %x\n", TempGpioResource->PinNumber2));
+ GpioResourceInfo = (GPIO_RESOURCE_DATA *) (AcpiDataBase + ResourceOffset + NextResource);
+ if (GpioResourceInfo->GpioResourceType == ACPI_GPIO_RESOURCE_TYPE_INTERRUPT) {
+ TempGpioResource->GpioConnectionType = GpioInterrupt;
+ TempGpioResource->InterruptAndIoFlags1 |= 0x10;
+ TempGpioResource->PinNumber1 = GpioResourceInfo->GpioNumber & 0x00FF;
+ TempGpioResource->PinNumber2 = (GpioResourceInfo->GpioNumber & 0xFF00) >> 8;
+ } else if (GpioResourceInfo->GpioResourceType == ACPI_GPIO_RESOURCE_TYPE_IO) {
+ TempGpioResource->GpioConnectionType = GpioIo;
+ TempGpioResource->InterruptAndIoFlags1 &= 0x0F;
+ TempGpioResource->PinNumber1 = GpioResourceInfo->GpioNumber & 0x00FF;
+ TempGpioResource->PinNumber2 = (GpioResourceInfo->GpioNumber & 0xFF00) >> 8;
+ }
+ DEBUG((DEBUG_INFO, "TempGpioResourceNumber1 after: %x\n", TempGpioResource->PinNumber1));
+ DEBUG((DEBUG_INFO, "TempGpioResourceNumber2 after: %x\n", TempGpioResource->PinNumber2));
+ NextResource = NextResource + sizeof(GPIO_RESOURCE_DATA) - sizeof(UINT8);
+ CurrentTablePointer = CurrentTablePointer + sizeof(SsdtGpioResource);
+
+ break;
+ }
+ case ACPI_I2C_RESOURCE_TYPE :
+ {
+ CopyMem(CurrentTablePointer, &SsdtI2cSerialBusResource, sizeof(SsdtI2cSerialBusResource));
+ TempI2cResource = (I2C_SERIAL_BUS_RESOURCE *) CurrentTablePointer;
+ I2cResourceInfo = (I2C_RESOURCE_DATA *) (AcpiDataBase + ResourceOffset + NextResource);
+ TempI2cResource->SlaveAddress = (UINT16) I2cResourceInfo->I2cSlaveAddress;
+ TempI2cResource->ConnectionSpeed = I2cResourceInfo->ConnectionSpeed;
+ *(CurrentTablePointer + ACPI_I2C_RESOURCE_CONTROLLER_NUMBER_OFFSET) = I2cResourceInfo->I2cSliceNumber + ASCII_0_ORDINAL;
+ NextResource = NextResource + sizeof(I2C_RESOURCE_DATA) - sizeof(UINT8);
+ CurrentTablePointer = CurrentTablePointer + sizeof(SsdtI2cSerialBusResource);
+
+ break;
+ }
+ }
+ }
+ CopyMem(CurrentTablePointer, &SsdtResourceTemplateEndTag, sizeof(SsdtResourceTemplateEndTag));
+ CurrentTablePointer = CurrentTablePointer + sizeof(SsdtResourceTemplateEndTag);
+ if (SsdtDeviceInfo->EnableStatus == TRUE) {
+ SsdtStatusMethod[ACPI_STA_RETURN_VALUE_OFFSET] = ACPI_STA_RETURN_VALUE_DEVICE_ENABLED;
+ } else {
+ SsdtStatusMethod[ACPI_STA_RETURN_VALUE_OFFSET] = ACPI_STA_RETURN_VALUE_DEVICE_DISABLED;
+ }
+ CopyMem(CurrentTablePointer, &SsdtStatusMethod, sizeof(SsdtStatusMethod));
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Generate SSDTs from ACPI data available in BIOS board files
+ or ACPI data generated from PCT tool FVs
+**/
+EFI_STATUS
+GenerateSsdtFromConfigFile (
+ VOID
+)
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINTN Pages;
+ UINT8 *CurrentTable;
+ EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
+ EFI_ACPI_SDT_HEADER *AcpiTableHeader;
+ UINT32 SsdtTableSize;
+ UINT8 *PctAcpiDataBase;
+ UINTN i,j;
+ UINT8 *PrintData;
+ UINTN TableHandle;
+ PCT_ACPI_BLOCK_HDR *PctAcpiDataHeader;
+ UINT16 TableCount;
+ UINT8 *AcpiDataPointer;
+
+ DEBUG((DEBUG_INFO, "GenSsdt start\n"));
+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID **) &AcpiTable);
+ ASSERT_EFI_ERROR(Status);
+
+ //
+ // Look for ACPI data HOB from PCT
+ //
+ PctAcpiDataBase = (UINT8 *) PcdGetPtr(PcdBoardAcpiData);
+ if (PctAcpiDataBase == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (*PctAcpiDataBase != 0) {
+ PctAcpiDataHeader = (PCT_ACPI_BLOCK_HDR *) PctAcpiDataBase;
+ AcpiDataPointer = (UINT8 *) (PctAcpiDataBase + sizeof(PCT_ACPI_BLOCK_HDR));
+ // Get number of tables to be generated
+ TableCount = PctAcpiDataHeader->Count;
+ for (i=0; i<TableCount; i++) {
+ // Calculate table size to be created
+ Status = GetTableSize(AcpiDataPointer, &SsdtTableSize);
+ ASSERT_EFI_ERROR (Status);
+
+ // Allocate memory for SSDT
+ Pages = EFI_SIZE_TO_PAGES(SsdtTableSize);
+ Status = (gBS->AllocatePages) (
+ AllocateMaxAddress,
+ EfiACPIMemoryNVS,
+ Pages,
+ (EFI_PHYSICAL_ADDRESS *) &CurrentTable
+ );
+ ASSERT_EFI_ERROR (Status);
+ ZeroMem ((VOID *) CurrentTable, SsdtTableSize);
+
+ //Copy SSDT content to allocated space
+ Status = CreateAcpiTableInMemory(AcpiDataPointer, &SsdtTableSize, CurrentTable);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Dump table content from memory
+ //
+ DEBUG_CODE_BEGIN();
+ PrintData = (UINT8 *)CurrentTable;
+ DEBUG((DEBUG_INFO, "GenSsdt TableDump:\n"));
+ for (j=0; j<SsdtTableSize; j++) {
+ DEBUG((DEBUG_INFO, "%02x ", *PrintData));
+ PrintData++;
+ }
+ DEBUG((DEBUG_INFO, "\n"));
+ DEBUG_CODE_END();
+
+ TableHandle = 0;
+ AcpiTableHeader = (EFI_ACPI_SDT_HEADER *)CurrentTable;
+
+ //
+ // Install SSDT
+ //
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ CurrentTable,
+ AcpiTableHeader->Length,
+ &TableHandle
+ );
+
+ ASSERT_EFI_ERROR(Status);
+
+ AcpiDataPointer += ((EFI_ACPI_SDT_HEADER *) AcpiDataPointer)->Length;
+ }
+ }
+ return Status;
+}
\ No newline at end of file
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.h b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.h
new file mode 100644
index 0000000000..0cb3a4aaef
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/AdvancedAcpiDxe/GenSsdtLib.h
@@ -0,0 +1,17 @@
+/** @file
+ This is an implementation of the ACPI platform driver.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _GEN_SSDT_LIB_H_
+#define _GEN_SSDT_LIB_H_
+
+EFI_STATUS
+GenerateSsdtFromConfigFile (
+ VOID
+);
+
+#endif
--
2.36.1.windows.1
next prev parent reply other threads:[~2023-06-14 19:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1686770061.git.saloni.kasbekar@intel.com>
2023-06-14 19:17 ` [PATCH 1/6] AlderlakeOpenBoardPkg: Add package and headers Saloni Kasbekar
2023-06-14 19:17 ` [PATCH 2/6] AlderlakeOpenBoardPkg: Add modules Saloni Kasbekar
2023-06-14 19:17 ` [PATCH 3/6] AlderlakeOpenBoardPkg/AlderlakePRvp: Add library instances Saloni Kasbekar
2023-06-14 19:17 ` Saloni Kasbekar [this message]
2023-06-14 19:17 ` [PATCH 5/6] AlderlakeOpenBoardPkg: Adds the Policy Module Saloni Kasbekar
2023-06-14 19:17 ` [PATCH 6/6] AlderlakeOpenBoardPkg: Add Library Instances Saloni Kasbekar
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