Re: [edk2-devel] [edk2-platforms][PATCH V2 4/8] Platform/Sgi: Add ACPI tables for RD-Fremont platform

["PierreGondois" <pierre.gondois@arm.com>]

On 1/12/24 16:47, Prabin CA via groups.io wrote:
> From: Shriram K <shriram.k@arm.com>
> 
> RD-Fremont is the next platform in the Arm's reference design platform
> series. This platform includes 32 CPUs but the fixed virtual platform
> (FVP) simulates 16 CPUs of the platform. There is one CPU per cluster in
> the system and so the FVP simulates 16 clusters. In preparation for
> adding support for this platform, add the initial set of ACPI tables and
> reuse existing ACPI tables as applicable to boot a operating system on
> this platform.
> 
> Signed-off-by: Shriram K <shriram.k@arm.com>

I think this should be replaced with: 'Co-authored-by', cf:
- https://gcc.gnu.org/dco.html
- https://edk2.groups.io/g/devel/topic/82627064#74861

Same remark for:
- [PATCH V2 1/8] Platform/Sgi: Update the datatype of PcdSmmuBase from u32 to u64

> Signed-off-by: Prabin CA <prabin.ca@arm.com>
> ---
>   Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf |  73 ++++++++
>   Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl      | 196 ++++++++++++++++++++
>   Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc     | 138 ++++++++++++++
>   Platform/ARM/SgiPkg/AcpiTables/RdFremont/Pptt.aslc     | 167 +++++++++++++++++
>   4 files changed, 574 insertions(+)
> 

[snip]

> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc
> new file mode 100644
> index 000000000000..e81ce86ae8fd
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc
> @@ -0,0 +1,138 @@
> +/** @file
> +*  Multiple APIC Description Table (MADT)
> +*
> +*  Copyright (c) 2024, Arm Limited. All rights reserved.
> +*
> +*  SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Library/AcpiLib.h>
> +#include <Library/ArmLib.h>
> +#include <Library/PcdLib.h>
> +
> +#include "SgiAcpiHeader.h"
> +#include "SgiPlatform.h"
> +
> +#define CORE_CNT   (FixedPcdGet32 (PcdClusterCount) * \
> +                      FixedPcdGet32 (PcdCoreCount))
> +
> +// Multiple APIC Description Table
> +#pragma pack (1)
> +
> +typedef struct {
> +  EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> +  EFI_ACPI_6_4_GIC_STRUCTURE                            GicInterfaces[CORE_CNT];
> +  EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
> +  EFI_ACPI_6_4_GICR_STRUCTURE                           GicRedistributor;
> +  EFI_ACPI_6_4_GIC_ITS_STRUCTURE                        GicIts[6];
> +} EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE;
> +
> +#pragma pack ()
> +
> +STATIC EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
> +      EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE,
> +      EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
> +    ),
> +    // MADT specific fields
> +    0, // LocalApicAddress
> +    0  // Flags
> +  },
> +  {
> +    // Format: EFI_ACPI_6_4_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
> +    //                                          PmuIrq, GicBase, GicVBase,
> +    //                                          GicHBase, GsivId, GicRBase,
> +    //                                          Efficiency,
> +    //                                          SpeOverflowInterrupt)
> +    // Note: The GIC Structure of the primary CPU must be the first entry
> +    // (see note in 5.2.12.14 GICC Structure of ACPI v6.4).
> +    EFI_ACPI_6_4_GICC_STRUCTURE_INIT( // Neoverse Poseidon core0
> +      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_4_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0, 0, 0),

This seems to be generic to all other platforms, so this is just a remark,
but it is curious the GICH/GICV addresses are hard-coded for all platforms.
(Again, this is just a remark, nothing to be changed).

> +    EFI_ACPI_6_4_GICC_STRUCTURE_INIT( // Neoverse Poseidon core1
> +      0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_4_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0, 0, 0),
> +    EFI_ACPI_6_4_GICC_STRUCTURE_INIT( // Neoverse Poseidon core2
> +      0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_4_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0, 0, 0),
> +    EFI_ACPI_6_4_GICC_STRUCTURE_INIT( // Neoverse Poseidon core3
> +      0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_4_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0, 0, 0),

[snip]



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