From: "Laszlo Ersek" <lersek@redhat.com>
To: Michael D Kinney <michael.d.kinney@intel.com>, devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>
Subject: Re: [Patch V2 4/6] UefiCpuPkg/MpInitLib: Avoid MSR_IA32_APIC_BASE for single core
Date: Tue, 30 Apr 2019 12:31:09 +0200 [thread overview]
Message-ID: <e73b273d-378b-ef06-cefd-69cfe373a692@redhat.com> (raw)
In-Reply-To: <20190430013012.24008-5-michael.d.kinney@intel.com>
Hi Mike,
On 04/30/19 03:30, Michael D Kinney wrote:
> Avoid access to MSR_IA32_APIC_BASE that may not be supported
> on single core CPUs. If PcdCpuMaxLogicalProcessorNumber is 1,
> then there is only one CPU that must be the BSP.
>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
> ---
> UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
> index 35dff91fd2..5488049c08 100644
> --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
> @@ -1,7 +1,7 @@
> /** @file
> MP initialize support functions for PEI phase.
>
> - Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -101,6 +101,19 @@ GetCpuMpData (
> MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;
> IA32_DESCRIPTOR Idtr;
>
> + //
> + // If there is only 1 CPU, then it must be the BSP. This avoids an access to
> + // MSR_IA32_APIC_BASE that may not be supported on single core CPUs.
> + //
> + if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) == 1) {
this PcdGet32() call has the same issue as in v1. It is unsafe because:
- if the platform makes PcdCpuMaxLogicalProcessorNumber a dynamic or
dynamic-ex PCD, then the above call will result in a PPI member function
invocation,
- and said invocation may be executed on an AP, not necessarily on the BSP.
But, APs must not call PPI member functions, to my knowledge.
We can certainly use a PCD here, but both UefiCpuPkg.dec, and the code
added here, must prevent platforms from making that PCD dynamic or
dynamic-ex.
Thanks
Laszlo
> + CpuMpData = GetCpuMpDataFromGuidedHob ();
> + ASSERT (CpuMpData != NULL);
> + return CpuMpData;
> + }
> +
> + //
> + // Otherwise use MSR_IA32_APIC_BASE to determine if the CPU is BSP or AP.
> + //
> ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
> if (ApicBaseMsr.Bits.BSP == 1) {
> CpuMpData = GetCpuMpDataFromGuidedHob ();
>
next prev parent reply other threads:[~2019-04-30 10:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 1:30 [Patch V2 0/6] Resolve Quark build and boot issues Michael D Kinney
2019-04-30 1:30 ` [Patch V2 1/6] MdePkg: Add PcdSpeculationBarrierType Michael D Kinney
2019-04-30 11:47 ` [edk2-devel] " Laszlo Ersek
2019-04-30 15:16 ` Michael D Kinney
2019-04-30 15:43 ` Laszlo Ersek
2019-04-30 1:30 ` [Patch V2 2/6] MdePkg/BaseLib: Use PcdSpeculationBarrierType Michael D Kinney
2019-04-30 11:49 ` [edk2-devel] " Laszlo Ersek
2019-04-30 15:17 ` Michael D Kinney
2019-04-30 22:24 ` Brian J. Johnson
2019-04-30 1:30 ` [Patch V2 3/6] QuarkPlatformPkg: Set PcdSpeculationBarrierType to CPUID Michael D Kinney
2019-04-30 1:30 ` [Patch V2 4/6] UefiCpuPkg/MpInitLib: Avoid MSR_IA32_APIC_BASE for single core Michael D Kinney
2019-04-30 10:31 ` Laszlo Ersek [this message]
2019-04-30 1:30 ` [Patch V2 5/6] QuarkSocPkg/SmmAccessDxe: Set region to UC on SMRAM close Michael D Kinney
2019-04-30 1:30 ` [Patch V2 6/6] QuarkPlatformPkg/PlatformInit: Resolve ResetSystemLib name collision Michael D Kinney
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