From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) by mx.groups.io with SMTP id smtpd.web10.10878.1615752407653069899 for ; Sun, 14 Mar 2021 13:06:48 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=kDqVSuXK; spf=pass (domain: linaro.org, ip: 209.85.221.52, mailfrom: etienne.carriere@linaro.org) Received: by mail-wr1-f52.google.com with SMTP id z2so4666794wrl.5 for ; Sun, 14 Mar 2021 13:06:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=nhopHJZu41uOQjsJ/Ee88Z7EQyysNkFB/rSDpN+eiKY=; b=kDqVSuXKhPuwbVF+BDr1ovP284sB3XfQuv2UYOSlEzxB4630y5bpkmZMyb9moPJu2P j+K63IXTZ1qbDRqni2oguxyK2VPNXdV8OLxxyukzAccciq3vOSSCVLuC46jfiaSPS6Ql a/gHUWoqsA4ZDtxpIQAMXMbd9PCVZFquBtB1HmhQlr8CJs4fdByei52AmOEiXtPwVtPA 842InZ3EPMbFyzkmaZWeZkJ6le1EAludGgZqeXCfpzHdZhLNEVgkZmB+rmT4pD8wJ4wQ FH3eLh350DrZQj1EcA1eZg6wqSEoDO1W3biEG777Ld6oZqj+TwseIUezsPTEj/dfBaiP f2zA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=nhopHJZu41uOQjsJ/Ee88Z7EQyysNkFB/rSDpN+eiKY=; b=GUyXRRANvZACzmrdlYGQoSpqHPlB9oPyXPVj/iJsvEhQzCWgOTu5UOFwRWc2Qxvx2T 3PzIyJbo/i1tqvf6KtjCYKcHYGKcGZMtSOg791lOUNtK8bxGOaEhWoGHJT1aeUr+XzZL OLvNX5AyCxcniMKM8R1Pl/o7O7WeWEGp4PLv4x/x9nXv4H1vYS+UQQ0BMhu0qp4Vt0B/ z12U+s8htffSi2un7FciLdc41tZt9/oJMom9laZWGXn6vCrqb0VdC5crpwWSCDpYpXgo zMX8FhtkWurdpP8uHQ/DaB0Pz3KUd2ANoDXOYsMMhs5yJkBYhLRFpkuFubaMbGwIxEZW AU1Q== X-Gm-Message-State: AOAM533jxU5jBRhlC210R50dCU0YJ9dHLemu+S3Uh41/E1cac0US1TMn vtfuOF9Y+YMEhGLm4IH6esjOLfr5f9OAlQ0c X-Google-Smtp-Source: ABdhPJyDws5Ia8KsDR5thL7NaNeQkvGSDfXdhboiHxXI7vyPDxvz3PLSJMr/mIv4oXdbbbRaLmqPNQ== X-Received: by 2002:adf:d0c9:: with SMTP id z9mr24818645wrh.396.1615752405979; Sun, 14 Mar 2021 13:06:45 -0700 (PDT) Return-Path: Received: from lmecxl0524.lme.st.com (2a01cb058b85080038d9665c555bdad2.ipv6.abo.wanadoo.fr. [2a01:cb05:8b85:800:38d9:665c:555b:dad2]) by smtp.gmail.com with ESMTPSA id b65sm10176045wmh.4.2021.03.14.13.06.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Mar 2021 13:06:45 -0700 (PDT) From: "Etienne Carriere" To: devel@edk2.groups.io Cc: Etienne Carriere Subject: [PATCH 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg Date: Sun, 14 Mar 2021 21:06:25 +0100 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: <5a0fdcf767151d786afd8d14bff57cf6fdb8fefc.1615752383.git.etienne.carriere@linaro.org> References: <5a0fdcf767151d786afd8d14bff57cf6fdb8fefc.1615752383.git.etienne.carriere@linaro.org> In-Reply-To: <5a0fdcf767151d786afd8d14bff57cf6fdb8fefc.1615752383.git.etienne.carriere@linaro.org> References: <5a0fdcf767151d786afd8d14bff57cf6fdb8fefc.1615752383.git.etienne.carriere@linaro.org> This changes modify ArmPkg to prepare building StandaloneMm firmware for 32bit Arm architectures, factorizing the AArch64 implementation. This change adds MmCommunicationDxe driver and ArmMmuPeiLib and ArmmmuStandaloneMmLib libraries to the list of the standard components build for ArmPkg on when building for an ARM architecture. AArch64/ArmMmuStandaloneMmLib.c is moved to its parent directory and built for both 32bit and 64bit architectures. This change modifies MmCommunication to use macro ARM_SMC_ID_MM_COMMUNICATE that is defined to the 32bit or 64bit SMC identifier defined in FF-A specification upon the target architecture. Signed-off-by: Etienne Carriere --- ArmPkg/ArmPkg.dec | 2 +- ArmPkg/ArmPkg.dsc | 2 +- .../MmCommunicationDxe/MmCommunication.c | 2 +- .../{AArch64 => }/ArmMmuStandaloneMmLib.c | 23 ++++++++++--------- .../ArmMmuStandaloneMmLib.inf | 6 ++--- 5 files changed, 18 insertions(+), 17 deletions(-) rename ArmPkg/Library/StandaloneMmMmuLib/{AArch64 => }/ArmMmuStandaloneMmLib.c (90%) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index a8a22c649f..07e9930fb0 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -84,7 +84,7 @@ # hardware coherency (i.e., no virtualization or cache coherent DMA) gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043 -[PcdsFeatureFlag.AARCH64] +[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM] ## Used to select method for requesting services from S-EL1.

# TRUE - Selects FF-A calls for communication between S-EL0 and SPMC.
# FALSE - Selects SVC calls for communication between S-EL0 and SPMC.
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 7194eb2d3c..208d609b1b 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -151,7 +151,7 @@ ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf -[Components.AARCH64] +[Components.AARCH64, Components.ARM] ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf diff --git a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c index b1e3095809..4ae38a9f22 100644 --- a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c +++ b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c @@ -125,7 +125,7 @@ MmCommunication2Communicate ( } // SMC Function ID - CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64; + CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE; // Cookie CommunicateSmcArgs.Arg1 = 0; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c similarity index 90% rename from ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c rename to ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c index 5f453d18e4..77bf3dcedf 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c @@ -2,6 +2,7 @@ File managing the MMU for ARMv8 architecture in S-EL0 Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021, Linaro Limited SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): @@ -62,7 +63,7 @@ SendMemoryPermissionRequest ( // for other Direct Request calls which are not atomic // We therefore check only for Direct Response by the // callee. - if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64) { + if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP) { // A Direct Response means FF-A success // Now check the payload for errors // The callee sends back the return value @@ -103,8 +104,8 @@ SendMemoryPermissionRequest ( // Check error response from Callee. if (*RetVal & BIT31) { // Bit 31 set means there is an error retured - // See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 and - // Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64. + // See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET and + // Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET. switch (*RetVal) { case ARM_SVC_SPM_RET_NOT_SUPPORTED: return EFI_UNSUPPORTED; @@ -160,17 +161,17 @@ GetMemoryPermissions ( } // Prepare the message parameters. - // See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64. + // See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET. ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 = 0; - SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg4 = BaseAddress; } else { - SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg1 = BaseAddress; SvcArgs.Arg2 = 0; SvcArgs.Arg3 = 0; @@ -215,19 +216,19 @@ RequestMemoryPermissionChange ( ARM_SVC_ARGS SvcArgs; // Prepare the message parameters. - // See [1], Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64. + // See [1], Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET. ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 = 0; - SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg4 = BaseAddress; SvcArgs.Arg5 = EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg6 = Permissions; } else { - SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg1 = BaseAddress; SvcArgs.Arg2 = EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg3 = Permissions; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf index 89dda509c5..ebb1568279 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf @@ -16,14 +16,14 @@ LIBRARY_CLASS = StandaloneMmMmuLib PI_SPECIFICATION_VERSION = 0x00010032 -[Sources.AARCH64] - AArch64/ArmMmuStandaloneMmLib.c +[Sources] + ArmMmuStandaloneMmLib.c [Packages] ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable [LibraryClasses] -- 2.17.1