From: "Jake Garver via groups.io" <jake=nvidia.com@groups.io>
To: <devel@edk2.groups.io>
Cc: <rebecca@bsdio.com>, <gaoliming@byosoft.com.cn>,
<bob.c.feng@intel.com>, <yuwei.chen@intel.com>,
<ardb+tianocore@kernel.org>, Jake Garver <jake@nvidia.com>
Subject: [edk2-devel] [PATCH] BaseTools/GenFw: Change opcode when converting ADR to ADRP
Date: Thu, 26 Oct 2023 08:31:48 -0700 [thread overview]
Message-ID: <e8e45970cb94a2e5402959a60988904a40c98a63.1698334090.git.jake@nvidia.com> (raw)
In the R_AARCH64_ADR_GOT_PAGE case on AARCH64, be sure to change the
opcode to ADRP. Prior to this change, we updated the address, but not
the opcode.
This resolves an issue experienced when building a StandaloneMm image
with stack protection enabled on GCC 10.5. This scenario generates an
ADR where an ADRP is more common in other versions of GCC tested. That
explains the obscurity of the issue. However, an ADR is valid and
should be handled by GenFw.
Using the stack protection scenario as an example, the following code is
being generated by the toolchain:
# Load to set the stack canary
2ffc: 10028020 adr x0, 8000 <mErrorString+0x1bc>
3008: f940d400 ldr x0, [x0, #424]
# Load to check the stack canary
30cc: b0000020 adrp x0, 8000 <mErrorString+0x1bc>
30d0: f940d400 ldr x0, [x0, #424]
GenFw rewrote that to:
# Load to set the stack canary
2ffc: 10000480 adr x0, 0x308c
3008: 912ec000 add x0, x0, #0xbb0
# Load to check the stack canary
30cc: f0000460 adrp x0, 0x92000
30d0: 912ec000 add x0, x0, #0xbb0
Note that we're now setting the stack canary from the wrong address,
resulting in an erroneous stack fault.
After this fix, the opcode is also updated, so GenFw rewrites it to:
2ffc: 90000480 adrp x0, 0x92000
3008: 912ec000 add x0, x0, #0xbb0
And the stack canary is set correctly.
Signed-off-by: Jake Garver <jake@nvidia.com>
---
BaseTools/Source/C/GenFw/Elf64Convert.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index 9911db65af..4669ac3a2d 100644
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -1565,6 +1565,7 @@ WriteSections64 (
Offset = (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12;
*(UINT32 *)Targ &= 0x9000001f;
+ *(UINT32 *)Targ |= 0x90000000;
*(UINT32 *)Targ |= ((Offset & 0x1ffffc) << (5 - 2)) | ((Offset & 0x3) << 29);
/* fall through */
--
2.34.1
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next reply other threads:[~2023-10-26 15:32 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-26 15:31 Jake Garver via groups.io [this message]
2023-10-26 18:46 ` [edk2-devel] [PATCH] BaseTools/GenFw: Change opcode when converting ADR to ADRP Pedro Falcato
2023-10-27 12:44 ` Jake Garver via groups.io
2023-10-27 13:46 ` Ard Biesheuvel
2023-10-27 14:09 ` Jake Garver via groups.io
2023-10-27 14:12 ` Pedro Falcato
2023-10-27 14:13 ` Ard Biesheuvel
2023-10-27 14:26 ` Pedro Falcato
2023-10-27 14:43 ` Ard Biesheuvel
2023-10-27 15:52 ` Jake Garver via groups.io
2023-11-02 11:47 ` Jake Garver via groups.io
2023-11-02 12:47 ` Pedro Falcato
2023-12-06 16:51 ` Jake Garver via groups.io
2023-12-12 9:22 ` Ard Biesheuvel
2023-12-13 14:57 ` Jake Garver via groups.io
2023-12-13 17:31 ` Ard Biesheuvel
2023-12-13 18:01 ` Pedro Falcato
2023-12-13 19:47 ` Jake Garver via groups.io
2023-12-19 23:29 ` Jake Garver via groups.io
2023-12-20 7:34 ` Ard Biesheuvel
2023-10-27 14:10 ` Pedro Falcato
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