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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL02EPF0000C403.mail.protection.outlook.com (10.167.241.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6178.30 via Frontend Transport; Tue, 28 Mar 2023 18:09:53 +0000 Received: from tlendack-t1.amdoffice.net (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 28 Mar 2023 13:09:52 -0500 From: "Lendacky, Thomas" To: CC: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Michael Roth , Ashish Kalra Subject: [PATCH v2 2/2] UefiCpuPkg/MpInitLib: Ensure SEV-SNP VMSA allocations are not 2MB aligned Date: Tue, 28 Mar 2023 13:09:24 -0500 Message-ID: X-Mailer: git-send-email 2.40.0 In-Reply-To: References: MIME-Version: 1.0 Return-Path: Thomas.Lendacky@amd.com X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000C403:EE_|SJ1PR12MB6028:EE_ X-MS-Office365-Filtering-Correlation-Id: 308649a3-314a-4f44-3ca4-08db2fb7a151 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Mar 2023 18:09:53.4564 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 308649a3-314a-4f44-3ca4-08db2fb7a151 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C403.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6028 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4353 Due to AMD erratum #1467, an SEV-SNP VMSA should not be 2MB aligned. To work around this issue, allocate two pages instead of one. Because of the way that page allocation is implemented, always try to use the second page. If the second page is not 2MB aligned, free the first page and use the second page. If the second page is 2MB aligned, free the second page and use the first page. Freeing in this way reduces holes in the memory map. Fixes: 06544455d0d4 ("UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation ...") Signed-off-by: Tom Lendacky --- UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 26 ++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c b/UefiCpuPkg/Library= /MpInitLib/X64/AmdSev.c index 509be9b41757..c9f0984f41a2 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c +++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c @@ -13,6 +13,8 @@ #include #include =20 +#define _IS_ALIGNED(x, y) (ALIGN_POINTER((x), (y)) =3D=3D (x)) + /** Perform the requested AP Creation action. =20 @@ -121,6 +123,7 @@ SevSnpCreateSaveArea ( UINT32 ApicId ) { + UINT8 *Pages; SEV_ES_SAVE_AREA *SaveArea; IA32_CR0 ApCr0; IA32_CR0 ResetCr0; @@ -131,13 +134,30 @@ SevSnpCreateSaveArea ( =20 if (CpuData->SevEsSaveArea =3D=3D NULL) { // - // Allocate a single page for the SEV-ES Save Area and initialize it. + // Allocate a page for the SEV-ES Save Area and initialize it. Due to = AMD + // erratum #1467 (VMSA cannot be on a 2MB boundary), allocate an extra= page + // to choose from to work around the issue. // - SaveArea =3D AllocateReservedPages (1); - if (!SaveArea) { + Pages =3D AllocateReservedPages (2); + if (!Pages) { return; } =20 + // + // Since page allocation works by allocating downward in the address s= pace, + // try to always free the first (lower address) page to limit possible= holes + // in the memory map. So, if the address of the second page is 2MB ali= gned, + // then use the first page and free the second page. Otherwise, free t= he + // first page and use the second page. + // + if (_IS_ALIGNED (Pages + EFI_PAGE_SIZE, SIZE_2MB)) { + SaveArea =3D (SEV_ES_SAVE_AREA *)Pages; + FreePages (Pages + EFI_PAGE_SIZE, 1); + } else { + SaveArea =3D (SEV_ES_SAVE_AREA *)(Pages + EFI_PAGE_SIZE); + FreePages (Pages, 1); + } + CpuData->SevEsSaveArea =3D SaveArea; } else { SaveArea =3D CpuData->SevEsSaveArea; --=20 2.40.0