From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F2D932117B57A for ; Thu, 25 Oct 2018 21:55:54 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Oct 2018 21:55:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,426,1534834800"; d="scan'208";a="84597990" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.11]) ([10.239.9.11]) by orsmga008.jf.intel.com with ESMTP; 25 Oct 2018 21:55:53 -0700 To: Star Zeng , edk2-devel@lists.01.org Cc: Hao Wu , Jian J Wang , Jiewen Yao References: <1540465113-103964-1-git-send-email-star.zeng@intel.com> <1540465113-103964-2-git-send-email-star.zeng@intel.com> From: "Ni, Ruiyu" Message-ID: Date: Fri, 26 Oct 2018 12:57:09 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <1540465113-103964-2-git-send-email-star.zeng@intel.com> Subject: Re: [PATCH 1/4] MdeModulePkg XhciDxe: Extract new XhciInsertAsyncIntTransfer function X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Oct 2018 04:55:55 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 10/25/2018 6:58 PM, Star Zeng wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 > > Extract new XhciInsertAsyncIntTransfer function from > XhcAsyncInterruptTransfer. > > It is code preparation for following patch, > no essential functional change. > > Cc: Ruiyu Ni > Cc: Hao Wu > Cc: Jian J Wang > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 18 +------- > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 74 +++++++++++++++++++++++++++++--- > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h | 28 ++++++++++++ > 3 files changed, 98 insertions(+), 22 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index f1c60bef01c0..7f64f9c7c982 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -1346,7 +1346,6 @@ XhcAsyncInterruptTransfer ( > EFI_STATUS Status; > UINT8 SlotId; > UINT8 Index; > - UINT8 *Data; > EFI_TPL OldTpl; > > // > @@ -1413,36 +1412,21 @@ XhcAsyncInterruptTransfer ( > goto ON_EXIT; > } > > - Data = AllocateZeroPool (DataLength); > - > - if (Data == NULL) { > - DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to allocate buffer\n")); > - Status = EFI_OUT_OF_RESOURCES; > - goto ON_EXIT; > - } > - > - Urb = XhcCreateUrb ( > + Urb = XhciInsertAsyncIntTransfer ( > Xhc, > DeviceAddress, > EndPointAddress, > DeviceSpeed, > MaximumPacketLength, > - XHC_INT_TRANSFER_ASYNC, > - NULL, > - Data, > DataLength, > CallBackFunction, > Context > ); > - > if (Urb == NULL) { > - DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to create URB\n")); > - FreePool (Data); > Status = EFI_OUT_OF_RESOURCES; > goto ON_EXIT; > } > > - InsertHeadList (&Xhc->AsyncIntTransfers, &Urb->UrbList); > // > // Ring the doorbell > // > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > index 166c44bf5e66..2d7c08dc5bfa 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c > @@ -264,11 +264,11 @@ XhcCreateTransferTrb ( > // No need to remap. > // > if ((Urb->Data != NULL) && (Urb->DataMap == NULL)) { > - if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) { > - MapOp = EfiPciIoOperationBusMasterWrite; > - } else { > - MapOp = EfiPciIoOperationBusMasterRead; > - } > + if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) { > + MapOp = EfiPciIoOperationBusMasterWrite; > + } else { > + MapOp = EfiPciIoOperationBusMasterRead; > + } Unnecessary change, right? > > Len = Urb->DataLen; > Status = Xhc->PciIo->Map (Xhc->PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map); > @@ -1411,6 +1411,70 @@ XhciDelAllAsyncIntTransfers ( > } > > /** > + Insert a single asynchronous interrupt transfer for > + the device and endpoint. > + > + @param Xhc The XHCI Instance > + @param BusAddr The logical device address assigned by UsbBus driver > + @param EpAddr Endpoint addrress > + @param DevSpeed The device speed > + @param MaxPacket The max packet length of the endpoint > + @param DataLen The length of data buffer > + @param Callback The function to call when data is transferred > + @param Context The context to the callback > + > + @return Created URB or NULL > + > +**/ > +URB * > +XhciInsertAsyncIntTransfer ( > + IN USB_XHCI_INSTANCE *Xhc, > + IN UINT8 BusAddr, > + IN UINT8 EpAddr, > + IN UINT8 DevSpeed, > + IN UINTN MaxPacket, > + IN UINTN DataLen, > + IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback, > + IN VOID *Context > + ) > +{ > + VOID *Data; > + URB *Urb; > + > + Data = AllocateZeroPool (DataLen); > + if (Data == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: failed to allocate buffer\n", __FUNCTION__)); > + return NULL; > + } > + > + Urb = XhcCreateUrb ( > + Xhc, > + BusAddr, > + EpAddr, > + DevSpeed, > + MaxPacket, > + XHC_INT_TRANSFER_ASYNC, > + NULL, > + Data, > + DataLen, > + Callback, > + Context > + ); > + if (Urb == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: failed to create URB\n", __FUNCTION__)); FreePool (Data) is needed. > + return NULL; > + } > + > + // > + // New asynchronous transfer must inserted to the head. > + // Check the comments in XhcMoniteAsyncRequests > + // > + InsertHeadList (&Xhc->AsyncIntTransfers, &Urb->UrbList); > + > + return Urb; > +} > + > +/** > Update the queue head for next round of asynchronous transfer > > @param Xhc The XHCI Instance. > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h > index 097408828a1f..cd1403f2842a 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h > @@ -853,6 +853,34 @@ XhciDelAllAsyncIntTransfers ( > ); > > /** > + Insert a single asynchronous interrupt transfer for > + the device and endpoint. > + > + @param Xhc The XHCI Instance > + @param BusAddr The logical device address assigned by UsbBus driver > + @param EpAddr Endpoint addrress > + @param DevSpeed The device speed > + @param MaxPacket The max packet length of the endpoint > + @param DataLen The length of data buffer > + @param Callback The function to call when data is transferred > + @param Context The context to the callback > + > + @return Created URB or NULL > + > +**/ > +URB * > +XhciInsertAsyncIntTransfer ( > + IN USB_XHCI_INSTANCE *Xhc, > + IN UINT8 DeviceAddress, > + IN UINT8 EndPointAddress, > + IN UINT8 DeviceSpeed, > + IN UINTN MaximumPacketLength, > + IN UINTN DataLength, > + IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction, > + IN VOID *Context > + ); > + > +/** > Set Bios Ownership > > @param Xhc The XHCI Instance. > -- Thanks, Ray