From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::441; helo=mail-pf1-x441.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5BCEC2110A000 for ; Thu, 30 Aug 2018 23:17:28 -0700 (PDT) Received: by mail-pf1-x441.google.com with SMTP id l9-v6so5015703pff.9 for ; Thu, 30 Aug 2018 23:17:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=6sIZKtq5ctVsD6J6Ud+MuXbHZ9G+P1mIXUBx4SFu4ws=; b=eKAYdB6NmH5sMIC0a7CKiwibmOAooEEn6bn6LPTbxhzSASEPZXy9X7+J1WqEyVG7Ca ApnyTlcak14P5fhiCKakvEZ/xFojHq9InM7Hy8Svn5vYIiF/exL2Dz5SdqzixP/26rwS wb42z+s/EtgMYOAcqD5q0JbrHBfiEiM4ljQhE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=6sIZKtq5ctVsD6J6Ud+MuXbHZ9G+P1mIXUBx4SFu4ws=; b=KnV+JvK4CLXg1UsKcVMp3h4wqPLJGhWegDC7RsO2d2z0Tsr3vQCn3vuqjXZc53UBe2 T8QTC+OYaUWNFpsXPtOJob0WwsgAQEXXzrNL5tCTa+KjA+VAhki8hGNXXk1G2Ulj49nq 4Rv5Vi+gwtG85624v4OG+g9WmkXgi4l1DqUF+OcMGPf4VOw5pNV/bRSdM55hQM0OZkre KM+BBJoAShBw6ehCjRZZ1vZPW7w7+VcoujZKtLMz46GDkLpcdCeRWuFN8H+jxmqdWq+H UB/oT8loojTFE+HPV+MFncRagSIhrx6yfqX4JvKqaSjgrGee2v5KfeveVE4EOG5bQu4w zFCQ== X-Gm-Message-State: APzg51Cnyh76WN3nZNAdl89CynVzCXmhITgALAqARVZ9yZlRD9tIwDXN xeACtTDBhAnDGRuE6h5fXdXPaw== X-Google-Smtp-Source: ANB0VdbCxzP6+ibRrO6325IR1ofcRtf0rQt0a+dKqoXxtiM6z+ECmNO9cEwiWobBdkTgZaSpGDEleQ== X-Received: by 2002:a63:231c:: with SMTP id j28-v6mr12668572pgj.332.1535696247711; Thu, 30 Aug 2018 23:17:27 -0700 (PDT) Received: from [10.198.0.186] ([64.64.108.241]) by smtp.gmail.com with ESMTPSA id f67-v6sm12660505pff.29.2018.08.30.23.17.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 23:17:26 -0700 (PDT) To: Leif Lindholm Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, michael.d.kinney@intel.com, lersek@redhat.com, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org References: <20180823160743.45638-1-ming.huang@linaro.org> <20180823160743.45638-31-ming.huang@linaro.org> <20180830161548.yfrdsakzsgitiqpw@bivouac.eciton.net> From: Ming Message-ID: Date: Fri, 31 Aug 2018 14:17:11 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.0 MIME-Version: 1.0 In-Reply-To: <20180830161548.yfrdsakzsgitiqpw@bivouac.eciton.net> Subject: Re: [PATCH edk2-platforms v4 30/31] Hisilicon/D06: Add PciPlatformLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 31 Aug 2018 06:17:28 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 8/31/2018 12:15 AM, Leif Lindholm wrote: > On Fri, Aug 24, 2018 at 12:07:42AM +0800, Ming Huang wrote: >> Add a Null PciPlatformLib for build D06. The switch generic >> PciHostBridge patch set add two api for PciPlatform driver, >> so need to implement the two api for D06. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ming Huang >> Reviewed-by: Leif Lindholm > > This library is required to build > Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf, which exists in > D06.dsc from the original revision in: > Hisilicon/D06: Add several base file for D06 > > This breaks the build on every commit between these two points. > If you are OK with the idea, I can just squash them together. Yes, I will squash this patch to "Add several base file for D06". > > There is nothing interesting done in this code anyway - it's just glue. > > Regards, > > Leif > >> --- >> Platform/Hisilicon/D06/D06.dsc | 1 + >> Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf | 30 +++++++++ >> Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c | 67 ++++++++++++++++++++ >> 3 files changed, 98 insertions(+) >> >> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc >> index e6bebfb78b..e828010abf 100644 >> --- a/Platform/Hisilicon/D06/D06.dsc >> +++ b/Platform/Hisilicon/D06/D06.dsc >> @@ -95,6 +95,7 @@ >> FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf >> !endif >> PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf >> + PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf >> >> [LibraryClasses.common.SEC] >> ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf >> diff --git a/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf >> new file mode 100644 >> index 0000000000..7648322522 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf >> @@ -0,0 +1,30 @@ >> +## @file >> +# PCI Segment Library for Hisilicon Hi1610/Hi1616 SoC with multiple RCs >> +# >> +# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
>> +# Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.
>> +# Copyright (c) 2018, Hisilicon Ltd. All rights reserved.
>> +# >> +# This program and the accompanying materials >> +# are licensed and made available under the terms and conditions of the BSD License >> +# which accompanies this distribution. The full text of the license may be found at >> +# http://opensource.org/licenses/bsd-license.php. >> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +# >> +# >> +## >> + >> +[Defines] >> + INF_VERSION = 0x0001001A >> + BASE_NAME = Hi1620PciPlatformLib >> + FILE_GUID = 29ba30da-68bc-46a5-888f-c65dabb67fd8 >> + MODULE_TYPE = BASE >> + VERSION_STRING = 1.0 >> + LIBRARY_CLASS = PciPlatformLib >> + >> +[Sources] >> + Hi1620PciPlatformLib.c >> + >> +[Packages] >> + MdePkg/MdePkg.dec >> diff --git a/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c >> new file mode 100644 >> index 0000000000..ff77974c0f >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c >> @@ -0,0 +1,67 @@ >> +/** @file >> +* >> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. >> +* Copyright (c) 2018, Linaro Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#include >> +#include >> + >> + >> +/*++ >> + >> +Routine Description: >> + >> + Perform Platform initialization first in PciPlatform. >> + >> +Arguments: >> + >> +Returns: >> + >> + VOID. >> + >> +--*/ >> +VOID >> +EFIAPI >> +PciInitPlatform ( >> + VOID >> + ) >> +{ >> + return; >> +} >> + >> +/*++ >> + >> +Routine Description: >> + >> + Perform Platform initialization by the phase indicated. >> + >> +Arguments: >> + >> + HostBridge - The associated PCI host bridge handle. >> + Phase - The phase of the PCI controller enumeration. >> + ChipsetPhase - Defines the execution phase of the PCI chipset driver. >> + >> +Returns: >> + >> +--*/ >> +VOID >> +EFIAPI >> +PhaseNotifyPlatform ( >> + IN EFI_HANDLE HostBridge, >> + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase, >> + IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase >> + ) >> +{ >> + return; >> +} >> + >> -- >> 2.18.0 >>