[PATCH] ArmPlatformPkg/PL011UartLib: Check PID2 if FiFoDepth is zero

["Irene Park" <ipark@nvidia.com>]

From: Irene Park <ipark@nvidia.com>

PL011UartLib determines its FIFO depth based on the PID2 value but
the register PID2 is not mandatory as per the SBSA spec.
This change won't check PID2 if PcdUartDefaultReceiveFifoDepth is set
to a value > 0.

Change-Id: I2dd7b3412f9306888078e0cb0488b902d4a8ace9
Signed-off-by: Irene Park <ipark@nvidia.com>
---
 ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c   | 4 ++++
 ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf | 1 +
 2 files changed, 5 insertions(+)

diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
index 801990d..05ad1ad 100644
--- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
+++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
@@ -79,9 +79,13 @@ PL011UartInitializePort (
   UINT32      Fractional;
   UINT32      HardwareFifoDepth;
 
+  HardwareFifoDepth = FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth);
+#if FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth) == 0
   HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
                        > PL011_VER_R1P4) \
                       ? 32 : 16 ;
+#endif
+
   // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
   // 1 char buffer as the minimum FIFO size. Because everything can be rounded
   // down, there is no maximum FIFO size.
diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
index d99e89f..e3da507 100644
--- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
@@ -30,6 +30,7 @@
   ArmPlatformPkg/ArmPlatformPkg.dec
 
 [FixedPcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate
 
   gArmPlatformTokenSpaceGuid.PL011UartInteger
-- 
2.7.4