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charset="UTF-8" Content-Transfer-Encoding: 7bit Hi Michael This is the change to MdePkg/Library/BaseLib/RiscV64. Since it is for RiscV specific, I somehow got the review from Sunil. Not sure need additional reviewer and or anything else from my side ? It is my first patch to edk2, please help proceed and look for the feedback. Thanks On 2023/6/3 1:09, Sunil V L wrote: > On Thu, Jun 01, 2023 at 06:56:05PM +0800, Yong Li wrote: >> Implement the SpeculationBarrier with implementations consisting of >> fence instruction which provides finer-grain memory orderings. >> Perform Data Barrier in RiscV: fence rw,rw >> Perform Instruction Barrier in RiscV: fence.i; fence r,r >> More detail is in Appendix A: RVWMO Explanatory Material in >> https://github.com/riscv/riscv-isa-manual >> >> This API is first introduced in the below commits for IA32 and x64 >> https://github.com/tianocore/edk2/commit/d9f1cac51bd354507e880e614d11a1dc160d38a3 >> https://github.com/tianocore/edk2/commit/e83d841fdc2878959185c4c6cc38a7a1e88377a4 >> and below the commit for ARM and AArch64 implementation >> https://github.com/tianocore/edk2/commit/c0959b4426b2da45cdb8146a5116bb4fd9b86534 >> >> This commit is to add the RiscV64 implementation which will be used by >> variable service under Variable/RuntimeDxe >> >> Cc: Andrei Warkentin >> Cc: Evan Chai >> Cc: Sunil V L >> Cc: Tuan Phan >> Signed-off-by: Yong Li >> --- > > Reviewed-by: Sunil V L > > Thanks, > Sunil > > > > >