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From: Laszlo Ersek <lersek@redhat.com>
To: Brijesh Singh <brijesh.singh@amd.com>, edk2-devel@lists.01.org
Cc: Thomas.Lendacky@amd.com, leo.duran@amd.com,
	Jordan Justen <jordan.l.justen@intel.com>
Subject: Re: [RFC v4 05/13] OvmfPkg/PlatformPei: Set memory encryption PCD when SEV is enabled
Date: Thu, 11 May 2017 16:37:32 +0200	[thread overview]
Message-ID: <efe0fcde-9c0c-e36b-4ca2-5651df0d8feb@redhat.com> (raw)
In-Reply-To: <1494454162-9940-6-git-send-email-brijesh.singh@amd.com>

On 05/11/17 00:09, Brijesh Singh wrote:
> Secure Encrypted Virtualization (SEV) guest VMs have the concept of
> private and shared memory. Private memory is encrypted with the
> guest-specific key, while shared memory may be encrypted with hypervisor
> key.  Certain types of memory (namely instruction pages and guest page
> tables) are always treated as private memory by the hardware.
> For data memory, SEV guest VMs can choose which pages they would like
> to be private. The choice is done using the standard CPU page tables
> using the C-bit. When building the initial page table we mark all the
> memory as private.
> 
> The patch sets the memory encryption PCD, the PCD is used by DxeCore
> when building the initial page table.

Please replace the last paragraph in the commit message with the
following (mostly based on
<http://mid.mail-archive.com/ec83b052-1af7-c985-35a3-0838c5943add@redhat.com>):

----
The patch sets the memory encryption PCD. The PCD is consumed by the
following edk2 modules, which manipulate page tables:

- PEI phase modules: CapsulePei, DxeIplPeim, S3Resume2Pei.

  CapsulePei is not used by OVMF. DxeIplPeim consumes the PCD at the
  end of the PEI phase, when it builds the initial page tables for the
  DXE core / DXE phase. S3Resume2Pei does not consume the PCD in its
  entry point function, only when DxeIplPeim branches to the S3 resume
  path at the end of the PEI phase, and calls S3Resume2Pei's
  EFI_PEI_S3_RESUME2_PPI.S3RestoreConfig2() member function.

  Therefore it is safe to set the PCD for these modules in PlatformPei.

- DXE phase modules: BootScriptExecutorDxe, CpuDxe, PiSmmCpuDxeSmm.

  They are all dispatched after the PEI phase, so setting the PCD for
  them in PlatformPei is safe. (BootScriptExecutorDxe is launched "for
  real" in the PEI phase during S3 resume, but it caches the PCD into a
  static variable when its entry point is originally invoked in DXE.)
----

With that update,

Reviewed-by: Laszlo Ersek <lersek@redhat.com>

Thanks,
Laszlo


> 
> 
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> ---
>  OvmfPkg/OvmfPkgIa32.dsc             |  3 +
>  OvmfPkg/OvmfPkgIa32X64.dsc          |  3 +
>  OvmfPkg/OvmfPkgX64.dsc              |  3 +
>  OvmfPkg/PlatformPei/PlatformPei.inf |  3 +
>  OvmfPkg/PlatformPei/Platform.h      |  5 ++
>  OvmfPkg/PlatformPei/AmdSev.c        | 62 ++++++++++++++++++++
>  OvmfPkg/PlatformPei/Platform.c      |  1 +
>  7 files changed, 80 insertions(+)
> 
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index 265f2d2b6d2f..139d54aa010e 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -530,6 +530,9 @@ [PcdsDynamicDefault]
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000
>  
> +  # Set memory encryption mask
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
> +
>  !if $(SMM_REQUIRE) == TRUE
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index 3b50a2dd2d2f..9403f76ce862 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -538,6 +538,9 @@ [PcdsDynamicDefault]
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000
>  
> +  # Set memory encryption mask
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
> +
>  !if $(SMM_REQUIRE) == TRUE
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 82c73331aa9f..e137143f7afa 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -537,6 +537,9 @@ [PcdsDynamicDefault]
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000
>  
> +  # Set memory encryption mask
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
> +
>  !if $(SMM_REQUIRE) == TRUE
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
> diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
> index 53c6dd445a0e..a9a7a76c7325 100644
> --- a/OvmfPkg/PlatformPei/PlatformPei.inf
> +++ b/OvmfPkg/PlatformPei/PlatformPei.inf
> @@ -29,6 +29,7 @@ [Defines]
>  #
>  
>  [Sources]
> +  AmdSev.c
>    Cmos.c
>    FeatureControl.c
>    Fv.c
> @@ -60,6 +61,7 @@ [LibraryClasses]
>    QemuFwCfgLib
>    QemuFwCfgS3Lib
>    MtrrLib
> +  MemEncryptSevLib
>    PcdLib
>  
>  [Pcd]
> @@ -94,6 +96,7 @@ [Pcd]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack
>    gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable
>    gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds
> diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
> index 18f42c3f0ea8..a7729b9df44b 100644
> --- a/OvmfPkg/PlatformPei/Platform.h
> +++ b/OvmfPkg/PlatformPei/Platform.h
> @@ -88,6 +88,11 @@ XenDetect (
>    VOID
>    );
>  
> +VOID
> +AmdSevInitialize (
> +  VOID
> +  );
> +
>  extern BOOLEAN mXen;
>  
>  VOID
> diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
> new file mode 100644
> index 000000000000..26f7c3fdbb13
> --- /dev/null
> +++ b/OvmfPkg/PlatformPei/AmdSev.c
> @@ -0,0 +1,62 @@
> +/**@file
> +  Initialize Secure Encrypted Virtualization (SEV) support
> +
> +  Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
> +
> +  This program and the accompanying materials
> +  are licensed and made available under the terms and conditions of the BSD
> +  License which accompanies this distribution.  The full text of the license
> +  may be found at http://opensource.org/licenses/bsd-license.php
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +//
> +// The package level header files this module uses
> +//
> +#include <PiPei.h>
> +
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Register/Cpuid.h>
> +#include <Register/Amd/Cpuid.h>
> +#include <Library/MemEncryptSevLib.h>
> +
> +/**
> +
> +  Function checks if SEV support is available, if present then it sets
> +  the dynamic PcdPteMemoryEncryptionAddressOrMask with memory encryption mask.
> +
> +  **/
> +VOID
> +EFIAPI
> +AmdSevInitialize (
> +  VOID
> +  )
> +{
> +  CPUID_MEMORY_ENCRYPTION_INFO_EBX  Ebx;
> +  UINT64                            EncryptionMask;
> +  RETURN_STATUS                     PcdStatus;
> +
> +  //
> +  // Check if SEV is enabled
> +  //
> +  if (!MemEncryptSevIsEnabled ()) {
> +    return;
> +  }
> +
> +  //
> +  // CPUID Fn8000_001F[EBX] Bit 0:5 (memory encryption bit position)
> +  //
> +  AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, NULL, &Ebx.Uint32, NULL, NULL);
> +  EncryptionMask = LShiftU64 (1, Ebx.Bits.PtePosBits);
> +
> +  //
> +  // Set Memory Encryption Mask PCD
> +  //
> +  PcdStatus = PcdSet64S (PcdPteMemoryEncryptionAddressOrMask, EncryptionMask);
> +  ASSERT_RETURN_ERROR (PcdStatus);
> +
> +  DEBUG ((DEBUG_INFO, "SEV is enabled (mask 0x%lx)\n", EncryptionMask));
> +}
> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
> index 5e983a8dcea9..5121e337bdcb 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -678,6 +678,7 @@ InitializePlatform (
>      NoexecDxeInitialization ();
>    }
>  
> +  AmdSevInitialize ();
>    MiscInitialization ();
>    InstallFeatureControlCallback ();
>  
> 



  reply	other threads:[~2017-05-11 14:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-10 22:09 [RFC v4 00/13] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2017-05-10 22:09 ` [RFC v4 01/13] UefiCpuPkg: Define AMD Memory Encryption specific CPUID and MSR Brijesh Singh
2017-05-11  0:30   ` Fan, Jeff
2017-05-10 22:09 ` [RFC v4 02/13] OvmfPkg/ResetVector: Set C-bit when building initial page table Brijesh Singh
2017-05-11 11:40   ` Laszlo Ersek
2017-05-10 22:09 ` [RFC v4 03/13] OvmfPkg: Update dsc to use IoLib from BaseIoLibIntrinsicSev.inf Brijesh Singh
2017-05-11 11:46   ` Laszlo Ersek
2017-05-10 22:09 ` [RFC v4 04/13] OvmfPkg/BaseMemcryptSevLib: Add SEV helper library Brijesh Singh
2017-05-11 14:04   ` Laszlo Ersek
2017-05-11 18:03     ` Brijesh Singh
2017-05-10 22:09 ` [RFC v4 05/13] OvmfPkg/PlatformPei: Set memory encryption PCD when SEV is enabled Brijesh Singh
2017-05-11 14:37   ` Laszlo Ersek [this message]
2017-05-11 18:04     ` Brijesh Singh
2017-05-10 22:09 ` [RFC v4 06/13] OvmfPkg:AmdSevDxe: add AmdSevDxe driver Brijesh Singh
2017-05-11  0:56   ` Yao, Jiewen
2017-05-11 15:19   ` Laszlo Ersek
2017-05-11 15:53     ` Laszlo Ersek
2017-05-11 17:43       ` Jordan Justen
2017-05-11 18:01         ` Brijesh Singh
2017-05-15 17:47           ` Jordan Justen
2017-05-16 12:04             ` Brijesh Singh
2017-05-16 17:56               ` Jordan Justen
2017-05-16 20:25                 ` Brijesh Singh
2017-05-18  8:50                   ` Laszlo Ersek
2017-05-11 20:14         ` Laszlo Ersek
2017-05-11 18:12     ` Brijesh Singh
2017-05-10 22:09 ` [RFC v4 07/13] OvmfPkg/QemuFwCfgLib: Provide Pei and Dxe specific library Brijesh Singh
2017-05-11 15:40   ` Laszlo Ersek
2017-05-11 18:16     ` Brijesh Singh
2017-05-10 22:09 ` [RFC v4 08/13] OvmfPkg/QemuFwCfgLib: Prepare for SEV support Brijesh Singh
2017-05-11 15:57   ` Laszlo Ersek
2017-05-10 22:09 ` [RFC v4 09/13] OvmfPkg/QemuFwCfgLib: Implement SEV internal function for SEC phase Brijesh Singh
2017-05-11 16:24   ` Laszlo Ersek
2017-05-11 18:21     ` Brijesh Singh
2017-05-10 22:09 ` [RFC v4 10/13] OvmfPkg/QemuFwCfgLib: Implement SEV internal functions for PEI phase Brijesh Singh
2017-05-11 16:38   ` Laszlo Ersek
2017-05-10 22:09 ` [RFC v4 11/13] OvmfPkg/QemuFwCfgLib: Implement SEV internal function for Dxe phase Brijesh Singh
2017-05-11 17:07   ` Laszlo Ersek
2017-05-10 22:09 ` [RFC v4 12/13] OvmfPkg/QemuFwCfgLib: Add option to dynamic alloc FW_CFG_DMA Access Brijesh Singh
2017-05-11 17:10   ` Laszlo Ersek
2017-05-10 22:09 ` [RFC v4 13/13] OvmfPkg/QemuFwCfgLib: Add SEV support Brijesh Singh
2017-05-11 17:44   ` Laszlo Ersek

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