From: "Tiger Liu(BJ-RD)" <tigerliu@zhaoxin.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"pedro.falcato@gmail.com" <pedro.falcato@gmail.com>,
"yoshinoyatoko@163.com" <yoshinoyatoko@163.com>
Subject: Re: [edk2-devel] PciBus scan: Does it support scan from EndBusNum to StartBusNum?
Date: Wed, 22 Feb 2023 01:10:12 +0000 [thread overview]
Message-ID: <effd2f65aaee4e49a4ba7c11959e10b0@zhaoxin.com> (raw)
In-Reply-To: <CAKbZUD2opZK-h+TSx4+sBCdc91fgA+r3DYn8XNBag5KYdxt7tQ@mail.gmail.com>
Hi, Pedro:
Thanks for your reply!
For example:
There are 4 root bridges in a server motherboard, named them as : RP-A / RP-B / RP-C / RP-D
RP-A : PCI Bus num range is 0 ~0x40 (hardware pre-configured)
RP-B : PCI Bus num range is 0x40 ~0x80 (hardware pre-configured)
RP-C : PCI Bus num range is 0x80 ~0xA0 (hardware pre-configured)
RP-D : PCI Bus num range is 0xA0 ~0xE0 (hardware pre-configured)
Usually, we create pci root bridge instances with sequence RP-A / RP-B / RP-C / RP-D.
So, Pci bus driver scan pci root bridge sequence is RP-A/RP-B/RP-C/RP-D.
So, could I rewrite pci root bridge driver with different root bridge report sequence?
For example:
I let pci root bridge driver create RP-D's pci root bridge io protocol first, and then RP-C / RP-B / RP-A, and so pci bus briver could scan RP-D's pci bus range first?
Thanks
-----邮件原件-----
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Pedro Falcato
发送时间: 2023年2月22日 3:18
收件人: devel@edk2.groups.io; yoshinoyatoko@163.com
主题: Re: [edk2-devel] PciBus scan: Does it support scan from EndBusNum to StartBusNum?
On Tue, Feb 21, 2023 at 3:08 AM Yoshinoya <yoshinoyatoko@163.com> wrote:
>
> Hi
> Usually PciBus scan is from low bus num to high bus num.
>
> So, does it support scan from end bus num to start bus num?
>
> Thanks
Hi,
What do you mean? Why do you want this?
Do you want to number buses in reverse? That is technically doable (apart from probably the host bridge itself) but absolutely useless.
If you mean "order of enumeration", then no. It is not possible. As
PCI(e) topology works, you always start at the host bridge(s)
(00:00.0) and its bus (bus 0, by definition), and then walk through whatever bridges you find. You cannot really start at any other place, unless you do some silly bruteforce method where you probe every bus for a device; and that method would not allow you to configure the buses and their BARs, as you need to.
--
Pedro
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next prev parent reply other threads:[~2023-02-22 1:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-05 11:32 [edk2-devel] Python368.efi failed to run in shell environment Yoshinoya
2022-10-05 16:28 ` Michael D Kinney
2022-10-11 10:20 ` Yoshinoya
2022-10-18 9:04 ` Jayaprakash, N
2022-10-19 8:30 ` Yoshinoya
2022-10-19 13:16 ` Jayaprakash, N
2022-10-20 3:06 ` Yoshinoya
2022-10-20 3:18 ` Jayaprakash, N
2022-11-08 3:16 ` [edk2-devel] Access 64bit address space in 32bit mode Yoshinoya
2022-11-09 17:20 ` Andrew Fish
2022-11-09 18:58 ` vincent zimmer
2022-11-09 20:14 ` Andrew Fish
2023-02-18 0:55 ` [edk2-devel] PciBus scan: Does it support scan from EndBusNum to StartBusNum? Yoshinoya
2023-02-20 4:28 ` Yoshinoya
2023-02-21 1:27 ` Yoshinoya
2023-02-21 2:47 ` Yoshinoya
2023-02-21 19:18 ` Pedro Falcato
2023-02-22 1:10 ` Tiger Liu(BJ-RD) [this message]
2023-02-22 1:22 ` Pedro Falcato
2023-05-23 9:55 ` [edk2-devel] PciHostBridge: dynamic pcie bus limit assignment Yoshinoya
2022-11-09 20:40 ` [edk2-devel] Access 64bit address space in 32bit mode Brian J. Johnson
2023-01-03 9:04 ` [edk2-devel] PciBus driver: support pcie 4.0 bus/device enumeration ? Yoshinoya
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