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Mon, 14 Feb 2022 10:45:35 -0800 From: "Jeff Brasen" To: CC: , , Jeff Brasen Subject: [PATCH v2] MdeModulePkg/NonDiscoverablePciDeviceDxe: Allow partial FreeBuffer Date: Mon, 14 Feb 2022 18:45:31 +0000 Message-ID: X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public Return-Path: jbrasen@nvidia.com MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b5c1dbb9-fa9b-4cd9-bb72-08d9efea30bd X-MS-TrafficTypeDiagnostic: DM6PR12MB4777:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2733; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nPpojOxefpc9wggImZQnB3iKeFq+550R/wJMAE5f2s32S18Suc5OxB3u1va4Cg9xlfqxUZez5LnGas48qP+rchMWxQ7MM+HPDrHqLdklOtuQqBQBdCrRQoM7+MNIRXVThZYEgDNG9ZFM8qBF0VN1XLBRVQyPDm2GnuVBJ4SMcllo/mWw1pPhY2hzq7eBzpgZYhpcDjcdnuByOio38wWn3zp5kan1zghzb66jeVUCTWVm2astrI1YnzxAqauKjtYT+YIkBnHQgXtxBJt7jvwJp0k+Zc7PxI/+ZqCgglz3fBvJywaBHvy5DZJJ+XeNvhQzowfz79DNCc8DAlDUJttLiqnRHw3rqzy/slgWOMkDfOaxFSQf3kkOAss0T9TaMNEbhYb/CNn5ain5y5eKK7Y92iQXT93SVWnPjU6+WhEnWnL7XzSbZQTuNFNRTCeMFD1oztDUO3MoHgJi8m8dyD6dPf/I30jq+MQo2p1bQ7/HyvniLo1Dx5lch8Uv/R+2b4W64VFPD3gh/ULs+TDCly13zQ4Ac/ZpjOyTLga60TAfxuq3X+tu3YY1/9SiLm2r4bwOQPZdJVwX62byQug+3QPeW2mbHTpOk05nSzeVPU8a7G0s5Kxi7CJ05PxICCnPr64U0o23PSI1XiT2E+Ix2mV24A29QoS21MjqMkDmY7iwaEdsZKOucGIJG936avwqmmVCwRMq7qbQVBozpAxuvZ1JhozOgHlRvCJP4DZmS8Ps/Q8= X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(8676002)(5660300002)(2906002)(70206006)(70586007)(81166007)(356005)(40460700003)(8936002)(4326008)(86362001)(36756003)(47076005)(82310400004)(7696005)(6666004)(508600001)(54906003)(316002)(6916009)(36860700001)(426003)(26005)(186003)(336012)(2616005)(107886003)(83380400001)(213903007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Feb 2022 18:45:36.6731 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5c1dbb9-fa9b-4cd9-bb72-08d9efea30bd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4777 Content-Type: text/plain Add support for partial free of non cached buffers. If a request for less than the full size is requested new allocations for the remaining head and tail of the buffer are added to the list. Added verification that Buffer is EFI_PAGE_SIZE aligned. The XHCI driver does this if the page size for the controller is >4KB. Signed-off-by: Jeff Brasen --- .../NonDiscoverablePciDeviceIo.c | 53 ++++++++++++++++++- 1 file changed, 51 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c index c1c5c6267c..77809cfedf 100644 --- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c +++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c @@ -960,12 +960,23 @@ NonCoherentPciIoFreeBuffer ( LIST_ENTRY *Entry; EFI_STATUS Status; NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *Alloc; + NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *AllocHead; + NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *AllocTail; BOOLEAN Found; + UINTN StartPages; + UINTN EndPages; + + if (HostAddress != ALIGN_POINTER (HostAddress, EFI_PAGE_SIZE)) { + ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER); + return EFI_INVALID_PARAMETER; + } Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO (This); Found = FALSE; Alloc = NULL; + AllocHead = NULL; + AllocTail = NULL; // // Find the uncached allocation list entry associated @@ -976,9 +987,13 @@ NonCoherentPciIoFreeBuffer ( Entry = Entry->ForwardLink) { Alloc = BASE_CR (Entry, NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION, List); - if ((Alloc->HostAddress == HostAddress) && (Alloc->NumPages == Pages)) { + StartPages = 0; + if (Alloc->HostAddress < HostAddress) { + StartPages = (HostAddress - Alloc->HostAddress) / EFI_PAGE_SIZE; + } + if ((Alloc->HostAddress <= HostAddress) && (Alloc->NumPages >= (Pages + StartPages))) { // - // We are freeing the exact allocation we were given + // We are freeing at least part of what we were given // before by AllocateBuffer() // Found = TRUE; @@ -991,7 +1006,41 @@ NonCoherentPciIoFreeBuffer ( return EFI_NOT_FOUND; } + EndPages = Alloc->NumPages - (Pages + StartPages); + + if (StartPages != 0) { + AllocHead = AllocatePool (sizeof *AllocHead); + if (AllocHead == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + AllocHead->HostAddress = Alloc->HostAddress; + AllocHead->NumPages = StartPages; + AllocHead->Attributes = Alloc->Attributes; + } + + if (EndPages != 0) { + AllocTail = AllocatePool (sizeof *AllocTail); + if (AllocTail == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + AllocTail->HostAddress = Alloc->HostAddress + ((Pages + StartPages) * EFI_PAGE_SIZE); + AllocTail->NumPages = EndPages; + AllocTail->Attributes = Alloc->Attributes; + } + RemoveEntryList (&Alloc->List); + // + // Record this new sub allocations in the linked list, so we + // can restore the memory space attributes later + // + if (AllocHead != NULL) { + InsertHeadList (&Dev->UncachedAllocationList, &AllocHead->List); + } + if (AllocTail != NULL) { + InsertHeadList (&Dev->UncachedAllocationList, &AllocTail->List); + } Status = gDS->SetMemorySpaceAttributes ( (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, -- 2.17.1