From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.25644.1591604976876086072 for ; Mon, 08 Jun 2020 01:29:37 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: ard.biesheuvel@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BAC301F1; Mon, 8 Jun 2020 01:29:35 -0700 (PDT) Received: from [192.168.1.69] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 502AA3F6CF; Mon, 8 Jun 2020 01:29:33 -0700 (PDT) Subject: Re: [edk2-devel] [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth To: devel@edk2.groups.io, ipark@nvidia.com References: <5a94d7db2db04a22baa79c65d42feeea30bf81b8.1591413682.git.ipark@nvidia.com> From: "Ard Biesheuvel" Message-ID: Date: Mon, 8 Jun 2020 10:29:27 +0200 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:68.0) Gecko/20100101 Thunderbird/68.8.1 MIME-Version: 1.0 In-Reply-To: <5a94d7db2db04a22baa79c65d42feeea30bf81b8.1591413682.git.ipark@nvidia.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 6/6/20 5:23 AM, Irene Park via groups.io wrote: > From: Irene Park > > PL011UartLib determines its FIFO depth based on the PID2 value but > the register PID2 is not mandatory in the SBSA spec. > This change adds a new 32bit PCD reference to define a FIFO depth and > make PL011UartLib available for the custom UART which is compliant > to the SBSA spec but doesn't support the optional register of PID2. > What does 'doesn't support' mean in this case? > * Available values for PL011UartFifoDepth: 0, 16, 32 > > Note that a FIFO depth will be determined based on PID2 when the PCD > reference is set to 0. > > Signed-off-by: Irene Park > --- > ArmPlatformPkg/ArmPlatformPkg.dec | 2 ++ > ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c | 4 ++++ > ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf | 1 + > 3 files changed, 7 insertions(+) > > diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec > index 696d636..b4b950f 100644 > --- a/ArmPlatformPkg/ArmPlatformPkg.dec > +++ b/ArmPlatformPkg/ArmPlatformPkg.dec > @@ -72,6 +72,8 @@ > gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D > gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F > gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E > + ## FIFO Depth in 0/16/32 (0 to determine FIFO depth based on PID2) > + gArmPlatformTokenSpaceGuid.PL011UartFifoDepth|0|UINT32|0x0000003F > > ## PL011 Serial Debug UART > gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030 > diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > index 801990d..1aa6830 100644 > --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > @@ -79,9 +79,13 @@ PL011UartInitializePort ( > UINT32 Fractional; > UINT32 HardwareFifoDepth; > > + HardwareFifoDepth = FixedPcdGet8 (PL011UartFifoDepth); > +#if FixedPcdGet8 (PL011UartFifoDepth) == 0 > HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \ > > PL011_VER_R1P4) \ > ? 32 : 16 ; > +#endif > + > // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept > // 1 char buffer as the minimum FIFO size. Because everything can be rounded > // down, there is no maximum FIFO size. > diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > index d99e89f..3e5efc7 100644 > --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > @@ -35,3 +35,4 @@ > gArmPlatformTokenSpaceGuid.PL011UartInteger > gArmPlatformTokenSpaceGuid.PL011UartFractional > gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant > + gArmPlatformTokenSpaceGuid.PL011UartFifoDepth >