From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id D20CE7803E0 for ; Mon, 4 Dec 2023 07:32:00 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=mPAQIFY1vasqQWddKoPi2DiubtBzSxnVdr/5FnolFJw=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:From:To:Cc:Reply-To:References:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1701675119; v=1; b=ucvcSsJkEfyuPUvY+plkjWa26bLWrsHogd43YM1CPzwaQsBqxPqDmWh8DiNzSmgIlh2s5cNY 2BHeS7iWaDvDY/HTIo5GJqfhhVqMBll3CNcAuZ01RCXh0ia2u6wG2w2qUeuDp9vbL6HadUgZPow MeLI6G6+HIHsR1n63rWuSNeU= X-Received: by 127.0.0.2 with SMTP id 89cqYY7687511xNwEsA8MY61; Sun, 03 Dec 2023 23:31:59 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.63812.1701675117729761134 for ; Sun, 03 Dec 2023 23:31:58 -0800 X-Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8DxFehjgG1lC64+AA--.1155S3; Mon, 04 Dec 2023 15:31:47 +0800 (CST) X-Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bx3y9cgG1l+QVUAA--.55182S3; Mon, 04 Dec 2023 15:31:40 +0800 (CST) Message-ID: Date: Mon, 4 Dec 2023 15:31:40 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH v3 13/39] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg From: "Chao Li" To: devel@edk2.groups.io, ray.ni@intel.com Cc: "Dong, Eric" , "Kumar, Rahul R" , Gerd Hoffmann , Leif Lindholm , Ard Biesheuvel , Sami Mujawar , Sunil V L , "Warkentin, Andrei" Reply-To: devel@edk2.groups.io,lichao@loongson.cn References: <20231117095742.3605778-1-lichao@loongs> <20231117100026.3609206-1-lichao@loongson.cn> <179C457B5B852375.31732@groups.io> In-Reply-To: <179C457B5B852375.31732@groups.io> X-CM-TRANSID: AQAAf8Bx3y9cgG1l+QVUAA--.55182S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAPCGVtNywDhgABsR X-Coremail-Antispam: 1Uk129KBj93XoW3CF1fJw1UWF18Cw1rGF13Jrc_yoWDWrWkpF yDC3y5Gw4ktrW3WrWxXr48uFn5C3yrGa45Gryqyrn5Cw45t3s7uFZIk34jqFZrAF1fC34U ZF42gw47uFZ5J3gCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ34c02F40En4AKxVAvwIkv4cxYr27v73VFW2AGmfu7bjvjm3AaLaJ3UjIY CTnIWjp_UUUY27kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcI k0rVWrJVCq3wAFIxvE14AKwVWUGVWUXwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK 021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r 4j6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI0UMc 02F40En4AKxVAvwIkv4cxYr24lYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v2 6r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvEwIxGrwCjr7xvwVCIw2I0I7xG6c 02F41l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AK xVWUGVWUWwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrx kI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v2 6r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8Jw CI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j8iSdUUUUU = Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: UeLvce5uoeUD3V9GB0WyKvP8x7686176AA= Content-Type: multipart/alternative; boundary="------------6LxqWXicrVXOvBUs2NVb3HP7" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=ucvcSsJk; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --------------6LxqWXicrVXOvBUs2NVb3HP7 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hi Ray, For this patch, I checked again and here are my opinions: 1. (Set|Get)MemoryRegionAttribute is difficult to merge together,=20 because the parameters between the tow APIs are not similar. So I=20 suggest they be independent. 2. The EfiAttributeConverse, GetMemoryRegionAttribute,=20 SetMemoryRegionAttributes and ConfigureMemoryManagementUnit will be=20 retained and other APIs will be removed. Because the functions expressed=20 by other APIs can be completed though the retained API. 3. You pointed out MEMORY_REGION_DESCRIPTOR have no one to construct it,=20 do I need add a new API to construct it? Could it be named=20 GetMemoryMapPolicy and accept a parameter with MEMORY_REGION_DESCRIPTOR** ? Hope to hear from you! :) Thanks, Chao On 2023/11/30 10:25, Chao Li wrote: > > Hi Ray, > > Thanks for review, here are some of my thoughts: > > On 2023/11/30 08:59, Ni, Ray wrote: >> Chao, >> Since the lib class is so general, I'd like to understand more details t= o make sure it can properly fit into any CPU arch. >> >> In X86, cache setting is through MSRs and Page tables, and memory access= control (read-only, not-present, non-executable) is through page tables. > Let me understand, 'cache setting' means does it access a certain=20 > address(probably a memory address) via cache? If so, I'd say the=20 > 'cache setting' should be a part of attributes. >> This CpuMmuLib is to provide both services. How does LoongArch64 manage = the cache settings and memory access control? >> Is it proper to combine both services into one lib? > In LoongArch64, cache settings and memory access control are performed=20 > via page tables. Please check the patch 14 of this series. >> If the backend silicon IP is the same one that supports the "one" lib de= sign, can we refine the lib API a bit? > Yes, I think Attribute's instance family can be bear the memory access=20 > and cache setting. So what are you suggestions if we improve the lib API? >> We have (Set|Get)MemoryRegionAttribute() and (Set|Clear)MemoryRegion(NoE= xec|ReadOnly). Can we merge them together? > Do you means the (Set|Get) merge together(differentiate Get or Set=20 > operations by parameters)? If so, I think it's OK, but maybe some=20 > existing instances will be modified together. >> And the API ConfigureMemoryManagementUint() accepts MEMORY_REGION_DESCRI= PTOR but none of other APIs helps to construct the descriptor. > Yes, currently, no one helps construct MEMORY_REGION_DESCRIPTOR. I=20 > think the construction of descriptors is not part of the API, it=20 > should be the localized or private when I design them. Do I need to=20 > add an API to construct descripters? >> It seems to me the MmuLib is simply a combination of different random AP= Is. >> It's not a well-designed library class. >> >> We need more discussion to make it be able to be accommodated by other a= rchs in future, at least by figuring out the path of X86, ARM. > Yes, the APIs looks like so fragmented and we should improve them. So=20 > we should talk more about this API, thanks. >> Thanks, >> Ray >>> -----Original Message----- >>> From: Chao Li >>> Sent: Friday, November 17, 2023 6:00 PM >>> To:devel@edk2.groups.io >>> Cc: Dong, Eric; Ni, Ray; Kumar, >>> Rahul R; Gerd Hoffmann; >>> Leif Lindholm; Ard Biesheuvel >>> ; Sami Mujawar; >>> Sunil V L; Warkentin, Andrei >>> >>> Subject: [PATCH v3 13/39] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg >>> >>> Add a new header file CpuMmuLib.h, whitch is referenced from >>> ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for >>> LoongArch64 is added, and more architectures can be accommodated in the >>> future. >>> >>> BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584 >>> >>> Cc: Eric Dong >>> Cc: Ray Ni >>> Cc: Rahul Kumar >>> Cc: Gerd Hoffmann >>> Cc: Leif Lindholm >>> Cc: Ard Biesheuvel >>> Cc: Sami Mujawar >>> Cc: Sunil V L >>> Cc: Andrei Warkentin >>> Signed-off-by: Chao Li >>> --- >>> UefiCpuPkg/Include/Library/CpuMmuLib.h | 155 >>> +++++++++++++++++++++++++ >>> UefiCpuPkg/UefiCpuPkg.dec | 4 + >>> 2 files changed, 159 insertions(+) >>> create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h >>> >>> diff --git a/UefiCpuPkg/Include/Library/CpuMmuLib.h >>> b/UefiCpuPkg/Include/Library/CpuMmuLib.h >>> new file mode 100644 >>> index 0000000000..23b2fe34ac >>> --- /dev/null >>> +++ b/UefiCpuPkg/Include/Library/CpuMmuLib.h >>> @@ -0,0 +1,155 @@ >>> +/** @file >>> + >>> + Copyright (c) 2023 Loongson Technology Corporation Limited. All righ= ts >>> reserved.
>>> + >>> + SPDX-License-Identifier: BSD-2-Clause-Patent >>> + >>> +**/ >>> + >>> +#ifndef CPU_MMU_LIB_H_ >>> +#define CPU_MMU_LIB_H_ >>> + >>> +#include >>> + >>> +#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \ >>> + EFI_MEMORY_WC | \ >>> + EFI_MEMORY_WT | \ >>> + EFI_MEMORY_WB | \ >>> + EFI_MEMORY_UCE \ >>> + ) >>> + >>> +typedef struct { >>> + EFI_PHYSICAL_ADDRESS PhysicalBase; >>> + EFI_VIRTUAL_ADDRESS VirtualBase; >>> + UINTN Length; >>> + UINTN Attributes; >>> +} MEMORY_REGION_DESCRIPTOR; >>> + >>> +/** >>> + Converts EFI Attributes to corresponding architecture Attributes. >>> + >>> + @param[in] EfiAttributes Efi Attributes. >>> + >>> + @retval Corresponding architecture attributes. >>> +**/ >>> +UINTN >>> +EfiAttributeConverse ( >>> + IN UINTN EfiAttributes >>> + ); >>> + >>> +/** >>> + Finds the length and memory properties of the memory region >>> corresponding to the specified base address. >>> + >>> + @param[in] BaseAddress To find the base address of the memory >>> region. >>> + @param[in] EndAddress To find the end address of the memory >>> region. >>> + @param[out] RegionLength The length of the memory region >>> found. >>> + @param[out] RegionAttributes Properties of the memory region >>> found. >>> + >>> + @retval EFI_SUCCESS The corresponding memory area was >>> successfully found >>> + EFI_NOT_FOUND No memory area found >>> +**/ >>> +EFI_STATUS >>> +GetMemoryRegionAttribute ( >>> + IN UINTN BaseAddress, >>> + IN UINTN EndAddress, >>> + OUT UINTN *RegionLength, >>> + OUT UINTN *RegionAttributes >>> + ); >>> + >>> +/** >>> + Sets the Attributes of the specified memory region >>> + >>> + @param[in] BaseAddress The base address of the memory region >>> to set the Attributes. >>> + @param[in] Length The length of the memory region to set >>> the Attributes. >>> + @param[in] Attributes The Attributes to be set. >>> + @param[in] AttributeMask Mask of memory attributes to take into >>> account. >>> + >>> + @retval EFI_SUCCESS The Attributes was set successfully >>> +**/ >>> +EFI_STATUS >>> +SetMemoryRegionAttributes ( >>> + IN EFI_PHYSICAL_ADDRESS BaseAddress, >>> + IN UINTN Length, >>> + IN UINTN Attributes, >>> + IN UINT64 AttributeMask >>> + ); >>> + >>> +/** >>> + Sets the non-executable Attributes for the specified memory region >>> + >>> + @param[in] BaseAddress The base address of the memory region to >>> set the Attributes. >>> + @param[in] Length The length of the memory region to set the >>> Attributes. >>> + >>> + @retval EFI_SUCCESS The Attributes was set successfully >>> +**/ >>> +EFI_STATUS >>> +SetMemoryRegionNoExec ( >>> + IN EFI_PHYSICAL_ADDRESS BaseAddress, >>> + IN UINTN Length >>> + ); >>> + >>> +/** >>> + Clears the non-executable Attributes for the specified memory region >>> + >>> + @param[in] BaseAddress The base address of the memory region to >>> clear the Attributes. >>> + @param[in] Length The length of the memory region to clear >>> the Attributes. >>> + >>> + @retval EFI_SUCCESS The Attributes was clear successfully >>> +**/ >>> +EFI_STATUS >>> +EFIAPI >>> +ClearMemoryRegionNoExec ( >>> + IN EFI_PHYSICAL_ADDRESS BaseAddress, >>> + IN UINT64 Length >>> + ); >>> + >>> +/** >>> + Sets the read-only Attributes for the specified memory region >>> + >>> + @param[in] BaseAddress The base address of the memory region to >>> set the Attributes. >>> + @param[in] Length The length of the memory region to set the >>> Attributes. >>> + >>> + @retval EFI_SUCCESS The Attributes was set successfully >>> +**/ >>> +EFI_STATUS >>> +EFIAPI >>> +SetMemoryRegionReadOnly ( >>> + IN EFI_PHYSICAL_ADDRESS BaseAddress, >>> + IN UINT64 Length >>> + ); >>> + >>> +/** >>> + Clears the read-only Attributes for the specified memory region >>> + >>> + @param[in] BaseAddress The base address of the memory region to >>> clear the Attributes. >>> + @param[in] Length The length of the memory region to clear >>> the Attributes. >>> + >>> + @retval EFI_SUCCESS The Attributes was clear successfully >>> +**/ >>> +EFI_STATUS >>> +EFIAPI >>> +ClearMemoryRegionReadOnly ( >>> + IN EFI_PHYSICAL_ADDRESS BaseAddress, >>> + IN UINT64 Length >>> + ); >>> + >>> +/** >>> + Create a page table and initialize the memory management unit(MMU). >>> + >>> + @param[in] MemoryTable A pointer to a memory ragion >>> table. >>> + @param[out] TranslationTableBase A pointer to a translation table b= ase >>> address. >>> + @param[out] TranslationTableSize A pointer to a translation table b= ase >>> size. >>> + >>> + @retval EFI_SUCCESS Configure MMU successfully. >>> + EFI_INVALID_PARAMETER MemoryTable is NULL. >>> + EFI_UNSUPPORTED Out of memory space or >>> size not aligned. >>> +**/ >>> +EFI_STATUS >>> +EFIAPI >>> +ConfigureMemoryManagementUint ( >>> + IN MEMORY_REGION_DESCRIPTOR *MemoryTable, >>> + OUT VOID **TranslationTableBase OPTIONAL, >>> + OUT UINTN *TranslationTableSize OPTIONAL >>> + ); >>> + >>> +#endif // CPU_MMU_LIB_H_ >>> diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec >>> index 154b1d06fe..150beae981 100644 >>> --- a/UefiCpuPkg/UefiCpuPkg.dec >>> +++ b/UefiCpuPkg/UefiCpuPkg.dec >>> @@ -62,6 +62,10 @@ >>> ## @libraryclass Provides function for manipulating x86 paging >>> structures. >>> CpuPageTableLib|Include/Library/CpuPageTableLib.h >>> >>> +[LibraryClasses.LoongArch64] >>> + ## @libraryclass Provides macros and functions for the memory >>> management unit. >>> + CpuMmuLib|Include/Library/CpuMmuLib.h >>> + >>> ## @libraryclass Provides functions for manipulating smram savest= ate >>> registers. >>> MmSaveStateLib|Include/Library/MmSaveStateLib.h >>> >>> -- >>> 2.27.0 >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112017): https://edk2.groups.io/g/devel/message/112017 Mute This Topic: https://groups.io/mt/102644768/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --------------6LxqWXicrVXOvBUs2NVb3HP7 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Hi Ray,

For this patch, I checked again and here are my opinions:

1. (Set|Get)MemoryRegionAttribute is difficult to merge together, because the parameters between the tow APIs are not similar. So I suggest they be independent.

2. The EfiAttributeConverse, GetMemoryRegionAttribute, SetMemoryRegionAttributes and ConfigureMemoryManagementUnit will be retained and other APIs will be removed. Because the functions expressed by other APIs can be completed though the retained API.

3. You pointed out MEMORY_REGION_DESCRIPTOR have no one to construct it, do I need add a new API to construct it? Could it be named GetMemoryMapPolicy and accept a parameter with MEMORY_REGION_DESCRIPTOR** ?

Hope to hear from you! :)


=
Thanks,
Chao
On 2023/11/30 10:25, Chao Li wrote:

Hi Ray,

Thanks for review, here are some of my thoughts:<= br>

On 2023/11/30 08:59, Ni, Ray wrote: 
Chao,
Since the lib class is so general, I'd like to understand more details to m=
ake sure it can properly fit into any CPU arch.

In X86, cache setting is through MSRs and Page tables, and memory access co=
ntrol (read-only, not-present, non-executable) is through page tables.
Let me understand, 'cache setting' means does it access a certain address(probably a memory address) via cache? If so, I'd say the 'cache setting' should be a part of attributes.
This CpuMmuLib is to provide=
 both services. How does LoongArch64 manage the cache settings and memory a=
ccess control?
Is it proper to combine both services into one lib?
In LoongArch64, cache settings and memory access control are performed via page tables. Please check the patch 14 of this series.
If the backend silicon IP is=
 the same one that supports the "one" lib design, can we refine the lib API=
 a bit?
Yes, I think Attribute's instance family can be bear the memory access and cache setting. So what are you suggestions if we improve the lib API?
We have (Set|Get)MemoryRegio=
nAttribute() and (Set|Clear)MemoryRegion(NoExec|ReadOnly). Can we merge the=
m together?
Do you means the (Set|Get) merge together(differentiate Get or Set operations by parameters)? If so, I think it's OK, but maybe some existing instances will be modified together.
And the API ConfigureMemoryM=
anagementUint() accepts MEMORY_REGION_DESCRIPTOR but none of other APIs hel=
ps to construct the descriptor.
Yes, currently, no one helps construct MEMORY_REGION_DESCRIPTOR. I think the construction of descriptors is not part of the API, it should be the localized or private when I design them. Do I need to add an API to construct descripters?
It seems to me the MmuLib is=
 simply a combination of different random APIs.
It's not a well-designed library class.

We need more discussion to make it be able to be accommodated by other arch=
s in future, at least by figuring out the path of X86, ARM.
Yes, the APIs looks like so fragmented and we should improve them. So we should talk more about this API, thanks.
Thanks,
Ray

-----Original Message-----
From: Chao Li <l=
ichao@loongson.cn>
Sent: Friday, November 17, 2023 6:00 PM
To: dev=
el@edk2.groups.io
Cc: Dong, Eric <=
eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar,
Rahul R =
<rahul.r.kumar@intel.com>; Gerd Hoffmann <kraxel@redhat.com>;
Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
<ardb+tianocore@kernel.org>; S=
ami Mujawar <=
;sami.mujawar@arm.com>;
Sunil V L <sunilvl@ventanamicro.com>; Warkentin, Andrei
<andrei.warkentin@intel.com>
Subject: [PATCH v3 13/39] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg

Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can be accommodated in the
future.

BZ: https://bugzilla.tianocore.org/show_bug.=
cgi?id=3D4584

Cc: Eric Dong <=
eric.dong@intel.com>
Cc: Ray Ni <ray=
.ni@intel.com>
Cc: Rahul Kumar &=
lt;rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kr=
axel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <=
;sami.mujawar@arm.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <l=
ichao@loongson.cn>
---
 UefiCpuPkg/Include/Library/CpuMmuLib.h | 155
+++++++++++++++++++++++++
 UefiCpuPkg/UefiCpuPkg.dec              |   4 +
 2 files changed, 159 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h

diff --git a/UefiCpuPkg/Include/Library/CpuMmuLib.h
b/UefiCpuPkg/Include/Library/CpuMmuLib.h
new file mode 100644
index 0000000000..23b2fe34ac
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuMmuLib.h
@@ -0,0 +1,155 @@
+/** @file
+
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights
reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CPU_MMU_LIB_H_
+#define CPU_MMU_LIB_H_
+
+#include <Uefi/UefiBaseType.h>
+
+#define EFI_MEMORY_CACHETYPE_MASK  (EFI_MEMORY_UC  | \
+                                    EFI_MEMORY_WC  | \
+                                    EFI_MEMORY_WT  | \
+                                    EFI_MEMORY_WB  | \
+                                    EFI_MEMORY_UCE   \
+                                    )
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESS    PhysicalBase;
+  EFI_VIRTUAL_ADDRESS     VirtualBase;
+  UINTN                   Length;
+  UINTN                   Attributes;
+} MEMORY_REGION_DESCRIPTOR;
+
+/**
+  Converts EFI Attributes to corresponding architecture Attributes.
+
+  @param[in]  EfiAttributes     Efi Attributes.
+
+  @retval  Corresponding architecture attributes.
+**/
+UINTN
+EfiAttributeConverse (
+  IN UINTN  EfiAttributes
+  );
+
+/**
+  Finds the length and memory properties of the memory region
corresponding to the specified base address.
+
+  @param[in]  BaseAddress    To find the base address of the memory
region.
+  @param[in]  EndAddress     To find the end address of the memory
region.
+  @param[out]  RegionLength    The length of the memory region
found.
+  @param[out]  RegionAttributes    Properties of the memory region
found.
+
+  @retval  EFI_SUCCESS    The corresponding memory area was
successfully found
+           EFI_NOT_FOUND    No memory area found
+**/
+EFI_STATUS
+GetMemoryRegionAttribute (
+  IN     UINTN  BaseAddress,
+  IN     UINTN  EndAddress,
+  OUT    UINTN  *RegionLength,
+  OUT    UINTN  *RegionAttributes
+  );
+
+/**
+  Sets the Attributes  of the specified memory region
+
+  @param[in]  BaseAddress    The base address of the memory region
to set the Attributes.
+  @param[in]  Length         The length of the memory region to set
the Attributes.
+  @param[in]  Attributes     The Attributes to be set.
+  @param[in]  AttributeMask  Mask of memory attributes to take into
account.
+
+  @retval  EFI_SUCCESS    The Attributes was set successfully
+**/
+EFI_STATUS
+SetMemoryRegionAttributes (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINTN                 Length,
+  IN UINTN                 Attributes,
+  IN UINT64                AttributeMask
+  );
+
+/**
+  Sets the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to
set the Attributes.
+  @param[in]  Length       The length of the memory region to set the
Attributes.
+
+  @retval  EFI_SUCCESS    The Attributes was set successfully
+**/
+EFI_STATUS
+SetMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINTN                 Length
+  );
+
+/**
+  Clears the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to
clear the Attributes.
+  @param[in]  Length       The length of the memory region to clear
the Attributes.
+
+  @retval  EFI_SUCCESS    The Attributes was clear successfully
+**/
+EFI_STATUS
+EFIAPI
+ClearMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINT64                Length
+  );
+
+/**
+  Sets the read-only Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to
set the Attributes.
+  @param[in]  Length       The length of the memory region to set the
Attributes.
+
+  @retval  EFI_SUCCESS    The Attributes was set successfully
+**/
+EFI_STATUS
+EFIAPI
+SetMemoryRegionReadOnly (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINT64                Length
+  );
+
+/**
+  Clears the read-only Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to
clear the Attributes.
+  @param[in]  Length       The length of the memory region to clear
the Attributes.
+
+  @retval  EFI_SUCCESS    The Attributes was clear successfully
+**/
+EFI_STATUS
+EFIAPI
+ClearMemoryRegionReadOnly (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINT64                Length
+  );
+
+/**
+  Create a page table and initialize the memory management unit(MMU).
+
+  @param[in]  MemoryTable           A pointer to a memory ragion
table.
+  @param[out] TranslationTableBase  A pointer to a translation table base
address.
+  @param[out] TranslationTableSize  A pointer to a translation table base
size.
+
+  @retval  EFI_SUCCESS                Configure MMU successfully.
+           EFI_INVALID_PARAMETER      MemoryTable is NULL.
+           EFI_UNSUPPORTED            Out of memory space or
size not aligned.
+**/
+EFI_STATUS
+EFIAPI
+ConfigureMemoryManagementUint (
+  IN  MEMORY_REGION_DESCRIPTOR  *MemoryTable,
+  OUT VOID                      **TranslationTableBase OPTIONAL,
+  OUT UINTN                     *TranslationTableSize  OPTIONAL
+  );
+
+#endif // CPU_MMU_LIB_H_
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 154b1d06fe..150beae981 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -62,6 +62,10 @@
   ##  @libraryclass  Provides function for manipulating x86 paging
structures.
   CpuPageTableLib|Include/Library/CpuPageTableLib.h

+[LibraryClasses.LoongArch64]
+  ##  @libraryclass  Provides macros and functions for the memory
management unit.
+  CpuMmuLib|Include/Library/CpuMmuLib.h
+
   ## @libraryclass   Provides functions for manipulating smram savestate
registers.
   MmSaveStateLib|Include/Library/MmSaveStateLib.h

--
2.27.0


      

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