From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smarthost01b.sbp.mail.zen.net.uk (smarthost01b.sbp.mail.zen.net.uk [212.23.1.3]) by mx.groups.io with SMTP id smtpd.web11.11177.1670231914531792553 for ; Mon, 05 Dec 2022 01:18:35 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=permerror, err=parse error for token &{10 18 sdn.klaviyomail.com}: permanent DNS error (domain: starlabs.systems, ip: 212.23.1.3, mailfrom: sean@starlabs.systems) Received: from [51.148.147.4] (helo=starbook..) by smarthost01b.sbp.mail.zen.net.uk with esmtp (Exim 4.90_1) (envelope-from ) id 1p27cN-0004m4-O0; Mon, 05 Dec 2022 09:18:31 +0000 From: "Sean Rhodes" To: devel@edk2.groups.io Cc: Matt DeVillier , Hao A Wu , Ray Ni , Sean Rhodes Subject: [PATCH 2/4] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV Date: Mon, 5 Dec 2022 09:18:25 +0000 Message-Id: X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 X-Originating-smarthost01b-IP: [51.148.147.4] Feedback-ID: 51.148.147.4 Content-Transfer-Encoding: quoted-printable From: Matt DeVillier PSID matching relies on comparing the PSIV against the PortSpeed value. This patch stops edk2 from checking for a PSIV of 0, as it is not valid; this reduces the number of register access by approximately 6 per second. Cc: Hao A Wu Cc: Ray Ni Reviewed-by: Sean Rhodes Signed-off-by: Matt DeVillier Change-Id: If15c55ab66d2e7faa832ce8576d2e5b47157cc9a --- MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 44 ++++++++++++++++------------- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/Xhc= iDxe/Xhci.c index c05431ff30..62535cad54 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c @@ -371,6 +371,7 @@ XhcGetRootHubPortStatus ( UINT32 TotalPort;=0D UINTN Index;=0D UINTN MapSize;=0D + UINT8 PortSpeed;=0D EFI_STATUS Status;=0D USB_DEV_ROUTE ParentRouteChart;=0D EFI_TPL OldTpl;=0D @@ -397,32 +398,37 @@ XhcGetRootHubPortStatus ( =0D State =3D XhcReadOpReg (Xhc, Offset);=0D =0D + PortSpeed =3D (State & XHC_PORTSC_PS) >> 10;=0D +=0D //=0D // According to XHCI 1.1 spec November 2017,=0D // Section 7.2 xHCI Support Protocol Capability=0D //=0D - PortStatus->PortStatus =3D XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & = XHC_PORTSC_PS) >> 10));=0D - if (PortStatus->PortStatus =3D=3D 0) {=0D - //=0D - // According to XHCI 1.1 spec November 2017,=0D - // bit 10~13 of the root port status register identifies the speed of = the attached device.=0D - //=0D - switch ((State & XHC_PORTSC_PS) >> 10) {=0D - case 2:=0D - PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED;=0D - break;=0D + if (PortSpeed > 0) {=0D + PortStatus->PortStatus =3D XhcCheckUsbPortSpeedUsedPsic (Xhc, PortSpee= d);=0D + // If no match found in ext cap reg, fall back to PORTSC=0D + if (PortStatus->PortStatus =3D=3D 0) {=0D + //=0D + // According to XHCI 1.1 spec November 2017,=0D + // bit 10~13 of the root port status register identifies the speed o= f the attached device.=0D + //=0D + switch (PortSpeed) {=0D + case 2:=0D + PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED;=0D + break;=0D =0D - case 3:=0D - PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED;=0D - break;=0D + case 3:=0D + PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED;=0D + break;=0D =0D - case 4:=0D - case 5:=0D - PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED;=0D - break;=0D + case 4:=0D + case 5:=0D + PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED;=0D + break;=0D =0D - default:=0D - break;=0D + default:=0D + break;=0D + }=0D }=0D }=0D =0D --=20 2.37.2