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Mon, 5 Jun 2023 07:45:03 +0000 Received: from BY5PR11MB3861.namprd11.prod.outlook.com ([fe80::74e4:2d5c:be5d:14b2]) by BY5PR11MB3861.namprd11.prod.outlook.com ([fe80::74e4:2d5c:be5d:14b2%4]) with mapi id 15.20.6455.030; Mon, 5 Jun 2023 07:45:03 +0000 Message-ID: <f48f9819-ff0c-e580-026c-4361d4c9fd05@intel.com> Date: Mon, 5 Jun 2023 15:44:54 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 Subject: Re: [edk2-devel] [PATCH v2 1/1] MdePkg/BaseLib: Add SpeculationBarrier implementation for RiscV64 From: "Li, Yong" <yong.li@intel.com> To: <devel@edk2.groups.io>, <sunilvl@ventanamicro.com>, <michael.d.kinney@intel.com>, <gaoliming@byosoft.com.cn> CC: Andrei Warkentin <andrei.warkentin@intel.com>, Evan Chai <evan.chai@intel.com>, Tuan Phan <tphan@ventanamicro.com> References: <cover.1685616822.git.yong.li@intel.com> <5105ea68520e82932c4253e087438db53546ea6d.1685616822.git.yong.li@intel.com> <ZHoiUL+50hNqg+a9@sunil-laptop> <efce7c47-a3c1-ebef-0b2c-dca311c64ed4@intel.com> In-Reply-To: <efce7c47-a3c1-ebef-0b2c-dca311c64ed4@intel.com> X-ClientProxiedBy: SGAP274CA0015.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::27) To BY5PR11MB3861.namprd11.prod.outlook.com (2603:10b6:a03:18d::13) Return-Path: yong.li@intel.com MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY5PR11MB3861:EE_|PH0PR11MB4901:EE_ X-MS-Office365-Filtering-Correlation-Id: e73aa5d7-2c77-4d63-9748-08db6598c5e0 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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charset="UTF-8" Content-Transfer-Encoding: 7bit Hi Michael, I updated the commit messages and the EDK II CI passes, The PR link is as below. https://github.com/tianocore/edk2/pull/4480 Please help merge, thanks for the helping On 2023/6/3 14:13, Li, Yong wrote: > Hi Michael > > This is the change to MdePkg/Library/BaseLib/RiscV64. > Since it is for RiscV specific, I somehow got the review from Sunil. > Not sure need additional reviewer and or anything else from my side ? > It is my first patch to edk2, please help proceed and look for the feedback. Thanks > > > On 2023/6/3 1:09, Sunil V L wrote: >> On Thu, Jun 01, 2023 at 06:56:05PM +0800, Yong Li wrote: >>> Implement the SpeculationBarrier with implementations consisting of >>> fence instruction which provides finer-grain memory orderings. >>> Perform Data Barrier in RiscV: fence rw,rw >>> Perform Instruction Barrier in RiscV: fence.i; fence r,r >>> More detail is in Appendix A: RVWMO Explanatory Material in >>> https://github.com/riscv/riscv-isa-manual >>> >>> This API is first introduced in the below commits for IA32 and x64 >>> https://github.com/tianocore/edk2/commit/d9f1cac51bd354507e880e614d11a1dc160d38a3 >>> https://github.com/tianocore/edk2/commit/e83d841fdc2878959185c4c6cc38a7a1e88377a4 >>> and below the commit for ARM and AArch64 implementation >>> https://github.com/tianocore/edk2/commit/c0959b4426b2da45cdb8146a5116bb4fd9b86534 >>> >>> This commit is to add the RiscV64 implementation which will be used by >>> variable service under Variable/RuntimeDxe >>> >>> Cc: Andrei Warkentin <andrei.warkentin@intel.com> >>> Cc: Evan Chai <evan.chai@intel.com> >>> Cc: Sunil V L <sunilvl@ventanamicro.com> >>> Cc: Tuan Phan <tphan@ventanamicro.com> >>> Signed-off-by: Yong Li <yong.li@intel.com> >>> --- >> >> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> >> >> Thanks, >> Sunil >> >> >> >> >>