From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.14361.1675439753685754347 for ; Fri, 03 Feb 2023 07:55:54 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: pierre.gondois@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5F8E9C14; Fri, 3 Feb 2023 07:56:35 -0800 (PST) Received: from [10.34.100.128] (pierre123.nice.arm.com [10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5A35C3F71E; Fri, 3 Feb 2023 07:55:52 -0800 (PST) Message-ID: Date: Fri, 3 Feb 2023 16:55:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [edk2-platforms][PATCH V2 4/5] Platform/Sgi: Initialize additional UART controllers To: Vivek Gautam , devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com References: <20230127092338.72056-1-vivek.gautam@arm.com> <20230127092338.72056-5-vivek.gautam@arm.com> From: "PierreGondois" In-Reply-To: <20230127092338.72056-5-vivek.gautam@arm.com> Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hello Vivek, On 1/27/23 10:23, Vivek Gautam wrote: > From: Shriram K > > The IO virtualization block on reference design platforms allow > connecting SoC expansion devices such as PL011 UART. On platforms > that support this, initialize the UART controller connected to the > IO virtualization block. > > Signed-off-by: Shriram K > Signed-off-by: Vivek Gautam > --- > Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 10 ++- > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 7 ++- > Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 64 +++++++++++++++++++- > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 43 ++++++++++++- > Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + > 5 files changed, 118 insertions(+), 7 deletions(-) > > diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf > index 9d89314a594e..42feadaf5f6f 100644 > --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf > +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf > @@ -1,5 +1,5 @@ > # > -# Copyright (c) 2018, ARM Limited. All rights reserved. > +# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -17,6 +17,7 @@ > VirtioDevices.c > > [Packages] > + ArmPlatformPkg/ArmPlatformPkg.dec > EmbeddedPkg/EmbeddedPkg.dec > MdePkg/MdePkg.dec > OvmfPkg/OvmfPkg.dec > @@ -37,10 +38,17 @@ > gArmSgiTokenSpaceGuid.PcdVirtioNetSupported > > [FixedPcd] > + gArmSgiTokenSpaceGuid.PcdChipCount > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable > + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip > gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress > gArmSgiTokenSpaceGuid.PcdVirtioBlkSize > gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress > gArmSgiTokenSpaceGuid.PcdVirtioNetSize > > + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz > + > [Depex] > TRUE > diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf > index 1ca7679b4191..4459b20ecb06 100644 > --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf > +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf > @@ -1,5 +1,5 @@ > # > -# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. > +# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -41,10 +41,13 @@ > gArmPlatformTokenSpaceGuid.PcdCoreCount > gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase > > - gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip > gArmSgiTokenSpaceGuid.PcdDramBlock2Base > gArmSgiTokenSpaceGuid.PcdDramBlock2Size > gArmSgiTokenSpaceGuid.PcdGicSize > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable > + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip > > gArmTokenSpaceGuid.PcdSystemMemoryBase > gArmTokenSpaceGuid.PcdSystemMemorySize > diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c > index 2f72e7152ff3..b3a998bc1585 100644 > --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c > +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2018, ARM Limited. All rights reserved. > +* Copyright (c) 2018 - 2023, ARM Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -9,6 +9,9 @@ > #include > #include > #include > +#include > + > +#include > #include > > VOID > @@ -16,6 +19,64 @@ InitVirtioDevices ( > VOID > ); > > +/** > + Initialize UART controllers connected to IO Virtualization block. > + > + Use PL011UartLib Library to initialize UART controllers that are present in > + the SoC expansion block. This SoC expansion block is connected to the IO > + virtualization block on Arm infrastructure reference design (RD) platforms. > + > + @retval None > +**/ > +STATIC > +VOID > +InitIoVirtSocExpBlkUartControllers (VOID) > +{ > + EFI_STATUS Status; > + EFI_PARITY_TYPE Parity; > + EFI_STOP_BITS_TYPE StopBits; > + UINT64 BaudRate; > + UINT32 ReceiveFifoDepth; > + UINT8 DataBits; > + UINT8 UartIdx; > + UINT32 ChipIdx; > + UINT64 UartAddr; > + > + if (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) == 0) > + return; > + > + ReceiveFifoDepth = 0; > + Parity = 1; > + DataBits = 8; > + StopBits = 1; > + BaudRate = 115200; > + > + for (ChipIdx = 0; ChipIdx < FixedPcdGet32 (PcdChipCount); ChipIdx++) { > + for (UartIdx = 0; UartIdx < 2; UartIdx++) { > + UartAddr = SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) + UART_START(UartIdx); > + > + Status = PL011UartInitializePort ( > + (UINTN)UartAddr, > + FixedPcdGet32 (PcdSerialDbgUartClkInHz), > + &BaudRate, > + &ReceiveFifoDepth, > + &Parity, > + &DataBits, > + &StopBits > + ); > + > + if (EFI_ERROR (Status)) { > + DEBUG (( > + DEBUG_ERROR, > + "Failed to init PL011_UART%u on IO Virt Block port, status: %r\n", > + UartIdx, > + Status > + )); > + } > + } > + } > +} > + > EFI_STATUS > EFIAPI > ArmSgiPkgEntryPoint ( > @@ -32,6 +93,7 @@ ArmSgiPkgEntryPoint ( > } > > InitVirtioDevices (); > + InitIoVirtSocExpBlkUartControllers (); > > return Status; > } > diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c > index 8139b75d8ee4..08aa9bf64940 100644 > --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c > +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. > +* Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -13,11 +13,23 @@ > #include > #include > > +#include > #include > > // Total number of descriptors, including the final "end-of-table" descriptor. > -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ > - (14 + (FixedPcdGet32 (PcdChipCount) * 2)) > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ > + ((14 + (FixedPcdGet32 (PcdChipCount) * 2)) + \ > + (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) * \ > + FixedPcdGet32 (PcdChipCount) * 2)) > + > +// Memory Map descriptor for IO Virtualization SoC Expansion Block UART > +#define IO_VIRT_SOC_EXP_BLK_UART_MMAP(UartIdx, ChipIdx) \ > + VirtualMemoryTable[++Index].PhysicalBase = \ > + SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) + UART_START(UartIdx); \ > + VirtualMemoryTable[Index].VirtualBase = \ > + SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) + UART_START(UartIdx); \ > + VirtualMemoryTable[Index].Length = SIZE_64KB; \ > + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > /** > Returns the Virtual Memory Map of the platform. > @@ -171,6 +183,31 @@ ArmPlatformGetVirtualMemoryMap ( > VirtualMemoryTable[Index].Length = SIZE_64KB; > VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > +#if (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) == 1) > + // Chip-0 IO Virtualization SoC Expansion Block - UART0 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 0) > + // Chip-0 IO Virtualization SoC Expansion Block - UART0 NIT: shouldn't it be UART1 ? > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 0) > +#if (FixedPcdGet32 (PcdChipCount) > 1) > + // Chip-1 IO Virtualization SoC Expansion Block - UART0 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 1) > + // Chip-1 IO Virtualization SoC Expansion Block - UART1 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 1) > +#if (FixedPcdGet32 (PcdChipCount) > 2) > + // Chip-2 IO Virtualization SoC Expansion Block - UART0 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 2) > + // Chip-2 IO Virtualization SoC Expansion Block - UART1 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 2) > +#if (FixedPcdGet32 (PcdChipCount) > 3) > + // Chip-3 IO Virtualization SoC Expansion Block - UART0 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 3) > + // Chip-3 IO Virtualization SoC Expansion Block - UART1 > + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 3) > +#endif > +#endif > +#endif > +#endif > + > // DDR - (2GB - 16MB) > VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdSystemMemoryBase); > VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdSystemMemoryBase); > diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec > index 407f03c1c3e8..43d350ec48bb 100644 > --- a/Platform/ARM/SgiPkg/SgiPlatform.dec > +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec > @@ -102,6 +102,7 @@ > gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base|0|UINT64|0x0000002B > gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset|0|UINT32|0x0000002C > gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize|0|UINT32|0x0000002D > + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable|0|UINT32|0x0000002E PcdIoVirtSocExpBlkUartEnable isn't set for any platform, is it normal ? > > [Ppis] > gNtFwConfigDtInfoPpiGuid = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }