From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CFB6821A16EDD for ; Tue, 30 May 2017 11:49:22 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D1301C04B923; Tue, 30 May 2017 18:50:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D1301C04B923 Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=lersek@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D1301C04B923 Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-87.phx2.redhat.com [10.3.116.87]) by smtp.corp.redhat.com (Postfix) with ESMTP id 008635C899; Tue, 30 May 2017 18:50:20 +0000 (UTC) From: Laszlo Ersek To: Vladimir Olovyannikov , edk2-devel@lists.01.org Cc: Ard Biesheuvel References: <4220315aed43c05b37b1b71a9eff432e@mail.gmail.com> <1dbbb04c-b725-d9bb-0300-283029538588@redhat.com> Message-ID: Date: Tue, 30 May 2017 20:50:19 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <1dbbb04c-b725-d9bb-0300-283029538588@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Tue, 30 May 2017 18:50:22 +0000 (UTC) Subject: Re: Using a generic PciHostBridgeDxe driver for a multi-PCIe-domain platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 May 2017 18:49:23 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 05/30/17 20:32, Laszlo Ersek wrote: > On 05/30/17 18:23, Vladimir Olovyannikov wrote: >> Hi, >> >> I've started PCIe stack implementation design for an armv8 aarch64 >> platform. >> The platform's PCIe represents several host bridges, and each hostbridge >> has one rootbridge. >> They do not share any resources between each other. >> Looking into the PciHostBridgeDxe implementation I can see that it >> supports only one hostbridge, and there is a comment: >> // Most systems in the world including complex servers have only one Host >> Bridge. >> >> So in my case should I create my own PciHostBridgeDxe driver supporting >> multiple hostbridges and do not use the Industry standard driver? >> I am very new to it, and will appreciate any help or idea. > > I think you can use PciHostBridgeDxe on this platform: > > - Implement a PciHostBridgeLib instance (see > ) that returns > PCI_ROOT_BRIDGE objects with different Segment fields, from > PciHostBridgeGetRootBridges(). > > - Implement a PciSegmentLib instance (see > ) that routes the config space > addresses, encoded by the PCI_SEGMENT_LIB_ADDRESS() macro, according to > your platform. > > PciHostBridgeDxe and PciBusDxe should "just work" atop. To my > understanding, PciBusDxe delegates all config space accesses to > PciHostBridgeDxe, via EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. And > PciHostBridgeDxe delegates all config space accesses to the platform's > PciSegmentLib. A small addition. Assuming the general case, i.e. when you have a different number of root bridges on each of several host bridges, you still have to number all those root bridges incrementally, in a curious, flat address space. And that address space is the PcieRoot(N) device path node that is supposed to start the "DevicePath" member of each PCI_ROOT_BRIDGE object that you return from PciHostBridgeGetRootBridges(). You can read about the PcieRoot() devpath node in the UEFI 2.6 spec. Basically, you have ACPI_HID_DEVICE_PATH.Header = ; ACPI_HID_DEVICE_PATH.HID = EFI_PNP_ID (0x0a08); ACPI_HID_DEVICE_PATH.UID = ; The UID values used in these devpath nodes should preferably match the UID values of the corresponding PCI Express Root Bridge objects (=PNP0A08) that you expose in your ACPI tables (DSDT and/or SSDT). Thanks Laszlo