From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DE70A211B1118 for ; Sun, 6 Jan 2019 23:51:53 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jan 2019 23:51:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,450,1539673200"; d="scan'208";a="264980195" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.15]) ([10.239.9.15]) by orsmga004.jf.intel.com with ESMTP; 06 Jan 2019 23:51:52 -0800 To: Eric Dong , edk2-devel@lists.01.org References: <20190107010555.23264-1-eric.dong@intel.com> <20190107010555.23264-2-eric.dong@intel.com> From: "Ni, Ruiyu" Message-ID: Date: Mon, 7 Jan 2019 15:53:54 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20190107010555.23264-2-eric.dong@intel.com> Subject: Re: [Patch v2 1/2] UefiCpuPkg/RegisterCpuFeaturesLib: Enhance debug message. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 07 Jan 2019 07:51:54 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 1/7/2019 9:05 AM, Eric Dong wrote: > Enhance debug message format to let them easy to read. > > Cc: Ruiyu Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Eric Dong > --- > .../RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > > diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > index 0a74d448c8..624ddee055 100644 > --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c > @@ -473,8 +473,9 @@ DumpRegisterTableOnProcessor ( > case Msr: > DEBUG (( > DebugPrintErrorLevel, > - "Processor: %d: MSR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", > + "Processor: %04d: Index %04d, MSR : %08x, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n", > ProcessorNumber, > + FeatureIndex, > RegisterTableEntry->Index, > RegisterTableEntry->ValidBitStart, > RegisterTableEntry->ValidBitLength, > @@ -484,8 +485,9 @@ DumpRegisterTableOnProcessor ( > case ControlRegister: > DEBUG (( > DebugPrintErrorLevel, > - "Processor: %d: CR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", > + "Processor: %04d: Index %04d, CR : %08x, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n", > ProcessorNumber, > + FeatureIndex, > RegisterTableEntry->Index, > RegisterTableEntry->ValidBitStart, > RegisterTableEntry->ValidBitLength, > @@ -495,8 +497,9 @@ DumpRegisterTableOnProcessor ( > case MemoryMapped: > DEBUG (( > DebugPrintErrorLevel, > - "Processor: %d: MMIO: %lx, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", > + "Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n", > ProcessorNumber, > + FeatureIndex, > RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32), > RegisterTableEntry->ValidBitStart, > RegisterTableEntry->ValidBitLength, > @@ -506,8 +509,9 @@ DumpRegisterTableOnProcessor ( > case CacheControl: > DEBUG (( > DebugPrintErrorLevel, > - "Processor: %d: CACHE: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", > + "Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit Length: %02d, Value: %016lx\r\n", > ProcessorNumber, > + FeatureIndex, > RegisterTableEntry->Index, > RegisterTableEntry->ValidBitStart, > RegisterTableEntry->ValidBitLength, > @@ -517,8 +521,9 @@ DumpRegisterTableOnProcessor ( > case Semaphore: > DEBUG (( > DebugPrintErrorLevel, > - "Processor: %d: Semaphore: Scope Value: %s\r\n", > + "Processor: %04d: Index %04d, SEMAP: %s\r\n", > ProcessorNumber, > + FeatureIndex, > mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value, InvalidDepType)] > )); > break; > @@ -833,7 +838,7 @@ ProgramProcessorRegister ( > ApLocation->Thread; > DEBUG (( > DEBUG_INFO, > - "Processor = %lu, Entry Index %lu, Type = %s!\n", > + "Processor = %08lu, Index %08lu, Type = %s!\n", > (UINT64)ThreadIndex, > (UINT64)Index, > mRegisterTypeStr[MIN ((REGISTER_TYPE)RegisterTableEntry->RegisterType, InvalidReg)] > Reviewed-by: Ray Ni -- Thanks, Ray