From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=ryszard.knop@linux.intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D5E06211C2808 for ; Wed, 30 Jan 2019 08:20:53 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jan 2019 08:20:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,541,1539673200"; d="scan'208";a="271183012" Received: from linux.intel.com ([10.54.29.200]) by orsmga004.jf.intel.com with ESMTP; 30 Jan 2019 08:20:53 -0800 Received: from torii (torii.igk.intel.com [10.102.24.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id C34A5580297; Wed, 30 Jan 2019 08:20:51 -0800 (PST) Message-ID: From: Ryszard Knop To: Ard Biesheuvel , edk2-devel@lists.01.org Cc: kamil.kacperski@intel.com, eric.jin@intel.com, pawel.orlowski@intel.com, michael.d.kinney@intel.com, harry.l.hsiung@intel.com Date: Wed, 30 Jan 2019 17:20:49 +0100 In-Reply-To: <20181115023353.20159-13-ard.biesheuvel@linaro.org> References: <20181115023353.20159-1-ard.biesheuvel@linaro.org> <20181115023353.20159-13-ard.biesheuvel@linaro.org> Organization: Intel Corporation User-Agent: Evolution 3.30.4 Mime-Version: 1.0 Subject: Re: [PATCH edk2-staging 12/20] IntelUndiPkg/XGigUndiDxe: don't take address of cast expression X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 X-List-Received-Date: Wed, 30 Jan 2019 16:20:54 -0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Reviewed-by: Ryszard Knop On Wed, 2018-11-14 at 18:33 -0800, ard.biesheuvela wrote: > Taking the address of a cast expression is not permitted in C. > Instead, > take the address of the variable, and cast the pointer to the desired > pointer type. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel > --- > IntelUndiPkg/XGigUndiDxe/Xgbe.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/IntelUndiPkg/XGigUndiDxe/Xgbe.c > b/IntelUndiPkg/XGigUndiDxe/Xgbe.c > index 0c823efe8963..003c3b9065ec 100644 > --- a/IntelUndiPkg/XGigUndiDxe/Xgbe.c > +++ b/IntelUndiPkg/XGigUndiDxe/Xgbe.c > @@ -1264,7 +1264,7 @@ XgbeTxRxConfigure ( > IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_RDBAL (0), (UINT32) > (UINTN) (XgbeAdapter->RxRing.PhysicalAddress)); > > MemAddr = (UINT64) (UINTN) XgbeAdapter->RxRing.PhysicalAddress; > - MemPtr = &((UINT32) MemAddr); > + MemPtr = (UINT32 *) &MemAddr; > MemPtr++; > IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_RDBAH (0), *MemPtr); > DEBUGPRINT (XGBE, ("Rdbal0 %X\n", (UINT32) IXGBE_READ_REG > (&XgbeAdapter->Hw, IXGBE_RDBAL (0)))); > @@ -1337,7 +1337,7 @@ XgbeTxRxConfigure ( > XgbeAdapter->XmitDoneHead = 0; // the last cleaned buffer > IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_TDBAL (0), (UINT32) > (XgbeAdapter->TxRing.PhysicalAddress)); > MemAddr = (UINT64) XgbeAdapter->TxRing.PhysicalAddress; > - MemPtr = &((UINT32) MemAddr); > + MemPtr = (UINT32 *) &MemAddr; > MemPtr++; > IXGBE_WRITE_REG (&XgbeAdapter->Hw, IXGBE_TDBAH (0), *MemPtr); > DEBUGPRINT (XGBE, ("TdBah0 %X\n", *MemPtr));