* [edk2-devel] i7 TGL-UP3 Slimboot MR8 EDK Code: Gen 4 NVMe Storage: Timeout for NvmExpressPassThru
@ 2025-01-10 13:15 Siddhartha via groups.io
0 siblings, 0 replies; only message in thread
From: Siddhartha via groups.io @ 2025-01-10 13:15 UTC (permalink / raw)
To: devel
[-- Attachment #1.1: Type: text/plain, Size: 1205 bytes --]
Hi.
We have made a custom circuit board based on Intel i7 and TGL-UP3 with the MR8 Slimboot code & its EDK code.
We have logged the responses (during boot) when we do not connect / do connect NVMe storage through PCIe:
1. When no NVMe storage was connected: Test_07Jan25_1_payloaddebug_withoutnvme.log
2. When Transcend's (Gen3) NVMe storage was connected: Test_08Jan25_2_payloaddebug_withtranscendnvme.log
3. When Advantech's (Gen3) NVMe storage was connected: Test_08Jan25_0_payloaddebug_withadvantechnvme.log
4. When Western Digital's (Gen4) NVMe storage was connected: Test_10Jan25_1_payloaddebug_withwdblacknvme.log
4.1. "NvmExpressPassThru: Timeout occurs for an NVMe command." message was seen.
A. Why does the timeout occur for Western Digital's Gen4 storage?
B. How can we correct this error?
Thanks, cheers!
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[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: Test_07Jan25_1_payloaddebug_withoutnvme.log --]
[-- Type: text/x-log; name="Test_07Jan25_1_payloaddebug_withoutnvme.log", Size: 1557081 bytes --]
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2025.01.07 15:57:34 =~=~=~=~=~=~=~=~=~=~=~=
\0
============= Intel Slim Bootloader STAGE1A =============
Serial Port Base: 00000000FE032000
PcdPciExpressBaseAddress: 00000000C0000000
mUartMmPciOffset[DebugPort]: 00000000000F0000
PciAddress: 00000000C00F0000
SBID: CTIPL_TGL
ISVN: 001
IVER: 001.000.001.008.00015
SVER: 0000000000000000
FDBG: BLD(D IA32) FSP(D)
FSPV: ID(TGLI-FSP) REV(0A007E70)
CPUV: ID(806C1) UCODE(AC)
Loader global data @ 0xFEF3FC10
Run STAGE1A @ 0xFFFEA000
Load STAGE1B @ 0xFFD80000
============= Intel Slim Bootloader STAGE1B =============
[Boot Guard] AcmStatus : 0x00000000
[Boot Guard] BootStatus: 0x00000000
[Boot Guard] Boot Guard Failed or is Disabled!
SpiInstance = FEF4C3D0
PchSpiBase at 0x00001F05
ScSpiBar0 at 0xF0000000
Loading Component KEYH:_HS_
Registering container KEYH
HASH verification for usage (0x00000100) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000100): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Append public key hash into store: Success
Load EXT CFG Data @ 0xFEF4CB54:0x1034 ... Success
HASH verification for usage (0x00000200) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000200): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Processor does not support Boot Guard.
Boot Guard Support status: 0
GetPlatformDataPtr is copied 0xFEF4CB34
BOOT: BP0
MODE: 0
PlatformName: INDi11
Memory Init
FSPM CfgData assignment
Load Memory Cfg Data
SkipMbpHob = 0x0
Load Graphics Cfg Data
Call FspMemoryInit ...
============= FSP Spec v2.2 Header Revision v5 (TGLI-FSP vA.0.7E.70) =============
Fsp BootFirmwareVolumeBase - 0xFFDEE000
Fsp BootFirmwareVolumeSize - 0x112000
Fsp TemporaryRamBase - 0xFEF4FF00
Fsp TemporaryRamSize - 0x50000
Fsp PeiTemporaryRamBase - 0xFEF4FF00
Fsp PeiTemporaryRamSize - 0x50000
Fsp StackBase - 0xFEF3EFD0
Fsp StackSize - 0x0
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x000FFDEE000, size is 0x00112000, handle is 0xFFDEE000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: A1EEAB87-C859-479D-89B5-1461F4061A3E
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x7 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x000FFE09C98 EntryPoint=0x000FFE09DCD PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM 6141E486-7543-4F1A-A579-FF532ED78E75
Loading PEIM at 0x000FFE0B59C EntryPoint=0x000FFE0B7DD ResetSystemPei.efi
Install PPI: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: 8C9F4DE3-7B90-47EF-9308-287CECD66DE8
Install PPI: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Install PPI: 75CF14AE-3441-49DC-AA10-BB35A7BA8BAB
Loading PEIM BAEB5BEE-5B33-480A-8AB7-B29C85E7CEAB
Loading PEIM at 0x000FFE0CBCC EntryPoint=0x000FFE0CE2D FspGlobalDataInitPei.efi
FspData: Signature - 0x44505346
FspData: Version - 0x0
FspData: PerfIdx - 0x3
FspData: PerfSig - 0x46524550
FspData: FspMode - API
FspData: FspInfoHeader - 0xFFDEE094
FspData: TempRamInitUpdPtr - 0x0
Loading PEIM 1B04374D-FA9C-420F-AC62-FEE6D45E8443
Loading PEIM at 0x000FFE15BDC EntryPoint=0x000FFE15E1D FspDebugServicePei.efi
=====================================
FSP Version : 0A.00.7E.70
RC Version : 0A.E0.7E.70
Build Date : 202403221131
=====================================
Install PPI: 835F3942-1545-414B-9459-BF072FA9A289
Loading PEIM 88C17E54-EBFE-4531-A992-581029F58126
Loading PEIM at 0x000FFE1F554 EntryPoint=0x000FFE1F70A FspPcdInit.efi
FspPcdInitEntryPoint() - Updating PcdPciExpressRegionLength to 0x10000000 & PcdPciExpressBaseAddress to 0xC0000000
Loading PEIM A8499E65-A6F6-48B0-96DB-45C266030D83
Loading PEIM at 0x000FFE20054 EntryPoint=0x000FFE20725 SiInitPreMemFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
SiInitPrePolicy() Start
PCH Series : TGL PCH-LP
PCH Stepping : B0
PCH SKU : LP IOT SKU
GBLRST_CAUSE0: 0x0
GBLRST_CAUSE1: 0x0
HPR_CAUSE0 : 0x0
FIA LOS0 = 0x00000011
FIA LOS1 = 0x00000200
POSTCODE=<00000B00>
PchInitPrePolicy() - Start
PCH PWRM Base needs to be programmed before here
(WDT) Readback = 0x00002000
Register PPI Notify: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Notify: PPI Guid: E09F355D-DAE8-4910-B14A-92780FDCF7CB, Peim notify entry point: FFE3F544
Install PPI: F38D1338-AF7A-4FB6-91DB-1A9C2183570D
SpiServiceInit() Start
Flash Region read Permission : FF
Flash Region write Permission : FF
Component 0 SFDP VSCC value : B1D82084
Component 1 SFDP VSCC value : 2000
Component Number : 1
Total Flash Size : 2000000
PchStrapBaseAddr : 100
PchStrapSize : 118
Mdtba : C00
CpuStrapBaseAddr : C68
CpuStrapSize : 44
SPI PPI Installed
Install PPI: DADE7CE3-6971-4B75-825E-0EE0EB17722D
SpiServiceInit() End
POSTCODE=<00000B02>
LpcOnEarlyPeiConfigure()
PchEarlyDisabledDeviceHandling() - Start
SPA Controller PCD Value = 3210
SPB Controller PCD Value = 7654
SPC Controller PCD Value = 3210
Multilane check for PCIE Controller 0: PCIe SPA is 4x1
No ports disabled
Multilane check for PCIE Controller 1: PCIe SPB is 1x4
Disabling RP 6/7/8
Multilane check for PCIE Controller 2: PCIe SPC is 4x1
No ports disabled
SCS UFS[0] Fuse disabled - performing PSF disable
SCS UFS[1] Fuse disabled - performing PSF disable
ISH Supported and Fuse disabled - performing PSF disable
GBE Supported and Fuse disabled - performing PSF disable
CNVi WiFi function Fuse disabled - performing PSF disable
PchEarlyDisabledDeviceHandling() - End
POSTCODE=<00000B7F>
PchInitPrePolicy() - End
Register PPI Notify: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Install PPI: BC1CFBDB-7E50-42BE-B487-22E0A90CB052
Install PPI: FEC36242-F8D8-4B43-8794-4F1F9F638DDC
SiInitPrePolicy() - End
Loading PEIM 9E1CC850-6731-4848-8752-6673C7005EEE
Loading PEIM at 0x000FFEE2268 EntryPoint=0x000FFEE2595 FspInitPreMem.efi
FspInitPreMemEntryPoint
POSTCODE=<0000D800>
Register PPI Notify: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: EF398D58-9DFD-4103-BF94-78C6F4FE712F
Installing StallPpi
Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56
Dumping FSPM_UPD - Size: 0x00000978
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x4D 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xF4 0xFE 0x00 0x00 0x05 0x00
0x00000030: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x00 0x60 0x97 0x05 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x01 0xB4 0xE5 0xF4 0xFE
0x00000050: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000060: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000070: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000080: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00
0x000000A0: 0x01 0x00 0x00 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x06 0x07 0x03 0x02 0x05 0x04
0x000000B0: 0x0F 0x08 0x09 0x0E 0x0C 0x0B 0x0A 0x0D 0x0B 0x0C 0x08 0x0F 0x09 0x0E 0x0A 0x0D
0x000000C0: 0x03 0x04 0x07 0x00 0x06 0x01 0x05 0x02 0x04 0x05 0x03 0x02 0x07 0x01 0x00 0x06
0x000000D0: 0x0B 0x0A 0x0C 0x0D 0x08 0x09 0x0E 0x0F 0x0C 0x0B 0x08 0x0D 0x0E 0x0F 0x09 0x0A
0x000000E0: 0x04 0x07 0x03 0x02 0x01 0x06 0x00 0x05 0x0B 0x0A 0x09 0x08 0x0C 0x0D 0x0F 0x0E
0x000000F0: 0x04 0x05 0x06 0x07 0x03 0x02 0x00 0x01 0x00 0x07 0x01 0x06 0x03 0x05 0x02 0x04
0x00000100: 0x09 0x08 0x0A 0x0B 0x0E 0x0F 0x0D 0x0C 0x04 0x05 0x06 0x01 0x03 0x02 0x07 0x00
0x00000110: 0x0A 0x0D 0x0C 0x0B 0x0E 0x09 0x0F 0x08 0x0A 0x0C 0x09 0x0F 0x08 0x0B 0x0D 0x0E
0x00000120: 0x03 0x04 0x01 0x02 0x06 0x00 0x05 0x07 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x00
0x00000150: 0x02 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000160: 0x00 0x00 0xD9 0xFE 0x00 0x20 0xD9 0xFE 0x00 0x10 0xD9 0xFE 0x00 0x40 0xD8 0xFE
0x00000170: 0x00 0x50 0xD8 0xFE 0x00 0x60 0xD8 0xFE 0x00 0x70 0xD8 0xFE 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0xFE 0x01 0x01 0x05 0x00 0x00 0x00
0x00000190: 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x20 0xDA 0xFE 0x00 0x30 0xDA 0xFE
0x000001D0: 0x00 0x40 0xDA 0xFE 0x2C 0x01 0x64 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0xAF 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01 0x01
0x00000260: 0x01 0x00 0x00 0x00 0xFF 0xFF 0xFF 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x02 0x02 0x04 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00
0x000002A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x02 0x00 0x01 0x01 0x08
0x00000300: 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02
0x00000310: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000320: 0x00 0x00 0x00 0x01 0x00 0x00 0x02 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000330: 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000360: 0x00 0x00 0x00 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x6C 0xFF 0x00 0x00 0x00 0x00
0x00000370: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000380: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000390: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000400: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000410: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000420: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000430: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000440: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000450: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000460: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000470: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000480: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000490: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000500: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000510: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000520: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000530: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000540: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000550: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000560: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000570: 0x00 0x00 0x04 0x00 0xA0 0xEF 0x00 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0xFF 0xFF
0x00000580: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08
0x00000590: 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 0xF0 0xD9 0xF4 0xFE 0xFF 0xFF 0xFF 0x00
0x000005A0: 0x10 0x00 0x00 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x08 0x00 0x00 0x60 0x03 0xFE
0x000005B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x07 0x00
0x000005C0: 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01
0x000005D0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01
0x000005E0: 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x3F 0xFF 0x3F
0x00000600: 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0x01 0x01 0x01 0x01
0x00000610: 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x01 0x00 0x01 0x01
0x00000620: 0x01 0x01 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0xCC 0x30
0x00000630: 0x00 0xE1 0xF5 0x05 0x1A 0x00 0x0B 0x00 0x0B 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A
0x00000640: 0x0A 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC
0x00000650: 0xAC 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD
0x00000660: 0xDD 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x03 0x00
0x00000670: 0x00 0x01 0x00 0x01 0x0F 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000680: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000690: 0x00 0x03 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006B0: 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006C0: 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000006D0: 0x00 0x00 0x40 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x000006E0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x01 0x01 0x01 0x01 0x01 0x01
0x000006F0: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x00000700: 0x01 0x01 0x01 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02 0x01 0x01 0x01 0x00
0x00000710: 0x02 0x00 0x00 0x00 0xE8 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000720: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000730: 0x00 0x00 0x00 0x00 0x00 0x28 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000740: 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000750: 0x06 0x0C 0x46 0x29 0x04 0x0E 0x46 0x29 0x02 0x14 0x46 0x29 0x03 0x16 0x46 0x29
0x00000760: 0x00 0x00 0x00 0x00 0x07 0x04 0x46 0x29 0x05 0x06 0x46 0x29 0x00 0x00 0x00 0x00
0x00000770: 0x00 0x00 0x01 0x01 0x00 0x00 0x04 0x03 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01
0x00000780: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000790: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000800: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000810: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000820: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000830: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000840: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000850: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000860: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000870: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000880: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000890: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008A0: 0x01 0x02 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x00 0x00
0x000008C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000900: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x07 0x00 0x00
0x00000910: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000920: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x64 0x00
0x00000930: 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000940: 0x07 0x07 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000950: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x00 0x00 0x00
0x00000960: 0x00 0x01 0x00 0x00 0x02 0x00 0x60 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000970: 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Install PPI: 824D5A3A-AF92-4C0C-9F19-19526DCA4ABB
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x40
TotalBlockSize after adding Block[0x2]= 0x11C
TotalBlockSize after adding Block[0x3]= 0x198
TotalBlockSize after adding Block[0x4]= 0x200
TotalBlockSize after adding Block[0x0]= 0x2C
TotalBlockSize after adding Block[0x0]= 0x68
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0x168
TotalBlockSize after adding Block[0x3]= 0x270
TotalBlockSize after adding Block[0x0]= 0x28
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xB4
TotalBlockSize = 0xB40
gSiPreMemConfigGuid = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemBlock->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCIe AddConfigBlocks
PciePreMemConfig->Header.GuidHob.Name = D0F9C2A9-7332-4733-8DB1-98792760DAE6
PciePreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCH AddPreMemConfigBlocks
PchGeneralPreMemConfig->Header.GuidHob.Name = C65F62FA-52B9-4837-86EB-1AFBD4ADBB3E
PchGeneralPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
LpcPreMemConfig->Header.GuidHob.Name = A6E6032F-1E58-407E-9AB8-C630C6C4118E
LpcPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HsioPciePreMemConfig->Header.GuidHob.Name = E8FB0C12-0DA1-4A20-B336-FB75938CE014
HsioPciePreMemConfig->Header.GuidHob.Header.HobLength = 0xDC
HsioSataPreMemConfig->Header.GuidHob.Name = 732260D0-A5C1-4119-AA0C-93DCAC670A31
HsioSataPreMemConfig->Header.GuidHob.Header.HobLength = 0x7C
PcieRpPreMemConfig->Header.GuidHob.Name = 8377AB38-F8B0-476A-9CA1-68EA7857D82A
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
GetClkReqForClkSrc 0->0, register 06543210
GetClkReqForClkSrc 1->1, register 06543210
GetClkReqForClkSrc 2->2, register 06543210
GetClkReqForClkSrc 3->3, register 06543210
GetClkReqForClkSrc 4->4, register 06543210
GetClkReqForClkSrc 5->5, register 06543210
GetClkReqForClkSrc 6->6, register 06543210
Me AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x4
MiscPeiPreMemConfig->Header.GuidHob.Name = 4A525577-3469-4F11-99CF-FBCD5EF184E4
MiscPeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
PramPreMemConfig->Header.GuidHob.Name = CF0B9B31-A1A6-46D9-8D14-E3AC690F523A
PramPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
MemConfig->Header.GuidHob.Name = 26CF084C-C9DB-41BB-92C6-D197B8A1E4BF
MemConfig->Header.GuidHob.Header.HobLength = 0xE0
MemConfigNoCrc->Header.GuidHob.Name = C56C73D0-1CDB-4C0C-A957-EA62A9E6F50C
MemConfigNoCrc->Header.GuidHob.Header.HobLength = 0x108
Applying Sample policy defaults for LPDDR4
CPU Pre-Mem Entry
POSTCODE=<0000DC00>
CpuSecurityPreMemConfig->Header.GuidHob.Name = 0FD5C346-8260-4067-9469-CF9168A34290
CpuSecurityPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTxtPreMemConfig->Header.GuidHob.Name = 20B4DB03-D160-4F83-A401-9A8AA8886814
CpuTxtPreMemConfig->Header.GuidHob.Header.HobLength = 0x60
CpuConfigLibPreMemConfig->Header.GuidHob.Name = FC1C0EC2-C6B4-4F05-BB85-C8008D5B4AB7
CpuConfigLibPreMemConfig->Header.GuidHob.Header.HobLength = 0x2C
CpuAddPreMemConfigBlocks Done
POSTCODE=<0000DC0F>
IpuPreMemPolicy->Header.GuidHob.Name = 830A222B-3FF5-432E-9DD5-4EE3FCA2AAA2
IpuPreMemPolicy->Header.GuidHob.Header.HobLength = 0x34
DciPreMemConfig->Header.GuidHob.Name = AB4AF366-2250-40C3-92DB-3661C6713C5A
DciPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
CpuTraceHubPreMemConfig->Header.GuidHob.Name = F2E17477-93F3-430D-9E08-3CCC6E2F6C4B
CpuTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
PchTraceHubPreMemConfig->Header.GuidHob.Name = 08456C11-DB85-4914-8D1A-E5AC6437E896
PchTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HdaPreMemConfig->Header.GuidHob.Name = D38F1E2B-21B3-43D1-9FA8-A5E178731E88
HdaPreMemConfig->Header.GuidHob.Header.HobLength = 0x74
PcieRpPreMemConfig->Header.GuidHob.Name = 7C24E649-C1F0-4CF9-8796-E7A0EE3443F8
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
SmbusPreMemConfig->Header.GuidHob.Name = 77A6E62C-716B-4386-9E9C-23A02E137B3A
SmbusPreMemConfig->Header.GuidHob.Header.HobLength = 0xA4
WdtPreMemConfig->Header.GuidHob.Name = FBCE08CC-60F2-4BDF-B788-09BB8165522B
WdtPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
OverClockingPreMemConfig->Header.GuidHob.Name = AD151BBC-D5A0-481E-9D19-F67B79E98F68
OverClockingPreMemConfig->Header.GuidHob.Header.HobLength = 0x94
GtPreMemConfig->Header.GuidHob.Name = 0319C56B-C43A-42F1-80BE-CA5BD1D5C928
GtPreMemConfig->Header.GuidHob.Header.HobLength = 0x50
TcssPreMemConfig->Header.GuidHob.Name = 514ED829-B2BB-46BE-A978-6D0C91C1EBE4
TcssPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
Vtd->Header.GuidHob.Name = 03E5CF63-BEBB-4041-B7E7-BF546120F1C5
Vtd->Header.GuidHob.Header.HobLength = 0x44
boot mode : 0x0
CpuPcieRpPreMemConfig->Header.GuidHob.Name = 41AEF892-C800-4AC0-A930-84AC47CACA7E
CpuPcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x38
PciePeiPreMemConfig->Header.GuidHob.Name = 81BAF3C9-F295-4572-8B21-793FA31BA5DB
PciePeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x44
CpuDmiPreMemConfig->Header.GuidHob.Name = 30D12AD5-A3C6-49C7-A2FD-355CCB61CBCF
CpuDmiPreMemConfig->Header.GuidHob.Header.HobLength = 0xA8
HostBridgePreMemConfig->Header.GuidHob.Name = BDEF6805-2080-44AD-932E-0004F52CB7A1
HostBridgePreMemConfig->Header.GuidHob.Header.HobLength = 0x40
TelemetryConfig->Header.GuidHob.Name = 422DE269-B2EF-4829-9336-0BE498B553B2
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
HgConfig->Header.GuidHob.Name = C7956998-C065-46C4-8E2F-582B67EBBE2F
HgConfig->Header.GuidHob.Header.HobLength = 0x88
DpInPreMemConfig->Header.GuidHob.Name = 080C14BA-CC84-4746-BF6B-D1F18EAAE835
DpInPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
TccConfig->Header.GuidHob.Name = AFFE7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x38
Install PPI: C133FE57-17C7-4B09-8B3C-97C189D0AB8D
FspUpdatePeiMePolicyPreMem
FSP UpdatePeiSaPolicyPreMem
MemConfig->SaGv = 0
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
---------------------- Si Pre-Mem Config Block Print Begin -----------------
PlatformDebugConsent = 0
SkipOverrideBootModeWhenFwUpdate = 0
---------------------- Si Pre-Mem Config Block Print End -------------------
---------------------- PCIe Pre-Mem Config Block Print Begin -----------------
PcieImrEnabled = 0
PcieImrRpLocation = 0
PcieImrSize = 0
PcieImrRpSelection = 0
---------------------- PCIe Pre-Mem Config Block Print End -------------------
------------------------ PCH Print PreMemPolicy Start ------------------------
Revision= 1
------------------ PCH General PreMem Config ------------------
Port80Route= 0
PcieRefPllSsc= FF
GpioOverride= 0
------------------ PCH LPC PreMem Config ------------------
EnhancePort8xhDecoding= 1
------------------ HSIO PCIE PreMem Config ------------------
RootPort[0] HsioRxSetCtleEnable= 0
RootPort[0] HsioRxSetCtle= 0
RootPort[0] HsioTxGen1DownscaleAmpEnable= 0
RootPort[0] HsioTxGen1DownscaleAmp= 0
RootPort[0] HsioTxGen2DownscaleAmpEnable= 0
RootPort[0] HsioTxGen2DownscaleAmp= 0
RootPort[0] HsioTxGen3DownscaleAmpEnable= 0
RootPort[0] HsioTxGen3DownscaleAmp= 0
RootPort[0] HsioTxGen1DeEmphEnable= 0
RootPort[0] HsioTxGen1DeEmph= 0
RootPort[0] HsioTxGen2DeEmph3p5Enable= 0
RootPort[0] HsioTxGen2DeEmph3p5= 0
RootPort[0] HsioTxGen2DeEmph6p0Enable= 0
RootPort[0] HsioTxGen2DeEmph6p0= 0
RootPort[1] HsioRxSetCtleEnable= 0
RootPort[1] HsioRxSetCtle= 0
RootPort[1] HsioTxGen1DownscaleAmpEnable= 0
RootPort[1] HsioTxGen1DownscaleAmp= 0
RootPort[1] HsioTxGen2DownscaleAmpEnable= 0
RootPort[1] HsioTxGen2DownscaleAmp= 0
RootPort[1] HsioTxGen3DownscaleAmpEnable= 0
RootPort[1] HsioTxGen3DownscaleAmp= 0
RootPort[1] HsioTxGen1DeEmphEnable= 0
RootPort[1] HsioTxGen1DeEmph= 0
RootPort[1] HsioTxGen2DeEmph3p5Enable= 0
RootPort[1] HsioTxGen2DeEmph3p5= 0
RootPort[1] HsioTxGen2DeEmph6p0Enable= 0
RootPort[1] HsioTxGen2DeEmph6p0= 0
RootPort[2] HsioRxSetCtleEnable= 0
RootPort[2] HsioRxSetCtle= 0
RootPort[2] HsioTxGen1DownscaleAmpEnable= 0
RootPort[2] HsioTxGen1DownscaleAmp= 0
RootPort[2] HsioTxGen2DownscaleAmpEnable= 0
RootPort[2] HsioTxGen2DownscaleAmp= 0
RootPort[2] HsioTxGen3DownscaleAmpEnable= 0
RootPort[2] HsioTxGen3DownscaleAmp= 0
RootPort[2] HsioTxGen1DeEmphEnable= 0
RootPort[2] HsioTxGen1DeEmph= 0
RootPort[2] HsioTxGen2DeEmph3p5Enable= 0
RootPort[2] HsioTxGen2DeEmph3p5= 0
RootPort[2] HsioTxGen2DeEmph6p0Enable= 0
RootPort[2] HsioTxGen2DeEmph6p0= 0
RootPort[3] HsioRxSetCtleEnable= 0
RootPort[3] HsioRxSetCtle= 0
RootPort[3] HsioTxGen1DownscaleAmpEnable= 0
RootPort[3] HsioTxGen1DownscaleAmp= 0
RootPort[3] HsioTxGen2DownscaleAmpEnable= 0
RootPort[3] HsioTxGen2DownscaleAmp= 0
RootPort[3] HsioTxGen3DownscaleAmpEnable= 0
RootPort[3] HsioTxGen3DownscaleAmp= 0
RootPort[3] HsioTxGen1DeEmphEnable= 0
RootPort[3] HsioTxGen1DeEmph= 0
RootPort[3] HsioTxGen2DeEmph3p5Enable= 0
RootPort[3] HsioTxGen2DeEmph3p5= 0
RootPort[3] HsioTxGen2DeEmph6p0Enable= 0
RootPort[3] HsioTxGen2DeEmph6p0= 0
RootPort[4] HsioRxSetCtleEnable= 0
RootPort[4] HsioRxSetCtle= 0
RootPort[4] HsioTxGen1DownscaleAmpEnable= 0
RootPort[4] HsioTxGen1DownscaleAmp= 0
RootPort[4] HsioTxGen2DownscaleAmpEnable= 0
RootPort[4] HsioTxGen2DownscaleAmp= 0
RootPort[4] HsioTxGen3DownscaleAmpEnable= 0
RootPort[4] HsioTxGen3DownscaleAmp= 0
RootPort[4] HsioTxGen1DeEmphEnable= 0
RootPort[4] HsioTxGen1DeEmph= 0
RootPort[4] HsioTxGen2DeEmph3p5Enable= 0
RootPort[4] HsioTxGen2DeEmph3p5= 0
RootPort[4] HsioTxGen2DeEmph6p0Enable= 0
RootPort[4] HsioTxGen2DeEmph6p0= 0
RootPort[5] HsioRxSetCtleEnable= 0
RootPort[5] HsioRxSetCtle= 0
RootPort[5] HsioTxGen1DownscaleAmpEnable= 0
RootPort[5] HsioTxGen1DownscaleAmp= 0
RootPort[5] HsioTxGen2DownscaleAmpEnable= 0
RootPort[5] HsioTxGen2DownscaleAmp= 0
RootPort[5] HsioTxGen3DownscaleAmpEnable= 0
RootPort[5] HsioTxGen3DownscaleAmp= 0
RootPort[5] HsioTxGen1DeEmphEnable= 0
RootPort[5] HsioTxGen1DeEmph= 0
RootPort[5] HsioTxGen2DeEmph3p5Enable= 0
RootPort[5] HsioTxGen2DeEmph3p5= 0
RootPort[5] HsioTxGen2DeEmph6p0Enable= 0
RootPort[5] HsioTxGen2DeEmph6p0= 0
RootPort[6] HsioRxSetCtleEnable= 0
RootPort[6] HsioRxSetCtle= 0
RootPort[6] HsioTxGen1DownscaleAmpEnable= 0
RootPort[6] HsioTxGen1DownscaleAmp= 0
RootPort[6] HsioTxGen2DownscaleAmpEnable= 0
RootPort[6] HsioTxGen2DownscaleAmp= 0
RootPort[6] HsioTxGen3DownscaleAmpEnable= 0
RootPort[6] HsioTxGen3DownscaleAmp= 0
RootPort[6] HsioTxGen1DeEmphEnable= 0
RootPort[6] HsioTxGen1DeEmph= 0
RootPort[6] HsioTxGen2DeEmph3p5Enable= 0
RootPort[6] HsioTxGen2DeEmph3p5= 0
RootPort[6] HsioTxGen2DeEmph6p0Enable= 0
RootPort[6] HsioTxGen2DeEmph6p0= 0
RootPort[7] HsioRxSetCtleEnable= 0
RootPort[7] HsioRxSetCtle= 0
RootPort[7] HsioTxGen1DownscaleAmpEnable= 0
RootPort[7] HsioTxGen1DownscaleAmp= 0
RootPort[7] HsioTxGen2DownscaleAmpEnable= 0
RootPort[7] HsioTxGen2DownscaleAmp= 0
RootPort[7] HsioTxGen3DownscaleAmpEnable= 0
RootPort[7] HsioTxGen3DownscaleAmp= 0
RootPort[7] HsioTxGen1DeEmphEnable= 0
RootPort[7] HsioTxGen1DeEmph= 0
RootPort[7] HsioTxGen2DeEmph3p5Enable= 0
RootPort[7] HsioTxGen2DeEmph3p5= 0
RootPort[7] HsioTxGen2DeEmph6p0Enable= 0
RootPort[7] HsioTxGen2DeEmph6p0= 0
RootPort[8] HsioRxSetCtleEnable= 0
RootPort[8] HsioRxSetCtle= 0
RootPort[8] HsioTxGen1DownscaleAmpEnable= 0
RootPort[8] HsioTxGen1DownscaleAmp= 0
RootPort[8] HsioTxGen2DownscaleAmpEnable= 0
RootPort[8] HsioTxGen2DownscaleAmp= 0
RootPort[8] HsioTxGen3DownscaleAmpEnable= 0
RootPort[8] HsioTxGen3DownscaleAmp= 0
RootPort[8] HsioTxGen1DeEmphEnable= 0
RootPort[8] HsioTxGen1DeEmph= 0
RootPort[8] HsioTxGen2DeEmph3p5Enable= 0
RootPort[8] HsioTxGen2DeEmph3p5= 0
RootPort[8] HsioTxGen2DeEmph6p0Enable= 0
RootPort[8] HsioTxGen2DeEmph6p0= 0
RootPort[9] HsioRxSetCtleEnable= 0
RootPort[9] HsioRxSetCtle= 0
RootPort[9] HsioTxGen1DownscaleAmpEnable= 0
RootPort[9] HsioTxGen1DownscaleAmp= 0
RootPort[9] HsioTxGen2DownscaleAmpEnable= 0
RootPort[9] HsioTxGen2DownscaleAmp= 0
RootPort[9] HsioTxGen3DownscaleAmpEnable= 0
RootPort[9] HsioTxGen3DownscaleAmp= 0
RootPort[9] HsioTxGen1DeEmphEnable= 0
RootPort[9] HsioTxGen1DeEmph= 0
RootPort[9] HsioTxGen2DeEmph3p5Enable= 0
RootPort[9] HsioTxGen2DeEmph3p5= 0
RootPort[9] HsioTxGen2DeEmph6p0Enable= 0
RootPort[9] HsioTxGen2DeEmph6p0= 0
RootPort[10] HsioRxSetCtleEnable= 0
RootPort[10] HsioRxSetCtle= 0
RootPort[10] HsioTxGen1DownscaleAmpEnable= 0
RootPort[10] HsioTxGen1DownscaleAmp= 0
RootPort[10] HsioTxGen2DownscaleAmpEnable= 0
RootPort[10] HsioTxGen2DownscaleAmp= 0
RootPort[10] HsioTxGen3DownscaleAmpEnable= 0
RootPort[10] HsioTxGen3DownscaleAmp= 0
RootPort[10] HsioTxGen1DeEmphEnable= 0
RootPort[10] HsioTxGen1DeEmph= 0
RootPort[10] HsioTxGen2DeEmph3p5Enable= 0
RootPort[10] HsioTxGen2DeEmph3p5= 0
RootPort[10] HsioTxGen2DeEmph6p0Enable= 0
RootPort[10] HsioTxGen2DeEmph6p0= 0
RootPort[11] HsioRxSetCtleEnable= 0
RootPort[11] HsioRxSetCtle= 0
RootPort[11] HsioTxGen1DownscaleAmpEnable= 0
RootPort[11] HsioTxGen1DownscaleAmp= 0
RootPort[11] HsioTxGen2DownscaleAmpEnable= 0
RootPort[11] HsioTxGen2DownscaleAmp= 0
RootPort[11] HsioTxGen3DownscaleAmpEnable= 0
RootPort[11] HsioTxGen3DownscaleAmp= 0
RootPort[11] HsioTxGen1DeEmphEnable= 0
RootPort[11] HsioTxGen1DeEmph= 0
RootPort[11] HsioTxGen2DeEmph3p5Enable= 0
RootPort[11] HsioTxGen2DeEmph3p5= 0
RootPort[11] HsioTxGen2DeEmph6p0Enable= 0
RootPort[11] HsioTxGen2DeEmph6p0= 0
---------------- HSIO SATA PreMem Config for controller 0 ----------------
PortSettings[0] HsioRxGen1EqBoostMagEnable= 0
PortSettings[0] HsioRxGen1EqBoostMag= 0
PortSettings[0] HsioRxGen2EqBoostMagEnable= 0
PortSettings[0] HsioRxGen2EqBoostMag= 0
PortSettings[0] HsioRxGen3EqBoostMagEnable= 0
PortSettings[0] HsioRxGen3EqBoostMag= 0
PortSettings[0] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen1DownscaleAmp= 0
PortSettings[0] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen2DownscaleAmp= 0
PortSettings[0] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen3DownscaleAmp= 0
PortSettings[0] HsioTxGen1DeEmphEnable= 0
PortSettings[0] HsioTxGen1DeEmph= 0
PortSettings[0] HsioTxGen2DeEmphEnable= 0
PortSettings[0] HsioTxGen2DeEmph= 0
PortSettings[0] HsioTxGen3DeEmphEnable= 0
PortSettings[0] HsioTxGen3DeEmph= 0
PortSettings[1] HsioRxGen1EqBoostMagEnable= 0
PortSettings[1] HsioRxGen1EqBoostMag= 0
PortSettings[1] HsioRxGen2EqBoostMagEnable= 0
PortSettings[1] HsioRxGen2EqBoostMag= 0
PortSettings[1] HsioRxGen3EqBoostMagEnable= 0
PortSettings[1] HsioRxGen3EqBoostMag= 0
PortSettings[1] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen1DownscaleAmp= 0
PortSettings[1] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen2DownscaleAmp= 0
PortSettings[1] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen3DownscaleAmp= 0
PortSettings[1] HsioTxGen1DeEmphEnable= 0
PortSettings[1] HsioTxGen1DeEmph= 0
PortSettings[1] HsioTxGen2DeEmphEnable= 0
PortSettings[1] HsioTxGen2DeEmph= 0
PortSettings[1] HsioTxGen3DeEmphEnable= 0
PortSettings[1] HsioTxGen3DeEmph= 0
------------------ PCH PCIe RP PreMem Config ------------------
Port[0] RpEnabled= 1
Port[1] RpEnabled= 1
Port[2] RpEnabled= 1
Port[3] RpEnabled= 1
Port[4] RpEnabled= 1
Port[5] RpEnabled= 1
Port[6] RpEnabled= 1
Port[7] RpEnabled= 1
Port[8] RpEnabled= 1
Port[9] RpEnabled= 1
Port[10] RpEnabled= 1
Port[11] RpEnabled= 1
Clock[0] Usage= 80
Clock[0] ClkReq= 0
Clock[1] Usage= 80
Clock[1] ClkReq= 1
Clock[2] Usage= 80
Clock[2] ClkReq= 2
Clock[3] Usage= 80
Clock[3] ClkReq= 3
Clock[4] Usage= 80
Clock[4] ClkReq= 4
Clock[5] Usage= 80
Clock[5] ClkReq= 5
Clock[6] Usage= 80
Clock[6] ClkReq= 6
------------------------ PCH Print PreMemPolicy End --------------------------
---------------------- Me Config Block Pre-Mem Print Begin -----------------
------------------------ ME_PEI_PREMEM_CONFIG -----------------
Revision : 0x2
HeciTimeouts : 0x1
DidInitStat : 0x0
DisableCpuReplacedPolling : 0x0
SendDidMsg (deprecated) : 0x0
DisableMessageCheck : 0x0
SkipMbpHob : 0x0
HeciCommunication2 : 0x0
KtDeviceEnable : 0x1
SkipCpuReplacementCheck : 0x1
Heci1BarAddress : 0xFEDA2000
Heci2BarAddress : 0xFEDA3000
Heci3BarAddress : 0xFEDA4000
---------------------- Me Config Block Pre-Mem Print End -------------------
------------------------ SA Policy (PEI PreMem) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_PREMEM_CONFIG ------------------------
Revision : 2
SpdAddressTable[16] : 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
SmbusBar: 0xEFA0
TsegSize: 0x800000
UserBd: 0x5
SkipExtGfxScan: 1
S3DataPtr: 0x0
WrcFeatureEnable : 0x0
VcRtMappingPegEn : 0x0
TxtImplemented: 0
BdatEnable: 0
BdatTestType: 0
ScanExtGfxForLegacyOpRom: 0
CridEnable: 0
AcpiReservedMemoryBase: 0x0
AcpiReservedMemorySize: 0x0
SystemMemoryLength: 0x0
OpRomScanTempMmioBar: 0x80000000
OpRomScanTempMmioLimit: 0xC0000000
------------------------ MEMORY_CONFIG_NO_CRC ------------------------
CleanMemory: 0
MemTestOnWarmBoot: 1
SerialDebugLevel: 3
PlatformMemorySize: 0x5976000
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DMI PreMem Config ------------------
DmiMaxLinkSpeed : 0x3
DmiAspm : 0x2
DmiHWEQ : 0x1
DmiGen3EqPh2Enable : 0x2
DmiGen3EqPh3Method : 0x0
DmiGen3ProgramStaticEq : 0x1
DmiGen3RootPortPreset[8] : 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8
DmiGen3EndPointPreset[8] : 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7
DmiGen3EndPointHint[8] : 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2
DmiGen3RxCtlePeaking[4] : 0x0 0x0 0x0 0x0 DmiDeEmphasis : 0x1
------------------------ GRAPHICS_PEI_PREMEM_CONFIG -----------------
Revision : 3
PanelPowerEnable : 0x1
GttSize : 8 MB
IgdDvmt50PreAlloc : 0xFE
InternalGraphics : 0x1
PrimaryDisplay : 0x0
ApertureSize : 0x1
GtPsmiSupport : 0x0
PsmiRegionSize : 0x0
DismSize : 0x0
GttMmAdr : 0xAF000000
GmAdr64 : 0xB0000000
DfdRestoreEnable : 0x0
DdiPortAConfig : 0x0
DdiPortBConfig : 0x0
DdiPortAHpd : 0x0
DdiPortBHpd : 0x0
DdiPortCHpd : 0x0
DdiPort1Hpd : 0x0
DdiPort2Hpd : 0x0
DdiPort3Hpd : 0x0
DdiPort4Hpd : 0x0
DdiPortADdc : 0x0
DdiPortBDdc : 0x0
DdiPortCDdc : 0x0
DdiPort1Ddc : 0x0
DdiPort2Ddc : 0x0
DdiPort3Ddc : 0x0
DdiPort4Ddc : 0x0
------------------------ GRAPHICS_PEI_PREMEM_CONFIG Print END -----------------
----------------------- TCSS_PEI_PREMEM_CONFIG -----------------
Revision : 1
TCSS Port Enabled Bitmap : F
TcssPeiPreMemConfig->MiscConfig.PcieMultipleSegmentEnabled : 0x0
TCSS ITBT PCIE 0-3 Enable : 1 1 1 1
TCSS xHCI Enable : 1
TCSS xDCI Enable : 1
TCSS ITBT DMA 0-1 Enable : 1 1
------------------------ VTD_CONFIG -----------------
Revision : 1
VtdDisable : 0x0
X2ApicOptOut : 0x0
DmaControlGuarantee : 0x1
VtdIgdEnable : 0x1
VtdIpuEnable : 0x1
VtdIopEnable : 0x1
VtdItbtEnable : 0x1
VtdBaseAddress[0] : 0xFED90000
VtdBaseAddress[1] : 0xFED92000
VtdBaseAddress[2] : 0xFED91000
VtdBaseAddress[3] : 0xFED84000
VtdBaseAddress[4] : 0xFED85000
VtdBaseAddress[5] : 0xFED86000
VtdBaseAddress[6] : 0xFED87000
PreBootDmaMask : 0x0
DmaBufferSize : 0x400000
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge PreMem Config ------------------
Revision : 1
MchBar : 0xFEDC0000
DmiBar : 0xFEDA0000
EpBar : 0xFEDA1000
EdramBar : 0xFED80000
RegBar : 0xFB000000
EnableAbove4GBMmio : 0x1
------------------------ CPU - SiPreMemPolicyPpi Print Begin in PreMem -----------------
Revision= 1
------------------ CPU Security PreMem Config ------------------
CPU_SECURITY_PREMEM_CONFIG : PrmrrSize = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosSize = 0x2800
CPU_SECURITY_PREMEM_CONFIG : BiosGuard = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosGuardToolsInterface = 0x0
CPU_SECURITY_PREMEM_CONFIG : Txt = 0x0
CPU_SECURITY_PREMEM_CONFIG : SkipStopPbet = 0x0
CPU_SECURITY_PREMEM_CONFIG : EnableC6Dram = 0x0
CPU_SECURITY_PREMEM_CONFIG : ResetAux = 0x0
CPU_SECURITY_PREMEM_CONFIG : TxtAcheckRequest = 0x0
------------------ CPU TXT PreMem Config ------------------
CPU_TXT_PREMEM_CONFIG : SinitMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtHeapMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TgaSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemoryBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemorySize = 0x400000
CPU_TXT_PREMEM_CONFIG : BiosAcmSize = 0x0
CPU_TXT_PREMEM_CONFIG : BiosAcmBase = 0xFF6C0000
CPU_TXT_PREMEM_CONFIG : ApStartupBase = 0x0
------------------ CPU Config Lib PreMem Config ------------------
CPU_CONFIG_LIB_PREMEM_CONFIG : HyperThreading = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : BootFrequency = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : ActiveCoreCount1 = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : JtagC10PowerGateDisable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BistOnReset = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : VmxEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceEnable = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceLockEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : TmeEnable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : CpuRatio = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : ConfigTdpLevel = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BclkSource = 0x0
------------------------ CPU - SiPreMemPolicyPpi Print End -----------------
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DCI PreMem Config ------------------
DciEn = 0
DciDbcMode = 4
DciModphyPg = 0
DciUsb3TypecUfpDbg = 2
------------------ HD Audio PreMem Config ------------------
Enable = 1
DSP Enable = 0
DSP UAA Compliance = 0
Audio Link: HDA Link = 1
Audio Link: DMIC#0 = 0
DMIC#0 Clock Select = 0
Audio Link: DMIC#1 = 0
DMIC#1 Clock Select = 0
Audio Link: SSP#0 = 0
Audio Link: SSP#1 = 0
Audio Link: SSP#2 = 0
Audio Link: SSP#3 = 0
Audio Link: SSP#4 = 0
Audio Link: SSP#5 = 0
Audio Link: SoundWire#1 = 1
Audio Link: SoundWire#2 = 1
Audio Link: SoundWire#3 = 0
Audio Link: SoundWire#4 = 0
VC Type = 0
iDisp Codec Disconnect = 0
iDisp Link Frequency = 4
iDisp Link T-Mode = 3
ResetWaitTimer = 258
Hda Sdi0 Enable = 1
Hda Sdi1 Enable = 0
------------------ ISH PreMem Config ------------------
Enable= 1
------------------ CPU Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x0
------------------ PCH Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x1
------------------ SMBUS PreMem Config ------------------
Enable= 1
ArpEnable= 0
DynamicPowerGating= 1
SpdWriteDisable= 1
SmbAlertEnable= 0
SmbusIoBase= EFA0
NumRsvdSmbusAddresses= 4
RsvdSmbusAddressTable= { A2h A0h A2h A0h }
------------------ WDT PreMem Config ------------------
DisableAndLock= 0
------------------ OverClocking PreMem Config ------------------
OVERCLOCKING_PREMEM_CONFIG:: OcSupport : 0x0
OVERCLOCKING_PREMEM_CONFIG:: OcLock : 0x1
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingDownBin : 0x1
OVERCLOCKING_PREMEM_CONFIG:: Avx2RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: Avx3RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: BclkAdaptiveVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CorePllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: McPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: TjMaxOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrFaults : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrEfficiency : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RealtimeMemoryTiming : 0x0
OVERCLOCKING_PREMEM_CONFIG:: DynamicMemoryChange : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingCcfAutoGvDisable : 0x1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG -----------------
Revision : 4
RpEnabledMask : 0xFFFFFF
Link Down GPIOs : 0x0
ClockReq Messaging Enable : 0x1
RootPort[0] PcieSpeed : 0
RootPort[0] CdrRelock : 1
RootPort[0] Xl1el : 0
RootPort[0] NewFomDisable : 1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG Print END -----------------
------------------------ PCIE_PEI_PREMEM_CONFIG -----------------
Revision : 1
------------------------ PCIE_PEI_PREMEM_CONFIG Print END -----------------
------------------------ HYBRID_GRAPHICS_CONFIG -----------------
Revision : 2
HgConfig->CpuPcie0Rtd3Gpio.GpioSupport : 0x0
HgMode : 0
HgSlot : 0
------------------------ HG_DELAY_OPTIMIZATION_DATA -----------------
SaRtd3.HgDelayAfterHoldReset : 0x64
SaRtd3.HgDelayAfterPwrEn : 0x12C
------------------------ HYBRID_GRAPHICS_CONFIG print END -----------------
----------------------- DPIN_PREMEM_CONFIG -----------------
Revision : 2
DPIN DPin External Connection Policy : 0
DPIN NumberOfDpInPort : 0x0
DPIN DpInPortConnectMap : 0x0
DPIN DPinDynamicSwitch : 0x0
DPIN DPinDynamicSwitchDelay0 : 0x0
DPIN DPinDynamicSwitchDelay1 : 0x3E8
------------------ TCC PreMem Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Install PPI: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
FspInitPreMemEntryPoint done
Notify: PPI Guid: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8, Peim notify entry point: FFEE2689
Notify: PPI Guid: 85270BEF-6984-4375-A6EA-B5AA906EDD4A, Peim notify entry point: FFE207C3
SiInitPreMemOnPolicy() Start
PsmiInit () - Start
Install PSMI DATA HOB
PsmiDataHob->EfiHobGuidType.Name: 0A9652BD-6ACD-47E5-803A-09537BD2A848
PsmiDataHob @ FEF555B8
PsmiDataHobSize - HobHeader: 6A
PsmiDataHobSize: 82
PSMI HOB installed
PSMI SCRPD1 = 0x0
No PSMI Reservation Request
PsmiInit () - End
ME-BIOS: HECI PPI Entry.
POSTCODE=<0000DE03>
Install PPI: D14319E2-407A-9580-8DE5-51A8FFC6D7D7
ME-BIOS: HECI PPI Exit - Success.
POSTCODE=<0000DE23>
MeDeviceInit [HECI1] H: 00000000, L: FEDA2000
POSTCODE=<0000D001> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI2] H: 00000000, L: FEDA3000
POSTCODE=<0000D002> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI3] H: 00000000, L: FEDA4000
POSTCODE=<0000D003> - ME Device Init
Program HECI MMIO address
HeciEnable
[HECI1] Clearing D0I3 bit
[HECI1] D0I3C register = 00000010
Enabling CSME device 0:22:0
HeciInitialize () - Start
[HECI1] HfSts1 = 0x80000015
InitializeHeci () - Set H_RDY
Heci2Disable
[HECI2] Setting D0I3 bit
[HECI2] D0I3C register = 00000015
Disabling CSME device 0:22:1
Heci3Enable
[HECI3] Clearing D0I3 bit
[HECI3] D0I3C register = 00000010
Enabling CSME device 0:22:4
SolEnable
Enabling CSME device 0:22:3
PeiSiPolicyOverridePreMem ()
SiPreMemConfig->PlatformDebugConsent = 0
DciPreMemConfig->DciEn = 0
DciPreMemConfig->DciModphyPg = 1
DciPreMemConfig->DciDbcMode = 4
CpuTraceHubPreMemConfig->TraceHub.EnableMode = 0
CpuTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
CpuTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
PchTraceHubPreMemConfig->TraceHub.EnableMode = 0
PchTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
PchTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
POSTCODE=<0000DB48>
PchOnPolicyInstalled() - Start
ConfigureHdAudio() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
SetHdaControllerReset() - De-assert Reset
ConfigureAudioLinks() Start
HDA: HD Audio Link pins configuration
HDA: SoundWire#0 interface pins configuration, Status = Success
HDA: SoundWire#1 interface pins configuration, Status = Success
ConfigureAudioLinks() End
InitializeDisplayAudio() Start
EnablePowerWell Started !
EnablePowerWell Successfull
InitializeDisplayAudio() End
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00810004
HDA: SRAM retention mode idle wait - 64 XTAL oscillator clocks
ConfigureHdAudio() End - Status = Success
POSTCODE=<0000DB49>
PchHsioBiosProgPreMem() Start
PchHsioBiosProgPreMem() End
POSTCODE=<0000DB4A>
ECTRL Old = 0x0000B860
ECTRL New = 0x0000B861
DCI Debug Disabled
POSTCODE=<0000DB4D>
TraceHubInitialize() - Start
Early Trace is Enabled
Disable early trace complete
SCRPD0 = 0x00000000
TraceHubInitialize() - End. STT disconnected and Trace Hub requested to be disable
Register PPI Notify: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
SetPcieRefPllSsc()
POSTCODE=<0000DB15>
InitializePchSmbus() Start
Install PPI: 9CA93627-B65B-4324-A202-C0B461764543
InitializePchSmbus() End
POSTCODE=<0000DB52>
LpcOnPolicyConfigure()
POSTCODE=<0000DB53>
DCI Debug Disabled
Configure PCH SBU pins
POSTCODE=<0000DB55>
PchOnPolicyInstalled() - End
CpuOnPolicyInstalled Start
POSTCODE=<0000DC20>
XmmInit Start
POSTCODE=<0000DC2F>
Fit Entry Type: Startup ACM Entry
Fit Error Code: Startup ACM not supported by CPU
Microcode Update: 0x000000AC
TxtInit Start
POSTCODE=<0000DC3F>
Install PPI: 38CDD10B-767D-4F6E-A744-67EE1DFE2FA5
TXTPEI: TxtInfoHob passed from platform as:
TXTPEI: ChipsetIsTxtCapable = 1
TXTPEI: ProcessorIsTxtCapable = 1
TXTPEI: TxtMode = 0
TXTPEI: TxtAcheckRequest = 0
TXTPEI: ResetAux = 0
TXTPEI: AcpiBase = 1800
TXTPEI: SinitMemorySize = 0
TXTPEI: TxtHeapMemorySize = 0
TXTPEI: TxtDprMemoryBase = 0
TXTPEI: TxtDprMemorySize = 400000
TXTPEI: BiosAcmBase = FF6C0000
TXTPEI: BiosAcmSize = 0
TXTPEI: SinitAcmBase = 0
TXTPEI: SinitAcmSize = 0
TXTPEI: TgaSize = 0
TXTPEI: TxtLcpPdBase = 0
TXTPEI: TxtLcpPdSize = 0
TXTPEI: Flags = 0
TXTPEI: ApStartupBase = 0
TXTPEI: BIOS ACM is not matched to chipset!! Force TxtMode=0 and unloaded!!
TXTPEI::PEI Lib initialization failure
TXTPEI::Processor, PCH & Platform is TXT capable
TXTPEI::Unlock memory
TXTPEI::TXT failed reported by S-ACM
Install PPI: 9ECAFD30-29E2-42F6-BAF3-8B7DB8FE1F22
Processor does not support Boot Guard.
Boot Guard is not supported.
POSTCODE=<0000DC4F>
SetCpuStrapAndEarlyPowerOnConfig Start
POSTCODE=<0000DC0A>
SetCpuStrapAndEarlyPowerOnConfig: BootMode = 0
Set CPU Soft Straps Entry Point
Current CPU Strap Data = 0x1000
HT is supported
Number of Total Cores = 0x4. Number of Active Cores / Threads = 0x4 / 0x8
Ratio from Policy is 0x0
Current Flex Ratio from MSR is 0x0
Current Flex Ratio from CPU Strap: 0x0
No need to set Flex Ratio.
SetCpuStrapAndEarlyPowerOnConfig Done
POSTCODE=<0000DC14>
POSTCODE=<0000DC5F>
CpuOcInitPreMem Start
POSTCODE=<0000DC26>
(OC) Overclocking is disabled. Bypassing CPU core overclocking flow.
Invoking LockEnableDisableCpuDebug
CPU Pre-Mem Exit
POSTCODE=<0000DC6F>
MeOnPolicyInstalled() - Start
PWRM_PMCON_A = 0xD0801038
MePmInit () - Force an S5 exit path.
MeOnPolicyInstalled() - End
Programming Host Bridge Bars
POSTCODE=<0000DA06>
HostBridgeDataHob->EfiHobGuidType.Name: 3B682D57-D402-40A6-B134-A0C4F6311D09
HostBridgeDataHob @ FEF55988
HostBridgeDataHob Size - HobHeaderSize: 4
HostBridgeDataHobSize: 1C
HostBridgeDataHob->EnableAbove4GBMmio: 1
Host Bridge Data HOB installed
Enable VLW
Install SA HOBs
POSTCODE=<0000DA08>
SaDataHob->EfiHobGuidType.Name: E07D0BDA-BF90-46A9-B00E-B2C44A0ED6D0
SaConfigHob->EfiHobGuidType.Name: 762FA2E6-EA3B-41C8-8C52-63766D7039E0
SaDataHob @ FEF559A8
SaDataHobSize - HobHeader: 3
SaDataHobSize: 1B
SA HOBs installed
Reporting CPU PCIe code version
POSTCODE=<0000DA0A>
***************** System Agent PCIe code version *****************
** Major version number is: 10 **
** Minor version number is: 224 **
** Rev version number is: 126 **
** Build number is: 112 **
******************************************************************
Initializing DMI/OPI Max PayLoad Size
POSTCODE=<0000DA1F>
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
Initializing HybridGraphics
POSTCODE=<0000DA20>
HG:: HybridGraphics PEI initialization Starting
HgInfoHob->EfiHobGuidType.Name: 46CBED07-717A-4A75-85B3-F4B6C4E23A75
HgInfoHob @ FEF559F0
HgInfoHobSize - HobHeader: 4E
HgInfoHobSize: 66
Install HG Info HOB
HG:: HybridGraphics PEI initialization Ends
Initializing CPU PCIe
POSTCODE=<0000DA30>
CpuPcieHob Created
CpuPcieHob->EfiHobGuidType.Name: 440AB2E5-A3EA-466F-8496-DFB13B752995
CpuPcieHob @ FEF55A58
CpuPcieHob - HobHeader: DB
Initialize CPU PciExpress controllers in Premem : PciExpressInit Start
MaxCpuPciePortNum = 1
RpEnabledMask from Policy = FFFFFF
Read DEVEN register
DevEnable = 2F091
RpEnabledMask formed from DEVEN = 1
CpuPcieHob->RpEnabledMask formed after reading DID/setup and controllerconfig = 1
Call DEKEL init function to configure the PHY registers
GetCpuPcieCdrValue = 15
Default Case
GetCpuPcieCdrValue = 15
Default Case
CdrRelock is Enabled for PEG60
CdrRelock is Disabled for PEG10
ClockReq Messaging Enable
CPU PCIE Clock Req configuration Start
Keeping L1SubStates enable by default for RpIndex 0
CpuPcieEnableClkReqMsg Start
Configure CLKREQ# GPIO
Program the registers in CPU Root port
CpuPcieProgramClkReqMsgProtocolReg Start
CpuPcieProgramClkReqMsgProtocolReg End
PchEnableCpuPciePortClkReqMapping Entry
PchFiaEnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Exit
PchFiaEnableCpuPciePortClkReq Exit
PchEnableCpuPciePortClkReqMapping Exit
CpuPcieEnableClkReqMsg End
CPU PCIE Clock Req configuration End
Before PchFiaSetClockOutputDelay!!!
**** BDF = 060 ****
Set Slot Implemented Bit
Set TLS to gen1
Set speed capability in rootport 0
PcieSpeed from policy = 0
ElasticBufferProgramming StartElasticBufferProgramming EndRetrain link by clearing BLKDQDASD
PdsEnabledMask= 0
Target link speed = 1
Current link speed = 1
Negotiated link Width = 0
Link is not active yet!!!
Program the CLKREQ ASSERT pin
CpuPcieSetAssertClkReq Start
CpuPcieSetAssertClkReq End
ClkReqAssertedMask = 0
CpuPciePollClkReqMsgSts StatusBit = 0
CpuPciePollClkReqMsgSts failed, so Disable CLKREQ# messaging
CpuPcieDisableClkReqMsg Start
Disable the CLKREQ# Messaging based on the polling
L1SubStates should not be enabled if CLKREQ# messaging is not enabled
Disable CLKREQ# messaging in Cpu Pcie RP
CpuPcieDisableClkReqMessaging Start
CpuPcieDisableClkReqMessaging End
CpuPcieDisableClkReqMsg End
**** Premem PciExpressInit End ****
Initializing DMI Tc/Vc mapping
POSTCODE=<0000DA40>
DmiBar + R_PCIE_PVCCR1 = 0
TC:0 VC:0!
TC:1 VC:1!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:7 VC:2!
VC:0 VCID:0 Enable:1!
VC:1 VCID:1 Enable:1!
VC:2 VCID:7 Enable:1!
Create Graphics Data Hob
GfxDataHob->EfiHobGuidType.Name: 48E6E20A-9110-4332-8C9F-5F7CAE76FCF3
GfxDataHob @ FEF55B50
GfxDataHobSize - HobHeader: 10
GfxDataHobSize: 28
GfxDataHob->PrimaryDisplayDetection: 0
GfxDataHob->ExternalGfxScanEnable: 0
Gfx HOBs installed
Graphics detection
Initializing Graphics
POSTCODE=<0000DA45>
iGFX initialization start
GTBaseAddress 0XAF000000:
IGD enabled.
Update CONFIG0 Address D00 : 10
Configuring iTouch Source Registers Doorbell and GSA_Touch
iGFX initialization end
Initializing Pre-Memory Display
POSTCODE=<0000DA0B>
DisplayNativeGpioInit: Begin
DisplayNativeGpioInit: End
ProgramDisplayWorkaround: Begin
POSTCODE=<0000DA48>
Initializing DpIn PreMem Config.
[DpIn] DpInPreMemInit() - Start
Dp-In External Gfx Card Support = 0 From DpIn PreMemConfigBlock
Initializing CPU specific PreMem Pei Config in Pre-Mem
GetDpInPrivateCpuData - Dp-In not Supported by Silicon. Max DP-In Port Support = 0x0
Initializing Dp-In Config Policy
[DPIN] DpInPostGfxInit() - Start
[DPIN] DpInPostGfxInit() - End
POSTCODE=<0000DA49>
[TCSS] TcssPreMemInit() - Start
Install TCSS DATA HOB
TcssHob->EfiHobGuidType.Name: 455702CE-4ADB-45D9-8B27-F7B0D9798AE0
TcssHob @ FEF55B78
&(TcssHob->TcssData) @ FEF55B90
TcssHob - HobHeader: 6E
TcssData: 32
Install TCSS SSID DATA HOB
TcssSsidHob->EfiHobGuidType.Name: 8903D47A-8F82-4063-A840-31689C9E7820
TcssSsidHob @ FEF55C00
&(TcssHob->TcssSsidTable) @ FEF55C18
TcssSsidHob->NumberOfTcssSsidTable: 8
[TCSS] TcssDevEnInitPreMem - Start
TCSS DEVEN = 0x00000300
IOM mailbox data = 0x00000300
IOM mailbox command = 0x00000001
[TCSS] Updated TCSS_DEVEN to TCSS HOB
[TCSS] TcssDevEnInitPreMem - End
[TCSS] TcssPreMemInit() - End
POSTCODE=<0000DA50>
[TCSS] UpdateDpinToHob Entry
[TCSS] UpdateDpinToHob End
Initializing Vtd
POSTCODE=<0000DA51>
Install VTD DATA HOB
VtdDataHob->EfiHobGuidType.Name: 1D60DCE8-503A-44A8-B32D-56B388F34C55
VtdDataHob @ FEF55C20
VtdDataHobSize - HobHeader: 24
VtdDataHobSize: 3C
VTd enabled
IgdIommuOverride start
Before Override: EcapReg=69E2FF0505E
After Override: EcapReg=29A00F0505E
Initializing System Agent Overclocking
POSTCODE=<0000DA52>
SaOcInit Start
(OC) Overclocking is disabled. Bypassing SA overclocking flow.
Configuring Telemetry CPU CrashLog Device with DEVEN 0x2F091
TotalMmioLength: 0x00000000 bytes
[InstallMrcCallback] MRC Entry...
[InstallMrcCallback] Register PeiMasterBootModePpi Notify Status = Success
Register PPI Notify: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Notify: PPI Guid: 7408D748-FC8C-4EE6-9288-C4BEC092A410, Peim notify entry point: FFE483A5
[PrememoryInitCallBack]
[PeimMemoryInit]
Post Code: DD00h
Processor supports TXT
Platform / PCH supports TXT
TigerLake ULT: Stepping B0
Microcode Update: 0x000000AC
System boot mode: 0h - BOOT_WITH_FULL_CONFIGURATION
Restore data of size 0 from 0x0
Global data of size 132013 is at 0xFEF1A134
MiscPeiPreMemConfig->S3DataPtr: 0 check completed, SysBootMode: 0
Calling CpuReplacementCheck
Skip CPU replacement check by policy
ForceFullTraining 0
Cold boot
(MAILBOX) Mailbox Read Command = 341h
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BIOS_CMD_MRC_CONFIG scesfie. MailboxStatus = 0h, MailboxData = 17Ch
TXTPEI: TXT.E2STS=4
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Spd Address for Mc 0 Channel 0 Dimm 0: 0
Spd Address for Mc 0 Channel 0 Dimm 1: 0
Spd Address for Mc 0 Channel 1 Dimm 0: 0
Spd Address for Mc 0 Channel 1 Dimm 1: 0
Spd Address for Mc 0 Channel 2 Dimm 0: 0
Spd Address for Mc 0 Channel 2 Dimm 1: 0
Spd Address for Mc 0 Channel 3 Dimm 0: 0
Spd Address for Mc 0 Channel 3 Dimm 1: 0
Spd Address for Mc 1 Channel 0 Dimm 0: 0
Spd Address for Mc 1 Channel 0 Dimm 1: 0
Spd Address for Mc 1 Channel 1 Dimm 0: 0
Spd Address for Mc 1 Channel 1 Dimm 1: 0
Spd Address for Mc 1 Channel 2 Dimm 0: 0
Spd Address for Mc 1 Channel 2 Dimm 1: 0
Spd Address for Mc 1 Channel 3 Dimm 0: 0
Spd Address for Mc 1 Channel 3 Dimm 1: 0
IMR Configuration start
ME status: 0x80000015
IPU Fused off
BiosImrDisableMask0 = FFFFBBDF
PCIe IMR Size = 0
Heci Get IMR Size Msg
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80100007
00: F0 0C 00 00 DF BB FF FF - FF FF FF FF 00 00 00 00
[HECI1] Got msg Success: 80100007
00: F0 8C 00 00 00 00 0C 02 - 00 00 00 01 00 00 00 00
Heci Get IMR Size Msg successful. Response:
IMR Size = 0x020C0000
Largest IMR Size = 0x01000000
Flags = 0x00000000
POSTCODE=<0000D000> - Heci Get IMR Size Msg
Requested CSE IMR size = 34340864 Bytes
Largest CSE IMR size = 16777216 Bytes
Requested CSE IMR size (rounded up) = 64 MB
Largest CSE IMR size = 16 MB
MRC Start Memory Configuration
@@@@ Inputs->MemoryProfile:0
*********************************************************************
** Copyright (c) 2011- 2020 Intel Corporation. All rights reserved. **
** Tigerlake memory detection and initialization code. **
** Major version number is: 2 **
** Minor version number is: 0 **
** Rev version number is: 2 **
** Build number is: 10 **
*********************************************************************
BootMode == bmCold
SAGV: Disabled, running at point 3
Post Code: DD03h
MRC task -- MRC Early Overrides -- Started.
MRC task MRC Early Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD02h
MRC task -- Safe Mode Override -- Started.
MRC task Safe Mode Override -- SUCCEEDED, Status = 0h.
Post Code: DD1Dh
MRC task -- Print input parameters -- Started.
Debug.Stream: FEF3E99Ch
Debug.Level: 3h
FreqMax: 0
GearRatio: 0
Ratio: 0
RefClk: 133MHz
BClk: 100000000Hz
MemoryProfile: 0
RealtimeMemoryOC: 0
OcSupport: disabled
OverrideDowngradeForMixedMemory: disabled
BoardType: 5
CmdRanksTerminated: 1h
DqPinsInterleaved: 0
SeparateCkeDelayDdr4: 1
CpuModel: 806C0h
CpuStepping: 1h
GraphicsStolenSize: 3Ch
GraphicsGttSize: 8h
Iteration: 0h
VddVoltage: 0 mV
BootMode: 0h
TxtFlag: 0h
SimicsFlag: 0h
MobilePlatform: 1h
EccSupport: 1h
CleanMemory: 0x0
Ibecc: 0h
IbeccOperationMode: 0x2
IbeccParity: 0x1
McParity: 1h
GfxIsVersatileAcceleration: 0h
ScramblerSupport: 0h
LpFreqSwitch: 1h
MemSSFusa: 0h
RemapEnable: 1h
PowerDownMode: 0h
PwdwnIdleCounter: 0h
DisPgCloseIdleTimeout: 0h
RankInterleave: 1h
EnhancedInterleave: 1h
WeaklockEn: 0h
EnCmdRate: 7h
BaseAddresses
PciE: C0000000h
MchBar: FEDC0000h
Smbus: EFA0h
MeStolenSize: 40h
MmioSize: 800h
TsegSize: 8h
DprSize: 0h
PrmrrSize: 0h
TccMemAddress: 40080000h
TccMemSize: 0h
VddSettleWaitTime: 0h
VccIomV: 950
RmtPerTask: 0
TrainTrace: 0
MarginLimitCheck: 0
MarginLimitL2: 100
AutoSelfRefreshSupport: 1
ExtTemperatureSupport: 1
RhPrevention: 0
RhSolution: 0
RhRefreshSolution: 2
RefreshWm: 1h
RefreshPanicWm: 8h
RefreshHpWm: 7h
LctCmdEyeWidth: 96
RetrainOnFastFail: 1
LpDdrDqDqsReTraining (LpDqsOscEn) : 0h
NewFeatureEnable1: 0
NewFeatureEnable2: 0
MrcSafeConfig: 1h
SafeMode: 1h
VddqVoltageOverride(# of 1mV): 0
ChHashOverride: 0h
ChHashEnable: 1h
ChHashMask: 30CCh
ChHashInterleaveBit: 2h
ExtendedBankHashing: 1h
PerBankRefresh: 1h
ProbelessTrace: 0
Force1Dpc: 0
ForceSingleRank: 0
VttCompForVsshi: 1
Lp5CccConfig: 0x0
CmdMirror: 0x0
Ddr4OneDpc: 0
RxMode: 255
PowerTrainingMode: margin optimization
BdatEnable: 0
BdatTestType: 0
Lp5CccConfig: 0h
*************************************
***** MRC TRAINING STEPS *****
*************************************
TrainingSteps: 0x24FC073B TrainingSteps2: 0xC002
TrainingEnables.SOT: 1
TrainingEnables.ERDMPRTC2D: 0
TrainingEnables.ECT: 1
TrainingEnables.PDA: 1
TrainingEnables.RCVET: 1
TrainingEnables.RDMPRT: 1
TrainingEnables.JWRL: 1
TrainingEnables.EWRTC2D: 0
TrainingEnables.ERDTC2D: 0
TrainingEnables.WRTC1D: 1
TrainingEnables.WRVC1D: 1
TrainingEnables.RDTC1D: 1
DDR4MAP: 0
TrainingEnables2.DIMMODTCAT: 0
TrainingEnables.DIMMODTT: 0
TrainingEnables.DIMMRONT: 0
TrainingEnables.WRDSEQT: 0
TrainingEnables.WRDSUDT: 0
TrainingEnables.WRSRT: 0
TrainingEnables.RDODTT: 0
TrainingEnables.RDEQT: 0
TrainingEnables.RDAPT: 0
TrainingEnables.CMDVC: 1
TrainingEnables.WRTC2D: 1
TrainingEnables.RDTC2D: 1
TrainingEnables.WRVC2D: 1
TrainingEnables.RDVC2D: 1
TrainingEnables.LCT: 1
TrainingEnables.RTL: 0
TrainingEnables.TAT: 0
TrainingEnables.RMT: 1
TrainingEnables.MEMTST: 0
TrainingEnables.ALIASCHK: 0
TrainingEnables.RCVENC1D: 1
TrainingEnables.RMC: 0
TrainingEnables2.DCC: 0
TrainingEnables2.RDVC1D: 1
TrainingEnables2.TXTCO: 0
TrainingEnables2.CLKTCO: 0
TrainingEnables2.CMDSR: 0
TrainingEnables2.CMDDSEQ: 0
TrainingEnables2.DIMMODTCA: 0
TrainingEnables2.TXTCODQS: 0
TrainingEnables2.CMDDRUD: 0
TrainingEnables2.VCCDLLBP: 0
TrainingEnables2.PVTTDNLP: 0
TrainingEnables2.RDVREFDC: 0
TrainingEnables2.VDDQT: 0
TrainingEnables2.RMTBIT: 0
TrainingEnables2.WRITE0: 1
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
*************************************
***** MRC TIMING DATA *****
*************************************
Controller[0] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 0/0/0 Status: 0h
Controller, Channel, Dimm 0/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/0/1 Status: 0h
Controller, Channel, Dimm 0/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 0/1/0 Status: 0h
Controller, Channel, Dimm 0/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/1/1 Status: 0h
Controller, Channel, Dimm 0/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 0/2/0 Status: 0h
Controller, Channel, Dimm 0/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/2/1 Status: 0h
Controller, Channel, Dimm 0/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 0/3/0 Status: 0h
Controller, Channel, Dimm 0/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/3/1 Status: 0h
Controller, Channel, Dimm 0/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller[1] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 1/0/0 Status: 0h
Controller, Channel, Dimm 1/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/0/1 Status: 0h
Controller, Channel, Dimm 1/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 1/1/0 Status: 0h
Controller, Channel, Dimm 1/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/1/1 Status: 0h
Controller, Channel, Dimm 1/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 1/2/0 Status: 0h
Controller, Channel, Dimm 1/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/2/1 Status: 0h
Controller, Channel, Dimm 1/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 1/3/0 Status: 0h
Controller, Channel, Dimm 1/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/3/1 Status: 0h
Controller, Channel, Dimm 1/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
*************************************
***** THERMAL OVERWRITE *******
*************************************
ThermalEnables.EnablePwrDn : 1h
ThermalEnables.EnablePwrDnLpddr: 1h
ThermalEnables.Refresh2X : 0h
SrefCfgEna : 1h
SrefCfgIdleTmr : 200h
ThrtCkeMinDefeat: 1h
ThrtCkeMinTmr : 0h
ThrtCkeMinDefeatLpddr: 1h
ThrtCkeMinTmrLpddr : 0h
*************************************
***** DQDQS SWIZZLING *******
*************************************
Mc0.Ch0: 0 1 DqMapCpu2Dram: 0 1 6 7 3 2 5 4 15 8 9 14 12 11 10 13
Mc0.Ch1: 1 0 DqMapCpu2Dram: 11 12 8 15 9 14 10 13 3 4 7 0 6 1 5 2
Mc0.Ch2: 0 1 DqMapCpu2Dram: 4 5 3 2 7 1 0 6 11 10 12 13 8 9 14 15
Mc0.Ch3: 1 0 DqMapCpu2Dram: 12 11 8 13 14 15 9 10 4 7 3 2 1 6 0 5
Mc1.Ch0: 1 0 DqMapCpu2Dram: 11 10 9 8 12 13 15 14 4 5 6 7 3 2 0 1
Mc1.Ch1: 0 1 DqMapCpu2Dram: 0 7 1 6 3 5 2 4 9 8 10 11 14 15 13 12
Mc1.Ch2: 0 1 DqMapCpu2Dram: 4 5 6 1 3 2 7 0 10 13 12 11 14 9 15 8
Mc1.Ch3: 1 0 DqMapCpu2Dram: 10 12 9 15 8 11 13 14 3 4 1 2 6 0 5 7
RcompResistor: 0
RcompTarget[RdOdt]: 0
RcompTarget[WrDS]: 0
RcompTarget[WrDSCmd]: 0
RcompTarget[WrDSCtl]: 0
RcompTarget[WrDSClk]: 0
MRC task Print input parameters -- SUCCEEDED, Status = 0h. Stack Depth: 149824
Post Code: DD20h
MRC task -- SPD PROCESSING -- Started.
SPD Dimm recognition, Controller, Channel, Dimm 0/0/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/1/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/2/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/3/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/0/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/1/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/2/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/3/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
CAPID0_A: F0006410h
CAPID0_B: 90240008h
CAPID0_C: 0661820Ah
CAPID0_E: 001F8000h
DMFC: 4267
Max_Data_Rate_At_GEAR1: 2667
DDR_OVERCLOCK: 0, PLL_REF100_CFG: 1
MrcMcCapabilityPreSpd Inputs->RefClk = 0
MrcMcCapabilityPreSpd Outputs->RefClk = 0
HighGear 1
Gear2Ever 0
Outputs->MemoryClockMax: 750000, Outputs->FreqMax : 2667, Gear1
The maximum memory frequency allowed is 2667, tCK=750000fs
133MHz reference clock is selected
SPD Dimm timing calculation
Timebase (MTB/FTB):
Profile Controller Channel Dimm Value
0 0 0 0 125000 1000
0 0 1 0 125000 1000
0 0 2 0 125000 1000
0 0 3 0 125000 1000
0 1 0 0 125000 1000
0 1 1 0 125000 1000
0 1 2 0 125000 1000
0 1 3 0 125000 1000
1 0 0 0 125000 1000
1 0 1 0 125000 1000
1 0 2 0 125000 1000
1 0 3 0 125000 1000
1 1 0 0 125000 1000
1 1 1 0 125000 1000
1 1 2 0 125000 1000
1 1 3 0 125000 1000
SDRAM Cycle Time (tCKmin):
Profile Controller Channel Dimm Value (fs)
0 0 0 0 750000
0 0 1 0 750000
0 0 2 0 750000
0 0 3 0 750000
0 1 0 0 750000
0 1 1 0 750000
0 1 2 0 750000
0 1 3 0 750000
1 0 0 0 750000
1 0 1 0 750000
1 0 2 0 750000
1 0 3 0 750000
1 1 0 0 750000
1 1 1 0 750000
1 1 2 0 750000
1 1 3 0 750000
Best case value for profiles 0-3: 750000 750000
CAS Latency Time (tAAmin):
Profile Controller Channel Dimm Value tCL Mask
0 0 0 0 24 5592h
0 0 1 0 24 5592h
0 0 2 0 24 5592h
0 0 3 0 24 5592h
0 1 0 0 24 5592h
0 1 1 0 24 5592h
0 1 2 0 24 5592h
0 1 3 0 24 5592h
Profile 0 common set of supported CAS Latency values = 5592h
1 0 0 0 24 5592h
1 0 1 0 24 5592h
1 0 2 0 24 5592h
1 0 3 0 24 5592h
1 1 0 0 24 5592h
1 1 1 0 24 5592h
1 1 2 0 24 5592h
1 1 3 0 24 5592h
Profile 1 common set of supported CAS Latency values = 5592h
Best case value for profiles 0-3: 24 24
Memory clock = 750000fs
Memory Frequency = 2667
CAS Write Latency (tCWLmin):
Profile Controller Channel Dimm Value
0 0 0 0 23
0 0 1 0 23
0 0 2 0 23
0 0 3 0 23
0 1 0 0 23
0 1 1 0 23
0 1 2 0 23
0 1 3 0 23
1 0 0 0 23
1 0 1 0 23
1 0 2 0 23
1 0 3 0 23
1 1 0 0 23
1 1 1 0 23
1 1 2 0 23
1 1 3 0 23
Best case value for profiles 0-3: 23 23
Active to precharge delay time (tRASmin):
Profile Controller Channel Dimm Value
0 0 0 0 56
0 0 1 0 56
0 0 2 0 56
0 0 3 0 56
0 1 0 0 56
0 1 1 0 56
0 1 2 0 56
0 1 3 0 56
1 0 0 0 56
1 0 1 0 56
1 0 2 0 56
1 0 3 0 56
1 1 0 0 56
1 1 1 0 56
1 1 2 0 56
1 1 3 0 56
Best case value for profiles 0-3: 56 56
RAS# to CAS# delay time (tRCDmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Active to active/refresh delay time (tRCmin):
Profile Controller Channel Dimm Value
0 0 0 0 80
0 0 1 0 80
0 0 2 0 80
0 0 3 0 80
0 1 0 0 80
0 1 1 0 80
0 1 2 0 80
0 1 3 0 80
1 0 0 0 80
1 0 1 0 80
1 0 2 0 80
1 0 3 0 80
1 1 0 0 80
1 1 1 0 80
1 1 2 0 80
1 1 3 0 80
Best case value for profiles 0-3: 80 80
Average Periodic Refresh Interval (tREFImin):
Profile Controller Channel Dimm Value
0 0 0 0 5206
0 0 1 0 5206
0 0 2 0 5206
0 0 3 0 5206
0 1 0 0 5206
0 1 1 0 5206
0 1 2 0 5206
0 1 3 0 5206
1 0 0 0 5206
1 0 1 0 5206
1 0 2 0 5206
1 0 3 0 5206
1 1 0 0 5206
1 1 1 0 5206
1 1 2 0 5206
1 1 3 0 5206
Best case value for profiles 0-3: 5206 5206
Refresh recovery delay time (tRFCmin):
Profile Controller Channel Dimm Value
0 0 0 0 280
0 0 1 0 280
0 0 2 0 280
0 0 3 0 280
0 1 0 0 280
0 1 1 0 280
0 1 2 0 280
0 1 3 0 280
1 0 0 0 280
1 0 1 0 280
1 0 2 0 280
1 0 3 0 280
1 1 0 0 280
1 1 1 0 280
1 1 2 0 280
1 1 3 0 280
Best case value for profiles 0-3: 280 280
Per Bank refresh recovery delay time (tRFCpb):
Profile Controller Channel Dimm Value
0 0 0 0 120
0 0 1 0 120
0 0 2 0 120
0 0 3 0 120
0 1 0 0 120
0 1 1 0 120
0 1 2 0 120
0 1 3 0 120
1 0 0 0 120
1 0 1 0 120
1 0 2 0 120
1 0 3 0 120
1 1 0 0 120
1 1 1 0 120
1 1 2 0 120
1 1 3 0 120
Best case value for profiles 0-3: 120 120
Row precharge delay time (tRPmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Row precharge delay time for all banks (tRPab):
Profile Controller Channel Dimm Value
0 0 0 0 28
Best case value for profiles 0-3: 28 28
Active to active/refresh delay time (tFAWmin):
Profile Controller Channel Dimm Value
0 0 0 0 54
0 0 1 0 54
0 0 2 0 54
0 0 3 0 54
0 1 0 0 54
0 1 1 0 54
0 1 2 0 54
0 1 3 0 54
1 0 0 0 54
1 0 1 0 54
1 0 2 0 54
1 0 3 0 54
1 1 0 0 54
1 1 1 0 54
1 1 2 0 54
1 1 3 0 54
Best case value for profiles 0-3: 54 54
Row active to row active delay time (tRRDmin):
Profile Controller Channel Dimm Value
0 0 0 0 14
0 0 1 0 14
0 0 2 0 14
0 0 3 0 14
0 1 0 0 14
0 1 1 0 14
0 1 2 0 14
0 1 3 0 14
1 0 0 0 14
1 0 1 0 14
1 0 2 0 14
1 0 3 0 14
1 1 0 0 14
1 1 1 0 14
1 1 2 0 14
1 1 3 0 14
Best case value for profiles 0-3: 14 14
Internal read to precharge delay time (tRTPmin):
Profile Controller Channel Dimm Value
0 0 0 0 10
0 0 1 0 10
0 0 2 0 10
0 0 3 0 10
0 1 0 0 10
0 1 1 0 10
0 1 2 0 10
0 1 3 0 10
1 0 0 0 10
1 0 1 0 10
1 0 2 0 10
1 0 3 0 10
1 1 0 0 10
1 1 1 0 10
1 1 2 0 10
1 1 3 0 10
Best case value for profiles 0-3: 10 10
Write recovery time (tWRmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Internal write to read command delay time (tWTRmin):
Profile Controller Channel Dimm Value
0 0 0 0 14
0 0 1 0 14
0 0 2 0 14
0 0 3 0 14
0 1 0 0 14
0 1 1 0 14
0 1 2 0 14
0 1 3 0 14
1 0 0 0 14
1 0 1 0 14
1 0 2 0 14
1 0 3 0 14
1 1 0 0 14
1 1 1 0 14
1 1 2 0 14
1 1 3 0 14
Best case value for profiles 0-3: 14 14
Refresh recovery delay time (tRFC2min):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Refresh recovery delay time (tRFC4min):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Row active to row active delay time (tRRD_Lmin):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Row active to row active delay time (tRRD_Smin):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Internal write to read command delay time (tWTR_L):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Internal write to read command delay time (tWTR_S):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
CAS to CAS delay for same bank group (tCCD_L):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Command rate mode (Nmode):
Profile Controller Channel Dimm Value
0 0 0 0 1
0 0 1 0 1
0 0 2 0 1
0 0 3 0 1
0 1 0 0 1
0 1 1 0 1
0 1 2 0 1
0 1 3 0 1
1 0 0 0 1
1 0 1 0 1
1 0 2 0 1
1 0 3 0 1
1 1 0 0 1
1 1 1 0 1
1 1 2 0 1
1 1 3 0 1
Best case value for profiles 0-3: 1 1
Module voltage VDD (mVolts):
Profile Controller Channel Dimm Value
0 0 0 0 1100
0 0 1 0 1100
0 0 2 0 1100
0 0 3 0 1100
0 1 0 0 1100
0 1 1 0 1100
0 1 2 0 1100
0 1 3 0 1100
1 0 0 0 1100
1 0 1 0 1100
1 0 2 0 1100
1 0 3 0 1100
1 1 0 0 1100
1 1 1 0 1100
1 1 2 0 1100
1 1 3 0 1100
Best case value for profiles 0-3: 1100 1100
MRC task SPD PROCESSING -- SUCCEEDED, Status = 0h. Stack Depth: 149940
Post Code: DD21h
MRC task -- MRC Auto Updates and Overrides -- Started.
LPDDR Low Frequency: 1067
RxMode: Unmatched w/ Rload DQS
LowFrequency: 1067
Updating Rcomp Resistors: 100
Updating Rcomp Targets:
RcompTarget[RdOdt]: 80
RcompTarget[WrDS]: 40
RcompTarget[WrDSCmd]: 40
RcompTarget[WrDSCtl]: 40
RcompTarget[WrDSClk]: 30
DDRIO ODT Mode: Vss
MRC task MRC Auto Updates and Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD22h
MRC task -- MC Capabilities -- Started.
Memory allocated for IGD = 60MB and for GTT = 8MB.
Maximum size of memory allowed on a channel = 65536MB.
Number of channels supported = 4
Number of DIMMs per channel supported = 1
Controller, Channel, Dimm 0/0/0 NMode = 1
Controller, Channel, Dimm 0/1/0 NMode = 1
Controller, Channel, Dimm 0/2/0 NMode = 1
Controller, Channel, Dimm 0/3/0 NMode = 1
Controller, Channel, Dimm 1/0/0 NMode = 1
Controller, Channel, Dimm 1/1/0 NMode = 1
Controller, Channel, Dimm 1/2/0 NMode = 1
Controller, Channel, Dimm 1/3/0 NMode = 1
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
MRC task MC Capabilities -- SUCCEEDED, Status = 0h.
Post Code: DD11h
MRC task -- MC Frequency Lock -- Started.
(MAILBOX) Mailbox Read Command = 33Fh
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BCLK_CONFIG_GET_SSC_CONTROL_SUBCOMMAND success. MailboxStatus = 0h
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
W GsmIocScramLpMode: 1
MRC task MC Frequency Lock -- SUCCEEDED, Status = 0h. Stack Depth: 150088
Post Code: DD15h
MRC task -- Memory SubSystem Config -- Started.
W .B0 GsmCmiLsbMaskBit: 8336 (0x2090)
W .B0 GsmCmiHashMode: 2
Controller HASH Enabled
W .B0 EndOfCmiMarker: 0
W .B0 EndOfCmiMarker: 0
Interleaved Memory between controllers 32768 Megabytes
Updating the registers for CMF0
W .B0 GsmCmiStackedMode: 1
W .B0 GsmCmiStackMsMap: 0
W .B0 GsmCmiLMadSliceMap: 0
W .B0 GsmCmiSliceDisable: 0
W .B0 GsmCmiStackedMsHash: 32 (0x20)
W .B0 GsmCmiSMadSliceSize: 0
MRC task Memory SubSystem Config -- SUCCEEDED, Status = 0h. Stack Depth: 150416
Post Code: DD09h
MRC task -- DDRIO Config - Pre DCC -- Started.
W GsmIocScramDdr4Mode: 1
W GsmIocScramLp5Mode: 1
W GsmIocDisIosfSbClkGate: 0
MRC task DDRIO Config - Pre DCC -- SUCCEEDED, Status = 0h.
Post Code: DD23h
MRC task -- MC Config -- Started.
Timing Config
W Mc0.C0 GsmMctRP: 24 (0x18)
W Mc0.C0 GsmMctRPabExt: 24 (0x18)
W Mc0.C0 GsmMctRAS: 4
W Mc0.C0 GsmMctRDPRE: 56 (0x38)
W Mc0.C0 GsmMctPPD: 18 (0x12)
W Mc0.C0 GsmMctFAW: 63 (0x3F)
W Mc0.C0 GsmMctRRDsg: 54 (0x36)
W Mc0.C0 GsmMctRRDdg: 14 (0xE)
W Mc0.C0 GsmMctREFSbRd: 14 (0xE)
W Mc0.C0 GsmMctRDRDsg: 3
W Mc0.C0 GsmMctOdtRdDelay: 0
W Mc0.C0 GsmMctOdtWrDuration: 0
W Mc0.C0 GsmMctOdtWrDelay: 0
W Mc0.C0 GsmMctWrEarlyOdt: 0
W Mc0.C0 GsmMctCL: 0
W Mc0.C0 GsmMctCWL: 24 (0x18)
W Mc0.C0 GsmMctAONPD: 22 (0x16)
W Mc0.C0 GsmMctCWLAdd: 0
W Mc0.C0 GsmMctWRPRE: 4
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdd: 33 (0x21)
W Mc0.C0 GsmMctRDWRsg: 34 (0x22)
W Mc0.C0 GsmMctRDWRdg: 41 (0x29)
W Mc0.C0 GsmMctRDWRdr: 41 (0x29)
W Mc0.C0 GsmMctRDWRdd: 41 (0x29)
W Mc0.C0 GsmMctWRRDsg: 42 (0x2A)
W Mc0.C0 GsmMctWRRDdg: 64 (0x40)
W Mc0.C0 GsmMctWRRDdr: 64 (0x40)
W Mc0.C0 GsmMctWRRDdd: 32 (0x20)
W Mc0.C0 GsmMctWRWRsg: 32 (0x20)
W Mc0.C0 GsmMctWRWRdg: 26 (0x1A)
W Mc0.C0 GsmMctWRWRdr: 26 (0x1A)
W Mc0.C0 GsmMctWRWRdd: 35 (0x23)
W Mc0.C0 GsmMctCKE: 35 (0x23)
W Mc0.C0 GsmMctXP: 10 (0xA)
W Mc0.C0 GsmMctXPDLL: 10 (0xA)
W Mc0.C0 GsmMctRDPDEN: 5
W Mc0.C0 GsmMctWRPDEN: 46 (0x2E)
W Mc0.C0 GsmMctCA2CS: 66 (0x42)
W Mc0.C0 GsmMctPRPDEN: 10 (0xA)
W Mc0.C1 GsmMctRP: 24 (0x18)
W Mc0.C1 GsmMctRPabExt: 24 (0x18)
W Mc0.C1 GsmMctRAS: 4
W Mc0.C1 GsmMctRDPRE: 56 (0x38)
W Mc0.C1 GsmMctPPD: 18 (0x12)
W Mc0.C1 GsmMctFAW: 63 (0x3F)
W Mc0.C1 GsmMctRRDsg: 54 (0x36)
W Mc0.C1 GsmMctRRDdg: 14 (0xE)
W Mc0.C1 GsmMctREFSbRd: 14 (0xE)
W Mc0.C1 GsmMctRDRDsg: 3
W Mc0.C1 GsmMctOdtRdDelay: 0
W Mc0.C1 GsmMctOdtWrDuration: 0
W Mc0.C1 GsmMctOdtWrDelay: 0
W Mc0.C1 GsmMctWrEarlyOdt: 0
W Mc0.C1 GsmMctCL: 0
W Mc0.C1 GsmMctCWL: 24 (0x18)
W Mc0.C1 GsmMctAONPD: 22 (0x16)
W Mc0.C1 GsmMctCWLAdd: 0
W Mc0.C1 GsmMctWRPRE: 4
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdd: 33 (0x21)
W Mc0.C1 GsmMctRDWRsg: 34 (0x22)
W Mc0.C1 GsmMctRDWRdg: 41 (0x29)
W Mc0.C1 GsmMctRDWRdr: 41 (0x29)
W Mc0.C1 GsmMctRDWRdd: 41 (0x29)
W Mc0.C1 GsmMctWRRDsg: 42 (0x2A)
W Mc0.C1 GsmMctWRRDdg: 64 (0x40)
W Mc0.C1 GsmMctWRRDdr: 64 (0x40)
W Mc0.C1 GsmMctWRRDdd: 32 (0x20)
W Mc0.C1 GsmMctWRWRsg: 32 (0x20)
W Mc0.C1 GsmMctWRWRdg: 26 (0x1A)
W Mc0.C1 GsmMctWRWRdr: 26 (0x1A)
W Mc0.C1 GsmMctWRWRdd: 35 (0x23)
W Mc0.C1 GsmMctCKE: 35 (0x23)
W Mc0.C1 GsmMctXP: 10 (0xA)
W Mc0.C1 GsmMctXPDLL: 10 (0xA)
W Mc0.C1 GsmMctRDPDEN: 5
W Mc0.C1 GsmMctWRPDEN: 46 (0x2E)
W Mc0.C1 GsmMctCA2CS: 66 (0x42)
W Mc0.C1 GsmMctPRPDEN: 10 (0xA)
W Mc1.C0 GsmMctRP: 24 (0x18)
W Mc1.C0 GsmMctRPabExt: 24 (0x18)
W Mc1.C0 GsmMctRAS: 4
W Mc1.C0 GsmMctRDPRE: 56 (0x38)
W Mc1.C0 GsmMctPPD: 18 (0x12)
W Mc1.C0 GsmMctFAW: 63 (0x3F)
W Mc1.C0 GsmMctRRDsg: 54 (0x36)
W Mc1.C0 GsmMctRRDdg: 14 (0xE)
W Mc1.C0 GsmMctREFSbRd: 14 (0xE)
W Mc1.C0 GsmMctRDRDsg: 3
W Mc1.C0 GsmMctOdtRdDelay: 0
W Mc1.C0 GsmMctOdtWrDuration: 0
W Mc1.C0 GsmMctOdtWrDelay: 0
W Mc1.C0 GsmMctWrEarlyOdt: 0
W Mc1.C0 GsmMctCL: 0
W Mc1.C0 GsmMctCWL: 24 (0x18)
W Mc1.C0 GsmMctAONPD: 22 (0x16)
W Mc1.C0 GsmMctCWLAdd: 0
W Mc1.C0 GsmMctWRPRE: 4
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdd: 33 (0x21)
W Mc1.C0 GsmMctRDWRsg: 34 (0x22)
W Mc1.C0 GsmMctRDWRdg: 41 (0x29)
W Mc1.C0 GsmMctRDWRdr: 41 (0x29)
W Mc1.C0 GsmMctRDWRdd: 41 (0x29)
W Mc1.C0 GsmMctWRRDsg: 42 (0x2A)
W Mc1.C0 GsmMctWRRDdg: 64 (0x40)
W Mc1.C0 GsmMctWRRDdr: 64 (0x40)
W Mc1.C0 GsmMctWRRDdd: 32 (0x20)
W Mc1.C0 GsmMctWRWRsg: 32 (0x20)
W Mc1.C0 GsmMctWRWRdg: 26 (0x1A)
W Mc1.C0 GsmMctWRWRdr: 26 (0x1A)
W Mc1.C0 GsmMctWRWRdd: 35 (0x23)
W Mc1.C0 GsmMctCKE: 35 (0x23)
W Mc1.C0 GsmMctXP: 10 (0xA)
W Mc1.C0 GsmMctXPDLL: 10 (0xA)
W Mc1.C0 GsmMctRDPDEN: 5
W Mc1.C0 GsmMctWRPDEN: 46 (0x2E)
W Mc1.C0 GsmMctCA2CS: 66 (0x42)
W Mc1.C0 GsmMctPRPDEN: 10 (0xA)
W Mc1.C1 GsmMctRP: 24 (0x18)
W Mc1.C1 GsmMctRPabExt: 24 (0x18)
W Mc1.C1 GsmMctRAS: 4
W Mc1.C1 GsmMctRDPRE: 56 (0x38)
W Mc1.C1 GsmMctPPD: 18 (0x12)
W Mc1.C1 GsmMctFAW: 63 (0x3F)
W Mc1.C1 GsmMctRRDsg: 54 (0x36)
W Mc1.C1 GsmMctRRDdg: 14 (0xE)
W Mc1.C1 GsmMctREFSbRd: 14 (0xE)
W Mc1.C1 GsmMctRDRDsg: 3
W Mc1.C1 GsmMctOdtRdDelay: 0
W Mc1.C1 GsmMctOdtWrDuration: 0
W Mc1.C1 GsmMctOdtWrDelay: 0
W Mc1.C1 GsmMctWrEarlyOdt: 0
W Mc1.C1 GsmMctCL: 0
W Mc1.C1 GsmMctCWL: 24 (0x18)
W Mc1.C1 GsmMctAONPD: 22 (0x16)
W Mc1.C1 GsmMctCWLAdd: 0
W Mc1.C1 GsmMctWRPRE: 4
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdd: 33 (0x21)
W Mc1.C1 GsmMctRDWRsg: 34 (0x22)
W Mc1.C1 GsmMctRDWRdg: 41 (0x29)
W Mc1.C1 GsmMctRDWRdr: 41 (0x29)
W Mc1.C1 GsmMctRDWRdd: 41 (0x29)
W Mc1.C1 GsmMctWRRDsg: 42 (0x2A)
W Mc1.C1 GsmMctWRRDdg: 64 (0x40)
W Mc1.C1 GsmMctWRRDdr: 64 (0x40)
W Mc1.C1 GsmMctWRRDdd: 32 (0x20)
W Mc1.C1 GsmMctWRWRsg: 32 (0x20)
W Mc1.C1 GsmMctWRWRdg: 26 (0x1A)
W Mc1.C1 GsmMctWRWRdr: 26 (0x1A)
W Mc1.C1 GsmMctWRWRdd: 35 (0x23)
W Mc1.C1 GsmMctCKE: 35 (0x23)
W Mc1.C1 GsmMctXP: 10 (0xA)
W Mc1.C1 GsmMctXPDLL: 10 (0xA)
W Mc1.C1 GsmMctRDPDEN: 5
W Mc1.C1 GsmMctWRPDEN: 46 (0x2E)
W Mc1.C1 GsmMctCA2CS: 66 (0x42)
W Mc1.C1 GsmMctPRPDEN: 10 (0xA)
Refresh Config
W Mc0.C0 GsmMctSRXRefDebits: 45 (0x2D)
W Mc0.C0 GsmMctRefreshHpWm: 64 (0x40)
W Mc0.C0 GsmMctRFC: 5206 (0x1456)
W Mc0.C0 GsmMctOrefRi: 280 (0x118)
W Mc0.C0 GsmMctRefreshPanicWm: 7
W Mc0.C0 GsmMctREFIx9: 8
W Mc0.C0 GsmMccPbrIssueNop: 1
W Mc0.C0 GsmMccOdtOverride: 0
W Mc0.C0 EndOfMctMarker: 120 (0x78)
W Mc0.C0 GsmMctXSR: 290 (0x122)
W Mc0.C0 GsmMctSrIdle: 19 (0x13)
W Mc0.C0 GsmMctMOD: 0
W Mc0.C0 GsmMctSR: 290 (0x122)
W Mc0.C0 GsmMctCPDED: 1334 (0x536)
W Mc0.C0 GsmMctZQCAL: 40 (0x28)
W Mc0.C0 GsmMctZQCS: 256 (0x100)
W Mc0.C0 GsmMccTRefiPulseStaggerDis: 1
W Mc0.C1 GsmMctSRXRefDebits: 45 (0x2D)
W Mc0.C1 GsmMctRefreshHpWm: 64 (0x40)
W Mc0.C1 GsmMctRFC: 5206 (0x1456)
W Mc0.C1 GsmMctOrefRi: 280 (0x118)
W Mc0.C1 GsmMctRefreshPanicWm: 7
W Mc0.C1 GsmMctREFIx9: 8
W Mc0.C1 GsmMccPbrIssueNop: 1
W Mc0.C1 GsmMccOdtOverride: 0
W Mc0.C1 EndOfMctMarker: 120 (0x78)
W Mc0.C1 GsmMctXSR: 290 (0x122)
W Mc0.C1 GsmMctSrIdle: 19 (0x13)
W Mc0.C1 GsmMctMOD: 0
W Mc0.C1 GsmMctSR: 290 (0x122)
W Mc0.C1 GsmMctCPDED: 1334 (0x536)
W Mc0.C1 GsmMctZQCAL: 40 (0x28)
W Mc0.C1 GsmMctZQCS: 256 (0x100)
W Mc0.C1 GsmMccTRefiPulseStaggerDis: 1
W Mc1.C0 GsmMctSRXRefDebits: 45 (0x2D)
W Mc1.C0 GsmMctRefreshHpWm: 64 (0x40)
W Mc1.C0 GsmMctRFC: 5206 (0x1456)
W Mc1.C0 GsmMctOrefRi: 280 (0x118)
W Mc1.C0 GsmMctRefreshPanicWm: 7
W Mc1.C0 GsmMctREFIx9: 8
W Mc1.C0 GsmMccPbrIssueNop: 1
W Mc1.C0 GsmMccOdtOverride: 0
W Mc1.C0 EndOfMctMarker: 120 (0x78)
W Mc1.C0 GsmMctXSR: 290 (0x122)
W Mc1.C0 GsmMctSrIdle: 19 (0x13)
W Mc1.C0 GsmMctMOD: 0
W Mc1.C0 GsmMctSR: 290 (0x122)
W Mc1.C0 GsmMctCPDED: 1334 (0x536)
W Mc1.C0 GsmMctZQCAL: 40 (0x28)
W Mc1.C0 GsmMctZQCS: 256 (0x100)
W Mc1.C0 GsmMccTRefiPulseStaggerDis: 1
W Mc1.C1 GsmMctSRXRefDebits: 45 (0x2D)
W Mc1.C1 GsmMctRefreshHpWm: 64 (0x40)
W Mc1.C1 GsmMctRFC: 5206 (0x1456)
W Mc1.C1 GsmMctOrefRi: 280 (0x118)
W Mc1.C1 GsmMctRefreshPanicWm: 7
W Mc1.C1 GsmMctREFIx9: 8
W Mc1.C1 GsmMccPbrIssueNop: 1
W Mc1.C1 GsmMccOdtOverride: 0
W Mc1.C1 EndOfMctMarker: 120 (0x78)
W Mc1.C1 GsmMctXSR: 290 (0x122)
W Mc1.C1 GsmMctSrIdle: 19 (0x13)
W Mc1.C1 GsmMctMOD: 0
W Mc1.C1 GsmMctSR: 290 (0x122)
W Mc1.C1 GsmMctCPDED: 1334 (0x536)
W Mc1.C1 GsmMctZQCAL: 40 (0x28)
W Mc1.C1 GsmMctZQCS: 256 (0x100)
W Mc1.C1 GsmMccTRefiPulseStaggerDis: 1
Scheduler parameters
SCHED_CBIT = 80001000h
SCHED_SECOND_CBIT = 0E000200h
SC_PCIT = 00000040h
W Mc0.C0 GsmMccCmdTriStateDis: 0
W Mc0.C0 GsmMccGear2: 0
W Mc0.C0 GsmMccDdr4OneDpc: 0
W Mc0.C0 GsmMccAddrMirror: 1
W Mc0.C0 GsmMccCmdStretch: 3
W Mc0.C0 GsmMccCmdGapRatio: 0
W Mc0.C0 GsmMccCmdTriStateDisTrain: 1
W Mc0.C0 GsmMccEnableOdtMatrix: 3
W Mc0.C0 GsmMctCAL: 1
W Mc0.C0 GsmMctCSCKEH: 7
W Mc0.C0 GsmMctRFCpb: 7
W Mc0.C0 GsmMccLpddrPasrRowMsb: 2
W Mc0.C0 EndOfMccMarker: 2
W Mc0.C1 GsmMccCmdTriStateDis: 0
W Mc0.C1 GsmMccGear2: 0
W Mc0.C1 GsmMccDdr4OneDpc: 0
W Mc0.C1 GsmMccAddrMirror: 1
W Mc0.C1 GsmMccCmdStretch: 3
W Mc0.C1 GsmMccCmdGapRatio: 0
W Mc0.C1 GsmMccCmdTriStateDisTrain: 1
W Mc0.C1 GsmMccEnableOdtMatrix: 3
W Mc0.C1 GsmMctCAL: 1
W Mc0.C1 GsmMctCSCKEH: 7
W Mc0.C1 GsmMctRFCpb: 7
W Mc0.C1 GsmMccLpddrPasrRowMsb: 2
W Mc0.C1 EndOfMccMarker: 2
SCHED_CBIT = 80001000h
SCHED_SECOND_CBIT = 0E000200h
SC_PCIT = 00000040h
W Mc1.C0 GsmMccCmdTriStateDis: 0
W Mc1.C0 GsmMccGear2: 0
W Mc1.C0 GsmMccDdr4OneDpc: 0
W Mc1.C0 GsmMccAddrMirror: 1
W Mc1.C0 GsmMccCmdStretch: 3
W Mc1.C0 GsmMccCmdGapRatio: 0
W Mc1.C0 GsmMccCmdTriStateDisTrain: 1
W Mc1.C0 GsmMccEnableOdtMatrix: 3
W Mc1.C0 GsmMctCAL: 1
W Mc1.C0 GsmMctCSCKEH: 7
W Mc1.C0 GsmMctRFCpb: 7
W Mc1.C0 GsmMccLpddrPasrRowMsb: 2
W Mc1.C0 EndOfMccMarker: 2
W Mc1.C1 GsmMccCmdTriStateDis: 0
W Mc1.C1 GsmMccGear2: 0
W Mc1.C1 GsmMccDdr4OneDpc: 0
W Mc1.C1 GsmMccAddrMirror: 1
W Mc1.C1 GsmMccCmdStretch: 3
W Mc1.C1 GsmMccCmdGapRatio: 0
W Mc1.C1 GsmMccCmdTriStateDisTrain: 1
W Mc1.C1 GsmMccEnableOdtMatrix: 3
W Mc1.C1 GsmMctCAL: 1
W Mc1.C1 GsmMctCSCKEH: 7
W Mc1.C1 GsmMctRFCpb: 7
W Mc1.C1 GsmMccLpddrPasrRowMsb: 2
W Mc1.C1 EndOfMccMarker: 2
Address Decoding Config
Channel HASH Auto Enabled - Default to DramType:3
W Mc0 GsmMccHashMode: 2
W Mc0 GsmMccLsbMaskBit: 2096 (0x830)
W Mc0 GsmMccDisableCkTristate: 1
W Mc0 GsmMccStackedMode: 3
W Mc0 GsmMccHalfCachelineMode: 0
W Mc0 GsmMccStackedChHash: 16 (0x10)
W Mc0 GsmMccSChannelSize: 0
W Mc0.C0 GsmMccLDimmDramWidth: 8
W Mc0.C0 GsmMccSDimmSize: 1
W Mc0.C0 GsmMccSDimmDramWidth: 8
W Mc0.C0 GsmMccSDdr58GbDevice: 1
W Mc0.C0 GsmMccLDimmRankCnt: 1
W Mc0.C0 GsmMccSDimmRankCnt: 1
W Mc0.C0 GsmMccRankInterleave: 0
W Mc0.C0 GsmMccEccMode: 1
W Mc0.C0 GsmMccAddrDecodeDdrType: 0
W Mc0.C1 GsmMccLDimmDramWidth: 8
W Mc0.C1 GsmMccSDimmSize: 1
W Mc0.C1 GsmMccSDimmDramWidth: 8
W Mc0.C1 GsmMccSDdr58GbDevice: 1
W Mc0.C1 GsmMccLDimmRankCnt: 1
W Mc0.C1 GsmMccSDimmRankCnt: 1
W Mc0.C1 GsmMccRankInterleave: 0
W Mc0.C1 GsmMccEccMode: 1
W Mc0.C1 GsmMccAddrDecodeDdrType: 0
Channel HASH Auto Enabled - Default to DramType:3
W Mc1 GsmMccHashMode: 2
W Mc1 GsmMccLsbMaskBit: 2096 (0x830)
W Mc1 GsmMccDisableCkTristate: 1
W Mc1 GsmMccStackedMode: 3
W Mc1 GsmMccHalfCachelineMode: 0
W Mc1 GsmMccStackedChHash: 16 (0x10)
W Mc1 GsmMccSChannelSize: 0
W Mc1.C0 GsmMccLDimmDramWidth: 8
W Mc1.C0 GsmMccSDimmSize: 1
W Mc1.C0 GsmMccSDimmDramWidth: 8
W Mc1.C0 GsmMccSDdr58GbDevice: 1
W Mc1.C0 GsmMccLDimmRankCnt: 1
W Mc1.C0 GsmMccSDimmRankCnt: 1
W Mc1.C0 GsmMccRankInterleave: 0
W Mc1.C0 GsmMccEccMode: 1
W Mc1.C0 GsmMccAddrDecodeDdrType: 0
W Mc1.C1 GsmMccLDimmDramWidth: 8
W Mc1.C1 GsmMccSDimmSize: 1
W Mc1.C1 GsmMccSDimmDramWidth: 8
W Mc1.C1 GsmMccSDdr58GbDevice: 1
W Mc1.C1 GsmMccLDimmRankCnt: 1
W Mc1.C1 GsmMccSDimmRankCnt: 1
W Mc1.C1 GsmMccRankInterleave: 0
W Mc1.C1 GsmMccEccMode: 1
W Mc1.C1 GsmMccAddrDecodeDdrType: 0
Maintenance Configuration
W Mc0.C0 GsmMccMcSrx: 15 (0xF)
W Mc0.C1 GsmMccMcSrx: 15 (0xF)
W Mc1.C0 GsmMccMcSrx: 15 (0xF)
W Mc1.C1 GsmMccMcSrx: 15 (0xF)
MCHTrace = 0x0
SCHTrace = 0x0
ECC_EN = 0x0
DDRPL_Activate = 0x0
MCHTrace = 0x0
SCHTrace = 0x0
ECC_EN = 0x0
DDRPL_Activate = 0x0
MRC task MC Config -- SUCCEEDED, Status = 0h.
Post Code: DD12h
MRC task -- DDRIO Config - Post DCC -- Started.
Mc0.C0: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C1: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C2: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C3: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0: ValidChBitMask=0xF
Mc1.C0: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C1: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C2: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C3: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1: ValidChBitMask=0xF
ValidMcBitMask=0x3, Overall ValidChBitMask=0xFF
DdrCrVsshiControl: 0xF28014
Init Dimm Vref CRs
SdramCount: 0x2
Condition didnt meet any of the allowed Sleepcycles values, default SleepCycles = 4
DDRMISCCONTROL2 = 0xFE642130
MiscControl7.Cas2FSWCK = 126
New ODT Mode: Vss Original ODT Mode: Vss
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
Init Data CRs
W Mc0.C0 RoundTripIoComp: 18 (0x12)
W Mc0.C0 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C0 RxDqDataValidQclkDelay: 7
W Mc0.C0 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C0.R0 RxIoTclDelay: 0
W Mc0.C0.R1 RxIoTclDelay: 0
W Mc0.C0.R0 RxFifoRdEnTclDelay: 7
W Mc0.C0.R1 RxFifoRdEnTclDelay: 7
W Mc0.C0.R0 RoundTripDelay: 83 (0x53)
W Mc0.C0.R1 RoundTripDelay: 83 (0x53)
W Mc0.C1 RoundTripIoComp: 18 (0x12)
W Mc0.C1 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C1 RxDqDataValidQclkDelay: 7
W Mc0.C1 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C1.R0 RxIoTclDelay: 0
W Mc0.C1.R1 RxIoTclDelay: 0
W Mc0.C1.R0 RxFifoRdEnTclDelay: 7
W Mc0.C1.R1 RxFifoRdEnTclDelay: 7
W Mc0.C1.R0 RoundTripDelay: 83 (0x53)
W Mc0.C1.R1 RoundTripDelay: 83 (0x53)
W Mc0.C2 RoundTripIoComp: 18 (0x12)
W Mc0.C2 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C2 RxDqDataValidQclkDelay: 7
W Mc0.C2 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C2.R0 RxIoTclDelay: 0
W Mc0.C2.R1 RxIoTclDelay: 0
W Mc0.C2.R0 RxFifoRdEnTclDelay: 7
W Mc0.C2.R1 RxFifoRdEnTclDelay: 7
W Mc0.C2.R0 RoundTripDelay: 83 (0x53)
W Mc0.C2.R1 RoundTripDelay: 83 (0x53)
W Mc0.C3 RoundTripIoComp: 18 (0x12)
W Mc0.C3 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C3 RxDqDataValidQclkDelay: 7
W Mc0.C3 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C3.R0 RxIoTclDelay: 0
W Mc0.C3.R1 RxIoTclDelay: 0
W Mc0.C3.R0 RxFifoRdEnTclDelay: 7
W Mc0.C3.R1 RxFifoRdEnTclDelay: 7
W Mc0.C3.R0 RoundTripDelay: 83 (0x53)
W Mc0.C3.R1 RoundTripDelay: 83 (0x53)
W Mc1.C4 RoundTripIoComp: 16 (0x10)
W Mc1.C4 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C4 RxDqDataValidQclkDelay: 7
W Mc1.C4 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C4.R0 RxIoTclDelay: 0
W Mc1.C4.R1 RxIoTclDelay: 0
W Mc1.C4.R0 RxFifoRdEnTclDelay: 7
W Mc1.C4.R1 RxFifoRdEnTclDelay: 7
W Mc1.C0.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C0.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C5 RoundTripIoComp: 16 (0x10)
W Mc1.C5 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C5 RxDqDataValidQclkDelay: 7
W Mc1.C5 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C5.R0 RxIoTclDelay: 0
W Mc1.C5.R1 RxIoTclDelay: 0
W Mc1.C5.R0 RxFifoRdEnTclDelay: 7
W Mc1.C5.R1 RxFifoRdEnTclDelay: 7
W Mc1.C1.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C1.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C6 RoundTripIoComp: 16 (0x10)
W Mc1.C6 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C6 RxDqDataValidQclkDelay: 7
W Mc1.C6 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C6.R0 RxIoTclDelay: 0
W Mc1.C6.R1 RxIoTclDelay: 0
W Mc1.C6.R0 RxFifoRdEnTclDelay: 7
W Mc1.C6.R1 RxFifoRdEnTclDelay: 7
W Mc1.C2.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C2.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C7 RoundTripIoComp: 16 (0x10)
W Mc1.C7 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C7 RxDqDataValidQclkDelay: 7
W Mc1.C7 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C7.R0 RxIoTclDelay: 0
W Mc1.C7.R1 RxIoTclDelay: 0
W Mc1.C7.R0 RxFifoRdEnTclDelay: 7
W Mc1.C7.R1 RxFifoRdEnTclDelay: 7
W Mc1.C3.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C3.R1 RoundTripDelay: 75 (0x4B)
Mc0 C0 Dec_tCWL: 2
W Mc0.C0 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C0 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C0 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C0 GsmIocInternalClocksOn: 0
W Mc0.C0 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C0 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C0.R0 TxDqsTcoPFallNRise: 0
W Mc0.C0.R1 TxDqsTcoPFallNRise: 0
Mc0 C1 Dec_tCWL: 2
W Mc0.C1 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C1 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C1 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C1 GsmIocInternalClocksOn: 0
W Mc0.C1 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C1 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C1.R0 TxDqsTcoPFallNRise: 0
W Mc0.C1.R1 TxDqsTcoPFallNRise: 0
Mc0 C2 Dec_tCWL: 2
W Mc0.C2 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C2 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C2 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C2 GsmIocInternalClocksOn: 0
W Mc0.C2 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C2 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C2.R0 TxDqsTcoPFallNRise: 0
W Mc0.C2.R1 TxDqsTcoPFallNRise: 0
Mc0 C3 Dec_tCWL: 2
W Mc0.C3 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C3 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C3 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C3 GsmIocInternalClocksOn: 0
W Mc0.C3 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C3 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C3.R0 TxDqsTcoPFallNRise: 0
W Mc0.C3.R1 TxDqsTcoPFallNRise: 0
Mc1 C0 Dec_tCWL: 4
W Mc1.C4 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C4 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C4 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C4 GsmIocInternalClocksOn: 0
W Mc1.C4 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C4 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C4.R0 TxDqsTcoPFallNRise: 0
W Mc1.C4.R1 TxDqsTcoPFallNRise: 0
Mc1 C1 Dec_tCWL: 4
W Mc1.C5 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C5 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C5 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C5 GsmIocInternalClocksOn: 0
W Mc1.C5 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C5 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C5.R0 TxDqsTcoPFallNRise: 0
W Mc1.C5.R1 TxDqsTcoPFallNRise: 0
Mc1 C2 Dec_tCWL: 4
W Mc1.C6 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C6 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C6 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C6 GsmIocInternalClocksOn: 0
W Mc1.C6 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C6 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C6.R0 TxDqsTcoPFallNRise: 0
W Mc1.C6.R1 TxDqsTcoPFallNRise: 0
Mc1 C3 Dec_tCWL: 4
W Mc1.C7 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C7 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C7 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C7 GsmIocInternalClocksOn: 0
W Mc1.C7 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C7 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C7.R0 TxDqsTcoPFallNRise: 0
W Mc1.C7.R1 TxDqsTcoPFallNRise: 0
W Mc0.C0.R0.S0 RxTap1: 10 (0xA)
W Mc0.C0.R0.S1 RxTap1: 10 (0xA)
W Mc0.C0.R1.S0 RxTap1: 10 (0xA)
W Mc0.C0.R1.S1 RxTap1: 10 (0xA)
W Mc0.C0.R0.S0 RloadDqsDn: 5
W Mc0.C0.R0.S1 RloadDqsDn: 5
W Mc0.C0.R1.S0 RloadDqsDn: 5
W Mc0.C0.R1.S1 RloadDqsDn: 5
W Mc0.C0.R0.S0 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S1 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S0 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S1 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S0 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S1 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S0 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S1 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S0 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1.S0 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R1.S1 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R0.S0.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S1 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S0 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S1 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S0.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S0 RxVocUnmatched: 8
W Mc0.C0.R0.S1 RxVocUnmatched: 8
W Mc0.C0.R1.S0 RxVocUnmatched: 8
W Mc0.C0.R1.S1 RxVocUnmatched: 8
W Mc0.C0.R0.S0 TxEq: 10 (0xA)
W Mc0.C0.R0.S1 TxEq: 10 (0xA)
W Mc0.C0.R1.S0 TxEq: 10 (0xA)
W Mc0.C0.R1.S1 TxEq: 10 (0xA)
W Mc0.C0.R0.S0 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S0 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S1 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S1 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S0 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S0 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S1 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S1 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S0 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S0 RxRankMuxDelay: 0
W Mc0.C0.R0.S1 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S1 RxRankMuxDelay: 0
W Mc0.C0.R1.S0 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S0 RxRankMuxDelay: 0
W Mc0.C0.R1.S1 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S1 RxRankMuxDelay: 0
W Mc0.C0.R0.S2 RxTap1: 10 (0xA)
W Mc0.C0.R0.S3 RxTap1: 10 (0xA)
W Mc0.C0.R1.S2 RxTap1: 10 (0xA)
W Mc0.C0.R1.S3 RxTap1: 10 (0xA)
W Mc0.C0.R0.S2 RloadDqsDn: 5
W Mc0.C0.R0.S3 RloadDqsDn: 5
W Mc0.C0.R1.S2 RloadDqsDn: 5
W Mc0.C0.R1.S3 RloadDqsDn: 5
W Mc0.C0.R0.S2 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S3 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S2 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S3 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S2 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S3 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S2 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S3 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S2 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R1.S2 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R1.S3 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R0.S2.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S3 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S2 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S3 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S2.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S2 RxVocUnmatched: 8
W Mc0.C0.R0.S3 RxVocUnmatched: 8
W Mc0.C0.R1.S2 RxVocUnmatched: 8
W Mc0.C0.R1.S3 RxVocUnmatched: 8
W Mc0.C0.R0.S2 TxEq: 10 (0xA)
W Mc0.C0.R0.S3 TxEq: 10 (0xA)
W Mc0.C0.R1.S2 TxEq: 10 (0xA)
W Mc0.C0.R1.S3 TxEq: 10 (0xA)
W Mc0.C0.R0.S2 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S2 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S3 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S3 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S2 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S2 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S3 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S3 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S2 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S2 RxRankMuxDelay: 0
W Mc0.C0.R0.S3 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S3 RxRankMuxDelay: 0
W Mc0.C0.R1.S2 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S2 RxRankMuxDelay: 0
W Mc0.C0.R1.S3 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S3 RxRankMuxDelay: 0
W Mc0.C0.R0.S4 RxTap1: 10 (0xA)
W Mc0.C0.R0.S5 RxTap1: 10 (0xA)
W Mc0.C0.R1.S4 RxTap1: 10 (0xA)
W Mc0.C0.R1.S5 RxTap1: 10 (0xA)
W Mc0.C0.R0.S4 RloadDqsDn: 5
W Mc0.C0.R0.S5 RloadDqsDn: 5
W Mc0.C0.R1.S4 RloadDqsDn: 5
W Mc0.C0.R1.S5 RloadDqsDn: 5
W Mc0.C0.R0.S4 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S5 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S4 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S5 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S4 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S5 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S4 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S5 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S4 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R1.S4 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R1.S5 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R0.S4.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S5 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S4 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S5 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S4.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S4 RxVocUnmatched: 8
W Mc0.C0.R0.S5 RxVocUnmatched: 8
W Mc0.C0.R1.S4 RxVocUnmatched: 8
W Mc0.C0.R1.S5 RxVocUnmatched: 8
W Mc0.C0.R0.S4 TxEq: 10 (0xA)
W Mc0.C0.R0.S5 TxEq: 10 (0xA)
W Mc0.C0.R1.S4 TxEq: 10 (0xA)
W Mc0.C0.R1.S5 TxEq: 10 (0xA)
W Mc0.C0.R0.S4 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S4 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S5 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S5 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S4 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S4 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S5 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S5 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S4 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S4 RxRankMuxDelay: 0
W Mc0.C0.R0.S5 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S5 RxRankMuxDelay: 0
W Mc0.C0.R1.S4 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S4 RxRankMuxDelay: 0
W Mc0.C0.R1.S5 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S5 RxRankMuxDelay: 0
W Mc0.C0.R0.S6 RxTap1: 10 (0xA)
W Mc0.C0.R0.S7 RxTap1: 10 (0xA)
W Mc0.C0.R1.S6 RxTap1: 10 (0xA)
W Mc0.C0.R1.S7 RxTap1: 10 (0xA)
W Mc0.C0.R0.S6 RloadDqsDn: 5
W Mc0.C0.R0.S7 RloadDqsDn: 5
W Mc0.C0.R1.S6 RloadDqsDn: 5
W Mc0.C0.R1.S7 RloadDqsDn: 5
W Mc0.C0.R0.S6 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S7 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S6 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S7 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S6 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S7 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S6 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S7 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S6 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C0.R1.S6 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R1.S7 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C0.R0.S6.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S7 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S6 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S7 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S6.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S6 RxVocUnmatched: 8
W Mc0.C0.R0.S7 RxVocUnmatched: 8
W Mc0.C0.R1.S6 RxVocUnmatched: 8
W Mc0.C0.R1.S7 RxVocUnmatched: 8
W Mc0.C0.R0.S6 TxEq: 10 (0xA)
W Mc0.C0.R0.S7 TxEq: 10 (0xA)
W Mc0.C0.R1.S6 TxEq: 10 (0xA)
W Mc0.C0.R1.S7 TxEq: 10 (0xA)
W Mc0.C0.R0.S6 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S6 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S7 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S7 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S6 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S6 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S7 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S7 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S6 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S6 RxRankMuxDelay: 0
W Mc0.C0.R0.S7 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S7 RxRankMuxDelay: 0
W Mc0.C0.R1.S6 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S6 RxRankMuxDelay: 0
W Mc0.C0.R1.S7 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S7 RxRankMuxDelay: 0
W Mc1.C1.R0.S0 RxTap1: 10 (0xA)
W Mc1.C1.R0.S1 RxTap1: 10 (0xA)
W Mc1.C1.R1.S0 RxTap1: 10 (0xA)
W Mc1.C1.R1.S1 RxTap1: 10 (0xA)
W Mc1.C1.R0.S0 RloadDqsDn: 5
W Mc1.C1.R0.S1 RloadDqsDn: 5
W Mc1.C1.R1.S0 RloadDqsDn: 5
W Mc1.C1.R1.S1 RloadDqsDn: 5
W Mc1.C1.R0.S0 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S1 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S0 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S1 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S0 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S1 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S0 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S1 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S0 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R1.S0 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R1.S1 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R0.S0.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S1 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S0 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S1 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S0.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S0 RxVocUnmatched: 8
W Mc1.C1.R0.S1 RxVocUnmatched: 8
W Mc1.C1.R1.S0 RxVocUnmatched: 8
W Mc1.C1.R1.S1 RxVocUnmatched: 8
W Mc1.C1.R0.S0 TxEq: 10 (0xA)
W Mc1.C1.R0.S1 TxEq: 10 (0xA)
W Mc1.C1.R1.S0 TxEq: 10 (0xA)
W Mc1.C1.R1.S1 TxEq: 10 (0xA)
W Mc1.C1.R0.S0 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S0 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S1 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S1 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S0 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S0 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S1 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S1 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S0 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S0 RxRankMuxDelay: 0
W Mc1.C1.R0.S1 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S1 RxRankMuxDelay: 0
W Mc1.C1.R1.S0 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S0 RxRankMuxDelay: 0
W Mc1.C1.R1.S1 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S1 RxRankMuxDelay: 0
W Mc1.C1.R0.S2 RxTap1: 10 (0xA)
W Mc1.C1.R0.S3 RxTap1: 10 (0xA)
W Mc1.C1.R1.S2 RxTap1: 10 (0xA)
W Mc1.C1.R1.S3 RxTap1: 10 (0xA)
W Mc1.C1.R0.S2 RloadDqsDn: 5
W Mc1.C1.R0.S3 RloadDqsDn: 5
W Mc1.C1.R1.S2 RloadDqsDn: 5
W Mc1.C1.R1.S3 RloadDqsDn: 5
W Mc1.C1.R0.S2 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S3 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S2 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S3 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S2 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S3 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S2 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S3 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S2 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R1.S2 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R1.S3 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R0.S2.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S3 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S2 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S3 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S2.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S2 RxVocUnmatched: 8
W Mc1.C1.R0.S3 RxVocUnmatched: 8
W Mc1.C1.R1.S2 RxVocUnmatched: 8
W Mc1.C1.R1.S3 RxVocUnmatched: 8
W Mc1.C1.R0.S2 TxEq: 10 (0xA)
W Mc1.C1.R0.S3 TxEq: 10 (0xA)
W Mc1.C1.R1.S2 TxEq: 10 (0xA)
W Mc1.C1.R1.S3 TxEq: 10 (0xA)
W Mc1.C1.R0.S2 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S2 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S3 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S3 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S2 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S2 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S3 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S3 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S2 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S2 RxRankMuxDelay: 0
W Mc1.C1.R0.S3 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S3 RxRankMuxDelay: 0
W Mc1.C1.R1.S2 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S2 RxRankMuxDelay: 0
W Mc1.C1.R1.S3 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S3 RxRankMuxDelay: 0
W Mc1.C1.R0.S4 RxTap1: 10 (0xA)
W Mc1.C1.R0.S5 RxTap1: 10 (0xA)
W Mc1.C1.R1.S4 RxTap1: 10 (0xA)
W Mc1.C1.R1.S5 RxTap1: 10 (0xA)
W Mc1.C1.R0.S4 RloadDqsDn: 5
W Mc1.C1.R0.S5 RloadDqsDn: 5
W Mc1.C1.R1.S4 RloadDqsDn: 5
W Mc1.C1.R1.S5 RloadDqsDn: 5
W Mc1.C1.R0.S4 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S5 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S4 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S5 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S4 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S5 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S4 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S5 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S4 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R1.S4 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R1.S5 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R0.S4.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S5 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S4 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S5 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S4.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S4 RxVocUnmatched: 8
W Mc1.C1.R0.S5 RxVocUnmatched: 8
W Mc1.C1.R1.S4 RxVocUnmatched: 8
W Mc1.C1.R1.S5 RxVocUnmatched: 8
W Mc1.C1.R0.S4 TxEq: 10 (0xA)
W Mc1.C1.R0.S5 TxEq: 10 (0xA)
W Mc1.C1.R1.S4 TxEq: 10 (0xA)
W Mc1.C1.R1.S5 TxEq: 10 (0xA)
W Mc1.C1.R0.S4 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S4 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S5 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S5 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S4 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S4 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S5 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S5 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S4 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S4 RxRankMuxDelay: 0
W Mc1.C1.R0.S5 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S5 RxRankMuxDelay: 0
W Mc1.C1.R1.S4 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S4 RxRankMuxDelay: 0
W Mc1.C1.R1.S5 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S5 RxRankMuxDelay: 0
W Mc1.C1.R0.S6 RxTap1: 10 (0xA)
W Mc1.C1.R0.S7 RxTap1: 10 (0xA)
W Mc1.C1.R1.S6 RxTap1: 10 (0xA)
W Mc1.C1.R1.S7 RxTap1: 10 (0xA)
W Mc1.C1.R0.S6 RloadDqsDn: 5
W Mc1.C1.R0.S7 RloadDqsDn: 5
W Mc1.C1.R1.S6 RloadDqsDn: 5
W Mc1.C1.R1.S7 RloadDqsDn: 5
W Mc1.C1.R0.S6 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S7 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S6 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S7 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S6 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S7 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S6 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S7 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S6 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R1.S6 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R1.S7 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R0.S6.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S7 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S6 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S7 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S6.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S6 RxVocUnmatched: 8
W Mc1.C1.R0.S7 RxVocUnmatched: 8
W Mc1.C1.R1.S6 RxVocUnmatched: 8
W Mc1.C1.R1.S7 RxVocUnmatched: 8
W Mc1.C1.R0.S6 TxEq: 10 (0xA)
W Mc1.C1.R0.S7 TxEq: 10 (0xA)
W Mc1.C1.R1.S6 TxEq: 10 (0xA)
W Mc1.C1.R1.S7 TxEq: 10 (0xA)
W Mc1.C1.R0.S6 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S6 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S7 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S7 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S6 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S6 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S7 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S7 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S6 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S6 RxRankMuxDelay: 0
W Mc1.C1.R0.S7 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S7 RxRankMuxDelay: 0
W Mc1.C1.R1.S6 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S6 RxRankMuxDelay: 0
W Mc1.C1.R1.S7 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S7 RxRankMuxDelay: 0
W GsmIocStrobeOdtStaticDis: 0
W Mc0.C0.S0 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S1 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S2 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S3 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S4 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S5 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S6 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S7 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S0 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S1 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S2 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S3 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S4 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S5 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S6 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S7 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S0 GsmIocDataOdtMode: 1
W Mc0.C0.S1 GsmIocDataOdtMode: 1
W Mc0.C0.S0 McOdtDelay: 0
W Mc0.C0.S1 McOdtDelay: 0
W Mc0.C0.S2 McOdtDelay: 0
W Mc0.C0.S3 McOdtDelay: 0
W Mc0.C0.S4 McOdtDelay: 0
W Mc0.C0.S5 McOdtDelay: 0
W Mc0.C0.S6 McOdtDelay: 0
W Mc0.C0.S7 McOdtDelay: 0
W Mc1.C1.S0 McOdtDelay: 0
W Mc1.C1.S1 McOdtDelay: 0
W Mc1.C1.S2 McOdtDelay: 0
W Mc1.C1.S3 McOdtDelay: 0
W Mc1.C1.S4 McOdtDelay: 0
W Mc1.C1.S5 McOdtDelay: 0
W Mc1.C1.S6 McOdtDelay: 0
W Mc1.C1.S7 McOdtDelay: 0
W Mc0.C0.S0 SenseAmpDelay: 0
W Mc0.C0.S1 SenseAmpDelay: 0
W Mc0.C0.S2 SenseAmpDelay: 0
W Mc0.C0.S3 SenseAmpDelay: 0
W Mc0.C0.S4 SenseAmpDelay: 0
W Mc0.C0.S5 SenseAmpDelay: 0
W Mc0.C0.S6 SenseAmpDelay: 0
W Mc0.C0.S7 SenseAmpDelay: 0
W Mc1.C1.S0 SenseAmpDelay: 0
W Mc1.C1.S1 SenseAmpDelay: 0
W Mc1.C1.S2 SenseAmpDelay: 0
W Mc1.C1.S3 SenseAmpDelay: 0
W Mc1.C1.S4 SenseAmpDelay: 0
W Mc1.C1.S5 SenseAmpDelay: 0
W Mc1.C1.S6 SenseAmpDelay: 0
W Mc1.C1.S7 SenseAmpDelay: 0
W Mc0.C0.S0 DqsOdtDelay: 0
W Mc0.C0.S1 DqsOdtDelay: 0
W Mc0.C0.S2 DqsOdtDelay: 0
W Mc0.C0.S3 DqsOdtDelay: 0
W Mc0.C0.S4 DqsOdtDelay: 0
W Mc0.C0.S5 DqsOdtDelay: 0
W Mc0.C0.S6 DqsOdtDelay: 0
W Mc0.C0.S7 DqsOdtDelay: 0
W Mc1.C1.S0 DqsOdtDelay: 0
W Mc1.C1.S1 DqsOdtDelay: 0
W Mc1.C1.S2 DqsOdtDelay: 0
W Mc1.C1.S3 DqsOdtDelay: 0
W Mc1.C1.S4 DqsOdtDelay: 0
W Mc1.C1.S5 DqsOdtDelay: 0
W Mc1.C1.S6 DqsOdtDelay: 0
W Mc1.C1.S7 DqsOdtDelay: 0
W Mc0.C0.S0 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S1 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S2 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S3 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S4 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S5 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S6 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S7 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S0 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S1 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S2 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S3 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S4 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S5 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S6 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S7 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S0 McOdtDuration: 15 (0xF)
W Mc0.C0.S1 McOdtDuration: 15 (0xF)
W Mc0.C0.S2 McOdtDuration: 15 (0xF)
W Mc0.C0.S3 McOdtDuration: 15 (0xF)
W Mc0.C0.S4 McOdtDuration: 15 (0xF)
W Mc0.C0.S5 McOdtDuration: 15 (0xF)
W Mc0.C0.S6 McOdtDuration: 15 (0xF)
W Mc0.C0.S7 McOdtDuration: 15 (0xF)
W Mc1.C1.S0 McOdtDuration: 15 (0xF)
W Mc1.C1.S1 McOdtDuration: 15 (0xF)
W Mc1.C1.S2 McOdtDuration: 15 (0xF)
W Mc1.C1.S3 McOdtDuration: 15 (0xF)
W Mc1.C1.S4 McOdtDuration: 15 (0xF)
W Mc1.C1.S5 McOdtDuration: 15 (0xF)
W Mc1.C1.S6 McOdtDuration: 15 (0xF)
W Mc1.C1.S7 McOdtDuration: 15 (0xF)
W Mc0.C0.S0 DqsOdtDuration: 7
W Mc0.C0.S1 DqsOdtDuration: 7
W Mc0.C0.S2 DqsOdtDuration: 7
W Mc0.C0.S3 DqsOdtDuration: 7
W Mc0.C0.S4 DqsOdtDuration: 7
W Mc0.C0.S5 DqsOdtDuration: 7
W Mc0.C0.S6 DqsOdtDuration: 7
W Mc0.C0.S7 DqsOdtDuration: 7
W Mc1.C1.S0 DqsOdtDuration: 7
W Mc1.C1.S1 DqsOdtDuration: 7
W Mc1.C1.S2 DqsOdtDuration: 7
W Mc1.C1.S3 DqsOdtDuration: 7
W Mc1.C1.S4 DqsOdtDuration: 7
W Mc1.C1.S5 DqsOdtDuration: 7
W Mc1.C1.S6 DqsOdtDuration: 7
W Mc1.C1.S7 DqsOdtDuration: 7
W Mc0.C0.S0 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S1 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S2 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S3 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S4 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S5 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S6 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S7 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S0 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S1 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S2 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S3 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S4 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S5 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S6 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S7 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S0 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S1 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S2 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S3 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S4 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S5 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S6 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S7 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S0 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S1 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S2 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S3 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S4 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S5 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S6 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S7 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S0 GsmIocDisableQuickComp: 1
W Mc0.C0.S1 GsmIocDisableQuickComp: 1
W Mc0.C0.S2 GsmIocDisableQuickComp: 1
W Mc0.C0.S3 GsmIocDisableQuickComp: 1
W Mc0.C0.S4 GsmIocDisableQuickComp: 1
W Mc0.C0.S5 GsmIocDisableQuickComp: 1
W Mc0.C0.S6 GsmIocDisableQuickComp: 1
W Mc0.C0.S7 GsmIocDisableQuickComp: 1
W Mc1.C1.S0 GsmIocDisableQuickComp: 1
W Mc1.C1.S1 GsmIocDisableQuickComp: 1
W Mc1.C1.S2 GsmIocDisableQuickComp: 1
W Mc1.C1.S3 GsmIocDisableQuickComp: 1
W Mc1.C1.S4 GsmIocDisableQuickComp: 1
W Mc1.C1.S5 GsmIocDisableQuickComp: 1
W Mc1.C1.S6 GsmIocDisableQuickComp: 1
W Mc1.C1.S7 GsmIocDisableQuickComp: 1
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
Init Dimm Vref CRs
DdrCrVrefControl: 0x240C1E
W Mc0.C0.S0 CmdGrpPi: 128 (0x80)
W Mc0.C0.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C0.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C0.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C0.S0 CkeGrpPi: 128 (0x80)
W Mc0.C1.S0 CmdGrpPi: 128 (0x80)
W Mc0.C1.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C1.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C1.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C1.S0 CkeGrpPi: 128 (0x80)
W Mc0.C2.S0 CmdGrpPi: 128 (0x80)
W Mc0.C2.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C2.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C2.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C2.S0 CkeGrpPi: 128 (0x80)
W Mc0.C3.S0 CmdGrpPi: 128 (0x80)
W Mc0.C3.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C3.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C3.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C3.S0 CkeGrpPi: 128 (0x80)
W Mc1.C4.S0 CmdGrpPi: 128 (0x80)
W Mc1.C4.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C4.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C4.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C4.S0 CkeGrpPi: 128 (0x80)
W Mc1.C5.S0 CmdGrpPi: 128 (0x80)
W Mc1.C5.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C5.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C5.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C5.S0 CkeGrpPi: 128 (0x80)
W Mc1.C6.S0 CmdGrpPi: 128 (0x80)
W Mc1.C6.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C6.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C6.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C6.S0 CkeGrpPi: 128 (0x80)
W Mc1.C7.S0 CmdGrpPi: 128 (0x80)
W Mc1.C7.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C7.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C7.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C7.S0 CkeGrpPi: 128 (0x80)
MrcSetupVtt: RodtCpu=80 ohm, RonDimm=34 ohm
Itarget=10 uA,
IcompDn=23 uA, IcompUp=1 uA
Init MISC CRs
PCU_CR_DDR_VOLTAGE = 0x06
Init COMP CRs
WrDSClk: Target (Up/Down) value: 30/ 30 ReferenceR (Up/Down): 33/ 30 VrefOffset (Up/Down): 100/ 96 Current Comp code (Up/Down): 11/ 13
WrDSCtl: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 33/ 40 VrefOffset (Up/Down): 86/ 96 Current Comp code (Up/Down): 5/ 6
WrDSCmd: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 33/ 40 VrefOffset (Up/Down): 86/ 96 Current Comp code (Up/Down): 5/ 5
RloadVref: 13 set equal to CmdDrvVrefUp (WrDSCmd)
WrDS: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 50/ 40 VrefOffset (Up/Down): 106/ 96 Current Comp code (Up/Down): 16/ 24
RdOdt: Target (Up/Down) value: 80/ 40 ReferenceR (Up/Down): 100/ 80 VrefOffset (Up/Down): 106/127 Current Comp code (Up/Down): 8/ 8
Vdd2Mv = 1100mV, VccIo - 375 = 575mV, TargetV = 148mV, PanicV = 25mV, DDRVSSHIAFEA_CR_DDRCRVSSHISAMPLER = 0x10FC0494
VsshiTargetCompOfst = 0x3F, PanicHiCompOfst = 0x3F, PanicLoCompOfst = 0x3F
START_VssHi_Regulator_Offset_Correction
DDRVSSHIAFEA_CR_DDRCRVSSHISAMPLER = 0x10FC0494
VssHiTargetUsePmos = 0x1
PanicHiUsePmos = 0x1
PanicLoUsePmos = 0x1
STOP_VssHi_Regulator_Offset_Correction
final panicvttup0 = 0x2D
final panicvttup1 = 0x2D
final panicvttdn0 = 0x21
final panicvttdn1 = 0x21
W GsmIocDataDqDccLaneStatusResult: 0
MRC task DDRIO Config - Post DCC -- SUCCEEDED, Status = 0h. Stack Depth: 151104
Post Code: DD6Bh
MRC task -- Memory Subsystem FUSA Configuration -- Started.
Disable CMI Parity
CmiParity PARITY_EN: 1
CmiParity ADDR_PARITY_CHK_MASK: 255
Disable MC0 Parity
Mc0Parity PARITY_EN: 1
Mc0Parity RDATA_PARITY_EN: 1
Mc0Parity WDATA_PARITY_EN: 0
Mc0Parity WBE_PARITY_EN: 0
Mc0Parity ADDR_PARITY_EN: 1
Disable MC1 Parity
Mc1Parity PARITY_EN: 1
Mc1Parity RDATA_PARITY_EN: 1
Mc1Parity WDATA_PARITY_EN: 0
Mc1Parity WBE_PARITY_EN: 0
Mc1Parity ADDR_PARITY_EN: 1
CmiParity PARITY_EN: 1
Mc0Parity PARITY_EN: 1
Ibecc0Parity PARITY_EN: 1
Mc1Parity PARITY_EN: 1
Ibecc1Parity PARITY_EN: 1
MRC task Memory Subsystem FUSA Configuration -- SUCCEEDED, Status = 0h.
Post Code: DD7Bh
MRC task -- MRC Check-The-Checker -- Started.
MRC task MRC Check-The-Checker -- SUCCEEDED, Status = 0h.
Post Code: DD0Ah
MRC task -- FLL Init -- Started.
MRC task FLL Init -- SUCCEEDED, Status = 0h.
Post Code: DD14h
MRC task -- DDR COMP Calc - PreTraining -- Started.
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
R SCompCodeCtl: 15 (0xF)
W GsmIocNoDqInterleave: 1
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 57
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
MRC task DDR COMP Calc - PreTraining -- SUCCEEDED, Status = 0h.
Post Code: DD13h
MRC task -- DDR SCOMP Config -- Started.
Bypass SCompDq
Bypass SCompCmd
Bypass SCompCtl
Bypass SCompClk
MRC task DDR SCOMP Config -- SUCCEEDED, Status = 0h.
Post Code: DD24h
MRC task -- MC MEMORY MAP -- Started.
PrmrrSize adjusted to = 0 MB
TOM (Total physical memory size) = 32768 MB
GGC value = FEC0h
Unaligned TSEG base = 7B4h
Unaligned GTT base = 7BCh
Unaligned BDSM base = 7C4h
Unaligned TOLUD base = 800h
TSEG base = 7B0h
GTT base = 7B8h
BDSM base = 7C0h
TOLUD base = 7FCh
Reclaim Enable
Remap Base 8000h
Remap Limit 8803h
TOUUD Base 8804h
ME stolen base 770h
ME stolen size 40h
TotalMemorySize = 8000
ToludBase = 7FC
TouudBase = 8804
TsegBase = 7B0
BdsmBase = 7C0
BgsmBase = 7B8
GraphicsControlRegister = FEC0
SetIaGtImrExclusion Enter
SetIaGtImrExclusion End
Set Gfx Memory Map
GMSSize: 60MB
GMSBase read from R_SA_BDSM: 0x7C000000
Rc6CtxBaseLow: 0x7FBF7000
DoorbellCtxBaseLow: 0x7FBFF000
RC6 Context Base: 0x7FBF7001
RC6 Context Base Programming done
MRC task MC MEMORY MAP -- SUCCEEDED, Status = 0h.
Post Code: DD27h
MRC task -- Pre-Training -- Started.
CPGC Mode locked
MRC task Pre-Training -- SUCCEEDED, Status = 0h.
Post Code: DD5Eh
MRC task -- Reset Recovery -- Started.
Issue ZQ CAL on all channels / ranks
Issues 5 write transactions!Reset de-asserted correctly in iter 0!MRC task Reset Recovery -- SUCCEEDED, Status = 0h.
Post Code: DD1Fh
MRC task -- DDR Offset Correction - PreTraining -- Started.
VccDll Bypass!
VssHi FF Offset
W Mc0.C0.S0 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S1 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S2 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S3 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S4 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S5 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S6 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S7 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S0 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S1 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S2 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S3 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S4 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S5 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S6 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S7 GsmIocDqsMaskPulseCnt: 1
Issue ZQ CAL on all channels / ranks
Issue ZQ CAL on all channels / ranks
START_PreTrain_Offset_Correction_VssHi_FF
STOP_PreTrain_Offset_Correction_VssHi_FF
MRC task DDR Offset Correction - PreTraining -- SUCCEEDED, Status = 0h.
Post Code: DD26h
MRC task -- JEDEC RESET -- Started.
Attempting value = 0xB9B80008 - Pll busy wait - done
Requested/actual ratio 8/8, Frequency=1067, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=1874999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MC0C0 DqOdt = 48 , CaOdt = 60
DriverPullUp = 40, DriverPullDown = 0, ReceiverOdt = 48, Vdd = 1100, Vterm = 0
VrefType = WrV, Vref = 300
DriverPullUp = 40, DriverPullDown = 0, ReceiverOdt = 60, Vdd = 1100, Vterm = 0
VrefType = CmdV, Vref = 330
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 1: MR23, Opcode=0x04
Issue ZQ CAL on all channels / ranks
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task JEDEC RESET -- SUCCEEDED, Status = 0h.
Post Code: DD25h
MRC task -- Print DDR MRs -- Started.
MRC task Print DDR MRs -- SUCCEEDED, Status = 0h.
Post Code: DD29h
MRC task -- SenseAmp Offset Training -- Started.
SampOffset Training:RxVoc,RxDqsUnmatchedAmpOffset
MC 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bits 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S
SAmp
0 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
1 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
2 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
3 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
4 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
5 111111111 111111111 111111011 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111011 111111111
6 111111111 111111111 111111011 111111111 111111111 111111111 111111011 111111111 111111111 111111111 111101111 111111011 111111111 111111111 111101011 111111111
7 111110111 111111111 111111011 111111111 111111101 111110101 111111011 111111111 111111101 111111101 111101011 111101011 111110101 111111111 111101011 111111011
8 111110101 111111011 111111011 111101011 111110101 111110101 111101011 111111011 111110101 111111101 111101011 111101011 111110101 111111111 111101011 111111011
9 111110101 111111011 111101011 111101001 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011
10 111110001 111100011 111101011 111101001 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101001
11 111110001 111100001 111101011 111101001 111110101 111100001 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101001
12 111100001 111100001 111101001 111101001 111110101 111100001 111101001 111101011 111110001 111110101 111101011 111101011 111100101 111110101 111101001 111100001
13 111100001 110100001 111100001 110101001 111110100 111100001 111100001 111100000 111110001 111110101 111100001 011101011 111100001 111100001 111101001 111100001
14 110100001 110100001 001100001 100100001 110100000 111000001 111100001 111000000 110000001 110000001 111000001 011001001 011100001 110100001 111100001 111100001
15 000000001 100100001 001100001 000100001 000000000 011000001 011100001 110000000 010000001 000000001 011000001 000001000 010100000 000100001 101100001 010100001
16 000000001 100000001 000000001 000000001 000000000 000000001 000000001 000000000 000000001 000000001 010000001 000000000 010000000 000100001 000000000 010000000
17 000000001 000000000 000000000 000000001 000000000 000000001 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 010000000
18 000000001 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000
19 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000
20 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
21 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
22 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
23 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
24 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
25 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
26 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
27 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
28 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
29 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
30 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
Results
W Mc0.C0.R0.S0.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B2 RxVoc: 18 (0x12)
W Mc0.C0.R1.S0.B2 RxVoc: 18 (0x12)
W Mc0.C0.R0.S0.B3 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B3 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B4 RxVoc: 20 (0x14)
W Mc0.C0.R1.S0.B4 RxVoc: 20 (0x14)
W Mc0.C0.R0.S0.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S0.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S0.B6 RxVoc: 22 (0x16)
W Mc0.C0.R1.S0.B6 RxVoc: 22 (0x16)
W Mc0.C0.R0.S0.B7 RxVoc: 24 (0x18)
W Mc0.C0.R1.S0.B7 RxVoc: 24 (0x18)
W Mc0.C0.R0.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc0.C0.R1.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc0.C0.R0.S1.B0 RxVoc: 1
W Mc0.C0.R1.S1.B0 RxVoc: 1
W Mc0.C0.R0.S1.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S1.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S1.B2 RxVoc: 19 (0x13)
W Mc0.C0.R1.S1.B2 RxVoc: 19 (0x13)
W Mc0.C0.R0.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxVoc: 22 (0x16)
W Mc0.C0.R1.S1.B4 RxVoc: 22 (0x16)
W Mc0.C0.R0.S1.B5 RxVoc: 22 (0x16)
W Mc0.C0.R1.S1.B5 RxVoc: 22 (0x16)
W Mc0.C0.R0.S1.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S1.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S1.B7 RxVoc: 21 (0x15)
W Mc0.C0.R1.S1.B7 RxVoc: 21 (0x15)
W Mc0.C0.R0.S1 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S1 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S2.B0 RxVoc: 18 (0x12)
W Mc0.C0.R1.S2.B0 RxVoc: 18 (0x12)
W Mc0.C0.R0.S2.B1 RxVoc: 18 (0x12)
W Mc0.C0.R1.S2.B1 RxVoc: 18 (0x12)
W Mc0.C0.R0.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxVoc: 23 (0x17)
W Mc0.C0.R1.S2.B4 RxVoc: 23 (0x17)
W Mc0.C0.R0.S2.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S2.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S2.B6 RxVoc: 27 (0x1B)
W Mc0.C0.R1.S2.B6 RxVoc: 27 (0x1B)
W Mc0.C0.R0.S2.B7 RxVoc: 20 (0x14)
W Mc0.C0.R1.S2.B7 RxVoc: 20 (0x14)
W Mc0.C0.R0.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S3.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S3.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S3.B1 RxVoc: 18 (0x12)
W Mc0.C0.R1.S3.B1 RxVoc: 18 (0x12)
W Mc0.C0.R0.S3.B2 RxVoc: 19 (0x13)
W Mc0.C0.R1.S3.B2 RxVoc: 19 (0x13)
W Mc0.C0.R0.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxVoc: 24 (0x18)
W Mc0.C0.R1.S3.B4 RxVoc: 24 (0x18)
W Mc0.C0.R0.S3.B5 RxVoc: 18 (0x12)
W Mc0.C0.R1.S3.B5 RxVoc: 18 (0x12)
W Mc0.C0.R0.S3.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S3.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S3.B7 RxVoc: 23 (0x17)
W Mc0.C0.R1.S3.B7 RxVoc: 23 (0x17)
W Mc0.C0.R0.S3 RxDqsUnmatchedAmpOffset: 29 (0x1D)
W Mc0.C0.R1.S3 RxDqsUnmatchedAmpOffset: 29 (0x1D)
W Mc0.C0.R0.S4.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B2 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B2 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B3 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B3 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B4 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B4 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B5 RxVoc: 24 (0x18)
W Mc0.C0.R1.S4.B5 RxVoc: 24 (0x18)
W Mc0.C0.R0.S4.B6 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B6 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B7 RxVoc: 25 (0x19)
W Mc0.C0.R1.S4.B7 RxVoc: 25 (0x19)
W Mc0.C0.R0.S4 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R1.S4 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R0.S5.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S5.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxVoc: 18 (0x12)
W Mc0.C0.R1.S5.B3 RxVoc: 18 (0x12)
W Mc0.C0.R0.S5.B4 RxVoc: 21 (0x15)
W Mc0.C0.R1.S5.B4 RxVoc: 21 (0x15)
W Mc0.C0.R0.S5.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S5.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S5.B6 RxVoc: 21 (0x15)
W Mc0.C0.R1.S5.B6 RxVoc: 21 (0x15)
W Mc0.C0.R0.S5.B7 RxVoc: 25 (0x19)
W Mc0.C0.R1.S5.B7 RxVoc: 25 (0x19)
W Mc0.C0.R0.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc0.C0.R1.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc0.C0.R0.S6.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S6.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxVoc: 24 (0x18)
W Mc0.C0.R1.S6.B4 RxVoc: 24 (0x18)
W Mc0.C0.R0.S6.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S6.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S6.B6 RxVoc: 26 (0x1A)
W Mc0.C0.R1.S6.B6 RxVoc: 26 (0x1A)
W Mc0.C0.R0.S6.B7 RxVoc: 20 (0x14)
W Mc0.C0.R1.S6.B7 RxVoc: 20 (0x14)
W Mc0.C0.R0.S6 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S6 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxVoc: 17 (0x11)
W Mc0.C0.R1.S7.B2 RxVoc: 17 (0x11)
W Mc0.C0.R0.S7.B3 RxVoc: 18 (0x12)
W Mc0.C0.R1.S7.B3 RxVoc: 18 (0x12)
W Mc0.C0.R0.S7.B4 RxVoc: 23 (0x17)
W Mc0.C0.R1.S7.B4 RxVoc: 23 (0x17)
W Mc0.C0.R0.S7.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S7.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S7.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S7.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S7.B7 RxVoc: 19 (0x13)
W Mc0.C0.R1.S7.B7 RxVoc: 19 (0x13)
W Mc0.C0.R0.S7 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R1.S7 RxDqsUnmatchedAmpOffset: 3
W Mc1.C1.R0.S0.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S0.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B4 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B4 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B5 RxVoc: 24 (0x18)
W Mc1.C1.R1.S0.B5 RxVoc: 24 (0x18)
W Mc1.C1.R0.S0.B6 RxVoc: 20 (0x14)
W Mc1.C1.R1.S0.B6 RxVoc: 20 (0x14)
W Mc1.C1.R0.S0.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S0.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc1.C1.R1.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc1.C1.R0.S1.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S1.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S1.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S1.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S1.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B4 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B4 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B5 RxVoc: 23 (0x17)
W Mc1.C1.R1.S1.B5 RxVoc: 23 (0x17)
W Mc1.C1.R0.S1.B6 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B6 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S1.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S1 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R1.S1 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R0.S2.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S2.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S2.B1 RxVoc: 1
W Mc1.C1.R1.S2.B1 RxVoc: 1
W Mc1.C1.R0.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S2.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S2.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S2.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S2.B5 RxVoc: 19 (0x13)
W Mc1.C1.R1.S2.B5 RxVoc: 19 (0x13)
W Mc1.C1.R0.S2.B6 RxVoc: 25 (0x19)
W Mc1.C1.R1.S2.B6 RxVoc: 25 (0x19)
W Mc1.C1.R0.S2.B7 RxVoc: 19 (0x13)
W Mc1.C1.R1.S2.B7 RxVoc: 19 (0x13)
W Mc1.C1.R0.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R1.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R0.S3.B0 RxVoc: 19 (0x13)
W Mc1.C1.R1.S3.B0 RxVoc: 19 (0x13)
W Mc1.C1.R0.S3.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S3.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S3.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S3.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S3.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S3.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S3.B4 RxVoc: 25 (0x19)
W Mc1.C1.R1.S3.B4 RxVoc: 25 (0x19)
W Mc1.C1.R0.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S3.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S3.B7 RxVoc: 18 (0x12)
W Mc1.C1.R1.S3.B7 RxVoc: 18 (0x12)
W Mc1.C1.R0.S3 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R1.S3 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R0.S4.B0 RxVoc: 18 (0x12)
W Mc1.C1.R1.S4.B0 RxVoc: 18 (0x12)
W Mc1.C1.R0.S4.B1 RxVoc: 1
W Mc1.C1.R1.S4.B1 RxVoc: 1
W Mc1.C1.R0.S4.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S4.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxVoc: 20 (0x14)
W Mc1.C1.R1.S4.B4 RxVoc: 20 (0x14)
W Mc1.C1.R0.S4.B5 RxVoc: 25 (0x19)
W Mc1.C1.R1.S4.B5 RxVoc: 25 (0x19)
W Mc1.C1.R0.S4.B6 RxVoc: 19 (0x13)
W Mc1.C1.R1.S4.B6 RxVoc: 19 (0x13)
W Mc1.C1.R0.S4.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S4.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S4 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R1.S4 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R0.S5.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S5.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S5.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S5.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S5.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S5.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S5.B3 RxVoc: 1
W Mc1.C1.R1.S5.B3 RxVoc: 1
W Mc1.C1.R0.S5.B4 RxVoc: 19 (0x13)
W Mc1.C1.R1.S5.B4 RxVoc: 19 (0x13)
W Mc1.C1.R0.S5.B5 RxVoc: 23 (0x17)
W Mc1.C1.R1.S5.B5 RxVoc: 23 (0x17)
W Mc1.C1.R0.S5.B6 RxVoc: 19 (0x13)
W Mc1.C1.R1.S5.B6 RxVoc: 19 (0x13)
W Mc1.C1.R0.S5.B7 RxVoc: 23 (0x17)
W Mc1.C1.R1.S5.B7 RxVoc: 23 (0x17)
W Mc1.C1.R0.S5 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R1.S5 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R0.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S6.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S6.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S6.B5 RxVoc: 18 (0x12)
W Mc1.C1.R1.S6.B5 RxVoc: 18 (0x12)
W Mc1.C1.R0.S6.B6 RxVoc: 27 (0x1B)
W Mc1.C1.R1.S6.B6 RxVoc: 27 (0x1B)
W Mc1.C1.R0.S6.B7 RxVoc: 20 (0x14)
W Mc1.C1.R1.S6.B7 RxVoc: 20 (0x14)
W Mc1.C1.R0.S6 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R1.S6 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R0.S7.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S7.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S7.B1 RxVoc: 2
W Mc1.C1.R1.S7.B1 RxVoc: 2
W Mc1.C1.R0.S7.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S7.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxVoc: 23 (0x17)
W Mc1.C1.R1.S7.B4 RxVoc: 23 (0x17)
W Mc1.C1.R0.S7.B5 RxVoc: 20 (0x14)
W Mc1.C1.R1.S7.B5 RxVoc: 20 (0x14)
W Mc1.C1.R0.S7.B6 RxVoc: 25 (0x19)
W Mc1.C1.R1.S7.B6 RxVoc: 25 (0x19)
W Mc1.C1.R0.S7.B7 RxVoc: 22 (0x16)
W Mc1.C1.R1.S7.B7 RxVoc: 22 (0x16)
W Mc1.C1.R0.S7 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R1.S7 RxDqsUnmatchedAmpOffset: 0
SampOffset Training:RxPerBitDeskewCal,
MC 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bits 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567
SAmp
0 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
2 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
3 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
4 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
5 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
6 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
7 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
8 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
9 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
10 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
12 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
13 11111111 11111111 11110111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 10111111 11111101 11111111 11101111
14 01101100 10111111 11110011 10110111 01111111 01110101 11111111 11111110 11101001 11111101 11110011 11111101 10011110 01111101 10111111 11100110
15 01100000 00100101 11000001 00110001 01001000 00110001 01110001 01111100 10100001 10001101 11010011 11101101 00010110 00111100 10110010 10100010
16 00000000 00000001 10000000 00010000 00000000 00010001 00110001 00111100 00000000 00000000 01000010 10000101 00000100 00100000 00000000 10100000
17 00000000 00000001 10000000 00000000 00000000 00010000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
18 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
19 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
20 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
21 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
22 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
23 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
24 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
25 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
26 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
27 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
28 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
29 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
30 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Results
W Mc0.C0.R0.S0.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S0.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S0.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S1.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B7 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S1.B7 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S2.B0 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S2.B0 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S2.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S2.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S2.B4 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R1.S2.B4 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R0.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S2.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S2.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S3.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S3.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S3.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S3.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S3.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S4.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S5.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S5.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S5.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S5.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S7.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B5 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B5 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S7.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S0.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S0.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S2.B1 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S2.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S2.B6 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S2.B6 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S3.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S3.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S3.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S3.B7 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B7 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S4.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S4.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S4.B1 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S4.B1 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S4.B2 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B2 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S4.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S4.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S4.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S5.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S5.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S5.B6 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S5.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S6.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S7.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S7.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S7.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S7.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S7.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S7.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S7.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S7.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S7.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S7.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S7.B7 RxPerBitDeskewCal: 18 (0x12)
MRC task SenseAmp Offset Training -- SUCCEEDED, Status = 0h. Stack Depth: 151672
Post Code: DD28h
MRC task -- Early command training -- Started.
Start Bit Swizzle
W Mc0 GsmMccLDimmSize: 1
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1 GsmMccLDimmSize: 1
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 8
W Mc0.C0 GsmMctRDRDdr: 8
W Mc0.C1 GsmMctRDRDdg: 8
W Mc0.C1 GsmMctRDRDdr: 8
W Mc1.C0 GsmMctRDRDdg: 8
W Mc1.C0 GsmMctRDRDdr: 8
W Mc1.C1 GsmMctRDRDdg: 8
W Mc1.C1 GsmMctRDRDdr: 8
Running Bit 0
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Running Bit 1
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Running Bit 2
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Running Bit 3
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Running Bit 4
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Running Bit 5
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Running Bit 6
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Running Bit 7
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
MapCA2DQPins Results for Mc0.Ch0 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 0 1 6 7 3 2 5 4
CPU Byte1: 15 8 9 14 12 11 10 13
MapCA2DQPins Results for Mc0.Ch1 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 11 12 8 15 9 14 10 13
CPU Byte1: 3 4 7 0 6 1 5 2
MapCA2DQPins Results for Mc0.Ch2 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 4 5 3 2 7 1 0 6
CPU Byte1: 11 10 12 13 8 9 14 15
MapCA2DQPins Results for Mc0.Ch3 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 12 11 8 13 14 15 9 10
CPU Byte1: 4 7 3 2 1 6 0 5
MapCA2DQPins Results for Mc1.Ch0 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 11 10 9 8 12 13 15 14
CPU Byte1: 4 5 6 7 3 2 0 1
MapCA2DQPins Results for Mc1.Ch1 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 0 7 1 6 3 5 2 4
CPU Byte1: 9 8 10 11 14 15 13 12
MapCA2DQPins Results for Mc1.Ch2 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 4 5 6 1 3 2 7 0
CPU Byte1: 10 13 12 11 14 9 15 8
MapCA2DQPins Results for Mc1.Ch3 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 10 12 9 15 8 11 13 14
CPU Byte1: 3 4 1 2 6 0 5 7
Revert MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
Revert MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 0
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
End Bit Swizzle
LowFreqCsCmdSweepDone 1
Mc0C0R0 Mc0C1R0 Mc0C2R0 Mc0C3R0 Mc1C0R0 Mc1C1R0 Mc1C2R0 Mc1C3R0 Mc0C0R1 Mc0C1R1 Mc0C2R1 Mc0C3R1 Mc1C0R1 Mc1C1R1 Mc1C2R1 Mc1C3R1
CS: 88
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(88): 11
CS: 96
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(96): 11
CS: 104
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(104): 11
CS: 112
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(112): 11
CS: 120
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(120): 11
CS: 128
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(128): 11
CS: 136
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(136): 11
CS: 144
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(144): 11
CS: 152
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(152): 11
CS: 160
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(160): 11
CS: 168
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(168): 11
CS: 88
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
Selected values Mc0C0: CS = 88, CMD = 120
Selected values Mc0C1: CS = 88, CMD = 120
Selected values Mc0C2: CS = 88, CMD = 120
Selected values Mc0C3: CS = 88, CMD = 120
Selected values Mc1C0: CS = 88, CMD = 120
Selected values Mc1C1: CS = 88, CMD = 120
Selected values Mc1C2: CS = 88, CMD = 120
Selected values Mc1C3: CS = 88, CMD = 120
Mc0C0R0 Mc0C1R0 Mc0C2R0 Mc0C3R0 Mc1C0R0 Mc1C1R0 Mc1C2R0 Mc1C3R0 Mc0C0R1 Mc0C1R1 Mc0C2R1 Mc0C3R1 Mc1C0R1 Mc1C1R1 Mc1C2R1 Mc1C3R1
CS: 88 . . . . . . . . . . . . . . . .
CS: 96 . . . . . . . . . . . . . . . .
CS: 104 . . . . . . . . . . . . . . . .
Final selected values Mc0C0: CS = 92, CMD = 120
Final selected values Mc0C1: CS = 92, CMD = 120
Final selected values Mc0C2: CS = 92, CMD = 120
Final selected values Mc0C3: CS = 92, CMD = 120
Final selected values Mc1C0: CS = 92, CMD = 120
Final selected values Mc1C1: CS = 92, CMD = 120
Final selected values Mc1C2: CS = 92, CMD = 120
Final selected values Mc1C3: CS = 92, CMD = 120
EarlyChipSelectTrainingLp4 started
PiLow = 88, PiHigh = 168 PiStep = 2
R0: MrcSendCaVrefOnDq done
Mc0Ch0 p1 Mc0Ch1 p1 Mc0Ch2 p1 Mc0Ch3 p1 Mc1Ch0 p1 Mc1Ch1 p1 Mc1Ch2 p1 Mc1Ch3 p1 Mc0Ch0 p2 Mc0Ch1 p2 Mc0Ch2 p2 Mc0Ch3 p2 Mc1Ch0 p2 Mc1Ch1 p2 Mc1Ch2 p2 Mc1Ch3 p2
CTL PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
90: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
92: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
94: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
96: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
98: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
100: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
102: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
104: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
106: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
108: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
110: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
112: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
114: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
116: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
118: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
120: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
122: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
124: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
126: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
128: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
130: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
132: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
134: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
136: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
138: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
140: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
142: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
144: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
146: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
148: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
150: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
152: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
154: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
156: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
158: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
160: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
162: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
164: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
166: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
168: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
CS training data Mc0 Ch0 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch1 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc0 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch0 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch1 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
R1: MrcSendCaVrefOnDq done
Mc0Ch0 p1 Mc0Ch1 p1 Mc0Ch2 p1 Mc0Ch3 p1 Mc1Ch0 p1 Mc1Ch1 p1 Mc1Ch2 p1 Mc1Ch3 p1 Mc0Ch0 p2 Mc0Ch1 p2 Mc0Ch2 p2 Mc0Ch3 p2 Mc1Ch0 p2 Mc1Ch1 p2 Mc1Ch2 p2 Mc1Ch3 p2
CTL PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
90: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
92: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
94: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
96: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
98: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
100: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
102: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
104: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
106: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
108: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
110: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
112: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
114: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
116: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
118: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
120: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
122: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
124: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
126: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
128: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
130: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
132: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
134: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
136: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
138: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
140: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
142: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
144: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
146: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
148: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
150: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
152: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
154: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
156: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
158: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
160: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
162: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
164: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
166: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
168: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
CS training data Mc0 Ch0 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch1 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc0 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch0 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch1 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
Finding best CS PIs:
Mc0C0 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C1 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C2 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C3 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C0 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C1 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C2 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C3 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
EarlyCaTraining started
PiLow = 88, PiHigh = 168, PiStep = 2
R0: MrcSendCaVrefOnDq done
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
CMD PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: .A4 .91 .29 .4A .25 .49 .2A .64
90: .A4 .91 .29 .4A .25 .49 .2A .64
92: .A4 .91 .29 .4A .25 .49 .2A .64
94: .A4 .91 .29 .4A .25 .49 .2A .64
96: .A4 .91 .29 .4A .25 .49 .2A .64
98: .A4 .91 .29 .4A .25 .49 .2A .64
100: .A4 .91 .29 .4A .25 .49 .2A .64
102: .A4 .91 .29 .4A .25 .49 .2A .64
104: .A4 .91 .29 .4A .25 .49 .2A .64
106: .A4 .91 .29 .4A .25 .49 .2A .64
108: .A4 .91 .29 .4A .25 .49 .2A .64
110: .A4 .91 .29 .4A .25 .49 .2A .64
112: .A4 .91 .29 .4A .25 .49 .2A .64
114: .A4 .91 .29 .4A .25 .49 .2A .64
116: .A4 .91 .29 .4A .25 .49 .2A .64
118: .A4 .91 .29 .4A .25 .49 .2A .64
120: .A4 .91 .29 .4A .25 .49 .2A .64
122: .A4 .91 .29 .4A .25 .49 .2A .64
124: .A4 .91 .29 .4A .25 .49 .2A .64
126: .A4 .91 .29 .4A .25 .49 .2A .64
128: .A4 .91 .29 .4A .25 .49 .2A .64
130: .A4 .91 .29 .4A .25 .49 .2A .64
132: .A4 .91 .29 .4A .25 .49 .2A .64
134: .A4 .91 .29 .4A .25 .49 .2A .64
136: .A4 .91 .29 .4A .25 .49 .2A .64
138: .A4 .91 .29 .4A .25 .49 .2A .64
140: .A4 .91 .29 .4A .25 .49 .2A .64
142: .A4 .91 .29 .4A .25 .49 .2A .64
144: .A4 .91 .29 .4A .25 .49 .2A .64
146: .A4 .91 .29 .4A .25 .49 .2A .64
148: .A4 .91 .29 .4A .25 .49 .2A .64
150: .A4 .91 .29 .4A .25 .49 .2A .64
152: .A4 .91 .29 .4A .25 .49 .2A .64
154: .A4 .91 .29 .4A .25 .49 .2A .64
156: .A4 .91 .29 .4A .25 .49 .2A .64
158: .A4 .91 .29 .4A .25 .49 .2A .64
160: .A4 .91 .29 .4A .25 .49 .2A .64
162: .A4 .91 .29 .4A .25 .49 .2A .64
164: .A4 .91 .29 .4A .25 .49 .2A .64
166: .A4 .91 .29 .4A .25 .49 .2A .64
168: .A4 .91 .29 .4A .25 .49 .2A .64
CA training data Mc0 Ch0 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch1 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc0 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch0 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch1 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
R1: MrcSendCaVrefOnDq done
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
CMD PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: .A4 .91 .29 .4A .25 .49 .2A .64
90: .A4 .91 .29 .4A .25 .49 .2A .64
92: .A4 .91 .29 .4A .25 .49 .2A .64
94: .A4 .91 .29 .4A .25 .49 .2A .64
96: .A4 .91 .29 .4A .25 .49 .2A .64
98: .A4 .91 .29 .4A .25 .49 .2A .64
100: .A4 .91 .29 .4A .25 .49 .2A .64
102: .A4 .91 .29 .4A .25 .49 .2A .64
104: .A4 .91 .29 .4A .25 .49 .2A .64
106: .A4 .91 .29 .4A .25 .49 .2A .64
108: .A4 .91 .29 .4A .25 .49 .2A .64
110: .A4 .91 .29 .4A .25 .49 .2A .64
112: .A4 .91 .29 .4A .25 .49 .2A .64
114: .A4 .91 .29 .4A .25 .49 .2A .64
116: .A4 .91 .29 .4A .25 .49 .2A .64
118: .A4 .91 .29 .4A .25 .49 .2A .64
120: .A4 .91 .29 .4A .25 .49 .2A .64
122: .A4 .91 .29 .4A .25 .49 .2A .64
124: .A4 .91 .29 .4A .25 .49 .2A .64
126: .A4 .91 .29 .4A .25 .49 .2A .64
128: .A4 .91 .29 .4A .25 .49 .2A .64
130: .A4 .91 .29 .4A .25 .49 .2A .64
132: .A4 .91 .29 .4A .25 .49 .2A .64
134: .A4 .91 .29 .4A .25 .49 .2A .64
136: .A4 .91 .29 .4A .25 .49 .2A .64
138: .A4 .91 .29 .4A .25 .49 .2A .64
140: .A4 .91 .29 .4A .25 .49 .2A .64
142: .A4 .91 .29 .4A .25 .49 .2A .64
144: .A4 .91 .29 .4A .25 .49 .2A .64
146: .A4 .91 .29 .4A .25 .49 .2A .64
148: .A4 .91 .29 .4A .25 .49 .2A .64
150: .A4 .91 .29 .4A .25 .49 .2A .64
152: .A4 .91 .29 .4A .25 .49 .2A .64
154: .A4 .91 .29 .4A .25 .49 .2A .64
156: .A4 .91 .29 .4A .25 .49 .2A .64
158: .A4 .91 .29 .4A .25 .49 .2A .64
160: .A4 .91 .29 .4A .25 .49 .2A .64
162: .A4 .91 .29 .4A .25 .49 .2A .64
164: .A4 .91 .29 .4A .25 .49 .2A .64
166: .A4 .91 .29 .4A .25 .49 .2A .64
168: .A4 .91 .29 .4A .25 .49 .2A .64
CA training data Mc0 Ch0 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch1 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc0 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch0 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch1 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
Finding best CMD PIs:
Mc0C0 Left Right Center
CAA 88 168 128
Mc0C1 Left Right Center
CAA 88 168 128
Mc0C2 Left Right Center
CAA 88 168 128
Mc0C3 Left Right Center
CAA 88 168 128
Mc1C0 Left Right Center
CAA 88 168 128
Mc1C1 Left Right Center
CAA 88 168 128
Mc1C2 Left Right Center
CAA 88 168 128
Mc1C3 Left Right Center
CAA 88 168 128
Mc0.Ch0 DESWIZZLE_LOW=0x825C8F948, DESWIZZLE_LOW_ERM=0x825C8F948
DqsMapCpu2Dram[0]: 0
Mc0.Ch0 Byte0 WrRetrainSwizzleControl=0x006B7948
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc0.Ch0 Byte1 WrRetrainSwizzleControl=0x016B7948
Mc0.Ch1 DESWIZZLE_HIGH=0x2508D111EB, DESWIZZLE_HIGH_ERM=0x2508D111EB
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc0.Ch1 Byte0 WrRetrainSwizzleControl=0x015311EB
DqsMapCpu2Dram[1]: 0
Mc0.Ch1 Byte1 WrRetrainSwizzleControl=0x005311EB
Mc0.Ch2 DESWIZZLE_LOW=0x8103604EE, DESWIZZLE_LOW_ERM=0x8103604EE
DqsMapCpu2Dram[0]: 0
Mc0.Ch2 Byte0 WrRetrainSwizzleControl=0x009C84EE
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc0.Ch2 Byte1 WrRetrainSwizzleControl=0x019C84EE
Mc0.Ch3 DESWIZZLE_HIGH=0x2501F904E6, DESWIZZLE_HIGH_ERM=0x2501F904E6
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc0.Ch3 Byte0 WrRetrainSwizzleControl=0x013784E6
DqsMapCpu2Dram[1]: 0
Mc0.Ch3 Byte1 WrRetrainSwizzleControl=0x003784E6
Mc1.Ch0 DESWIZZLE_LOW=0x12029897E, DESWIZZLE_LOW_ERM=0x12029897E
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc1.Ch0 Byte0 WrRetrainSwizzleControl=0x0168897E
DqsMapCpu2Dram[1]: 0
Mc1.Ch0 Byte1 WrRetrainSwizzleControl=0x0068897E
Mc1.Ch1 DESWIZZLE_HIGH=0x2C3B40F990, DESWIZZLE_HIGH_ERM=0x2C3B40F990
DqsMapCpu2Dram[0]: 0
Mc1.Ch1 Byte0 WrRetrainSwizzleControl=0x002EF990
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc1.Ch1 Byte1 WrRetrainSwizzleControl=0x012EF990
Mc1.Ch2 DESWIZZLE_LOW=0x81317895F, DESWIZZLE_LOW_ERM=0x81317895F
DqsMapCpu2Dram[0]: 0
Mc1.Ch2 Byte0 WrRetrainSwizzleControl=0x00C8895F
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc1.Ch2 Byte1 WrRetrainSwizzleControl=0x01C8895F
Mc1.Ch3 DESWIZZLE_HIGH=0x250D0A10D5, DESWIZZLE_HIGH_ERM=0x250D0A10D5
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc1.Ch3 Byte0 WrRetrainSwizzleControl=0x01F310D5
DqsMapCpu2Dram[1]: 0
Mc1.Ch3 Byte1 WrRetrainSwizzleControl=0x00F310D5
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task Early command training -- SUCCEEDED, Status = 0h. Stack Depth: 152116
Post Code: DD2Bh
MRC task -- Read Leveling training -- Started.
W Mc0.C0.R0 RxIoTclDelay: 3
W Mc0.C0.R1 RxIoTclDelay: 3
R Mc0.C0.S0 GsmIocForceOdtOn: 1
W Mc0.C1.R0 RxIoTclDelay: 3
W Mc0.C1.R1 RxIoTclDelay: 3
W Mc0.C2.R0 RxIoTclDelay: 3
W Mc0.C2.R1 RxIoTclDelay: 3
W Mc0.C3.R0 RxIoTclDelay: 3
W Mc0.C3.R1 RxIoTclDelay: 3
W Mc1.C4.R0 RxIoTclDelay: 3
W Mc1.C4.R1 RxIoTclDelay: 3
W Mc1.C5.R0 RxIoTclDelay: 3
W Mc1.C5.R1 RxIoTclDelay: 3
W Mc1.C6.R0 RxIoTclDelay: 3
W Mc1.C6.R1 RxIoTclDelay: 3
W Mc1.C7.R0 RxIoTclDelay: 3
W Mc1.C7.R1 RxIoTclDelay: 3
W Mc0.C0.S0 GsmIocForceOdtOn: 0
W Mc0.C0.S1 GsmIocForceOdtOn: 0
W Mc0.C0.S2 GsmIocForceOdtOn: 0
W Mc0.C0.S3 GsmIocForceOdtOn: 0
W Mc0.C0.S4 GsmIocForceOdtOn: 0
W Mc0.C0.S5 GsmIocForceOdtOn: 0
W Mc0.C0.S6 GsmIocForceOdtOn: 0
W Mc0.C0.S7 GsmIocForceOdtOn: 0
W Mc1.C1.S0 GsmIocForceOdtOn: 0
W Mc1.C1.S1 GsmIocForceOdtOn: 0
W Mc1.C1.S2 GsmIocForceOdtOn: 0
W Mc1.C1.S3 GsmIocForceOdtOn: 0
W Mc1.C1.S4 GsmIocForceOdtOn: 0
W Mc1.C1.S5 GsmIocForceOdtOn: 0
W Mc1.C1.S6 GsmIocForceOdtOn: 0
W Mc1.C1.S7 GsmIocForceOdtOn: 0
Rank 0
Step 1 Find Middle of high region
Ch/Byte 0 1
RcvEnPi 012345678 012345678
256: 11 00 00 00 00 00 11 00
264: 11 00 00 00 00 00 11 00
272: 11 00 00 01 11 00 01 10
280: 00 00 00 11 11 00 00 10
288: 00 11 00 11 11 00 00 11
296: 00 11 00 11 11 01 00 11
304: 00 11 11 11 11 11 00 11
312: 00 11 11 11 11 11 00 11
320: 00 11 11 11 11 11 00 11
328: 00 11 11 11 11 11 00 11
336: 00 11 11 11 11 11 10 11
344: 11 11 11 00 00 11 11 01
352: 11 11 11 00 00 11 11 01
360: 11 10 11 00 00 11 11 00
368: 11 00 01 00 00 00 11 00
376: 11 00 00 00 00 00 11 00
384: 11 00 00 00 00 00 11 00
392: 11 00 00 00 00 00 11 00
400: 11 00 00 01 11 00 01 10
408: 00 00 00 11 11 00 00 10
416: 00 00 00 11 11 00 00 11
424: 00 11 10 11 11 11 00 11
432: 00 11 11 11 11 11 00 11
440: 00 11 11 11 11 11 00 11
Mc0C0.R0: Left Right Width Center
B0: 344 400 56 372
B1: 344 400 56 372
Mc0C1.R0: Left Right Width Center
B0: 288 360 72 324
B1: 288 352 64 320
Mc0C2.R0: Left Right Width Center
B0: 304 360 56 332
B1: 304 368 64 336
Mc0C3.R0: Left Right Width Center
B0: 280 336 56 308
B1: 272 336 64 304
Mc1C0.R0: Left Right Width Center
B0: 272 336 64 304
B1: 272 336 64 304
Mc1C1.R0: Left Right Width Center
B0: 304 360 56 332
B1: 296 360 64 328
Mc1C2.R0: Left Right Width Center
B0: 336 392 56 364
B1: 344 400 56 372
Mc1C3.R0: Left Right Width Center
B0: 272 336 64 304
B1: 288 352 64 320
Step 2: Move cycle delay from Byte to Channel
Mc0.C0
Mc0.C1
Mc0.C2
Mc0.C3
Mc1.C0
Mc1.C1
Mc1.C2
Mc1.C3
Step 3: Quarter Preamble - Walk Backwards (In PI ticks)
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H
-128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H
-256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H
-384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H
-512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H
-640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H
-768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H
-896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H
-1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H
-1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H
-1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H
-1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H
-1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1664 H H -1664 H H -1664 H H -1664 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1792 H H -1792 H H -1792 H H -1792 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1920 L L -1920 L L -1920 L L -1920 L L
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 372
B1: 372
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 324
B1: 320
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 332
B1: 336
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 308
B1: 304
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 304
B1: 304
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 332
B1: 328
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 364
B1: 372
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 304
B1: 320
Step 4: Add 1qclk.
W Mc0.C0.R0.S0 RecEnDelay: 436 (0x1B4)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 436 (0x1B4)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R0.S2 RecEnDelay: 388 (0x184)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R0.S4 RecEnDelay: 396 (0x18C)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 400 (0x190)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R0.S6 RecEnDelay: 372 (0x174)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R0.S0 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R0.S2 RecEnDelay: 396 (0x18C)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 392 (0x188)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R0.S4 RecEnDelay: 428 (0x1AC)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 436 (0x1B4)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R0.S6 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 384 (0x180)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
Step 5: Walk forward to find rising edge
ChResult[Mc0][Ch0]: 0x3
ChResult[Mc0][Ch1]: 0x3
ChResult[Mc0][Ch2]: 0x3
ChResult[Mc0][Ch3]: 0x3
ChResult[Mc1][Ch0]: 0x3
ChResult[Mc1][Ch1]: 0x3
ChResult[Mc1][Ch2]: 0x3
ChResult[Mc1][Ch3]: 0x3
Step 6: Mid Preamble
Mc0.Ch0: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 29
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 368
B1: 370
Mc0.Ch1: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 27
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 318
B1: 316
Mc0.Ch2: Preamble Increment
B0, IncPreAmble 22
B1, IncPreAmble 27
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 323
B1: 332
Mc0.Ch3: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 27
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 304
B1: 300
Mc1.Ch0: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 26
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 300
B1: 299
Mc1.Ch1: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 20
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 327
B1: 317
Mc1.Ch2: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 26
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 359
B1: 367
Mc1.Ch3: Preamble Increment
B0, IncPreAmble 30
B1, IncPreAmble 22
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 303
B1: 311
Rank 1
Step 1 Find Middle of high region
Ch/Byte 0 1
RcvEnPi 012345678 012345678
256: 11 00 00 00 00 00 11 00
264: 11 00 00 01 00 00 11 00
272: 11 00 00 11 11 00 11 00
280: 00 00 00 11 11 00 11 10
288: 00 11 00 11 11 00 01 10
296: 00 11 10 11 11 00 00 11
304: 00 11 11 11 11 01 00 11
312: 00 11 11 11 11 11 00 11
320: 00 11 11 11 11 11 00 11
328: 00 11 11 11 11 11 00 11
336: 11 11 11 10 11 11 00 11
344: 11 11 11 00 00 11 10 11
352: 11 11 11 00 00 11 11 01
360: 11 00 11 00 00 11 11 01
368: 11 00 01 00 00 11 11 00
376: 11 00 00 00 00 10 11 00
384: 11 00 00 00 00 00 11 00
392: 11 00 00 00 00 00 11 00
400: 11 00 00 11 11 00 11 00
408: 00 00 00 11 11 00 11 00
416: 00 11 00 11 11 00 01 10
424: 00 11 10 11 11 00 00 11
432: 00 11 11 11 11 01 00 11
440: 00 11 11 11 11 11 00 11
Mc0C0.R1: Left Right Width Center
B0: 336 400 64 368
B1: 336 400 64 368
Mc0C1.R1: Left Right Width Center
B0: 288 352 64 320
B1: 288 352 64 320
Mc0C2.R1: Left Right Width Center
B0: 296 360 64 328
B1: 304 368 64 336
Mc0C3.R1: Left Right Width Center
B0: 272 336 64 304
B1: 264 328 64 296
Mc1C0.R1: Left Right Width Center
B0: 272 336 64 304
B1: 272 336 64 304
Mc1C1.R1: Left Right Width Center
B0: 312 376 64 344
B1: 304 368 64 336
Mc1C2.R1: Left Right Width Center
B0: 344 408 64 376
B1: 352 416 64 384
Mc1C3.R1: Left Right Width Center
B0: 280 344 64 312
B1: 296 360 64 328
Step 2: Move cycle delay from Byte to Channel
Mc0.C0
Mc0.C1
Mc0.C2
Mc0.C3
Mc1.C0
Mc1.C1
Mc1.C2
Mc1.C3
Step 3: Quarter Preamble - Walk Backwards (In PI ticks)
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H
-128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H
-256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H
-384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H
-512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H
-640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H
-768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H
-896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H
-1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H
-1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H
-1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H
-1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H
-1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1664 H H -1664 H H -1664 H H -1664 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1792 H H -1792 H H -1792 H H -1792 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1920 L L -1920 L L -1920 L L -1920 L L
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 368
B1: 368
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 320
B1: 320
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 328
B1: 336
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 304
B1: 296
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 304
B1: 304
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 344
B1: 336
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 376
B1: 384
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 312
B1: 328
Step 4: Add 1qclk.
W Mc0.C0.R1.S0 RecEnDelay: 432 (0x1B0)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R1.S1 RecEnDelay: 432 (0x1B0)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1.S2 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R1.S3 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R1.S4 RecEnDelay: 392 (0x188)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R1.S5 RecEnDelay: 400 (0x190)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R1.S6 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R1.S7 RecEnDelay: 360 (0x168)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R1.S0 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R1.S1 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R1.S2 RecEnDelay: 408 (0x198)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R1.S3 RecEnDelay: 400 (0x190)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R1.S4 RecEnDelay: 440 (0x1B8)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R1.S5 RecEnDelay: 448 (0x1C0)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R1.S6 RecEnDelay: 376 (0x178)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R1.S7 RecEnDelay: 392 (0x188)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
Step 5: Walk forward to find rising edge
ChResult[Mc0][Ch0]: 0x3
ChResult[Mc0][Ch1]: 0x3
ChResult[Mc0][Ch2]: 0x3
ChResult[Mc0][Ch3]: 0x3
ChResult[Mc1][Ch0]: 0x3
ChResult[Mc1][Ch1]: 0x3
ChResult[Mc1][Ch2]: 0x3
ChResult[Mc1][Ch3]: 0x3
Step 6: Mid Preamble
Mc0.Ch0: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 26
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 363
B1: 363
Mc0.Ch1: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 22
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 314
B1: 311
Mc0.Ch2: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 25
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 322
B1: 330
Mc0.Ch3: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 31
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 300
B1: 296
Mc1.Ch0: Preamble Increment
B0, IncPreAmble 33
B1, IncPreAmble 33
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 306
B1: 306
Mc1.Ch1: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 23
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 338
B1: 328
Mc1.Ch2: Preamble Increment
B0, IncPreAmble 28
B1, IncPreAmble 25
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 373
B1: 378
Mc1.Ch3: Preamble Increment
B0, IncPreAmble 29
B1, IncPreAmble 21
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 310
B1: 318
W Mc0.C0.S0 GsmIocForceOdtOn: 1
W Mc0.C0.S1 GsmIocForceOdtOn: 1
W Mc0.C0.S2 GsmIocForceOdtOn: 1
W Mc0.C0.S3 GsmIocForceOdtOn: 1
W Mc0.C0.S4 GsmIocForceOdtOn: 1
W Mc0.C0.S5 GsmIocForceOdtOn: 1
W Mc0.C0.S6 GsmIocForceOdtOn: 1
W Mc0.C0.S7 GsmIocForceOdtOn: 1
W Mc1.C1.S0 GsmIocForceOdtOn: 1
W Mc1.C1.S1 GsmIocForceOdtOn: 1
W Mc1.C1.S2 GsmIocForceOdtOn: 1
W Mc1.C1.S3 GsmIocForceOdtOn: 1
W Mc1.C1.S4 GsmIocForceOdtOn: 1
W Mc1.C1.S5 GsmIocForceOdtOn: 1
W Mc1.C1.S6 GsmIocForceOdtOn: 1
W Mc1.C1.S7 GsmIocForceOdtOn: 1
Step 7: Program RcvEn Delays and Rx FIFO Timing
W Mc0.C0 RoundTripIoComp: 18 (0x12)
W Mc0.C0 RxDqDataValidDclkDelay: 25 (0x19)
W Mc0.C0.R0 RxIoTclDelay: 0
W Mc0.C0.R0 RxFifoRdEnTclDelay: 8
W Mc0.C0.R0 RoundTripDelay: 88 (0x58)
W Mc0.C0.R0.S0 RecEnDelay: 496 (0x1F0)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 498 (0x1F2)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1 RxIoTclDelay: 0
W Mc0.C0.R1 RxFifoRdEnTclDelay: 8
W Mc0.C0.R1 RoundTripDelay: 88 (0x58)
W Mc0.C0.R1.S0 RecEnDelay: 491 (0x1EB)
W Mc0.C0.R0.S0 RxFlybyDelay: 6
W Mc0.C0.R1.S1 RecEnDelay: 491 (0x1EB)
W Mc0.C0.R0.S1 RxFlybyDelay: 6
W Mc0.C1 RoundTripIoComp: 17 (0x11)
W Mc0.C1 RxDqDataValidDclkDelay: 24 (0x18)
W Mc0.C1.R0 RxIoTclDelay: 0
W Mc0.C1.R0 RxFifoRdEnTclDelay: 9
W Mc0.C1.R0 RoundTripDelay: 87 (0x57)
W Mc0.C0.R0.S2 RecEnDelay: 574 (0x23E)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 572 (0x23C)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C1.R1 RxIoTclDelay: 0
W Mc0.C1.R1 RxFifoRdEnTclDelay: 9
W Mc0.C1.R1 RoundTripDelay: 87 (0x57)
W Mc0.C0.R1.S2 RecEnDelay: 570 (0x23A)
W Mc0.C0.R0.S2 RxFlybyDelay: 8
W Mc0.C0.R1.S3 RecEnDelay: 567 (0x237)
W Mc0.C0.R0.S3 RxFlybyDelay: 8
W Mc0.C2 RoundTripIoComp: 18 (0x12)
W Mc0.C2 RxDqDataValidDclkDelay: 25 (0x19)
W Mc0.C2.R0 RxIoTclDelay: 0
W Mc0.C2.R0 RxFifoRdEnTclDelay: 8
W Mc0.C2.R0 RoundTripDelay: 88 (0x58)
W Mc0.C0.R0.S4 RecEnDelay: 451 (0x1C3)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 460 (0x1CC)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C2.R1 RxIoTclDelay: 0
W Mc0.C2.R1 RxFifoRdEnTclDelay: 8
W Mc0.C2.R1 RoundTripDelay: 88 (0x58)
W Mc0.C0.R1.S4 RecEnDelay: 450 (0x1C2)
W Mc0.C0.R0.S4 RxFlybyDelay: 6
W Mc0.C0.R1.S5 RecEnDelay: 458 (0x1CA)
W Mc0.C0.R0.S5 RxFlybyDelay: 6
W Mc0.C3 RoundTripIoComp: 17 (0x11)
W Mc0.C3 RxDqDataValidDclkDelay: 24 (0x18)
W Mc0.C3.R0 RxIoTclDelay: 0
W Mc0.C3.R0 RxFifoRdEnTclDelay: 9
W Mc0.C3.R0 RoundTripDelay: 87 (0x57)
W Mc0.C0.R0.S6 RecEnDelay: 560 (0x230)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 556 (0x22C)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C3.R1 RxIoTclDelay: 0
W Mc0.C3.R1 RxFifoRdEnTclDelay: 9
W Mc0.C3.R1 RoundTripDelay: 87 (0x57)
W Mc0.C0.R1.S6 RecEnDelay: 556 (0x22C)
W Mc0.C0.R0.S6 RxFlybyDelay: 8
W Mc0.C0.R1.S7 RecEnDelay: 552 (0x228)
W Mc0.C0.R0.S7 RxFlybyDelay: 8
W Mc1.C4 RoundTripIoComp: 15 (0xF)
W Mc1.C4 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C4.R0 RxIoTclDelay: 0
W Mc1.C4.R0 RxFifoRdEnTclDelay: 9
W Mc1.C0.R0 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R0.S0 RecEnDelay: 556 (0x22C)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 555 (0x22B)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C4.R1 RxIoTclDelay: 0
W Mc1.C4.R1 RxFifoRdEnTclDelay: 9
W Mc1.C0.R1 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R1.S0 RecEnDelay: 562 (0x232)
W Mc1.C1.R0.S0 RxFlybyDelay: 8
W Mc1.C1.R1.S1 RecEnDelay: 562 (0x232)
W Mc1.C1.R0.S1 RxFlybyDelay: 8
W Mc1.C5 RoundTripIoComp: 15 (0xF)
W Mc1.C5 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C5.R0 RxIoTclDelay: 0
W Mc1.C5.R0 RxFifoRdEnTclDelay: 10 (0xA)
W Mc1.C1.R0 RoundTripDelay: 80 (0x50)
W Mc1.C1.R0.S2 RecEnDelay: 583 (0x247)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 573 (0x23D)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C5.R1 RxIoTclDelay: 0
W Mc1.C5.R1 RxFifoRdEnTclDelay: 10 (0xA)
W Mc1.C1.R1 RoundTripDelay: 80 (0x50)
W Mc1.C1.R1.S2 RecEnDelay: 594 (0x252)
W Mc1.C1.R0.S2 RxFlybyDelay: 8
W Mc1.C1.R1.S3 RecEnDelay: 584 (0x248)
W Mc1.C1.R0.S3 RxFlybyDelay: 8
W Mc1.C6 RoundTripIoComp: 16 (0x10)
W Mc1.C6 RxDqDataValidDclkDelay: 21 (0x15)
W Mc1.C6.R0 RxIoTclDelay: 0
W Mc1.C6.R0 RxFifoRdEnTclDelay: 8
W Mc1.C2.R0 RoundTripDelay: 80 (0x50)
W Mc1.C1.R0.S4 RecEnDelay: 487 (0x1E7)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 495 (0x1EF)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C6.R1 RxIoTclDelay: 0
W Mc1.C6.R1 RxFifoRdEnTclDelay: 8
W Mc1.C2.R1 RoundTripDelay: 80 (0x50)
W Mc1.C1.R1.S4 RecEnDelay: 501 (0x1F5)
W Mc1.C1.R0.S4 RxFlybyDelay: 6
W Mc1.C1.R1.S5 RecEnDelay: 506 (0x1FA)
W Mc1.C1.R0.S5 RxFlybyDelay: 6
W Mc1.C7 RoundTripIoComp: 15 (0xF)
W Mc1.C7 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C7.R0 RxIoTclDelay: 0
W Mc1.C7.R0 RxFifoRdEnTclDelay: 9
W Mc1.C3.R0 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R0.S6 RecEnDelay: 559 (0x22F)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 567 (0x237)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C7.R1 RxIoTclDelay: 0
W Mc1.C7.R1 RxFifoRdEnTclDelay: 9
W Mc1.C3.R1 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R1.S6 RecEnDelay: 566 (0x236)
W Mc1.C1.R0.S6 RxFlybyDelay: 8
W Mc1.C1.R1.S7 RecEnDelay: 574 (0x23E)
W Mc1.C1.R0.S7 RxFlybyDelay: 8
Adjusted Receive Enable Settings.
Mc0.Ch0.R0:
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 496
B1: 498
Mc0.Ch0.R1:
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 491
B1: 491
Mc0.Ch1.R0:
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 574
B1: 572
Mc0.Ch1.R1:
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 570
B1: 567
Mc0.Ch2.R0:
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 451
B1: 460
Mc0.Ch2.R1:
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 450
B1: 458
Mc0.Ch3.R0:
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 560
B1: 556
Mc0.Ch3.R1:
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 556
B1: 552
Mc1.Ch0.R0:
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 556
B1: 555
Mc1.Ch0.R1:
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 562
B1: 562
Mc1.Ch1.R0:
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 583
B1: 573
Mc1.Ch1.R1:
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 594
B1: 584
Mc1.Ch2.R0:
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 487
B1: 495
Mc1.Ch2.R1:
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 501
B1: 506
Mc1.Ch3.R0:
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 559
B1: 567
Mc1.Ch3.R1:
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 566
B1: 574
MRC task Read Leveling training -- SUCCEEDED, Status = 0h. Stack Depth: 154060
Post Code: DD2Ah
MRC task -- CPGC-Based Read MPR training -- Started.
Setting MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 1
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
Setting MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 1
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 8
W Mc0.C0 GsmMctRDRDdr: 8
W Mc0.C1 GsmMctRDRDdg: 8
W Mc0.C1 GsmMctRDRDdr: 8
W Mc1.C0 GsmMctRDRDdg: 8
W Mc1.C0 GsmMctRDRDdr: 8
W Mc1.C1 GsmMctRDRDdg: 8
W Mc1.C1 GsmMctRDRDdr: 8
--- CPGC-based RDMPR ---
Rank = 0
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-62 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-61 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-60 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-59 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-58 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-57 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-56 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-55 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-54 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-53 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-51 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-49 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-47 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-45 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-43 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-41 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-39 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-37 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00BF 0x000000000000FFFF 0x00FF
-35 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFD 0x00DF 0x000000000000FFFF 0x00BB 0x000000000000FF3F 0x00FF
-34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x0000000000005FFF 0x00FF 0x0000000000002B71 0x00DF 0x000000000000FFFF 0x00BB 0x000000000000FF34 0x00FF
-33 # # # # # # # # # # # # # # # # 0x000000000000FF7F 0x00FF 0x000000000000FFFF 0x00FF 0x0000000000007FFF 0x00FF 0x000000000000FFFF 0x00FF 0x0000000000005FFF 0x00FF 0x000000000000FFF1 0x00DF 0x000000000000FFFF 0x00BB 0x0000000000007F24 0x00FF
-32 # # # # # # # # # . . . # # . # 0x000000000000FF17 0x003B 0x000000000000FFFF 0x00FF 0x0000000000007F7E 0x00BF 0x000000000000FFFF 0x00FF 0x000000000000001D 0x00FF 0x0000000000000000 0x0000 0x000000000000FF58 0x003B 0x0000000000007F00 0x00FE
-31 # # # # # # # # # . # # # # . # 0x0000000000007F03 0x000E 0x000000000000BDFF 0x00FF 0x000000000000037F 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000001F 0x00F8 0x0000000000002B75 0x0032 0x000000000000FF10 0x00BB 0x0000000000002D00 0x000E
-30 . # # # # # # # . . . . . # . # 0x0000000000000F00 0x000C 0x00000000000001FF 0x00FF 0x0000000000000356 0x00CE 0x000000000000FFFF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000005F00 0x0018 0x0000000000000500 0x0002
-29 . . # . # # # # . . . . . # . # 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000140 0x0002 0x00000000000010FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000005F00 0x0018 0x0000000000000500 0x0002
-28 . . # . # . # # . . . . . # . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000040 0x0002 0x00000000000030FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000800 0x0018 0x0000000000000000 0x0000
-27 . . # . . . # # . . . . . # . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000010FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000800 0x0008 0x0000000000000000 0x0000
-26 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-25 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-24 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-23 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000BF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-22 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000AD 0x003E 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-21 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000020 0x000E 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-20 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-19 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000FE 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-18 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000FF 0x00FC 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-17 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000F0 0x00CC 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-16 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000F4 0x00FB 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-15 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-14 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-13 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-12 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-11 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-10 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-9 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-8 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-7 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-6 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-5 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-4 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-3 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-2 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
0 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
2 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
3 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
4 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
MC0.C0.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -29 4 33 -13 19
MC0.C1.R0: Left Right Width Center RxDqsPN
B0: -20 4 24 -8 24
B1: -29 4 33 -13 19
MC0.C2.R0: Left Right Width Center RxDqsPN
B0: -27 4 31 -12 20
B1: -28 4 32 -12 20
MC0.C3.R0: Left Right Width Center RxDqsPN
B0: -15 4 19 -6 26
B1: -26 4 30 -11 21
MC1.C0.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -32 4 36 -14 18
MC1.C1.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -30 4 34 -13 19
MC1.C2.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -26 4 30 -11 21
MC1.C3.R0: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -28 4 32 -12 20
--- CPGC-based RDMPR ---
Rank = 1
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-62 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-61 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-60 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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MC0.C0.R1: Left Right Width Center RxDqsPN
B0: -29 4 33 -13 19
B1: -29 4 33 -13 19
MC0.C1.R1: Left Right Width Center RxDqsPN
B0: -20 4 24 -8 24
B1: -28 4 32 -12 20
MC0.C2.R1: Left Right Width Center RxDqsPN
B0: -27 4 31 -12 20
B1: -29 4 33 -13 19
MC0.C3.R1: Left Right Width Center RxDqsPN
B0: -15 4 19 -6 26
B1: -26 4 30 -11 21
MC1.C0.R1: Left Right Width Center RxDqsPN
B0: -28 4 32 -12 20
B1: -31 4 35 -14 18
MC1.C1.R1: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -29 4 33 -13 19
MC1.C2.R1: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -30 4 34 -13 19
MC1.C3.R1: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -29 4 33 -13 19
Revert MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 0
Revert MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task CPGC-Based Read MPR training -- SUCCEEDED, Status = 0h.
Post Code: DD2Ch
MRC task -- Jedec Write Leveling training -- Started.
Rank 0
Ch0 Ch1
WLDelay 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
192: .32 .30 .32 .32 .32 .30 .32 .30 .30 .30 .30 .30 .30 .32 .32 .30
194: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
196: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
198: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
200: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
202: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
204: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
206: .32 .32 .32 .32 .32 #2 .32 .32 .32 .32 .32 .32 .32 .32 .32 #2
208: .32 .32 .32 .32 .32 #0 .32 .32 .32 .32 #2 .32 .32 #2 .32 #0
210: #2 #2 .23 .32 .32 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
212: #0 #0 #2 .32 #10 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
214: #0 #0 #0 .32 #0 #0 #2 .32 .32 .32 #0 #2 #2 #0 #2 #0
216: #0 #0 #0 #2 #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0
218: #0 #0 #0 #0 #0 #0 #0 #6 .32 #3 #0 #0 #0 #0 #0 #0
220: #0 #0 #0 #0 #0 #0 #0 #0 #2 #0 #0 #0 #0 #0 #0 #0
222: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
224: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
226: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
228: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
230: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
232: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
234: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
236: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
238: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
240: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
242: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
244: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
246: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
248: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
250: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
252: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
254: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
256: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
258: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
260: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
262: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
264: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
266: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
268: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
270: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
272: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
274: #0 #0 #0 #0 #0 .22 #0 #0 #0 #0 #0 #0 #0 .30 #0 .30
276: .30 #0 #0 #0 #0 .32 #0 #0 #0 #0 .30 #0 #0 .32 #0 .32
278: .32 .30 .29 #0 #0 .32 #0 #0 #0 #0 .32 #0 #0 .32 #0 .32
280: .32 .32 .32 #0 #0 .32 #0 #0 #0 #0 .32 #0 #4 .32 #0 .32
282: .32 .32 .32 #0 .30 .32 .30 #0 #0 #0 .32 .30 .30 .32 .30 .32
284: .32 .32 .32 .27 .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32
286: .32 .32 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32
288: .32 .32 .32 .32 .32 .32 .32 .30 #0 .30 .32 .32 .32 .32 .32 .32
290: .32 .32 .32 .32 .32 .32 .32 .32 .30 .32 .32 .32 .32 .32 .32 .32
292: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
294: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
296: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
298: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
300: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
302: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
304: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
306: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
308: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
310: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
312: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
314: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
316: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
318: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
InitPassSt InitPassEn CurrPassSt CurrPassEn LargPassSt LargPassEn
Mc0
C0
B0: 192 208 276 336 276 336
B1: 192 208 278 336 278 336
C1
B0: 192 210 278 338 278 338
B1: 192 214 284 342 284 342
C2
B0: 192 210 282 338 282 338
B1: 192 204 274 332 274 332
C3
B0: 192 212 282 340 282 340
B1: 192 216 288 344 288 344
Mc1
C0
B0: 192 218 290 346 290 346
B1: 192 216 288 344 288 344
C1
B0: 192 206 276 334 276 334
B1: 192 212 282 340 282 340
C2
B0: 192 212 282 340 282 340
B1: 192 206 274 334 274 334
C3
B0: 192 212 282 340 282 340
B1: 192 204 274 332 274 332
W Mc0.C0 GsmMccOdtOn: 0
W Mc0.C0 GsmMccMprTrainDdrOn: 0
Mc0.C0.R0: LftEdge Width
B0: 276 60
B1: 278 58
Mc0.C0.R0: DqsPi DqPi
B0: 276 308
B1: 278 310
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc0.C1.R0: LftEdge Width
B0: 278 60
B1: 284 58
Mc0.C1.R0: DqsPi DqPi
B0: 278 310
B1: 284 316
W Mc0.C1 GsmMccOdtOn: 0
W Mc0.C1 GsmMccMprTrainDdrOn: 0
Mc0.C2.R0: LftEdge Width
B0: 282 56
B1: 274 58
Mc0.C2.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc0.C3.R0: LftEdge Width
B0: 282 58
B1: 288 56
Mc0.C3.R0: DqsPi DqPi
B0: 282 314
B1: 288 320
W Mc1.C0 GsmMccOdtOn: 0
W Mc1.C0 GsmMccMprTrainDdrOn: 0
Mc1.C0.R0: LftEdge Width
B0: 290 56
B1: 288 56
Mc1.C0.R0: DqsPi DqPi
B0: 290 322
B1: 288 320
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc1.C1.R0: LftEdge Width
B0: 276 58
B1: 282 58
Mc1.C1.R0: DqsPi DqPi
B0: 276 308
B1: 282 314
W Mc1.C1 GsmMccOdtOn: 0
W Mc1.C1 GsmMccMprTrainDdrOn: 0
Mc1.C2.R0: LftEdge Width
B0: 282 58
B1: 274 60
Mc1.C2.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc1.C3.R0: LftEdge Width
B0: 282 58
B1: 274 58
Mc1.C3.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
Rank 1
Ch0 Ch1
WLDelay 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
192: .30 .30 .30 .30 .30 .32 .32 .30 .30 .30 .30 .30 .30 .32 .32 .30
194: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
196: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
198: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
200: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
202: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
204: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
206: .32 .32 .32 .32 .32 .28 .32 .32 .32 .32 .30 .32 .32 #2 .32 #2
208: .32 .32 .32 .32 .32 #2 .32 .32 .32 .32 #2 .32 .32 #0 .32 #0
210: #2 #2 .32 .32 .32 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
212: #0 #0 #2 .32 .32 #0 .32 .32 .32 .32 #0 #13 .32 #0 .32 #0
214: #0 #0 #0 .32 #2 #0 #2 .32 .32 .32 #0 #0 #2 #0 #2 #0
216: #0 #0 #0 .30 #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0
218: #0 #0 #0 #2 #0 #0 #0 .32 .32 #2 #0 #0 #0 #0 #0 #0
220: #0 #0 #0 #0 #0 #0 #0 #2 #2 #0 #0 #0 #0 #0 #0 #0
222: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
224: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
226: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
228: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
230: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
232: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
234: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
236: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
238: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
240: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
242: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
244: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
246: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
248: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
250: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
252: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
254: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
256: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
258: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
260: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
262: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
264: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
266: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
268: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
270: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
272: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
274: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 .30 #0 .30
276: #0 .30 #0 #0 #0 .30 #0 #0 #0 #0 #0 #0 #0 .32 #0 .32
278: .30 .32 #0 #0 #0 .32 #0 #0 #0 #0 .30 #0 .29 .32 #0 .32
280: .32 .32 .30 #0 #0 .32 #0 #0 #0 #0 .32 #0 .31 .32 #0 .32
282: .32 .32 .32 #0 #0 .32 .23 #0 #0 #0 .32 #5 .32 .32 #9 .32
284: .32 .32 .32 #0 .30 .32 .32 #0 #0 #0 .32 .28 .32 .32 .31 .32
286: .32 .32 .32 .29 .32 .32 .32 .30 #0 #0 .32 .32 .32 .32 .32 .32
288: .32 .32 .32 .32 .32 .32 .32 .32 #0 .29 .32 .32 .32 .32 .32 .32
290: .32 .32 .32 .32 .32 .32 .32 .32 .30 .32 .32 .32 .32 .32 .32 .32
292: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
294: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
296: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
298: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
300: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
302: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
304: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
306: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
308: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
310: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
312: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
314: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
316: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
318: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
InitPassSt InitPassEn CurrPassSt CurrPassEn LargPassSt LargPassEn
Mc0
C0
B0: 192 208 278 336 278 336
B1: 192 208 276 336 276 336
C1
B0: 192 210 280 338 280 338
B1: 192 216 286 344 286 344
C2
B0: 192 212 284 340 284 340
B1: 192 206 276 334 276 334
C3
B0: 192 212 282 340 282 340
B1: 192 218 286 346 286 346
Mc1
C0
B0: 192 218 290 346 290 346
B1: 192 216 288 344 288 344
C1
B0: 192 206 278 334 278 334
B1: 192 210 284 338 284 338
C2
B0: 192 212 278 340 278 340
B1: 192 204 274 332 274 332
C3
B0: 192 212 284 340 284 340
B1: 192 204 274 332 274 332
W Mc0.C0 GsmMccOdtOn: 0
W Mc0.C0 GsmMccMprTrainDdrOn: 0
Mc0.C0.R1: LftEdge Width
B0: 278 58
B1: 276 60
Mc0.C0.R1: DqsPi DqPi
B0: 278 310
B1: 276 308
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc0.C1.R1: LftEdge Width
B0: 280 58
B1: 286 58
Mc0.C1.R1: DqsPi DqPi
B0: 280 312
B1: 286 318
W Mc0.C1 GsmMccOdtOn: 0
W Mc0.C1 GsmMccMprTrainDdrOn: 0
Mc0.C2.R1: LftEdge Width
B0: 284 56
B1: 276 58
Mc0.C2.R1: DqsPi DqPi
B0: 284 316
B1: 276 308
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc0.C3.R1: LftEdge Width
B0: 282 58
B1: 286 60
Mc0.C3.R1: DqsPi DqPi
B0: 282 314
B1: 286 318
W Mc1.C0 GsmMccOdtOn: 0
W Mc1.C0 GsmMccMprTrainDdrOn: 0
Mc1.C0.R1: LftEdge Width
B0: 290 56
B1: 288 56
Mc1.C0.R1: DqsPi DqPi
B0: 290 322
B1: 288 320
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc1.C1.R1: LftEdge Width
B0: 278 56
B1: 284 54
Mc1.C1.R1: DqsPi DqPi
B0: 278 310
B1: 284 316
W Mc1.C1 GsmMccOdtOn: 0
W Mc1.C1 GsmMccMprTrainDdrOn: 0
Mc1.C2.R1: LftEdge Width
B0: 278 62
B1: 274 58
Mc1.C2.R1: DqsPi DqPi
B0: 278 310
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc1.C3.R1: LftEdge Width
B0: 284 56
B1: 274 58
Mc1.C3.R1: DqsPi DqPi
B0: 284 316
B1: 274 306
MRC task Jedec Write Leveling training -- SUCCEEDED, Status = 0h.
Post Code: DD4Eh
MRC task -- Write Leveling FlyBy training -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Params : DqSweepStart: -52, DqSweepStop: 18, DQ_SWEEP_STEP: 2
Rank 0
Params : MaxDec: 18, MaxAdd: 14, PiCycleDec: 2, PiCycleAdd: 13
MinCode: 274, MaxCode: 322, Start: -20, End: 27
Sweep through the cycle offsets until we find a value that passes
Channel 0 1
Delay DqOffset Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
-20 -52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -32 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -30 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -28 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -26 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -24 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -22 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -20 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 0 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
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Rank 1
Params : MaxDec: 18, MaxAdd: 14, PiCycleDec: 2, PiCycleAdd: 13
MinCode: 274, MaxCode: 322, Start: -20, End: 27
Sweep through the cycle offsets until we find a value that passes
Channel 0 1
Delay DqOffset Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
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252
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257
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262
267
263
250
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255
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W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Leveling FlyBy training -- SUCCEEDED, Status = 0h.
Post Code: DD2Eh
MRC task -- Write Timing Centering -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-86 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-83 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-82 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-81 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-80 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-79 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-78 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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84 # # # # # # # # # # # # # # # # 0x1AB0_0 0x1840_0 0x1C29_0 0x184E_0 0x1A10_0 0x1CCF_0 0x1A8D_0 0x1C5F_0
85 # # # # # # # # # # # # # # # # 0x18FD_0 0x182E_0 0x1AC1_0 0x1833_0 0x1924_0 0x1C23_0 0x1955_0 0x1C9F_0
86 # # # # # # # # # # # # # # # # 0x185A_0 0x1816_0 0x18F5_0 0x1802_0 0x1857_0 0x1A23_0 0x1892_0 0x1A89_0
Mc0.C0.R0: Left Right Width Center
B0: -39 11 50 -14
B1: -40 12 52 -14
Mc0.C1.R0: Left Right Width Center
B0: -39 4 43 -18
B1: -39 11 50 -14
Mc0.C2.R0: Left Right Width Center
B0: -37 14 51 -12
B1: -39 13 52 -13
Mc0.C3.R0: Left Right Width Center
B0: -38 1 39 -19
B1: -39 12 51 -14
Mc1.C0.R0: Left Right Width Center
B0: -37 15 52 -11
B1: -38 14 52 -12
Mc1.C1.R0: Left Right Width Center
B0: -40 12 52 -14
B1: -36 15 51 -11
Mc1.C2.R0: Left Right Width Center
B0: -37 14 51 -12
B1: -39 13 52 -13
Mc1.C3.R0: Left Right Width Center
B0: -36 17 53 -10
B1: -37 13 50 -12
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-86 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-85 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-84 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-83 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-82 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-81 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-80 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-79 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-78 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-77 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-76 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-75 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-73 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-72 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-71 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-70 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-69 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-68 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-67 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-66 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-65 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-64 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-63 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-62 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-61 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-60 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-59 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-58 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-57 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-56 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-55 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-54 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EC_0 0x17EF_0 0x17E6_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-53 # # # # # # # # # # # # # # # # 0x17ED_0 0x17CE_0 0x17EF_0 0x17CD_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-52 # # # # # # # # # # # # # # # # 0x17E5_0 0x17B7_0 0x17EA_0 0x17BB_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-51 # # # # # # # # # # # # # # # # 0x17D5_0 0x17A0_0 0x17CB_0 0x1780_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-50 # # # # # # # # # # # # # # # # 0x17C0_0 0x1750_0 0x17BE_0 0x1734_0 0x17EF_0 0x17EF_0 0x17EB_0 0x17EE_0
-49 # # # # # # # # # # # # # # # # 0x17B3_0 0x1701_0 0x17A1_0 0x1699_0 0x17ED_0 0x17EF_0 0x17D8_0 0x17ED_0
-48 # # # # # # # # # # # # # # # # 0x1799_0 0x1484_0 0x1745_0 0x113D_0 0x17E6_0 0x17EC_0 0x17BF_0 0x17D7_0
-47 # # # # # # # # # # # # # # # # 0x16F7_0 0xEE8_0 0x1711_0 0xBAF_0 0x17CB_0 0x17D2_0 0x17AB_0 0x17C9_0
-46 # # # # # # # # # # # # # # # # 0x1591_0 0x80B_0 0x1560_0 0x5ED_0 0x1795_0 0x17B0_0 0x1766_0 0x17C0_0
-45 # # # # # # # # # # # # # # # # 0x120D_0 0x570_0 0xDA1_0 0x327_0 0x1741_0 0x17A1_0 0x172E_0 0x1789_0
-44 # # # # # # # # # # # # # # # # 0xC5B_0 0x350_0 0x4F9_0 0x15F_0 0x150A_0 0x1785_0 0x1690_0 0x1723_0
-43 # # # # # # . # # # # # # # # # 0x4E1_0 0x1F0_0 0x2AD_0 0x71_0 0xE81_0 0x175D_0 0x11D6_0 0x14A4_0
-42 # # # # # # . # # # # # # # # # 0x116_0 0xF0_0 0x17C_0 0x3_0 0x741_0 0x16CC_0 0x9F6_0 0x1031_0
-41 # # # # # # . . # # # # # # # # 0x47_0 0x8_0 0x17_0 0x0_0 0x2D5_0 0x1034_0 0x398_0 0x62D_0
-40 # . . # # . . . # # # # # # # # 0x14_0 0x3_0 0x1_0 0x0_0 0x13B_0 0x56B_0 0x140_0 0x358_0
-39 . . . . . . . . # # # # # # # # 0x0_0 0x0_0 0x0_0 0x0_0 0x39_0 0x2D4_0 0x9A_0 0x1CA_0
-38 . . . . . . . . # . # # # . # # 0x0_0 0x0_0 0x0_0 0x0_0 0x1_0 0x122_0 0xE_0 0x38_0
-37 . . . . . . . . . . # # # . # # 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x52_0 0x1_0 0x6_0
-36 . . . . . . . . . . . # # . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x7_0 0x1_0 0x0_0
-35 . . . . . . . . . . . # . . . # 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x2_0
-34 . . . . . . . . . . . # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x5_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x89_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x1A7_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . # . . . # . . . . . . . . . 0x0_0 0xF_0 0x0_0 0x6CA_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . # . . . # . . . . . . . . . 0x0_0 0x6A_0 0x0_0 0xBBA_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . # . . . # . . . . . . . . . 0x0_0 0x2A9_0 0x0_0 0xE86_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . # . . . # . . . . . . . . . 0x0_0 0x948_0 0x0_0 0xF74_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . # . . . # . . . . . . . . . 0x0_0 0xE04_0 0x0_0 0xFDE_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . # . . . # . . . . . . . . . 0x0_0 0xFB0_0 0x0_0 0xFF4_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . # . . . # . . . . . . . . . 0x0_0 0xFEF_0 0x0_0 0xFF7_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . # # . # # # . . . . . . . . 0x0_0 0xFF5_0 0x2_0 0x1006_0 0x0_0 0x0_0 0x0_0 0x0_0
13 # # # # . # # # . . . . . . . . 0xD9_0 0x1009_0 0x82_0 0x1144_0 0x0_0 0x0_0 0x0_0 0x0_0
14 # # # # . # # # . . . . . . . . 0x400_0 0x1029_0 0x235_0 0x13FB_0 0x0_0 0x0_0 0x0_0 0x0_0
15 # # # # # # # # . . . . . # . # 0xC7C_0 0x1160_0 0xAC0_0 0x16A4_0 0x0_0 0x0_0 0x1_0 0x1A_0
16 # # # # # # # # . . # . . # . # 0x107C_0 0x1404_0 0x10BF_0 0x1730_0 0x0_0 0x3_0 0x11_0 0xD0_0
17 # # # # # # # # # # # . . # # # 0x1204_0 0x1625_0 0x12C3_0 0x17DB_0 0x3_0 0x46_0 0x220_0 0x5D8_0
18 # # # # # # # # # # # . # # # # 0x13FF_0 0x1747_0 0x1496_0 0x17EC_0 0xBE_0 0x4B2_0 0x736_0 0xC47_0
19 # # # # # # # # # # # # # # # # 0x162E_0 0x17E0_0 0x165D_0 0x17EC_0 0xBE5_0 0xE09_0 0xDA3_0 0xFF0_0
20 # # # # # # # # # # # # # # # # 0x1787_0 0x17EC_0 0x179D_0 0x17EC_0 0x1124_0 0x1010_0 0x10A1_0 0x10D7_0
21 # # # # # # # # # # # # # # # # 0x17CE_0 0x17EC_0 0x17E9_0 0x17EC_0 0x15F4_0 0x11D2_0 0x13B7_0 0x128D_0
22 # # # # # # # # # # # # # # # # 0x17E5_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17A2_0 0x13B1_0 0x1687_0 0x1497_0
23 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EA_0 0x164A_0 0x17C0_0 0x1709_0
24 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x1776_0 0x17E4_0 0x17D1_0
25 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17E6_0 0x17EC_0 0x17EC_0
26 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
27 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
28 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
29 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
30 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
31 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
32 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
33 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
34 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
35 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
36 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
37 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
38 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
39 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
40 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
41 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
42 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
43 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
44 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
45 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
46 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
47 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
48 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
49 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
50 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
51 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
52 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
53 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
54 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
55 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
56 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
57 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
58 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
59 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
60 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
61 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
62 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
63 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
64 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
65 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
66 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17F0_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
67 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x181D_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
68 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x185B_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
69 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EF_0 0x17EC_0 0x19AE_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
70 # # # # # # # # # # # # # # # # 0x17EC_0 0x1800_0 0x17EC_0 0x1AC5_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
71 # # # # # # # # # # # # # # # # 0x17EC_0 0x1896_0 0x17EC_0 0x1B81_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
72 # # # # # # # # # # # # # # # # 0x17EC_0 0x1A39_0 0x17EC_0 0x1BA2_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
73 # # # # # # # # # # # # # # # # 0x17EC_0 0x1B6C_0 0x17EC_0 0x1BCC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
74 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BB5_0 0x17EC_0 0x1BCF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
75 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BCF_0 0x17EC_0 0x1BCF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
76 # # # # # # # # # # # # # # # # 0x17EF_0 0x1BD0_0 0x17EC_0 0x1BD5_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
77 # # # # # # # # # # # # # # # # 0x180D_0 0x1BD3_0 0x180B_0 0x1C05_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
78 # # # # # # # # # # # # # # # # 0x194A_0 0x1BE4_0 0x18B6_0 0x1CD1_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
79 # # # # # # # # # # # # # # # # 0x1AA1_0 0x1BFA_0 0x1A61_0 0x1D1E_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17F0_0
80 # # # # # # # # # # # # # # # # 0x1BEC_0 0x1C32_0 0x1BE2_0 0x1C05_0 0x17EC_0 0x17EE_0 0x17FF_0 0x183A_0
81 # # # # # # # # # # # # # # # # 0x1C49_0 0x1B41_0 0x1C64_0 0x1A88_0 0x17EC_0 0x1809_0 0x1865_0 0x1966_0
82 # # # # # # # # # # # # # # # # 0x1C5B_0 0x18EA_0 0x1C45_0 0x18F1_0 0x183A_0 0x193D_0 0x19D7_0 0x1B06_0
83 # # # # # # # # # # # # # # # # 0x1BE5_0 0x185A_0 0x1ABD_0 0x188C_0 0x1A8F_0 0x1B25_0 0x1B27_0 0x1BBC_0
84 # # # # # # # # # # # # # # # # 0x1AE3_0 0x1847_0 0x1900_0 0x1859_0 0x1BB0_0 0x1BB3_0 0x1BCD_0 0x1BFC_0
85 # # # # # # # # # # # # # # # # 0x1948_0 0x1849_0 0x187E_0 0x1807_0 0x1B53_0 0x1C1C_0 0x1B5F_0 0x1BE4_0
86 # # # # # # # # # # # # # # # # 0x180A_0 0x180C_0 0x1815_0 0x17E7_0 0x1904_0 0x1C70_0 0x192F_0 0x19F9_0
Mc0.C0.R1: Left Right Width Center
B0: -39 12 51 -14
B1: -40 12 52 -14
Mc0.C1.R1: Left Right Width Center
B0: -40 3 43 -19
B1: -39 11 50 -14
Mc0.C2.R1: Left Right Width Center
B0: -39 14 53 -13
B1: -40 11 51 -15
Mc0.C3.R1: Left Right Width Center
B0: -43 1 44 -21
B1: -41 11 52 -15
Mc1.C0.R1: Left Right Width Center
B0: -37 16 53 -11
B1: -38 16 54 -11
Mc1.C1.R1: Left Right Width Center
B0: -36 15 51 -11
B1: -33 18 51 -8
Mc1.C2.R1: Left Right Width Center
B0: -35 17 52 -9
B1: -38 14 52 -12
Mc1.C3.R1: Left Right Width Center
B0: -36 16 52 -10
B1: -34 14 48 -10
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD4Bh
MRC task -- Write Voltage Centering -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
WriteVoltage
-40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc1.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc1.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
WriteVoltage
-40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc1.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD57h
MRC task -- Read Voltage Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
ReadVoltage
-63 # # # # # # # # # # # # # # # # 0x1B47_0 0x1A8C_0 0x1362_0 0x1BE7_0 0x13A4_0 0x14C3_0 0x1B8C_0 0x15F5_0
-62 # # # # # # # # # # # # # # # # 0x1904_0 0x1948_0 0x1251_0 0x1A76_0 0x126C_0 0x1395_0 0x198D_0 0x1419_0
-61 # # # # # # # # # # # # # # # # 0x1660_0 0x1831_0 0x11B6_0 0x1957_0 0x114F_0 0x12CB_0 0x17A2_0 0x1227_0
-60 # # # # # # # # # # # # # # # # 0x141C_0 0x16E2_0 0x1109_0 0x183C_0 0x103D_0 0x11E7_0 0x1615_0 0x1068_0
-59 # # # # # # # # # # # # # # # # 0x120A_0 0x160C_0 0x1005_0 0x17A7_0 0xE9B_0 0x107E_0 0x1420_0 0xEF9_0
-58 # # # # # # # # # # # # # # # # 0xF2D_0 0x14D3_0 0xEDE_0 0x167A_0 0xD1B_0 0xF0E_0 0x1257_0 0xE13_0
-57 # # # # # # # # # # # # # # # # 0xCB1_0 0x13B8_0 0xDF8_0 0x150B_0 0xB88_0 0xE09_0 0xFEF_0 0xD3D_0
-56 # # # # # # # # # # # # # # # # 0xAC9_0 0x121B_0 0xCF3_0 0x12FE_0 0x9D7_0 0xCC8_0 0xE24_0 0xC20_0
-55 # # # # # # # # # # # # # # # # 0x92C_0 0xFF5_0 0xB3A_0 0x10F9_0 0x756_0 0xBB5_0 0xBE8_0 0xAA8_0
-54 # # # # # # # # # # # # # # # # 0x7C8_0 0xDBF_0 0x969_0 0xF73_0 0x5C9_0 0xAC2_0 0xA06_0 0x8E9_0
-53 # # # # # # # # # # # # # # # # 0x65C_0 0xBB4_0 0x780_0 0xDCF_0 0x4CD_0 0x9F2_0 0x830_0 0x6BB_0
-52 # # # # # # # # # # # # # # # # 0x59A_0 0xA69_0 0x627_0 0xC99_0 0x45C_0 0x930_0 0x6E3_0 0x571_0
-51 # # # # # # # # # # # # # # # # 0x4BC_0 0x97D_0 0x4EF_0 0xBE8_0 0x412_0 0x827_0 0x5F8_0 0x4AC_0
-50 # # # # # # # # # # # # # # # # 0x3EF_0 0x82E_0 0x434_0 0xA7A_0 0x3DB_0 0x6FD_0 0x503_0 0x44A_0
-49 # # # # # # # # # # # # # # # # 0x311_0 0x766_0 0x3E8_0 0x95B_0 0x37B_0 0x5C7_0 0x420_0 0x3EA_0
-48 # # # # # # # # # # # # # # # # 0x249_0 0x65C_0 0x37F_0 0x806_0 0x2D0_0 0x524_0 0x359_0 0x36A_0
-47 # # # # # # # # # # # # # # # # 0x13D_0 0x4E6_0 0x293_0 0x694_0 0x179_0 0x459_0 0x25D_0 0x232_0
-46 # # # # # # # # # # # # # # # # 0x86_0 0x357_0 0x198_0 0x54E_0 0xAA_0 0x3AA_0 0x19B_0 0xEA_0
-45 # # # # # # # # # . # # # # # # 0x3D_0 0x223_0 0xA6_0 0x441_0 0x31_0 0x301_0 0xA7_0 0x45_0
-44 # # # # . # # # # . # # # # # # 0x1C_0 0x185_0 0x26_0 0x368_0 0x19_0 0x2B0_0 0x55_0 0xA_0
-43 # . # # . # # . # . # # # # . . 0x8_0 0xE0_0 0x5_0 0x29C_0 0x2_0 0x265_0 0x24_0 0x0_0
-42 # . # . . . # . # . # # # . . . 0x3_0 0x92_0 0x0_0 0x20D_0 0x1_0 0x20E_0 0x17_0 0x0_0
-41 # . # . . . # . . . # # # . . . 0x1_0 0x4E_0 0x0_0 0x188_0 0x0_0 0x17D_0 0x9_0 0x0_0
-40 . . # . . . # . # . # # # . . . 0x0_0 0x31_0 0x0_0 0x153_0 0x1_0 0xFC_0 0xA_0 0x0_0
-39 . . # . . . # . . . # # # . . . 0x0_0 0x1D_0 0x0_0 0xF8_0 0x0_0 0x89_0 0x4_0 0x0_0
-38 . . # . . . # . . . # . # . . . 0x0_0 0xF_0 0x0_0 0xBD_0 0x0_0 0x53_0 0x1_0 0x0_0
-37 . . # . . . # . . . # . . . . . 0x0_0 0x8_0 0x0_0 0x87_0 0x0_0 0x20_0 0x0_0 0x0_0
-36 . . # . . . # . . . # . . . . . 0x0_0 0x4_0 0x0_0 0x73_0 0x0_0 0xA_0 0x0_0 0x0_0
-35 . . # . . . # . . . # . . . . . 0x0_0 0x3_0 0x0_0 0x43_0 0x0_0 0x2_0 0x0_0 0x0_0
-34 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x26_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x1C_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x10_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0xA_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x4_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x5_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x7_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xA_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xC_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x12_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x25_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x36_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x5D_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x69_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xBD_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0xE0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x14E_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . # . . . # . . . # . . . . . 0x0_0 0x4_0 0x0_0 0x16F_0 0x0_0 0x2_0 0x0_0 0x0_0
39 . . # . . . # . . . # . . . . . 0x0_0 0x7_0 0x0_0 0x1DA_0 0x0_0 0x7_0 0x0_0 0x0_0
40 . . # . . . # . . . # . . . . . 0x0_0 0x12_0 0x0_0 0x20D_0 0x0_0 0x14_0 0x0_0 0x0_0
41 . # # . . . # . . . # . # . . . 0x1_0 0x1B_0 0x0_0 0x267_0 0x0_0 0x56_0 0x4_0 0x0_0
42 . # # . . # # . . . # . # . . . 0x1_0 0x36_0 0x1_0 0x2C4_0 0x0_0 0x96_0 0x4_0 0x0_0
43 . # # # . # # . . . # # # . . . 0x1_0 0x5D_0 0x1_0 0x383_0 0x0_0 0x1C4_0 0xB_0 0x0_0
44 . # # # . # # . . . # # # # . # 0x1_0 0xB2_0 0xE_0 0x402_0 0x0_0 0x2B3_0 0x13_0 0x2_0
45 # # # # # # # . . . # # # # . # 0x5_0 0x121_0 0x2F_0 0x490_0 0x0_0 0x3B0_0 0x25_0 0x7_0
46 # # # # # # # . . . # # # # . # 0xB_0 0x1C8_0 0x89_0 0x598_0 0x0_0 0x465_0 0x34_0 0x25_0
47 # # # # # # # # . . # # # # . # 0x19_0 0x2BD_0 0x12F_0 0x64C_0 0x0_0 0x551_0 0x6E_0 0x66_0
48 # # # # # # # # . . # # # # # # 0x4A_0 0x435_0 0x252_0 0x732_0 0x0_0 0x61E_0 0xC1_0 0xE6_0
49 # # # # # # # # # # # # # # # # 0xDD_0 0x6BA_0 0x40D_0 0x8AF_0 0x3_0 0x780_0 0x1CB_0 0x1BB_0
50 # # # # # # # # # # # # # # # # 0x161_0 0x7FC_0 0x50F_0 0x9E1_0 0xB_0 0x855_0 0x295_0 0x22F_0
51 # # # # # # # # # # # # # # # # 0x30F_0 0xB21_0 0x6A0_0 0xBD2_0 0x79_0 0x996_0 0x4D3_0 0x328_0
52 # # # # # # # # # # # # # # # # 0x43F_0 0xC6B_0 0x794_0 0xDCC_0 0xE0_0 0xA2F_0 0x660_0 0x3EE_0
53 # # # # # # # # # # # # # # # # 0x6CC_0 0xE75_0 0x8AD_0 0xF68_0 0x20D_0 0xB44_0 0x82D_0 0x4E7_0
54 # # # # # # # # # # # # # # # # 0x951_0 0x100A_0 0x9D3_0 0x117E_0 0x41F_0 0xC3A_0 0xA6A_0 0x5ED_0
55 # # # # # # # # # # # # # # # # 0xC3E_0 0x1171_0 0xBC1_0 0x1368_0 0x6F5_0 0xD2C_0 0xD08_0 0x6FC_0
56 # # # # # # # # # # # # # # # # 0xE20_0 0x1263_0 0xD23_0 0x14AA_0 0x93C_0 0xE20_0 0xE83_0 0x7DB_0
57 # # # # # # # # # # # # # # # # 0x10D0_0 0x13E2_0 0xEEE_0 0x162E_0 0xB67_0 0xF2F_0 0x10B3_0 0x99F_0
58 # # # # # # # # # # # # # # # # 0x1243_0 0x14B4_0 0x1013_0 0x1756_0 0xDEF_0 0x107B_0 0x11FA_0 0xB36_0
59 # # # # # # # # # # # # # # # # 0x1414_0 0x15B6_0 0x10E8_0 0x1865_0 0x1068_0 0x11CF_0 0x142B_0 0xCF4_0
60 # # # # # # # # # # # # # # # # 0x1505_0 0x1674_0 0x11B6_0 0x1A24_0 0x124A_0 0x1308_0 0x15FA_0 0xE2C_0
61 # # # # # # # # # # # # # # # # 0x1813_0 0x18C9_0 0x130B_0 0x1C94_0 0x142F_0 0x145A_0 0x1805_0 0x107C_0
62 # # # # # # # # # # # # # # # # 0x1ABA_0 0x1A3E_0 0x141D_0 0x1EEC_0 0x14C9_0 0x15A7_0 0x1AAB_0 0x12A5_0
63 # # # # # # # # # # # # # # # # 0x1E53_0 0x1CBC_0 0x15B9_0 0x2179_0 0x15E2_0 0x17C6_0 0x1D29_0 0x1498_0
Mc0.C0.R0: Left Right Width Center
B0: -40 44 84 2
B1: -43 40 83 -2
Mc0.C1.R0: Left Right Width Center
B0: -29 35 64 3
B1: -42 42 84 0
Mc0.C2.R0: Left Right Width Center
B0: -44 44 88 0
B1: -42 41 83 -1
Mc0.C3.R0: Left Right Width Center
B0: -20 18 38 -1
B1: -43 46 89 1
Mc1.C0.R0: Left Right Width Center
B0: -39 48 87 4
B1: -45 48 93 1
Mc1.C1.R0: Left Right Width Center
B0: -34 37 71 1
B1: -38 42 80 2
Mc1.C2.R0: Left Right Width Center
B0: -37 40 77 1
B1: -42 43 85 0
Mc1.C3.R0: Left Right Width Center
B0: -43 47 90 2
B1: -43 43 86 0
MRC task Read Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD2Fh
MRC task -- Read Timing Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-62 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-61 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-60 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-59 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-58 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-57 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-56 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-55 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-54 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-53 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-52 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-51 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-50 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-49 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-48 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-47 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-46 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17EC_0 0x17ED_0 0x17ED_0
-45 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17E0_0 0x17EC_0 0x17ED_0
-44 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17E8_0 0x17ED_0 0x17ED_0 0x1753_0 0x17E8_0 0x17EC_0
-43 # # # # # # # # # # # # # # # # 0x17EC_0 0x17ED_0 0x17BA_0 0x17ED_0 0x17ED_0 0x16D8_0 0x17E7_0 0x17CF_0
-42 # # # # # # # # # # # # # # # # 0x17E0_0 0x17ED_0 0x1778_0 0x17ED_0 0x17ED_0 0x15FF_0 0x17C8_0 0x172E_0
-41 # # # # # # # # # # # # # # # # 0x17D8_0 0x17EC_0 0x1725_0 0x17ED_0 0x17EC_0 0x1543_0 0x17A4_0 0x16CA_0
-40 # # # # # # # # # # # # # # # # 0x17AF_0 0x17D9_0 0x1629_0 0x17ED_0 0x17D7_0 0x136D_0 0x1722_0 0x14F3_0
-39 # # # # # # # # # # # # # # # # 0x175B_0 0x176D_0 0x14A9_0 0x17E8_0 0x1739_0 0x1172_0 0x1622_0 0x1354_0
-38 # # # # # # # # # # # # # # # # 0x169B_0 0x16BE_0 0x12A7_0 0x17D6_0 0x15A5_0 0xEC8_0 0x14C4_0 0x1159_0
-37 # # # # # # # # # # # # # # # # 0x152E_0 0x160D_0 0xF7C_0 0x178A_0 0x13F3_0 0xBDC_0 0x1370_0 0xED5_0
-36 # # # # # # # # # # # # # # # # 0x1222_0 0x1510_0 0xBDE_0 0x1730_0 0x1072_0 0x772_0 0x1136_0 0x92A_0
-35 # # # # # # # # # # # # # # # # 0xE7D_0 0x141E_0 0x8B5_0 0x16A0_0 0xC1A_0 0x4C6_0 0xFB4_0 0x5B7_0
-34 # # # # # # # # # # # # # # # # 0xAD3_0 0x1347_0 0x5B6_0 0x15E1_0 0x730_0 0x252_0 0xE0E_0 0x3BB_0
-33 # # # # # # # # # # # # # # # # 0x7CD_0 0x1296_0 0x415_0 0x1505_0 0x465_0 0x10B_0 0xBD2_0 0x271_0
-32 # # # # # # # # # . # # # # # # 0x3B4_0 0x11DD_0 0x24B_0 0x1422_0 0x1AC_0 0x8E_0 0x8C4_0 0x15F_0
-31 # # # # # # # # # . # # # # . # 0x112_0 0x1074_0 0x145_0 0x12F9_0 0xD9_0 0x26_0 0x54F_0 0x39_0
-30 # # # # # # # # # . # . # # . # 0x5E_0 0xF6D_0 0x98_0 0x120F_0 0x5A_0 0x1_0 0x2E2_0 0x4_0
-29 # . # # # # # # # . # . # # . # 0xA_0 0xD6B_0 0xE_0 0x1135_0 0x9_0 0x2_0 0x15C_0 0x2_0
-28 . . # . # . # # . . . . . # . # 0x0_0 0x988_0 0x1_0 0xF87_0 0x0_0 0x0_0 0x2B_0 0x2_0
-27 . . # . . . # # . . . . . # . . 0x0_0 0x6D4_0 0x0_0 0xE75_0 0x0_0 0x0_0 0x1_0 0x0_0
-26 . . # . . . # # . . . . . # . . 0x0_0 0x502_0 0x0_0 0xDD6_0 0x0_0 0x0_0 0x2_0 0x0_0
-25 . . # . . . # # . . . . . . . . 0x0_0 0x356_0 0x0_0 0xCC5_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . # . . . # . . . . . . . . . 0x0_0 0x1A8_0 0x0_0 0xB17_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . # . . . # . . . . . . . . . 0x0_0 0x50_0 0x0_0 0x8B0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . # . . . # . . . . . . . . . 0x0_0 0x27_0 0x0_0 0x664_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . # . . . # . . . . . . . . . 0x0_0 0x11_0 0x0_0 0x511_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x302_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1A6_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xF2_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x89_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1F_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -29 5 34 -12
Mc0.C1.R0: Left Right Width Center
B0: -19 5 24 -7
B1: -28 5 33 -12
Mc0.C2.R0: Left Right Width Center
B0: -27 5 32 -11
B1: -28 5 33 -12
Mc0.C3.R0: Left Right Width Center
B0: -13 5 18 -4
B1: -24 5 29 -10
Mc1.C0.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -32 5 37 -14
Mc1.C1.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -30 5 35 -13
Mc1.C2.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -25 5 30 -10
Mc1.C3.R0: Left Right Width Center
B0: -31 5 36 -13
B1: -27 5 32 -11
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-62 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-61 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-60 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-59 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-58 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-57 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-56 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-55 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-54 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
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-39 # # # # # # # # # # # # # # # # 0x1754_0 0x173E_0 0x151A_0 0x17EA_0 0x170F_0 0x128C_0 0x1776_0 0x13D6_0
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-36 # # # # # # # # # # # # # # # # 0x1162_0 0x1490_0 0xB29_0 0x174E_0 0xF77_0 0x571_0 0x12D7_0 0xAAC_0
-35 # # # # # # # # # # # # # # # # 0xCAE_0 0x13E8_0 0x730_0 0x16E0_0 0xB06_0 0x2C3_0 0x1040_0 0x759_0
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-32 # # # # # # # # # # # # # # . # 0x31E_0 0x1195_0 0x112_0 0x144B_0 0x1F7_0 0x5B_0 0x4B1_0 0x20D_0
-31 # # # # # # # # # . # # . # . # 0x117_0 0xFFE_0 0x9_0 0x1307_0 0x69_0 0x4_0 0x12D_0 0xBF_0
-30 # # # # # # # # # . . . . # . # 0x35_0 0xE9A_0 0x3_0 0x1214_0 0x10_0 0x0_0 0x34_0 0x18_0
-29 # # # # # # # # . . . # . # . # 0x17_0 0xD5E_0 0x1_0 0x117B_0 0x0_0 0x1_0 0xC_0 0x3_0
-28 . # # # . . # # . . . . . . . . 0x1_0 0x97A_0 0x0_0 0x103C_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . # . . . # # . . . . . . . . 0x0_0 0x634_0 0x0_0 0xF31_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . # . . . # . . . . . . . . . 0x0_0 0x442_0 0x0_0 0xE2C_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . # . . . # . . . . . . . . . 0x0_0 0x2EE_0 0x0_0 0xD05_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . # . . . # . . . . . . . . . 0x0_0 0x1B6_0 0x0_0 0xB03_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . # . . . # . . . . . . . . . 0x0_0 0xA0_0 0x0_0 0x8CC_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . # . . . # . . . . . . . . . 0x0_0 0x4A_0 0x0_0 0x714_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . # . . . # . . . . . . . . . 0x0_0 0x11_0 0x0_0 0x539_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . # . . . # . . . . . . . . . 0x0_0 0x7_0 0x0_0 0x345_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1D4_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x114_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xA8_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x36_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x8_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -28 5 33 -12
B1: -27 5 32 -11
Mc0.C1.R1: Left Right Width Center
B0: -19 5 24 -7
B1: -27 5 32 -11
Mc0.C2.R1: Left Right Width Center
B0: -28 5 33 -12
B1: -28 5 33 -12
Mc0.C3.R1: Left Right Width Center
B0: -13 5 18 -4
B1: -26 5 31 -11
Mc1.C0.R1: Left Right Width Center
B0: -29 5 34 -12
B1: -31 5 36 -13
Mc1.C1.R1: Left Right Width Center
B0: -30 5 35 -13
B1: -28 5 33 -12
Mc1.C2.R1: Left Right Width Center
B0: -31 5 36 -13
B1: -28 5 33 -12
Mc1.C3.R1: Left Right Width Center
B0: -32 5 37 -14
B1: -28 5 33 -12
MRC task Read Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD38h
MRC task -- Write Timing Centering 2D Before Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 250 260 260 210 220 250 250 250 260 260 260 190 200 250 260 260 260 260 260 260 260 250 260 250 260 260 260 260 270 250 250 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 250 230 240 200 210 220 220 220 250 240 240 190 200 220 250 240 230 240 250 240 250 210 250 240 250 250 250 230 250 230 230
Weighted Center 2 1 1 0 2 0 1 2 -1 1 1 2 1 0 1 0
Final Center 74 73 69 72 76 73 68 74 74 75 73 77 75 73 77 74
Edges we pass on to GetMarginBit are
230 230 240 230 210 200 220 220 240 230 240 240 200 190 240 230 230 240 250 240 250 240 230 230 250 240 250 250 240 240 230 230
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ....#... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0707070707070707 ......## 0x0707070707070707 ........ 0x0707070707070707 .....##. 0x0707070709070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ......## 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ....#... 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 .....#.. 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 .......# 0x0707070707070707 ........
0x0606060606060707 ......$$ 0x0606060606060606 ........ 0x0606060606070706 .....$$# 0x0606060609060606 ....$.#. 0x0606060606060606 ........ 0x0606060606060707 ...#..$$ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060607060606 ....$... 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606070606 .....$.. 0x0606060606060606 ........ 0x0606060606060606 .#...... 0x0606060606060607 .......$ 0x0606060606060606 ....#.##
0x0505050505050707 ......$$ 0x0505050505050505 ........ 0x0505050505070706 .....$$$ 0x0505050509050605 ....$.$. 0x0505050505050505 ........ 0x0505050605050707 ...$..$$ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050507050505 ....$#.# 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505070505 .....$.. 0x0505050505050505 .....#.. 0x0506050505050505 .$..#... 0x0505050505050507 .......$ 0x0505050506050606 ....$.$$
0x0404040404040707 ......$$ 0x0404040404040404 ...#.... 0x0404040404070706 .....$$$ 0x0404040409040604 ....$.$. 0x0404040404040404 ........ 0x0404040604040707 ..#$..$$ 0x0404040404040404 ........ 0x0404040404040404 .......# 0x0404040407050405 ....$$#$ 0x0404040404040404 ........ 0x0404040404040404 ...#...# 0x0404040404070404 ....#$.# 0x0404040404050404 #....$.. 0x0406040405040404 .$..$... 0x0404040404040407 .#.....$ 0x0404040406040606 .#..$.$$
0x0303030303030707 ......$$ 0x0303030403030303 ...$.#.# 0x0303030303070706 .#...$$$ 0x0303030309030603 ....$.$. 0x0303030303030303 ........ 0x0303040603030707 ..$$..$$ 0x0303030303030303 ........ 0x0303030303030304 .......$ 0x0303030307050405 ....$$$$ 0x0303030303030303 .#...... 0x0303030403030304 .#.$.#.$ 0x0303030304070304 ..#.$$.$ 0x0403030303050303 $....$.. 0x0306030305030303 #$..$... 0x0304030303030307 .$..#..$ 0x0304030306030606 .$.#$.$$
0x0202020202020707 ..##..$$ 0x0202020402030203 ...$.$#$ 0x0203020202070706 .$###$$$ 0x0202020209020602 ..#.$.$. 0x0202020202020202 .......# 0x0202040602020707 ..$$##$$ 0x0202020202020202 ....#..# 0x0202020202020204 .......$ 0x0202020207050405 ....$$$$ 0x0203020202020202 .$...... 0x0203020402030204 .$.$.$.$ 0x0202030204070204 #.$#$$.$ 0x0402020202050202 $....$.. 0x0306020205020202 $$#.$.#. 0x0204020203020207 #$..$..$ 0x0204020306020606 .$.$$#$$
0x0101020201010707 ..$$#.$$ 0x0101010401030203 #..$#$$$ 0x0103020202070706 .$$$$$$$ 0x0101020109010601 ..$.$.$. 0x0101010101010102 ...#...$ 0x0101040602020707 ..$$$$$$ 0x0101010102010102 ....$..$ 0x0101010101010104 .....#.$ 0x0101010107050405 .#..$$$$ 0x0103010101010101 .$...... 0x0103010401030104 .$.$.$.$ 0x0201030204070104 $#$$$$#$ 0x0401010101050101 $##.#$#. 0x0306020105010201 $$$.$.$. 0x0204010103010107 $$..$##$ 0x0104010306020606 .$.$$$$$
0x0000020201000707 ..$$$#$$ 0x0100000401030203 $.#$$$$$ 0x0003020202070706 #$$$$$$$ 0x0000020009000600 #.$.$#$# 0x0000000100000002 .#.$...$ 0x0000040602020707 .#$$$$$$ 0x0000000002000002 ....$..$ 0x0000000000010004 .....$.$ 0x0001000007050405 .$#.$$$$ 0x0003000000000000 .$##.##. 0x0003000400030004 .$#$.$#$ 0x0201030204070104 $$$$$$$$ 0x0401010001050100 $$$.$$$# 0x0306020005000200 $$$#$#$# 0x0204000003010107 $$##$$$$ 0x0004000306020606 .$#$$$$$
+--MrcGetMarginBit, rsign = 1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ...##... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ..#..... 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090707090909 ....#... 0x0909090909090909 ........ 0x0909090909090909 ....#... 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 #.#.#.## 0x0909090909090909 ........ 0x0909090909090909 #.##.... 0x0909090909090909 ........ 0x0909090909090909 ...#.... 0x0909070909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A07060A0A0A #..$##.. 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A090A0A0A ....$.#. 0x0A0A0A0A0A0A0A0A #....... 0x0A0A0A0A0A0A0A0A ....###. 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x090A090A090A0909 $.$.$.$$ 0x0A0A0A0A0A0A0A0A ........ 0x090A09090A0A0A0A $.$$.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A090A0A0A0A #..$.... 0x0A0A070A0A0A0A0A ..$..... 0x0A0A0A0A0A0A0A0A ..#.....
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B .#...... 0x0A0B0B07050A0B0B $##$.$.# 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B090B0A0B ..#.$.$. 0x0A0B0B0B0B0B0B0B $#...... 0x0B0B0B0B0A0A0A0B ....$$$. 0x0B0B0B0B0B0B0B0B ....#... 0x0B0B0B0B0B0B0B0B #....... 0x090B090B090B0909 $#$#$#$$ 0x0B0B0B0B0B0B0B0B #...#... 0x090B09090B0B0B0B $#$$#... 0x0B0B0B0B0B0B0B0B ...#.... 0x0A0B0B090B0B0B0B $..$.... 0x0B0B070B0B0B0B0B ..$..... 0x0B0B0A0B0B0B0B0B ..$.....
0x0C0C0C0C0C0C0C0C .#...... 0x0C0B0C0C0C0C0C0C .$#..... 0x0A0B0B07050A0C0B $$$$$$.$ 0x0C0C0C0C0C0C0C0C ...#.#.# 0x0C0C0B0C090C0A0C ..$.$.$. 0x0A0B0C0C0C0C0C0C $$...... 0x0C0C0C0C0A0A0A0C ....$$$. 0x0C0C0C0C0B0C0C0C ..##$... 0x0B0C0C0C0C0C0C0C $.##.... 0x090B090B090B0909 $$$$$$$$ 0x0B0C0C0C0B0C0C0C $...$... 0x090B09090B0C0C0C $$$$$... 0x0C0C0C0B0C0C0C0C ...$#... 0x0A0C0C090C0C0C0C $.#$...# 0x0C0C070C0C0C0C0C ..$##... 0x0C0C0A0C0C0C0C0C #.$..#..
0x0D0C0D0D0D0D0D0D .$...... 0x0D0B0C0D0D0D0D0D .$$#.... 0x0A0B0B07050A0D0B $$$$$$.$ 0x0D0D0D0C0D0C0D0C ...$.$.$ 0x0D0D0B0D090D0A0D ..$.$.$. 0x0A0B0D0D0D0D0D0D $$...... 0x0D0D0D0D0A0A0A0D ..#.$$$# 0x0D0D0C0C0B0D0D0D ..$$$.#. 0x0B0D0C0C0D0D0D0D $.$$.... 0x090B090B090B0909 $$$$$$$$ 0x0B0D0D0D0B0D0D0D $...$... 0x090B09090B0D0D0D $$$$$### 0x0D0D0D0B0C0D0D0D ...$$..# 0x0A0D0C090D0D0D0C $.$$...$ 0x0D0D070C0C0D0D0D #.$$$#.. 0x0C0D0A0D0D0C0D0D $.$..$..
0x0E0C0E0E0E0E0E0E .$...... 0x0E0B0C0D0E0E0E0E .$$$.#.. 0x0A0B0B07050A0E0B $$$$$$.$ 0x0E0E0E0C0E0C0E0C ###$.$.$ 0x0E0E0B0E090E0A0E ..$.$#$. 0x0A0B0E0E0E0E0E0E $$#..... 0x0E0E0D0E0A0A0A0D ..$.$$$$ 0x0E0E0C0C0B0E0D0E ..$$$.$. 0x0B0E0C0C0E0E0E0E $.$$.... 0x090B090B090B0909 $$$$$$$$ 0x0B0E0E0E0B0E0E0E $...$... 0x090B09090B0D0D0D $$$$$$$$ 0x0E0E0E0B0C0E0E0D .##$$..$ 0x0A0E0C090E0E0E0C $.$$.#.$ 0x0D0E070C0C0D0E0E $#$$$$## 0x0C0E0A0E0E0C0E0E $.$#.$..
0x0F0C0F0F0F0F0F0F .$...... 0x0F0B0C0D0F0E0F0F #$$$#$.. 0x0A0B0B07050A0F0B $$$$$$.$ 0x0E0E0E0C0F0C0F0C $$$$.$.$ 0x0F0F0B0F090E0A0F .#$.$$$. 0x0A0B0E0F0F0F0F0F $$$..... 0x0F0F0D0F0A0A0A0D .#$#$$$$ 0x0F0F0C0C0B0F0D0F ..$$$#$. 0x0B0F0C0C0F0F0F0F $#$$#... 0x090B090B090B0909 $$$$$$$$ 0x0B0F0F0F0B0F0F0F $...$... 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C0F0F0D #$$$$.#$ 0x0A0F0C090F0E0F0C $.$$.$.$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C0F0A0E0F0C0F0F $.$$.$..
0x100C101010101010 #$...... 0x0F0B0C0D0F0E1010 $$$$$$#. 0x0A0B0B07050A100B $$$$$$#$ 0x0E0E0E0C100C100C $$$$.$#$ 0x100F0B10090E0A10 #$$.$$$. 0x0A0B0E1010101010 $$$..#.. 0x100F0D0F0A0A0A0D .$$$$$$$ 0x10100C0C0B0F0D10 ##$$$$$# 0x0B0F0C0C0F101010 $$$$$##. 0x090B090B090B0909 $$$$$$$$ 0x0B1010100B101010 $...$.#. 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$#$$ 0x0A100C09100E100C $#$$.$#$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C100A0E100C1010 $.$$.$..
0x100C111111111111 $$...#.. 0x0F0B0C0D0F0E1011 $$$$$$$. 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$#$$$ 0x100F0B11090E0A11 $$$#$$$. 0x0A0B0E1111101111 $$$.#$.. 0x110F0D0F0A0A0A0D .$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$# 0x090B090B090B0909 $$$$$$$$ 0x0B1111110B111011 $.#.$.$. 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$#$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C110A0E110C1111 $.$$.$#.
0x100C121212111212 $$..#$.. 0x0F0B0C0D0F0E1012 $$$$$$$. 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$$$$$ 0x100F0B11090E0A12 $$$$$$$. 0x0A0B0E1211101212 $$$.$$.. 0x120F0D0F0A0A0A0D .$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$$ 0x090B090B090B0909 $$$$$$$$ 0x0B1211120B121012 $.$.$.$. 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$$$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C120A0E120C1112 $.$$.$$.
0x100C131312111313 $$.#$$.. 0x0F0B0C0D0F0E1013 $$$$$$$. 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$$$$$ 0x100F0B11090E0A13 $$$$$$$# 0x0A0B0E1311101313 $$$#$$#. 0x130F0D0F0A0A0A0D #$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$$ 0x090B090B090B0909 $$$$$$$$ 0x0B1311130B131013 $.$.$#$# 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$$$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C130A0E130C1113 $#$$#$$.
0x100C141312111414 $$#$$$#. 0x0F0B0C0D0F0E1014 $$$$$$$. 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$$$$$ 0x100F0B11090E0A13 $$$$$$$$ 0x0A0B0E1311101314 $$$$$$$# 0x130F0D0F0A0A0A0D $$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$$ 0x090B090B090B0909 $$$$$$$$ 0x0B1411140B131013 $.$.$$$$ 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$$$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C130A0E130C1114 $$$$$$$.
0x100C141312111415 $$$$$$$. 0x0F0B0C0D0F0E1015 $$$$$$$# 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$$$$$ 0x100F0B11090E0A13 $$$$$$$$ 0x0A0B0E1311101314 $$$$$$$$ 0x130F0D0F0A0A0A0D $$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$$ 0x090B090B090B0909 $$$$$$$$ 0x0B1511150B131013 $#$.$$$$ 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$$$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C130A0E130C1115 $$$$$$$.
0x100C141312111416 $$$$$$$. 0x0F0B0C0D0F0E1015 $$$$$$$$ 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$$$$$ 0x100F0B11090E0A13 $$$$$$$$ 0x0A0B0E1311101314 $$$$$$$$ 0x130F0D0F0A0A0A0D $$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$$ 0x090B090B090B0909 $$$$$$$$ 0x0B1511160B131013 $$$.$$$$ 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$$$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C130A0E130C1116 $$$$$$$#
0x100C141312111417 $$$$$$$# 0x0F0B0C0D0F0E1015 $$$$$$$$ 0x0A0B0B07050A100B $$$$$$$$ 0x0E0E0E0C110C100C $$$$$$$$ 0x100F0B11090E0A13 $$$$$$$$ 0x0A0B0E1311101314 $$$$$$$$ 0x130F0D0F0A0A0A0D $$$$$$$$ 0x10100C0C0B0F0D10 $$$$$$$$ 0x0B0F0C0C0F101011 $$$$$$$$ 0x090B090B090B0909 $$$$$$$$ 0x0B1511170B131013 $$$#$$$$ 0x090B09090B0D0D0D $$$$$$$$ 0x0F0E0E0B0C100F0D $$$$$$$$ 0x0A100C09110E100C $$$$$$$$ 0x0D0E070C0C0D0E0E $$$$$$$$ 0x0C130A0E130C1116 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 0 15][ 0 11][ 3 19][ 3 18][ 2 17][ 1 16][ 8 19][ 8 22]
Mc0.Ch0.B1: [ 2 14][ 0 10][ 1 11][ 5 12][ 2 14][ 4 13][ 3 15][ 4 20]
Mc0.Ch1.B0: [ 1 9][ 4 10][ 3 10][ 3 7][ 3 5][ 8 9][ 8 15][ 7 10]
Mc0.Ch1.B1: [ 1 13][ 0 13][ 3 13][ 0 11][ 9 16][ 1 11][ 7 15][ 1 11]
Mc0.Ch2.B0: [ 0 15][ 1 14][ 0 10][ 2 16][ 0 8][ 0 13][ 0 9][ 3 18]
Mc0.Ch2.B1: [ 0 9][ 1 10][ 5 13][ 7 18][ 3 16][ 3 15][ 8 18][ 8 19]
Mc0.Ch3.B0: [ 0 18][ 0 14][ 0 12][ 0 14][ 3 9][ 0 9][ 0 9][ 3 12]
Mc0.Ch3.B1: [ 0 15][ 0 15][ 0 11][ 0 11][ 0 10][ 2 14][ 0 12][ 5 15]
Mc1.Ch0.B0: [ 0 10][ 2 14][ 1 11][ 0 11][ 8 14][ 6 15][ 5 15][ 6 16]
Mc1.Ch0.B1: [ 0 8][ 4 10][ 1 8][ 1 10][ 0 8][ 1 10][ 1 8][ 0 8]
Mc1.Ch1.B0: [ 0 10][ 4 20][ 1 16][ 5 22][ 0 10][ 4 18][ 1 15][ 5 18]
Mc1.Ch1.B1: [ 3 8][ 2 10][ 4 8][ 3 8][ 5 10][ 8 12][ 2 12][ 5 12]
Mc1.Ch2.B0: [ 5 14][ 2 13][ 2 13][ 0 10][ 2 11][ 6 15][ 2 14][ 1 12]
Mc1.Ch2.B1: [ 4 9][ 7 15][ 3 11][ 1 8][ 6 16][ 1 13][ 3 15][ 1 11]
Mc1.Ch3.B0: [ 3 12][ 5 13][ 1 7][ 1 11][ 4 11][ 2 12][ 2 13][ 8 13]
Mc1.Ch3.B1: [ 0 11][ 5 18][ 1 9][ 4 13][ 7 18][ 3 11][ 7 16][ 7 21]
Per Bit Offset
Mc0.Ch0.B0: -1 -3 3 3 2 1 6 7
Mc0.Ch0.B1: 0 -3 -2 1 0 1 1 4
Mc0.Ch1.B0: -3 -1 -2 -3 -4 1 4 1
Mc0.Ch1.B1: -1 -2 0 -3 5 -2 3 -2
Mc0.Ch2.B0: -1 -1 -3 1 -4 -2 -4 3
Mc0.Ch2.B1: -4 -3 1 5 2 1 5 6
Mc0.Ch3.B0: 1 -1 -2 -1 -2 -4 -4 -1
Mc0.Ch3.B1: -1 -1 -3 -3 -3 0 -2 2
Mc1.Ch0.B0: -3 0 -2 -3 3 3 2 3
Mc1.Ch0.B1: -4 -1 -4 -3 -4 -3 -4 -4
Mc1.Ch1.B0: -3 4 1 6 -3 3 0 4
Mc1.Ch1.B1: -3 -2 -2 -3 -1 2 -1 1
Mc1.Ch2.B0: 2 -1 -1 -3 -2 3 0 -2
Mc1.Ch2.B1: -2 3 -1 -4 3 -1 1 -2
Mc1.Ch3.B0: -1 1 -4 -2 -1 -1 -1 3
Mc1.Ch3.B1: -3 4 -3 1 5 -1 4 6
START_TxDqBitDelay
R Mc0.C0.R0.S0.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S0.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S0.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S0.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S0.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S0.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S0.B6 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S0.B7 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R0.S1.B0 TxDqBitDelay: 8
R Mc0.C0.R0.S1.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B3 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B4 TxDqBitDelay: 8
R Mc0.C0.R0.S1.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S2.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S2.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S2.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B4 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S2.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S2.B7 TxDqBitDelay: 9
R Mc0.C0.R0.S3.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S3.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S3.B2 TxDqBitDelay: 8
R Mc0.C0.R0.S3.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B4 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S3.B5 TxDqBitDelay: 6
R Mc0.C0.R0.S3.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S3.B7 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S4.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S4.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B3 TxDqBitDelay: 9
R Mc0.C0.R0.S4.B4 TxDqBitDelay: 4
R Mc0.C0.R0.S4.B5 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B6 TxDqBitDelay: 4
R Mc0.C0.R0.S4.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S5.B0 TxDqBitDelay: 4
R Mc0.C0.R0.S5.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S5.B2 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B3 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S5.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S6.B0 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B3 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B4 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B5 TxDqBitDelay: 4
R Mc0.C0.R0.S6.B6 TxDqBitDelay: 4
R Mc0.C0.R0.S6.B7 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B4 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S7.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S0.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S0.B1 TxDqBitDelay: 8
R Mc1.C1.R0.S0.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S0.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S0.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S1.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S1.B4 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B5 TxDqBitDelay: 5
R Mc1.C1.R0.S1.B6 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B7 TxDqBitDelay: 4
R Mc1.C1.R0.S2.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S2.B2 TxDqBitDelay: 9
R Mc1.C1.R0.S2.B3 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S2.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S2.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S2.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S3.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B1 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S3.B6 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S4.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B2 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S4.B4 TxDqBitDelay: 6
R Mc1.C1.R0.S4.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S4.B7 TxDqBitDelay: 6
R Mc1.C1.R0.S5.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S5.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S5.B2 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S5.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S5.B5 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S5.B7 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B0 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B1 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S6.B3 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B5 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B6 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S7.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S7.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S7.B2 TxDqBitDelay: 5
R Mc1.C1.R0.S7.B3 TxDqBitDelay: 9
R Mc1.C1.R0.S7.B4 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S7.B5 TxDqBitDelay: 7
R Mc1.C1.R0.S7.B6 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S7.B7 TxDqBitDelay: 14 (0xE)
STOP_TxDqBitDelay
LstSavd Margins 250 260 260 260 210 220 250 250 260 270 250 260 220 220 260 260 260 270 270 270 250 260 250 260 260 260 260 260 260 260 240 240 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 240 250 250 180 210 220 240 230 240 240 250 180 210 230 250 230 270 240 260 230 250 240 230 250 230 240 250 240 250 230 230
Weighted Center 2 0 2 1 1 1 2 1 2 1 1 -1 -1 1 1 0
Final Center 74 72 69 73 74 72 67 72 77 76 76 77 76 75 77 76
Edges we pass on to GetMarginBit are
230 220 250 250 200 190 230 230 240 230 250 240 200 190 240 240 250 250 250 250 240 240 230 240 240 240 250 240 250 240 230 230
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ..#..... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .......#
0x0707070707070707 ........ 0x0707070707070707 ......## 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ......#. 0x0707070707070707 ........ 0x0707070707070707 .......# 0x0707070707070707 .....#.. 0x0707070707070707 ........ 0x0707070707070707 .....#.. 0x0707090707070707 .#.....# 0x0707070707070707 .....#.. 0x0707070707070707 .#...... 0x0707070707070707 ........ 0x0707070707070709 ........
0x0606060606060606 ........ 0x0606060606060707 ......$$ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060706 ......$. 0x0606060606060606 ........ 0x0606060606060607 .......$ 0x0606060606070606 .....$.# 0x0606060606060606 ........ 0x0606060606070606 .....$.# 0x0607090606060607 .$$.##.$ 0x0606060606070606 .....$.. 0x0607060606060606 .$....#. 0x0606060606060606 ........ 0x0606060606060609 ....#..$
0x0505050505050505 ........ 0x0505050505050707 ......$$ 0x0505050505050505 .....#.. 0x0505050505050505 ....#... 0x0505050505050505 ........ 0x0505050505050705 ...#..$. 0x0505050505050505 ........ 0x0505050505050507 .......$ 0x0505050505070506 .....$.$ 0x0505050505050505 ........ 0x0505050505070506 ...#.$.$ 0x0507090506060507 #$$#$$#$ 0x0505050505070505 ..#..$#. 0x0507050505050605 .$..#.$. 0x0505050505050505 ........ 0x0505050506050509 ....$..$
0x0404040404040404 ........ 0x0404040404040707 ..#...$$ 0x0404040404050404 .....$.. 0x0404040405040404 ....$..# 0x0404040404040404 .......# 0x0404040504040704 ...$..$# 0x0404040404040404 ........ 0x0404040404040407 .#...#.$ 0x0404040404070406 ....#$#$ 0x0404040404040404 .....#.. 0x0404040504070406 ...$.$.$ 0x0507090506060507 $$$$$$$$ 0x0404050404070504 #.$..$$. 0x0407040405040604 .$..$.$. 0x0404040404040404 ........ 0x0404040406040409 ....$..$
0x0303030303030303 ........ 0x0303040303030707 ..$..#$$ 0x0303030303050303 .....$.. 0x0303030305030304 ....$.#$ 0x0303030303030304 .......$ 0x0303030503030704 ..#$..$$ 0x0303030303030303 ........ 0x0304030303040307 .$...$.$ 0x0303030304070406 ....$$$$ 0x0303030303040303 .....$.. 0x0303030503070306 ...$.$.$ 0x0507090506060507 $$$$$$$$ 0x0403050303070503 $.$.#$$. 0x0307030305030603 .$..$.$. 0x0303030303030303 ........ 0x0303030306030309 .##.$.#$
0x0202020202020202 .......# 0x0202040202030707 ..$..$$$ 0x0202020202050202 .....$.. 0x0202020205020304 ..#.$#$$ 0x0202020202020204 .......$ 0x0202030502020704 ..$$#.$$ 0x0202020202020202 ........ 0x0204020202040207 .$..#$.$ 0x0202020204070406 .#..$$$$ 0x0202020202040202 .###.$#. 0x0202020502070206 ...$.$.$ 0x0507090506060507 $$$$$$$$ 0x0402050203070502 $#$.$$$. 0x0207020205020602 .$#.$#$. 0x0202020202020202 .......# 0x0203030206020309 .$$.$.$$
0x0101010101010102 ......#$ 0x0101040101030707 ..$##$$$ 0x0101010101050101 .....$.. 0x0101020105020304 .#$.$$$$ 0x0101010101010104 ...#...$ 0x0101030502010704 ..$$$#$$ 0x0101010101010101 .....#.# 0x0104010102040107 #$..$$.$ 0x0102010104070406 .$..$$$$ 0x0102020201040201 #$$$.$$. 0x0101010501070106 .#.$.$.$ 0x0507090506060507 $$$$$$$$ 0x0402050103070501 $$$#$$$. 0x0107020105020601 .$$.$$$. 0x0101010101010102 ....#.#$ 0x0103030106010309 .$$#$.$$
0x0000000000000102 ..#...$$ 0x0000040101030707 ##$$$$$$ 0x0000000000050000 .....$## 0x0001020005020304 .$$#$$$$ 0x0000000100000004 #..$...$ 0x0000030502010704 ..$$$$$$ 0x0000000000010001 ....#$.$ 0x0104000002040007 $$..$$#$ 0x0002000004070406 #$#.$$$$ 0x0102020200040200 $$$$.$$# 0x0001000500070006 .$#$.$#$ 0x0507090506060507 $$$$$$$$ 0x0402050103070500 $$$$$$$. 0x0007020005020600 #$$#$$$# 0x0000000001000102 .#..$#$$ 0x0003030106000309 .$$$$#$$
+--MrcGetMarginBit, rsign = 1
0x0808080808080808 ........ 0x0808080808080808 .#...... 0x0808080808080808 ........ 0x0808080808080808 .....#.. 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0907090909090909 ........ 0x0909090909090909 ........ 0x0909090909070909 ...#.... 0x0909090909090909 ........ 0x0909090909090909 ##...... 0x0909090909090909 ......#. 0x0909090909090909 ....#... 0x0909090909090909 #..#.... 0x0909090909090909 ..#...## 0x0909090909090909 #...#... 0x0909090909090909 ........ 0x0909090909090909 ...#.... 0x0909090909090909 ........ 0x0909090909090909 ..#..... 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A070A0A0A0A0A0A .$...... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A090A070A0A #..$.$.# 0x0A0A0A0A0A0A0A0A ......#. 0x09090A0A0A0A0A0A $$...... 0x0A0A0A0A0A0A090A ......$. 0x0A0A0A0A090A0A0A ..##$... 0x090A0A090A0A0A0A $.#$.... 0x0A0A090A0A0A0909 ##$.#.$$ 0x090A0A0A090A0A0A $...$... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A090A0A0A0A ...$.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A090A0A0A0A0A ..$..... 0x0A0A0A0A0A0A0A0A #.#.....
0x0B0B0B0B0B0B0B0B ........ 0x0B070B0B0B0B0B0B .$#..... 0x0B0B0B0B0B0B0B0B ....#... 0x0A0B0B090B070B0A $.#$.$.$ 0x0B0B0B0B0B0B0A0B ....#.$. 0x09090B0B0B0B0B0B $$...... 0x0B0B0B0B0B0B090B ......$. 0x0B0B0A0A090B0B0B ..$$$.#. 0x090B0A090B0B0B0B $.$$.... 0x0A0A090B0A0B0909 $$$.$#$$ 0x090B0B0B090B0B0B $...$... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B090B0B0B0B ...$.... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B090B0B0B0B0B ..$..... 0x0A0B0A0B0B0B0B0B $.$..#..
0x0C0C0C0C0C0C0C0C .#...... 0x0C070B0C0C0C0C0C .$$##... 0x0C0C0C0C0B0C0C0C ....$... 0x0A0C0B090C070C0A $#$$.$.$ 0x0C0C0C0C0B0C0A0C ....$.$. 0x09090C0C0C0C0C0C $$...... 0x0C0C0C0C0C0C090C .....#$. 0x0C0C0A0A090C0B0C ..$$$.$. 0x090C0A090C0C0C0C $#$$##.. 0x0A0A090C0A0B0909 $$$.$$$$ 0x090C0C0C090C0C0C $...$... 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C090C0C0C0C ...$#... 0x0C0C0C0C0C0C0C0C ...#.... 0x0C0C090C0C0C0C0C ..$..... 0x0A0C0A0C0C0B0C0C $.$#.$..
0x0D0C0D0D0D0D0D0D .$...... 0x0D070B0C0C0D0D0D #$$$$#.. 0x0D0D0D0D0B0D0D0D #..#$... 0x0A0C0B090D070D0A $$$$.$.$ 0x0D0D0D0D0B0D0A0D ..#.$.$. 0x09090D0D0D0D0D0D $$...... 0x0D0D0D0D0D0C090D ....#$$# 0x0D0D0A0A090D0B0D ..$$$.$. 0x090C0A090C0C0D0D $$$$$$.. 0x0A0A090D0A0B0909 $$$#$$$$ 0x090D0D0D090D0D0D $...$.#. 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D090C0D0D0D ...$$..# 0x0D0D0D0C0D0D0D0D ...$.#.. 0x0D0D090D0D0D0D0D ..$.##.. 0x0A0D0A0C0D0B0D0D $.$$.$..
0x0E0C0E0E0E0E0E0E #$...... 0x0D070B0C0C0D0E0E $$$$$$.. 0x0D0E0E0D0B0E0E0E $##$$### 0x0A0C0B090E070E0A $$$$#$.$ 0x0E0E0D0E0B0E0A0E ..$.$#$. 0x09090E0E0E0E0E0E $$#..#.. 0x0E0E0E0E0D0C090D ....$$$$ 0x0E0E0A0A090E0B0E ##$$$#$# 0x090C0A090C0C0E0E $$$$$$## 0x0A0A090D0A0B0909 $$$$$$$$ 0x090E0E0E090E0D0E $.#.$.$. 0x0E0E0E0E0E0E0E0E #....... 0x0E0E0E090C0E0E0D ###$$.#$ 0x0E0E0E0C0E0D0E0E ...$.$.. 0x0E0E090E0D0D0E0E ##$#$$#. 0x0A0E0A0C0E0B0E0E $.$$.$..
0x0E0C0F0F0F0F0F0F $$...... 0x0D070B0C0C0D0F0F $$$$$$.. 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$#$ 0x0F0F0D0F0B0E0A0F .#$.$$$. 0x09090E0F0F0E0F0F $$$..$.. 0x0F0F0F0F0D0C090D .###$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x090F0E0F090F0D0F $.$.$#$# 0x0E0F0F0F0F0F0F0F $....... 0x0E0E0E090C0F0E0D $$$$$#$$ 0x0F0F0F0C0F0D0F0F #..$.$.. 0x0E0E090E0D0D0E0F $$$$$$$# 0x0A0F0A0C0F0B0F0F $.$$.$..
0x0E0C101010101010 $$...... 0x0D070B0C0C0D1010 $$$$$$#. 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A10 #$$#$$$. 0x09090E10100E1010 $$$..$.. 0x100F0F0F0D0C090D .$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09100E10090F0D0F $.$.$$$$ 0x0E10101010101010 $..#.... 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F10100C100D1010 $.#$.$.# 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A100A0C100B1010 $.$$#$..
0x0E0C111111111111 $$..#... 0x0D070B0C0C0D1011 $$$$$$$. 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A11 $$$$$$$. 0x09090E11110E1111 $$$##$#. 0x110F0F0F0D0C090D .$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09110E11090F0D0F $#$#$$$$ 0x0E11111011111111 $##$#... 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F11100C110D1110 $#$$#$#$ 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A110A0C100B1111 $#$$$$#.
0x0E0C121211121212 $$..$#.. 0x0D070B0C0C0D1012 $$$$$$$. 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A12 $$$$$$$. 0x09090E11110E1112 $$$$$$$. 0x120F0F0F0D0C090D .$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09110E11090F0D0F $$$$$$$$ 0x0E11111011121212 $$$$$... 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F11100C110D1110 $$$$$$$$ 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A110A0C100B1112 $$$$$$$.
0x0E0C131311121313 $$##$$.. 0x0D070B0C0C0D1013 $$$$$$$# 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A13 $$$$$$$. 0x09090E11110E1113 $$$$$$$. 0x130F0F0F0D0C090D #$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09110E11090F0D0F $$$$$$$$ 0x0E11111011131313 $$$$$#.. 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F11100C110D1110 $$$$$$$$ 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A110A0C100B1113 $$$$$$$.
0x0E0C131311121414 $$$$$$#. 0x0D070B0C0C0D1013 $$$$$$$$ 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A14 $$$$$$$# 0x09090E11110E1114 $$$$$$$# 0x130F0F0F0D0C090D $$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09110E11090F0D0F $$$$$$$$ 0x0E11111011131414 $$$$$$#. 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F11100C110D1110 $$$$$$$$ 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A110A0C100B1114 $$$$$$$.
0x0E0C131311121415 $$$$$$$. 0x0D070B0C0C0D1013 $$$$$$$$ 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A14 $$$$$$$$ 0x09090E11110E1114 $$$$$$$$ 0x130F0F0F0D0C090D $$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09110E11090F0D0F $$$$$$$$ 0x0E11111011131415 $$$$$$$# 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F11100C110D1110 $$$$$$$$ 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A110A0C100B1115 $$$$$$$.
0x0E0C131311121416 $$$$$$$# 0x0D070B0C0C0D1013 $$$$$$$$ 0x0D0E0E0D0B0E0E0E $$$$$$$$ 0x0A0C0B090E070F0A $$$$$$$$ 0x100F0D100B0E0A14 $$$$$$$$ 0x09090E11110E1114 $$$$$$$$ 0x130F0F0F0D0C090D $$$$$$$$ 0x0E0E0A0A090E0B0E $$$$$$$$ 0x090C0A090C0C0E0E $$$$$$$$ 0x0A0A090D0A0B0909 $$$$$$$$ 0x09110E11090F0D0F $$$$$$$$ 0x0E11111011131415 $$$$$$$$ 0x0E0E0E090C0F0E0D $$$$$$$$ 0x0F11100C110D1110 $$$$$$$$ 0x0E0E090E0D0D0E0F $$$$$$$$ 0x0A110A0C100B1116 $$$$$$$#
Edges
Mc0.Ch0.B0: [ 0 13][ 0 11][ 1 18][ 0 18][ 0 16][ 0 17][ 2 19][ 3 21]
Mc0.Ch0.B1: [ 1 12][ 1 7][ 5 10][ 2 11][ 2 11][ 4 12][ 8 15][ 8 18]
Mc0.Ch1.B0: [ 0 12][ 0 13][ 0 13][ 0 12][ 0 10][ 6 13][ 1 13][ 1 13]
Mc0.Ch1.B1: [ 0 9][ 2 11][ 3 10][ 1 8][ 6 13][ 3 7][ 4 14][ 5 9]
Mc0.Ch2.B0: [ 1 15][ 0 14][ 0 12][ 2 15][ 0 10][ 0 13][ 0 9][ 5 19]
Mc0.Ch2.B1: [ 0 8][ 0 8][ 4 13][ 6 16][ 3 16][ 2 13][ 8 16][ 5 19]
Mc0.Ch3.B0: [ 0 18][ 0 14][ 0 14][ 0 14][ 1 12][ 2 11][ 0 8][ 2 12]
Mc0.Ch3.B1: [ 2 13][ 5 13][ 0 9][ 0 9][ 3 8][ 5 13][ 1 10][ 8 13]
Mc1.Ch0.B0: [ 1 8][ 3 11][ 1 9][ 0 8][ 5 11][ 8 11][ 5 13][ 7 13]
Mc1.Ch0.B1: [ 2 9][ 3 9][ 3 8][ 3 12][ 0 9][ 5 10][ 3 8][ 1 8]
Mc1.Ch1.B0: [ 0 8][ 2 16][ 1 13][ 6 16][ 0 8][ 8 14][ 1 12][ 7 14]
Mc1.Ch1.B1: [ 6 13][ 8 16][ 9 16][ 6 15][ 7 16][ 7 18][ 6 19][ 8 20]
Mc1.Ch2.B0: [ 5 13][ 3 13][ 6 13][ 2 8][ 4 11][ 8 14][ 6 13][ 0 12]
Mc1.Ch2.B1: [ 1 14][ 8 16][ 3 15][ 1 11][ 6 16][ 3 12][ 7 16][ 1 15]
Mc1.Ch3.B0: [ 0 13][ 1 13][ 0 8][ 0 13][ 2 12][ 1 12][ 2 13][ 3 14]
Mc1.Ch3.B1: [ 0 9][ 4 16][ 4 9][ 2 11][ 7 15][ 1 10][ 4 16][ 9 21]
Per Bit Offset
Mc0.Ch0.B0: -2 -3 2 1 0 1 3 4
Mc0.Ch0.B1: -2 -4 -1 -2 -2 0 4 5
Mc0.Ch1.B0: -2 -2 -2 -2 -3 2 -1 -1
Mc0.Ch1.B1: -4 -2 -2 -4 2 -3 1 -1
Mc0.Ch2.B0: 0 -1 -2 1 -3 -2 -4 4
Mc0.Ch2.B1: -4 -4 1 3 2 -1 4 4
Mc0.Ch3.B0: 1 -1 -1 -1 -2 -2 -4 -1
Mc0.Ch3.B1: -1 1 -4 -4 -3 1 -3 3
Mc1.Ch0.B0: -4 -1 -3 -4 0 2 1 2
Mc1.Ch0.B1: -3 -2 -3 -1 -4 -1 -3 -4
Mc1.Ch1.B0: -4 1 -1 3 -4 3 -2 3
Mc1.Ch1.B1: 2 4 5 3 4 5 5 6
Mc1.Ch2.B0: 1 0 2 -3 -1 3 2 -2
Mc1.Ch2.B1: -1 4 1 -2 3 -1 4 0
Mc1.Ch3.B0: -2 -1 -4 -2 -1 -2 -1 1
Mc1.Ch3.B1: -4 2 -2 -2 3 -3 2 7
START_TxDqBitDelay
R Mc0.C0.R1.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S0.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S0.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S0.B3 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S0.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S0.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S1.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B1 TxDqBitDelay: 4
R Mc0.C0.R1.S1.B2 TxDqBitDelay: 7
R Mc0.C0.R1.S1.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S1.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S1.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S2.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S2.B6 TxDqBitDelay: 7
R Mc0.C0.R1.S2.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S3.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S3.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S3.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S3.B5 TxDqBitDelay: 5
R Mc0.C0.R1.S3.B6 TxDqBitDelay: 9
R Mc0.C0.R1.S3.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S4.B0 TxDqBitDelay: 8
R Mc0.C0.R1.S4.B1 TxDqBitDelay: 7
R Mc0.C0.R1.S4.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S4.B3 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B5 TxDqBitDelay: 6
R Mc0.C0.R1.S4.B6 TxDqBitDelay: 4
R Mc0.C0.R1.S4.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S5.B1 TxDqBitDelay: 4
R Mc0.C0.R1.S5.B2 TxDqBitDelay: 9
R Mc0.C0.R1.S5.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S5.B5 TxDqBitDelay: 7
R Mc0.C0.R1.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S6.B0 TxDqBitDelay: 9
R Mc0.C0.R1.S6.B1 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B2 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B3 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B5 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B6 TxDqBitDelay: 4
R Mc0.C0.R1.S6.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B1 TxDqBitDelay: 9
R Mc0.C0.R1.S7.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S7.B6 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S0.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S0.B2 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B3 TxDqBitDelay: 4
R Mc1.C1.R1.S0.B4 TxDqBitDelay: 8
R Mc1.C1.R1.S0.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S0.B6 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S1.B0 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B1 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B2 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B4 TxDqBitDelay: 4
R Mc1.C1.R1.S1.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B6 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B7 TxDqBitDelay: 4
R Mc1.C1.R1.S2.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S2.B1 TxDqBitDelay: 9
R Mc1.C1.R1.S2.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B3 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B4 TxDqBitDelay: 4
R Mc1.C1.R1.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B6 TxDqBitDelay: 6
R Mc1.C1.R1.S2.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S3.B2 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S3.B3 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B4 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S3.B5 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S3.B6 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S3.B7 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R1.S4.B0 TxDqBitDelay: 9
R Mc1.C1.R1.S4.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S4.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S4.B4 TxDqBitDelay: 7
R Mc1.C1.R1.S4.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B7 TxDqBitDelay: 6
R Mc1.C1.R1.S5.B0 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B2 TxDqBitDelay: 9
R Mc1.C1.R1.S5.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S5.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S5.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B7 TxDqBitDelay: 8
R Mc1.C1.R1.S6.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B2 TxDqBitDelay: 4
R Mc1.C1.R1.S6.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B4 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B5 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B6 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B7 TxDqBitDelay: 9
R Mc1.C1.R1.S7.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S7.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S7.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S7.B5 TxDqBitDelay: 5
R Mc1.C1.R1.S7.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S7.B7 TxDqBitDelay: 15 (0xF)
STOP_TxDqBitDelay
Calling with EnRxDutyCycle = 0, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 230 230 240 230 210 200 220 220 240 230 240 240 200 190 240 230 230 240 250 240 250 240 230 230 250 240 250 250 240 240 230 230 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 260 240 250 240 210 200 230 240 260 250 250 250 200 200 240 240 250 250 250 260 260 250 230 230 240 250 250 250 240 250 240 240
Vref = -10: 230 230 220 220 200 180 220 210 240 230 240 230 190 170 230 230 230 220 240 230 250 240 230 220 230 230 240 230 230 230 240 220
Vref = -20: 210 210 210 210 180 160 200 190 220 200 220 210 180 150 230 200 220 210 220 220 230 210 210 190 210 200 210 210 220 220 210 200
Vref = -30: 210 180 190 180 170 130 190 170 210 190 220 180 160 110 190 180 200 190 210 190 210 180 200 160 200 170 190 190 200 190 190 170
Vref = 10: 280 240 260 240 210 210 230 240 240 240 240 260 200 200 240 240 250 260 250 260 270 250 240 240 260 240 260 250 250 250 250 250
Vref = 20: 240 230 230 220 180 180 210 220 240 230 240 240 190 180 240 230 240 240 240 240 250 230 230 220 230 230 240 240 240 230 220 230
Vref = 30: 230 210 220 210 170 170 210 200 210 200 220 220 170 140 230 200 220 210 220 220 240 210 220 200 210 210 220 220 220 210 210 210
Weighted Center -1 0 -1 0 -1 0 -1 0 0 0 -1 -1 0 0 0 0
Final Center 73 73 68 72 75 73 67 74 74 75 72 76 75 73 77 74
LstSavd Margins 230 220 250 250 200 190 230 230 240 230 250 240 200 190 240 240 250 250 250 250 240 240 230 240 240 240 250 240 250 240 230 230 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 240 250 250 200 200 230 240 260 240 250 250 190 190 240 250 250 250 250 260 240 250 230 240 240 260 270 240 250 250 240 230
Vref = -10: 230 220 230 240 190 170 210 220 240 230 250 220 190 170 220 230 240 230 230 240 240 230 230 210 230 230 250 230 240 240 230 220
Vref = -20: 220 200 210 220 180 160 210 190 230 210 220 210 180 150 210 210 230 210 220 220 220 220 230 200 220 210 220 210 220 210 210 200
Vref = -30: 210 180 200 190 160 120 200 160 210 180 200 170 170 110 200 190 210 180 200 210 200 190 200 160 200 190 200 190 200 190 200 170
Vref = 10: 250 240 260 250 200 210 240 240 260 250 250 250 200 200 250 240 250 250 250 260 240 240 240 240 250 250 270 250 250 250 240 230
Vref = 20: 230 220 230 240 190 180 220 220 230 240 240 240 190 180 230 230 240 240 240 250 240 230 230 220 240 240 250 240 240 240 230 220
Vref = 30: 220 210 230 220 190 160 210 210 220 220 230 210 190 150 210 220 230 210 220 230 220 220 220 200 220 220 210 220 220 210 220 200
Weighted Center 0 0 -1 0 -1 -1 -1 0 0 0 0 0 0 -1 0 -1
Final Center 74 72 68 73 73 71 66 72 77 76 76 77 76 74 77 75
MRC task Write Timing Centering 2D Before Power Training -- SUCCEEDED, Status = 0h. Stack Depth: 160588
Post Code: DD7Dh
MRC task -- Rload Optimization -- Started.
Rload Optimization not needed
MRC task Rload Optimization -- SUCCEEDED, Status = 0h.
Post Code: DD39h
MRC task -- Read Timing Centering 2D Before Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 160 170 170 170 120 120 160 170 160 160 160 170 90 90 140 150 160 170 180 190 160 170 170 180 160 170 150 150 180 180 160 160 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 150 140 150 140 90 90 140 140 160 130 160 140 70 60 120 120 150 140 160 160 150 140 150 150 150 140 150 120 180 150 150 130
Weighted Center -1 -1 0 0 -2 -1 -1 0 -1 0 -1 0 -1 -2 -2 -1
Final Center -13 -13 -7 -12 -13 -13 -5 -10 -13 -14 -13 -13 -13 -12 -15 -12
Edges we pass on to GetMarginBit are
140 150 140 150 90 90 140 140 140 150 150 150 60 70 120 120 140 150 160 160 140 150 150 150 140 150 130 140 160 170 140 140
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 .#...... 0x0303030303030303 ......#. 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ....#... 0x0303030303030303 #....... 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ..#.#... 0x0303030303030303 ........
0x0202020202020202 .#...... 0x0202020202020202 ........ 0x0202020202020202 ....#.#. 0x0202020202020202 ........ 0x0202020202020202 .##.#.#. 0x0203020202020202 #$...#.. 0x0202020202020302 ......$. 0x0202020202020202 ....#... 0x0202020202020202 ..#..... 0x0202020202020202 ..#..... 0x0202020203020202 ....$... 0x0302020202020202 $#...#.. 0x0202020202020202 ........ 0x0202020202020202 ...#.... 0x0202030203020202 ..$.$#.. 0x0202020202020202 ........
0x0102010101010101 .$...... 0x0101010101010101 ........ 0x0101010102010201 ....$.$. 0x0101010101010101 ....##.. 0x0102020102010201 .$$.$.$. 0x0203010101020101 $$...$.# 0x0101010101010301 ......$. 0x0101010102010101 ....$... 0x0101020101010101 ..$#.... 0x0101020101010101 ##$##.## 0x0101010103010101 ....$... 0x0302010101020101 $$..#$#. 0x0101010101010101 ........ 0x0101010201010101 ..#$...# 0x0101030103020101 ..$#$$#. 0x0101010101010101 .....#..
0x0002000000000000 .$...... 0x0000000000000000 ....#... 0x0000000002000200 ....$.$. 0x0000000001010000 ....$$#. 0x0002020002000200 .$$.$#$. 0x0203000000020001 $$#..$.$ 0x0000000000000300 ......$. 0x0000000002000000 ....$... 0x0000020100000000 #.$$.... 0x0101020101000101 $$$$$.$$ 0x0000000003000000 ....$... 0x0302000001020100 $$..$$$. 0x0000000000000000 ........ 0x0000010200000001 #.$$...$ 0x0000030103020100 ##$$$$$. 0x0000000000010000 .....$..
+--MrcGetMarginBit, rsign = 1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........
0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........
0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........
0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........
0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........
0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........
0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........
0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........
0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........
0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........
0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........
0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........
0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........
0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........
0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........
0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........
0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........
0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........
0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ....#... 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........
0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1D1E1E1E ....$... 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........
0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1D1F1F1F ....$... 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........
0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x202020201D202020 ....$#.. 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........
0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x212121211D202121 ..#.$$.. 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........
0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x222221221D202222 ..$.$$.. 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........
0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x232321231D202323 .#$#$$## 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........
0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x242321231D202323 .$$$$$$$ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........
0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x252321231D202323 #$$$$$$$ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........
0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x252321231D202323 $$$$$$$$ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........
0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ....#.#. 0x2727272727272727 ........ 0x2727272727272727 ......#. 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x252321231D202323 $$$$$$$$ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........
0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282827282728 ....$.$. 0x2828282828282828 ........ 0x2828282828282728 .###..$. 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x252321231D202323 $$$$$$$$ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ......#.
0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292927292729 ....$.$# 0x2929292929292929 ........ 0x2928282829292729 .$$$.#$# 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x252321231D202323 $$$$$$$$ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292829 ......$.
0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A272A2729 #...$.$$ 0x2A2A2A2A2A2A2A2A .......# 0x2A2828282A292729 .$$$#$$$ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x252321231D202323 $$$$$$$$ 0x2A2A2A2A2A2A2A2A .#...... 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A282A ....#.$#
0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2A2B2B2B272B2729 $.##$#$$ 0x2B2B2B2B2B2B2B2A #......$ 0x2B2828282A292729 #$$$$$$$ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B .....#.# 0x252321231D202323 $$$$$$$$ 0x2B2A2B2B2B2B2B2B .$...... 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2A2B282A .#..$.$$
0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2A2C2B2B272B2729 $#$$$$$$ 0x2B2C2C2C2C2C2C2A $......$ 0x2B2828282A292729 $$$$$$$$ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2B2C2B ...#.$.$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C2C2C2C2C2C #$#..... 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2B2C2C2A2C282A .$..$.$$
0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2D2D2D2D2D2D2A $......$ 0x2B2828282A292729 $$$$$$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2C2D2B2D2B ...$.$.$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C2D2D2D2D2D $$$.###. 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2B2D2D2A2D282A .$..$.$$
0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E .....#.. 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2E2E2E2E2E2E2A $..##..$ 0x2B2828282A292729 $$$$$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2C2E2B2E2B .##$.$.$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C2E2D2D2D2E $$$.$$$# 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E .......# 0x2E2B2E2E2A2E282A .$..$.$$
0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2E2F2F .....$#. 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F2F2A $##$$#.$ 0x2B2828282A292729 $$$$$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2E2E2C2F2B2F2B .$$$.$#$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C2F2D2D2D2E $$$.$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2E #......$ 0x2F2B2F2F2A2F282A .$#.$#$$
0x3030303030303030 ......## 0x3030303030303030 ........ 0x30303030302E2F30 ##.##$$# 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F302A $$$$$$.$ 0x2B2828282A292729 $$$$$$$$ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 .....#.. 0x302E2E2C302B2F2B .$$$.$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$#$$$$ 0x3030303030303030 .#..#... 0x2F3030303030302E $...#.#$ 0x302B2F302A2F282A #$$#$$$$
0x3131313131313030 ....##$$ 0x3131313131313131 ........ 0x30303130302E2F30 $$#$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$#$ 0x2B2828282A292729 $$$$$$$$ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313131303131 .#...$#. 0x312E2E2C312B2F2B .$$$#$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3130313130313131 .$..$... 0x2F3131313031302E $#.#$.$$ 0x302B2F302A2F282A $$$$$$$$
0x3232323231313030 ..#.$$$$ 0x3232323232323232 ..#..##. 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3232323232323232 ........ 0x3232323232323232 ........ 0x3232323232323232 ........ 0x3231323232303132 .$#..$$# 0x322E2E2C312B2F2B #$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230323230323232 #$..$#.. 0x2F3132313032302E $$#$$.$$ 0x302B2F302A2F282A $$$$$$$$
0x3333323331313030 ..$#$$$$ 0x3333323333323233 ..$#.$$# 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3333333333333333 .....#.. 0x3333333333333333 .....#.. 0x3333333333333333 ....##.. 0x3331323333303132 #$$##$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230333330323333 $$..$$#. 0x2F3132313033302E $$$$$.$$ 0x302B2F302A2F282A $$$$$$$$
0x3434323331313030 ..$$$$$$ 0x3434323334323233 ##$$#$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3434343434333434 .....$.. 0x3434343434333434 .....$.# 0x3434343433333434 ....$$.. 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343430323334 $$#.$$$. 0x2F3132313034302E $$$$$#$$ 0x302B2F302A2F282A $$$$$$$$
0x3535323331313030 ..$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3535353535333535 ....#$.. 0x3535353535333534 .....$.$ 0x3535353533333535 ....$$#. 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343530323335 $$$.$$$. 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3636323331313030 ..$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3636363635333636 ....$$.. 0x3636363636333634 #....$#$ 0x3636363633333536 ....$$$. 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343630323336 $$$.$$$# 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3737323331313030 ##$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3737373735333737 ...#$$#. 0x3637373737333634 $..#.$$$ 0x3737373733333537 ....$$$# 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343730323336 $$$#$$$$ 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3737323331313030 $$$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3838383735333738 #.#$$$$# 0x3638383738333634 $##$#$$$ 0x3838383833333537 .#..$$$$ 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343730323336 $$$$$$$$ 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3737323331313030 $$$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x3839383735333738 $.$$$$$$ 0x3638383738333634 $$$$$$$$ 0x3938393933333537 #$..$$$$ 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343730323336 $$$$$$$$ 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3737323331313030 $$$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x383A383735333738 $.$$$$$$ 0x3638383738333634 $$$$$$$$ 0x39383A3A33333537 $$#.$$$$ 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343730323336 $$$$$$$$ 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3737323331313030 $$$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x383B383735333738 $#$$$$$$ 0x3638383738333634 $$$$$$$$ 0x39383A3B33333537 $$$.$$$$ 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343730323336 $$$$$$$$ 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
0x3737323331313030 $$$$$$$$ 0x3434323334323233 $$$$$$$$ 0x30303130302E2F30 $$$$$$$$ 0x2A2C2B2B272B2729 $$$$$$$$ 0x2B2F2F2E2E2F312A $$$$$$$$ 0x2B2828282A292729 $$$$$$$$ 0x383B383735333738 $$$$$$$$ 0x3638383738333634 $$$$$$$$ 0x39383A3C33333537 $$$#$$$$ 0x3331323333303132 $$$$$$$$ 0x322E2E2C312B2F2B $$$$$$$$ 0x252321231D202323 $$$$$$$$ 0x2C2A2C302D2D2D2E $$$$$$$$ 0x3230343730323336 $$$$$$$$ 0x2F3132313034302E $$$$$$$$ 0x302B2F302A2F282A $$$$$$$$
Edges
Mc0.Ch0.B0: [ 0 54][ 3 54][ 0 49][ 0 50][ 0 48][ 0 48][ 0 47][ 0 47]
Mc0.Ch0.B1: [ 0 51][ 0 51][ 0 49][ 0 50][ 1 51][ 0 49][ 0 49][ 0 50]
Mc0.Ch1.B0: [ 0 47][ 0 47][ 0 48][ 0 47][ 3 47][ 0 45][ 3 46][ 0 47]
Mc0.Ch1.B1: [ 0 41][ 0 43][ 0 42][ 0 42][ 2 38][ 2 42][ 1 38][ 0 40]
Mc0.Ch2.B0: [ 0 42][ 3 46][ 3 46][ 0 45][ 3 45][ 1 46][ 3 48][ 0 41]
Mc0.Ch2.B1: [ 3 42][ 4 39][ 1 39][ 0 39][ 0 41][ 3 40][ 0 38][ 2 40]
Mc0.Ch3.B0: [ 0 55][ 0 58][ 0 55][ 0 54][ 0 52][ 0 50][ 4 54][ 0 55]
Mc0.Ch3.B1: [ 0 53][ 0 55][ 0 55][ 0 54][ 3 55][ 0 50][ 0 53][ 0 51]
Mc1.Ch0.B0: [ 1 56][ 0 55][ 3 57][ 2 59][ 0 50][ 0 50][ 0 52][ 0 54]
Mc1.Ch0.B1: [ 2 50][ 2 48][ 3 49][ 2 50][ 2 50][ 0 47][ 2 48][ 2 49]
Mc1.Ch1.B0: [ 0 49][ 0 45][ 0 45][ 0 43][ 4 48][ 0 42][ 0 46][ 0 42]
Mc1.Ch1.B1: [ 4 36][ 3 34][ 0 32][ 0 34][ 2 28][ 3 31][ 2 34][ 0 34]
Mc1.Ch2.B0: [ 0 43][ 0 41][ 0 43][ 0 47][ 0 44][ 0 44][ 0 44][ 0 45]
Mc1.Ch2.B1: [ 1 49][ 0 47][ 2 51][ 3 54][ 0 47][ 0 49][ 0 50][ 2 53]
Mc1.Ch3.B0: [ 1 46][ 1 48][ 4 49][ 2 48][ 4 47][ 3 51][ 2 47][ 0 45]
Mc1.Ch3.B1: [ 0 47][ 0 42][ 0 46][ 0 47][ 0 41][ 2 46][ 0 39][ 0 41]
Per Bit Offset
Mc0.Ch0.B0: 23 25 21 21 20 20 20 20
Mc0.Ch0.B1: 22 22 21 21 22 21 21 21
Mc0.Ch1.B0: 20 20 20 20 21 19 21 20
Mc0.Ch1.B1: 17 18 17 17 16 18 16 16
Mc0.Ch2.B0: 17 21 21 19 20 20 22 17
Mc0.Ch2.B1: 19 18 16 16 17 18 15 17
Mc0.Ch3.B0: 24 25 24 23 22 21 25 24
Mc0.Ch3.B1: 23 24 24 23 25 21 23 22
Mc1.Ch0.B0: 25 24 26 27 21 21 22 23
Mc1.Ch0.B1: 22 21 22 22 22 20 21 22
Mc1.Ch1.B0: 21 19 19 18 22 17 19 17
Mc1.Ch1.B1: 16 15 12 13 11 13 14 13
Mc1.Ch2.B0: 18 17 18 20 18 18 18 19
Mc1.Ch2.B1: 21 20 23 25 20 21 21 24
Mc1.Ch3.B0: 20 21 23 21 22 23 21 19
Mc1.Ch3.B1: 20 17 19 20 17 20 16 17
START_RxDqsBitDelay
R Mc0.C0.R0.S0.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S0.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S0.B2 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S0.B3 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S0.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B6 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B7 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S1.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S1.B1 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S1.B2 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B3 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S1.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S2.B0 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B1 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B4 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S2.B5 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S2.B7 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S3.B0 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B2 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B4 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S3.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S3.B7 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S4.B0 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S4.B1 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S4.B2 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S4.B3 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S4.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S4.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S4.B6 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S4.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B0 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S5.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B2 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S5.B3 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S5.B4 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B6 RxDqsBitDelay: 19 (0x13)
R Mc0.C0.R0.S5.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S6.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S6.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S6.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S6.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S6.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S6.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S6.B6 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S6.B7 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S7.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S7.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S0.B0 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S0.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S0.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S0.B3 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S0.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S0.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S0.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S0.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S1.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B1 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S1.B2 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B3 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S1.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S1.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S2.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S2.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S2.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S2.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S2.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S2.B7 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S3.B0 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S3.B1 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B2 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R0.S3.B3 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S3.B4 RxDqsBitDelay: 15 (0xF)
R Mc1.C1.R0.S3.B5 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S3.B6 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R0.S3.B7 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S4.B0 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S4.B2 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S4.B4 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B5 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B6 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B7 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S5.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S5.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S5.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S5.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S5.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S5.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S5.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S5.B7 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S6.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S6.B1 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S6.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S6.B5 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S6.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B7 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S7.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S7.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S7.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B4 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S7.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B6 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S7.B7 RxDqsBitDelay: 21 (0x15)
STOP_RxDqsBitDelay
LstSavd Margins 160 170 160 160 120 120 160 160 160 170 160 170 90 90 150 160 170 170 180 180 170 180 160 170 180 180 160 170 180 190 160 170 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 140 140 150 130 90 90 130 130 140 140 140 140 60 60 130 130 150 140 180 150 160 150 160 140 160 150 150 140 170 160 130 140
Weighted Center 0 -1 0 0 0 0 0 0 -1 -2 -1 -1 -1 -1 -1 1
Final Center -12 -12 -7 -11 -12 -12 -4 -11 -13 -15 -14 -13 -14 -13 -15 -11
Edges we pass on to GetMarginBit are
140 140 140 140 90 90 130 130 140 140 140 140 60 60 130 130 140 150 160 170 150 160 150 150 150 160 140 150 160 170 140 130
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ....#... 0x0404040404040404 ....#... 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ..#..... 0x0404040404040404 ........
0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ......#. 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030305030303 ..#...#. 0x0303030305030303 #....... 0x0303030303030303 #....... 0x0303030303030303 ......#. 0x0303030303030303 ........ 0x0303050303030303 ........ 0x0303030303030303 ........
0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020302 ......$. 0x0202020202020202 ....#... 0x0202020202020202 ........ 0x0202030205020302 .#$#$.$# 0x0302020205020202 $...$... 0x0302020202020202 $...#.#. 0x0202020202020302 ......$# 0x0202020202020202 ........ 0x0202050202020202 ..$...#. 0x0202020202020202 ........
0x0101010101010101 .#...... 0x0101010101010101 #####.#. 0x0101010101010101 ........ 0x0101010101010101 ........ 0x0101010101010101 ....#... 0x0101010101010101 #....#.. 0x0101010101010301 ......$. 0x0101010102010101 ....$#.. 0x0101010101010101 ..#..... 0x0102030205010302 #$$$$#$$ 0x0301010105010101 $...$... 0x0301010102010201 $...$.$. 0x0101010101010302 .....#$$ 0x0101010101010101 .....#.. 0x0101050101010201 ..$.##$. 0x0101010101010101 ........
0x0001000000000000 .$...... 0x0101010101000100 $$$$$.$. 0x0000000000000000 ........ 0x0000000000000000 ........ 0x0000000001000000 ....$.#. 0x0100000000010000 $....$.. 0x0000000000000300 ....#.$. 0x0000000002010000 ..#.$$## 0x0000010000000000 #.$..... 0x0102030205010302 $$$$$$$$ 0x0300000005000000 $...$.#. 0x0300000002000200 $...$#$. 0x0000000000010302 ....#$$$ 0x0000000000010000 #.##.$#. 0x0000050001010200 #.$#$$$. 0x0000000000000000 ........
+--MrcGetMarginBit, rsign = 1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........
0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........
0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........
0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........
0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........
0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........
0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........
0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........
0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........
0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........
0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........
0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........
0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........
0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........
0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........
0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........
0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........
0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........
0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ....#... 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........
0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1D1E1E1E ....$... 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........
0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1D1F1F1F ....$... 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........
0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x202020201D202020 ....$... 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........
0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x212121211D212121 ..#.$... 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........
0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x222221221D222222 ..$.$#.# 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........
0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x232321231D222322 ..$.$$.$ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........
0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x242421241D222422 ..$.$$#$ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........
0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x252521251D222422 #.$#$$$$ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........
0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x252621251D222422 $#$$$$$$ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........
0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ....#... 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x252621251D222422 $$$$$$$$ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........
0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282827282828 ....$... 0x2828282828282828 ........ 0x2828282828282828 ......#. 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x252621251D222422 $$$$$$$$ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........
0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292927292929 ....$... 0x2929292929292929 ........ 0x2929292929292829 ......$. 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x252621251D222422 $$$$$$$$ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 .......#
0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A272A2A2A ....$#.# 0x2A2A2A2A2A2A2A2A ...#.... 0x2A2A2A2A2A2A282A ..##..$# 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x252621251D222422 $$$$$$$$ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A29 ......#$
0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B272A2B2A ..#.$$#$ 0x2B2B2B2A2B2B2B2B #..$...# 0x2B2B2A2A2B2B282A .#$$..$$ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x252621251D222422 $$$$$$$$ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2A29 ....#.$$
0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2B2C272A2B2A ..$.$$$$ 0x2B2C2C2A2C2C2C2B $.#$##.$ 0x2C2B2A2A2C2C282A .$$$.#$$ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x252621251D222422 $$$$$$$$ 0x2C2C2C2C2C2C2C2C .#..###. 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2B2C2A29 .#..$.$$
0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ....##.# 0x2D2D2B2D272A2B2A .#$.$$$$ 0x2B2D2C2A2C2C2D2B $.$$$$.$ 0x2D2B2A2A2D2C282A .$$$#$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D .....#.. 0x252621251D222422 $$$$$$$$ 0x2D2C2D2D2C2C2C2D #$..$$$# 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2C2D2D2B2D2A29 #$..$.$$
0x2E2E2E2E2E2E2E2E ......#. 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2D2D2E2D ....$$.$ 0x2E2D2B2E272A2B2A .$$#$$$$ 0x2B2E2C2A2C2C2E2B $#$$$$#$ 0x2E2B2A2A2D2C282A .$$$$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E .#...... 0x2E2E2E2E2E2D2E2E .#...$.# 0x252621251D222422 $$$$$$$$ 0x2D2C2E2E2C2C2C2D $$#.$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E .#...... 0x2D2C2E2E2B2E2A29 $$#.$#$$
0x2F2F2F2F2F2F2E2F ......$# 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2D2D2F2D #...$$.$ 0x2F2D2B2E272A2B2A #$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x2F2B2A2A2D2C282A .$$$$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2E2F2F2F2F2F2F .$...... 0x2F2E2F2F2F2D2F2E .$##.$.$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E2F2C2C2C2D $$$.$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2E2F2F2F2F2F2F .$...... 0x2D2C2E2F2B2E2A29 $$$.$$$$
0x3030303030302E2F ..#.##$$ 0x3030303030303030 .....#.# 0x2F3030302D2D302D $#.#$$#$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A #$$$$$$$ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x302E303030303030 .$.#.... 0x302E2F2F302D302E .$$$.$.$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$#$$$$ 0x3030303030303030 .#..#... 0x302E303030303030 .$..#..# 0x2D2C2E302B2E2A29 $$$#$$$$
0x3131303130302E2F ..$#$$$$ 0x3131313131303130 ..#..$#$ 0x2F3031302D2D302D $$#$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313131313131 ....##.. 0x312E313031313131 #$.$.##. 0x312E2F2F312D312E .$$$.$.$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3130313130313131 .$..$... 0x312E313130313130 #$..$.#$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3232303130302E2F ..$$$$$$ 0x3232313232303130 ..$.#$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3232323232323232 ........ 0x3232323232323232 .....#.. 0x3232323231313232 ....$$#. 0x312E323032313132 $$#$#$$# 0x322E2F2F322D322E .$$$#$#$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3230323230323232 .$..$... 0x312E323230323130 $$.#$#$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3333303130302E2F .#$$$$$$ 0x3333313332303130 .#$.$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3333333333333333 ........ 0x3333333333323333 .....$.. 0x3333333331313233 .#..$$$. 0x312E323032313132 $$$$$$$$ 0x332E2F2F322D322E .$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3330333330333333 .$..$... 0x312E333230323130 $$.$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F #$$$$$$$ 0x3433313432303130 #$$#$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3434343434343434 .....#.. 0x3434343434323434 .....$.. 0x3433343431313234 .$..$$$# 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E #$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430343430343434 #$..$#.. 0x312E343230323130 $$.$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3535353535343535 .....$.. 0x3535353535323535 .....$.# 0x3533353531313234 .$..$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430353530343535 $$..$$.# 0x312E353230323130 $$#$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3636363636343636 .....$.. 0x3636363636323635 .#...$.$ 0x3633363631313234 .$..$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430363630343635 $$..$$#$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3737373737343737 ....#$.. 0x3736373737323735 .$.#.$#$ 0x3733373731313234 .$..$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430373730343635 $$#.$$$$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3838383837343838 ....$$## 0x3836383738323735 .$.$#$$$ 0x3833383831313234 #$..$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430373830343635 $$$#$$$$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x3939393937343838 #..#$$$$ 0x3936393738323735 #$.$$$$$ 0x3833393931313234 $$##$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430373830343635 $$$$$$$$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x393A3A3937343838 $.#$$$$$ 0x39363A3738323735 $$#$$$$$ 0x3833393931313234 $$$$$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430373830343635 $$$$$$$$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x393B3A3937343838 $.$$$$$$ 0x39363A3738323735 $$$$$$$$ 0x3833393931313234 $$$$$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430373830343635 $$$$$$$$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
0x3433303130302E2F $$$$$$$$ 0x3433313432303130 $$$$$$$$ 0x2F3031302D2D302D $$$$$$$$ 0x2F2D2B2E272A2B2A $$$$$$$$ 0x2B2E2C2A2C2C2E2B $$$$$$$$ 0x302B2A2A2D2C282A $$$$$$$$ 0x393C3A3937343838 $#$$$$$$ 0x39363A3738323735 $$$$$$$$ 0x3833393931313234 $$$$$$$$ 0x312E323032313132 $$$$$$$$ 0x342E2F2F322D322E $$$$$$$$ 0x252621251D222422 $$$$$$$$ 0x2D2C2E302C2C2C2D $$$$$$$$ 0x3430373830343635 $$$$$$$$ 0x312E353230323130 $$$$$$$$ 0x2D2C2E302B2E2A29 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 0 51][ 2 50][ 0 47][ 0 48][ 0 47][ 0 47][ 0 45][ 0 46]
Mc0.Ch0.B1: [ 2 51][ 2 50][ 2 48][ 2 51][ 2 49][ 0 47][ 2 48][ 0 47]
Mc0.Ch1.B0: [ 0 46][ 0 47][ 0 48][ 0 47][ 0 44][ 0 44][ 0 47][ 0 44]
Mc0.Ch1.B1: [ 0 46][ 0 44][ 0 42][ 0 45][ 0 38][ 0 41][ 0 42][ 0 41]
Mc0.Ch2.B0: [ 0 42][ 0 45][ 0 43][ 0 41][ 2 43][ 0 43][ 1 45][ 0 42]
Mc0.Ch2.B1: [ 2 47][ 0 42][ 0 41][ 0 41][ 0 44][ 2 43][ 0 39][ 0 41]
Mc0.Ch3.B0: [ 0 56][ 0 59][ 0 57][ 0 56][ 1 54][ 0 51][ 4 55][ 0 55]
Mc0.Ch3.B1: [ 0 56][ 0 53][ 1 57][ 0 54][ 3 55][ 2 49][ 1 54][ 1 52]
Mc1.Ch0.B0: [ 1 55][ 0 50][ 2 56][ 0 56][ 0 48][ 0 48][ 0 49][ 0 51]
Mc1.Ch0.B1: [ 2 48][ 3 45][ 4 49][ 3 47][ 5 49][ 2 48][ 4 48][ 3 49]
Mc1.Ch1.B0: [ 4 51][ 0 45][ 0 46][ 0 46][ 5 49][ 0 44][ 1 49][ 0 45]
Mc1.Ch1.B1: [ 4 36][ 0 37][ 0 32][ 0 36][ 3 28][ 1 33][ 3 35][ 0 33]
Mc1.Ch2.B0: [ 0 44][ 0 43][ 0 45][ 0 47][ 1 43][ 2 43][ 4 43][ 3 44]
Mc1.Ch2.B1: [ 1 51][ 0 47][ 1 54][ 1 55][ 0 47][ 2 51][ 1 53][ 0 52]
Mc1.Ch3.B0: [ 1 48][ 0 45][ 5 52][ 1 49][ 2 47][ 2 49][ 3 48][ 0 47]
Mc1.Ch3.B1: [ 0 44][ 0 43][ 0 45][ 0 47][ 0 42][ 0 45][ 0 41][ 0 40]
Per Bit Offset
Mc0.Ch0.B0: 22 22 20 20 20 20 19 19
Mc0.Ch0.B1: 23 22 21 23 22 20 21 20
Mc0.Ch1.B0: 19 20 20 20 18 18 20 18
Mc0.Ch1.B1: 19 18 17 19 15 17 17 17
Mc0.Ch2.B0: 17 19 18 17 19 18 19 17
Mc0.Ch2.B1: 21 17 17 17 18 19 16 17
Mc0.Ch3.B0: 24 26 25 24 24 22 26 24
Mc0.Ch3.B1: 24 23 25 23 25 22 24 23
Mc1.Ch0.B0: 24 21 25 24 20 20 21 22
Mc1.Ch0.B1: 21 20 23 21 23 21 22 22
Mc1.Ch1.B0: 24 19 19 19 23 18 21 19
Mc1.Ch1.B1: 16 15 12 14 12 13 15 13
Mc1.Ch2.B0: 18 18 19 20 18 19 20 20
Mc1.Ch2.B1: 22 20 24 24 20 23 23 22
Mc1.Ch3.B0: 21 19 25 21 21 22 22 20
Mc1.Ch3.B1: 18 18 19 20 17 19 17 16
START_RxDqsBitDelay
R Mc0.C0.R1.S0.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S0.B1 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S0.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B6 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S0.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S1.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S1.B1 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S1.B2 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S1.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S1.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S1.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S1.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S1.B7 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B0 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S2.B1 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S2.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S2.B6 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B7 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S3.B0 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S3.B2 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S3.B3 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B4 RxDqsBitDelay: 19 (0x13)
R Mc0.C0.R1.S3.B5 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S3.B6 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S3.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B0 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B2 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B4 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B6 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S5.B0 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S5.B1 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S5.B2 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S5.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S5.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S5.B5 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S5.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S6.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B1 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S6.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S6.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B4 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B5 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S6.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S6.B7 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S7.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S7.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B5 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S7.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S0.B0 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S0.B1 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S0.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S0.B3 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S0.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S0.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S0.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S1.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S1.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S1.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S2.B0 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S2.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S2.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S2.B3 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S2.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S2.B5 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S2.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S2.B7 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S3.B0 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S3.B1 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R1.S3.B2 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R1.S3.B3 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R1.S3.B4 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R1.S3.B5 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R1.S3.B6 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R1.S3.B7 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R1.S4.B0 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S4.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S4.B4 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B5 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S4.B6 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S4.B7 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S5.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B2 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S5.B3 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S5.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B5 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S5.B6 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S5.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S6.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S6.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S6.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S6.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S6.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S6.B5 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S6.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S6.B7 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B0 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S7.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S7.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S7.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B4 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S7.B5 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S7.B6 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S7.B7 RxDqsBitDelay: 20 (0x14)
STOP_RxDqsBitDelay
Calling with EnRxDutyCycle = 1, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 140 150 140 150 90 90 140 140 140 150 150 150 60 70 120 120 140 150 160 160 140 150 150 150 140 150 130 140 160 170 140 140 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 150 240 150 170 90 210 140 230 150 220 150 170 70 240 120 260 150 260 160 240 150 220 150 230 150 230 140 250 170 230 140
Vref = -10: 230 150 220 150 180 90 220 140 210 150 210 150 160 70 250 120 250 150 250 160 230 150 230 150 220 150 210 140 250 170 230 140
Vref = -21: 220 150 210 150 180 90 230 140 200 150 180 150 150 70 240 120 250 150 240 160 220 150 220 150 220 150 200 140 270 170 230 140
Vref = -31: 190 150 180 150 140 90 180 140 170 150 150 150 130 70 210 120 230 150 220 160 190 150 200 150 190 150 170 140 240 170 200 140
Vref = 10: 220 150 220 150 190 90 210 140 190 150 210 150 150 70 200 120 230 150 240 160 230 150 210 150 220 150 200 140 240 170 230 140
Vref = 21: 190 150 210 150 150 90 180 140 170 150 190 150 130 70 180 120 210 150 220 160 220 150 180 150 200 150 180 140 210 170 200 140
Vref = 31: 160 150 160 150 130 90 150 140 150 150 150 150 80 70 150 120 160 150 190 160 180 150 150 150 160 150 160 140 170 170 170 140
Weighted Center -3 -3 -4 -3 -3 -2 -4 -5 -4 -4 -4 -3 -3 -3 -3 -4
Final Center -13 -13 -7 -12 -13 -13 -5 -10 -13 -14 -13 -13 -13 -12 -15 -12
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 150 240 150 180 90 210 140 220 150 220 150 180 70 250 120 260 150 260 160 230 150 190 150 230 150 230 140 250 170 220 140
Vref = -10: 220 150 220 150 150 90 190 140 200 150 200 150 160 70 250 120 240 150 250 160 220 150 180 150 220 150 210 140 240 170 200 140
Vref = -21: 200 150 200 150 120 90 160 140 180 150 180 150 120 70 220 120 210 150 230 160 200 150 170 150 190 150 190 140 220 170 190 140
Vref = -31: 180 150 180 150 80 90 130 140 160 150 150 150 100 70 210 120 180 150 190 160 170 150 140 150 170 150 160 140 170 170 140 140
Vref = 10: 210 150 220 150 160 90 200 140 200 150 190 150 150 70 250 120 230 150 250 160 220 150 190 150 200 150 200 140 230 170 220 140
Vref = 21: 190 150 200 150 130 90 180 140 180 150 180 150 130 70 210 120 200 150 220 160 190 150 180 150 180 150 170 140 210 170 190 140
Vref = 31: 160 150 160 150 110 90 160 140 150 150 160 150 100 70 180 120 170 150 190 160 170 150 150 150 150 150 150 140 170 170 170 140
Weighted Center -3 -3 -3 -2 -2 -2 -4 -6 -4 -4 -3 -1 -3 -3 -3 -3
Final Center -16 -16 -10 -14 -15 -15 -9 -16 -17 -18 -16 -14 -16 -15 -18 -15
LstSavd Margins 140 140 140 140 90 90 130 130 140 140 140 140 60 60 130 130 140 150 160 170 150 160 150 150 150 160 140 150 160 170 140 130 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 250 140 230 140 170 90 210 130 230 140 230 140 170 60 240 130 260 150 250 170 240 160 220 150 230 160 240 150 250 170 230 130
Vref = -10: 260 140 240 140 170 90 230 130 230 140 230 140 190 60 240 130 250 150 240 170 240 160 230 150 240 160 230 150 260 170 240 130
Vref = -21: 240 140 230 140 150 90 220 130 230 140 220 140 170 60 250 130 250 150 230 170 220 160 230 150 230 160 210 150 260 170 230 130
Vref = -32: 230 140 210 140 130 90 180 130 200 140 170 140 150 60 230 130 230 150 210 170 210 160 210 150 210 160 190 150 240 170 190 130
Vref = 10: 250 140 240 140 160 90 220 130 220 140 230 140 170 60 240 130 220 150 220 170 240 160 220 150 230 160 220 150 240 170 230 130
Vref = 21: 230 140 230 140 130 90 190 130 200 140 210 140 150 60 200 130 200 150 200 170 220 160 200 150 220 160 190 150 220 170 210 130
Vref = 32: 200 140 200 140 100 90 160 130 160 140 170 140 100 60 150 130 160 150 180 170 210 160 160 150 190 160 160 150 180 170 170 130
Weighted Center -5 -4 -3 -4 -4 -4 -5 -5 -4 -3 -4 -3 -3 -3 -4 -5
Final Center -12 -12 -7 -11 -12 -12 -4 -11 -13 -15 -14 -13 -14 -13 -15 -11
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 140 230 140 160 90 210 130 220 140 210 140 180 60 240 130 230 150 240 170 240 160 200 150 230 160 230 150 250 170 220 130
Vref = -10: 230 140 220 140 140 90 200 130 200 140 210 140 150 60 230 130 240 150 240 170 230 160 190 150 220 160 220 150 240 170 200 130
Vref = -21: 210 140 200 140 100 90 160 130 190 140 190 140 120 60 210 130 210 150 210 170 200 160 170 150 200 160 190 150 220 170 170 130
Vref = -32: 190 140 180 140 90 90 130 130 160 140 160 140 90 60 180 130 180 150 180 170 170 160 140 150 170 160 170 150 180 170 140 130
Vref = 10: 210 140 210 140 150 90 200 130 190 140 200 140 180 60 210 130 210 150 220 170 220 160 190 150 210 160 220 150 230 170 210 130
Vref = 21: 190 140 190 140 120 90 190 130 170 140 180 140 150 60 190 130 190 150 210 170 200 160 170 150 190 160 180 150 210 170 190 130
Vref = 32: 160 140 170 140 90 90 150 130 140 140 160 140 110 60 160 130 160 150 180 170 180 160 150 150 160 160 150 150 180 170 170 130
Weighted Center -4 -3 -2 -3 -3 -3 -5 -4 -3 -3 -3 -2 -2 -3 -3 -3
Final Center -16 -15 -9 -14 -15 -15 -9 -15 -16 -18 -17 -15 -16 -16 -18 -14
MRC task Read Timing Centering 2D Before Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD49h
MRC task -- PowerSavingMeter Base Line Update -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MRC task PowerSavingMeter Base Line Update -- SUCCEEDED, Status = 0h.
Post Code: DD3Ah
MRC task -- Command Voltage Centering -- Started.
Cmd Vref Training with LC = 10
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . # # . . # # # # # # 0x67E6_0 0x0_0 0x0_0 0x6BB8_0 0x0_0 0xFC2_0 0x5868_0 0x6E_0
-36 # # . . . . # # . . . . # # . . 0x40D_0 0x0_0 0x0_0 0x6A83_0 0x0_0 0x0_0 0xE2F_0 0x0_0
-32 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x5020_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x6C_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . # # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x70_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -24 40 64 8
B1: -24 40 64 8
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -20 40 60 10
B1: -20 40 60 10
Mc1.C2.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R0: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . . . . . # # # # . . 0x716E_0 0x0_0 0x0_0 0x0_0 0x0_0 0x4D63_0 0x4A86_0 0x0_0
-36 . . . . . . . . . . # # # # . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x53E5_0 0x4CE6_0 0x0_0
-32 . . . . . . . . . . # # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x60F1_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -28 40 68 6
B1: -28 40 68 6
Mc1.C2.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Cmd Vref Summary:
Low High Height Center
Mc0.C0: 32 40 72 4
Mc0.C1: 40 40 80 0
Mc0.C2: 40 40 80 0
Mc0.C3: 24 40 64 8
Mc1.C0: 40 40 80 0
Mc1.C1: 20 40 60 10
Mc1.C2: 32 40 72 4
Mc1.C3: 36 40 76 2
MRC task Command Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD3Eh
MRC task -- Late command training -- Started.
Mc0: C0: CmdGroup0 Pi Code: 128
Mc0: C1: CmdGroup0 Pi Code: 128
Mc0: C2: CmdGroup0 Pi Code: 128
Mc0: C3: CmdGroup0 Pi Code: 128
Mc1: C0: CmdGroup0 Pi Code: 128
Mc1: C1: CmdGroup0 Pi Code: 128
Mc1: C2: CmdGroup0 Pi Code: 128
Mc1: C3: CmdGroup0 Pi Code: 128
*** Center CMD Pi Timing
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
. . . . # . . .
32 32 32 32 96 32 32 32
# # # # . # # #
48 48 48 48 80 48 48 48
# # # # . # # #
56 56 56 56 72 56 56 56
# # # # . # # #
60 60 60 60 68 60 60 60
# # # # . # # #
62 62 62 62 66 62 62 62
# . # . . . . .
63 61 63 61 65 61 61 61
. # . # . . # #
Pi Delay
192 192 192 192 192 192 192 192
# # # # # # # #
160 160 160 160 160 160 160 160
. . . . . . . .
176 176 176 176 176 176 176 176
# # # # # # # #
168 168 168 168 168 168 168 168
# # . . . # . #
164 164 172 172 172 164 172 164
. # . # . # . #
166 162 174 170 174 162 174 162
# # # . . # # #
165 161 173 171 175 161 173 161
# . . # # # . .
Mc Ch Left Right Width Center
0 0 63 164 101 114
0 1 62 161 99 112
0 2 63 173 110 118
0 3 62 170 108 116
1 0 65 174 109 120
1 1 61 160 99 111
1 2 62 173 111 118
1 3 62 161 99 112
*** Center Control Timing
*** ECT results
Ctl0Ch0Rank0: CTL: 128
Ctl0Ch0Rank1: CTL: 128
Ctl0Ch1Rank0: CTL: 128
Ctl0Ch1Rank1: CTL: 128
Ctl0Ch2Rank0: CTL: 128
Ctl0Ch2Rank1: CTL: 128
Ctl0Ch3Rank0: CTL: 128
Ctl0Ch3Rank1: CTL: 128
Ctl1Ch0Rank0: CTL: 128
Ctl1Ch0Rank1: CTL: 128
Ctl1Ch1Rank0: CTL: 128
Ctl1Ch1Rank1: CTL: 128
Ctl1Ch2Rank0: CTL: 128
Ctl1Ch2Rank1: CTL: 128
Ctl1Ch3Rank0: CTL: 128
Ctl1Ch3Rank1: CTL: 128
Centering CTL on Ranks 0x3
Rank 0x0
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
# # # # # . # #
96 96 96 96 96 32 96 96
. . . . . # . .
80 80 80 80 80 48 80 80
. . . . . # . .
72 72 72 72 72 56 72 72
. . # . # # . .
68 68 76 68 76 60 68 68
# . . # . # # .
70 66 74 70 74 62 70 66
# # . . # . # .
71 67 73 69 75 61 71 65
. # . # . # . #
Pi Delay
192 192 192 192 192 192 192 192
. # . # . # # #
224 160 224 160 224 160 160 160
# . # . # . . .
208 176 208 176 208 176 176 176
# . # . # . . .
200 184 200 184 200 184 184 184
# . # # # # . .
196 188 196 180 196 180 188 188
# # # . # . . #
194 186 194 182 194 182 190 186
# . # . # # . #
193 187 193 183 193 181 191 185
# . . # . . # .
Mc Ch Left Right Width Center
0 0 71 192 121 132
0 1 68 187 119 128
0 2 73 193 120 133
0 3 70 182 112 126
1 0 75 193 118 134
1 1 62 181 119 122
1 2 71 190 119 131
1 3 66 185 119 126
Rank 0x1
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
# # # # # . # .
96 96 96 96 96 32 96 32
. . . . . # . #
80 80 80 80 80 48 80 48
. . . . . # . #
72 72 72 72 72 56 72 56
. . . . . # . #
68 68 68 68 68 60 68 60
# . # . . # . #
70 66 70 66 66 62 66 62
. # # # # . # .
69 67 71 67 67 61 67 61
. . . . # # . #
Pi Delay
192 192 192 192 192 192 192 192
# # # # # # # #
160 160 160 160 160 160 160 160
. . . . . . . .
176 176 176 176 176 176 176 176
. . . . . . . .
184 184 184 184 184 184 184 184
. . . . . # . #
188 188 188 188 188 180 188 180
. # . # . . . .
190 186 190 186 190 182 190 182
# . . . # # # .
189 187 191 187 189 181 189 183
. # # # # . # #
Mc Ch Left Right Width Center
0 0 69 189 120 129
0 1 67 186 119 127
0 2 71 190 119 131
0 3 67 186 119 127
1 0 68 188 120 128
1 1 62 181 119 122
1 2 67 188 121 128
1 3 62 182 120 122
MRC task Late command training -- SUCCEEDED, Status = 0h.
Post Code: DD3Ah
MRC task -- Command Voltage Centering -- Started.
Cmd Vref Training with LC = 10
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . # # . . . . # # . . 0x6AC9_0 0x0_0 0x0_0 0x6431_0 0x0_0 0x0_0 0x7280_0 0x0_0
-36 # # . . . . # # . . . . # # . . 0x4AC6_0 0x0_0 0x0_0 0x54EF_0 0x0_0 0x0_0 0x1E9C_0 0x0_0
-32 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x5B85_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x148_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x6B_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -20 40 60 10
B1: -20 40 60 10
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C2.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . . . . . # # # # . . 0x59A0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x2AA8_0 0x71E3_0 0x0_0
-36 . . . . . . . . . . # # # # . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x20AD_0 0x57B4_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C2.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Cmd Vref Summary:
Low High Height Center
Mc0.C0: 32 40 72 4
Mc0.C1: 40 40 80 0
Mc0.C2: 40 40 80 0
Mc0.C3: 20 40 60 10
Mc1.C0: 40 40 80 0
Mc1.C1: 32 40 72 4
Mc1.C2: 32 40 72 4
Mc1.C3: 40 40 80 0
MRC task Command Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD41h
MRC task -- Comp Optimization Training -- Started.
***** Opt Param:SCompCmd *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 63
Comp Vref: 16
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:SCompCtl *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 47
Comp Vref: 0
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:SCompDq *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 0
Comp Vref: 0
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCmdUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 5
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 2, side effect = FALSE
Comp: 13
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCmdDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCtlUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 6
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCtlDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 6
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 15
Comp Vref: 106
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 22
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 2, side effect = TRUE
Comp: 8
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 22
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:RdOdtUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 8
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 1, side effect = FALSE
Comp: 8
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
Re-center Cmd/Ctl Timings
Centering CTL/CMD on Ranks 0x3
Mc Ch Left Right Width Center
0 0 520 540 106 1
Mc Ch Left Right Width Center
0 1 500 540 104 2
Mc Ch Left Right Width Center
0 2 560 580 114 1
Mc Ch Left Right Width Center
0 3 400 560 96 8
Mc Ch Left Right Width Center
1 0 560 560 112 0
Mc Ch Left Right Width Center
1 1 500 560 106 3
Mc Ch Left Right Width Center
1 2 560 580 114 1
Mc Ch Left Right Width Center
1 3 300 540 84 12
Re-center Cmd Vref
Re-center Write Timing
Re-center Read Timing
Re-center Write Vref
Re-center Read Vref
Re-center RcvEnable
MRC task Comp Optimization Training -- SUCCEEDED, Status = 0h.
Post Code: DD3Bh
MRC task -- Write Voltage Centering 2D -- Started.
Mc0.Ch0 TimScale is 12
Mc0.Ch1 TimScale is 12
Mc0.Ch2 TimScale is 12
Mc0.Ch3 TimScale is 12
Mc1.Ch0 TimScale is 12
Mc1.Ch1 TimScale is 12
Mc1.Ch2 TimScale is 12
Mc1.Ch3 TimScale is 12
Rank0
Mc0.Ch0: Mc0.Ch1: Mc0.Ch2: Mc0.Ch3: Mc1.Ch0: Mc1.Ch1: Mc1.Ch2: Mc1.Ch3:
WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center
-4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0
4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0
0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0
WtdCntr 1 1 1 1 1 1 1 1
MRC task Write Voltage Centering 2D -- SUCCEEDED, Status = 0h.
Post Code: DD3Ch
MRC task -- Read Voltage Centering 2D -- Started.
### Measure Eye Height, per BYTE, at ALL (2D) Timing Points RankMask = 0xF
Mc0.Ch0 Mc0.Ch1 Mc0.Ch2 Mc0.Ch3 Mc1.Ch0 Mc1.Ch1 Mc1.Ch2 Mc1.Ch3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TScale 12 12 12 12 12 12 10 12 12 12 12 12 12 12 12 12
RdTime 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Lo 400 445 360 424 446 430 360 415 440 450 380 420 350 440 445 440
High 420 426 420 475 450 420 350 480 490 480 380 430 440 466 470 450
Center 1 0 3 2 0 0 0 3 2 1 0 0 4 1 1 0
RdTime -8 -8 -8 -8 -8 -8 -6 -8 -8 -8 -8 -8 -8 -8 -8 -8
Lo 427 460 250 390 440 440 190 440 460 450 370 432 355 430 445 400
High 460 450 370 440 460 410 300 495 460 500 370 420 420 420 460 440
Center 1 0 6 2 1 -1 5 2 0 2 0 0 3 0 0 2
RdTime 8 8 8 8 8 8 6 8 8 8 8 8 8 8 8 8
Lo 370 410 400 432 452 420 414 433 440 462 406 428 374 430 453 440
High 410 400 430 505 480 440 440 490 486 500 400 450 440 420 473 470
Center 2 0 1 3 1 1 1 2 2 1 0 1 3 0 1 1
RdTime -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63
Lo 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
High 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
Center
WtdCntr 2 -1 4 3 1 0 2 3 2 2 0 0 4 0 1 1
RdVref 79 78 81 79 78 77 78 79 81 79 79 79 80 79 80 78
### Measure Eye Height, per BYTE, at ALL (2D) Timing Points RankMask = 0xF
Mc0.Ch0 Mc0.Ch1 Mc0.Ch2 Mc0.Ch3 Mc1.Ch0 Mc1.Ch1 Mc1.Ch2 Mc1.Ch3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TScale 12 12 12 12 12 12 10 12 12 12 12 12 12 12 12 12
RdTime 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Lo 424 430 410 450 450 420 370 453 460 470 380 410 425 440 460 450
High 380 440 350 430 470 430 340 410 440 450 360 412 330 437 440 430
Center -2 0 -3 -1 1 0 -1 -2 -1 -1 -1 0 -4 0 -1 -1
RdTime -8 -8 -8 -8 -8 -8 -6 -8 -8 -8 -8 -8 -8 -8 -8 -8
Lo 450 468 240 430 460 430 350 450 457 472 370 432 390 451 460 450
High 420 455 320 400 430 410 260 430 447 480 340 390 370 400 430 420
Center -1 0 4 -1 -1 -1 -4 -1 0 0 -1 -2 -1 -2 -1 -1
RdTime 8 8 8 8 8 8 6 8 8 8 8 8 8 8 8 8
Lo 390 390 466 466 462 410 420 456 460 495 410 433 414 420 460 450
High 360 370 380 430 470 450 370 450 452 470 390 427 360 390 465 440
Center -1 -1 -4 -1 0 2 -2 0 0 -1 -1 0 -2 -1 0 0
RdTime -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63
Lo 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
High 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
Center
WtdCntr -2 0 -1 -1 0 1 -3 -1 -1 -1 -1 -1 -3 -1 -1 -1
RdVref 77 78 80 78 78 78 75 78 80 78 78 78 77 78 79 77
MRC task Read Voltage Centering 2D -- SUCCEEDED, Status = 0h. Stack Depth: 163592
Post Code: DD38h
MRC task -- Write Timing Centering 2D After Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 250 260 260 200 200 240 240 250 250 250 250 210 210 260 260 250 250 250 250 250 250 250 250 250 250 250 250 240 240 250 250 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 260 230 240 200 200 230 230 240 250 250 250 210 190 230 250 250 250 250 260 260 250 210 250 230 250 250 260 260 250 250 240
Weighted Center 1 1 0 0 1 0 -1 1 0 1 -1 2 1 1 -1 -1
Final Center 73 73 69 73 76 73 68 74 74 76 72 78 75 74 77 73
Edges we pass on to GetMarginBit are
250 250 240 230 200 200 230 230 250 240 250 250 200 200 240 240 250 250 260 250 250 260 230 230 240 240 260 250 250 260 240 250
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x07050B0B0A090E0F ........ 0x080506090809090C ........ 0x0507060504090C09 ........ 0x070608050D060B06 ........ 0x070705090406040B ........ 0x0405090D0A090D0E .#...... 0x0907060706040407 .....#.. 0x070705050508060A ........ 0x050806050B0B0A0B .....#.. 0x0407040504050404 ........ 0x050C090E050B080C ........ 0x05060605070A0709 ........ 0x0A070705060B0806 ........ 0x060B07040B070906 ........ 0x070904060707070B ...#.... 0x050C05090D070C0E .....#..
0x06040A0A09080D0E ..#..... 0x070405080708080B ........ 0x0406050403080B08 .....#.. 0x060507040C050A05 ........ 0x060604080305030A ........ 0x0306080C09080C0D ........ 0x0806050605050306 ......#. 0x0606040404070509 ........ 0x040705040A0C090A ........ 0x0306030403040303 ........ 0x040B080D040A070B ........ 0x0405050406090608 ........ 0x09060604050A0705 .#...... 0x050A06030A060805 ........ 0x060803070606060A ....#... 0x040B04080C080B0D ........
0x05030A0908070C0D ..$...#. 0x060304070607070A ........ 0x0305040302080A07 .....$.. 0x050406030B040904 ........ 0x0505030702040209 ........ 0x0206070B08070B0C .$#..... 0x0705040504050305 ....#$$. 0x0505030303060408 .......# 0x03060403090C0809 .....$.. 0x0205020302030202 ........ 0x030A070C0309060A ........ 0x0304040305080507 ........ 0x0806050304090604 .$...... 0x0409050209050704 ........ 0x0507020706050509 #..$$##. 0x030A03070B080A0C .....$..
0x04020A0807060C0C ..$#.#$# 0x0502030605060609 ........ 0x0204030201080906 .#.##$.. 0x040305020A030803 ........ 0x0404020601030108 ........ 0x0106070A07060A0B .$$..#.. 0x0604030404050304 ....$$$. 0x0404020202050308 .......$ 0x02050302080C0708 ##..#$## 0x0104010201020101 ..#..... 0x0209060B02080509 .....#.. 0x0203030204070406 ........ 0x0706040203080503 .$....#. 0x0308040108040603 ........ 0x0506010706050508 $##$$$$. 0x020902060A08090B ...#.$##
0x03010A0806060C0C ..$$.$$$ 0x0401020504050508 ........ 0x0104020201080805 #$.$$$## 0x0302040109020702 ........ 0x0303010500020007 .......# 0x000607090606090A #$$..$.# 0x0503020304050303 ...#$$$. 0x0303010101040208 ...#.##$ 0x02050201080C0708 $$#.$$$$ 0x0003010100010000 ..$..... 0x0108050A01080408 .#...$.# 0x0102020103060305 ..#..... 0x0606030102070502 .$#...$. 0x0207030007030502 ........ 0x0506010706050507 $$$$$$$. 0x010801060908090B .##$.$$$
0x02000A0805060C0C ##$$#$$$ 0x0300010403040407 ........ 0x0104010201080805 $$.$$$$$ 0x0201030008010601 ....##.# 0x0202000400010007 ##.#$.$$ 0x000607080506080A $$$#.$#$ 0x0402010304050302 ...$$$$# 0x0202000100040208 ...$#$$$ 0x02050200080C0708 $$$.$$$$ 0x0002010000000000 $.$.$#$$ 0x0008040900080308 .$##.$#$ 0x0001020002050204 ..$.#... 0x0506030001060501 .$$.##$. 0x0106020006020401 ...$.... 0x0506010706050506 $$$$$$$# 0x000801060808090B #$$$#$$$
0x02000A0805060C0C $$$$$$$$ 0x0200000302030306 .$#.#... 0x0104000201080805 $$#$$$$$ 0x0100020008010501 ...$$$#$ 0x0202000400000007 $$$$$#$$ 0x000607080406080A $$$$.$$$ 0x0301000304050302 ...$$$$$ 0x0101000100040208 #.$$$$$$ 0x02050200080C0708 $$$$$$$$ 0x0001010000000000 $.$$$$$$ 0x0008040900080308 $$$$$$$$ 0x0000020002040103 $.$$$..# 0x0406030001060500 .$$$$$$# 0x0005010005010300 ..#$###. 0x0506010706050506 $$$$$$$$ 0x000801060808090B $$$$$$$$
0x02000A0805060C0C $$$$$$$$ 0x0100000202020205 .$$.$### 0x0104000201080805 $$$$$$$$ 0x0000010008010501 .$.$$$$$ 0x0202000400000007 $$$$$$$$ 0x000607080306080A $$$$#$$$ 0x0200000304050302 ##$$$$$$ 0x0100000100040208 $#$$$$$$ 0x02050200080C0708 $$$$$$$$ 0x0000010000000000 $#$$$$$$ 0x0008040900080308 $$$$$$$$ 0x0000020002030003 $$$$$..$ 0x0306030001060500 #$$$$$$$ 0x0004010005010300 $#$$$$$$ 0x0506010706050506 $$$$$$$$ 0x000801060808090B $$$$$$$$
0x02000A0805060C0C $$$$$$$$ 0x0000000102020205 #$$.$$$$ 0x0104000201080805 $$$$$$$$ 0x0000000008010501 $$#$$$$$ 0x0202000400000007 $$$$$$$$ 0x000607080306080A $$$$$$$$ 0x0200000304050302 $$$$$$$$ 0x0100000100040208 $$$$$$$$ 0x02050200080C0708 $$$$$$$$ 0x0000010000000000 $$$$$$$$ 0x0008040900080308 $$$$$$$$ 0x0000020002020003 $$$$$.$$ 0x0306030001060500 $$$$$$$$ 0x0004010005010300 $$$$$$$$ 0x0506010706050506 $$$$$$$$ 0x000801060808090B $$$$$$$$
0x02000A0805060C0C $$$$$$$$ 0x0000000002020205 $$$.$$$$ 0x0104000201080805 $$$$$$$$ 0x0000000008010501 $$$$$$$$ 0x0202000400000007 $$$$$$$$ 0x000607080306080A $$$$$$$$ 0x0200000304050302 $$$$$$$$ 0x0100000100040208 $$$$$$$$ 0x02050200080C0708 $$$$$$$$ 0x0000010000000000 $$$$$$$$ 0x0008040900080308 $$$$$$$$ 0x0000020002010003 $$$$$.$$ 0x0306030001060500 $$$$$$$$ 0x0004010005010300 $$$$$$$$ 0x0506010706050506 $$$$$$$$ 0x000801060808090B $$$$$$$$
0x02000A0805060C0C $$$$$$$$ 0x0000000002020205 $$$$$$$$ 0x0104000201080805 $$$$$$$$ 0x0000000008010501 $$$$$$$$ 0x0202000400000007 $$$$$$$$ 0x000607080306080A $$$$$$$$ 0x0200000304050302 $$$$$$$$ 0x0100000100040208 $$$$$$$$ 0x02050200080C0708 $$$$$$$$ 0x0000010000000000 $$$$$$$$ 0x0008040900080308 $$$$$$$$ 0x0000020002000003 $$$$$#$$ 0x0306030001060500 $$$$$$$$ 0x0004010005010300 $$$$$$$$ 0x0506010706050506 $$$$$$$$ 0x000801060808090B $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x07050B0B0A090E0F ........ 0x080506090809090C ........ 0x0507060504090C09 ........ 0x070608050D060B06 ........ 0x070705090406040B ........ 0x0405090D0A090D0E ........ 0x0907060706040407 ......#. 0x070705050508060A ....#... 0x050806050B0B0A0B .....#.. 0x0407040504050404 .#...... 0x050C090E050B080C ........ 0x05060605070A0709 ........ 0x0A070705060B0806 ........ 0x060B07040B070906 ........ 0x070904060707070B ........ 0x050C05090D070C0E ........
0x08060C0C0B0A0F10 ........ 0x0906070A090A0A0D ........ 0x06080706050A0D0A .....#.# 0x080709060E070C07 ....##.. 0x0808060A0507050C ........ 0x05060A0E0B0A0E0F ........ 0x0A08070807050308 ........ 0x080806060409070B ........ 0x060907060C0A0B0C ....#... 0x0506050605060505 .......# 0x060D0A0F060C090D ........ 0x06070706080B080A ........ 0x0B080806070C0907 ........ 0x070C08050C080A07 ###..... 0x080A05070808080C ........ 0x060D060A0E080D0F ........
0x09070D0D0C0B1011 .#....#. 0x0A07080B0A0B0B0E ........ 0x07090807060A0E0A ....#$.$ 0x09080A070E070D08 ....$$.. 0x0909070B0608060D ......#. 0x06070B0F0C0B0F10 ...#.... 0x0B09080908060309 ......$. 0x09090707040A080C ....$... 0x070A08070C0A0C0D ....$$.. 0x0606060706070605 #$#.###$ 0x070E0B10070D0A0E ........ 0x07080807090C090B ######.# 0x0C090907080D0A08 ........ 0x070C08060D090B08 $$$.##.. 0x090B06080909090D .......# 0x070E070B0F090E10 ........
0x0A070E0E0D0C1012 .$....$# 0x0B08090C0B0C0C0F ........ 0x080A0908060A0F0A ....$$.$ 0x0A090B080E070E09 ..#.$$#. 0x0A0A080C0709060E ......$. 0x07080C0F0D0C1011 ...$...# 0x0C0A090A0907030A ...##.$# 0x0A0A0808040B090D ..#.$#.# 0x080B09080C0A0D0E ....$$.. 0x0606060806070605 $$$#$$$$ 0x080F0C11080E0B0F ........ 0x07080807090C0A0B $$$$$$.$ 0x0D0A0A08090E0B09 ........ 0x070C08070D090C09 $$$#$$.. 0x0A0C07090A0A0A0D .......$ 0x080F080C100A0F11 ........
0x0B070F0F0E0D1012 #$.#..$$ 0x0C090A0D0C0D0D10 ...#.... 0x090B0A09060A100A ####$$.$ 0x0B0A0B090E070E0A #.$#$$$# 0x0B0B090D080A060F .##.#.$. 0x08090D0F0E0D1111 .##$.##$ 0x0D0B0A0A0908030A ..#$$.$$ 0x0B0B0809040B0A0D ##$#$$#$ 0x090C0A090C0A0E0F ####$$## 0x0606060806070605 $$$$$$$$ 0x09100D12090F0C10 ........ 0x07080807090C0B0B $$$$$$.$ 0x0E0B0B090A0F0C0A ........ 0x070C08070D090D0A $$$$$$#. 0x0B0D080A0B0B0B0D .#.....$ 0x0910090D110B1012 ........
0x0B07100F0F0E1012 $$#$##$$ 0x0D0A0B0D0D0E0E11 ...$.... 0x090B0A09060A110A $$$$$$#$ 0x0B0B0B090E070E0A $#$$$$$$ 0x0C0B090E080B0610 .$$.$#$. 0x09090D0F0F0D1111 #$$$.$$$ 0x0E0C0A0A0909030A .#$$$#$$ 0x0B0B0809040B0A0D $$$$$$$$ 0x090C0A090C0A0E0F $$$$$$$$ 0x0606060806070605 $$$$$$$$ 0x0A110E130A100D11 ........ 0x07080807090C0C0B $$$$$$.$ 0x0F0C0C0A0B100D0B .....#.. 0x070C08070D090D0B $$$$$$$# 0x0C0D090B0C0C0C0D .$###..$ 0x0A110A0E120C1113 ..#####.
0x0B07100F0F0E1012 $$$$$$$$ 0x0E0B0C0D0E0F0F12 .##$##.. 0x090B0A09060A110A $$$$$$$$ 0x0B0B0B090E070E0A $$$$$$$$ 0x0D0B090F080B0611 .$$#$$$# 0x09090D0F100D1111 $$$$#$$$ 0x0F0C0A0A0909030A #$$$$$$$ 0x0B0B0809040B0A0D $$$$$$$$ 0x090C0A090C0A0E0F $$$$$$$$ 0x0606060806070605 $$$$$$$$ 0x0B120F140B110E12 ....#... 0x07080807090C0D0B $$$$$$#$ 0x100D0D0B0C100E0C ##.##$#. 0x070C08070D090D0B $$$$$$$$ 0x0D0D090B0C0D0D0D #$$$$##$ 0x0B120A0E120C1114 .#$$$$$.
0x0B07100F0F0E1012 $$$$$$$$ 0x0F0B0C0D0E0F1013 #$$$$$#. 0x090B0A09060A110A $$$$$$$$ 0x0B0B0B090E070E0A $$$$$$$$ 0x0E0B090F080B0611 #$$$$$$$ 0x09090D0F100D1111 $$$$$$$$ 0x0F0C0A0A0909030A $$$$$$$$ 0x0B0B0809040B0A0D $$$$$$$$ 0x090C0A090C0A0E0F $$$$$$$$ 0x0606060806070605 $$$$$$$$ 0x0C1310150B120F13 #.#.$... 0x07080807090C0D0B $$$$$$$$ 0x100D0E0B0C100E0D $$#$$$$# 0x070C08070D090D0B $$$$$$$$ 0x0D0D090B0C0D0D0D $$$$$$$$ 0x0C120A0E120C1115 #$$$$$$.
0x0B07100F0F0E1012 $$$$$$$$ 0x0F0B0C0D0E0F1014 $$$$$$$. 0x090B0A09060A110A $$$$$$$$ 0x0B0B0B090E070E0A $$$$$$$$ 0x0E0B090F080B0611 $$$$$$$$ 0x09090D0F100D1111 $$$$$$$$ 0x0F0C0A0A0909030A $$$$$$$$ 0x0B0B0809040B0A0D $$$$$$$$ 0x090C0A090C0A0E0F $$$$$$$$ 0x0606060806070605 $$$$$$$$ 0x0C1410160B131014 $.$.$### 0x07080807090C0D0B $$$$$$$$ 0x100D0E0B0C100E0D $$$$$$$$ 0x070C08070D090D0B $$$$$$$$ 0x0D0D090B0C0D0D0D $$$$$$$$ 0x0C120A0E120C1116 $$$$$$$#
0x0B07100F0F0E1012 $$$$$$$$ 0x0F0B0C0D0E0F1015 $$$$$$$# 0x090B0A09060A110A $$$$$$$$ 0x0B0B0B090E070E0A $$$$$$$$ 0x0E0B090F080B0611 $$$$$$$$ 0x09090D0F100D1111 $$$$$$$$ 0x0F0C0A0A0909030A $$$$$$$$ 0x0B0B0809040B0A0D $$$$$$$$ 0x090C0A090C0A0E0F $$$$$$$$ 0x0606060806070605 $$$$$$$$ 0x0C1510170B131014 $#$#$$$$ 0x07080807090C0D0B $$$$$$$$ 0x100D0E0B0C100E0D $$$$$$$$ 0x070C08070D090D0B $$$$$$$$ 0x0D0D090B0C0D0D0D $$$$$$$$ 0x0C120A0E120C1116 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 3 10][ 1 6][ 11 15][ 9 14][ 6 14][ 7 13][ 13 15][ 13 17]
Mc0.Ch0.B1: [ 1 14][ 0 10][ 1 11][ 0 12][ 3 13][ 3 14][ 3 15][ 6 20]
Mc0.Ch1.B0: [ 2 8][ 5 10][ 1 9][ 3 8][ 2 5][ 9 9][ 9 16][ 6 9]
Mc0.Ch1.B1: [ 0 10][ 0 10][ 1 10][ 0 8][ 9 13][ 2 6][ 6 13][ 2 9]
Mc0.Ch2.B0: [ 3 13][ 3 10][ 0 8][ 5 14][ 0 7][ 1 10][ 0 5][ 8 16]
Mc0.Ch2.B1: [ 1 8][ 6 8][ 8 12][ 9 14][ 4 15][ 7 12][ 9 16][ 11 16]
Mc0.Ch3.B0: [ 3 14][ 1 11][ 0 9][ 4 9][ 5 8][ 5 8][ 4 3][ 3 9]
Mc0.Ch3.B1: [ 2 10][ 1 10][ 0 7][ 2 8][ 1 4][ 5 10][ 3 9][ 9 12]
Mc1.Ch0.B0: [ 3 8][ 6 11][ 3 9][ 0 8][ 9 11][ 12 10][ 8 13][ 9 14]
Mc1.Ch0.B1: [ 0 5][ 1 6][ 2 5][ 0 7][ 0 5][ 1 6][ 0 5][ 0 4]
Mc1.Ch1.B0: [ 0 11][ 9 20][ 5 15][ 10 22][ 0 10][ 9 18][ 4 15][ 9 19]
Mc1.Ch1.B1: [ 0 6][ 0 7][ 3 7][ 0 6][ 3 8][ 1 11][ 0 12][ 4 10]
Mc1.Ch2.B0: [ 4 15][ 7 12][ 4 13][ 0 10][ 2 11][ 7 15][ 6 13][ 1 12]
Mc1.Ch2.B1: [ 0 6][ 5 11][ 2 7][ 0 6][ 6 12][ 2 8][ 4 12][ 0 10]
Mc1.Ch3.B0: [ 6 12][ 7 12][ 2 8][ 7 10][ 7 11][ 6 12][ 6 12][ 7 12]
Mc1.Ch3.B1: [ 1 11][ 9 17][ 2 9][ 7 13][ 9 17][ 8 11][ 10 16][ 12 21]
Per Bit Offset
Mc0.Ch0.B0: -1 -2 2 1 0 1 0 0
Mc0.Ch0.B1: -1 0 0 -3 0 -1 0 1
Mc0.Ch1.B0: 0 1 -1 1 -1 0 1 -2
Mc0.Ch1.B1: -2 -1 -3 -1 -2 -2 -2 -1
Mc0.Ch2.B0: 1 -1 -1 1 -1 -1 -2 1
Mc0.Ch2.B1: 1 2 1 -2 -1 1 -1 -1
Mc0.Ch3.B0: -1 -1 -2 -1 1 3 -1 -1
Mc0.Ch3.B1: -1 -2 -2 0 -3 -1 0 1
Mc1.Ch0.B0: 1 1 0 -1 -1 0 1 1
Mc1.Ch0.B1: -2 -4 -1 -2 -2 -2 -2 -2
Mc1.Ch1.B0: 1 3 1 2 0 3 2 2
Mc1.Ch1.B1: -2 -3 -1 -2 -2 -4 -1 -2
Mc1.Ch2.B0: -1 3 2 0 1 0 2 1
Mc1.Ch2.B1: -3 -3 -3 -1 -2 -2 -1 -1
Mc1.Ch3.B0: 2 1 1 3 2 2 2 -2
Mc1.Ch3.B1: 1 1 1 1 0 3 1 3
START_TxDqBitDelay
R Mc0.C0.R0.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R0.S0.B1 TxDqBitDelay: 3
R Mc0.C0.R0.S0.B2 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S0.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S0.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S0.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S0.B6 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S0.B7 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R0.S1.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B4 TxDqBitDelay: 8
R Mc0.C0.R0.S1.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S1.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S2.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B1 TxDqBitDelay: 8
R Mc0.C0.R0.S2.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S2.B4 TxDqBitDelay: 3
R Mc0.C0.R0.S2.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S2.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S2.B7 TxDqBitDelay: 7
R Mc0.C0.R0.S3.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B3 TxDqBitDelay: 4
R Mc0.C0.R0.S3.B4 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S3.B5 TxDqBitDelay: 4
R Mc0.C0.R0.S3.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S3.B7 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B0 TxDqBitDelay: 8
R Mc0.C0.R0.S4.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B2 TxDqBitDelay: 4
R Mc0.C0.R0.S4.B3 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S4.B4 TxDqBitDelay: 3
R Mc0.C0.R0.S4.B5 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B6 TxDqBitDelay: 2
R Mc0.C0.R0.S4.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S5.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S5.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S5.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S5.B4 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S5.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S6.B0 TxDqBitDelay: 8
R Mc0.C0.R0.S6.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B2 TxDqBitDelay: 4
R Mc0.C0.R0.S6.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B4 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B6 TxDqBitDelay: 3
R Mc0.C0.R0.S6.B7 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B0 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B2 TxDqBitDelay: 3
R Mc0.C0.R0.S7.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B4 TxDqBitDelay: 2
R Mc0.C0.R0.S7.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B1 TxDqBitDelay: 9
R Mc1.C1.R0.S0.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S0.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S1.B0 TxDqBitDelay: 2
R Mc1.C1.R0.S1.B1 TxDqBitDelay: 3
R Mc1.C1.R0.S1.B2 TxDqBitDelay: 3
R Mc1.C1.R0.S1.B3 TxDqBitDelay: 3
R Mc1.C1.R0.S1.B4 TxDqBitDelay: 2
R Mc1.C1.R0.S1.B5 TxDqBitDelay: 3
R Mc1.C1.R0.S1.B6 TxDqBitDelay: 2
R Mc1.C1.R0.S1.B7 TxDqBitDelay: 2
R Mc1.C1.R0.S2.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S2.B1 TxDqBitDelay: 15 (0xF)
R Mc1.C1.R0.S2.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S2.B3 TxDqBitDelay: 16 (0x10)
R Mc1.C1.R0.S2.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B5 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S2.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S2.B7 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S3.B0 TxDqBitDelay: 3
R Mc1.C1.R0.S3.B1 TxDqBitDelay: 3
R Mc1.C1.R0.S3.B2 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B3 TxDqBitDelay: 3
R Mc1.C1.R0.S3.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B6 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B0 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S4.B2 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S4.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S4.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B0 TxDqBitDelay: 3
R Mc1.C1.R0.S5.B1 TxDqBitDelay: 8
R Mc1.C1.R0.S5.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S5.B3 TxDqBitDelay: 3
R Mc1.C1.R0.S5.B4 TxDqBitDelay: 9
R Mc1.C1.R0.S5.B5 TxDqBitDelay: 5
R Mc1.C1.R0.S5.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S5.B7 TxDqBitDelay: 5
R Mc1.C1.R0.S6.B0 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S6.B2 TxDqBitDelay: 5
R Mc1.C1.R0.S6.B3 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B4 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B5 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S7.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B1 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S7.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B4 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S7.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B6 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S7.B7 TxDqBitDelay: 17 (0x11)
STOP_TxDqBitDelay
LstSavd Margins 250 250 260 260 200 200 250 250 270 270 260 260 210 210 260 260 260 260 260 260 260 260 260 260 260 260 260 260 260 260 240 240 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 250 240 230 260 200 200 230 240 240 260 260 250 190 200 230 260 240 260 260 250 250 240 230 250 240 260 240 270 230 260 240 230
Weighted Center -1 2 0 1 1 -1 1 2 1 -1 -1 1 1 2 2 -1
Final Center 73 73 69 74 74 71 67 73 77 76 76 77 76 75 78 75
Edges we pass on to GetMarginBit are
240 250 250 240 200 200 240 230 250 250 250 260 200 190 250 240 250 250 250 260 240 250 240 240 250 250 260 250 250 240 230 240
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x06050A0908090B0C ........ 0x0604070606080C0D ........ 0x06060606050A0707 ........ 0x040606040A050907 ........ 0x080706090506040C ........ 0x0404090B0A070C0C ...#.... 0x0907070706060407 ........ 0x070904040509050B ........ 0x04070504080A090A ........ 0x0506050704070504 ........ 0x0409070B040B060B ........ 0x0A0C0D0B0C0D0D0E ....#... 0x09080A05070B0A06 .#...... 0x070C09060B070C08 ........ 0x0607040607060709 ........ 0x040A06060B050A0F ........
0x0504090807080A0B ......## 0x0503060505070B0C ........ 0x0505050504090606 .....#.. 0x0305050309040806 ........ 0x070605080405030B ........ 0x0303080C09060B0B .#...#.. 0x0806060605050306 ........ 0x060803030408040A ........ 0x0306040307090809 ........ 0x0405040603060403 ........ 0x0308060A030A050A ........ 0x090B0C0A0D0C0C0D .#....#. 0x08090904060A0905 ..#....# 0x060B08050A060B07 ........ 0x0506030506050608 ........ 0x030905050A04090E ........
0x0403080706070A0B ......$$ 0x0402050404060A0B ........ 0x0404040403090505 ....#$## 0x0204040208030705 ........ 0x060504070304020A ........ 0x0203070C08060A0A .$.$.$## 0x0705050504040205 ........ 0x0507020203070309 ........ 0x0205030206080708 ........ 0x0304030502050302 #.#..... 0x0207050902090409 ........ 0x080B0B090D0B0C0C #$..$#$# 0x0709090305090805 #$$#...$ 0x050A070409050A06 .....#.. 0x0405020405040507 ........ 0x020804040903080D ........
0x0302070605060A0B ..##.#$$ 0x030104030305090A ........ 0x0303030303090505 #...$$$$ 0x0103030107020604 ........ 0x0504030602030109 ##...#.. 0x0103060C07060A0A .$#$#$$$ 0x0604040403030104 ........ 0x0406010102060208 ........ 0x0104020105070607 ....#.#. 0x0303030401040201 $.$...## 0x0106040801080308 ........ 0x080B0A080D0B0C0C $$.#$$$$ 0x0709090304080705 $$$$###$ 0x0409060308050905 .....$.. 0x0304010304030406 ........ 0x010703030802070C .....#..
0x0201070604060A0B ##$$#$$$ 0x0200030202040809 ........ 0x0302020203090505 $..#$$$$ 0x0002020006010503 ........ 0x0504020501030008 $$...$#. 0x0003060C07060A0A #$$$$$$$ 0x0503030302020003 ........ 0x0305000001050107 ...#.#.# 0x0003010005060606 ...#$#$# 0x0302030300030201 $#$..#$$ 0x0005030700070207 .#.....# 0x080B09080D0B0C0C $$#$$$$$ 0x0709090304080705 $$$$$$$$ 0x0308050207050804 #.#..$.# 0x0203000203020305 ........ 0x000602020702060B ..#..$#.
0x0201070604060A0B $$$$$$$$ 0x0100020101030708 .$...#.. 0x0301010203090505 $#.$$$$$ 0x0001010005000402 $.#$.##. 0x0504010400030007 $$.#.$$# 0x0003060C07060A0A $$$$$$$$ 0x0402020201010002 ....#.$. 0x0204000000050007 ..$$#$#$ 0x0002000005060606 $##$$$$$ 0x0302030200030201 $$$.$$$$ 0x0005020600060107 $$..$#.$ 0x080B09080D0B0C0C $$$$$$$$ 0x0709090304080705 $$$$$$$$ 0x0307050106050704 $.$.#$#$ 0x0102000102010204 ..$..... 0x000502010602060A $.$#.$$.
0x0201070604060A0B $$$$$$$$ 0x0000010000030607 .$#..$.. 0x0301000203090505 $$.$$$$$ 0x0000010004000401 $.$$#$$. 0x0504000400030007 $$.$$$$$ 0x0003060C07060A0A $$$$$$$$ 0x0301010101000001 ....$.$. 0x0103000000050007 ..$$$$$$ 0x0002000005060606 $$$$$$$$ 0x0302030100030201 $$$#$$$$ 0x0005010500060007 $$#.$$#$ 0x080B09080D0B0C0C $$$$$$$$ 0x0709090304080705 $$$$$$$$ 0x0306050006050704 $#$.$$$$ 0x0001000001000103 ..$..... 0x0004020105020609 $#$$#$$#
0x0201070604060A0B $$$$$$$$ 0x0000010000030506 $$$$$$.. 0x0301000203090505 $$$$$$$$ 0x0000010004000400 $$$$$$$# 0x0504000400030007 $$$$$$$$ 0x0003060C07060A0A $$$$$$$$ 0x0200000001000000 ....$$$. 0x0002000000050007 #.$$$$$$ 0x0002000005060606 $$$$$$$$ 0x0302030100030201 $$$$$$$$ 0x0005010400060007 $$$.$$$$ 0x080B09080D0B0C0C $$$$$$$$ 0x0709090304080705 $$$$$$$$ 0x0306050006050704 $$$$$$$$ 0x0000000000000002 $.$$.$.. 0x0004020105020609 $$$$$$$$
0x0201070604060A0B $$$$$$$$ 0x0000010000030405 $$$$$$.# 0x0301000203090505 $$$$$$$$ 0x0000010004000400 $$$$$$$$ 0x0504000400030007 $$$$$$$$ 0x0003060C07060A0A $$$$$$$$ 0x0100000001000000 .$$$$$$$ 0x0001000000050007 $.$$$$$$ 0x0002000005060606 $$$$$$$$ 0x0302030100030201 $$$$$$$$ 0x0005010300060007 $$$#$$$$ 0x080B09080D0B0C0C $$$$$$$$ 0x0709090304080705 $$$$$$$$ 0x0306050006050704 $$$$$$$$ 0x0000000000000001 $$$$$$$. 0x0004020105020609 $$$$$$$$
0x0201070604060A0B $$$$$$$$ 0x0000010000030305 $$$$$$.$ 0x0301000203090505 $$$$$$$$ 0x0000010004000400 $$$$$$$$ 0x0504000400030007 $$$$$$$$ 0x0003060C07060A0A $$$$$$$$ 0x0000000001000000 .$$$$$$$ 0x0000000000050007 $#$$$$$$ 0x0002000005060606 $$$$$$$$ 0x0302030100030201 $$$$$$$$ 0x0005010300060007 $$$$$$$$ 0x080B09080D0B0C0C $$$$$$$$ 0x0709090304080705 $$$$$$$$ 0x0306050006050704 $$$$$$$$ 0x0000000000000000 $$$$$$$. 0x0004020105020609 $$$$$$$$
0x0201070604060A0B $$$$$$$$ 0x0000010000030205 $$$$$$#$ 0x0301000203090505 $$$$$$$$ 0x0000010004000400 $$$$$$$$ 0x0504000400030007 $$$$$$$$ 0x0003060C07060A0A $$$$$$$$ 0x0000000001000000 $$$$$$$$ 0x0000000000050007 $$$$$$$$ 0x0002000005060606 $$$$$$$$ 0x0302030100030201 $$$$$$$$ 0x0005010300060007 $$$$$$$$ 0x080B09080D0B0C0C $$$$$$$$ 0x0709090304080705 $$$$$$$$ 0x0306050006050704 $$$$$$$$ 0x0000000000000000 $$$$$$$$ 0x0004020105020609 $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x06050A0908090B0C ........ 0x0604070606080C0D ........ 0x06060606050A0707 ........ 0x040606040A050907 ........ 0x080706090506040C ........ 0x0404090B0A070C0C ........ 0x0907070706060407 ........ 0x070904040509050B .......# 0x04070504080A090A ........ 0x0506050704070504 ........ 0x0409070B040B060B ........ 0x0A0C0D0B0C0D0D0E ........ 0x09080A05070B0A06 ........ 0x070C09060B070C08 .#...... 0x0607040607060709 ........ 0x040A06060B050A0F ........
0x07060B0A090A0C0D ........ 0x0705080707090D0E ........ 0x07070707060B0808 ........ 0x050707050B060A08 .....#.# 0x0908070A0607050D ....#... 0x05050A0C0B080D0D ........ 0x0A08080807070508 ........ 0x080A0505060A060A .##.##.# 0x05080605090B0A0B ........ 0x0607060805080605 ........ 0x050A080C050C070C ........ 0x0B0D0E0C0D0E0E0F ###..... 0x0A090B06080C0B07 ........ 0x080B0A070C080D09 ...#.... 0x070805070807080A ........ 0x050B07070C060B10 ........
0x08070C0B0A0B0D0E .#...... 0x08060908080A0E0F ........ 0x08080808070C0909 ........ 0x060808060C060B08 .....$.$ 0x0A09080B0608060E .##.$.#. 0x06060B0D0C090E0E ........ 0x0B09090908080609 ........ 0x090A0506060A0709 .$$.$$.. 0x060907060A0C0B0C .....#.. 0x0708070906090706 ........ 0x060B090D060D080D ........ 0x0B0D0E0D0E0F0F10 $$$#.... 0x0B0A0C07090D0C08 ........ 0x090B0B070D090E0A .$.$.##. 0x080906080908090B ..#.#... 0x060C08080D070C11 ........
0x09070D0C0B0C0E0F .$...... 0x09070A09090B0F10 ..#...#. 0x09090909080D0A0A ...##... 0x070909070D060C08 ..###$.$ 0x0B09080C0609060F .$$.$#$# 0x07070C0E0D0A0F0F ........ 0x0C0A0A0A0909070A .....##. 0x0A0A0507060A0809 #$$.$$.$ 0x070A08070B0C0C0D .....$.. 0x0809080A070A0807 .....#.. 0x070C0A0E070E090E ........ 0x0B0D0E0D0F101011 $$$$##.# 0x0C0B0D080A0E0D09 ..#####. 0x0A0B0C070E090E0B #$#$#$$# 0x090A060909090A0C ..$.$#.. 0x070D09090E080D12 ........
0x0A070E0D0C0D0F10 .$...... 0x0A080A0A0A0C0F11 .#$#..$# 0x0A0A0A09080E0B0B ..#$$#.# 0x080A09070D060D08 #.$$$$#$ 0x0C09080D0609060F #$$#$$$$ 0x08080D0F0E0B1010 #.#..... 0x0D0B0B0B0A09070B .....$$. 0x0A0A0508060A0909 $$$#$$.$ 0x080B09080C0C0D0E #.#.#$.# 0x090A090B080A0908 .....$.. 0x080D0B0F080F0A0F #...##.# 0x0B0D0E0D0F101111 $$$$$$#$ 0x0D0C0D080A0E0D0A ..$$$$$# 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090B0D ##$#$$.# 0x080E0A0A0F090E13 ........
0x0B070F0E0D0E1011 #$...... 0x0B080A0A0B0D0F11 .$$$..$$ 0x0B0B0A09080E0C0B ..$$$$.$ 0x080B09070D060D08 $#$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D100F0C1111 $#$..... 0x0E0C0C0C0B09070C ....#$$# 0x0A0A0508060A0A09 $$$$$$#$ 0x080C09090C0C0E0E $#$.$$#$ 0x0A0B0A0C090A0A09 ####.$## 0x080E0C10080F0B0F $.##$$.$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A ##$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$#$ 0x090F0B0B100A0F14 ........
0x0B07100F0E0F1112 $$..###. 0x0C080A0A0C0E0F11 .$$$##$$ 0x0C0C0A09080E0D0B ##$$$$.$ 0x080B09070D060D08 $$$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D11100D1212 $$$.##.# 0x0F0D0D0D0B09070C ....$$$$ 0x0A0A0508060A0A09 $$$$$$$$ 0x080C090A0C0C0E0E $$$#$$$$ 0x0A0B0A0C0A0A0A09 $$$$#$$$ 0x080F0C10080F0C0F $.$$$$.$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A $$$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$$$ 0x0A100C0C110B1015 ..#.....
0x0B0711100E0F1113 $$#.$$$. 0x0D080A0A0C0E0F11 .$$$$$$$ 0x0C0C0A09080E0E0B $$$$$$#$ 0x080B09070D060D08 $$$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D12100D1312 $$$.$$#$ 0x100E0E0E0B09070C ..#.$$$$ 0x0A0A0508060A0A09 $$$$$$$$ 0x080C090A0C0C0E0E $$$$$$$$ 0x0A0B0A0C0A0A0A09 $$$$$$$$ 0x08100C10080F0D0F $.$$$$.$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A $$$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$$$ 0x0B110C0D120C1116 ..$.....
0x0B0711110E0F1114 $$$#$$$# 0x0E080A0A0C0E0F11 #$$$$$$$ 0x0C0C0A09080E0E0B $$$$$$$$ 0x080B09070D060D08 $$$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D13100D1312 $$$#$$$$ 0x110F0E0F0B09070C ##$#$$$$ 0x0A0A0508060A0A09 $$$$$$$$ 0x080C090A0C0C0E0E $$$$$$$$ 0x0A0B0A0C0A0A0A09 $$$$$$$$ 0x08110C10080F0E0F $#$$$$#$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A $$$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$$$ 0x0C120C0E130D1217 #.$#####
0x0B0711110E0F1114 $$$$$$$$ 0x0E080A0A0C0E0F11 $$$$$$$$ 0x0C0C0A09080E0E0B $$$$$$$$ 0x080B09070D060D08 $$$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D13100D1312 $$$$$$$$ 0x110F0E0F0B09070C $$$$$$$$ 0x0A0A0508060A0A09 $$$$$$$$ 0x080C090A0C0C0E0E $$$$$$$$ 0x0A0B0A0C0A0A0A09 $$$$$$$$ 0x08110C10080F0E0F $$$$$$$$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A $$$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$$$ 0x0C130C0E130D1217 $.$$$$$$
0x0B0711110E0F1114 $$$$$$$$ 0x0E080A0A0C0E0F11 $$$$$$$$ 0x0C0C0A09080E0E0B $$$$$$$$ 0x080B09070D060D08 $$$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D13100D1312 $$$$$$$$ 0x110F0E0F0B09070C $$$$$$$$ 0x0A0A0508060A0A09 $$$$$$$$ 0x080C090A0C0C0E0E $$$$$$$$ 0x0A0B0A0C0A0A0A09 $$$$$$$$ 0x08110C10080F0E0F $$$$$$$$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A $$$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$$$ 0x0C140C0E130D1217 $.$$$$$$
0x0B0711110E0F1114 $$$$$$$$ 0x0E080A0A0C0E0F11 $$$$$$$$ 0x0C0C0A09080E0E0B $$$$$$$$ 0x080B09070D060D08 $$$$$$$$ 0x0C09080D0609060F $$$$$$$$ 0x08090D13100D1312 $$$$$$$$ 0x110F0E0F0B09070C $$$$$$$$ 0x0A0A0508060A0A09 $$$$$$$$ 0x080C090A0C0C0E0E $$$$$$$$ 0x0A0B0A0C0A0A0A09 $$$$$$$$ 0x08110C10080F0E0F $$$$$$$$ 0x0B0D0E0D0F101111 $$$$$$$$ 0x0E0D0D080A0E0D0A $$$$$$$$ 0x0A0B0C070E090E0B $$$$$$$$ 0x0A0B060A09090C0D $$$$$$$$ 0x0C150C0E130D1217 $#$$$$$$
Edges
Mc0.Ch0.B0: [ 3 10][ 2 6][ 8 16][ 7 16][ 5 13][ 7 14][ 11 16][ 12 19]
Mc0.Ch0.B1: [ 0 13][ 0 7][ 2 9][ 0 9][ 0 11][ 4 13][ 3 14][ 6 16]
Mc0.Ch1.B0: [ 4 11][ 2 11][ 0 9][ 3 8][ 4 7][ 10 13][ 6 13][ 6 10]
Mc0.Ch1.B1: [ 0 7][ 0 10][ 2 8][ 0 6][ 5 12][ 1 5][ 5 12][ 1 7]
Mc0.Ch2.B0: [ 6 11][ 5 8][ 0 7][ 5 12][ 0 5][ 4 8][ 1 5][ 8 14]
Mc0.Ch2.B1: [ 1 7][ 4 8][ 7 12][ 12 18][ 8 15][ 7 12][ 11 18][ 11 17]
Mc0.Ch3.B0: [ 0 16][ 0 14][ 0 13][ 0 14][ 2 10][ 0 8][ 0 6][ 0 11]
Mc0.Ch3.B1: [ 1 9][ 1 9][ 0 4][ 1 7][ 1 5][ 6 9][ 1 9][ 8 9]
Mc1.Ch0.B0: [ 0 7][ 3 11][ 1 8][ 1 9][ 6 11][ 7 11][ 7 13][ 7 13]
Mc1.Ch0.B1: [ 4 9][ 3 10][ 4 9][ 2 11][ 0 9][ 4 9][ 3 9][ 2 8]
Mc1.Ch1.B0: [ 0 7][ 6 16][ 2 11][ 4 15][ 0 7][ 7 14][ 1 13][ 8 14]
Mc1.Ch1.B1: [ 9 10][ 12 12][ 10 13][ 9 12][ 13 14][ 12 15][ 13 16][ 13 16]
Mc1.Ch2.B0: [ 8 13][ 9 12][ 10 12][ 4 7][ 5 9][ 9 13][ 8 12][ 6 9]
Mc1.Ch2.B1: [ 4 9][ 7 11][ 6 11][ 0 6][ 7 13][ 6 8][ 8 13][ 5 10]
Mc1.Ch3.B0: [ 0 9][ 0 10][ 0 5][ 0 9][ 0 8][ 0 8][ 0 11][ 0 12]
Mc1.Ch3.B1: [ 0 11][ 5 20][ 3 11][ 2 13][ 6 18][ 3 12][ 7 17][ 10 22]
Per Bit Offset
Mc0.Ch0.B0: 1 -1 2 3 1 2 3 4
Mc0.Ch0.B1: 1 -1 -2 -2 -1 1 -4 -2
Mc0.Ch1.B0: 2 1 -2 -1 1 2 3 1
Mc0.Ch1.B1: -1 -1 -1 -1 -2 -2 -1 -3
Mc0.Ch2.B0: 1 -1 -3 -1 -3 0 -1 -1
Mc0.Ch2.B1: 0 2 1 4 2 3 3 2
Mc0.Ch3.B0: -1 0 -1 0 0 -2 -1 -2
Mc0.Ch3.B1: -2 -4 -2 0 -2 -2 0 -3
Mc1.Ch0.B0: -1 0 -1 1 1 -1 1 0
Mc1.Ch0.B1: 2 1 2 -1 1 -1 1 1
Mc1.Ch1.B0: -1 2 -1 -2 -1 -1 1 0
Mc1.Ch1.B1: -1 0 -2 -1 2 1 2 1
Mc1.Ch2.B0: 2 3 1 1 0 0 0 2
Mc1.Ch2.B1: -1 -3 -1 -3 -1 0 -2 -1
Mc1.Ch3.B0: -2 -2 -2 -2 -3 -2 -2 -3
Mc1.Ch3.B1: 2 3 1 2 1 3 2 1
START_TxDqBitDelay
R Mc0.C0.R1.S0.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S0.B1 TxDqBitDelay: 4
R Mc0.C0.R1.S0.B2 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S0.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S0.B4 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S0.B6 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R1.S0.B7 TxDqBitDelay: 16 (0x10)
R Mc0.C0.R1.S1.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S1.B1 TxDqBitDelay: 3
R Mc0.C0.R1.S1.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S1.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S1.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S1.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S1.B6 TxDqBitDelay: 8
R Mc0.C0.R1.S1.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S2.B0 TxDqBitDelay: 8
R Mc0.C0.R1.S2.B1 TxDqBitDelay: 7
R Mc0.C0.R1.S2.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S2.B3 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B5 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S2.B6 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S2.B7 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B0 TxDqBitDelay: 3
R Mc0.C0.R1.S3.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S3.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S3.B3 TxDqBitDelay: 3
R Mc0.C0.R1.S3.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B5 TxDqBitDelay: 3
R Mc0.C0.R1.S3.B6 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B7 TxDqBitDelay: 4
R Mc0.C0.R1.S4.B0 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S4.B2 TxDqBitDelay: 3
R Mc0.C0.R1.S4.B3 TxDqBitDelay: 8
R Mc0.C0.R1.S4.B4 TxDqBitDelay: 2
R Mc0.C0.R1.S4.B5 TxDqBitDelay: 6
R Mc0.C0.R1.S4.B6 TxDqBitDelay: 3
R Mc0.C0.R1.S4.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S5.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S5.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S5.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S5.B3 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R1.S5.B4 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S5.B6 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R1.S5.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R1.S6.B0 TxDqBitDelay: 8
R Mc0.C0.R1.S6.B1 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B3 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B5 TxDqBitDelay: 4
R Mc0.C0.R1.S6.B6 TxDqBitDelay: 3
R Mc0.C0.R1.S6.B7 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B0 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B2 TxDqBitDelay: 2
R Mc0.C0.R1.S7.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B4 TxDqBitDelay: 3
R Mc0.C0.R1.S7.B5 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B6 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B7 TxDqBitDelay: 8
R Mc1.C1.R1.S0.B0 TxDqBitDelay: 3
R Mc1.C1.R1.S0.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S0.B2 TxDqBitDelay: 4
R Mc1.C1.R1.S0.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B5 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S0.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S1.B0 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B4 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B5 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B6 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B7 TxDqBitDelay: 5
R Mc1.C1.R1.S2.B0 TxDqBitDelay: 3
R Mc1.C1.R1.S2.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S2.B3 TxDqBitDelay: 9
R Mc1.C1.R1.S2.B4 TxDqBitDelay: 3
R Mc1.C1.R1.S2.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S2.B6 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B0 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S3.B2 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B4 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R1.S3.B5 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R1.S3.B6 TxDqBitDelay: 15 (0xF)
R Mc1.C1.R1.S3.B7 TxDqBitDelay: 15 (0xF)
R Mc1.C1.R1.S4.B0 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B2 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S4.B4 TxDqBitDelay: 7
R Mc1.C1.R1.S4.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B7 TxDqBitDelay: 8
R Mc1.C1.R1.S5.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S5.B1 TxDqBitDelay: 9
R Mc1.C1.R1.S5.B2 TxDqBitDelay: 8
R Mc1.C1.R1.S5.B3 TxDqBitDelay: 3
R Mc1.C1.R1.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B7 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S6.B1 TxDqBitDelay: 5
R Mc1.C1.R1.S6.B2 TxDqBitDelay: 2
R Mc1.C1.R1.S6.B3 TxDqBitDelay: 4
R Mc1.C1.R1.S6.B4 TxDqBitDelay: 4
R Mc1.C1.R1.S6.B5 TxDqBitDelay: 4
R Mc1.C1.R1.S6.B6 TxDqBitDelay: 5
R Mc1.C1.R1.S6.B7 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B1 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S7.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S7.B3 TxDqBitDelay: 8
R Mc1.C1.R1.S7.B4 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S7.B5 TxDqBitDelay: 8
R Mc1.C1.R1.S7.B6 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S7.B7 TxDqBitDelay: 16 (0x10)
STOP_TxDqBitDelay
Calling with EnRxDutyCycle = 0, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 250 240 230 200 200 230 230 250 240 250 250 200 200 240 240 250 250 260 250 250 260 230 230 240 240 260 250 250 260 240 250 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 250 250 250 240 200 210 230 240 250 260 250 260 190 200 240 240 240 240 250 250 260 260 230 240 260 240 250 250 250 250 240 250
Vref = -10: 220 240 220 230 190 180 220 210 220 230 230 230 190 180 230 230 230 220 240 230 250 250 230 210 230 230 230 240 240 230 230 220
Vref = -20: 210 220 210 210 180 160 210 180 210 210 220 210 180 150 220 200 210 210 220 210 240 220 220 190 210 200 210 210 230 210 210 200
Vref = -30: 190 190 200 180 160 120 190 170 200 180 210 180 160 110 200 180 200 180 220 190 210 190 200 170 210 170 190 190 210 180 200 180
Vref = 10: 260 250 250 240 210 210 240 240 250 260 250 260 200 210 240 240 250 260 250 260 260 250 240 240 260 240 250 250 250 240 230 240
Vref = 20: 240 240 240 230 190 190 230 210 230 240 240 220 180 170 230 230 240 230 240 240 250 240 220 220 240 230 230 230 240 230 230 220
Vref = 30: 210 230 220 210 170 170 210 200 220 210 230 210 180 150 220 220 220 220 220 220 240 220 220 200 220 210 210 210 210 210 210 200
Weighted Center 0 0 0 0 0 0 0 0 0 0 0 0 -1 0 0 0
Final Center 73 73 69 73 76 73 68 74 74 76 72 78 74 74 77 73
LstSavd Margins 240 250 250 240 200 200 240 230 250 250 250 260 200 190 250 240 250 250 250 260 240 250 240 240 250 250 260 250 250 240 230 240 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 250 250 240 200 190 230 240 240 250 240 250 200 200 250 250 250 250 250 240 240 260 240 240 250 250 250 250 250 250 240 240
Vref = -10: 230 220 240 230 190 180 230 220 230 240 240 230 190 170 230 230 240 240 240 240 230 230 230 210 230 230 230 240 240 230 220 220
Vref = -20: 210 210 220 210 180 160 220 200 210 210 220 210 170 150 220 210 220 200 220 220 220 220 220 190 220 200 200 220 220 210 200 200
Vref = -30: 210 180 210 190 180 120 200 160 210 190 210 180 160 110 210 180 210 180 210 200 200 190 200 160 200 180 200 190 210 190 190 170
Vref = 10: 250 250 270 240 210 200 230 240 250 250 250 260 190 200 250 240 250 250 250 260 240 250 240 240 250 250 260 250 250 240 240 240
Vref = 20: 230 230 240 240 200 190 220 230 230 240 240 230 180 180 230 230 240 230 250 240 230 230 230 230 240 230 240 240 240 230 220 220
Vref = 30: 210 220 230 220 190 160 210 200 220 220 220 220 170 150 220 210 230 210 220 220 220 210 220 200 230 220 230 230 230 220 220 210
Weighted Center 0 -1 -1 0 0 0 0 0 0 0 0 -1 0 0 0 0
Final Center 73 72 68 74 74 71 67 73 77 76 76 76 76 75 78 75
MRC task Write Timing Centering 2D After Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD39h
MRC task -- Read Timing Centering 2D After Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 160 160 160 160 120 120 150 150 160 160 160 160 100 100 160 160 170 170 180 180 160 160 160 160 170 170 160 160 190 190 150 150 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 180 200 170 150 130 190 160 200 180 200 170 130 110 210 170 220 180 230 190 210 170 180 170 190 180 190 170 220 200 190 170
Weighted Center -2 -2 -1 -2 -1 -2 -1 -2 -2 -2 -2 -1 -1 -1 -1 -1
Final Center -18 -17 -12 -16 -17 -17 -10 -17 -18 -19 -17 -16 -17 -16 -19 -16
Edges we pass on to GetMarginBit are
190 200 180 190 140 140 170 180 190 190 180 190 120 120 190 190 200 200 210 210 190 190 170 180 180 190 180 180 210 210 180 180
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x1B1D191918181818 ........ 0x1A1A19191A191919 ........ 0x1818181819171918 ........ 0x1516151514161414 ........ 0x1519191718181A15 ........ 0x1716141415161315 ........ 0x1C1D1C1B1A191D1C ........ 0x1B1C1C1B1D191B1A ........ 0x1D1C1E1F19191A1B ........ 0x1A191A1A1A18191A ........ 0x191717161A151715 ........ 0x141310110F111211 ....#... 0x1615161816161617 ........ 0x19181B1D1819191C ........ 0x18191B191A1B1917 ........ 0x1815171815181415 ........
0x1A1C181817171717 ........ 0x1919181819181818 ........ 0x1717171718161817 ....#### 0x1415141413151313 ....#... 0x1418181617171914 ....##.. 0x1615131314151214 ........ 0x1B1C1B1A19181C1B ........ 0x1A1B1B1A1C181A19 ....##.# 0x1C1B1D1E1818191A ........ 0x1918191919171819 .#...... 0x1816161519141614 ........ 0x13120F1010101110 ........ 0x1514151715151516 ........ 0x18171A1C1718181B #....... 0x17181A18191A1816 #......# 0x1714161714171314 ........
0x191B171716161616 ........ 0x1818171718171717 ........ 0x1616161618161817 ....$$$$ 0x1314131313141212 ....$... 0x1317171517171813 ....$$#. 0x1514121213141113 ##..##.. 0x1A1B1A1918171B1A ......#. 0x191A1A191C181919 ....$$.$ 0x1B1A1C1D17171819 ........ 0x1818181818161718 .$..##.# 0x1715151418131513 ......#. 0x12110E0F100F100F ....$... 0x1413141614141415 ........ 0x1816191B1617171A $....... 0x1717191718191716 $#..#.#$ 0x1613151613161213 .....##.
0x181A161615151515 #...##.. 0x1717161617161616 ........ 0x1515151518161817 #.##$$$$ 0x1213121213131111 ....$### 0x1216161417171812 ..#.$$$. 0x1514111113141012 $$..$$## 0x191A191817161B19 ....#.$. 0x181919181C181819 ....$$.$ 0x1A191B1C16161718 ........ 0x1718171718161618 #$##$$#$ 0x1614141317121512 #...##$. 0x11100D0E100E0F0E ....$.#. 0x1312131513131314 ....#... 0x1815181A15161619 $#.##.#. 0x1717181618181716 $$.#$#$$ 0x1512141512161212 .....$$.
0x1819151515151414 $...$$.. 0x1616151516151515 ...#.... 0x1514151518161817 $.$$$$$$ 0x1112111113131111 ....$$$$ 0x1115161317171811 ##$#$$$# 0x1514101013141012 $$#.$$$$ 0x1819181717151B18 ....$.$. 0x171818171C181719 #.##$$#$ 0x19181A1B15151617 #...#... 0x1718171718161618 $$$$$$$$ 0x1613131217121511 $...$$$# 0x100F0C0D100D0F0D ....$#$. 0x1211121413121213 ....$... 0x1815171A15151618 $$.$$.$. 0x1717171618181716 $$#$$$$$ 0x1411131411161211 .....$$.
0x1818141415151313 $#..$$.. 0x1515141515141414 ###$#... 0x1513151518161817 $.$$$$$$ 0x1011101013131111 #..#$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100F13141012 $$$.$$$$ 0x1718171617141B17 ....$.$. 0x171718171C181719 $.$$$$$$ 0x1917191A15141516 $.#.$##. 0x1718171718161618 $$$$$$$$ 0x1612121117121511 $.#.$$$$ 0x0F0E0B0C100D0F0C .#.#$$$. 0x1110111313111112 ....$... 0x1815161A15141617 $$#$$#$. 0x1717171618181716 $$$$$$$$ 0x1310121310161210 ..#..$$.
0x1818131315151212 $$..$$.. 0x1515141515131313 $$$$$#.. 0x1512151518161817 $.$$$$$$ 0x10100F1013131111 $.#$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100E13141012 $$$.$$$$ 0x1617161517131B16 ....$.$. 0x171618171C181719 $#$$$$$$ 0x1916191915141515 $#$#$$$. 0x1718171718161618 $$$$$$$$ 0x1611121017121511 $.$.$$$$ 0x0E0E0A0C100D0F0B #$#$$$$. 0x100F101213101011 .#..$.## 0x1815161A15141616 $$$$$$$. 0x1717171618181716 $$$$$$$$ 0x120F12120F16120F ..$..$$.
0x1818121215151111 $$##$$.. 0x1515141515131212 $$$$$$#. 0x1511151518161817 $#$$$$$$ 0x100F0F1013131111 $.$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$#$$$$ 0x1516151417121B15 ....$#$# 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$# 0x1718171718161618 $$$$$$$$ 0x1610120F17121511 $.$#$$$$ 0x0E0E0A0C100D0F0A $$$$$$$. 0x0F0F0F11130F1011 .$..$#$$ 0x1815161A15141615 $$$$$$$# 0x1717171618181716 $$$$$$$$ 0x110E12110E16120E ..$.#$$.
0x1818121215151010 $$$$$$## 0x1515141515131211 $$$$$$$# 0x1511151518161817 $$$$$$$$ 0x100E0F1013131111 $.$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x1415141317121B15 ....$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $#$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$# 0x0E0F0E10130F1011 .$..$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100D12100E16120D #.$.$$$.
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100D0F1013131111 $.$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x1314131217121B15 ....$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0D0F130F1011 #$.#$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100C120F0E16120C $.$#$$$#
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100C0F1013131111 $#$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x1213121117121B15 ...#$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0C0F130F1011 $$#$$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100B120F0E16120C $#$$$$$$
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100C0F1013131111 $$$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x1112111117121B15 ...$$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0C0F130F1011 $$$$$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100B120F0E16120C $$$$$$$$
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100C0F1013131111 $$$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x1011101117121B15 ...$$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0C0F130F1011 $$$$$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100B120F0E16120C $$$$$$$$
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100C0F1013131111 $$$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x0F100F1117121B15 ..#$$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0C0F130F1011 $$$$$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100B120F0E16120C $$$$$$$$
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100C0F1013131111 $$$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x0E0F0F1117121B15 #.$$$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0C0F130F1011 $$$$$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100B120F0E16120C $$$$$$$$
0x1818121215151010 $$$$$$$$ 0x1515141515131211 $$$$$$$$ 0x1511151518161817 $$$$$$$$ 0x100C0F1013131111 $$$$$$$$ 0x1115161317171811 $$$$$$$$ 0x1514100D13141012 $$$$$$$$ 0x0E0E0F1117121B15 $#$$$$$$ 0x171618171C181719 $$$$$$$$ 0x1916191915141514 $$$$$$$$ 0x1718171718161618 $$$$$$$$ 0x160F120F17121511 $$$$$$$$ 0x0E0E0A0C100D0F09 $$$$$$$$ 0x0D0F0C0F130F1011 $$$$$$$$ 0x1815161A15141615 $$$$$$$$ 0x1717171618181716 $$$$$$$$ 0x100B120F0E16120C $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x1B1D191918181818 ........ 0x1A1A19191A191919 ........ 0x1818181819171918 ........ 0x1516151514161414 ........ 0x1519191718181A15 ........ 0x1716141415161315 ........ 0x1C1D1C1B1A191D1C ........ 0x1B1C1C1B1D191B1A ........ 0x1D1C1E1F19191A1B ........ 0x1A191A1A1A18191A ........ 0x191717161A151715 ........ 0x141310110F111211 ........ 0x1615161816161617 ........ 0x19181B1D1819191C ........ 0x18191B191A1B1917 ........ 0x1815171815181415 ........
0x1C1E1A1A19191919 ........ 0x1B1B1A1A1B1A1A1A ........ 0x191919191A181A19 ........ 0x1617161615171515 ........ 0x161A1A1819191B16 ........ 0x1817151516171416 ........ 0x1D1E1D1C1B1A1E1D ........ 0x1C1D1D1C1E1A1C1B ........ 0x1E1D1F201A1A1B1C ........ 0x1B1A1B1B1B191A1B ........ 0x1A1818171B161816 ........ 0x1514111210121312 ........ 0x1716171917171718 ........ 0x1A191C1E191A1A1D ........ 0x191A1C1A1B1C1A18 ........ 0x1916181916191516 ........
0x1D1F1B1B1A1A1A1A ........ 0x1C1C1B1B1C1B1B1B ........ 0x1A1A1A1A1B191B1A ........ 0x1718171716181616 ........ 0x171B1B191A1A1C17 ........ 0x1918161617181517 ........ 0x1E1F1E1D1C1B1F1E ........ 0x1D1E1E1D1F1B1D1C ........ 0x1F1E20211B1B1C1D ........ 0x1C1B1C1C1C1A1B1C ........ 0x1B1919181C171917 ........ 0x1615121311131413 ........ 0x1817181A18181819 ........ 0x1B1A1D1F1A1B1B1E ........ 0x1A1B1D1B1C1D1B19 ........ 0x1A17191A171A1617 ........
0x1E201C1C1B1B1B1B ........ 0x1D1D1C1C1D1C1C1C ........ 0x1B1B1B1B1C1A1C1B ........ 0x1819181817191717 ........ 0x181C1C1A1B1B1D18 ........ 0x1A19171718191618 ........ 0x1F201F1E1D1C201F ........ 0x1E1F1F1E201C1E1D ........ 0x201F21221C1C1D1E ........ 0x1D1C1D1D1D1B1C1D ........ 0x1C1A1A191D181A18 ........ 0x1716131412141514 ........ 0x1918191B1919191A ........ 0x1C1B1E201B1C1C1F ........ 0x1B1C1E1C1D1E1C1A ........ 0x1B181A1B181B1718 ........
0x1F211D1D1C1C1C1C ........ 0x1E1E1D1D1E1D1D1D ........ 0x1C1C1C1C1D1B1D1C ........ 0x191A1919181A1818 ........ 0x191D1D1B1C1C1E19 ........ 0x1B1A1818191A1719 ........ 0x2021201F1E1D2120 ........ 0x1F20201F211D1F1E ........ 0x212022231D1D1E1F ........ 0x1E1D1E1E1E1C1D1E ........ 0x1D1B1B1A1E191B19 ........ 0x1817141513151615 ........ 0x1A191A1C1A1A1A1B ........ 0x1D1C1F211C1D1D20 ........ 0x1C1D1F1D1E1F1D1B ........ 0x1C191B1C191C1819 ........
0x20221E1E1D1D1D1D ........ 0x1F1F1E1E1F1E1E1E ........ 0x1D1D1D1D1E1C1E1D ........ 0x1A1B1A1A191B1919 ........ 0x1A1E1E1C1D1D1F1A ........ 0x1C1B19191A1B181A ........ 0x212221201F1E2221 ........ 0x20212120221E201F ........ 0x222123241E1E1F20 ........ 0x1F1E1F1F1F1D1E1F ........ 0x1E1C1C1B1F1A1C1A ........ 0x1918151614161716 ........ 0x1B1A1B1D1B1B1B1C ........ 0x1E1D20221D1E1E21 ........ 0x1D1E201E1F201E1C ........ 0x1D1A1C1D1A1D191A ........
0x21231F1F1E1E1E1E ........ 0x20201F1F201F1F1F ........ 0x1E1E1E1E1F1D1F1E ........ 0x1B1C1B1B1A1C1A1A ........ 0x1B1F1F1D1E1E201B ........ 0x1D1C1A1A1B1C191B ........ 0x22232221201F2322 ........ 0x21222221231F2120 ........ 0x232224251F1F2021 ........ 0x201F2020201E1F20 ........ 0x1F1D1D1C201B1D1B ........ 0x1A19161715171817 ........ 0x1C1B1C1E1C1C1C1D ........ 0x1F1E21231E1F1F22 ........ 0x1E1F211F20211F1D ........ 0x1E1B1D1E1B1E1A1B ........
0x222420201F1F1F1F ........ 0x2121202021202020 ........ 0x1F1F1F1F201E201F ........ 0x1C1D1C1C1B1D1B1B ........ 0x1C20201E1F1F211C ........ 0x1E1D1B1B1C1D1A1C ........ 0x2324232221202423 ........ 0x2223232224202221 ........ 0x2423252620202122 ........ 0x21202121211F2021 ........ 0x201E1E1D211C1E1C ........ 0x1B1A171816181918 ........ 0x1D1C1D1F1D1D1D1E ........ 0x201F22241F202023 ........ 0x1F2022202122201E ........ 0x1F1C1E1F1C1F1B1C ........
0x2325212120202020 ........ 0x2222212122212121 ........ 0x20202020211F2120 ........ 0x1D1E1D1D1C1E1C1C ........ 0x1D21211F2020221D ........ 0x1F1E1C1C1D1E1B1D ........ 0x2425242322212524 ........ 0x2324242325212322 ........ 0x2524262721212223 ........ 0x2221222222202122 ........ 0x211F1F1E221D1F1D ........ 0x1C1B181917191A19 ........ 0x1E1D1E201E1E1E1F ........ 0x2120232520212124 ........ 0x202123212223211F ........ 0x201D1F201D201C1D ........
0x2426222221212121 ........ 0x2323222223222222 ........ 0x2121212122202221 ........ 0x1E1F1E1E1D1F1D1D ........ 0x1E2222202121231E ........ 0x201F1D1D1E1F1C1E ........ 0x2526252423222625 ........ 0x2425252426222423 ........ 0x2625272822222324 ........ 0x2322232323212223 ........ 0x2220201F231E201E ........ 0x1D1C191A181A1B1A ........ 0x1F1E1F211F1F1F20 ........ 0x2221242621222225 ........ 0x2122242223242220 ........ 0x211E20211E211D1E ........
0x2527232322222222 ........ 0x2424232324232323 ........ 0x2222222223212322 ........ 0x1F201F1F1E201E1E ........ 0x1F2323212222241F ........ 0x21201E1E1F201D1F ........ 0x2627262524232726 ........ 0x2526262527232524 ........ 0x2726282923232425 ........ 0x2423242424222324 ........ 0x23212120241F211F ........ 0x1E1D1A1B191B1C1B ........ 0x201F202220202021 ........ 0x2322252722232326 .#...... 0x2223252324252321 ........ 0x221F21221F221E1F ........
0x2628242423232323 ........ 0x2525242425242424 ........ 0x2323232324222423 ......#. 0x202120201F211F1F ........ 0x2024242223232520 ...#..## 0x22211F1F20211E20 ........ 0x2728272625242827 ........ 0x2627272628242625 ........ 0x2827292A24242526 ........ 0x2524252525232425 ........ 0x2422222125202220 ........ 0x1F1E1B1C1A1C1D1C ........ 0x2120212321212122 ........ 0x2422262823242427 .$.###.# 0x2324262425262422 ........ 0x2320222320231F20 ........
0x2729252524242424 ........ 0x2626252526252525 ........ 0x2424242425232424 ....##$# 0x2122212120222020 ........ 0x2125252224242520 .#.$##$$ 0x2322202021221F21 ........ 0x2829282726252928 ........ 0x2728282729252726 ........ 0x29282A2B25252627 ........ 0x2625262626242526 ........ 0x2523232226212321 ........ 0x201F1C1D1B1D1E1D ....#... 0x2221222422222223 ....##.# 0x2522272823242527 .$#$$$.$ 0x2425272526272523 ........ 0x2421232421242021 ........
0x282A262625252525 ........ 0x2727262627262626 ........ 0x2525252525232424 ....$$$$ 0x2223222221232121 ........ 0x2225262224242520 #$#$$$$$ 0x2423212122232022 ........ 0x292A292827262A29 ........ 0x282929282A262827 ........ 0x2A292B2C26262728 ........ 0x2726272727252627 ........ 0x2624242327222422 ........ 0x21201D1E1B1E1F1E ....$#.. 0x2322232522222323 ....$$.$ 0x2622272823242627 #$$$$$#$ 0x2526282627282624 ........ 0x2522242522252122 ........
0x292B272726262626 ........ 0x2828272728272727 ........ 0x2626262625232424 ##.#$$$$ 0x2324232322242222 ........ 0x2225262224242520 $$$$$$$$ 0x2524222223242123 ........ 0x2A2B2A2928272B2A ........ 0x292A2A292B272928 ........ 0x2B2A2C2D27272829 ........ 0x2827282828262728 ........ 0x2725252428232523 ........ 0x22211E1F1B1E201F .##.$$.. 0x2423242622222423 ....$$.$ 0x2622272823242627 $$$$$$$$ 0x2627292728292725 ....##.. 0x2623252623262223 ........
0x2A2C282827272727 ........ 0x2929282829282828 ........ 0x2626272625232424 $$#$$$$$ 0x2425242423252323 ........ 0x2225262224242520 $$$$$$$$ 0x2625232324252224 ........ 0x2B2C2B2A29282C2B ........ 0x2A2B2B2A2C282A29 ........ 0x2C2B2D2E2828292A ........ 0x2928292929272829 ........ 0x2826262529242624 ........ 0x23211E201B1E2120 #$$#$$## 0x2524252722222523 #.#.$$#$ 0x2622272823242627 $$$$$$$$ 0x27282A2828292826 ##..$$.# 0x2724262724272324 ........
0x2B2D292928282828 ........ 0x2A2A29292A292929 ........ 0x2626272625232424 $$$$$$$$ 0x2526252524262424 ........ 0x2225262224242520 $$$$$$$$ 0x2726242425262325 .....#.. 0x2C2D2C2B2A292D2C ........ 0x2B2C2C2B2D292B2A .#...... 0x2D2C2E2F29292A2B ........ 0x2A292A2A2A28292A ........ 0x292727262A252725 ...#.... 0x23211E201B1E2120 $$$$$$$$ 0x2525252822222523 $#$.$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2928292926 $$#.$$#$ 0x2825272825282425 ........
0x2C2E2A2A29292929 ......## 0x2B2B2A2A2B2A2A2A ........ 0x2626272625232424 $$$$$$$$ 0x2627262625272525 ......#. 0x2225262224242520 $$$$$$$$ 0x2827252526262426 ...#.$.. 0x2D2E2D2C2B2A2E2D ..#..#.. 0x2C2C2D2C2E2A2C2B .$..##.. 0x2E2D2F302A2A2B2C ........ 0x2B2A2B2B2B292A2B ........ 0x2A2828262B262826 ..#$.#.. 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$#$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$#$$$$ 0x2926282926292526 ........
0x2D2F2B2B2A2A2929 ......$$ 0x2C2C2B2B2C2B2B2B ........ 0x2626272625232424 $$$$$$$$ 0x2728272726282526 ....#.$. 0x2225262224242520 $$$$$$$$ 0x2928262527262527 ###$.$.. 0x2E2F2D2D2C2A2F2E ..$.#$.. 0x2D2C2E2D2E2A2D2C .$..$$#. 0x2F2E30312B2B2C2D ........ 0x2C2B2C2C2C2A2B2C ........ 0x2B2928262C262927 .#$$#$.. 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2A27292A272A2627 ........
0x2E302C2C2B2B2929 .#..#.$$ 0x2D2D2C2C2D2C2C2C ......#. 0x2626272625232424 $$$$$$$$ 0x2829282826292527 ....$#$. 0x2225262224242520 $$$$$$$$ 0x2928262528262628 $$$$.$## 0x2F302D2E2C2A302F ..$.$$#. 0x2E2C2F2E2E2A2D2D #$..$$$# 0x302F31322C2C2D2E ........ 0x2D2C2D2D2D2B2C2D ........ 0x2C2928262C262A28 #$$$$$## 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2B282A2B282B2728 ..#.#.##
0x2F302D2D2B2C2929 .$#.$.$$ 0x2E2E2D2D2E2D2C2D ......$. 0x2626272625232424 $$$$$$$$ 0x292A292926292528 ....$$$# 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$#$$$ 0x30312D2F2C2A3030 #.$#$$$. 0x2E2C302F2E2A2D2D $$.#$$$$ 0x313032332D2D2E2F ........ 0x2E2D2E2E2E2C2D2E ........ 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C292A2C282C2728 #.$.$.$$
0x30302D2E2B2D2929 #$$#$#$$ 0x2F2F2E2E2F2E2C2E .#.#..$. 0x2626272625232424 $$$$$$$$ 0x2A2B2A2A26292528 ###.$$$$ 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$$$$$ 0x30322D2F2C2A3031 $.$$$$$# 0x2E2C312F2E2A2D2D $$#$$$$$ 0x323133342E2E2F30 ........ 0x2F2E2F2F2F2D2E2F ......#. 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C2A2A2D282D2728 $#$.$#$$
0x30302D2E2B2D2929 $$$$$$$$ 0x302F2F2E302F2C2F #$.$##$# 0x2626272625232424 $$$$$$$$ 0x2A2B2A2B26292528 $$$#$$$$ 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$$$$$ 0x30332D2F2C2A3031 $#$$$$$$ 0x2E2C312F2E2A2D2D $$$$$$$$ 0x333234352F2F3031 ......#. 0x302F3030302E2E30 .##..#$# 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C2A2A2E282D2728 $$$#$$$$
0x30302D2E2B2D2929 $$$$$$$$ 0x302F302E302F2C2F $$#$$$$$ 0x2626272625232424 $$$$$$$$ 0x2A2B2A2B26292528 $$$$$$$$ 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$$$$$ 0x30332D2F2C2A3031 $$$$$$$$ 0x2E2C312F2E2A2D2D $$$$$$$$ 0x3433353630303032 ....##$# 0x312F3031312E2E30 #$$#.$$$ 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C2A2A2E282D2728 $$$$$$$$
0x30302D2E2B2D2929 $$$$$$$$ 0x302F302E302F2C2F $$$$$$$$ 0x2626272625232424 $$$$$$$$ 0x2A2B2A2B26292528 $$$$$$$$ 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$$$$$ 0x30332D2F2C2A3031 $$$$$$$$ 0x2E2C312F2E2A2D2D $$$$$$$$ 0x3534363730303032 .#..$$$$ 0x312F3031322E2E30 $$$$.$$$ 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C2A2A2E282D2728 $$$$$$$$
0x30302D2E2B2D2929 $$$$$$$$ 0x302F302E302F2C2F $$$$$$$$ 0x2626272625232424 $$$$$$$$ 0x2A2B2A2B26292528 $$$$$$$$ 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$$$$$ 0x30332D2F2C2A3031 $$$$$$$$ 0x2E2C312F2E2A2D2D $$$$$$$$ 0x3634373830303032 .$#.$$$$ 0x312F3031332E2E30 $$$$#$$$ 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C2A2A2E282D2728 $$$$$$$$
0x30302D2E2B2D2929 $$$$$$$$ 0x302F302E302F2C2F $$$$$$$$ 0x2626272625232424 $$$$$$$$ 0x2A2B2A2B26292528 $$$$$$$$ 0x2225262224242520 $$$$$$$$ 0x2928262529262628 $$$$$$$$ 0x30332D2F2C2A3031 $$$$$$$$ 0x2E2C312F2E2A2D2D $$$$$$$$ 0x3734373930303032 #$$#$$$$ 0x312F3031332E2E30 $$$$$$$$ 0x2C2928262C262A28 $$$$$$$$ 0x23211E201B1E2120 $$$$$$$$ 0x2525252922222523 $$$$$$$$ 0x2622272823242627 $$$$$$$$ 0x27282B2A28292926 $$$$$$$$ 0x2C2A2A2E282D2728 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 25 47][ 25 47][ 19 44][ 19 45][ 22 42][ 22 44][ 17 40][ 17 40]
Mc0.Ch0.B1: [ 22 47][ 22 46][ 21 47][ 22 45][ 22 47][ 20 46][ 19 43][ 18 46]
Mc0.Ch1.B0: [ 22 37][ 18 37][ 22 38][ 22 37][ 25 36][ 23 34][ 25 35][ 24 35]
Mc0.Ch1.B1: [ 17 41][ 13 42][ 16 41][ 17 42][ 20 37][ 20 40][ 18 36][ 18 39]
Mc0.Ch2.B0: [ 18 33][ 22 36][ 23 37][ 20 33][ 24 35][ 24 35][ 25 36][ 18 31]
Mc0.Ch2.B1: [ 22 40][ 21 39][ 17 37][ 14 36][ 20 40][ 21 37][ 17 37][ 19 39]
Mc0.Ch3.B0: [ 15 47][ 15 50][ 16 44][ 18 46][ 24 43][ 19 41][ 28 47][ 22 48]
Mc0.Ch3.B1: [ 24 45][ 23 43][ 25 48][ 24 46][ 29 45][ 25 41][ 24 44][ 26 44]
Mc1.Ch0.B0: [ 26 54][ 23 51][ 26 54][ 26 56][ 22 47][ 21 47][ 22 47][ 21 49]
Mc1.Ch0.B1: [ 24 48][ 25 46][ 24 47][ 24 48][ 25 50][ 23 45][ 23 45][ 25 47]
Mc1.Ch1.B0: [ 23 43][ 16 40][ 19 39][ 16 37][ 24 43][ 19 37][ 22 41][ 18 39]
Mc1.Ch1.B1: [ 15 34][ 15 32][ 11 29][ 13 31][ 16 26][ 14 29][ 16 32][ 10 31]
Mc1.Ch2.B0: [ 14 36][ 16 36][ 13 36][ 16 40][ 20 33][ 16 33][ 17 36][ 18 34]
Mc1.Ch2.B1: [ 25 37][ 22 33][ 23 38][ 27 39][ 22 34][ 21 35][ 23 37][ 22 38]
Mc1.Ch3.B0: [ 24 38][ 24 39][ 24 42][ 23 41][ 25 39][ 25 40][ 24 40][ 23 37]
Mc1.Ch3.B1: [ 17 43][ 12 41][ 19 41][ 16 45][ 15 39][ 23 44][ 19 38][ 13 39]
Per Bit Offset
Mc0.Ch0.B0: 9 7 7 7 8 9 5 5
Mc0.Ch0.B1: 9 8 9 9 9 8 6 7
Mc0.Ch1.B0: 6 4 6 6 6 6 5 6
Mc0.Ch1.B1: 8 6 8 9 9 8 7 9
Mc0.Ch2.B0: 5 4 5 4 6 6 5 4
Mc0.Ch2.B1: 8 8 7 5 9 7 8 8
Mc0.Ch3.B0: 3 4 2 5 8 5 9 7
Mc0.Ch3.B1: 8 5 9 8 8 8 7 9
Mc1.Ch0.B0: 11 9 10 10 10 9 9 8
Mc1.Ch0.B1: 10 11 10 10 12 10 9 10
Mc1.Ch1.B0: 8 5 6 5 8 7 9 8
Mc1.Ch1.B1: 5 5 4 5 6 5 6 4
Mc1.Ch2.B0: 3 5 3 4 5 3 5 3
Mc1.Ch2.B1: 6 4 4 4 4 3 5 2
Mc1.Ch3.B0: 7 7 6 7 6 6 7 7
Mc1.Ch3.B1: 6 6 7 7 6 10 9 5
START_RxDqsBitDelay
R Mc0.C0.R0.S0.B0 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S0.B1 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S0.B2 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S0.B3 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S0.B4 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S0.B5 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S0.B6 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S0.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S1.B0 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S1.B1 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B2 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B3 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B4 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S1.B5 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S1.B6 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S1.B7 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S2.B0 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S2.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S2.B3 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S2.B4 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S2.B5 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S2.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S2.B7 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S3.B0 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S3.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S3.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S3.B3 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S3.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S3.B5 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S3.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S3.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S4.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S4.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S4.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S4.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S4.B4 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S4.B5 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S4.B6 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S4.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S5.B0 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S5.B1 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S5.B2 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S5.B3 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S5.B4 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S5.B5 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S5.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S5.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S6.B0 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S6.B1 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S6.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S6.B3 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S6.B4 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S6.B5 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S6.B6 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S6.B7 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S7.B0 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S7.B1 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S7.B2 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B3 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S7.B4 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B5 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S7.B6 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S7.B7 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S0.B0 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R0.S0.B1 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S0.B2 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R0.S0.B3 RxDqsBitDelay: 41 (0x29)
R Mc1.C1.R0.S0.B4 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S0.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S0.B6 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S0.B7 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S1.B0 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S1.B1 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S1.B2 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S1.B3 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S1.B4 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R0.S1.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S1.B6 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S1.B7 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S2.B0 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S2.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S2.B3 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S2.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S2.B5 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S2.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S2.B7 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S3.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S3.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S3.B2 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S3.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S3.B4 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S3.B5 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S3.B6 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S3.B7 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S4.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S4.B1 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S4.B2 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S4.B3 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S4.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S4.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S4.B6 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S4.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S5.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S5.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S5.B2 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S5.B3 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S5.B4 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S5.B5 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S5.B6 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S5.B7 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S6.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S6.B1 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S6.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B3 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S6.B4 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S6.B5 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S6.B7 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B0 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B1 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S7.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B3 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S7.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S7.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S7.B6 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S7.B7 RxDqsBitDelay: 26 (0x1A)
STOP_RxDqsBitDelay
LstSavd Margins 160 160 160 160 120 120 150 150 160 160 160 160 110 110 160 160 170 170 190 190 170 170 160 160 170 170 160 160 190 190 150 150 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 200 170 200 170 130 130 180 160 180 170 190 170 120 120 200 170 220 180 220 200 220 180 180 170 220 180 220 170 210 200 180 160
Weighted Center -2 -2 0 -1 -1 -1 0 -2 -2 -1 -2 -1 -2 -3 -1 -1
Final Center -17 -17 -11 -15 -16 -16 -10 -17 -18 -19 -18 -16 -18 -18 -19 -15
Edges we pass on to GetMarginBit are
180 190 180 190 130 130 170 170 170 180 180 180 120 120 180 190 200 200 210 210 200 200 170 180 200 200 190 200 200 210 170 170
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x1A1A181818181717 ........ 0x1B1A191B1A181918 ........ 0x1718181816161816 ........ 0x1716151713151515 ........ 0x1517161517161715 ........ 0x1915151516171415 ........ 0x1C1E1D1C1C1A1E1C ....#.#. 0x1C1B1D1B1D1A1C1B ........ 0x1C191D1C1818191A .#...... 0x19181B191B191A1A ....#... 0x1C1717171B161917 ........ 0x1413101210111311 ....#... 0x1616171816171818 ........ 0x1A181C1C181B1B1A ........ 0x19171D19191A1A18 ........ 0x1616171815171514 ........
0x1919171717171616 ........ 0x1A19181A19171817 ..#..... 0x1617171715151715 ....#... 0x1615141612141414 ........ 0x1416151416151614 ........ 0x1814141415161314 .#...... 0x1B1D1C1B1D191F1B ........ 0x1B1A1C1A1C191B1A ........ 0x1B1A1C1B17171819 ##..#... 0x18171A181C181919 .#.....# 0x1B1616161A151816 ........ 0x13120F1111101210 ........ 0x1515161715161717 ....##.. 0x19171B1B171A1A19 #..#.... 0x18161C1818191917 ........ 0x1515161714161413 ........
0x1818161616161515 ........ 0x1918181918161716 ..$#.#.. 0x1516161615141614 ....$... 0x1514131511131313 ........ 0x1315141315141513 ......#. 0x1714131314151213 .$...#.. 0x1A1C1B1A1D181F1A ....$.$. 0x1A191B191B181A19 ....##.. 0x1B1B1B1A17161718 $...$#.. 0x171719171C171819 #$.#$##$ 0x1A15151519141715 ....##.. 0x12110E10110F110F ....$... 0x1414151615161616 ....$$## 0x19161A1B16191918 $..$...# 0x17151B1717181816 ........ 0x1414151613151312 ........
0x1717151515151414 .#...... 0x1817181917161615 .#$$.$.. 0x1415151515131513 ....$... 0x1413121410121212 .....#.. 0x1214131214131512 ....#.$. 0x1614121213151112 .$...$.. 0x191B1A191D171F19 ....$#$. 0x19181A181B181918 ....$$.# 0x1B1B1A1917161617 $$.#$$#. 0x171718171C171819 $$.$$$$$ 0x1914141419141614 #...$$.. 0x11100D0F110E100E ..#.$... 0x1313141515161616 .#..$$$$ 0x1915191B15181818 $#.$##.$ 0x16141A1616171715 .......# 0x1313141512141211 ........
0x1617141414141313 .$...... 0x1717181916161514 #$$$#$## 0x1314141415121412 ....$#.. 0x131211130F121111 ....#$.. 0x1113121114121511 ..#.$.$. 0x1514111112151011 #$...$.. 0x181A19181D171F18 ....$$$# 0x181719171B181818 ..##$$#$ 0x1B1B191917161616 $$#$$$$# 0x171717171C171819 $$#$$$$$ 0x1913131319141513 $.#.$$#. 0x100F0D0E110D0F0D ..$.$##. 0x1213131415161616 .$.#$$$$ 0x1915181B15181718 $$.$$$#$ 0x1513191515161615 .......$ 0x1212131411131110 .....#..
0x1517131313131212 #$..##.. 0x1717181916161514 $$$$$$$$ 0x1213131315121311 ....$$.. 0x121110120F121010 ....$$.. 0x1012121014111510 ..$.$.$. 0x1514101011150F10 $$..#$.. 0x171918171D171F18 ....$$$$ 0x171619171B181818 ..$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x1912131219141512 $.$.$$$. 0x0F0E0D0D110D0F0C ##$.$$$# 0x1113121415161616 #$#$$$$$ 0x1915171B15181718 $$#$$$$$ 0x1412181414151515 .......$ 0x111112131013100F .....$#.
0x1517121213131111 $$..$$.. 0x1717181916161514 $$$$$$$$ 0x1112121215121210 ....$$## 0x11100F110F120F0F ....$$#. 0x0F11120F1410150F ..$#$#$. 0x15140F0F11150E0F $$#.$$## 0x161817161D171F18 ....$$$$ 0x161519171B181818 #.$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x1911131119141511 $.$.$$$. 0x0F0E0D0C110D0F0C $$$#$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x1311171313141415 ....###$ 0x101011120F13100E #.#.#$$.
0x1517111113131010 $$.#$$#. 0x1717181916161514 $$$$$$$$ 0x1011111115121210 #.#.$$$$ 0x100F0E100F120F0E ..##$$$# 0x0E10120F1410150E ..$$$$$# 0x15140F0E11150E0F $$$#$$$$ 0x151716151D171F18 ....$$$$ 0x161419171B181818 $.$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x1910131019141510 $.$#$$$# 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x1210161213141415 ....$$$$ 0x100F11110F13100D $.$.$$$#
0x151710111313100F $$#$$$$# 0x1717181916161514 $$$$$$$$ 0x1010111015121210 $.$.$$$$ 0x0F0E0E100F120F0E ..$$$$$$ 0x0D0F120F1410150E ##$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x141615141D171F18 ....$$$$ 0x161319171B181818 $#$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190F131019141510 $.$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F151113141415 ##.#$$$$ 0x100E11100F13100D $.$.$$$$
0x151710111313100F $$$$$$$$ 0x1717181916161514 $$$$$$$$ 0x100F110F15121210 $.$.$$$$ 0x0E0D0E100F120F0E #.$$$$$$ 0x0D0F120F1410150E $$$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x131514131D171F18 ....$$$$ 0x161319171B181818 $$$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190E131019141510 $#$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F141113141415 $$#$$$$$ 0x100D110F0F13100D $.$.$$$$
0x151710111313100F $$$$$$$$ 0x1717181916161514 $$$$$$$$ 0x100E110E15121210 $#$#$$$$ 0x0E0C0E100F120F0E $#$$$$$$ 0x0D0F120F1410150E $$$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x121413121D171F18 ....$$$$ 0x161319171B181818 $$$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190E131019141510 $$$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F141113141415 $$$$$$$$ 0x100C110E0F13100D $.$.$$$$
0x151710111313100F $$$$$$$$ 0x1717181916161514 $$$$$$$$ 0x100E110E15121210 $$$$$$$$ 0x0E0C0E100F120F0E $$$$$$$$ 0x0D0F120F1410150E $$$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x111312111D171F18 ..##$$$$ 0x161319171B181818 $$$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190E131019141510 $$$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F141113141415 $$$$$$$$ 0x100B110D0F13100D $.$#$$$$
0x151710111313100F $$$$$$$$ 0x1717181916161514 $$$$$$$$ 0x100E110E15121210 $$$$$$$$ 0x0E0C0E100F120F0E $$$$$$$$ 0x0D0F120F1410150E $$$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x101212111D171F18 ..$$$$$$ 0x161319171B181818 $$$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190E131019141510 $$$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F141113141415 $$$$$$$$ 0x100A110D0F13100D $#$$$$$$
0x151710111313100F $$$$$$$$ 0x1717181916161514 $$$$$$$$ 0x100E110E15121210 $$$$$$$$ 0x0E0C0E100F120F0E $$$$$$$$ 0x0D0F120F1410150E $$$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x0F1112111D171F18 #.$$$$$$ 0x161319171B181818 $$$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190E131019141510 $$$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F141113141415 $$$$$$$$ 0x100A110D0F13100D $$$$$$$$
0x151710111313100F $$$$$$$$ 0x1717181916161514 $$$$$$$$ 0x100E110E15121210 $$$$$$$$ 0x0E0C0E100F120F0E $$$$$$$$ 0x0D0F120F1410150E $$$$$$$$ 0x15140F0E11150E0F $$$$$$$$ 0x0F1012111D171F18 $#$$$$$$ 0x161319171B181818 $$$$$$$$ 0x1B1B191917161616 $$$$$$$$ 0x171717171C171819 $$$$$$$$ 0x190E131019141510 $$$$$$$$ 0x0F0E0D0C110D0F0C $$$$$$$$ 0x1113121415161616 $$$$$$$$ 0x1915171B15181718 $$$$$$$$ 0x110F141113141415 $$$$$$$$ 0x100A110D0F13100D $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x1A1A181818181717 ........ 0x1B1A191B1A181918 ........ 0x1718181816161816 ........ 0x1716151713151515 ........ 0x1517161517161715 ........ 0x1915151516171415 ........ 0x1C1E1D1C1C1A1E1C ........ 0x1C1B1D1B1D1A1C1B ........ 0x1C191D1C1818191A ........ 0x19181B191B191A1A ........ 0x1C1717171B161917 ........ 0x1413101210111311 ........ 0x1616171816171818 ........ 0x1A181C1C181B1B1A ........ 0x19171D19191A1A18 ........ 0x1616171815171514 ........
0x1B1B191919191818 ........ 0x1C1B1A1C1B191A19 ........ 0x1819191917171917 ........ 0x1817161814161616 ........ 0x1618171618171816 ........ 0x1A16161617181516 ........ 0x1D1F1E1D1D1B1F1D ........ 0x1D1C1E1C1E1B1D1C ........ 0x1D1A1E1D19191A1B ........ 0x1A191C1A1C1A1B1B ........ 0x1D1818181C171A18 ........ 0x1514111311121412 ........ 0x1717181917181919 ........ 0x1B191D1D191C1C1B ........ 0x1A181E1A1A1B1B19 ........ 0x1717181916181615 ........
0x1C1C1A1A1A1A1919 ........ 0x1D1C1B1D1C1A1B1A ........ 0x191A1A1A18181A18 ........ 0x1918171915171717 ........ 0x1719181719181917 ........ 0x1B17171718191617 ........ 0x1E201F1E1E1C201E ........ 0x1E1D1F1D1F1C1E1D ........ 0x1E1B1F1E1A1A1B1C ........ 0x1B1A1D1B1D1B1C1C ........ 0x1E1919191D181B19 ........ 0x1615121412131513 ........ 0x1818191A18191A1A ........ 0x1C1A1E1E1A1D1D1C ........ 0x1B191F1B1B1C1C1A ........ 0x1818191A17191716 ........
0x1D1D1B1B1B1B1A1A ........ 0x1E1D1C1E1D1B1C1B ........ 0x1A1B1B1B19191B19 ........ 0x1A19181A16181818 ........ 0x181A19181A191A18 ........ 0x1C181818191A1718 ........ 0x1F21201F1F1D211F ........ 0x1F1E201E201D1F1E ........ 0x1F1C201F1B1B1C1D ........ 0x1C1B1E1C1E1C1D1D ........ 0x1F1A1A1A1E191C1A ........ 0x1716131513141614 ........ 0x19191A1B191A1B1B ........ 0x1D1B1F1F1B1E1E1D ........ 0x1C1A201C1C1D1D1B ........ 0x19191A1B181A1817 ........
0x1E1E1C1C1C1C1B1B ........ 0x1F1E1D1F1E1C1D1C ........ 0x1B1C1C1C1A1A1C1A ........ 0x1B1A191B17191919 ........ 0x191B1A191B1A1B19 ........ 0x1D1919191A1B1819 ........ 0x20222120201E2220 ........ 0x201F211F211E201F ........ 0x201D21201C1C1D1E ........ 0x1D1C1F1D1F1D1E1E ........ 0x201B1B1B1F1A1D1B ........ 0x1817141614151715 ........ 0x1A1A1B1C1A1B1C1C ........ 0x1E1C20201C1F1F1E ........ 0x1D1B211D1D1E1E1C ........ 0x1A1A1B1C191B1918 ........
0x1F1F1D1D1D1D1C1C ........ 0x201F1E201F1D1E1D ........ 0x1C1D1D1D1B1B1D1B ........ 0x1C1B1A1C181A1A1A ........ 0x1A1C1B1A1C1B1C1A ........ 0x1E1A1A1A1B1C191A ........ 0x21232221211F2321 ........ 0x21202220221F2120 ........ 0x211E22211D1D1E1F ........ 0x1E1D201E201E1F1F ........ 0x211C1C1C201B1E1C ........ 0x1918151715161816 ........ 0x1B1B1C1D1B1C1D1D ........ 0x1F1D21211D20201F ........ 0x1E1C221E1E1F1F1D ........ 0x1B1B1C1D1A1C1A19 ........
0x20201E1E1E1E1D1D ........ 0x21201F21201E1F1E ........ 0x1D1E1E1E1C1C1E1C ........ 0x1D1C1B1D191B1B1B ........ 0x1B1D1C1B1D1C1D1B ........ 0x1F1B1B1B1C1D1A1B ........ 0x2224232222202422 ........ 0x2221232123202221 ........ 0x221F23221E1E1F20 ........ 0x1F1E211F211F2020 ........ 0x221D1D1D211C1F1D ........ 0x1A19161816171917 ........ 0x1C1C1D1E1C1D1E1E ........ 0x201E22221E212120 ........ 0x1F1D231F1F20201E ........ 0x1C1C1D1E1B1D1B1A ........
0x21211F1F1F1F1E1E ........ 0x22212022211F201F ........ 0x1E1F1F1F1D1D1F1D ........ 0x1E1D1C1E1A1C1C1C ........ 0x1C1E1D1C1E1D1E1C ........ 0x201C1C1C1D1E1B1C ........ 0x2325242323212523 ........ 0x2322242224212322 ........ 0x232024231F1F2021 ........ 0x201F222022202121 ........ 0x231E1E1E221D201E ........ 0x1B1A171917181A18 ........ 0x1D1D1E1F1D1E1F1F ........ 0x211F23231F222221 ........ 0x201E24202021211F ........ 0x1D1D1E1F1C1E1C1B ........
0x2222202020201F1F ........ 0x2322212322202120 ........ 0x1F2020201E1E201E ........ 0x1F1E1D1F1B1D1D1D ........ 0x1D1F1E1D1F1E1F1D ........ 0x211D1D1D1E1F1C1D ........ 0x2426252424222624 ........ 0x2423252325222423 ........ 0x2421252420202122 ........ 0x2120232123212222 ........ 0x241F1F1F231E211F ........ 0x1C1B181A18191B19 ........ 0x1E1E1F201E1F2020 ........ 0x2220242420232322 ........ 0x211F252121222220 ........ 0x1E1E1F201D1F1D1C ........
0x2323212121212020 ........ 0x2423222423212221 ........ 0x202121211F1F211F ........ 0x201F1E201C1E1E1E ........ 0x1E201F1E201F201E ........ 0x221E1E1E1F201D1E ........ 0x2527262525232725 ........ 0x2524262426232524 ........ 0x2522262521212223 ........ 0x2221242224222323 ........ 0x25202020241F2220 ........ 0x1D1C191B191A1C1A ........ 0x1F1F20211F202121 ........ 0x2321252521242423 ........ 0x2220262222232321 ........ 0x1F1F20211E201E1D ........
0x2424222222222121 ........ 0x2524232524222322 ........ 0x2122222220202220 ........ 0x21201F211D1F1F1F ........ 0x1F21201F2120211F ........ 0x231F1F1F20211E1F ........ 0x2628272626242826 ........ 0x2625272527242625 ........ 0x2623272622222324 ........ 0x2322252325232424 ........ 0x2621212125202321 ........ 0x1E1D1A1C1A1B1D1B ........ 0x2020212220212222 ........ 0x2422262622252524 ........ 0x2321272323242422 ........ 0x202021221F211F1E ........
0x2525232323232222 ........ 0x2625242625232423 ........ 0x2223232321212321 .#...... 0x222120221E202020 ........ 0x2022212022212220 ........ 0x2420202021221F20 ........ 0x2729282727252927 ........ 0x2726282628252726 ........ 0x2724282723232425 ........ 0x2423262426242525 ..#..... 0x2722222226212422 ........ 0x1F1E1B1D1B1C1E1C ........ 0x2121222321222323 ........ 0x2523272723262625 ........ 0x2422282424252523 ........ 0x212122232022201F ........
0x2626242424242323 ........ 0x2726252726242524 ........ 0x2323242422222422 .$...#.. 0x232221231F212121 ........ 0x2123222123222321 ........ 0x2521212122232021 ........ 0x282A292828262A28 ........ 0x2827292729262827 ........ 0x2825292824242526 ........ 0x2524262527252626 .#$...## 0x2823232327222523 ........ 0x201F1C1E1C1D1F1D ........ 0x2222232422232424 ........ 0x2624282824272726 ........ 0x2523292525262624 ........ 0x2222232421232120 ........
0x2727252525252424 ........ 0x2827262827252625 ........ 0x2423252523222523 .$...$#. 0x2423222420222222 ........ 0x2224232224232422 ........ 0x2622222223242122 ........ 0x292B2A2929272B29 ........ 0x29282A282A272928 ........ 0x29262A2925252627 ........ 0x2624262628262626 .$$.##$$ 0x2924242428232624 ........ 0x21201D1F1D1E201E ........ 0x2323242523242525 ........ 0x2725292925282827 ........ 0x26242A2626272725 ........ 0x2323242522242221 ........
0x2828262626262525 ........ 0x2928272928262726 ........ 0x2523262624222524 .$.##$$# 0x2524232521232323 ........ 0x2325242325242523 ........ 0x2723232324252223 ........ 0x2A2C2B2A2A282C2A ........ 0x2A292B292B282A29 ........ 0x2A272B2A26262728 ........ 0x2724262728262626 #$$#$$$$ 0x2A25252529242725 ........ 0x22211E201E1F211F ........ 0x2424252624252626 ........ 0x28262A2A26292928 ........ 0x27252B2727282826 ........ 0x2424252623252322 ........
0x2929272727272626 ........ 0x2A29282A29272827 ........ 0x2623272624222524 #$#$$$$$ 0x2625242622242424 ........ 0x2426252426252624 ........ 0x2824242425262324 ........ 0x2B2D2C2B2B292D2B ........ 0x2B2A2C2A2C292B2A ........ 0x2B282C2B27272829 ........ 0x2724262728262626 $$$$$$$$ 0x2B2626262A252826 ........ 0x23221F211F202220 ....#..# 0x2525262725262727 ........ 0x29272B2B272A2A29 ........ 0x28262C2828292927 ........ 0x2525262724262423 ........
0x2A2A282828282727 ........ 0x2B2A292B2A282928 ........ 0x2623272624222524 $$$$$$$$ 0x2726252723252525 ........ 0x2527262527262725 ........ 0x2925252526272425 ........ 0x2C2E2D2C2C2A2E2C ........ 0x2C2B2D2B2D2A2C2B ........ 0x2C292D2C2828292A ........ 0x2724262728262626 $$$$$$$$ 0x2C2727272B262927 ........ 0x242320221F212320 ....$##$ 0x2626272826272828 .#...... 0x2A282C2C282B2B2A ........ 0x29272D29292A2A28 ........ 0x2626272825272524 ........
0x2B2B292929292828 ........ 0x2C2B2A2C2B292A29 ........ 0x2623272624222524 $$$$$$$$ 0x2827262824262626 ....#... 0x2628272628272826 ........ 0x2A26262627282526 ..##.#.. 0x2D2F2E2D2D2B2F2D ........ 0x2D2C2E2C2E2B2D2C ........ 0x2D2A2E2D29292A2B ........ 0x2724262728262626 $$$$$$$$ 0x2D2828282C272A28 .....#.. 0x252421231F212320 ....$$$$ 0x2726282927282929 .$#...## 0x2B292D2D292C2C2B ........ 0x2A282E2A2A2B2B29 .#.##... 0x2727282926282625 ........
0x2C2C2A2A2A2A2929 ........ 0x2D2C2B2D2C2A2B2A ........ 0x2623272624222524 $$$$$$$$ 0x2928272924272727 ..#.$... 0x2729282729282927 ##...#.. 0x2B27262628282627 ..$$.$.. 0x2E302F2E2E2C302E ....#.#. 0x2E2D2F2D2F2C2E2D ........ 0x2E2B2F2E2A2A2B2C ........ 0x2724262728262626 $$$$$$$$ 0x2E2929292D272B29 .####$.# 0x262522241F212320 ###.$$$$ 0x2826282A28292929 #$$.##$$ 0x2C2A2E2E2A2D2D2C ........ 0x2B282F2A2A2C2C2A .$.$$.#. 0x2828292A27292726 ........
0x2D2D2B2B2B2B2A2A ........ 0x2E2D2C2E2D2B2C2B ........ 0x2623272624222524 $$$$$$$$ 0x2A29272A24282828 .#$.$### 0x272929282A282A28 $$###$.# 0x2C28262629282728 ##$$#$## 0x2F31302F2E2D302F ..#.$.$. 0x2F2E302E302D2F2E ........ 0x2F2C302F2B2B2C2D ........ 0x2724262728262626 $$$$$$$$ 0x2F2929292D272C29 .$$$$$.$ 0x262522251F212320 $$$#$$$$ 0x2826282B28292929 $$$.$$$$ 0x2D2B2F2F2B2E2E2D ........ 0x2C28302A2A2D2C2B #$#$$#$# 0x29292A2B282A2827 ........
0x2E2E2C2C2C2C2B2B ........ 0x2F2E2D2F2E2C2D2C ........ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 #$$#$$$$ 0x272929282A282B28 $$$$$$#$ 0x2C28262629282728 $$$$$$$$ 0x303230302E2E3030 #.$#$#$. 0x302F312F312E302F ........ 0x302D31302C2C2D2E ....#... 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 #$$$$$#$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$#$$$$ 0x2E2C30302C2F2F2E ........ 0x2C28302A2A2D2C2B $$$$$$$$ 0x2A2A2B2C292B2928 ........
0x2F2F2D2D2D2D2C2C ........ 0x302F2E302F2D2E2D ........ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303330302E2E3031 $.$$$$$. 0x31303230322F3130 ........ 0x312E32312C2D2E2F ....$..# 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x2F2D31312D30302F ........ 0x2C28302A2A2D2C2B $$$$$$$$ 0x2B2B2C2D2A2C2A29 .#....#.
0x30302E2E2E2E2D2D ........ 0x31302F31302E2F2E ........ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $#$$$$$# 0x3231333133303231 ........ 0x322F33322C2E2F2F #...$##$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x302E32322E313130 ....##.. 0x2C28302A2A2D2C2B $$$$$$$$ 0x2C2B2D2E2B2D2A2A .$.###$#
0x31312F2F2F2F2E2E ........ 0x32313032312F302F ........ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3332343234313332 .....#.. 0x323034332C2E2F2F $#..$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x312F33332E313231 ....$$.. 0x2C28302A2A2D2C2B $$$$$$$$ 0x2D2B2E2E2B2D2A2A .$#$$$$$
0x3232303030302F2F ........ 0x3332313332303130 .....#.. 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3433353335313433 .#..#$.# 0x323035342C2E2F2F $$..$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x323034342E313332 ###.$$#. 0x2C28302A2A2D2C2B $$$$$$$$ 0x2E2B2E2E2B2D2A2A #$$$$$$$
0x3333313131313030 ........ 0x3433323433303231 ##...$.. 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3533363435313533 .$#.$$#$ 0x323036352C2E2F2F $$#.$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x323034352E313333 $$$#$$$# 0x2C28302A2A2D2C2B $$$$$$$$ 0x2E2B2E2E2B2D2A2A $$$$$$$$
0x3434323232323131 ..#...## 0x3433333534303332 $$#..$## 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3633363535313533 .$$#$$$$ 0x323036362C2E2F2F $$$#$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x323034352E313333 $$$$$$$$ 0x2C28302A2A2D2C2B $$$$$$$$ 0x2E2B2E2E2B2D2A2A $$$$$$$$
0x3535323333333131 ..$.##$$ 0x3433333635303332 $$$.#$$$ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3733363535313533 #$$$$$$$ 0x323036362C2E2F2F $$$$$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x323034352E313333 $$$$$$$$ 0x2C28302A2A2D2C2B $$$$$$$$ 0x2E2B2E2E2B2D2A2A $$$$$$$$
0x3636323433333131 .#$#$$$$ 0x3433333735303332 $$$#$$$$ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3733363535313533 $$$$$$$$ 0x323036362C2E2F2F $$$$$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x323034352E313333 $$$$$$$$ 0x2C28302A2A2D2C2B $$$$$$$$ 0x2E2B2E2E2B2D2A2A $$$$$$$$
0x3736323433333131 #$$$$$$$ 0x3433333735303332 $$$$$$$$ 0x2623272624222524 $$$$$$$$ 0x2B29272B24282828 $$$$$$$$ 0x272929282A282B28 $$$$$$$$ 0x2C28262629282728 $$$$$$$$ 0x303430302E2E3032 $$$$$$$$ 0x3733363535313533 $$$$$$$$ 0x323036362C2E2F2F $$$$$$$$ 0x2724262728262626 $$$$$$$$ 0x302929292D272D29 $$$$$$$$ 0x262522251F212320 $$$$$$$$ 0x2826282C28292929 $$$$$$$$ 0x323034352E313333 $$$$$$$$ 0x2C28302A2A2D2C2B $$$$$$$$ 0x2E2B2E2E2B2D2A2A $$$$$$$$
Edges
Mc0.Ch0.B0: [ 22 54][ 24 53][ 17 49][ 18 51][ 20 50][ 20 50][ 17 48][ 16 48]
Mc0.Ch0.B1: [ 24 51][ 24 50][ 25 50][ 26 54][ 23 52][ 23 47][ 22 50][ 21 49]
Mc0.Ch1.B0: [ 17 37][ 15 34][ 18 38][ 15 37][ 22 35][ 19 33][ 19 36][ 17 35]
Mc0.Ch1.B1: [ 15 42][ 13 40][ 15 38][ 17 42][ 16 35][ 19 39][ 16 39][ 15 39]
Mc0.Ch2.B0: [ 14 38][ 16 40][ 19 40][ 16 39][ 21 41][ 17 39][ 22 42][ 15 39]
Mc0.Ch2.B1: [ 22 43][ 21 39][ 16 37][ 15 37][ 18 40][ 22 39][ 15 38][ 16 39]
Mc0.Ch3.B0: [ 16 47][ 17 51][ 19 47][ 18 47][ 29 45][ 24 45][ 31 47][ 25 49]
Mc0.Ch3.B1: [ 23 54][ 20 50][ 26 53][ 24 52][ 28 52][ 25 48][ 25 52][ 25 50]
Mc1.Ch0.B0: [ 28 49][ 27 47][ 26 53][ 26 53][ 24 43][ 23 45][ 23 46][ 23 46]
Mc1.Ch0.B1: [ 24 38][ 24 35][ 24 37][ 24 38][ 28 39][ 24 37][ 25 37][ 26 37]
Mc1.Ch1.B0: [ 26 47][ 15 40][ 20 40][ 17 40][ 26 44][ 21 38][ 22 44][ 17 40]
Mc1.Ch1.B1: [ 16 37][ 15 36][ 14 33][ 13 36][ 17 30][ 14 32][ 16 34][ 13 31]
Mc1.Ch2.B0: [ 18 39][ 20 37][ 19 39][ 21 43][ 22 39][ 23 40][ 23 40][ 23 40]
Mc1.Ch2.B1: [ 26 49][ 22 47][ 24 51][ 28 52][ 22 45][ 25 48][ 24 50][ 25 50]
Mc1.Ch3.B0: [ 18 43][ 16 39][ 21 47][ 18 41][ 20 41][ 21 44][ 21 43][ 22 42]
Mc1.Ch3.B1: [ 17 45][ 11 42][ 18 45][ 14 45][ 16 42][ 20 44][ 17 41][ 14 41]
Per Bit Offset
Mc0.Ch0.B0: 12 13 9 11 11 11 10 9
Mc0.Ch0.B1: 11 11 13 13 12 11 11 11
Mc0.Ch1.B0: 4 1 4 2 7 4 4 4
Mc0.Ch1.B1: 6 5 6 7 7 8 7 6
Mc0.Ch2.B0: 5 5 8 7 8 6 9 6
Mc0.Ch2.B1: 8 9 6 5 7 8 7 7
Mc0.Ch3.B0: 4 4 4 5 9 9 9 9
Mc0.Ch3.B1: 11 8 11 11 11 11 11 11
Mc1.Ch0.B0: 11 12 11 12 10 10 10 9
Mc1.Ch0.B1: 6 6 4 6 7 6 5 6
Mc1.Ch1.B0: 9 5 7 6 8 8 8 6
Mc1.Ch1.B1: 7 7 8 7 8 6 6 5
Mc1.Ch2.B0: 7 7 6 8 9 9 8 8
Mc1.Ch2.B1: 12 11 10 12 10 10 10 12
Mc1.Ch3.B0: 6 5 5 5 6 7 6 8
Mc1.Ch3.B1: 9 5 9 6 8 9 8 8
START_RxDqsBitDelay
R Mc0.C0.R1.S0.B0 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S0.B1 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S0.B2 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S0.B3 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S0.B4 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S0.B5 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S0.B6 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S0.B7 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S1.B0 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B1 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S1.B2 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B3 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S1.B4 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B5 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S1.B6 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S1.B7 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S2.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S2.B1 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S2.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S2.B5 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S2.B7 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S3.B0 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S3.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S3.B2 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S3.B3 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S3.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S3.B5 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S3.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S3.B7 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S4.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S4.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S4.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S4.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S4.B4 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S4.B5 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S4.B6 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S4.B7 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S5.B0 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S5.B1 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S5.B2 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S5.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S5.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S5.B5 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S5.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S5.B7 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B0 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S6.B1 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R1.S6.B2 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S6.B3 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S6.B4 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S6.B5 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S6.B6 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S6.B7 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S7.B0 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B1 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S7.B2 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S7.B3 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S7.B4 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S7.B5 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S7.B6 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B7 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S0.B0 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B1 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S0.B2 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R1.S0.B3 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R1.S0.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S0.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S0.B6 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S0.B7 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S1.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S1.B1 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S1.B2 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S1.B3 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S1.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B5 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S1.B6 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S1.B7 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S2.B0 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S2.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S2.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S2.B4 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S2.B5 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S2.B6 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S2.B7 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S3.B0 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S3.B1 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S3.B2 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S3.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S3.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S3.B5 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S3.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S3.B7 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B0 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S4.B1 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S4.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S4.B3 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B4 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S4.B5 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B7 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S5.B0 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S5.B1 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S5.B2 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S5.B3 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R1.S5.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S5.B5 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S5.B6 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S5.B7 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S6.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S6.B2 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S6.B3 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S6.B4 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B5 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S6.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S6.B7 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S7.B1 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S7.B2 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B3 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S7.B4 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S7.B5 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B6 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S7.B7 RxDqsBitDelay: 28 (0x1C)
STOP_RxDqsBitDelay
Calling with EnRxDutyCycle = 1, EnPerBit = 0, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 190 200 180 190 140 140 170 180 190 190 180 190 120 120 190 190 200 200 210 210 190 190 170 180 180 190 180 180 210 210 180 180 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 200 230 190 150 140 210 180 210 190 220 190 160 120 210 190 240 200 260 210 250 190 220 180 210 190 210 180 240 210 230 180
Weighted Center -1 -2 -1 -2 -1 -2 -2 -1 -2 -3 -3 -2 -1 -2 -2 -3
Final Center -16 -16 -9 -15 -14 -15 -8 -14 -17 -18 -16 -14 -14 -13 -17 -15
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 200 220 190 150 140 210 180 200 190 210 190 140 120 210 190 230 200 250 210 220 190 190 180 200 190 210 180 230 210 230 180
Weighted Center -1 -2 -1 -2 -1 -1 -1 -1 -2 -2 -2 -1 -1 -2 -1 -3
Final Center -19 -19 -13 -18 -18 -18 -11 -18 -20 -21 -19 -17 -18 -18 -20 -19
LstSavd Margins 180 190 180 190 130 130 170 170 170 180 180 180 120 120 180 190 200 200 210 210 200 200 170 180 200 200 190 200 200 210 170 170 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 190 220 190 160 130 210 170 220 180 220 180 160 120 220 190 230 200 240 210 240 200 220 180 230 200 220 200 240 210 220 170
Weighted Center -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -2 -1 -2 -3
Final Center -17 -17 -8 -14 -14 -15 -7 -15 -17 -16 -17 -15 -17 -17 -17 -15
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 190 220 190 150 130 200 170 210 180 210 180 150 120 220 190 220 200 230 210 230 200 210 180 220 200 210 200 230 210 220 170
Weighted Center -2 -2 -1 -2 -2 -2 -2 -2 -1 -1 -2 -2 -1 -1 -1 -3
Final Center -19 -19 -12 -17 -18 -18 -12 -19 -19 -20 -20 -18 -19 -19 -20 -18
MRC task Read Timing Centering 2D After Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD47h
MRC task -- Receive Enable Timing Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
RcvEnDelay
-31 # # # # # # # # # # # # # # # # 0x560D3_0 0x5D2BD_0 0x5D0ED_0 0x7E8C0_0 0x74A0A_0 0x5D204_0 0x5D2DF_0 0x5D28E_0
-29 # # # # # # # # # # # # # # # # 0x4C5D8_0 0x53EE0_0 0x5C7B7_0 0x7C27E_0 0x6F441_0 0x58305_0 0x5D2B5_0 0x32096_0
-27 # # # # # # . . . . # # # # # # 0x4A6A5_0 0x63599_0 0x2378C_0 0x0_0 0x0_0 0x2A51E_0 0x5D254_0 0x4E8C_0
-25 # # . . . # . . . . # # # # . . 0x3F545_0 0x0_0 0x1273_0 0x0_0 0x0_0 0x153_0 0x5A9CD_0 0x0_0
-23 # # . . . . . . . . . . # # . . 0xA80E_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x3ABBC_0 0x0_0
-21 . # . . . . . . . . . . # # . . 0x63_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x474AF_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 # # . . . . . . . . . . # # . . 0x574_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x39C_0 0x0_0
25 # # . . . . . . . . # . # # . . 0x353FB_0 0x0_0 0x0_0 0x0_0 0x0_0 0x1BE_0 0x170CB_0 0x0_0
27 # # # # . # # . . . # # # # . # 0x1BCFBC_0 0x284_0 0x5C_0 0x62_0 0x0_0 0x7CDA_0 0x1C6F0E_0 0x28C_0
29 # # # # # # # # # # # # # # # # 0x1A5865_0 0x2C0F_0 0x5B64_0 0x1571_0 0x3E2_0 0x17B702_0 0x1C69EC_0 0xBBED_0
31 # # # # # # # # # # # # # # # # 0x19A0BC_0 0xC4A41_0 0x1891F1_0 0x7D32_0 0x7351_0 0x1BFA12_0 0x1A58E3_0 0x17BEBA_0
Mc0.C0.R0: Left Right Width Center
B0: -21 21 42 0
B1: -19 21 40 1
Mc0.C1.R0: Left Right Width Center
B0: -25 25 50 0
B1: -25 25 50 0
Mc0.C2.R0: Left Right Width Center
B0: -25 27 52 1
B1: -23 25 48 1
Mc0.C3.R0: Left Right Width Center
B0: -27 25 52 -1
B1: -27 27 54 0
Mc1.C0.R0: Left Right Width Center
B0: -27 27 54 0
B1: -27 27 54 0
Mc1.C1.R0: Left Right Width Center
B0: -23 23 46 0
B1: -23 25 48 1
Mc1.C2.R0: Left Right Width Center
B0: -19 21 40 1
B1: -19 21 40 1
Mc1.C3.R0: Left Right Width Center
B0: -25 27 52 1
B1: -25 25 50 0
MRC task Receive Enable Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD7Ah
MRC task -- Rank Margin Tool for Even Odd UI Errors -- Started.
Rank Margin Testing for EVEN UI errors: DQ LC = 17, Cmd LC = 17
START_RMT_EVEN
Params: RxDqsDelay TxDqDelay
Mc0.C0.R0: -20 21 -25 25
Mc0.C0.R1: -21 21 -25 25
Mc0.C1.R0: -14 15 -20 20
Mc0.C1.R1: -15 14 -19 21
Mc0.C2.R0: -20 20 -25 25
Mc0.C2.R1: -20 20 -24 25
Mc0.C3.R0: -15 13 -20 20
Mc0.C3.R1: -15 14 -20 20
Mc1.C0.R0: -22 22 -25 25
Mc1.C0.R1: -22 21 -24 25
Mc1.C1.R0: -21 19 -24 24
Mc1.C1.R1: -20 20 -23 25
Mc1.C2.R0: -19 20 -24 25
Mc1.C2.R1: -21 21 -25 25
Mc1.C3.R0: -20 21 -24 24
Mc1.C3.R1: -20 20 -24 24
STOP_RMT
Rank Margin Testing for ODD UI errors: DQ LC = 17, Cmd LC = 17
START_RMT_ODD
Params: RxDqsDelay TxDqDelay
Mc0.C0.R0: -20 21 -23 25
Mc0.C0.R1: -20 21 -24 25
Mc0.C1.R0: -14 15 -20 20
Mc0.C1.R1: -15 14 -19 21
Mc0.C2.R0: -20 20 -25 25
Mc0.C2.R1: -19 20 -25 25
Mc0.C3.R0: -13 13 -19 20
Mc0.C3.R1: -12 14 -19 20
Mc1.C0.R0: -22 22 -24 24
Mc1.C0.R1: -21 21 -24 25
Mc1.C1.R0: -18 19 -23 25
Mc1.C1.R1: -19 20 -22 25
Mc1.C2.R0: -19 20 -24 25
Mc1.C2.R1: -21 21 -24 25
Mc1.C3.R0: -19 21 -24 25
Mc1.C3.R1: -19 20 -23 24
STOP_RMT
MRC task Rank Margin Tool for Even Odd UI Errors -- SUCCEEDED, Status = 0h.
Post Code: DD44h
MRC task -- Rank Margin Tool -- Started.
Rank Margin Testing for Composite UI errors: DQ LC = 17, Cmd LC = 17
START_RMT
Params: RecEnDelay TxDqsDelay RxDqsDelay TxDqDelay RxVref TxVref ClkGrpPi CmdVref
Mc0.C0.R0: -80 80 -31 31 -20 21 -24 25 -39 41 -40 40 -49 49 -33 36
Mc0.C0.R1: -84 80 -31 31 -20 21 -24 25 -37 40 -40 40 -48 49 -36 36
Mc0.C1.R0: -100 100 -31 31 -14 15 -20 20 -41 36 -40 40 -50 49 -40 40
Mc0.C1.R1: -96 104 -31 31 -15 14 -19 21 -41 36 -40 40 -51 49 -40 40
Mc0.C2.R0: -92 100 -31 31 -19 20 -24 25 -42 40 -40 40 -55 53 -40 40
Mc0.C2.R1: -96 100 -31 31 -19 20 -24 25 -41 39 -40 40 -57 53 -40 40
Mc0.C3.R0: -100 108 -31 31 -13 13 -20 20 -35 32 -40 40 -34 44 -30 33
Mc0.C3.R1: -104 108 -31 31 -13 14 -19 20 -35 34 -40 40 -63 45 -40 33
Mc1.C0.R0: -112 112 -31 31 -22 22 -24 25 -45 45 -40 40 -54 56 -40 40
Mc1.C0.R1: -108 108 -31 31 -22 21 -25 25 -45 45 -40 40 -54 54 -40 40
Mc1.C1.R0: -96 92 -31 31 -18 19 -23 24 -36 36 -40 40 -28 48 -34 37
Mc1.C1.R1: -96 92 -31 31 -19 20 -22 24 -35 38 -40 40 -54 46 -36 37
Mc1.C2.R0: -80 84 -31 31 -19 20 -24 25 -34 35 -40 40 -56 53 -36 37
Mc1.C2.R1: -80 80 -31 31 -21 21 -24 25 -36 40 -40 40 -55 53 -34 37
Mc1.C3.R0: -100 100 -31 31 -20 21 -23 24 -42 44 -40 40 -29 37 -40 40
Mc1.C3.R1: -96 104 -31 31 -19 20 -24 24 -43 45 -40 40 -29 36 -40 40
STOP_RMT
MRC task Rank Margin Tool -- SUCCEEDED, Status = 0h.
Post Code: DD49h
MRC task -- PowerSavingMeter update -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MRC task PowerSavingMeter update -- SUCCEEDED, Status = 0h.
Post Code: DD48h
MRC task -- SAGV Finalization -- Started.
Mc0.C0.R0.MR[3] = 0x0030
Mc0.C0.R0.MR[11] = 0x0045
Mc0.C0.R0.MR[12] = 0x004E
Mc0.C0.R0.MR[14] = 0x004A
Mc0.C0.R0.MR[1] = 0x004D
Mc0.C0.R0.MR[2] = 0x0064
Mc0.C0.R0.MR[22] = 0x0013
Mc0.C0.R0.MR[23] = 0x0004
Mc0.C0.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9D2E
Mc0.C0: LPDDR_MR_CONTENT = 0x0413F84E4530644D
Mc0.C0.R1.MR[3] = 0x0030
Mc0.C0.R1.MR[11] = 0x0045
Mc0.C0.R1.MR[12] = 0x004E
Mc0.C0.R1.MR[14] = 0x004A
Mc0.C0.R1.MR[1] = 0x004D
Mc0.C0.R1.MR[2] = 0x0064
Mc0.C0.R1.MR[22] = 0x0033
Mc0.C0.R1.MR[23] = 0x0004
Mc0.C0.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9D2E
Mc0.C1.R0.MR[3] = 0x0030
Mc0.C1.R0.MR[11] = 0x0045
Mc0.C1.R0.MR[12] = 0x004A
Mc0.C1.R0.MR[14] = 0x004A
Mc0.C1.R0.MR[1] = 0x004D
Mc0.C1.R0.MR[2] = 0x0064
Mc0.C1.R0.MR[22] = 0x0013
Mc0.C1.R0.MR[23] = 0x0004
Mc0.C1.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc0.C1.R1.MR[3] = 0x0030
Mc0.C1.R1.MR[11] = 0x0045
Mc0.C1.R1.MR[12] = 0x004A
Mc0.C1.R1.MR[14] = 0x004A
Mc0.C1.R1.MR[1] = 0x004D
Mc0.C1.R1.MR[2] = 0x0064
Mc0.C1.R1.MR[22] = 0x0033
Mc0.C1.R1.MR[23] = 0x0004
Mc0.C1.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc0.C2.R0.MR[3] = 0x0030
Mc0.C2.R0.MR[11] = 0x0045
Mc0.C2.R0.MR[12] = 0x004A
Mc0.C2.R0.MR[14] = 0x004A
Mc0.C2.R0.MR[1] = 0x004D
Mc0.C2.R0.MR[2] = 0x0064
Mc0.C2.R0.MR[22] = 0x0013
Mc0.C2.R0.MR[23] = 0x0004
Mc0.C2.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc0.C2: LPDDR_MR_CONTENT = 0x0413F84A4530644D
Mc0.C2.R1.MR[3] = 0x0030
Mc0.C2.R1.MR[11] = 0x0045
Mc0.C2.R1.MR[12] = 0x004A
Mc0.C2.R1.MR[14] = 0x004A
Mc0.C2.R1.MR[1] = 0x004D
Mc0.C2.R1.MR[2] = 0x0064
Mc0.C2.R1.MR[22] = 0x0033
Mc0.C2.R1.MR[23] = 0x0004
Mc0.C2.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc0.C3.R0.MR[3] = 0x0030
Mc0.C3.R0.MR[11] = 0x0045
Mc0.C3.R0.MR[12] = 0x0051
Mc0.C3.R0.MR[14] = 0x004A
Mc0.C3.R0.MR[1] = 0x004D
Mc0.C3.R0.MR[2] = 0x0064
Mc0.C3.R0.MR[22] = 0x0013
Mc0.C3.R0.MR[23] = 0x0004
Mc0.C3.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CAA32E
Mc0.C3.R1.MR[3] = 0x0030
Mc0.C3.R1.MR[11] = 0x0045
Mc0.C3.R1.MR[12] = 0x0051
Mc0.C3.R1.MR[14] = 0x004A
Mc0.C3.R1.MR[1] = 0x004D
Mc0.C3.R1.MR[2] = 0x0064
Mc0.C3.R1.MR[22] = 0x0033
Mc0.C3.R1.MR[23] = 0x0004
Mc0.C3.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CAA32E
Mc1.C0.R0.MR[3] = 0x0030
Mc1.C0.R0.MR[11] = 0x0045
Mc1.C0.R0.MR[12] = 0x004A
Mc1.C0.R0.MR[14] = 0x004A
Mc1.C0.R0.MR[1] = 0x004D
Mc1.C0.R0.MR[2] = 0x0064
Mc1.C0.R0.MR[22] = 0x0013
Mc1.C0.R0.MR[23] = 0x0004
Mc1.C0.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc1.C0: LPDDR_MR_CONTENT = 0x0413F84A4530644D
Mc1.C0.R1.MR[3] = 0x0030
Mc1.C0.R1.MR[11] = 0x0045
Mc1.C0.R1.MR[12] = 0x004A
Mc1.C0.R1.MR[14] = 0x004A
Mc1.C0.R1.MR[1] = 0x004D
Mc1.C0.R1.MR[2] = 0x0064
Mc1.C0.R1.MR[22] = 0x0033
Mc1.C0.R1.MR[23] = 0x0004
Mc1.C0.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc1.C1.R0.MR[3] = 0x0030
Mc1.C1.R0.MR[11] = 0x0045
Mc1.C1.R0.MR[12] = 0x004D
Mc1.C1.R0.MR[14] = 0x004A
Mc1.C1.R0.MR[1] = 0x004D
Mc1.C1.R0.MR[2] = 0x0064
Mc1.C1.R0.MR[22] = 0x0013
Mc1.C1.R0.MR[23] = 0x0004
Mc1.C1.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9B2E
Mc1.C1.R1.MR[3] = 0x0030
Mc1.C1.R1.MR[11] = 0x0045
Mc1.C1.R1.MR[12] = 0x004D
Mc1.C1.R1.MR[14] = 0x004A
Mc1.C1.R1.MR[1] = 0x004D
Mc1.C1.R1.MR[2] = 0x0064
Mc1.C1.R1.MR[22] = 0x0033
Mc1.C1.R1.MR[23] = 0x0004
Mc1.C1.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9B2E
Mc1.C2.R0.MR[3] = 0x0030
Mc1.C2.R0.MR[11] = 0x0045
Mc1.C2.R0.MR[12] = 0x004D
Mc1.C2.R0.MR[14] = 0x004A
Mc1.C2.R0.MR[1] = 0x004D
Mc1.C2.R0.MR[2] = 0x0064
Mc1.C2.R0.MR[22] = 0x0013
Mc1.C2.R0.MR[23] = 0x0004
Mc1.C2.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9B2E
Mc1.C2: LPDDR_MR_CONTENT = 0x0413F84D4530644D
Mc1.C2.R1.MR[3] = 0x0030
Mc1.C2.R1.MR[11] = 0x0045
Mc1.C2.R1.MR[12] = 0x004D
Mc1.C2.R1.MR[14] = 0x004A
Mc1.C2.R1.MR[1] = 0x004D
Mc1.C2.R1.MR[2] = 0x0064
Mc1.C2.R1.MR[22] = 0x0033
Mc1.C2.R1.MR[23] = 0x0004
Mc1.C2.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9B2E
Mc1.C3.R0.MR[3] = 0x0030
Mc1.C3.R0.MR[11] = 0x0045
Mc1.C3.R0.MR[12] = 0x004A
Mc1.C3.R0.MR[14] = 0x004A
Mc1.C3.R0.MR[1] = 0x004D
Mc1.C3.R0.MR[2] = 0x0064
Mc1.C3.R0.MR[22] = 0x0013
Mc1.C3.R0.MR[23] = 0x0004
Mc1.C3.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc1.C3.R1.MR[3] = 0x0030
Mc1.C3.R1.MR[11] = 0x0045
Mc1.C3.R1.MR[12] = 0x004A
Mc1.C3.R1.MR[14] = 0x004A
Mc1.C3.R1.MR[1] = 0x004D
Mc1.C3.R1.MR[2] = 0x0064
Mc1.C3.R1.MR[22] = 0x0033
Mc1.C3.R1.MR[23] = 0x0004
Mc1.C3.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
MRC task SAGV Finalization -- SUCCEEDED, Status = 0h.
Post Code: DD51h
MRC task -- Row Hammer Prevention -- Started.
MRC task Row Hammer Prevention -- SUCCEEDED, Status = 0h.
Post Code: DD50h
MRC task -- MRC activate -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MC0_PM_PDWN_CONFIG: 0x1000400h
MC1_PM_PDWN_CONFIG: 0x1000400h
MrcIssueMrr on mc 0 ch 0 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 0 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 0 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 0 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 1 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 1 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 1 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 1 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 2 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 2 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 2 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 2 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 3 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 3 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 3 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 3 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 0 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 0 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 0 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 0 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 1 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 1 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 1 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 1 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 2 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 2 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 2 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 2 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 3 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 3 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 3 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 3 rank 1: MR8
Device[0]= 0x18 - x32
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch3
UpdateSampOdtTiming: GuardBand = 10
W Mc0.C0.S0 McOdtDelay: 0
Warning:Mc0.C0.S0 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S0 McOdtDuration: 15 (0xF)
W Mc0.C0.S0 DqsOdtDelay: 0
Warning:Mc0.C0.S0 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S0 DqsOdtDuration: 7
W Mc0.C0.S0 SenseAmpDelay: 0
Warning:Mc0.C0.S0 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S0 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S1 McOdtDelay: 0
Warning:Mc0.C0.S1 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S1 McOdtDuration: 15 (0xF)
W Mc0.C0.S1 DqsOdtDelay: 0
Warning:Mc0.C0.S1 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S1 DqsOdtDuration: 7
W Mc0.C0.S1 SenseAmpDelay: 0
Warning:Mc0.C0.S1 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S1 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S2 McOdtDelay: 0
Warning:Mc0.C0.S2 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S2 McOdtDuration: 15 (0xF)
W Mc0.C0.S2 DqsOdtDelay: 0
Warning:Mc0.C0.S2 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S2 DqsOdtDuration: 7
W Mc0.C0.S2 SenseAmpDelay: 0
Warning:Mc0.C0.S2 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S2 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S3 McOdtDelay: 0
Warning:Mc0.C0.S3 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S3 McOdtDuration: 15 (0xF)
W Mc0.C0.S3 DqsOdtDelay: 0
Warning:Mc0.C0.S3 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S3 DqsOdtDuration: 7
W Mc0.C0.S3 SenseAmpDelay: 0
Warning:Mc0.C0.S3 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S3 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S4 McOdtDelay: 0
Warning:Mc0.C0.S4 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S4 McOdtDuration: 15 (0xF)
W Mc0.C0.S4 DqsOdtDelay: 0
Warning:Mc0.C0.S4 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S4 DqsOdtDuration: 7
W Mc0.C0.S4 SenseAmpDelay: 0
Warning:Mc0.C0.S4 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S4 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S5 McOdtDelay: 0
Warning:Mc0.C0.S5 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S5 McOdtDuration: 15 (0xF)
W Mc0.C0.S5 DqsOdtDelay: 0
Warning:Mc0.C0.S5 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S5 DqsOdtDuration: 7
W Mc0.C0.S5 SenseAmpDelay: 0
Warning:Mc0.C0.S5 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S5 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S6 McOdtDelay: 0
Warning:Mc0.C0.S6 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S6 McOdtDuration: 15 (0xF)
W Mc0.C0.S6 DqsOdtDelay: 0
Warning:Mc0.C0.S6 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S6 DqsOdtDuration: 7
W Mc0.C0.S6 SenseAmpDelay: 0
Warning:Mc0.C0.S6 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S6 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S7 McOdtDelay: 0
Warning:Mc0.C0.S7 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S7 McOdtDuration: 15 (0xF)
W Mc0.C0.S7 DqsOdtDelay: 0
Warning:Mc0.C0.S7 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S7 DqsOdtDuration: 7
W Mc0.C0.S7 SenseAmpDelay: 0
Warning:Mc0.C0.S7 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S7 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S0 McOdtDelay: 0
Warning:Mc1.C1.S0 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S0 McOdtDuration: 15 (0xF)
W Mc1.C1.S0 DqsOdtDelay: 0
Warning:Mc1.C1.S0 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S0 DqsOdtDuration: 7
W Mc1.C1.S0 SenseAmpDelay: 0
Warning:Mc1.C1.S0 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S0 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S1 McOdtDelay: 0
Warning:Mc1.C1.S1 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S1 McOdtDuration: 15 (0xF)
W Mc1.C1.S1 DqsOdtDelay: 0
Warning:Mc1.C1.S1 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S1 DqsOdtDuration: 7
W Mc1.C1.S1 SenseAmpDelay: 0
Warning:Mc1.C1.S1 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S1 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S2 McOdtDelay: 0
Warning:Mc1.C1.S2 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S2 McOdtDuration: 15 (0xF)
W Mc1.C1.S2 DqsOdtDelay: 0
Warning:Mc1.C1.S2 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S2 DqsOdtDuration: 7
W Mc1.C1.S2 SenseAmpDelay: 0
Warning:Mc1.C1.S2 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S2 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S3 McOdtDelay: 0
Warning:Mc1.C1.S3 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S3 McOdtDuration: 15 (0xF)
W Mc1.C1.S3 DqsOdtDelay: 0
Warning:Mc1.C1.S3 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S3 DqsOdtDuration: 7
W Mc1.C1.S3 SenseAmpDelay: 0
Warning:Mc1.C1.S3 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S3 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S4 McOdtDelay: 0
Warning:Mc1.C1.S4 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S4 McOdtDuration: 15 (0xF)
W Mc1.C1.S4 DqsOdtDelay: 0
Warning:Mc1.C1.S4 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S4 DqsOdtDuration: 7
W Mc1.C1.S4 SenseAmpDelay: 0
Warning:Mc1.C1.S4 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S4 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S5 McOdtDelay: 0
Warning:Mc1.C1.S5 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S5 McOdtDuration: 15 (0xF)
W Mc1.C1.S5 DqsOdtDelay: 0
Warning:Mc1.C1.S5 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S5 DqsOdtDuration: 7
W Mc1.C1.S5 SenseAmpDelay: 0
Warning:Mc1.C1.S5 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S5 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S6 McOdtDelay: 0
Warning:Mc1.C1.S6 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S6 McOdtDuration: 15 (0xF)
W Mc1.C1.S6 DqsOdtDelay: 0
Warning:Mc1.C1.S6 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S6 DqsOdtDuration: 7
W Mc1.C1.S6 SenseAmpDelay: 0
Warning:Mc1.C1.S6 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S6 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S7 McOdtDelay: 0
Warning:Mc1.C1.S7 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S7 McOdtDuration: 15 (0xF)
W Mc1.C1.S7 DqsOdtDelay: 0
Warning:Mc1.C1.S7 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S7 DqsOdtDuration: 7
W Mc1.C1.S7 SenseAmpDelay: 0
Warning:Mc1.C1.S7 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S7 SenseAmpDuration: 15 (0xF)
VccDll Bypass!
MRC task MRC activate -- SUCCEEDED, Status = 0h.
Post Code: DD77h
MRC task -- MRC In-band ECC -- Started.
MRC task MRC In-band ECC -- SUCCEEDED, Status = 0h.
Post Code: DD5Ch
MRC task -- MRC Memory Scrubbing -- Started.
MRC task MRC Memory Scrubbing -- SUCCEEDED, Status = 0h.
Post Code: DD42h
MRC task -- Save MC Values -- Started.
SaveDataCommon RegCnt : 0036, TotalRegCnt : 0036,
Controller : 0
SaveDataCommonPerMc RegCnt : 0025, TotalRegCnt : 0061
SaveDataCommonPerCh RegCnt : 0096, TotalRegCnt : 0157
SaveDataCommonPerByte RegCnt : 0008, TotalRegCnt : 0165
Controller : 1
SaveDataCommonPerMc RegCnt : 0025, TotalRegCnt : 0190
SaveDataCommonPerCh RegCnt : 0096, TotalRegCnt : 0286
SaveDataCommonPerByte RegCnt : 0008, TotalRegCnt : 0294
SaveMCValues: Common section: saved 1308 bytes
SaveDataSaGv RegCnt : 0207, TotalRegCnt : 0207
Controller : 0
SaveDataSaGvMc RegCnt : 0182, TotalRegCnt : 0389
Controller : 1
SaveDataSaGvMc RegCnt : 0182, TotalRegCnt : 0571
SaveDataSaGvPerByte RegCnt : 0584, TotalRegCnt : 1155
SaveDataSaGvPerByte RegCnt : 0584, TotalRegCnt : 1739
SaveDataSaGvCcc RegCnt : 0160, TotalRegCnt : 1899
SAGV section: saved 8092 bytes
Saved data CRC = 3EAF2C1Fh
MRC task Save MC Values -- SUCCEEDED, Status = 0h.
Post Code: DD71h
MRC task -- Normal Operation -- Started.
CPGC Mode Unlocked
MRC task Normal Operation -- SUCCEEDED, Status = 0h.
Post Code: DD72h
MRC task -- Configure Thermal values -- Started.
Configuring Thermal Controls
PM_SREF_CONFIG 5060h: 10200h
PM_SREF_CONFIG 15060h: 10200h
DDR_PTM_CTL 5880h: 40h
MRC task Configure Thermal values -- SUCCEEDED, Status = 0h.
Post Code: DD61h
MRC task -- MRC Energy Performance Gain -- Started.
MRC task MRC Energy Performance Gain -- SUCCEEDED, Status = 0h.
Post Code: DD5Ah
MRC task -- MRC SA GV Switch -- Started.
Waiting for SAGV 3 point save acknowledge
MRC task MRC SA GV Switch -- SUCCEEDED, Status = 0h.
Post Code: DD60h
MRC task -- TXT Memory alias check -- Started.
TXTPEI::New Alias Check Begin
TXTPEI::New Alias Check End
MRC task TXT Memory alias check -- SUCCEEDED, Status = 0h.
Post Code: DD5Dh
MRC task -- MRC done -- Started.
MrcSetLockPrmrr: 0xFFE3C511
PRMRR size is zero, only Locking PRMRR MASK MSR
MrcTmeInit: 0xFFE37302
Total Memory Encryption (TME) Initialization
TME supports AES-XTS encryption policy
TME is disabled. Skipping TME activation.
TME: Initialize MSR_TME_ACTIVATE
TmeEnable = 0x0
KeySelect = 0x0
SaveKey = 0x0
TmePolicy = 0x0
MSR_TME_ACTIVATE was initialized and locked: 0000000000000001
SetIaGtImrExclusionLock Enter
SetIaGtImrExclusionLock End
Memory map registers are locked
Waiting for mc_init_done Acknowledge
MRC task MRC done -- SUCCEEDED, Status = 0h.
Lowest StackAddr: 0xFEF16888 Top StackAddr: 0xFEF3E790 Depth: 163592
Returned From MrcStartMemoryConfiguration(). MrcStatus = 00000000h
Normal mode memory test started.
Normal mode memory test passed.
ME UMA Size requested: 64 MB
Calling MeConfigDidReg
POSTCODE=<0000DE01> - ME-BIOS: DID Entry.
ME status: 0x80000015
Entered ME DRAM Init Done procedure.
ME Data HOB installed
[HECI1] MeMode 0 (Hfsts1: 80000015)
InitStat: 0
Install PPI: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
Notify: PPI Guid: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87, Peim notify entry point: FFE35F70
PchTraceHubDisable() disable Trace Hub device via PSF
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000008, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
POSTCODE=<0000DB50>
PchTraceHubDisable() Power gate Trace Hub device via PMC
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
PchTraceHubDisable() Locking HSWPGCR1
Sending DID as MKHI message
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80140007
00: F0 01 00 00 00 00 00 77 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI1] Got msg Success: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
HeciSend DRAM Init Done successful. Response:
Pci2Priv Base Low = 0x00000000
Pci2Priv Base High = 0x00000000
Flags = 0x00
BIOS Action = 0x04
ME DRAM Init Done ACK received.
HFS read after DID ACK: 80000015
BiosAction = 4
BIOS continues to POST.
POSTCODE=<0000DE21> - ME-BIOS: DID Exit - Success.
CSE IMR Base Low = 0x77000000
CSE IMR Base High = 0x00000000
MeDramInitDone Complete.
BuildMemoryS3DataHob.
MemoryS3DataHob Base : FEF1E3E4
MemoryS3DataHob Size : FAA7
BuildMemoryInfoDataHob.
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
BuildMemoryPlatformDataHob.
Install EFI memory.
2LM TwoLmPreMemConfig is not found
Required memory size = 0x3B0000 bytes
Found 00000000000A0000h bytes at 0000000000000000h
Found 0000000000060000h bytes at 00000000000A0000h
Found 0000000076F00000h bytes at 0000000000100000h
Found 0000000004000000h bytes at 0000000077000000h
Found 0000000000800000h bytes at 000000007B000000h
Found 0000000000800000h bytes at 000000007B800000h
Found 0000000003C00000h bytes at 000000007C000000h
Found 0000000000060000h bytes at 00000000FED20000h
Base memory test started.
PeiInstallPeiMemory MemoryBegin 0x76C50000, MemoryLength 0x3B0000
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 76C50000h, PeiMemoryLength = 3B0000h
FSP_RESERVED_MEMORY_RESOURCE_HOB
FspReservedMemoryResource Base : 76C50000
FspReservedMemoryResource Size : 3B0000
Base memory test started.
Base memory test started.
TSeg base is 7B000000h
TSeg SMRAM size is 800000h
Found 0x0000000780400000 bytes at 0x0000000100000000
Providing I/O space resource from 0x2000 to 0xE000
Providing PCI space from 0x7FC00000 to 0xBFFFFFFF
BuildHobUsageDataHob.
MemoryInit Complete.
Post Code: 0055h
Install PPI: 0FF07255-67C2-456D-9A95-C9162C23868D
Installed gMrcMemoryInitDonePpi
SiInitPreMemOnPolicy() - End
Temp Stack : BaseAddress=0xFEF3EFD0 Length=0x0
Temp Heap : BaseAddress=0xFEF4FF00 Length=0x50000
Total temporary memory: 327680 bytes.
temporary memory stack ever used: 0 bytes.
temporary memory heap used for HobList: 92496 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x0000000B 0xFC800000 - 0xFE7FFFFF
Memory Allocation 0x0000000B 0xFED00000 - 0xFED00FFF
Memory Allocation 0x0000000B 0xFB000000 - 0xFBFFFFFF
Old Stack size 0, New stack size 262144
Stack Hob: BaseAddress=0x76C50000 Length=0x40000
Heap Offset = 0x882BFF00 Stack Offset = 0x882AEFD0
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x00076FED188 EntryPoint=0x00076FED406 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: FFEE289C
Memory Discovered Notify invoked ...
Migrate FSP-M UPD from FEF3F000 to 76FEC000
FspMemoryInitApi() - End
POSTCODE=<0000D87F>
Success
Loader global data @ 0x76C0FD50
Memory Tolum @ 0x7FC00000
Memory Touum @ 0x880400000
Memory Tom @ 0x800000000
Switch to memory stack @ 0x76C4FF00
Stage1 stack: 0x40000 (0x2A948 used)
Stage1 heap: 0x10000 (0x4360 used, 0x5274 max used)
Call FspTempRamExit ... POSTCODE=<0000B800>
McBank End Index 0x13
MicrocodeRegionBase : 0xFFC15000
MicrocodeRegionSize : 0x00038000
CodeRegionBase : 0xFFD00000
CodeRegionSize : 0x00300000
Memory Length (Below 4GB) = 7B000000.
Memory Length (Above 4GB) = 780400000.
MTRR programming:
MSR_IA32_MTRR_FIX64K_00000 Msr 250 = 0606060606060606
MSR_IA32_MTRR_FIX16K_80000 Msr 258 = 0606060606060606
MSR_IA32_MTRR_FIX16K_A0000 Msr 259 = 0000000000000000
MSR_IA32_MTRR_FIX4K_C0000 Msr 268 = 0505050505050505
MSR_IA32_MTRR_FIX4K_C8000 Msr 269 = 0505050505050505
MSR_IA32_MTRR_FIX4K_D0000 Msr 26A = 0505050505050505
MSR_IA32_MTRR_FIX4K_D8000 Msr 26B = 0505050505050505
MSR_IA32_MTRR_FIX4K_E0000 Msr 26C = 0505050505050505
MSR_IA32_MTRR_FIX4K_E8000 Msr 26D = 0505050505050505
MSR_IA32_MTRR_FIX4K_F0000 Msr 26E = 0505050505050505
MSR_IA32_MTRR_FIX4K_F8000 Msr 26F = 0505050505050505
MSR_IA32_MTRR_PHYSBASE0 Msr 200 = 00000000FF000005
MSR_IA32_MTRR_PHYSMASK0 Msr 201 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE1 Msr 202 = 0000000000000006
MSR_IA32_MTRR_PHYSMASK1 Msr 203 = 0000007F80000800
MSR_IA32_MTRR_PHYSBASE2 Msr 204 = 000000007B000000
MSR_IA32_MTRR_PHYSMASK2 Msr 205 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE3 Msr 206 = 000000007C000000
MSR_IA32_MTRR_PHYSMASK3 Msr 207 = 0000007FFC000800
MSR_IA32_MTRR_PHYSBASE4 Msr 208 = 0000000100000006
MSR_IA32_MTRR_PHYSMASK4 Msr 209 = 0000007F00000800
MSR_IA32_MTRR_PHYSBASE5 Msr 20A = 0000000200000006
MSR_IA32_MTRR_PHYSMASK5 Msr 20B = 0000007E00000800
MSR_IA32_MTRR_PHYSBASE6 Msr 20C = 0000000400000006
MSR_IA32_MTRR_PHYSMASK6 Msr 20D = 0000007C00000800
MSR_IA32_MTRR_PHYSBASE7 Msr 20E = 0000000800000006
MSR_IA32_MTRR_PHYSMASK7 Msr 20F = 0000007800000800
MSR_IA32_MTRR_PHYSBASE8 Msr 210 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK8 Msr 211 = 0000000000000000
MSR_IA32_MTRR_PHYSBASE9 Msr 212 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK9 Msr 213 = 0000000000000000
TempRamExitApi() - End
POSTCODE=<0000B87F>
Success
Memory FSP @ 0x76C50000
Memory TOP @ 0x76750000
Loading Component FLMP:SG02
HASH verification for usage (0x00000002) with Hash Alg (0x2): Success
Loaded STAGE2 @ 0x76A03000
============= Intel Slim Bootloader STAGE2 =============
PCH gen (0x5), series (0x2), stepping (0x10)
LPC DeviceId (0xA088)
Boot-time Pch Dts: 0x17C
GPIO PAD: 0x0902000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0900000B DATA: 0x0150A383 0x00002001
GPIO PAD: 0x0900000C DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0900000D DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000016 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x090B0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0006 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0007 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0011 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0908000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0000 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000E DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0001 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0003 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070006 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070011 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x09070012 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09030000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030001 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030002 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09030003 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020000 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020001 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020002 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020003 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020004 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020005 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020006 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000A DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000E DATA: 0x03302385 0x00002001
GPIO PAD: 0x09020010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020012 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020013 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000009 DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000A DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000E DATA: 0x0350A285 0x00002001
GPIO PAD: 0x0900000F DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000010 DATA: 0x0550A281 0x00002019
GPIO PAD: 0x09000011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000012 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09000013 DATA: 0x033002E1 0x00002001
GPIO PAD: 0x09000014 DATA: 0x033022E1 0x00002001
GPIO PAD: 0x09000015 DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000017 DATA: 0x0350A287 0x00002001
GPIO PAD: 0x090B0002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0005 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0008 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B0009 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000A DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000B DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0013 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0016 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0017 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09080000 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080001 DATA: 0x0550A381 0x00002019
GPIO PAD: 0x09080002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080003 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080009 DATA: 0x03302385 0x0000201F
GPIO PAD: 0x0908000A DATA: 0x03302285 0x0000201F
GPIO PAD: 0x0908000B DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x0908000C DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09080010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080011 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x09080012 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090E0001 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0002 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0006 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090E0007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0009 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000A DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000B DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000C DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000D DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000F DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0010 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x090E0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0012 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0013 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0014 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0015 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0016 DATA: 0x0350A385 0x00002009
GPIO PAD: 0x090E0017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x090C0007 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C000A DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0013 DATA: 0x03306581 0x00002001
GPIO PAD: 0x090C0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070000 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070001 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070005 DATA: 0x0550A583 0x00002001
GPIO PAD: 0x0907000A DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09060000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060004 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060006 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060007 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09050000 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050001 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050002 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050003 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050004 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050005 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050006 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050007 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050008 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x09050009 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x0905000A DATA: 0x0150A283 0x00002001
GPIO PAD: 0x0905000B DATA: 0x0150A283 0x00002001
Variable region: 0xFF60E000:0x2000
SaveNvsData Length=0xFAA8
bios range (0x1530000 : 0xAD0000)
MRC data successfully saved to 0x120000
Save MRC Training Data (0x76C96120 0x00FAA8) ... Success
Silicon Init
PchLp is detected
BIOS SPI region will be protected
IAS SPI region will be protected
Load Silicon Cfg Data
Call FspSiliconInit ...
POSTCODE=<00009800>
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFDF8A7B
The 1th FV start address is 0x00076B78000, size is 0x0008B000, handle is 0x76B78000
Memory Discovered Notify completed ...
DiscoverPeimsAndOrderWithApriori(): Found 0xC PEI FFS files in the 1th FV
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x00076FE7198 EntryPoint=0x00076FE74A6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
Loading PEIM 299D6F8B-2EC9-4E40-9EC6-DDAA7EBF5FD9
Loading PEIM at 0x00076F01000 EntryPoint=0x00076F014D4 SiInitFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
Register PPI Notify: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Install PPI: F69ABF86-4048-44EF-A8EF-6C7F204AC8DA
Loading PEIM 131B73AC-C033-4DE1-8794-6DAB08E731CF
Loading PEIM at 0x00076EC7000 EntryPoint=0x00076EC7659 FspInit.efi
Dumping FSPS_UPD - Size: 0x00000EE0
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x53 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000030: 0x1C 0xB9 0xA5 0x76 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000050: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01
0x00000060: 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000070: 0x50 0x66 0xA2 0x76 0x34 0x0B 0x0A 0x0B 0x0B 0x0B 0x0B 0x0B 0x0B 0x0E 0x09 0x09
0x00000080: 0x00 0x06 0x00 0x00 0x50 0x20 0xA0 0x76 0x00 0x01 0x00 0x00 0x01 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000000A0: 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000000B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000000C0: 0x00 0x00 0x00 0x04 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xC2 0x01 0x00
0x000000D0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00
0x000000E0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x08
0x000000F0: 0x08 0x08 0x08 0x08 0x08 0x08 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x02 0x02 0x02
0x00000100: 0x02 0x02 0x02 0x02 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00 0x01 0x01
0x00000110: 0x00 0x00 0x00 0x00 0x0A 0x22 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000120: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x0B 0x32 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x02 0x0B 0x19
0x00000150: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x12 0x0B 0x19 0x00 0x00 0x00 0x00
0x00000170: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00
0x00000190: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000260: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x00 0x00 0x00 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06
0x000002A0: 0x06 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03
0x000002C0: 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000300: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000310: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000320: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x03
0x00000330: 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x03
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
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0x00000C40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C50: 0x00 0x00 0x00 0x00 0x02 0x00 0x01 0x01 0x00 0x00 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C60: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C70: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C90: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000CA0: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000CB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CC0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CD0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CE0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000CF0: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D00: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D10: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D20: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D30: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D40: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D50: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D60: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D70: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D90: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0xFF 0x00 0x00 0x03 0x10 0x0F 0x10 0x0F 0x10
0x00000DD0: 0x0F 0x10 0x03 0x10 0x0F 0x10 0x0F 0x10 0x0F 0x10 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DE0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DF0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000E00: 0x07 0x07 0x08 0x08 0x08 0x08 0x09 0x09 0x09 0x09 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E20: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E30: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E50: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E60: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E70: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E80: 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000E90: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0xA0 0x00 0x00 0x00 0xA2 0x00 0x00 0x00 0xA4
0x00000EA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EB0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000ED0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Updating UPDs consumed in FspSiliconInitApi...
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x504
TotalBlockSize after adding Block[0x2]= 0x530
TotalBlockSize after adding Block[0x3]= 0x55C
TotalBlockSize after adding Block[0x4]= 0x588
TotalBlockSize after adding Block[0x5]= 0x5CC
TotalBlockSize after adding Block[0x6]= 0x5EC
TotalBlockSize after adding Block[0x7]= 0x610
TotalBlockSize after adding Block[0x8]= 0x638
TotalBlockSize after adding Block[0x9]= 0x678
TotalBlockSize after adding Block[0x0]= 0x24
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x0]= 0x1C
TotalBlockSize after adding Block[0x0]= 0x30
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xCC
TotalBlockSize after adding Block[0x3]= 0x144
TotalBlockSize after adding Block[0x4]= 0x16C
TotalBlockSize after adding Block[0x5]= 0x19C
TotalBlockSize after adding Block[0x6]= 0x220
TotalBlockSize after adding Block[0x7]= 0x274
TotalBlockSize after adding Block[0x0]= 0x38
TotalBlockSize after adding Block[0x0]= 0x224
TotalBlockSize after adding Block[0x1]= 0x248
TotalBlockSize after adding Block[0x0]= 0x4C
TotalBlockSize after adding Block[0x0]= 0x98
TotalBlockSize after adding Block[0x1]= 0xF4
TotalBlockSize after adding Block[0x2]= 0x1D8
TotalBlockSize = 0x1998
gSiConfigGuid = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Header.HobLength = 0x34
PCH AddConfigBlocks
PchGeneralConfig->Header.GuidHob.Name = 6ED94C8C-25F7-4686-B246-CA4DE2954B5D
PchGeneralConfig->Header.GuidHob.Header.HobLength = 0x20
PchPcieConfig->Header.GuidHob.Name = 0A53B507-988B-475C-BF76-33DE106D9484
PchPcieConfig->Header.GuidHob.Header.HobLength = 0x4E4
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
FlashProtectionConfig->Header.GuidHob.Name = D0F71512-9E32-4CC9-A5A3-AD679A0667B8
FlashProtectionConfig->Header.GuidHob.Header.HobLength = 0x44
LockDownConfig->Header.GuidHob.Name = 8A838E0A-A639-46F0-A9CE-70C485FBA80D
LockDownConfig->Header.GuidHob.Header.HobLength = 0x20
HsioConfig->Header.GuidHob.Name = E53EBEE7-103D-4A71-9B6A-74EE5F4C8DF5
HsioConfig->Header.GuidHob.Header.HobLength = 0x24
AdrConfig->Header.GuidHob.Name = 5B36A07C-3BBF-4D53-8A2D-E1CF97390C65
AdrConfig->Header.GuidHob.Header.HobLength = 0x28
FivrConfig->Header.GuidHob.Name = 68EE8BD4-05F2-4656-AEE4-AD10C722C34F
FivrConfig->Header.GuidHob.Header.HobLength = 0x40
AMT AddConfigBlocks
ME AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x1
MiscPeiConfig->Header.GuidHob.Name = 01DEF8E6-E998-4E27-8998-9CFAB292BC50
MiscPeiConfig->Header.GuidHob.Header.HobLength = 0x1C
CPU Post-Mem Entry
POSTCODE=<00009C00>
CpuConfig->Header.GuidHob.Name = 48C3AAC9-D66C-42E4-9B1D-39045F465341
CpuConfig->Header.GuidHob.Header.HobLength = 0x30
BiosGuardConfig->Header.GuidHob.Name = 762F9DDB-1C89-4612-846B-EEDC8F622545
BiosGuardConfig->Header.GuidHob.Header.HobLength = 0x58
CpuPowerMgmtBasicConfig->Header.GuidHob.Name = A021E31D-7C14-47DA-B5EC-CABB4D76EDC8
CpuPowerMgmtBasicConfig->Header.GuidHob.Header.HobLength = 0x44
CpuPowerMgmtCustomConfig->Header.GuidHob.Name = 562FA1C8-55EE-4E2F-91CA-8D8450032F0E
CpuPowerMgmtCustomConfig->Header.GuidHob.Header.HobLength = 0x78
CpuPowerMgmtPsysConfig->Header.GuidHob.Name = 04E7F850-19B5-47BA-9D28-B1E75E1F4853
CpuPowerMgmtPsysConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTestConfig->Header.GuidHob.Name = D4DBA957-0D9C-4AF2-9D40-35A844E493AD
CpuTestConfig->Header.GuidHob.Header.HobLength = 0x30
CpuPidTestConfig->Header.GuidHob.Name = 2511095F-D49E-4537-A660-887131D153DA
CpuPidTestConfig->Header.GuidHob.Header.HobLength = 0x84
CpuPowerMgmtTestConfig->Header.GuidHob.Name = 5161ED3D-90BF-436F-B833-D71789B348C1
CpuPowerMgmtTestConfig->Header.GuidHob.Header.HobLength = 0x54
FuSA supported sku detected
CpuAddConfigBlocks Done
POSTCODE=<00009C09>
TBT AddConfigBlocks. TotalBlockCount = 0x1
ITbtPeiConfig->Header.GuidHob.Name = D7E7E1E6-CBEC-4F5F-AED3-FDC0A8B07E25
ITbtPeiConfig->Header.GuidHob.Header.HobLength = 0x38
RtcConfig->Header.GuidHob.Name = 0E9259B8-3DDE-40C7-AA5F-94829A868FAF
RtcConfig->Header.GuidHob.Header.HobLength = 0x20
ThermalConfig->Header.GuidHob.Name = 4416506D-1197-4722-A5B4-4611F9239EAE
ThermalConfig->Header.GuidHob.Header.HobLength = 0x40
CnviConfig->Header.GuidHob.Name = E53EBEF7-103D-4A70-9B6A-73EE5F4C8DF5
CnviConfig->Header.GuidHob.Header.HobLength = 0x28
EspiConfig->Header.GuidHob.Name = 60FBF3B8-96D4-4187-849E-AAF75C4BE1E3
EspiConfig->Header.GuidHob.Header.HobLength = 0x20
GbeConfig->Header.GuidHob.Name = 4B2DE99E-7517-4D04-8C02-F11A592B142F
GbeConfig->Header.GuidHob.Header.HobLength = 0x20
TsnConfig->Header.GuidHob.Name = 9E9A93CB-0F4E-4E56-902D-6C76DE90F771
TsnConfig->Header.GuidHob.Header.HobLength = 0x30
HdaConfig->Header.GuidHob.Name = 7EB3CE7E-82E0-4CD7-BDE5-B2BF4E91C34C
HdaConfig->Header.GuidHob.Header.HobLength = 0x28
IehConfig->Header.GuidHob.Name = 42C4D7F3-981D-4475-A2AE-ADCDD5CE871E
IehConfig->Header.GuidHob.Header.HobLength = 0x20
IshConfig->Header.GuidHob.Name = 433AE2AA-C5A6-46ED-9419-1E5DB81C5740
IshConfig->Header.GuidHob.Header.HobLength = 0x128
InterruptConfig->Header.GuidHob.Name = 09A2B815-BE29-45EF-BFBF-58EAAC5E2978
InterruptConfig->Header.GuidHob.Header.HobLength = 0x224
IoApicConfig->Header.GuidHob.Name = 2873D0F1-00F6-40AB-AC36-9A68BA873E6C
IoApicConfig->Header.GuidHob.Header.HobLength = 0x24
P2sbConfig->Header.GuidHob.Name = 2474DCB8-4BB4-49DA-8783-7CD3D385FF07
P2sbConfig->Header.GuidHob.Header.HobLength = 0x20
PchDmiConfig->Header.GuidHob.Name = B3A61210-1CD3-4797-8EE6-D3429C4F17BD
PchDmiConfig->Header.GuidHob.Header.HobLength = 0x20
PmConfig->Header.GuidHob.Name = 93826157-DC85-4E34-AED9-6EA10DF9E3A7
PmConfig->Header.GuidHob.Header.HobLength = 0x44
SataConfig->Header.GuidHob.Name = F5F87B4F-CC3C-408D-89E3-61C59C5407C4
SataConfig->Header.GuidHob.Header.HobLength = 0x4C
UsbConfig->Header.GuidHob.Name = B2DA9CCD-6A8C-4BB6-B3E6-CDFBB7668BDE
UsbConfig->Header.GuidHob.Header.HobLength = 0x98
Usb2PhyConfig->Header.GuidHob.Name = 576C1134-2E0C-CB7D-CD3F-AC682DAED3F2
Usb2PhyConfig->Header.GuidHob.Header.HobLength = 0x5C
Usb3HsioConfig->Header.GuidHob.Name = F8AFC238-F176-12CE-BEF4-69F9B1AC40D5
Usb3HsioConfig->Header.GuidHob.Header.HobLength = 0xE4
ThcConfig->Header.GuidHob.Name = 1B318AD1-AA0D-4764-99FD-BB2BF47F7ED6
ThcConfig->Header.GuidHob.Header.HobLength = 0x2C
PsfConfig->Header.GuidHob.Name = 49B12CF6-0A56-4B9F-A84C-F57D21238C77
PsfConfig->Header.GuidHob.Header.HobLength = 0x20
FusaConfig->Header.GuidHob.Name = F9225896-A9C8-4543-BA9E-5332D7BF8C2B
FusaConfig->Header.GuidHob.Header.HobLength = 0x20
GtConfig->Header.GuidHob.Name = 04249AC0-0088-439F-A74E-A7042A062F5D
GtConfig->Header.GuidHob.Header.HobLength = 0x48
TcssConfig->Header.GuidHob.Name = FB631590-79C9-4F0D-A996-EEE29866FAFD
TcssConfig->Header.GuidHob.Header.HobLength = 0x178
GnaConfig->Header.GuidHob.Name = 53E0EF18-B8A8-4795-A66D-E4772CC3AE82
GnaConfig->Header.GuidHob.Header.HobLength = 0x20
VmdConfig->Header.GuidHob.Name = 79B52C74-B9BA-4F36-A240-F2410D20848A
VmdConfig->Header.GuidHob.Header.HobLength = 0xB8
CpuPcieRpConfig->Header.GuidHob.Name = 9749A5FB-9130-44F0-8F61-DBFF8EF2CAC7
CpuPcieRpConfig->Header.GuidHob.Header.HobLength = 0x260
TelemetryConfig->Header.GuidHob.Name = 8EBF9FEE-7496-42B4-A6F6-CF2B339930D6
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
SerialIoConfig->Header.GuidHob.Name = 6CC06EBF-0D34-4340-BC16-DA09E5783ADB
SerialIoConfig->Header.GuidHob.Header.HobLength = 0x17C
CpuPowerMgmtVrConfig->Header.GuidHob.Name = 254766C9-929D-4EAC-9EEC-DFA20244B5EA
CpuPowerMgmtVrConfig->Header.GuidHob.Header.HobLength = 0xDC
HybridStorage AddConfigBlocks
HybridStorageConfig->Header.GuidHob.Name = 265CE069-D8CF-48BE-AE12-024C2512FAF8
HybridStorageConfig->Header.GuidHob.Header.HobLength = 0x20
HostBridgePeiConfig->Header.GuidHob.Name = 3B6D998E-8B6E-4F53-BE41-074195538AAF
HostBridgePeiConfig->Header.GuidHob.Header.HobLength = 0x20
TccConfig->Header.GuidHob.Name = AE3E7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x44
SpiConfig->Header.GuidHob.Name = 150360EF-99BE-4E43-94BB-BD4026CA3457
SpiConfig->Header.GuidHob.Header.HobLength = 0x28
Install PPI: AEBFFA01-7EDC-49FF-8D88-CB848C5E8670
FSP UpdatePeiPchPolicy
Searching for microcode updates in region passed in TempRamInit API MicrocodeRegionBase = 0xFFC15000, MicrocodeRegionSize = 0x38000.
Microcode update found at 0xFFC15000
FuSA supported sku detected
FSP UpdatePeiMePolicy
FSP UpdatePeiSaPolicy
GtConfig->GraphicsConfigPtr from FSP UpdatePeiSaPolicy: 0x76A5B91C
GtConfig->LogoPtr: 0x0
GtConfig->LogoSize: 0x0
GtConfig->LogoPixelHeight: 0x0
GtConfig->LogoPixelWidth: 0x0
FSP UpdatePeiAmtPolicy
FSP FspUpdatePeiTbtPolicy
MaxLogicProcessors = 8
Install PPI: 1A266768-FD43-4E18-A88A-35C794C3910E
Register PPI Notify: EE16160A-E8BE-47A6-820A-C6900DB0250A
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Mono Status Code PEIM Loaded
SI PEI Policy Initialization Done in Post-Memory
PROGRESS CODE: V03020003 I0
Loading PEIM EDADEB9D-DDBA-48BD-9D22-C1C169C8C5C6
Loading PEIM at 0x00076EA5000 EntryPoint=0x00076EA5D26 CpuMpPei.efi
PROGRESS CODE: V03020002 I0
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: 76EA61CC
AP Loop Mode is 2
WakeupBufferStart = 9F000, WakeupBufferSize = 0
CpuMpPei: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
ShadowMicrocodePatchByPcd: 0x1 microcode patches will be loaded into memory, with size 0x1B400.
ShadowMicrocodePatchWorker: Required microcode patches have been loaded at 0x76E48000, with size 0x1B400.
Register PPI Notify: 8F9D4825-797D-48FC-8471-845025792EF6
Does not find any stored CPU BIST information from PPI!
APICID - 0x00000000, BIST - 0x00000000
APICID - 0x00000001, BIST - 0x00000000
APICID - 0x00000002, BIST - 0x00000000
APICID - 0x00000003, BIST - 0x00000000
APICID - 0x00000004, BIST - 0x00000000
APICID - 0x00000005, BIST - 0x00000000
APICID - 0x00000006, BIST - 0x00000000
APICID - 0x00000007, BIST - 0x00000000
Install PPI: 9E9F374B-8F16-4230-9824-5846EE766A97
Install PPI: 5CB9CB3D-31A4-480C-9498-29D269BACFBA
Install PPI: EE16160A-E8BE-47A6-820A-C6900DB0250A
PROGRESS CODE: V03020003 I0
Notify: PPI Guid: EE16160A-E8BE-47A6-820A-C6900DB0250A, Peim notify entry point: 76EC7963
Dump Silicon Policy updated by Platform...
------------------------ Silicon Print Policy Start ------------------------
CsmFlag= 0
SkipSsidProgramming= 0
CustomizedSvid= 0
CustomizedSsid= 0
SsidTablePtr= 0
NumberOfSsidTableEntry= 0
TraceHubMemBase = 0x00000000
SkipBiosDoneWhenFwUpdate= 0
------------------------ Silicon Print Policy End --------------------------
------------------------ PCH Print Policy Start ------------------------
Revision= 1
------------------ PCH General Config ------------------
Crid= 0
LegacyIoLowLatency = 0
------------------ PCH PCIE Config ------------------
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ClkReqDetect= 1
RootPort[0] MrlSensorPresent = 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] PcieSpeed= 0
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 0
RootPort[0] L1Substates= 0
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] SlotPowerLimitScale= 0
RootPort[0] SlotPowerLimitValue= 0
RootPort[0] EnableCpm= 1
RootPort[0] FormFactor = 0
RootPort[1] HotPlug= 0
RootPort[1] PmSci= 1
RootPort[1] ClkReqDetect= 1
RootPort[1] MrlSensorPresent = 0
RootPort[1] UnsupportedRequestReport= 0
RootPort[1] FatalErrorReport= 0
RootPort[1] NoFatalErrorReport= 0
RootPort[1] CorrectableErrorReport= 0
RootPort[1] SystemErrorOnFatalError= 0
RootPort[1] SystemErrorOnNonFatalError= 0
RootPort[1] SystemErrorOnCorrectableError= 0
RootPort[1] MaxPayload= 1
RootPort[1] SlotImplemented= 1
RootPort[1] AcsEnabled= 1
RootPort[1] PtmEnabled= 1
RootPort[1] AdvancedErrorReporting= 1
RootPort[1] TransmitterHalfSwing= 0
RootPort[1] PcieSpeed= 0
RootPort[1] PhysicalSlotNumber= 1
RootPort[1] CompletionTimeout= 0
RootPort[1] Aspm= 0
RootPort[1] L1Substates= 0
RootPort[1] LtrEnable= 1
RootPort[1] LtrConfigLock= 0
RootPort[1] LtrMaxSnoopLatency= 1003
RootPort[1] LtrMaxNoSnoopLatency= 1003
RootPort[1] SnoopLatencyOverrideMode= 2
RootPort[1] SnoopLatencyOverrideMultiplier= 2
RootPort[1] SnoopLatencyOverrideValue= 3C
RootPort[1] NonSnoopLatencyOverrideMode= 2
RootPort[1] NonSnoopLatencyOverrideMultiplier= 2
RootPort[1] NonSnoopLatencyOverrideValue= 3C
RootPort[1] ForceLtrOverride= 0
RootPort[1] DetectTimeoutMs= 0
RootPort[1] SlotPowerLimitScale= 0
RootPort[1] SlotPowerLimitValue= 0
RootPort[1] EnableCpm= 1
RootPort[1] FormFactor = 0
RootPort[2] HotPlug= 0
RootPort[2] PmSci= 1
RootPort[2] ClkReqDetect= 1
RootPort[2] MrlSensorPresent = 0
RootPort[2] UnsupportedRequestReport= 0
RootPort[2] FatalErrorReport= 0
RootPort[2] NoFatalErrorReport= 0
RootPort[2] CorrectableErrorReport= 0
RootPort[2] SystemErrorOnFatalError= 0
RootPort[2] SystemErrorOnNonFatalError= 0
RootPort[2] SystemErrorOnCorrectableError= 0
RootPort[2] MaxPayload= 1
RootPort[2] SlotImplemented= 1
RootPort[2] AcsEnabled= 1
RootPort[2] PtmEnabled= 1
RootPort[2] AdvancedErrorReporting= 1
RootPort[2] TransmitterHalfSwing= 0
RootPort[2] PcieSpeed= 0
RootPort[2] PhysicalSlotNumber= 2
RootPort[2] CompletionTimeout= 0
RootPort[2] Aspm= 0
RootPort[2] L1Substates= 0
RootPort[2] LtrEnable= 1
RootPort[2] LtrConfigLock= 0
RootPort[2] LtrMaxSnoopLatency= 1003
RootPort[2] LtrMaxNoSnoopLatency= 1003
RootPort[2] SnoopLatencyOverrideMode= 2
RootPort[2] SnoopLatencyOverrideMultiplier= 2
RootPort[2] SnoopLatencyOverrideValue= 3C
RootPort[2] NonSnoopLatencyOverrideMode= 2
RootPort[2] NonSnoopLatencyOverrideMultiplier= 2
RootPort[2] NonSnoopLatencyOverrideValue= 3C
RootPort[2] ForceLtrOverride= 0
RootPort[2] DetectTimeoutMs= 0
RootPort[2] SlotPowerLimitScale= 0
RootPort[2] SlotPowerLimitValue= 0
RootPort[2] EnableCpm= 1
RootPort[2] FormFactor = 0
RootPort[3] HotPlug= 0
RootPort[3] PmSci= 1
RootPort[3] ClkReqDetect= 1
RootPort[3] MrlSensorPresent = 0
RootPort[3] UnsupportedRequestReport= 0
RootPort[3] FatalErrorReport= 0
RootPort[3] NoFatalErrorReport= 0
RootPort[3] CorrectableErrorReport= 0
RootPort[3] SystemErrorOnFatalError= 0
RootPort[3] SystemErrorOnNonFatalError= 0
RootPort[3] SystemErrorOnCorrectableError= 0
RootPort[3] MaxPayload= 1
RootPort[3] SlotImplemented= 1
RootPort[3] AcsEnabled= 1
RootPort[3] PtmEnabled= 1
RootPort[3] AdvancedErrorReporting= 1
RootPort[3] TransmitterHalfSwing= 0
RootPort[3] PcieSpeed= 0
RootPort[3] PhysicalSlotNumber= 3
RootPort[3] CompletionTimeout= 0
RootPort[3] Aspm= 0
RootPort[3] L1Substates= 0
RootPort[3] LtrEnable= 1
RootPort[3] LtrConfigLock= 0
RootPort[3] LtrMaxSnoopLatency= 1003
RootPort[3] LtrMaxNoSnoopLatency= 1003
RootPort[3] SnoopLatencyOverrideMode= 2
RootPort[3] SnoopLatencyOverrideMultiplier= 2
RootPort[3] SnoopLatencyOverrideValue= 3C
RootPort[3] NonSnoopLatencyOverrideMode= 2
RootPort[3] NonSnoopLatencyOverrideMultiplier= 2
RootPort[3] NonSnoopLatencyOverrideValue= 3C
RootPort[3] ForceLtrOverride= 0
RootPort[3] DetectTimeoutMs= 0
RootPort[3] SlotPowerLimitScale= 0
RootPort[3] SlotPowerLimitValue= 0
RootPort[3] EnableCpm= 1
RootPort[3] FormFactor = 0
RootPort[4] HotPlug= 0
RootPort[4] PmSci= 1
RootPort[4] ClkReqDetect= 1
RootPort[4] MrlSensorPresent = 0
RootPort[4] UnsupportedRequestReport= 0
RootPort[4] FatalErrorReport= 0
RootPort[4] NoFatalErrorReport= 0
RootPort[4] CorrectableErrorReport= 0
RootPort[4] SystemErrorOnFatalError= 0
RootPort[4] SystemErrorOnNonFatalError= 0
RootPort[4] SystemErrorOnCorrectableError= 0
RootPort[4] MaxPayload= 1
RootPort[4] SlotImplemented= 1
RootPort[4] AcsEnabled= 1
RootPort[4] PtmEnabled= 1
RootPort[4] AdvancedErrorReporting= 1
RootPort[4] TransmitterHalfSwing= 0
RootPort[4] PcieSpeed= 0
RootPort[4] PhysicalSlotNumber= 4
RootPort[4] CompletionTimeout= 0
RootPort[4] Aspm= 0
RootPort[4] L1Substates= 0
RootPort[4] LtrEnable= 1
RootPort[4] LtrConfigLock= 0
RootPort[4] LtrMaxSnoopLatency= 1003
RootPort[4] LtrMaxNoSnoopLatency= 1003
RootPort[4] SnoopLatencyOverrideMode= 2
RootPort[4] SnoopLatencyOverrideMultiplier= 2
RootPort[4] SnoopLatencyOverrideValue= 3C
RootPort[4] NonSnoopLatencyOverrideMode= 2
RootPort[4] NonSnoopLatencyOverrideMultiplier= 2
RootPort[4] NonSnoopLatencyOverrideValue= 3C
RootPort[4] ForceLtrOverride= 0
RootPort[4] DetectTimeoutMs= 0
RootPort[4] SlotPowerLimitScale= 0
RootPort[4] SlotPowerLimitValue= 0
RootPort[4] EnableCpm= 1
RootPort[4] FormFactor = 0
RootPort[5] HotPlug= 0
RootPort[5] PmSci= 1
RootPort[5] ClkReqDetect= 1
RootPort[5] MrlSensorPresent = 0
RootPort[5] UnsupportedRequestReport= 0
RootPort[5] FatalErrorReport= 0
RootPort[5] NoFatalErrorReport= 0
RootPort[5] CorrectableErrorReport= 0
RootPort[5] SystemErrorOnFatalError= 0
RootPort[5] SystemErrorOnNonFatalError= 0
RootPort[5] SystemErrorOnCorrectableError= 0
RootPort[5] MaxPayload= 1
RootPort[5] SlotImplemented= 1
RootPort[5] AcsEnabled= 1
RootPort[5] PtmEnabled= 1
RootPort[5] AdvancedErrorReporting= 1
RootPort[5] TransmitterHalfSwing= 0
RootPort[5] PcieSpeed= 0
RootPort[5] PhysicalSlotNumber= 5
RootPort[5] CompletionTimeout= 0
RootPort[5] Aspm= 0
RootPort[5] L1Substates= 0
RootPort[5] LtrEnable= 1
RootPort[5] LtrConfigLock= 0
RootPort[5] LtrMaxSnoopLatency= 1003
RootPort[5] LtrMaxNoSnoopLatency= 1003
RootPort[5] SnoopLatencyOverrideMode= 2
RootPort[5] SnoopLatencyOverrideMultiplier= 2
RootPort[5] SnoopLatencyOverrideValue= 3C
RootPort[5] NonSnoopLatencyOverrideMode= 2
RootPort[5] NonSnoopLatencyOverrideMultiplier= 2
RootPort[5] NonSnoopLatencyOverrideValue= 3C
RootPort[5] ForceLtrOverride= 0
RootPort[5] DetectTimeoutMs= 0
RootPort[5] SlotPowerLimitScale= 0
RootPort[5] SlotPowerLimitValue= 0
RootPort[5] EnableCpm= 1
RootPort[5] FormFactor = 0
RootPort[6] HotPlug= 0
RootPort[6] PmSci= 1
RootPort[6] ClkReqDetect= 1
RootPort[6] MrlSensorPresent = 0
RootPort[6] UnsupportedRequestReport= 0
RootPort[6] FatalErrorReport= 0
RootPort[6] NoFatalErrorReport= 0
RootPort[6] CorrectableErrorReport= 0
RootPort[6] SystemErrorOnFatalError= 0
RootPort[6] SystemErrorOnNonFatalError= 0
RootPort[6] SystemErrorOnCorrectableError= 0
RootPort[6] MaxPayload= 1
RootPort[6] SlotImplemented= 1
RootPort[6] AcsEnabled= 1
RootPort[6] PtmEnabled= 1
RootPort[6] AdvancedErrorReporting= 1
RootPort[6] TransmitterHalfSwing= 0
RootPort[6] PcieSpeed= 0
RootPort[6] PhysicalSlotNumber= 6
RootPort[6] CompletionTimeout= 0
RootPort[6] Aspm= 0
RootPort[6] L1Substates= 0
RootPort[6] LtrEnable= 1
RootPort[6] LtrConfigLock= 0
RootPort[6] LtrMaxSnoopLatency= 1003
RootPort[6] LtrMaxNoSnoopLatency= 1003
RootPort[6] SnoopLatencyOverrideMode= 2
RootPort[6] SnoopLatencyOverrideMultiplier= 2
RootPort[6] SnoopLatencyOverrideValue= 3C
RootPort[6] NonSnoopLatencyOverrideMode= 2
RootPort[6] NonSnoopLatencyOverrideMultiplier= 2
RootPort[6] NonSnoopLatencyOverrideValue= 3C
RootPort[6] ForceLtrOverride= 0
RootPort[6] DetectTimeoutMs= 0
RootPort[6] SlotPowerLimitScale= 0
RootPort[6] SlotPowerLimitValue= 0
RootPort[6] EnableCpm= 1
RootPort[6] FormFactor = 0
RootPort[7] HotPlug= 0
RootPort[7] PmSci= 1
RootPort[7] ClkReqDetect= 1
RootPort[7] MrlSensorPresent = 0
RootPort[7] UnsupportedRequestReport= 0
RootPort[7] FatalErrorReport= 0
RootPort[7] NoFatalErrorReport= 0
RootPort[7] CorrectableErrorReport= 0
RootPort[7] SystemErrorOnFatalError= 0
RootPort[7] SystemErrorOnNonFatalError= 0
RootPort[7] SystemErrorOnCorrectableError= 0
RootPort[7] MaxPayload= 1
RootPort[7] SlotImplemented= 1
RootPort[7] AcsEnabled= 1
RootPort[7] PtmEnabled= 1
RootPort[7] AdvancedErrorReporting= 1
RootPort[7] TransmitterHalfSwing= 0
RootPort[7] PcieSpeed= 0
RootPort[7] PhysicalSlotNumber= 7
RootPort[7] CompletionTimeout= 0
RootPort[7] Aspm= 0
RootPort[7] L1Substates= 0
RootPort[7] LtrEnable= 1
RootPort[7] LtrConfigLock= 0
RootPort[7] LtrMaxSnoopLatency= 1003
RootPort[7] LtrMaxNoSnoopLatency= 1003
RootPort[7] SnoopLatencyOverrideMode= 2
RootPort[7] SnoopLatencyOverrideMultiplier= 2
RootPort[7] SnoopLatencyOverrideValue= 3C
RootPort[7] NonSnoopLatencyOverrideMode= 2
RootPort[7] NonSnoopLatencyOverrideMultiplier= 2
RootPort[7] NonSnoopLatencyOverrideValue= 3C
RootPort[7] ForceLtrOverride= 0
RootPort[7] DetectTimeoutMs= 0
RootPort[7] SlotPowerLimitScale= 0
RootPort[7] SlotPowerLimitValue= 0
RootPort[7] EnableCpm= 1
RootPort[7] FormFactor = 0
RootPort[8] HotPlug= 0
RootPort[8] PmSci= 1
RootPort[8] ClkReqDetect= 1
RootPort[8] MrlSensorPresent = 0
RootPort[8] UnsupportedRequestReport= 0
RootPort[8] FatalErrorReport= 0
RootPort[8] NoFatalErrorReport= 0
RootPort[8] CorrectableErrorReport= 0
RootPort[8] SystemErrorOnFatalError= 0
RootPort[8] SystemErrorOnNonFatalError= 0
RootPort[8] SystemErrorOnCorrectableError= 0
RootPort[8] MaxPayload= 1
RootPort[8] SlotImplemented= 1
RootPort[8] AcsEnabled= 1
RootPort[8] PtmEnabled= 1
RootPort[8] AdvancedErrorReporting= 1
RootPort[8] TransmitterHalfSwing= 0
RootPort[8] PcieSpeed= 0
RootPort[8] PhysicalSlotNumber= 8
RootPort[8] CompletionTimeout= 0
RootPort[8] Aspm= 0
RootPort[8] L1Substates= 0
RootPort[8] LtrEnable= 1
RootPort[8] LtrConfigLock= 0
RootPort[8] LtrMaxSnoopLatency= 1003
RootPort[8] LtrMaxNoSnoopLatency= 1003
RootPort[8] SnoopLatencyOverrideMode= 2
RootPort[8] SnoopLatencyOverrideMultiplier= 2
RootPort[8] SnoopLatencyOverrideValue= 3C
RootPort[8] NonSnoopLatencyOverrideMode= 2
RootPort[8] NonSnoopLatencyOverrideMultiplier= 2
RootPort[8] NonSnoopLatencyOverrideValue= 3C
RootPort[8] ForceLtrOverride= 0
RootPort[8] DetectTimeoutMs= 0
RootPort[8] SlotPowerLimitScale= 0
RootPort[8] SlotPowerLimitValue= 0
RootPort[8] EnableCpm= 1
RootPort[8] FormFactor = 0
RootPort[9] HotPlug= 0
RootPort[9] PmSci= 1
RootPort[9] ClkReqDetect= 1
RootPort[9] MrlSensorPresent = 0
RootPort[9] UnsupportedRequestReport= 0
RootPort[9] FatalErrorReport= 0
RootPort[9] NoFatalErrorReport= 0
RootPort[9] CorrectableErrorReport= 0
RootPort[9] SystemErrorOnFatalError= 0
RootPort[9] SystemErrorOnNonFatalError= 0
RootPort[9] SystemErrorOnCorrectableError= 0
RootPort[9] MaxPayload= 1
RootPort[9] SlotImplemented= 1
RootPort[9] AcsEnabled= 1
RootPort[9] PtmEnabled= 1
RootPort[9] AdvancedErrorReporting= 1
RootPort[9] TransmitterHalfSwing= 0
RootPort[9] PcieSpeed= 0
RootPort[9] PhysicalSlotNumber= 9
RootPort[9] CompletionTimeout= 0
RootPort[9] Aspm= 0
RootPort[9] L1Substates= 0
RootPort[9] LtrEnable= 1
RootPort[9] LtrConfigLock= 0
RootPort[9] LtrMaxSnoopLatency= 1003
RootPort[9] LtrMaxNoSnoopLatency= 1003
RootPort[9] SnoopLatencyOverrideMode= 2
RootPort[9] SnoopLatencyOverrideMultiplier= 2
RootPort[9] SnoopLatencyOverrideValue= 3C
RootPort[9] NonSnoopLatencyOverrideMode= 2
RootPort[9] NonSnoopLatencyOverrideMultiplier= 2
RootPort[9] NonSnoopLatencyOverrideValue= 3C
RootPort[9] ForceLtrOverride= 0
RootPort[9] DetectTimeoutMs= 0
RootPort[9] SlotPowerLimitScale= 0
RootPort[9] SlotPowerLimitValue= 0
RootPort[9] EnableCpm= 1
RootPort[9] FormFactor = 0
RootPort[10] HotPlug= 0
RootPort[10] PmSci= 1
RootPort[10] ClkReqDetect= 1
RootPort[10] MrlSensorPresent = 0
RootPort[10] UnsupportedRequestReport= 0
RootPort[10] FatalErrorReport= 0
RootPort[10] NoFatalErrorReport= 0
RootPort[10] CorrectableErrorReport= 0
RootPort[10] SystemErrorOnFatalError= 0
RootPort[10] SystemErrorOnNonFatalError= 0
RootPort[10] SystemErrorOnCorrectableError= 0
RootPort[10] MaxPayload= 1
RootPort[10] SlotImplemented= 1
RootPort[10] AcsEnabled= 1
RootPort[10] PtmEnabled= 1
RootPort[10] AdvancedErrorReporting= 1
RootPort[10] TransmitterHalfSwing= 0
RootPort[10] PcieSpeed= 0
RootPort[10] PhysicalSlotNumber= A
RootPort[10] CompletionTimeout= 0
RootPort[10] Aspm= 4
RootPort[10] L1Substates= 2
RootPort[10] LtrEnable= 1
RootPort[10] LtrConfigLock= 0
RootPort[10] LtrMaxSnoopLatency= 1003
RootPort[10] LtrMaxNoSnoopLatency= 1003
RootPort[10] SnoopLatencyOverrideMode= 2
RootPort[10] SnoopLatencyOverrideMultiplier= 2
RootPort[10] SnoopLatencyOverrideValue= 3C
RootPort[10] NonSnoopLatencyOverrideMode= 2
RootPort[10] NonSnoopLatencyOverrideMultiplier= 2
RootPort[10] NonSnoopLatencyOverrideValue= 3C
RootPort[10] ForceLtrOverride= 0
RootPort[10] DetectTimeoutMs= 0
RootPort[10] SlotPowerLimitScale= 0
RootPort[10] SlotPowerLimitValue= 0
RootPort[10] EnableCpm= 1
RootPort[10] FormFactor = 0
RootPort[11] HotPlug= 0
RootPort[11] PmSci= 1
RootPort[11] ClkReqDetect= 1
RootPort[11] MrlSensorPresent = 0
RootPort[11] UnsupportedRequestReport= 0
RootPort[11] FatalErrorReport= 0
RootPort[11] NoFatalErrorReport= 0
RootPort[11] CorrectableErrorReport= 0
RootPort[11] SystemErrorOnFatalError= 0
RootPort[11] SystemErrorOnNonFatalError= 0
RootPort[11] SystemErrorOnCorrectableError= 0
RootPort[11] MaxPayload= 1
RootPort[11] SlotImplemented= 1
RootPort[11] AcsEnabled= 1
RootPort[11] PtmEnabled= 1
RootPort[11] AdvancedErrorReporting= 1
RootPort[11] TransmitterHalfSwing= 0
RootPort[11] PcieSpeed= 0
RootPort[11] PhysicalSlotNumber= B
RootPort[11] CompletionTimeout= 0
RootPort[11] Aspm= 4
RootPort[11] L1Substates= 2
RootPort[11] LtrEnable= 1
RootPort[11] LtrConfigLock= 0
RootPort[11] LtrMaxSnoopLatency= 1003
RootPort[11] LtrMaxNoSnoopLatency= 1003
RootPort[11] SnoopLatencyOverrideMode= 2
RootPort[11] SnoopLatencyOverrideMultiplier= 2
RootPort[11] SnoopLatencyOverrideValue= 3C
RootPort[11] NonSnoopLatencyOverrideMode= 2
RootPort[11] NonSnoopLatencyOverrideMultiplier= 2
RootPort[11] NonSnoopLatencyOverrideValue= 3C
RootPort[11] ForceLtrOverride= 0
RootPort[11] DetectTimeoutMs= 0
RootPort[11] SlotPowerLimitScale= 0
RootPort[11] SlotPowerLimitValue= 0
RootPort[11] EnableCpm= 1
RootPort[11] FormFactor = 0
OverrideEqualizationDefaults: 0
PcieLinkEqMethod: 0
PcieLinkEqMode: 0
Ph1DownstreamPortTransmitterPreset: 0
Ph1UpstreamPortTransmitterPreset: 0
Ph3NumberOfPresetsOrCoefficients: 0
Phase 3 Coefficient 0, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 1, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 2, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 3, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 4, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 5, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 6, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 7, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 8, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 9, pre-cursor = 0, post-cursor = 0
Phase 3 Preset 0 = 0
Phase 3 Preset 1 = 0
Phase 3 Preset 2 = 0
Phase 3 Preset 3 = 0
Phase 3 Preset 4 = 0
Phase 3 Preset 5 = 0
Phase 3 Preset 6 = 0
Phase 3 Preset 7 = 0
Phase 3 Preset 8 = 0
Phase 3 Preset 9 = 0
Phase 3 Preset 10 = 0
LocalTransmitterOverrideEnable = 0
Ph2LocalTransmitterOverridePreset = 0
EnablePort8xhDecode= 0
PchPciePort8xhDecodePortIndex= 0
EnablePeerMemoryWrite= 0
ComplianceTestMode= 0
RpFunctionSwap= 1
--------------------- RST Config ------------------------
Raid0= 1
Raid1= 1
Raid10= 1
Raid5= 1
Irrt= 1
OromUiBanner= 1
OromUiDelay= 0
HddUnlock= 1
LedLocate= 1
IrrtOnly= 1
SmartStorage= 1
LegacyOrom= 0
OptaneMemory= 1
CpuAttachedStorage= 1
RstPcieStorageRemap[0].Enable = 0
RstPcieStorageRemap[0].RstPcieStoragePort = 0
RstPcieStorageRemap[0].DeviceResetDelay = 64
RstPcieStorageRemap[1].Enable = 0
RstPcieStorageRemap[1].RstPcieStoragePort = 0
RstPcieStorageRemap[1].DeviceResetDelay = 64
RstPcieStorageRemap[2].Enable = 0
RstPcieStorageRemap[2].RstPcieStoragePort = 0
RstPcieStorageRemap[2].DeviceResetDelay = 64
------------------ PCH Lock Down Config ------------------
GlobalSmi= 1
BiosInterface= 1
BiosLock= 0
UnlockGpioPads= 0
------------------ PCH Flash Protection Config ------------------
WriteProtectionEnable[0] = 1
ReadProtectionEnable[0] = 0
ProtectedRangeLimit[0] = 160F
ProtectedRangeBase[0] = 1530
WriteProtectionEnable[1] = 1
ReadProtectionEnable[1] = 0
ProtectedRangeLimit[1] = 1FFF
ProtectedRangeBase[1] = 1650
WriteProtectionEnable[2] = 0
ReadProtectionEnable[2] = 0
ProtectedRangeLimit[2] = 0
ProtectedRangeBase[2] = 0
WriteProtectionEnable[3] = 0
ReadProtectionEnable[3] = 0
ProtectedRangeLimit[3] = 0
ProtectedRangeBase[3] = 0
WriteProtectionEnable[4] = 0
ReadProtectionEnable[4] = 0
ProtectedRangeLimit[4] = 0
ProtectedRangeBase[4] = 0
------------------ PCH HSIO Config ------------------
ChipsetInit Binary Pointer = 0
ChipsetInit Binary Length = 0
------------------ PCH FIVR Config ------------------
ExtV1p05Rail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = 64
ExtVnnRail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = C8
ExtVnnRailSx:
EnabledStates = 0
Voltage = 1A4
IccMax = C8
VccinAux:
LowToHighCurModeVolTranTime = C
RetToHighCurModeVolTranTime = 36
RetToLowCurModeVolTranTime = 2B
OffToHighCurModeVolTranTime = 96
FivrDynPm = 1
------------------------ PCH Print Platform Protocol End --------------------------
------------------ Rtc Config ------------------
BiosInterfaceLock = 1
MemoryLock = 1
------------------ PCH Thermal Config ------------------
TTLevels T0Level 0 centigrade degree
TTLevels T1Level 0 centigrade degree
TTLevels T2Level 0 centigrade degree
TTLevels TTEnable 0
TTLevels TTState13Enable 0
TTLevels TTLock 0
TTLevels SuggestedSetting 1
TTLevels PchCrossThrottling 1
DmiHaAWC DmiTsawEn 0
DmiHaAWC TS0TW 3
DmiHaAWC TS1TW 2
DmiHaAWC TS2TW 1
DmiHaAWC TS3TW 0
DmiHaAWC SuggestedSetting 1
MemoryThrottling Enable= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
PchHotEnable = 0
PchHotLevel = 73
------------------ CNVi Config ------------------
CNVi Mode = 1
BT Core = 1
BT Audio Offload = 0
Pin Muxing:
RF_RESET# = No muxing
CLKREQ = No muxing
------------------ eSPI Config ------------------
LGMR Enable 1
Host C10 Report Enable 0
BME for Master and Slave Enabled 1
Lock Link Configuration 1
Espi Pm HAE 1
------------------ GBE Config ------------------
Enable= 1
LtrEnable= 1
------------------ Tsn Config ------------------
TSN 0 Enable= 0
Tsn0MacAddressHigh = 0
Tsn0MacAddressLow = 0
TsnMultiVcEnable = 0
TsnLinkSpeed= 3
------------------ HDA Config ------------------
Pme = 0
Codec Sx Wake Capability = 0
HD-A Link Frequency = 2
VerbTableEntryNum = 6
VerbTablePtr = 76A02050
------------------ Ieh Config ------------------------
Mode: 0x1
------------------ ISH Config ------------------
SPI0 Enable = 0
SPI0 Cs#0 Enable = 0
Pin muxing:
Mosi = No muxing
Miso = No muxing
Clk = No muxing
Cs#0 = No muxing
Pad termination:
Mosi = GpioTermDefault
Miso = GpioTermDefault
Clk = GpioTermDefault
Cs#0 = GpioTermDefault
UART0 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
UART1 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
I2C0 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C1 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C2 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
GP_0 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_1 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_2 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_3 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_4 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_5 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_6 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_7 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
------------------ Interrupt Config ------------------
Interrupt assignment:
Dxx:Fx INTx IRQ
D31:F3 1 016
D31:F4 1 016
D31:F7 1 016
D30:F0 1 016
D30:F1 2 017
D30:F2 3 036
D30:F3 4 037
D28:F0 1 016
D28:F1 2 017
D28:F2 3 018
D28:F3 4 019
D25:F2 3 033
D23:F0 1 016
D22:F0 1 016
D22:F1 2 017
D22:F4 1 016
D22:F5 4 019
D21:F0 1 027
D21:F1 2 040
D21:F2 3 029
D21:F3 4 030
D20:F0 1 016
D20:F1 2 017
D20:F3 1 016
D19:F0 1 043
D18:F0 1 016
D18:F6 2 034
D17:F0 1 035
D17:F1 2 020
D17:F2 3 021
D17:F3 4 042
D16:F0 3 018
D16:F1 4 019
D16:F6 1 023
D16:F7 2 022
D31:F6 1 016
D30:F4 1 016
D29:F0 1 016
D29:F1 2 017
D29:F2 3 018
D29:F3 4 019
D28:F4 1 016
D28:F5 2 017
D28:F6 3 018
D28:F7 4 019
D25:F0 1 031
D25:F1 2 032
D22:F2 3 018
D22:F3 4 019
D19:F1 2 024
D19:F2 3 025
D19:F3 4 038
Other interrupt configuration:
GpioIrqRoute= 14
SciIrqSelect= 9
TcoIrqEnable= 0
TcoIrqSelect= 9
------------------ IOAPIC Config ------------------
IoApicEntry24_119= 1
Enable8254ClockGating= 1
Enable8254ClockGatingOnS3= 1
IoApicId= 2
------------------ P2SB Config ------------------
SbAccessUnlock= 0
------------------ DMI Config ------------------
PwrOptEnable= 0
DmiAspmCtrl = 4
CwbEnable= 1
DmiPowerReduction= 1
OpioRecenter= 1
------------------ PCH PM Config ------------------
WakeConfig PmeB0S5Dis = 0
WakeConfig WolEnableOverride = 1
WakeConfig LanWakeFromDeepSx = 1
WakeConfig PcieWakeFromDeepSx = 0
WakeConfig WoWlanEnable = 0
WakeConfig WoWlanDeepSxEnable = 0
PchDeepSxPol = 0
PchSlpS3MinAssert = 3
PchSlpS4MinAssert = 1
PchSlpSusMinAssert = 4
PchSlpAMinAssert = 4
SlpStrchSusUp = 0
SlpLanLowDc = 1
PwrBtnOverridePeriod = 0
DisableEnergyReport = 0
DisableDsxAcPresentPulldown = 0
PchPwrCycDur = 0
PciePllSsc = FF
DisableNativePowerButton = 0
MeWakeSts = 1
WolOvrWkSts = 1
EnableTcoTimer = 1
VrAlert = 0
PowerButtonDebounce = 0
PsOnEnable = 0
CpuC10GatePinEnable = 1
PmcDbgMsgEn = 0
ModPhySusPgEnable = 1
Usb2PhySusPgEnable = 1
OsIdleEnable = 1
V1p05PhyExtFetControlEn = 0
V1p05IsExtFetControlEn = 0
LpmS0ixSubStateEnable = FF
S0ixAutoDemotion = 1
LatchEventsC10Exit = 0
EnableTimedGpio0 = 0
EnableTimedGpio1 = 0
GlobalResetMasksOverride = 0
GlobalResetTriggerMask = 0
GlobalResetEventMask = 0
--------------- SATA Config for controller 0 -----------
Enable= 1
SataMode= 0
PortSettings[0] Enabled= 1
PortSettings[0] HotPlug= 0
PortSettings[0] InterlockSw= 0
PortSettings[0] External= 0
PortSettings[0] SpinUp= 0
PortSettings[0] SolidStateDrive= 0
PortSettings[0] DevSlp= 0
PortSettings[0] DevSlpResetConfig= 1
PortSettings[0] EnableDitoConfig= 0
PortSettings[0] DmVal= 0
PortSettings[0] DitoVal= 0
PortSettings[0] ZpOdd= 0
PortSettings[1] Enabled= 1
PortSettings[1] HotPlug= 0
PortSettings[1] InterlockSw= 0
PortSettings[1] External= 0
PortSettings[1] SpinUp= 0
PortSettings[1] SolidStateDrive= 0
PortSettings[1] DevSlp= 0
PortSettings[1] DevSlpResetConfig= 1
PortSettings[1] EnableDitoConfig= 0
PortSettings[1] DmVal= 0
PortSettings[1] DitoVal= 0
PortSettings[1] ZpOdd= 0
SpeedSupport= 0
EsataSpeedLimit= 0
LedEnable= 0
TestMode= 0
SalpSupport= 1
PwrOptEnable= 0
RaidDeviceId= 0
SataRstInterrupt = 0
ThermalThrottling P0T1M 1
ThermalThrottling P0T2M 2
ThermalThrottling P0T3M 3
ThermalThrottling P0TDisp 0
ThermalThrottling P0Tinact 0
ThermalThrottling P0TDispFinit 0
ThermalThrottling P1T1M 1
ThermalThrottling P1T2M 2
ThermalThrottling P1T3M 3
ThermalThrottling P1TDisp 0
ThermalThrottling P1Tinact 0
ThermalThrottling P1TDispFinit 0
ThermalThrottling SuggestedSetting 1
------------------ USB Config ------------------
PdoProgramming = 1
OverCurrentEnable = 1
XhciOcLock = 1
LtrModeEnable = 1
HsiiEnable = 0
PortUsb20[0].Enabled = 1
PortUsb20[0].OverCurrentPin = OC0
PortUsb20[0].PortResetMessageEnable = 0
PortUsb20[1].Enabled = 1
PortUsb20[1].OverCurrentPin = OC255
PortUsb20[1].PortResetMessageEnable = 0
PortUsb20[2].Enabled = 1
PortUsb20[2].OverCurrentPin = OC255
PortUsb20[2].PortResetMessageEnable = 0
PortUsb20[3].Enabled = 1
PortUsb20[3].OverCurrentPin = OC0
PortUsb20[3].PortResetMessageEnable = 0
PortUsb20[4].Enabled = 1
PortUsb20[4].OverCurrentPin = OC0
PortUsb20[4].PortResetMessageEnable = 0
PortUsb20[5].Enabled = 1
PortUsb20[5].OverCurrentPin = OC3
PortUsb20[5].PortResetMessageEnable = 0
PortUsb20[6].Enabled = 1
PortUsb20[6].OverCurrentPin = OC3
PortUsb20[6].PortResetMessageEnable = 0
PortUsb20[7].Enabled = 1
PortUsb20[7].OverCurrentPin = OC0
PortUsb20[7].PortResetMessageEnable = 0
PortUsb20[8].Enabled = 0
PortUsb20[8].OverCurrentPin = OC3
PortUsb20[8].PortResetMessageEnable = 0
PortUsb20[9].Enabled = 1
PortUsb20[9].OverCurrentPin = OC3
PortUsb20[9].PortResetMessageEnable = 0
PortUsb30[0] Enabled = 1
PortUsb30[0].OverCurrentPin = OC0
PortUsb30[1] Enabled = 1
PortUsb30[1].OverCurrentPin = OC0
PortUsb30[2] Enabled = 1
PortUsb30[2].OverCurrentPin = OC255
PortUsb30[3] Enabled = 1
PortUsb30[3].OverCurrentPin = OC255
LtrOverrideEnable = 0
XdciConfig.Enable= 1
USB3LinkSpeed = 0
------------------ USB2 PHY Config ------------------
Port[0].Petxiset = 6
Port[0].Txiset = 0
Port[0].Predeemp = 3
Port[0].Pehalfbit = 0
Port[1].Petxiset = 6
Port[1].Txiset = 0
Port[1].Predeemp = 3
Port[1].Pehalfbit = 0
Port[2].Petxiset = 6
Port[2].Txiset = 0
Port[2].Predeemp = 3
Port[2].Pehalfbit = 0
Port[3].Petxiset = 6
Port[3].Txiset = 0
Port[3].Predeemp = 3
Port[3].Pehalfbit = 0
Port[4].Petxiset = 6
Port[4].Txiset = 0
Port[4].Predeemp = 3
Port[4].Pehalfbit = 0
Port[5].Petxiset = 6
Port[5].Txiset = 0
Port[5].Predeemp = 3
Port[5].Pehalfbit = 0
Port[6].Petxiset = 6
Port[6].Txiset = 0
Port[6].Predeemp = 3
Port[6].Pehalfbit = 0
Port[7].Petxiset = 6
Port[7].Txiset = 0
Port[7].Predeemp = 3
Port[7].Pehalfbit = 0
Port[8].Petxiset = 6
Port[8].Txiset = 0
Port[8].Predeemp = 3
Port[8].Pehalfbit = 0
Port[9].Petxiset = 6
Port[9].Txiset = 0
Port[9].Predeemp = 3
Port[9].Pehalfbit = 0
------------------ USB3 HSIO Config ------------------
Port[0].HsioTxDeEmphEnable = 0
Port[0].HsioTxDeEmph = 0
Port[0].HsioTxDownscaleAmpEnable = 0
Port[0].HsioTxDownscaleAmp = 0
Port[0].HsioCtrlAdaptOffsetCfgEnable = 0
Port[0].HsioCtrlAdaptOffsetCfg = 0
Port[0].HsioFilterSelNEnable = 0
Port[0].HsioFilterSelN = 0
Port[0].HsioFilterSelPEnable = 0
Port[0].HsioFilterSelP = 0
Port[0].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[0].HsioOlfpsCfgPullUpDwnRes = 3
Port[0].HsioTxRate0UniqTranEnable = 0
Port[0].HsioTxRate0UniqTran = 4C
Port[0].HsioTxRate1UniqTranEnable = 0
Port[0].HsioTxRate1UniqTran = 4C
Port[0].HsioTxRate2UniqTranEnable = 0
Port[0].HsioTxRate2UniqTran = 4C
Port[0].HsioTxRate3UniqTranEnable = 0
Port[0].HsioTxRate3UniqTran = 4C
Port[1].HsioTxDeEmphEnable = 0
Port[1].HsioTxDeEmph = 0
Port[1].HsioTxDownscaleAmpEnable = 0
Port[1].HsioTxDownscaleAmp = 0
Port[1].HsioCtrlAdaptOffsetCfgEnable = 0
Port[1].HsioCtrlAdaptOffsetCfg = 0
Port[1].HsioFilterSelNEnable = 0
Port[1].HsioFilterSelN = 0
Port[1].HsioFilterSelPEnable = 0
Port[1].HsioFilterSelP = 0
Port[1].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[1].HsioOlfpsCfgPullUpDwnRes = 3
Port[1].HsioTxRate0UniqTranEnable = 0
Port[1].HsioTxRate0UniqTran = 4C
Port[1].HsioTxRate1UniqTranEnable = 0
Port[1].HsioTxRate1UniqTran = 4C
Port[1].HsioTxRate2UniqTranEnable = 0
Port[1].HsioTxRate2UniqTran = 4C
Port[1].HsioTxRate3UniqTranEnable = 0
Port[1].HsioTxRate3UniqTran = 4C
Port[2].HsioTxDeEmphEnable = 0
Port[2].HsioTxDeEmph = 0
Port[2].HsioTxDownscaleAmpEnable = 0
Port[2].HsioTxDownscaleAmp = 0
Port[2].HsioCtrlAdaptOffsetCfgEnable = 0
Port[2].HsioCtrlAdaptOffsetCfg = 0
Port[2].HsioFilterSelNEnable = 0
Port[2].HsioFilterSelN = 0
Port[2].HsioFilterSelPEnable = 0
Port[2].HsioFilterSelP = 0
Port[2].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[2].HsioOlfpsCfgPullUpDwnRes = 3
Port[2].HsioTxRate0UniqTranEnable = 0
Port[2].HsioTxRate0UniqTran = 4C
Port[2].HsioTxRate1UniqTranEnable = 0
Port[2].HsioTxRate1UniqTran = 4C
Port[2].HsioTxRate2UniqTranEnable = 0
Port[2].HsioTxRate2UniqTran = 4C
Port[2].HsioTxRate3UniqTranEnable = 0
Port[2].HsioTxRate3UniqTran = 4C
Port[3].HsioTxDeEmphEnable = 0
Port[3].HsioTxDeEmph = 0
Port[3].HsioTxDownscaleAmpEnable = 0
Port[3].HsioTxDownscaleAmp = 0
Port[3].HsioCtrlAdaptOffsetCfgEnable = 0
Port[3].HsioCtrlAdaptOffsetCfg = 0
Port[3].HsioFilterSelNEnable = 0
Port[3].HsioFilterSelN = 0
Port[3].HsioFilterSelPEnable = 0
Port[3].HsioFilterSelP = 0
Port[3].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[3].HsioOlfpsCfgPullUpDwnRes = 3
Port[3].HsioTxRate0UniqTranEnable = 0
Port[3].HsioTxRate0UniqTran = 4C
Port[3].HsioTxRate1UniqTranEnable = 0
Port[3].HsioTxRate1UniqTran = 4C
Port[3].HsioTxRate2UniqTranEnable = 0
Port[3].HsioTxRate2UniqTran = 4C
Port[3].HsioTxRate3UniqTranEnable = 0
Port[3].HsioTxRate3UniqTran = 4C
------------------ PCH Thc Config ------------------------
THC ports:
PORT0 Assignment: 0x0
PORT0 Interrupt Pin Muxing: No muxing
PORT1 Assignment: 0x0
PORT1 Interrupt Pin Muxing: No muxing
------------------ Psf Config ------------------------
TccEnable: 0x0
------------------ Fusa Config ------------------------
DisplayFusaConfigEnable: 0x1
GraphicFusaConfigEnable: 0x1
OpioFusaConfigEnable: 0x1
PsfFusaConfigEnable: 0x1
------------------ Hybrid Storage Config ------------------
Hybrid Storage Mode = 0
------------------ TCC Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Crl Bin - Base Address = 0x0
Crl Bin - Size = 0x0
Ifu Enabled = 0
------------------ SPI Config ------------------------
ExtendedBiosDecodeRangeEnable: 0x0
ExtendedBiosDecodeRangeBase: 0x0
ExtendedBiosDecodeRangeLimit: 0xFFFF
---------------------- AmtPolicyPpi Print Begin -----------------
Revision : 0x1
------------------------ AMT_PEI_CONFIG -----------------
Revision : 0x1
AmtEnabled : 0x1
WatchDogEnabled : 0x0
FwProgress : 0x0
WatchDogTimerOs : 0x0
WatchDogTimerBios : 0x0
ManageabilityMode : 0x0
AmtSolEnabled : 0x0
RemoteAssistance : 0x0
AmtKvmEnabled : 0x0
ForcMebxSyncUp : 0x0
---------------------- AmtPolicyPpi Print End -------------------
---------------------- Me Config Block Print Begin -----------------
------------------------ ME_PEI_CONFIG -----------------
Revision : 0x3
MctpBroadcastCycle : 0x0
EndOfPostMessage : 0x2
DisableD0I3SettingForHeci : 0x0
EnforceEDebugMode : 0x0
MeUnconfigOnRtcClear : 0x1
---------------------- Me Config Block Print End -------------------
------------------------ SA Policy (PEI) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_CONFIG ------------------------
Revision : 1
------------------------ GRAPHICS_PEI_CONFIG -----------------
Revision : 7
RenderStandby : 0x1
PmSupport : 0x1
PavpEnable : 0x1
CdClock : 0xFF
SkipCdClockInit : 0x0
PeiGraphicsPeimInit : 0x1
LogoPtr : 0x0
LogoSize : 0x0
BltBufferAdress : 0x0
BltBufferSize : 0x0
GraphicsConfigPtr : 0x76A5B91C
CdynmaxClampEnable : 0x0
GtFreqMax : 0xFF
DisableTurboGt : 0x0
------------------------ GRAPHICS_PEI_CONFIG Print END -----------------
------------------------ GNA_CONFIG -----------------
Revision : 1
------------------------ GNA_CONFIG Print END -----------------
----------------------- VMD_PEI_CONFIG -----------------
Revision : 4
VMD Enable : 0
VMD Global Mapping : 0
VMD VmdCfgBarSize : 0
VMD VmdMemBarSize1 : 0
VMD VmdMemBarSize2 : 0
VMD VmdCfgBarAttr : 0
VMD VmdMemBar1Attr : 0
VMD VmdMemBar2Attr : 0
VMD VmdCfgBarBase : 0xA0000000
VMD VmdMemBar1Base : 0xA2000000
VMD VmdMemBar2Base : 0xA4000000
Vmd OS Variable details
VMD Request Entry Count is 26
Storage device B/D/F or RpIndex/D/F is 90/26/2
Storage device B/D/F or RpIndex/D/F is 4/5/0
Storage device B/D/F or RpIndex/D/F is 6/7/0
Storage device B/D/F or RpIndex/D/F is 8/9/0
Storage device B/D/F or RpIndex/D/F is 10/11/0
Storage device B/D/F or RpIndex/D/F is 12/13/0
Storage device B/D/F or RpIndex/D/F is 14/15/0
Storage device B/D/F or RpIndex/D/F is 16/17/0
Storage device B/D/F or RpIndex/D/F is 18/19/0
Storage device B/D/F or RpIndex/D/F is 20/21/0
Storage device B/D/F or RpIndex/D/F is 22/23/0
Storage device B/D/F or RpIndex/D/F is 24/25/0
Storage device B/D/F or RpIndex/D/F is 26/27/0
Storage device B/D/F or RpIndex/D/F is 28/29/0
Storage device B/D/F or RpIndex/D/F is 30/31/0
Storage device B/D/F or RpIndex/D/F is 32/1/1
Storage device B/D/F or RpIndex/D/F is 34/3/1
Storage device B/D/F or RpIndex/D/F is 36/5/1
Storage device B/D/F or RpIndex/D/F is 38/7/1
Storage device B/D/F or RpIndex/D/F is 40/9/1
Storage device B/D/F or RpIndex/D/F is 42/11/1
Storage device B/D/F or RpIndex/D/F is 44/13/1
Storage device B/D/F or RpIndex/D/F is 46/15/1
Storage device B/D/F or RpIndex/D/F is 48/17/1
Storage device B/D/F or RpIndex/D/F is 50/19/1
Storage device B/D/F or RpIndex/D/F is 52/21/1
-------------------- VMD_CONFIG Print END -----------------
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge Pei Config ------------------
Revision : 1
Device4Enable : 0x0
SkipPamLock : 0x0
EdramTestMode : 0x2
------------------ Serial IO Config ------------------
SPI[0].Mode = 0
SPI[0].DefaultCsOutput = 0
SPI[0].CsMode = 0
SPI[0].CsState = 0
SPI[0].CsEnable[0] = 1
SPI[0].CsPolarity[0] = 1
SPI[0].CsEnable[1] = 0
SPI[0].CsPolarity[1] = 1
SPI[1].Mode = 1
SPI[1].DefaultCsOutput = 0
SPI[1].CsMode = 0
SPI[1].CsState = 0
SPI[1].CsEnable[0] = 1
SPI[1].CsPolarity[0] = 1
SPI[1].CsEnable[1] = 0
SPI[1].CsPolarity[1] = 1
SPI[2].Mode = 0
SPI[2].DefaultCsOutput = 0
SPI[2].CsMode = 0
SPI[2].CsState = 0
SPI[2].CsEnable[0] = 1
SPI[2].CsPolarity[0] = 1
SPI[2].CsEnable[1] = 0
SPI[2].CsPolarity[1] = 1
SPI[3].Mode = 0
SPI[3].DefaultCsOutput = 0
SPI[3].CsMode = 0
SPI[3].CsState = 0
SPI[3].CsEnable[0] = 1
SPI[3].CsPolarity[0] = 1
SPI[3].CsEnable[1] = 0
SPI[3].CsPolarity[1] = 1
SPI[4].Mode = 0
SPI[4].DefaultCsOutput = 0
SPI[4].CsMode = 0
SPI[4].CsState = 0
SPI[4].CsEnable[0] = 1
SPI[4].CsPolarity[0] = 1
SPI[4].CsEnable[1] = 0
SPI[4].CsPolarity[1] = 1
SPI[5].Mode = 0
SPI[5].DefaultCsOutput = 0
SPI[5].CsMode = 0
SPI[5].CsState = 0
SPI[5].CsEnable[0] = 1
SPI[5].CsPolarity[0] = 1
SPI[5].CsEnable[1] = 0
SPI[5].CsPolarity[1] = 1
SPI[6].Mode = 0
SPI[6].DefaultCsOutput = 0
SPI[6].CsMode = 0
SPI[6].CsState = 0
SPI[6].CsEnable[0] = 1
SPI[6].CsPolarity[0] = 1
SPI[6].CsEnable[1] = 0
SPI[6].CsPolarity[1] = 1
UART[0].Mode = 4
UART[0].Attributes.BaudRate = 115200
UART[0].Attributes.Parity = 1
UART[0].Attributes.DataBits = 8
UART[0].Attributes.StopBits = 1
UART[0].Attributes.AutoFlow = 1
UART[0].PinMux.Rx = 0x190B0208
UART[0].PinMux.Tx = 0x190B1209
UART[0].PinMux.Rts = 0x190B220A
UART[0].PinMux.Cts = 0x190B320B
UART[0].DBG2 = 0
UART[0].PowerGating = 2
UART[0].DmaEnable = 1
UART[1].Mode = 0
UART[1].Attributes.BaudRate = 115200
UART[1].Attributes.Parity = 1
UART[1].Attributes.DataBits = 8
UART[1].Attributes.StopBits = 1
UART[1].Attributes.AutoFlow = 1
UART[1].PinMux.Rx = 0x0
UART[1].PinMux.Tx = 0x0
UART[1].PinMux.Rts = 0x0
UART[1].PinMux.Cts = 0x0
UART[1].DBG2 = 0
UART[1].PowerGating = 2
UART[1].DmaEnable = 1
UART[2].Mode = 2
UART[2].Attributes.BaudRate = 115200
UART[2].Attributes.Parity = 1
UART[2].Attributes.DataBits = 8
UART[2].Attributes.StopBits = 1
UART[2].Attributes.AutoFlow = 0
UART[2].PinMux.Rx = 0x0
UART[2].PinMux.Tx = 0x0
UART[2].PinMux.Rts = 0x0
UART[2].PinMux.Cts = 0x0
UART[2].DBG2 = 0
UART[2].PowerGating = 2
UART[2].DmaEnable = 0
UART[3].Mode = 0
UART[3].Attributes.BaudRate = 115200
UART[3].Attributes.Parity = 1
UART[3].Attributes.DataBits = 8
UART[3].Attributes.StopBits = 1
UART[3].Attributes.AutoFlow = 1
UART[3].PinMux.Rx = 0x0
UART[3].PinMux.Tx = 0x0
UART[3].PinMux.Rts = 0x0
UART[3].PinMux.Cts = 0x0
UART[3].DBG2 = 0
UART[3].PowerGating = 2
UART[3].DmaEnable = 1
UART[4].Mode = 0
UART[4].Attributes.BaudRate = 115200
UART[4].Attributes.Parity = 1
UART[4].Attributes.DataBits = 8
UART[4].Attributes.StopBits = 1
UART[4].Attributes.AutoFlow = 1
UART[4].PinMux.Rx = 0x0
UART[4].PinMux.Tx = 0x0
UART[4].PinMux.Rts = 0x0
UART[4].PinMux.Cts = 0x0
UART[4].DBG2 = 0
UART[4].PowerGating = 2
UART[4].DmaEnable = 1
UART[5].Mode = 0
UART[5].Attributes.BaudRate = 115200
UART[5].Attributes.Parity = 1
UART[5].Attributes.DataBits = 8
UART[5].Attributes.StopBits = 1
UART[5].Attributes.AutoFlow = 0
UART[5].PinMux.Rx = 0x0
UART[5].PinMux.Tx = 0x0
UART[5].PinMux.Rts = 0x0
UART[5].PinMux.Cts = 0x0
UART[5].DBG2 = 0
UART[5].PowerGating = 2
UART[5].DmaEnable = 0
UART[6].Mode = 0
UART[6].Attributes.BaudRate = 115200
UART[6].Attributes.Parity = 1
UART[6].Attributes.DataBits = 8
UART[6].Attributes.StopBits = 1
UART[6].Attributes.AutoFlow = 0
UART[6].PinMux.Rx = 0x0
UART[6].PinMux.Tx = 0x0
UART[6].PinMux.Rts = 0x0
UART[6].PinMux.Cts = 0x0
UART[6].DBG2 = 0
UART[6].PowerGating = 2
UART[6].DmaEnable = 0
I2C[0].Mode = 1
I2C[0].PinMux.Sda = 0x0
I2C[0].PinMux.Scl = 0x0
I2C[0].PadTermination = 0
I2C[1].Mode = 1
I2C[1].PinMux.Sda = 0x0
I2C[1].PinMux.Scl = 0x0
I2C[1].PadTermination = 0
I2C[2].Mode = 0
I2C[2].PinMux.Sda = 0x0
I2C[2].PinMux.Scl = 0x0
I2C[2].PadTermination = 0
I2C[3].Mode = 0
I2C[3].PinMux.Sda = 0x0
I2C[3].PinMux.Scl = 0x0
I2C[3].PadTermination = 0
I2C[4].Mode = 0
I2C[4].PinMux.Sda = 0x0
I2C[4].PinMux.Scl = 0x0
I2C[4].PadTermination = 0
I2C[5].Mode = 0
I2C[5].PinMux.Sda = 0x0
I2C[5].PinMux.Scl = 0x0
I2C[5].PadTermination = 0
I2C[6].Mode = 0
I2C[6].PinMux.Sda = 0x0
I2C[6].PinMux.Scl = 0x0
I2C[6].PadTermination = 0
I2C[7].Mode = 0
I2C[7].PinMux.Sda = 0x0
I2C[7].PinMux.Scl = 0x0
I2C[7].PadTermination = 0
------------------------ SiCpuPolicy Print Begin in PostMem-----------------
Revision= 1
------------------ CPU Config ------------------
CPU_CONFIG : AesEnable : 0x1
CPU_CONFIG : TxtEnable : 0x0
CPU_CONFIG : MicrocodePatchAddress : 0xFFC15000
CPU_CONFIG : PpinSupport : 0x0
CPU_CONFIG : AvxDisable : 0x0
CPU_CONFIG : Avx3Disable : 0x0
CPU_CONFIG : RaceConditionResponse : 0x0
CPU_CONFIG : AcSplitLock : 0x0
CPU_CONFIG : SmbiosType4MaxSpeedOverride : 0
------------------ CPU BIOS Guard Config ------------------
BIOS_GUARD_CONFIG:: EcCmdProvisionEav : 0xFF
BIOS_GUARD_CONFIG:: EcCmdLock : 0xFF
BIOS_GUARD_CONFIG:: BiosGuardModulePtr : 0xFFFFFFFFFFFFFFFF
BIOS_GUARD_CONFIG:: Platform attributes : 0xFFFFFFFF
BIOS_GUARD_CONFIG:: SendEcCmd : 0xFFFFFFFF
------------------ CPU Power Mgmt Basic Config ------------------
CPU_POWER_MGMT_BASIC_CONFIG : OneCoreRatioLimit : 0x0 , TwoCoreRatioLimit = 0x0 , ThreeCoreRatioLimit = 0x0 , FourCoreRatioLimit = 0x0, FiveCoreRatioLimit = 0x0, SixCoreRatioLimit = 0x0, SevenCoreRatioLimit = 0x0, EightCoreRatioLimit = 0x0
CPU_POWER_MGMT_BASIC_CONFIG: Hwp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: SkipSetBootPState : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HdcControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: (Intel Turbo Boost Max Technology 3.0)EnableItbm : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2 : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TurboPowerLimitLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3DutyCycle : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetClamp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TurboMode : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccActivationOffset : 0xA
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2Power : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetTimeWindowForRatl : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HwpInterruptControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnablePerCorePState : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoPerCorePstate : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoEppGrouping : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableEpbPeciOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: EnableFastMsrHwpReq : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: MinRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: MaxRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: ApplyConfigTdp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionMs : 0x1E
------------------ CPU Power Mgmt Custom Config ------------------
CustomRatioTable...
CPU_POWER_MGMT_CUSTOM_CONFIG: VidNumber : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: VidCpuid : 0x6C1
CPU_POWER_MGMT_CUSTOM_CONFIG: VidMaxRatio : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[16] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[17] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[18] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[19] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[20] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[21] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[22] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[23] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[24] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[25] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[26] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[27] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[28] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[29] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[30] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[31] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[32] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[33] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[34] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[35] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[36] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[37] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[38] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[39] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpLock : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpBios : 0x0
------------------ CPU Power Mgmt Psys Config ------------------
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPmax : 0xAC
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1 : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Time : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2 : 0x0
------------------ CPU Test Config ------------------
CPU_TEST_CONFIG: MlcStreamerPrefetcher : 0x1
CPU_TEST_CONFIG: MlcSpatialPrefetcher : 0x1
CPU_TEST_CONFIG: MonitorMwaitEnable : 0x1
CPU_TEST_CONFIG: MachineCheckEnable : 0x1
CPU_TEST_CONFIG: ProcessorTraceOutputScheme : 0x0
CPU_TEST_CONFIG: ProcessorTraceEnable : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemBase : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemLength : 0x0
CPU_TEST_CONFIG: ThreeStrikeCounterDisable : 0x0
CPU_TEST_CONFIG: PcdCpuApLoopMode: 0x2
------------------ CPU PID Test Config ------------------
CPU_PID_TEST_CONFIG : PidTuning : 0x0
------------------ CPU Power Mgmt Test Config ------------------
CPU_POWER_MGMT_TEST_CONFIG: Eist : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientPState : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientTurbo : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TStates : 0x1
CPU_POWER_MGMT_TEST_CONFIG: BiProcHot : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableProcHotOut : 0x1
CPU_POWER_MGMT_TEST_CONFIG: ProcHotResponse : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableVrThermalAlert : 0x0
CPU_POWER_MGMT_TEST_CONFIG: EnableAllThermalFunctions : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ThermalMonitor : 0x1
CPU_POWER_MGMT_TEST_CONFIG: Cx : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PmgCstCfgCtrlLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1e : 0x0
CPU_POWER_MGMT_TEST_CONFIG: C1Autodemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1Undemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCState Demotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCstateUndemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CStatePreWake : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TimedMwait : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstCfgCtrIoMwaitRedirection : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ProcHotLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: RaceToHalt : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: PkgCStateLimit : 0x8
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CustomPowerUnit : 0x1
PpmIrmSetting : 0x0
------------------------ SiCpuPolicy Print End in PostMem -----------------
------------------------ TCSS_PEI_CONFIG -----------------
Revision : 3
TcssPeiConfig->IomAuxPortPad[0].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[0].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullP 0x00000000
TcssPeiConfig->UsbConfig.PortUsb30[0].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[1].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[2].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[3].Enable 0x00000001
TcssPeiConfig->IomConfig.IomOverrides.AuxOri 0x0000
TcssPeiConfig->IomConfig.IomOverrides.HslOri 0x0000
TcssPeiConfig->IomConfig.IomInterface.VccSt 1
TcssPeiConfig->IomConfig.IomInterface.UsbOverride 0
TcssPeiConfig->IomConfig.IomInterface.D3HotEnable 0
TcssPeiConfig->IomConfig.IomInterface.D3ColdEnable 1
TcssPeiConfig->IomConfig.TcStateLimit 10
TcssPeiConfig->IomConfig.DisableTccoldOnUsbConnected 0
TcssPeiConfig->MiscConfig.IomStayInTCColdeSeconds 50
TcssPeiConfig->MiscConfig.IomBeforeEnteringTCCodeSeconds 10
TcssPeiConfig->IomConfig.PmcInterface.PmcPdEnable 1
------------------------ SA_PEI_PCIE_COMMON_CONFIG -----------------
Itbt Root Port 0 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 1 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 2 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 60
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 3 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
[TBT] TbtPrintPolicyConfig Start
------------------------ ITBT Policy (PEI) Print BEGIN -----------------
Revision : 0x1
Revision : 2
PeiITbtConfig->ITbtGenericConfig.ITbtForcePowerOnTimeoutInMs = 1F4
PeiITbtConfig->ITbtGenericConfig.ITbtConnectTopologyTimeoutInMs = 1388
PeiITbtConfig->ITbtGenericConfig.ITbtPcieTunnelingForUsb4 = 1
PeiITbtConfig->ITbtRootPortConfig[0].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[1].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[2].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[3].ITbtPcieRootPortEn = 0
------------------------ ITBT Policy (PEI) Print END -----------------
------------------------ CPU_PCIE_Config -----------------
FiaProgramming = 1
ClockGating= 1
PowerGating= 1
SlotSelection= 1
Serl : 0x1
ComplianceTestMode= 0
RpFunctionSwap= 1
EnablePeerMemoryWrite= 0
PcieDeviceOverrideTablePtr= 0
RootPort[0] PcieGen3PresetCoeffSelection= 1
RootPort[0] PcieGen4PresetCoeffSelection= 1
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ExtSync= 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] DpcEnabled= 1
RootPort[0] RpDpcExtensionsEnabled= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] VcEnabled= 1
RootPort[0] MultiVcEnabled= 0
RootPort[0] PeerToPeer= 0
RootPort[0] FOMS Control Policy= 0
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] Gen3EqPh3Method= 1
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 2
RootPort[0] L1Substates= 2
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] Gen3Uptp= 7
RootPort[0] Gen3Dptp= 7
RootPort[0] Gen4Uptp= 8
RootPort[0] gen4Dptp= 9
RootPort[0] Gen5Uptp= 7
RootPort[0] gen5Dptp= 7
RootPort[0] EnableCpm= 1
RootPort[0] HwEqGen3Coeff0ListCm= 3
RootPort[0] HwEqGen3Coeff1ListCm= 3
RootPort[0] HwEqGen3Coeff2ListCm= 0
RootPort[0] HwEqGen3Coeff3ListCm= 0
RootPort[0] HwEqGen3Coeff4ListCm= 0
RootPort[0] HwEqGen3Coeff0ListCp= 4
RootPort[0] HwEqGen3Coeff1ListCp= 4
RootPort[0] HwEqGen3Coeff2ListCp= 0
RootPort[0] HwEqGen3Coeff3ListCp= 0
RootPort[0] HwEqGen3Coeff4ListCp= 0
RootPort[0] HwEqGen4Coeff0ListCm= 6
RootPort[0] HwEqGen4Coeff1ListCm= 6
RootPort[0] HwEqGen4Coeff2ListCm= 0
RootPort[0] HwEqGen4Coeff3ListCm= 0
RootPort[0] HwEqGen4Coeff4ListCm= 0
RootPort[0] HwEqGen4Coeff0ListCp= A
RootPort[0] HwEqGen4Coeff1ListCp= A
RootPort[0] HwEqGen4Coeff2ListCp= 0
RootPort[0] HwEqGen4Coeff3ListCp= 0
RootPort[0] HwEqGen4Coeff4ListCp= 0
------------------------ CPU_PCIE_Config Print END -----------------
------------------ CPU Power Mgmt VR Config ------------------
CPU_POWER_MGMT_VR_CONFIG : VrConfigEnable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcCurrentLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : DcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Psi1Threshold[0] : 0x50
CPU_POWER_MGMT_VR_CONFIG : Psi2Threshold[0] : 0x14
CPU_POWER_MGMT_VR_CONFIG : Psi3Threshold[0] : 0x4
CPU_POWER_MGMT_VR_CONFIG : Psi3Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : Psi4Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : ImonSlope[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : ImonOffset[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : IccMax[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : VrVoltageLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcEnable[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcTimeWindow[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcLock[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Irms[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG:: FastPkgCRampDisable for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SlowSlewRate for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysSlope : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysOffset : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcousticNoiseMitigation : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SendVrMbxCmd : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrRfiFrequency : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrSpectrumEnable : 0x1
CPU_POWER_MGMT_VR_CONFIG : FivrSpreadSpectrum : 0x8
CPU_POWER_MGMT_VR_CONFIG : EnableMinVoltageOverride : 0x0
CPU_POWER_MGMT_VR_CONFIG : PreWake : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampUp : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampDown : 0x0
CPU_POWER_MGMT_VR_CONFIG : RfiMitigation : 0x0
Install PPI: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Notify: PPI Guid: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779, Peim notify entry point: 76F019C7
SiInit () - Start
FuSA supported sku detected
FusaInit() Start
Disable C1e in fusa mode
IOP FUSA override Function
OPIO FUSA override Fuction
Enable Fusa on Opio
Enable Fusa on Graphics
Enable Fusa on Display
PSF CPU FUSA override Function
Read Default PSF Config = 0360
Read Default PSF Config = 0360
Enable Fusa on PSF
Read After PSF Config = 0F60
Read After PSF Config = 0F60
Lock FUSA Display Lock Bit 0x3000301
Lock FUSA Graphics Lock Bit 0x41
FusaInit() End
FuSA supported sku detected
ConfigurePsmi () - Start
ConfigurePsmi () - PSMI disabled
PeiSiPolicyOverride ()
SubsystemID programming on Internal Devices
MePostMemInit () - Start
POSTCODE=<00009E02> - ME-BIOS: MBP Entry.
PrepareMeBiosPayload () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80080007
00: F0 02 00 00 00 00 00 00
[HECI1] Got msg Success: 80CC0007
00: F0 82 00 00 32 0D 00 00 - 01 01 03 02 0F 00 00 00
10: 23 00 9F 07 01 04 09 03 - FD 52 A0 98 F8 47 6B 93
20: DB C5 E9 CD 0C A8 D5 C4 - 10 42 C7 54 24 A7 FD C0
30: 87 5B 22 68 98 FF 7C 3D - 01 07 04 02 00 00 00 00
40: 00 00 00 00 9B 01 00 00 - 01 0F 02 02 00 00 00 00
50: 05 01 02 02 01 00 01 00 - 05 03 04 02 0D 71 FF FF
60: FF FF 08 06 10 00 08 00 - 08 02 0A 03 09 2C 3A CC
70: 38 B2 34 ED E3 E9 BD AF - 52 28 AD 6F 39 A1 55 6E
80: CE E2 AC 33 82 DC BE 21 - B4 F0 23 2F 2E E9 CF 78
90: 01 08 02 00 00 00 00 00 - 01 05 02 00 91 03 00 42
A0: 01 02 02 00 00 92 31 31 - 01 09 02 00 07 50 F6 21
B0: 01 0E 02 02 01 01 04 00 - 01 0D 05 02 01 00 00 00
C0: 32 01 0E 02 1B 00 0D 00 - 00 00 00 00
ReadMsg returned Success
MsgGetMbpAck->MkhiHeader.Fields.Command = 2
MsgGetMbpAck->MkhiHeader.Fields.IsResponse = 1
MsgGetMbpAck->MkhiHeader.Fields.Result = 0
No. of Mbp Entries: 13
MBP Item 0 header: 02030101
00: 0F 00 00 00 23 00 9F 07
MBP Item 1 header: 03090401
00: FD 52 A0 98 F8 47 6B 93 - DB C5 E9 CD 0C A8 D5 C4
10: 10 42 C7 54 24 A7 FD C0 - 87 5B 22 68 98 FF 7C 3D
Unknown MBP Item 2 header: 02040701
MBP Item 3 header: 02020F01
00: 00 00 00 00
Unknown MBP Item 4 header: 02020105
MBP Item 5 header: 02040305
00: 0D 71 FF FF FF FF 08 06 - 10 00 08 00
Unknown MBP Item 6 header: 030A0208
MBP Item 7 header: 00020801
00: 00 00 00 00
MBP Item 8 header: 00020501
00: 91 03 00 42
MBP Item 9 header: 00020201
00: 00 92 31 31
MBP Item 10 header: 00020901
00: 07 50 F6 21
MBP Item 11 header: 02020E01
00: 01 01 04 00
Unknown MBP Item 12 header: 02050D01
HECI reset: clearing buffer from MBP Sensitive data.
[HECI1] Resetting interface
[HECI1] - Step1 Enable Host Reset : H_CSR = 0x800E0E08
[HECI1] - Step2 Wait for reset started: H_CSR = 0x800E0E1C
[HECI1] - Step3 Wait for ME reset: ME_CSR_HA = 0x80000008
Install PPI: ED7C9CE9-5912-4807-EC90-2218BC7BFC6C
------------------------ MeBiosPayload Data Protocol Print Begin -----------------
Revision : 0x1
MeBiosPayload FwVersionName ---
ME FW MajorVersion : 15
ME FW MinorVersion : 0
ME FW HotfixVersion : 35
ME FW BuildVersion : 1951
MeBiosPayload FwCapabilities ---
FullMng : 0x0
StdMng : 0x0
Amt : 0x0
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x0
KVM : 0x0
DAL : 0x1
TLS : 0x1
WLAN : 0x0
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload FwFeaturesState ---
FullMng : 0x1
StdMng : 0x1
Amt : 0x1
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x1
KVM : 0x1
DAL : 0x1
TLS : 0x1
WLAN : 0x1
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload ME Platform Type ---
PlatformTargetUsageType : 0x1
SuperSku : 0x0
IntelMeFwImageType : 0x3
PlatformBrand : 0x0
MeBiosPayload UnconfigOnRtcClearState ---
UnconfigOnRtcClearData : 0x0
MeBiosPayload ArbSvnState ---
Flags : 0x1
MinCseArbSvn : 0x1
CurrCseArbSvn : 0x4
MeBiosPayload MeasuredBootSupport ---
MeasuredBoot : 0x0
Sensitive Data Revision : 0x1
MeBiosPayload Platform Key ---
Key[0x0] : 0x98A052FD
Key[0x1] : 0x936B47F8
Key[0x2] : 0xCDE9C5DB
Key[0x3] : 0xC4D5A80C
Key[0x4] : 0x54C74210
Key[0x5] : 0xC0FDA724
Key[0x6] : 0x68225B87
Key[0x7] : 0x3D7CFF98
------------------------ MeBiosPayload Data Protocol Print End -------------------
POSTCODE=<00009E22> - ME-BIOS: MBP Exit - Success.
MeDeviceConfigure () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
Current MeBiosBootPath - 0
ME FW HOB installed
ME FW HOB data updated
Current ME FW HOB data printed -
00: 04 00 A8 00 00 00 00 00 - 62 5E 88 52 4D 4C 46 95
10: 2D BA 2A 84 89 EE A8 A3 - 01 04 00 00 00 00 00 00
20: 55 02 00 90 16 01 10 80 - 20 00 00 00 00 40 00 00
30: 00 00 00 00 00 00 40 00 - 01 00 00 00 FF FF FF FF
40: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
50: FF FF FF FF 04 00 00 00 - 00 00 00 80 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 05 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00
[HECI2] Setting D0I3 bit
[HECI2] Function is disabled, can't set D0I3 bit!
Disabling CSME device 0:22:1
[HECI3] Setting D0I3 bit
[HECI3] D0I3C register = 00000015
Disabling CSME device 0:22:4
Disabling CSME device 0:22:3
Disabling CSME device 0:22:2
MeDeviceInit [HECI4] H: 00000000, L: FE600000
POSTCODE=<00009004> - ME Device Init
Program HECI MMIO address
[HECI4] Setting D0I3 bit
[HECI4] D0I3C register = 00000015
Disabling CSME device 0:22:5
MeDeviceConfigureInterrupts () for MeDev = 0
MeDeviceConfigureInterrupts () for MeDev = 1
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 2
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 3
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 4
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 5
MeDeviceConfigureInterrupts () exit (Device disabled)
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
MePostMemInit () - End
POSTCODE=<00009B00>
PchInit - Start
PchHsioMiscBiosProg() Start
Installing HSIO ChipsetInit SUS Table Data PPI
Install PPI: 97ED4E5D-01A5-4A3C-B7E9-1A4EA3DD23CE
PchHsioMiscBiosProg() End
ConfigureSata() Started (SATA controler index: 0)
EarlyConfigureSata() Started (SATA controller reg base: 0x000B8000)
EarlyConfigureSata() Ended (SATA controller reg base: 0x000B8000)
ConfigureSataAhci() Started (SATA controler index: 0)
ConfigureSataAhci() Ended (SATA controler index: 0)
ConfigureSata() Ended (SATA controler index: 0)
HybridStorageCheckAndConfigureClkreq Entry
HybridStorageCheckAndConfigureClkreq Exit
GbeInit() Start
GbePmcEnabled: 0
No FIA lanes assigned as GbE
GbeLaneNum: No lanes assigned
GbeRegionValid: 1
GbePresent: 0
LAN disabled
GbeInit() End
PchSpiExtendedBiosDecodeRangeInit - Extended BIOS decode range is disabled. Skipping initialization.
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
CridSupport = 0 20 20
PcieRpInit() Start
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 3 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 4 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 5 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 9 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 10 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 12 has a device attached.
PcieConfigureControllerBasePowerManagement(1)
PchPcieConfigureBasePowerManagement(1) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(2) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(3) Start
PchPcieConfigureBasePowerManagement(4) Start
PcieConfigureControllerBasePowerManagement(5)
PchPcieConfigureBasePowerManagement(5) Start
PchPcieConfigureBasePowerManagement(6) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(7) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(8) Start
Setting DLSULPPGE+DLSULDLSD.
PcieConfigureControllerBasePowerManagement(9)
PchPcieConfigureBasePowerManagement(9) Start
PchPcieConfigureBasePowerManagement(10) Start
PchPcieConfigureBasePowerManagement(11) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(12) Start
WaitForLinkActive, RP mask to wait for = 0x00000B1C
WaitForLinkActive, all RPs done, lost 0ms waiting
DisablePcieRootPort(1) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(2) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (3) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:2
RecursiveBusAssignmentE 0:1C:2 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:2 -> 0,2,2
RecursiveMpsCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:2
RecursiveCccConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (4) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:3
RecursiveBusAssignmentE 0:1C:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:3 -> 0,2,2
RecursiveMpsCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:3
RecursiveCccConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (5) Start
VID: 11F8 DID: 4036 MLS: 4
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
Starting Equalization with following settings:
EQCFG1: 0x00001100
EQCFG2: 0x00042002
HAEQ: 0x00000E00
HW EQ finished, results:
EQCFG1: 0x00001100
LSTS2: 0x001F
Training time = 16580us
5.0 FOM Scoreboard:
0:018 1:018 2:022
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00111183 0x00200103
5.1 FOM Scoreboard:
0:025 1:022 2:020
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00111183 0x00200103
5.2 FOM Scoreboard:
0:023 1:022 2:022
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00111183 0x00200103
5.3 FOM Scoreboard:
0:026 1:025 2:019
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00111183 0x00200103
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:4
RecursiveBusAssignmentE 0:1C:4 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentE 2:0:0 -> 2,3,A
IsPcieDevice 03:00:00 - yes
RecursiveBusAssignmentE 3:0:0 -> 3,4,A
RecursiveBusAssignmentL 3:0:0 -> 3,4,4
IsPcieDevice 03:01:00 - yes
RecursiveBusAssignmentE 3:1:0 -> 3,5,A
RecursiveBusAssignmentL 3:1:0 -> 3,5,5
IsPcieDevice 03:02:00 - yes
RecursiveBusAssignmentE 3:2:0 -> 3,6,A
RecursiveBusAssignmentL 3:2:0 -> 3,6,6
IsPcieDevice 03:03:00 - yes
RecursiveBusAssignmentE 3:3:0 -> 3,7,A
RecursiveBusAssignmentL 3:3:0 -> 3,7,7
IsPcieDevice 03:04:00 - yes
RecursiveBusAssignmentE 3:4:0 -> 3,8,A
IsPcieDevice 08:00:00 - yes
RecursiveBusAssignmentL 3:4:0 -> 3,8,8
RecursiveBusAssignmentL 2:0:0 -> 2,3,8
RecursiveBusAssignmentL 0:1C:4 -> 0,2,8
RecursiveMpsCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsCheck 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsCheck 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsCheck 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsCheck 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsCheck 8:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsConfiguration 8:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveIoApicCheck 3:0:0
HasChildBus03:00:00: yes, 4
IoApic status 0 @0:3:0:0
IsPcieDevice 03:01:00 - yes
RecursiveIoApicCheck 3:1:0
HasChildBus03:01:00: yes, 5
IoApic status 0 @0:3:1:0
IsPcieDevice 03:02:00 - yes
RecursiveIoApicCheck 3:2:0
HasChildBus03:02:00: yes, 6
IoApic status 0 @0:3:2:0
IsPcieDevice 03:03:00 - yes
RecursiveIoApicCheck 3:3:0
HasChildBus03:03:00: yes, 7
IoApic status 0 @0:3:3:0
IsPcieDevice 03:04:00 - yes
RecursiveIoApicCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveIoApicCheck 8:0:0
HasChildBus : : : no
IoApic status 0 @0:8:0:0
IoApic status 0 @0:3:4:0
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:4
RecursiveCccConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCccConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveCccConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveCccConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveCccConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveCccConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveCccConfiguration 8:0:0
HasChildBus : : : no
IsPcieDevice 08:00:00 - yes
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
DisablePcieRootPort(6) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(7) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(8) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (9) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:0
RecursiveBusAssignmentE 0:1D:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:0 -> 0,2,2
RecursiveMpsCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:0
RecursiveCccConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (10) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:1
RecursiveBusAssignmentE 0:1D:1 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:1 -> 0,2,2
RecursiveMpsCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:1
RecursiveCccConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
DisablePcieRootPort(11) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (12) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:3
RecursiveBusAssignmentE 0:1D:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:3 -> 0,2,2
RecursiveMpsCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:3
RecursiveCccConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
PcieRpInit() End
POSTCODE=<00009B04>
[Usb2PhyProgramming] Start
USB2 PHY is accesible
Programming USB2 PHY register 0x4001 to 0x2F3DB806
Warning! Data mismatch after write. Read 2E3DB806
Programming USB2 PHY register 0x402B to 0x006A4005
Programming USB2 PHY register 0x402C to 0x09A25380
Programming USB2 PHY register 0x7F04 to 0x0000C680
Programming USB2 PHY register 0x702C to 0x0088C200
[Usb2PhyClockDependentProgramming] Programming USB2 PHY parameters based on freq enum: 0
Programming USB2 PHY register 0x7000 to 0x64641E08
Programming USB2 PHY register 0x702C to 0x0088C200
Programming USB2 PHY register 0x7008 to 0x222B5A20
Programming USB2 PHY register 0x7014 to 0x59E94D18
Programming USB2 PHY register 0x7024 to 0x3001E800
### PpLane 1
Programming USB2 PHY register 0x4100 to 0xFC05B091
Programming USB2 PHY register 0x4126 to 0x4382924B
Programming USB2 PHY register 0x4108 to 0x0000DAD0
### PpLane 2
Programming USB2 PHY register 0x4200 to 0xFC05B091
Programming USB2 PHY register 0x4226 to 0x4382924B
Programming USB2 PHY register 0x4208 to 0x0000DAD0
### PpLane 3
Programming USB2 PHY register 0x4300 to 0xFC05B091
Programming USB2 PHY register 0x4326 to 0x4382924B
Programming USB2 PHY register 0x4308 to 0x0000DAD0
### PpLane 4
Programming USB2 PHY register 0x4400 to 0xFC05B091
Programming USB2 PHY register 0x4426 to 0x4382924B
Programming USB2 PHY register 0x4408 to 0x0000DAD0
### PpLane 5
Programming USB2 PHY register 0x4500 to 0xFC05B091
Programming USB2 PHY register 0x4526 to 0x4382924B
Programming USB2 PHY register 0x4508 to 0x0000DAD0
### PpLane 6
Programming USB2 PHY register 0x4600 to 0xFC05B091
Programming USB2 PHY register 0x4626 to 0x4382924B
Programming USB2 PHY register 0x4608 to 0x0000DAD0
### PpLane 7
Programming USB2 PHY register 0x4700 to 0xFC05B091
Programming USB2 PHY register 0x4726 to 0x4382924B
Programming USB2 PHY register 0x4708 to 0x0000DAD0
### PpLane 8
Programming USB2 PHY register 0x4800 to 0xFC05B091
Programming USB2 PHY register 0x4826 to 0x4382924B
Programming USB2 PHY register 0x4808 to 0x0000DAD0
### PpLane 9
Programming USB2 PHY register 0x4900 to 0xFC05B091
Programming USB2 PHY register 0x4926 to 0x4382924B
Programming USB2 PHY register 0x4908 to 0x0000DAD0
### PpLane 10
Programming USB2 PHY register 0x4A00 to 0xFC05B091
Programming USB2 PHY register 0x4A26 to 0x4382924B
Programming USB2 PHY register 0x4A08 to 0x0000DAD0
POSTCODE=<00009B05>
POSTCODE=<00009B06>
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0xA0ED
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
xHCI: PEI phase PDO programming
xHCI: Usb2DisabledPorts = 0x100
xHCI: Usb3DisabledPorts = 0x0
HsPortCount 12, SsPortCount 4
XhciUsb2PdoMask 0x00000FFF, XhciUsb3PdoMask 0x0000000F
XhciUsb2Pdo 0x00000100, XhciUsb3Pdo 0x00000000
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 12
Test for XHCI_MEM_DAP_ESS_PORT
XhciConfigure() - End
POSTCODE=<00009B08>
xDCI Controller DID: 0xA0EE
xDCI: Device enabled
POSTCODE=<00009B0A>
Dmi14 R_PCH_OPDMI14_PCR_LPMC = 7E201500
Dmi14 R_PCH_OPDMI14_PCR_LCTL = 8
POSTCODE=<00009B0B>
POSTCODE=<00009B0C>
POSTCODE=<00009B0D>
------------------ IRQ Usage ------------------
IRQxxx USED
IRQ000 0
IRQ001 0
IRQ002 0
IRQ003 0
IRQ004 0
IRQ005 0
IRQ006 0
IRQ007 0
IRQ008 0
IRQ009 0
IRQ010 0
IRQ011 0
IRQ012 0
IRQ013 0
IRQ014 0
IRQ015 0
IRQ016 1
IRQ017 1
IRQ018 1
IRQ019 1
IRQ020 1
IRQ021 1
IRQ022 1
IRQ023 1
IRQ024 1
IRQ025 1
IRQ026 0
IRQ027 1
IRQ028 0
IRQ029 1
IRQ030 1
IRQ031 1
IRQ032 1
IRQ033 1
IRQ034 1
IRQ035 1
IRQ036 1
IRQ037 1
IRQ038 1
IRQ039 0
IRQ040 1
IRQ041 0
IRQ042 1
IRQ043 1
IRQ044 0
IRQ045 0
IRQ046 0
IRQ047 0
IRQ048 0
IRQ049 0
IRQ050 0
IRQ051 0
IRQ052 0
IRQ053 0
IRQ054 0
IRQ055 0
IRQ056 0
IRQ057 0
IRQ058 0
IRQ059 0
IRQ060 0
IRQ061 0
IRQ062 0
IRQ063 0
IRQ064 0
IRQ065 0
IRQ066 0
IRQ067 0
IRQ068 0
IRQ069 0
IRQ070 0
IRQ071 0
IRQ072 0
IRQ073 0
IRQ074 0
IRQ075 0
IRQ076 0
IRQ077 0
IRQ078 0
IRQ079 0
IRQ080 0
IRQ081 0
IRQ082 0
IRQ083 0
IRQ084 0
IRQ085 0
IRQ086 0
IRQ087 0
IRQ088 0
IRQ089 0
IRQ090 0
IRQ091 0
IRQ092 0
IRQ093 0
IRQ094 0
IRQ095 0
IRQ096 0
IRQ097 0
IRQ098 0
IRQ099 0
IRQ100 0
IRQ101 0
IRQ102 0
IRQ103 0
IRQ104 0
IRQ105 0
IRQ106 0
IRQ107 0
IRQ108 0
IRQ109 0
IRQ110 0
IRQ111 0
IRQ112 0
IRQ113 0
IRQ114 0
IRQ115 0
IRQ116 0
IRQ117 0
IRQ118 0
IRQ119 0
IRQ120 0
IRQ121 0
IRQ122 0
IRQ123 0
IRQ124 0
IRQ125 0
IRQ126 0
CnviInit() - Start
CNVi has been fused out
ThcInit() Start
ThcInit() End
POSTCODE=<00009B14>
IshInit() Start
POSTCODE=<00009B15>
Retention is not supported on this stepping overriding the Retention transition times to 0 in VCCIN_AUX_CFG1
SerialIoInit() Start
SerialIoSpiInit() Start
SerialIoSpiInit() End
SerialIoI2cInit() Start
SerialIoI2cInit() End
SerialIoUartInit() Start
SerialIoUartInit() End
SerialIoInit() End
InstallI2cMasterPpi End
Install PPI: B3BFAB9B-9F9C-4E8B-AD37-7F8C51FC6280
[ConfigureEspi] Entry.[ConfigureEspi] eSPI is disabled through strapIEH: Workaround to mask global error registers and clear error status
HybridStorageDynamicDetectionAndConfig() Start
HybridStorage Policy not enabled
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
PsfConfigurePcieGrantCounts() Start
SPA[0] - DGCR12 = 1
SPA[0] - PG1_TGT0 = 1
SPA[1] - DGCR13 = 1
SPA[1] - PG1_TGT1 = 1
SPA[2] - DGCR14 = 1
SPA[2] - PG1_TGT2 = 1
SPA[3] - DGCR15 = 1
SPA[3] - PG1_TGT3 = 1
SPB[0] - DGCR16 = 4
SPB[0] - PG1_TGT5 = 4
SPC[0] - DGCR20 = 1
SPC[0] - PG1_TGT10 = 1
SPC[1] - DGCR21 = 1
SPC[1] - PG1_TGT11 = 1
SPC[2] - DGCR22 = 1
SPC[2] - PG1_TGT12 = 1
SPC[3] - DGCR23 = 1
SPC[3] - PG1_TGT13 = 1
PsfConfigurePcieGrantCounts() End
ChipsetInitSync() Start
Get CSME ChipsetInit Version Data from MBP
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0xFFFF
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 0
//Base CRC Valid: 1
BIOS Computed SUS Table CRC: 7D0C
[HECI1] MeMode 0 (Hfsts1: 90000255)
Read ChipsetInit Binary from CSME
PeiHeciReadChipsetInitMsg(): Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80240008
00: 00 00 05 00 0A 00 00 00 - 00 00 00 00 10 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 20 00 00
[HECI1] Got msg Success: 01FC0008
00: 00 00 05 00 0A 00 00 00 - 00 00 00 00 10 14 00 00
10: 00 00 00 00 00 00 00 00 - FC 13 00 00 00 00 00 00
20: FC 13 00 00 00 00 00 00 - 0D 71 FF FF FF FF 08 06
30: 10 00 08 00 00 00 44 44 - 45 A5 00 0F 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 28 AB 07 00 - 01 00 04 80 60 00 00 20
60: 28 AB 07 00 01 00 30 80 - 01 04 30 00 28 AB 07 00
70: 01 00 3C 80 06 00 00 00 - 28 AB 07 00 04 00 E8 80
80: 80 08 0C 3C 28 AB 07 00 - 0F 00 80 81 19 00 00 00
90: 28 AB 07 00 07 00 88 81 - 00 00 00 00 28 AB 07 00
A0: 0F 00 90 81 02 07 01 0C - 28 AB 07 00 04 00 98 81
B0: 00 00 02 00 28 AB 07 00 - 05 00 9C 81 03 00 1C 00
C0: 28 AB 07 00 07 00 A0 81 - 00 00 00 00 28 AB 07 00
D0: 05 00 A8 81 06 00 1F 00 - 28 AB 07 00 03 00 AC 81
E0: 0B 03 00 00 28 AB 07 00 - 0A 00 B0 81 00 3C 00 78
F0: 28 AB 07 00 01 00 C8 81 - 01 00 00 00 28 AB 07 00
00: 01 00 CC 81 01 00 00 00 - 0F 00 00 00 28 AB 07 00
10: 08 00 E8 86 00 48 17 1A - 28 AB 07 00 02 00 1C 84
20: 00 C0 00 60 28 AB 07 00 - 02 00 40 84 F0 A0 02 FF
30: 28 AB 07 00 08 00 60 86 - 08 00 08 F3 28 AB 07 00
40: 02 00 C0 86 00 10 88 1B - 28 AB 07 00 02 00 8C 85
50: 00 08 1F 20 28 AB 07 00 - 0F 00 F0 86 20 28 28 28
60: 28 AB 07 00 02 00 30 86 - 50 C0 00 BE 28 AB 07 00
70: 08 00 58 86 09 A0 32 81 - 28 AB 07 00 08 00 20 87
80: 04 02 12 08 28 AB 07 00 - 07 00 44 86 4E DE 05 01
90: 28 AB 07 00 06 00 54 87 - 80 50 06 00 28 AB 07 00
A0: 02 00 3C 84 02 9F 00 00 - 28 AB 07 00 02 00 20 86
B0: 00 44 00 00 28 AB 07 00 - 04 00 D4 86 C0 80 82 00
C0: 28 AB 07 00 08 00 9C 85 - 00 0C 49 22 28 AB 07 00
D0: 08 00 10 86 FF 01 C8 1E - 28 AB 07 00 04 00 14 86
E0: 9F 63 0C 03 28 AB 07 00 - 01 00 3C 86 F0 00 00 00
F0: 28 AB 07 00 07 00 2C 86 - 5A 10 08 00
[HECI1] Got msg Success: 01FC0008
00: 28 AB 07 00 0F 00 08 86 - 50 FF FF 3F 28 AB 07 00
10: 08 00 28 87 00 00 04 FC - 28 AB 07 00 07 00 4C 86
20: 07 C9 05 01 28 AB 07 00 - 01 00 20 84 25 16 07 0D
30: 28 AB 07 00 07 00 8C 86 - 58 40 04 00 28 AB 07 00
40: 03 00 4C 87 FF 08 01 00 - 28 AB 07 00 07 00 64 86
50: 00 A4 00 00 28 AB 07 00 - 01 00 50 87 6E 80 10 10
60: 28 AB 07 00 04 00 78 86 - 60 40 83 40 28 AB 07 00
70: 0F 00 80 86 60 17 A0 01 - 28 AB 07 00 0C 00 A0 86
80: EC 70 C0 28 28 AB 07 00 - 0F 00 C4 86 D1 EC 21 E4
90: 28 AB 07 00 01 00 28 84 - E0 01 02 01 28 AB 07 00
A0: 05 00 0C 86 FF 9B 92 00 - 28 AB 07 00 08 00 50 86
B0: 3F 3F 3F 05 28 AB 07 00 - 01 00 AC 86 EC 60 00 00
C0: 28 AB 07 00 0C 00 24 87 - 22 22 26 10 28 AB 07 00
D0: 01 00 54 86 02 00 C0 88 - 28 AB 07 00 01 00 54 85
E0: 06 2A 29 28 28 AB 07 00 - 04 00 C8 86 50 88 8D 3F
F0: 28 AB 07 00 04 00 9C 86 - 00 00 2C 00 28 AB 07 00
00: 02 00 18 86 BF 00 00 00 - 28 AB 07 00 0F 00 EC 86
10: 04 80 00 00 28 AB 07 00 - 0E 00 08 87 45 F4 DF CC
20: 28 AB 07 00 07 00 A4 86 - 28 28 28 00 28 AB 07 00
30: 01 00 70 86 5E 25 40 40 - 28 AB 07 00 0B 00 88 86
40: 20 70 74 E4 28 AB 07 00 - 04 00 48 87 88 0A 8D D7
50: 28 AB 07 00 06 00 40 87 - 0A 00 E2 16 28 AB 07 00
60: 04 00 00 84 00 01 89 80 - 28 AB 07 00 08 00 1C 86
70: 08 10 3B 68 28 AB 07 00 - 01 00 1C 87 03 7F 1B 1B
80: 28 AB 07 00 0F 00 E4 86 - 50 45 0B 1C 28 AB 07 00
90: 01 00 5C 86 2E 08 3B 00 - 28 AB 07 00 07 00 04 84
A0: 64 C0 11 00 28 AB 07 00 - 08 00 24 84 10 0A 0B A4
B0: 28 AB 07 00 05 00 40 86 - 58 CF 05 01 28 AB 07 00
C0: 0A 00 00 86 70 A8 52 0B - 28 AB 07 00 01 00 18 84
D0: 7C 00 89 02 28 AB 07 00 - 02 00 58 85 20 1E 1F 15
E0: 28 AB 07 00 08 00 84 85 - 08 0A 00 08 28 AB 07 00
F0: 05 00 04 86 09 09 0F 00 - 28 AB 07 00
[HECI1] Got msg Success: 01FC0008
00: 06 00 10 84 00 00 BF 72 - 28 AB 07 00 0F 00 18 87
10: 00 0C 00 01 28 AB 07 00 - 05 00 68 86 2A 82 10 B8
20: 28 AB 07 00 01 00 64 86 - 08 A4 00 00 0F 00 00 00
30: 28 AB 07 00 0C 00 48 93 - 88 0A 8A D3 28 AB 07 00
40: 0F 00 5C 93 33 33 24 20 - 28 AB 07 00 02 00 64 91
50: 4C 60 4C 4C 28 AB 07 00 - 07 00 A4 92 1E 1E 1E 00
60: 28 AB 07 00 03 00 14 90 - 1D C5 00 11 28 AB 07 00
70: 0F 00 C4 92 D1 EC 01 E6 - 28 AB 07 00 0C 00 1C 93
80: 03 7F 21 21 28 AB 07 00 - 02 00 E4 92 40 A5 0B 4B
90: 28 AB 07 00 0F 00 18 93 - 01 00 00 4A 28 AB 07 00
A0: 02 00 54 93 80 54 02 00 - 28 AB 07 00 0F 00 24 90
B0: 0F 0C 0C A4 28 AB 07 00 - 01 00 28 90 E0 01 02 01
C0: 28 AB 07 00 0C 00 E8 92 - 00 48 26 1A 28 AB 07 00
D0: 01 00 20 90 26 16 07 0D - 28 AB 07 00 09 00 1C 92
E0: F8 10 3B 00 28 AB 07 00 - 0C 00 C8 92 50 88 8D 0D
F0: 28 AB 07 00 01 00 E0 92 - 32 60 00 08 28 AB 07 00
00: 04 00 AC 92 F6 60 00 00 - 28 AB 07 00 06 00 14 92
10: 9F 61 38 03 28 AB 07 00 - 0F 00 14 93 08 1C 05 0F
20: 28 AB 07 00 0F 00 24 93 - 36 38 B2 1F 28 AB 07 00
30: 0A 00 00 92 70 94 52 0B - 28 AB 07 00 07 00 44 93
40: 2B 1C 18 00 28 AB 07 00 - 07 00 4C 92 49 CD 05 01
50: 28 AB 07 00 03 00 4C 93 - DC 4F 01 00 28 AB 07 00
60: 0C 00 28 93 00 00 1A FF - 28 AB 07 00 08 00 60 92
70: 08 00 08 33 28 AB 07 00 - 03 00 58 93 A4 9C 8C 31
80: 28 AB 07 00 06 00 64 92 - 00 54 02 00 28 AB 07 00
90: 05 00 54 91 06 2A 2D 28 - 28 AB 07 00 05 00 68 92
A0: 06 82 10 B8 28 AB 07 00 - 03 00 44 90 97 48 09 64
B0: 28 AB 07 00 0F 00 80 92 - 40 17 04 04 28 AB 07 00
C0: 08 00 A0 92 EC 70 80 1E - 28 AB 07 00 01 00 10 93
D0: 68 00 40 00 28 AB 07 00 - 08 00 84 91 08 0A 00 08
E0: 28 AB 07 00 0F 00 88 92 - 10 30 77 64 28 AB 07 00
F0: 04 00 78 92 60 40 83 40 - 28 AB 07 00
[HECI1] Got msg Success: 01FC0008
00: 07 00 2C 92 0C 00 0B 00 - 28 AB 07 00 07 00 04 92
10: 09 0B 0F 00 28 AB 07 00 - 0D 00 40 92 4E CF 18 03
20: 28 AB 07 00 08 00 6C 92 - 00 24 04 5C 28 AB 07 00
30: 0F 00 20 93 04 21 03 0D - 28 AB 07 00 0F 00 0C 93
40: 1F E0 21 21 28 AB 07 00 - 01 00 3C 92 F0 00 00 00
50: 28 AB 07 00 01 00 0C 92 - E6 9B 52 00 28 AB 07 00
60: 02 00 18 92 BF 00 00 00 - 28 AB 07 00 01 00 5C 90
70: 96 BC 1F 3F 28 AB 07 00 - 04 00 00 90 00 01 89 80
80: 28 AB 07 00 0C 00 08 93 - 45 34 48 D0 28 AB 07 00
90: 01 00 50 93 6E 80 10 10 - 28 AB 07 00 04 00 04 93
A0: 80 AA 11 C0 28 AB 07 00 - 02 00 8C 91 00 08 1F 20
B0: 28 AB 07 00 0F 00 08 92 - 50 D1 EC 01 28 AB 07 00
C0: 04 00 7C 92 18 18 26 40 - 28 AB 07 00 09 00 CC 92
D0: 25 17 17 5B 28 AB 07 00 - 08 00 B4 92 40 40 81 08
E0: 28 AB 07 00 01 00 60 93 - 72 00 00 00 28 AB 07 00
F0: 07 00 8C 92 20 48 82 00 - 28 AB 07 00 0E 00 40 93
00: 0A 00 EB 1F 28 AB 07 00 - 03 00 70 92 58 26 40 40
10: 28 AB 07 00 09 00 10 92 - FB 01 C8 0A 28 AB 07 00
20: 04 00 04 90 44 00 21 00 - 0F 00 00 00 28 AA 07 00
30: 04 00 E8 80 80 08 0C 3C - 0F 00 00 00 28 AA 07 00
40: 04 00 14 86 1F 63 20 03 - 28 AA 07 00 02 00 40 84
50: 00 A0 02 FF 28 AA 07 00 - 0D 00 68 86 2A 82 00 B8
60: 28 AA 07 00 04 00 78 86 - 60 40 83 40 28 AA 07 00
70: 08 00 C0 86 00 00 88 5B - 28 AA 07 00 04 00 10 84
80: 00 00 BF 72 28 AA 07 00 - 05 00 40 86 58 CF 05 01
90: 28 AA 07 00 04 00 C8 86 - 50 88 8D 60 28 AA 07 00
A0: 07 00 2C 86 0A 10 0A 00 - 28 AA 07 00 0E 00 80 86
B0: 60 0F A0 E8 28 AA 07 00 - 07 00 8C 86 58 40 04 00
C0: 28 AA 07 00 02 00 E0 86 - 00 04 00 08 28 AA 07 00
D0: 04 00 C4 86 FF FF 3F FF - 28 AA 07 00 0F 00 64 84
E0: 00 02 1B E0 28 AA 07 00 - 01 00 38 84 7F 00 00 00
F0: 28 AA 07 00 05 00 0C 86 - FF 9B 12 00
[HECI1] Got msg Success: 01FC0008
00: 28 AA 07 00 08 00 24 84 - 10 0A 0B A4 28 AA 07 00
10: 01 00 18 84 7C 00 09 02 - 28 AA 07 00 04 00 BC 86
20: 80 00 10 00 28 AA 07 00 - 06 00 D4 86 C0 80 82 00
30: 28 AA 07 00 02 00 F4 86 - 00 0E 00 00 28 AA 07 00
40: 01 00 5C 86 2A 08 60 00 - 28 AA 07 00 03 00 88 86
50: 20 00 74 24 28 AA 07 00 - 08 00 B4 86 40 40 81 2C
60: 28 AA 07 00 08 00 A0 86 - EC 00 00 1C 28 AA 07 00
70: 03 00 64 86 00 54 00 00 - 28 AA 07 00 04 00 9C 86
80: 00 00 4C 00 28 AA 07 00 - 03 00 4C 86 07 C9 02 01
90: 28 AA 07 00 0A 00 74 86 - 49 FF 80 8D 28 AA 07 00
A0: 01 00 3C 86 F0 00 00 00 - 28 AA 07 00 0D 00 E4 86
B0: 50 05 0B 9C 28 AA 07 00 - 0F 00 F0 86 20 28 28 28
C0: 28 AA 07 00 01 00 28 84 - E0 01 02 01 28 AA 07 00
D0: 01 00 10 86 5F 01 C0 00 - 28 AA 07 00 07 00 A4 86
E0: 1C 1C 1C 00 28 AA 07 00 - 0F 00 EC 86 C4 00 00 00
F0: 28 AA 07 00 01 00 54 85 - 06 2A 29 28 28 AA 07 00
00: 09 00 54 86 02 00 C0 08 - 28 AA 07 00 04 00 00 84
10: 00 01 09 80 28 AA 07 00 - 07 00 04 84 64 C1 24 00
20: 28 AA 07 00 01 00 20 84 - 25 16 07 0D 28 AA 07 00
30: 02 00 3C 84 02 9F 00 00 - 28 AA 07 00 08 00 9C 85
40: 00 0C 49 22 28 AA 07 00 - 03 00 70 86 5A E5 40 40
50: 28 AA 07 00 01 00 90 86 - 48 30 50 75 28 AA 07 00
60: 08 00 84 85 08 0A 00 08 - 28 AA 07 00 03 00 24 86
70: FC 60 33 AA 28 AA 07 00 - 07 00 44 86 4E DE 05 01
80: 28 AA 07 00 08 00 50 86 - 3F 3F 3F 05 28 AA 07 00
90: 01 00 04 86 39 09 05 00 - 28 AA 07 00 02 00 20 86
A0: 00 4C 00 00 28 AA 07 00 - 0F 00 64 84 05 00 33 E0
B0: 28 AA 07 00 02 00 30 86 - 50 C0 00 BE 28 AA 07 00
C0: 0A 00 58 86 09 A0 31 81 - 28 AA 07 00 02 00 8C 85
D0: 00 08 1F 20 28 AA 07 00 - 0A 00 00 86 00 A8 52 00
E0: 28 AA 07 00 0F 00 08 86 - 50 FF FF 3F 28 AA 07 00
F0: 03 00 AC 86 EC 60 00 00 - 28 AA 07 00
[HECI1] Got msg Success: 01FC0008
00: 08 00 60 86 00 00 00 FF - 28 AA 07 00 02 00 1C 84
10: 00 C0 00 60 28 AA 07 00 - 09 00 1C 86 A8 00 3B 6E
20: 28 AA 07 00 01 00 64 86 - 08 54 00 00 0F 00 00 00
30: 28 AA 07 00 0F 00 64 8C - 00 00 33 E0 28 AA 07 00
40: 06 00 04 8C 44 01 24 00 - 28 AA 07 00 08 00 24 8C
50: 10 0A 0B A4 28 AA 07 00 - 01 00 1C 8E A8 00 3B 00
60: 28 AA 07 00 04 00 10 8C - 00 00 BF 72 28 AA 07 00
70: 0F 00 64 8C 00 02 1B E0 - 28 AA 07 00 02 00 00 8E
80: 00 69 52 09 28 AA 07 00 - 07 00 48 8E 4C 19 05 01
90: 28 AA 07 00 02 00 74 8E - 49 FF 80 8E 28 AA 07 00
A0: 0A 00 54 8E 00 01 C0 00 - 28 AA 07 00 01 00 04 8E
B0: 09 09 05 00 28 AA 07 00 - 08 00 B4 8E 40 40 81 2C
C0: 28 AA 07 00 02 00 20 8E - 00 48 00 00 28 AA 07 00
D0: 09 00 08 8E 50 18 E0 21 - 28 AA 07 00 04 00 78 8E
E0: 60 40 83 40 28 AA 07 00 - 06 00 8C 8E 7C 80 08 00
F0: 28 AA 07 00 04 00 00 8C - 00 01 09 80 28 AA 07 00
00: 01 00 28 8C E0 01 02 01 - 0F 00 00 00 28 A9 07 00
10: 01 00 04 80 60 00 00 20 - 28 A9 07 00 01 00 30 80
20: 01 04 30 00 28 A9 07 00 - 01 00 3C 80 06 00 00 00
30: 28 A9 07 00 04 00 E8 80 - 80 08 0C 3C 28 A9 07 00
40: 08 00 38 81 C4 C4 00 00 - 28 A9 07 00 0A 00 B0 81
50: 00 3C 00 78 28 A9 07 00 - 01 00 C8 81 01 00 00 00
60: 28 A9 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
70: 28 A9 07 00 07 00 44 86 - 4E DE 05 01 28 A9 07 00
80: 07 00 2C 86 0A 10 0A 00 - 28 A9 07 00 02 00 30 86
90: 50 C0 00 BE 28 A9 07 00 - 01 00 5C 86 2A 08 60 00
A0: 28 A9 07 00 02 00 3C 84 - 02 9F 00 00 28 A9 07 00
B0: 02 00 E0 86 00 04 00 08 - 28 A9 07 00 01 00 28 84
C0: E0 01 02 01 28 A9 07 00 - 08 00 50 86 3F 3F 3F 05
D0: 28 A9 07 00 01 00 3C 86 - F0 00 00 00 28 A9 07 00
E0: 03 00 AC 86 EC 60 00 00 - 28 A9 07 00 01 00 18 84
F0: 7C 00 09 02 28 A9 07 00 - 04 00 00 84
[HECI1] Got msg Success: 01FC0008
00: 00 01 09 80 28 A9 07 00 - 04 00 9C 86 00 00 4C 00
10: 28 A9 07 00 01 00 04 86 - 39 09 05 00 28 A9 07 00
20: 07 00 A4 86 1C 1C 1C 00 - 28 A9 07 00 04 00 BC 86
30: 80 00 10 00 28 A9 07 00 - 0F 00 F0 86 20 28 28 28
40: 28 A9 07 00 08 00 9C 85 - 00 0C 49 22 28 A9 07 00
50: 01 00 20 84 25 16 07 0D - 28 A9 07 00 0A 00 00 86
60: 00 A8 52 00 28 A9 07 00 - 04 00 78 86 60 40 83 40
70: 28 A9 07 00 0F 00 64 84 - 00 02 1B E0 28 A9 07 00
80: 02 00 1C 84 00 C0 00 60 - 28 A9 07 00 05 00 0C 86
90: FF 9B 12 00 28 A9 07 00 - 04 00 C8 86 50 88 8D 60
A0: 28 A9 07 00 03 00 88 86 - 20 00 74 24 28 A9 07 00
B0: 08 00 C0 86 00 00 88 5B - 28 A9 07 00 03 00 24 86
C0: FC 60 33 AA 28 A9 07 00 - 02 00 40 84 00 A0 02 FF
D0: 28 A9 07 00 07 00 04 84 - 64 C1 24 00 28 A9 07 00
E0: 01 00 90 86 48 30 50 75 - 28 A9 07 00 04 00 14 86
F0: 1F 63 20 03 28 A9 07 00 - 09 00 1C 86 A8 00 3B 6E
00: 28 A9 07 00 02 00 8C 85 - 00 08 1F 20 28 A9 07 00
10: 08 00 24 84 10 0A 0B A4 - 28 A9 07 00 05 00 40 86
20: 58 CF 05 01 28 A9 07 00 - 02 00 20 86 00 4C 00 00
30: 28 A9 07 00 0F 00 08 86 - 50 FF FF 3F 28 A9 07 00
40: 03 00 4C 86 07 C9 02 01 - 28 A9 07 00 0D 00 68 86
50: 2A 82 00 B8 28 A9 07 00 - 0F 00 64 84 05 00 33 E0
60: 28 A9 07 00 03 00 64 86 - 00 54 00 00 28 A9 07 00
70: 04 00 10 84 00 00 BF 72 - 28 A9 07 00 01 00 10 86
80: 5F 01 C0 00 28 A9 07 00 - 0E 00 80 86 60 0F A0 E8
90: 28 A9 07 00 0A 00 58 86 - 09 A0 31 81 28 A9 07 00
A0: 08 00 84 85 08 0A 00 08 - 28 A9 07 00 07 00 8C 86
B0: 58 40 04 00 28 A9 07 00 - 08 00 A0 86 EC 00 00 1C
C0: 28 A9 07 00 0D 00 E4 86 - 50 05 0B 9C 28 A9 07 00
D0: 08 00 B4 86 40 40 81 2C - 28 A9 07 00 0A 00 74 86
E0: 49 FF 80 8D 28 A9 07 00 - 01 00 54 85 06 2A 29 28
F0: 28 A9 07 00 09 00 54 86 - 02 00 C0 08
[HECI1] Got msg Success: 01FC0008
00: 28 A9 07 00 03 00 70 86 - 5A E5 40 40 28 A9 07 00
10: 04 00 C4 86 FF FF 3F FF - 28 A9 07 00 0F 00 EC 86
20: C4 00 00 00 28 A9 07 00 - 08 00 60 86 00 00 00 FF
30: 28 A9 07 00 06 00 D4 86 - C0 80 82 00 28 A9 07 00
40: 01 00 38 84 7F 00 00 00 - 28 A9 07 00 02 00 F4 86
50: 00 0E 00 00 28 A9 07 00 - 01 00 64 86 08 54 00 00
60: 0F 00 00 00 28 A9 07 00 - 08 00 B4 8E 40 40 81 2C
70: 28 A9 07 00 09 00 08 8E - 50 18 E0 21 28 A9 07 00
80: 04 00 78 8E 60 40 83 40 - 28 A9 07 00 06 00 8C 8E
90: 7C 80 08 00 28 A9 07 00 - 06 00 04 8C 44 01 24 00
A0: 28 A9 07 00 07 00 48 8E - 4C 19 05 01 28 A9 07 00
B0: 0A 00 54 8E 00 01 C0 00 - 28 A9 07 00 04 00 10 8C
C0: 00 00 BF 72 28 A9 07 00 - 0F 00 64 8C 00 02 1B E0
D0: 28 A9 07 00 0F 00 64 8C - 00 00 33 E0 28 A9 07 00
E0: 02 00 00 8E 00 69 52 09 - 28 A9 07 00 02 00 74 8E
F0: 49 FF 80 8E 28 A9 07 00 - 08 00 24 8C 10 0A 0B A4
00: 28 A9 07 00 01 00 28 8C - E0 01 02 01 28 A9 07 00
10: 01 00 1C 8E A8 00 3B 00 - 28 A9 07 00 04 00 00 8C
20: 00 01 09 80 28 A9 07 00 - 02 00 20 8E 00 48 00 00
30: 28 A9 07 00 01 00 04 8E - 09 09 05 00 0F 00 00 00
40: 28 A9 07 00 02 00 74 96 - 49 FF 80 8E 28 A9 07 00
50: 02 00 18 96 BF 00 00 00 - 28 A9 07 00 04 00 5C 96
60: 2A 08 30 00 28 A9 07 00 - 09 00 1C 96 58 00 3B 01
70: 28 A9 07 00 04 00 18 94 - 7C 00 39 02 28 A9 07 00
80: 0C 00 58 96 09 A0 33 01 - 28 A9 07 00 02 00 00 96
90: 00 29 52 09 28 A9 07 00 - 0F 00 04 94 45 01 24 04
A0: 28 A9 07 00 07 00 48 96 - 4C 15 05 01 28 A9 07 00
B0: 08 00 E8 96 00 48 17 2C - 28 A9 07 00 03 00 04 96
C0: 09 00 05 00 28 A9 07 00 - 03 00 58 95 00 28 1F 15
D0: 28 A9 07 00 01 00 6C 96 - 28 24 04 48 28 A9 07 00
E0: 01 00 28 94 E0 01 02 01 - 28 A9 07 00 0F 00 64 94
F0: 00 02 1B E0 28 A9 07 00 - 0F 00 54 95
[HECI1] Got msg Success: 01FC0008
00: 06 2D 2D 28 28 A9 07 00 - 04 00 00 94 00 01 09 80
10: 28 A9 07 00 08 00 88 96 - 00 30 74 64 28 A9 07 00
20: 08 00 A0 96 EC 00 00 2B - 28 A9 07 00 02 00 2C 96
30: 0A 50 0A 00 28 A9 07 00 - 02 00 F4 96 00 18 00 00
40: 28 A9 07 00 07 00 8C 96 - 70 20 08 00 28 A9 07 00
50: 08 00 24 94 10 0A 0B A4 - 28 A9 07 00 04 00 10 94
60: 00 00 BF 72 28 A9 07 00 - 0F 00 64 94 00 00 33 E0
70: 28 A9 07 00 04 00 9C 96 - 00 00 20 00 28 A9 07 00
80: 07 00 A4 96 2B 2B 2B 00 - 28 A9 07 00 0B 00 54 96
90: 02 01 C0 00 28 A9 07 00 - 05 00 40 96 5E CF 18 01
A0: 28 A9 07 00 08 00 B4 96 - 40 40 81 2C 28 A9 07 00
B0: 04 00 78 96 60 40 83 40 - 28 A9 07 00 08 00 50 96
C0: 3F 3F 3F 01 28 A9 07 00 - 09 00 68 96 1E 82 00 BA
D0: 28 A9 07 00 09 00 08 96 - 50 18 E0 21 28 A9 07 00
E0: 02 00 20 96 00 48 00 00 - 28 A9 07 00 04 00 C8 96
F0: 50 88 4F 60 28 A9 07 00 - 07 00 44 96 48 15 05 01
00: 0F 00 00 00 28 A8 07 00 - 01 00 04 80 60 00 00 20
10: 28 A8 07 00 01 00 30 80 - 01 04 30 00 28 A8 07 00
20: 01 00 3C 80 06 00 00 00 - 28 A8 07 00 04 00 E8 80
30: 80 08 0C 3C 28 A8 07 00 - 08 00 38 81 AC D4 00 00
40: 28 A8 07 00 0B 00 90 81 - 02 06 01 0C 28 A8 07 00
50: 05 00 A8 81 06 00 1F 00 - 28 A8 07 00 0A 00 B0 81
60: 00 3C 00 78 28 A8 07 00 - 01 00 C8 81 01 00 00 00
70: 28 A8 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
80: 0F 00 00 00 29 AC 07 00 - 04 00 1C 01 01 30 00 80
90: 29 AC 07 00 06 00 0C B1 - 40 00 07 00 29 AC 07 00
A0: 02 00 6C 03 0B 03 00 00 - 29 AC 07 00 0A 00 70 03
B0: 00 3C 00 78 29 AC 07 00 - 01 00 88 03 01 00 00 00
C0: 29 AC 07 00 01 00 14 B1 - E9 D4 25 48 29 AC 07 00
D0: 04 00 50 03 03 09 02 0C - 0F 00 00 00 28 6A 07 00
E0: 07 00 6C 04 00 00 03 00 - 28 6A 07 00 07 00 EC 03
F0: 00 00 03 00 28 6A 07 00 - 07 00 8C 04
[HECI1] Got msg Success: 01FC0008
00: 00 00 03 00 28 6A 07 00 - 07 00 0C 04 00 00 03 00
10: 28 6E 07 00 07 00 2C 04 - 00 00 00 00 28 6E 07 00
20: 07 00 4C 04 00 00 00 00 - 28 6E 07 00 07 00 6C 04
30: 00 00 00 00 28 6E 07 00 - 07 00 8C 04 00 00 00 00
40: 28 69 07 00 02 00 10 03 - 00 30 00 06 28 69 07 00
50: 03 00 04 03 18 18 00 C0 - 28 69 07 00 07 00 0C 03
60: 18 18 03 00 28 69 07 00 - 02 00 30 03 00 30 00 07
70: 28 69 07 00 03 00 24 03 - 18 18 00 C0 28 69 07 00
80: 07 00 2C 03 18 18 03 00 - 28 6E 07 00 02 00 70 03
90: 04 30 00 06 28 6E 07 00 - 03 00 64 03 00 00 00 C0
A0: 28 6E 07 00 07 00 6C 03 - 00 00 03 00 28 6E 07 00
B0: 02 00 90 03 04 30 00 07 - 28 6E 07 00 03 00 84 03
C0: 00 00 00 C0 28 6E 07 00 - 07 00 8C 03 00 00 03 00
D0: 28 6D 07 00 02 00 D0 03 - 04 30 20 07 28 6D 07 00
E0: 03 00 C4 03 00 00 00 C0 - 28 6D 07 00 07 00 CC 03
F0: 00 00 03 00 28 6D 07 00 - 07 00 AC 03 00 00 03 00
00: 28 6D 07 00 07 00 2C 03 - 00 00 03 00 28 6D 07 00
10: 07 00 EC 03 00 00 03 00 - 28 6D 07 00 0C 00 04 07
20: 6C 00 80 01 28 6D 07 00 - 08 00 08 07 00 00 00 00
30: 28 6D 07 00 0C 00 14 07 - 6D 00 80 01 28 6D 07 00
40: 08 00 18 07 00 00 00 00 - 28 6D 07 00 0C 00 24 07
50: 6E 00 80 01 28 6D 07 00 - 08 00 28 07 00 00 00 00
60: 28 6D 07 00 0C 00 34 07 - 6F 00 80 01 28 6D 07 00
70: 08 00 38 07 00 00 00 00 - 28 6D 07 00 0C 00 44 07
80: 70 00 80 01 28 6D 07 00 - 08 00 48 07 00 00 00 00
90: 28 6D 07 00 0C 00 54 07 - 71 00 80 01 28 6D 07 00
A0: 08 00 58 07 00 00 00 00 - 28 6D 07 00 0C 00 64 07
B0: 72 00 80 01 28 6D 07 00 - 08 00 68 07 00 00 00 00
C0: 28 6D 07 00 0C 00 74 07 - 73 00 80 01 28 6D 07 00
D0: 08 00 78 07 00 00 00 00 - 28 6D 07 00 08 00 10 03
E0: 00 20 20 02 28 6A 07 00 - 02 00 B0 04 00 00 20 07
F0: 28 6A 07 00 03 00 A4 04 - 00 00 00 C0
[HECI1] Got msg Success: 804C0008
00: 28 6A 07 00 02 00 D0 04 - 00 00 20 07 28 6A 07 00
10: 03 00 C4 04 00 00 00 C0 - 28 6A 07 00 02 00 70 03
20: 04 20 00 07 28 6A 07 00 - 03 00 64 03 00 00 00 C0
30: 28 6A 07 00 07 00 6C 03 - 00 00 02 00 28 6D 07 00
40: 07 00 8C 03 00 00 02 00 - 0F 00 00 00
PeiHeciReadChipsetInitMsg(): End
//*****************ChipsetInitTable BIOS Table Start*****************
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0x7D0C
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 1
//Base CRC Valid: 1
// Phy Data Group Table (Fixed table with 16 Entries)
//Id: 0x0, RecordOffset: 0x0
//Id: 0x4, RecordOffset: 0x444
//Id: 0x5, RecordOffset: 0x45A
//Id: 0xA, RecordOffset: 0x4F4
//Id: 0x9, RecordOffset: 0x56D
//Id: 0xF, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
// HSIO Command Table
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x81, 0x19, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8180, Value: 0x19
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x88, 0x81, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8188, Value: 0x0
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x90, 0x81, 0x02, 0x07, 0x01, 0x0C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8190, Value: 0xC010702
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x98, 0x81, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8198, Value: 0x20000
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x9C, 0x81, 0x03, 0x00, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x819C, Value: 0x1C0003
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA0, 0x81, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x81A0, Value: 0x0
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0xA8, 0x81, 0x06, 0x00, 0x1F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x81A8, Value: 0x1F0006
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x81, 0x0B, 0x03, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x81AC, Value: 0x30B
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xE8, 0x86, 0x00, 0x48, 0x17, 0x1A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86E8, Value: 0x1A174800
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0xF0, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A0F0
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x08, 0x00, 0x08, 0xF3, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xF3080008
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0xC0, 0x86, 0x00, 0x10, 0x88, 0x1B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86C0, Value: 0x1B881000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x32, 0x81, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8658, Value: 0x8132A009
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x20, 0x87, 0x04, 0x02, 0x12, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8720, Value: 0x8120204
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x54, 0x87, 0x80, 0x50, 0x06, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8754, Value: 0x65080
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x44, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4400
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x10, 0x86, 0xFF, 0x01, 0xC8, 0x1E, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8610, Value: 0x1EC801FF
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x9F, 0x63, 0x0C, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x30C639F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x5A, 0x10, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0x8105A
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x28, 0x87, 0x00, 0x00, 0x04, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8728, Value: 0xFC040000
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x864C, Value: 0x105C907
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x87, 0xFF, 0x08, 0x01, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x874C, Value: 0x108FF
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x64, 0x86, 0x00, 0xA4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8664, Value: 0xA400
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x50, 0x87, 0x6E, 0x80, 0x10, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8750, Value: 0x1010806E
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x86, 0x60, 0x17, 0xA0, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8680, Value: 0x1A01760
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xA0, 0x86, 0xEC, 0x70, 0xC0, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x86A0, Value: 0x28C070EC
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xC4, 0x86, 0xD1, 0xEC, 0x21, 0xE4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86C4, Value: 0xE421ECD1
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x92, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x929BFF
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x24, 0x87, 0x22, 0x22, 0x26, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x8724, Value: 0x10262222
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x88, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8654, Value: 0x88C00002
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x3F8D8850
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x2C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x2C0000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x18, 0x86, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8618, Value: 0xBF
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0x04, 0x80, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0x8004
0x28, 0xAB, 0x07, 0x00, 0x0E, 0x00, 0x08, 0x87, 0x45, 0xF4, 0xDF, 0xCC, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8708, Value: 0xCCDFF445
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x28, 0x28, 0x28, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x282828
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x70, 0x86, 0x5E, 0x25, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8670, Value: 0x4040255E
0x28, 0xAB, 0x07, 0x00, 0x0B, 0x00, 0x88, 0x86, 0x20, 0x70, 0x74, 0xE4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x8688, Value: 0xE4747020
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x48, 0x87, 0x88, 0x0A, 0x8D, 0xD7, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8748, Value: 0xD78D0A88
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x40, 0x87, 0x0A, 0x00, 0xE2, 0x16, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8740, Value: 0x16E2000A
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x89, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80890100
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x1C, 0x86, 0x08, 0x10, 0x3B, 0x68, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x861C, Value: 0x683B1008
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x87, 0x03, 0x7F, 0x1B, 0x1B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x871C, Value: 0x1B1B7F03
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xE4, 0x86, 0x50, 0x45, 0x0B, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86E4, Value: 0x1C0B4550
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2E, 0x08, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x3B082E
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC0, 0x11, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x11C064
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x70, 0xA8, 0x52, 0x0B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0xB52A870
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x89, 0x02, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x289007C
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x58, 0x85, 0x20, 0x1E, 0x1F, 0x15, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8558, Value: 0x151F1E20
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x04, 0x86, 0x09, 0x09, 0x0F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8604, Value: 0xF0909
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x18, 0x87, 0x00, 0x0C, 0x00, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8718, Value: 0x1000C00
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x10, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8668, Value: 0xB810822A
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0xA4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0xA408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x48, 0x93, 0x88, 0x0A, 0x8A, 0xD3, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9348, Value: 0xD38A0A88
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x5C, 0x93, 0x33, 0x33, 0x24, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x935C, Value: 0x20243333
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x64, 0x91, 0x4C, 0x60, 0x4C, 0x4C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9164, Value: 0x4C4C604C
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x92, 0x1E, 0x1E, 0x1E, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x92A4, Value: 0x1E1E1E
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x14, 0x90, 0x1D, 0xC5, 0x00, 0x11, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9014, Value: 0x1100C51D
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xC4, 0x92, 0xD1, 0xEC, 0x01, 0xE6, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x92C4, Value: 0xE601ECD1
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x1C, 0x93, 0x03, 0x7F, 0x21, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x931C, Value: 0x21217F03
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0xE4, 0x92, 0x40, 0xA5, 0x0B, 0x4B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x92E4, Value: 0x4B0BA540
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x18, 0x93, 0x01, 0x00, 0x00, 0x4A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9318, Value: 0x4A000001
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x54, 0x93, 0x80, 0x54, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9354, Value: 0x25480
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x90, 0x0F, 0x0C, 0x0C, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9024, Value: 0xA40C0C0F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x28, 0x90, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9028, Value: 0x10201E0
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xE8, 0x92, 0x00, 0x48, 0x26, 0x1A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x92E8, Value: 0x1A264800
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x20, 0x90, 0x26, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9020, Value: 0xD071626
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x92, 0xF8, 0x10, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x921C, Value: 0x3B10F8
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xC8, 0x92, 0x50, 0x88, 0x8D, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x92C8, Value: 0xD8D8850
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xE0, 0x92, 0x32, 0x60, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x92E0, Value: 0x8006032
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xAC, 0x92, 0xF6, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x92AC, Value: 0x60F6
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x14, 0x92, 0x9F, 0x61, 0x38, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x9214, Value: 0x338619F
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x14, 0x93, 0x08, 0x1C, 0x05, 0x0F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9314, Value: 0xF051C08
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x93, 0x36, 0x38, 0xB2, 0x1F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9324, Value: 0x1FB23836
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x92, 0x70, 0x94, 0x52, 0x0B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x9200, Value: 0xB529470
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x44, 0x93, 0x2B, 0x1C, 0x18, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9344, Value: 0x181C2B
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x92, 0x49, 0xCD, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x924C, Value: 0x105CD49
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x93, 0xDC, 0x4F, 0x01, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x934C, Value: 0x14FDC
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x28, 0x93, 0x00, 0x00, 0x1A, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9328, Value: 0xFF1A0000
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x60, 0x92, 0x08, 0x00, 0x08, 0x33, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9260, Value: 0x33080008
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x58, 0x93, 0xA4, 0x9C, 0x8C, 0x31, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9358, Value: 0x318C9CA4
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x64, 0x92, 0x00, 0x54, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x9264, Value: 0x25400
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x54, 0x91, 0x06, 0x2A, 0x2D, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9154, Value: 0x282D2A06
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x68, 0x92, 0x06, 0x82, 0x10, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9268, Value: 0xB8108206
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x44, 0x90, 0x97, 0x48, 0x09, 0x64, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9044, Value: 0x64094897
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x92, 0x40, 0x17, 0x04, 0x04, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9280, Value: 0x4041740
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x92, 0xEC, 0x70, 0x80, 0x1E, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x92A0, Value: 0x1E8070EC
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x10, 0x93, 0x68, 0x00, 0x40, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9310, Value: 0x400068
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x84, 0x91, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9184, Value: 0x8000A08
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x88, 0x92, 0x10, 0x30, 0x77, 0x64, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9288, Value: 0x64773010
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x78, 0x92, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9278, Value: 0x40834060
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x92, 0x0C, 0x00, 0x0B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x922C, Value: 0xB000C
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x04, 0x92, 0x09, 0x0B, 0x0F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9204, Value: 0xF0B09
0x28, 0xAB, 0x07, 0x00, 0x0D, 0x00, 0x40, 0x92, 0x4E, 0xCF, 0x18, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x9240, Value: 0x318CF4E
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x6C, 0x92, 0x00, 0x24, 0x04, 0x5C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x926C, Value: 0x5C042400
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x20, 0x93, 0x04, 0x21, 0x03, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9320, Value: 0xD032104
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x0C, 0x93, 0x1F, 0xE0, 0x21, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x930C, Value: 0x2121E01F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x92, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x923C, Value: 0xF0
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x0C, 0x92, 0xE6, 0x9B, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x920C, Value: 0x529BE6
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x18, 0x92, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9218, Value: 0xBF
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x90, 0x96, 0xBC, 0x1F, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x905C, Value: 0x3F1FBC96
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x00, 0x90, 0x00, 0x01, 0x89, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9000, Value: 0x80890100
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x08, 0x93, 0x45, 0x34, 0x48, 0xD0, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9308, Value: 0xD0483445
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x50, 0x93, 0x6E, 0x80, 0x10, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9350, Value: 0x1010806E
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x04, 0x93, 0x80, 0xAA, 0x11, 0xC0, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9304, Value: 0xC011AA80
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x91, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x918C, Value: 0x201F0800
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x92, 0x50, 0xD1, 0xEC, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9208, Value: 0x1ECD150
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x7C, 0x92, 0x18, 0x18, 0x26, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x927C, Value: 0x40261818
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0xCC, 0x92, 0x25, 0x17, 0x17, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x92CC, Value: 0x5B171725
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x92, 0x40, 0x40, 0x81, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x92B4, Value: 0x8814040
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x60, 0x93, 0x72, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9360, Value: 0x72
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x92, 0x20, 0x48, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x928C, Value: 0x824820
0x28, 0xAB, 0x07, 0x00, 0x0E, 0x00, 0x40, 0x93, 0x0A, 0x00, 0xEB, 0x1F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x9340, Value: 0x1FEB000A
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x70, 0x92, 0x58, 0x26, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9270, Value: 0x40402658
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0x10, 0x92, 0xFB, 0x01, 0xC8, 0x0A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9210, Value: 0xAC801FB
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x04, 0x90, 0x44, 0x00, 0x21, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9004, Value: 0x210044
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x1F, 0x63, 0x20, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x320631F
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0x00, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A000
0x28, 0xAA, 0x07, 0x00, 0x0D, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x00, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x8668, Value: 0xB800822A
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xC0, 0x86, 0x00, 0x00, 0x88, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86C0, Value: 0x5B880000
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xAA, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x608D8850
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x0A, 0x10, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0xA100A
0x28, 0xAA, 0x07, 0x00, 0x0E, 0x00, 0x80, 0x86, 0x60, 0x0F, 0xA0, 0xE8, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8680, Value: 0xE8A00F60
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0xE0, 0x86, 0x00, 0x04, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86E0, Value: 0x8000400
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xC4, 0x86, 0xFF, 0xFF, 0x3F, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C4, Value: 0xFF3FFFFF
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE01B0200
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x38, 0x84, 0x7F, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8438, Value: 0x7F
0x28, 0xAA, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x12, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x129BFF
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x09, 0x02, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x209007C
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xBC, 0x86, 0x80, 0x00, 0x10, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86BC, Value: 0x100080
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x86, 0x00, 0x0E, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86F4, Value: 0xE00
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2A, 0x08, 0x60, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x60082A
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x88, 0x86, 0x20, 0x00, 0x74, 0x24, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8688, Value: 0x24740020
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x86, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86B4, Value: 0x2C814040
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x86, 0xEC, 0x00, 0x00, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86A0, Value: 0x1C0000EC
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x64, 0x86, 0x00, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8664, Value: 0x5400
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x4C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x4C0000
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x864C, Value: 0x102C907
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x74, 0x86, 0x49, 0xFF, 0x80, 0x8D, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8674, Value: 0x8D80FF49
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xAA, 0x07, 0x00, 0x0D, 0x00, 0xE4, 0x86, 0x50, 0x05, 0x0B, 0x9C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x86E4, Value: 0x9C0B0550
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x10, 0x86, 0x5F, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8610, Value: 0xC0015F
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x1C, 0x1C, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x1C1C1C
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0xC4, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0xC4
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8654, Value: 0x8C00002
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80090100
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC1, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x24C164
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x70, 0x86, 0x5A, 0xE5, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8670, Value: 0x4040E55A
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x90, 0x86, 0x48, 0x30, 0x50, 0x75, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8690, Value: 0x75503048
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x24, 0x86, 0xFC, 0x60, 0x33, 0xAA, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8624, Value: 0xAA3360FC
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x04, 0x86, 0x39, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8604, Value: 0x50939
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x4C, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4C00
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x05, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE0330005
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x31, 0x81, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8658, Value: 0x8131A009
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x00, 0xA8, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0x52A800
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x00, 0x00, 0x00, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xFF000000
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x86, 0xA8, 0x00, 0x3B, 0x6E, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x861C, Value: 0x6E3B00A8
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0x5408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE0330000
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0x04, 0x8C, 0x44, 0x01, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8C04, Value: 0x240144
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x24, 0x8C, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8C24, Value: 0xA40B0A10
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x8E, 0xA8, 0x00, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E1C, Value: 0x3B00A8
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x10, 0x8C, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C10, Value: 0x72BF0000
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE01B0200
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x00, 0x8E, 0x00, 0x69, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E00, Value: 0x9526900
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x48, 0x8E, 0x4C, 0x19, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8E48, Value: 0x105194C
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x74, 0x8E, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E74, Value: 0x8E80FF49
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x54, 0x8E, 0x00, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8E54, Value: 0xC00100
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x04, 0x8E, 0x09, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E04, Value: 0x50909
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x8E, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8EB4, Value: 0x2C814040
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x20, 0x8E, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E20, Value: 0x4800
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x08, 0x8E, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8E08, Value: 0x21E01850
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x78, 0x8E, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8E78, Value: 0x40834060
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0x8C, 0x8E, 0x7C, 0x80, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8E8C, Value: 0x8807C
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x00, 0x8C, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C00, Value: 0x80090100
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x28, 0x8C, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8C28, Value: 0x10201E0
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x38, 0x81, 0xC4, 0xC4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8138, Value: 0xC4C4
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x10, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1001
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x0A, 0x10, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0xA100A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2A, 0x08, 0x60, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x60082A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xE0, 0x86, 0x00, 0x04, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86E0, Value: 0x8000400
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x09, 0x02, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x209007C
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x4C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x4C0000
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x86, 0x39, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8604, Value: 0x50939
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x1C, 0x1C, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x1C1C1C
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xBC, 0x86, 0x80, 0x00, 0x10, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86BC, Value: 0x100080
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x00, 0xA8, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0x52A800
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x12, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x129BFF
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x608D8850
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x88, 0x86, 0x20, 0x00, 0x74, 0x24, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8688, Value: 0x24740020
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xC0, 0x86, 0x00, 0x00, 0x88, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86C0, Value: 0x5B880000
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x24, 0x86, 0xFC, 0x60, 0x33, 0xAA, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8624, Value: 0xAA3360FC
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0x00, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A000
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC1, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x24C164
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x90, 0x86, 0x48, 0x30, 0x50, 0x75, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8690, Value: 0x75503048
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x1F, 0x63, 0x20, 0x03, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x320631F
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x86, 0xA8, 0x00, 0x3B, 0x6E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x861C, Value: 0x6E3B00A8
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x4C, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4C00
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x864C, Value: 0x102C907
0x28, 0xA9, 0x07, 0x00, 0x0D, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x00, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x8668, Value: 0xB800822A
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x05, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE0330005
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x64, 0x86, 0x00, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8664, Value: 0x5400
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x10, 0x86, 0x5F, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8610, Value: 0xC0015F
0x28, 0xA9, 0x07, 0x00, 0x0E, 0x00, 0x80, 0x86, 0x60, 0x0F, 0xA0, 0xE8, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8680, Value: 0xE8A00F60
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x31, 0x81, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8658, Value: 0x8131A009
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x86, 0xEC, 0x00, 0x00, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86A0, Value: 0x1C0000EC
0x28, 0xA9, 0x07, 0x00, 0x0D, 0x00, 0xE4, 0x86, 0x50, 0x05, 0x0B, 0x9C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x86E4, Value: 0x9C0B0550
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x86, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86B4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x74, 0x86, 0x49, 0xFF, 0x80, 0x8D, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8674, Value: 0x8D80FF49
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8654, Value: 0x8C00002
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x70, 0x86, 0x5A, 0xE5, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8670, Value: 0x4040E55A
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC4, 0x86, 0xFF, 0xFF, 0x3F, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C4, Value: 0xFF3FFFFF
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0xC4, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0xC4
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x00, 0x00, 0x00, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xFF000000
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x38, 0x84, 0x7F, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8438, Value: 0x7F
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x86, 0x00, 0x0E, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86F4, Value: 0xE00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0x5408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x8E, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8EB4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x08, 0x8E, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8E08, Value: 0x21E01850
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x8E, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8E78, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0x8C, 0x8E, 0x7C, 0x80, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8E8C, Value: 0x8807C
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0x04, 0x8C, 0x44, 0x01, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8C04, Value: 0x240144
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x48, 0x8E, 0x4C, 0x19, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8E48, Value: 0x105194C
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x54, 0x8E, 0x00, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8E54, Value: 0xC00100
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x8C, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C10, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE0330000
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x00, 0x8E, 0x00, 0x69, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E00, Value: 0x9526900
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x74, 0x8E, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E74, Value: 0x8E80FF49
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x8C, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8C24, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x8C, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8C28, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x8E, 0xA8, 0x00, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E1C, Value: 0x3B00A8
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x8C, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C00, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x8E, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E20, Value: 0x4800
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x8E, 0x09, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E04, Value: 0x50909
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x74, 0x96, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9674, Value: 0x8E80FF49
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x18, 0x96, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9618, Value: 0xBF
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x5C, 0x96, 0x2A, 0x08, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x965C, Value: 0x30082A
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x96, 0x58, 0x00, 0x3B, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x961C, Value: 0x13B0058
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x18, 0x94, 0x7C, 0x00, 0x39, 0x02, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9418, Value: 0x239007C
0x28, 0xA9, 0x07, 0x00, 0x0C, 0x00, 0x58, 0x96, 0x09, 0xA0, 0x33, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9658, Value: 0x133A009
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x00, 0x96, 0x00, 0x29, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9600, Value: 0x9522900
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x94, 0x45, 0x01, 0x24, 0x04, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9404, Value: 0x4240145
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x48, 0x96, 0x4C, 0x15, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9648, Value: 0x105154C
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xE8, 0x96, 0x00, 0x48, 0x17, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96E8, Value: 0x2C174800
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x04, 0x96, 0x09, 0x00, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9604, Value: 0x50009
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x58, 0x95, 0x00, 0x28, 0x1F, 0x15, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9558, Value: 0x151F2800
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x6C, 0x96, 0x28, 0x24, 0x04, 0x48, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x966C, Value: 0x48042428
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x94, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9428, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x94, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9464, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x54, 0x95, 0x06, 0x2D, 0x2D, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9554, Value: 0x282D2D06
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x94, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9400, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x88, 0x96, 0x00, 0x30, 0x74, 0x64, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9688, Value: 0x64743000
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x96, 0xEC, 0x00, 0x00, 0x2B, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96A0, Value: 0x2B0000EC
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x2C, 0x96, 0x0A, 0x50, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x962C, Value: 0xA500A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x96, 0x00, 0x18, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x96F4, Value: 0x1800
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x96, 0x70, 0x20, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x968C, Value: 0x82070
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x94, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9424, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x94, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9410, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x94, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9464, Value: 0xE0330000
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x96, 0x00, 0x00, 0x20, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x969C, Value: 0x200000
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x96, 0x2B, 0x2B, 0x2B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x96A4, Value: 0x2B2B2B
0x28, 0xA9, 0x07, 0x00, 0x0B, 0x00, 0x54, 0x96, 0x02, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x9654, Value: 0xC00102
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x40, 0x96, 0x5E, 0xCF, 0x18, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9640, Value: 0x118CF5E
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x96, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96B4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x96, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9678, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x50, 0x96, 0x3F, 0x3F, 0x3F, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9650, Value: 0x13F3F3F
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x68, 0x96, 0x1E, 0x82, 0x00, 0xBA, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9668, Value: 0xBA00821E
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x08, 0x96, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9608, Value: 0x21E01850
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x96, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9620, Value: 0x4800
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x96, 0x50, 0x88, 0x4F, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x96C8, Value: 0x604F8850
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x44, 0x96, 0x48, 0x15, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9644, Value: 0x1051548
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xA8, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xA8, 0x07, 0x00, 0x08, 0x00, 0x38, 0x81, 0xAC, 0xD4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8138, Value: 0xD4AC
0x28, 0xA8, 0x07, 0x00, 0x0B, 0x00, 0x90, 0x81, 0x02, 0x06, 0x01, 0x0C, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x8190, Value: 0xC010602
0x28, 0xA8, 0x07, 0x00, 0x05, 0x00, 0xA8, 0x81, 0x06, 0x00, 0x1F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x81A8, Value: 0x1F0006
0x28, 0xA8, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x10, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1001
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x29, 0xAC, 0x07, 0x00, 0x04, 0x00, 0x1C, 0x01, 0x01, 0x30, 0x00, 0x80, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x11C, Value: 0x80003001
0x29, 0xAC, 0x07, 0x00, 0x06, 0x00, 0x0C, 0xB1, 0x40, 0x00, 0x07, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0xB10C, Value: 0x70040
0x29, 0xAC, 0x07, 0x00, 0x02, 0x00, 0x6C, 0x03, 0x0B, 0x03, 0x00, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x36C, Value: 0x30B
0x29, 0xAC, 0x07, 0x00, 0x0A, 0x00, 0x70, 0x03, 0x00, 0x3C, 0x00, 0x78, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x370, Value: 0x78003C00
0x29, 0xAC, 0x07, 0x00, 0x01, 0x00, 0x88, 0x03, 0x01, 0x00, 0x00, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x388, Value: 0x1
0x29, 0xAC, 0x07, 0x00, 0x01, 0x00, 0x14, 0xB1, 0xE9, 0xD4, 0x25, 0x48, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0xB114, Value: 0x4825D4E9
0x29, 0xAC, 0x07, 0x00, 0x04, 0x00, 0x50, 0x03, 0x03, 0x09, 0x02, 0x0C, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x350, Value: 0xC020903
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x46C, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0xEC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3EC, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x48C, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x0C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x40C, Value: 0x30000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x42C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x44C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x46C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x48C, Value: 0x0
0x28, 0x69, 0x07, 0x00, 0x02, 0x00, 0x10, 0x03, 0x00, 0x30, 0x00, 0x06, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x310, Value: 0x6003000
0x28, 0x69, 0x07, 0x00, 0x03, 0x00, 0x04, 0x03, 0x18, 0x18, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x304, Value: 0xC0001818
0x28, 0x69, 0x07, 0x00, 0x07, 0x00, 0x0C, 0x03, 0x18, 0x18, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x30C, Value: 0x31818
0x28, 0x69, 0x07, 0x00, 0x02, 0x00, 0x30, 0x03, 0x00, 0x30, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x330, Value: 0x7003000
0x28, 0x69, 0x07, 0x00, 0x03, 0x00, 0x24, 0x03, 0x18, 0x18, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x324, Value: 0xC0001818
0x28, 0x69, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x03, 0x18, 0x18, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x32C, Value: 0x31818
0x28, 0x6E, 0x07, 0x00, 0x02, 0x00, 0x70, 0x03, 0x04, 0x30, 0x00, 0x06, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x370, Value: 0x6003004
0x28, 0x6E, 0x07, 0x00, 0x03, 0x00, 0x64, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x364, Value: 0xC0000000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x36C, Value: 0x30000
0x28, 0x6E, 0x07, 0x00, 0x02, 0x00, 0x90, 0x03, 0x04, 0x30, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x390, Value: 0x7003004
0x28, 0x6E, 0x07, 0x00, 0x03, 0x00, 0x84, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x384, Value: 0xC0000000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x38C, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x02, 0x00, 0xD0, 0x03, 0x04, 0x30, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x3D0, Value: 0x7203004
0x28, 0x6D, 0x07, 0x00, 0x03, 0x00, 0xC4, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x3C4, Value: 0xC0000000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xCC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3CC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xAC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3AC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x32C, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xEC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3EC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x04, 0x07, 0x6C, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x704, Value: 0x180006C
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x708, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x14, 0x07, 0x6D, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x714, Value: 0x180006D
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x18, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x718, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x24, 0x07, 0x6E, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x724, Value: 0x180006E
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x28, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x728, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x34, 0x07, 0x6F, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x734, Value: 0x180006F
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x38, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x738, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x44, 0x07, 0x70, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x744, Value: 0x1800070
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x48, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x748, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x54, 0x07, 0x71, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x754, Value: 0x1800071
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x58, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x758, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x64, 0x07, 0x72, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x764, Value: 0x1800072
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x68, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x768, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x74, 0x07, 0x73, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x774, Value: 0x1800073
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x78, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x778, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x10, 0x03, 0x00, 0x20, 0x20, 0x02, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x310, Value: 0x2202000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0xB0, 0x04, 0x00, 0x00, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x4B0, Value: 0x7200000
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0xA4, 0x04, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x4A4, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0xD0, 0x04, 0x00, 0x00, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x4D0, Value: 0x7200000
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0xC4, 0x04, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x4C4, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0x70, 0x03, 0x04, 0x20, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x370, Value: 0x7002004
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0x64, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x364, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x03, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x36C, Value: 0x20000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x03, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x38C, Value: 0x20000
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x01, 0x40, 0x06, 0xB8, 0x3D, 0x2F, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4001, Value: 0x2F3DB806
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2B, 0x40, 0x05, 0x40, 0x6A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x402B, Value: 0x6A4005
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x40, 0x80, 0x53, 0xA2, 0x09, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x402C, Value: 0x9A25380
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x7F, 0x80, 0xC6, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7F04, Value: 0xC680
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x70, 0x00, 0xC2, 0x88, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x702C, Value: 0x88C200
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x70, 0x08, 0x1E, 0x64, 0x64, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7000, Value: 0x64641E08
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x70, 0x00, 0xC2, 0x88, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x702C, Value: 0x88C200
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x70, 0x20, 0x5A, 0x2B, 0x22, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7008, Value: 0x222B5A20
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x14, 0x70, 0x18, 0x4D, 0xE9, 0x59, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7014, Value: 0x59E94D18
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x70, 0x00, 0xE8, 0x01, 0x30, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7024, Value: 0x3001E800
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x41, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4100, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x41, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4126, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x41, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4108, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x42, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4200, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x42, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4226, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x42, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4208, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x43, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4300, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x43, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4326, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x43, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4308, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x44, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4400, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x44, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4426, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x44, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4408, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x45, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4500, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x45, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4526, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x45, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4508, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x46, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4600, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x46, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4626, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x46, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4608, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x47, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4700, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x47, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4726, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x47, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4708, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x48, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4800, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x48, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4826, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x48, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4808, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x49, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4900, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x49, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4926, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x49, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4908, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x4A, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A00, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x4A, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A26, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x4A, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A08, Value: 0xDAD0
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x3C, 0x80, 0x07, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x803C, Value: 0x7
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x0F, 0x00, 0x00, 0x00, //End Table Marker
//*****************ChipsetInitTable BIOS Table End*****************
Push Updated ChipsetInit table with CSME
PeiHeciWriteChipsetInitMsg(): Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 01FC0008
00: 00 00 05 00 19 00 00 00 - 00 00 00 00 0C 16 00 00
10: 00 00 00 00 00 00 00 00 - 0D 71 0C 7D FF FF 08 06
20: 10 00 0C 00 00 00 44 44 - 45 A5 4F 4A 56 D9 00 0F
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 28 AB 07 00 - 01 00 04 80 60 00 00 20
50: 28 AB 07 00 01 00 30 80 - 01 04 30 00 28 AB 07 00
60: 01 00 3C 80 06 00 00 00 - 28 AB 07 00 04 00 E8 80
70: 80 08 0C 3C 28 AB 07 00 - 0F 00 80 81 19 00 00 00
80: 28 AB 07 00 07 00 88 81 - 00 00 00 00 28 AB 07 00
90: 0F 00 90 81 02 07 01 0C - 28 AB 07 00 04 00 98 81
A0: 00 00 02 00 28 AB 07 00 - 05 00 9C 81 03 00 1C 00
B0: 28 AB 07 00 07 00 A0 81 - 00 00 00 00 28 AB 07 00
C0: 05 00 A8 81 06 00 1F 00 - 28 AB 07 00 03 00 AC 81
D0: 0B 03 00 00 28 AB 07 00 - 0A 00 B0 81 00 3C 00 78
E0: 28 AB 07 00 01 00 C8 81 - 01 00 00 00 28 AB 07 00
F0: 01 00 CC 81 01 00 00 00 - 0F 00 00 00 28 AB 07 00
00: 08 00 E8 86 00 48 17 1A - 28 AB 07 00 02 00 1C 84
10: 00 C0 00 60 28 AB 07 00 - 02 00 40 84 F0 A0 02 FF
20: 28 AB 07 00 08 00 60 86 - 08 00 08 F3 28 AB 07 00
30: 02 00 C0 86 00 10 88 1B - 28 AB 07 00 02 00 8C 85
40: 00 08 1F 20 28 AB 07 00 - 0F 00 F0 86 20 28 28 28
50: 28 AB 07 00 02 00 30 86 - 50 C0 00 BE 28 AB 07 00
60: 08 00 58 86 09 A0 32 81 - 28 AB 07 00 08 00 20 87
70: 04 02 12 08 28 AB 07 00 - 07 00 44 86 4E DE 05 01
80: 28 AB 07 00 06 00 54 87 - 80 50 06 00 28 AB 07 00
90: 02 00 3C 84 02 9F 00 00 - 28 AB 07 00 02 00 20 86
A0: 00 44 00 00 28 AB 07 00 - 04 00 D4 86 C0 80 82 00
B0: 28 AB 07 00 08 00 9C 85 - 00 0C 49 22 28 AB 07 00
C0: 08 00 10 86 FF 01 C8 1E - 28 AB 07 00 04 00 14 86
D0: 9F 63 0C 03 28 AB 07 00 - 01 00 3C 86 F0 00 00 00
E0: 28 AB 07 00 07 00 2C 86 - 5A 10 08 00 28 AB 07 00
F0: 0F 00 08 86 50 FF FF 3F - 28 AB 07 00
[HECI1] Send msg: 01FC0008
00: 08 00 28 87 00 00 04 FC - 28 AB 07 00 07 00 4C 86
10: 07 C9 05 01 28 AB 07 00 - 01 00 20 84 25 16 07 0D
20: 28 AB 07 00 07 00 8C 86 - 58 40 04 00 28 AB 07 00
30: 03 00 4C 87 FF 08 01 00 - 28 AB 07 00 07 00 64 86
40: 00 A4 00 00 28 AB 07 00 - 01 00 50 87 6E 80 10 10
50: 28 AB 07 00 04 00 78 86 - 60 40 83 40 28 AB 07 00
60: 0F 00 80 86 60 17 A0 01 - 28 AB 07 00 0C 00 A0 86
70: EC 70 C0 28 28 AB 07 00 - 0F 00 C4 86 D1 EC 21 E4
80: 28 AB 07 00 01 00 28 84 - E0 01 02 01 28 AB 07 00
90: 05 00 0C 86 FF 9B 92 00 - 28 AB 07 00 08 00 50 86
A0: 3F 3F 3F 05 28 AB 07 00 - 01 00 AC 86 EC 60 00 00
B0: 28 AB 07 00 0C 00 24 87 - 22 22 26 10 28 AB 07 00
C0: 01 00 54 86 02 00 C0 88 - 28 AB 07 00 01 00 54 85
D0: 06 2A 29 28 28 AB 07 00 - 04 00 C8 86 50 88 8D 3F
E0: 28 AB 07 00 04 00 9C 86 - 00 00 2C 00 28 AB 07 00
F0: 02 00 18 86 BF 00 00 00 - 28 AB 07 00 0F 00 EC 86
00: 04 80 00 00 28 AB 07 00 - 0E 00 08 87 45 F4 DF CC
10: 28 AB 07 00 07 00 A4 86 - 28 28 28 00 28 AB 07 00
20: 01 00 70 86 5E 25 40 40 - 28 AB 07 00 0B 00 88 86
30: 20 70 74 E4 28 AB 07 00 - 04 00 48 87 88 0A 8D D7
40: 28 AB 07 00 06 00 40 87 - 0A 00 E2 16 28 AB 07 00
50: 04 00 00 84 00 01 89 80 - 28 AB 07 00 08 00 1C 86
60: 08 10 3B 68 28 AB 07 00 - 01 00 1C 87 03 7F 1B 1B
70: 28 AB 07 00 0F 00 E4 86 - 50 45 0B 1C 28 AB 07 00
80: 01 00 5C 86 2E 08 3B 00 - 28 AB 07 00 07 00 04 84
90: 64 C0 11 00 28 AB 07 00 - 08 00 24 84 10 0A 0B A4
A0: 28 AB 07 00 05 00 40 86 - 58 CF 05 01 28 AB 07 00
B0: 0A 00 00 86 70 A8 52 0B - 28 AB 07 00 01 00 18 84
C0: 7C 00 89 02 28 AB 07 00 - 02 00 58 85 20 1E 1F 15
D0: 28 AB 07 00 08 00 84 85 - 08 0A 00 08 28 AB 07 00
E0: 05 00 04 86 09 09 0F 00 - 28 AB 07 00 06 00 10 84
F0: 00 00 BF 72 28 AB 07 00 - 0F 00 18 87
[HECI1] Send msg: 01FC0008
00: 00 0C 00 01 28 AB 07 00 - 05 00 68 86 2A 82 10 B8
10: 28 AB 07 00 01 00 64 86 - 08 A4 00 00 0F 00 00 00
20: 28 AB 07 00 0C 00 48 93 - 88 0A 8A D3 28 AB 07 00
30: 0F 00 5C 93 33 33 24 20 - 28 AB 07 00 02 00 64 91
40: 4C 60 4C 4C 28 AB 07 00 - 07 00 A4 92 1E 1E 1E 00
50: 28 AB 07 00 03 00 14 90 - 1D C5 00 11 28 AB 07 00
60: 0F 00 C4 92 D1 EC 01 E6 - 28 AB 07 00 0C 00 1C 93
70: 03 7F 21 21 28 AB 07 00 - 02 00 E4 92 40 A5 0B 4B
80: 28 AB 07 00 0F 00 18 93 - 01 00 00 4A 28 AB 07 00
90: 02 00 54 93 80 54 02 00 - 28 AB 07 00 0F 00 24 90
A0: 0F 0C 0C A4 28 AB 07 00 - 01 00 28 90 E0 01 02 01
B0: 28 AB 07 00 0C 00 E8 92 - 00 48 26 1A 28 AB 07 00
C0: 01 00 20 90 26 16 07 0D - 28 AB 07 00 09 00 1C 92
D0: F8 10 3B 00 28 AB 07 00 - 0C 00 C8 92 50 88 8D 0D
E0: 28 AB 07 00 01 00 E0 92 - 32 60 00 08 28 AB 07 00
F0: 04 00 AC 92 F6 60 00 00 - 28 AB 07 00 06 00 14 92
00: 9F 61 38 03 28 AB 07 00 - 0F 00 14 93 08 1C 05 0F
10: 28 AB 07 00 0F 00 24 93 - 36 38 B2 1F 28 AB 07 00
20: 0A 00 00 92 70 94 52 0B - 28 AB 07 00 07 00 44 93
30: 2B 1C 18 00 28 AB 07 00 - 07 00 4C 92 49 CD 05 01
40: 28 AB 07 00 03 00 4C 93 - DC 4F 01 00 28 AB 07 00
50: 0C 00 28 93 00 00 1A FF - 28 AB 07 00 08 00 60 92
60: 08 00 08 33 28 AB 07 00 - 03 00 58 93 A4 9C 8C 31
70: 28 AB 07 00 06 00 64 92 - 00 54 02 00 28 AB 07 00
80: 05 00 54 91 06 2A 2D 28 - 28 AB 07 00 05 00 68 92
90: 06 82 10 B8 28 AB 07 00 - 03 00 44 90 97 48 09 64
A0: 28 AB 07 00 0F 00 80 92 - 40 17 04 04 28 AB 07 00
B0: 08 00 A0 92 EC 70 80 1E - 28 AB 07 00 01 00 10 93
C0: 68 00 40 00 28 AB 07 00 - 08 00 84 91 08 0A 00 08
D0: 28 AB 07 00 0F 00 88 92 - 10 30 77 64 28 AB 07 00
E0: 04 00 78 92 60 40 83 40 - 28 AB 07 00 07 00 2C 92
F0: 0C 00 0B 00 28 AB 07 00 - 07 00 04 92
[HECI1] Send msg: 01FC0008
00: 09 0B 0F 00 28 AB 07 00 - 0D 00 40 92 4E CF 18 03
10: 28 AB 07 00 08 00 6C 92 - 00 24 04 5C 28 AB 07 00
20: 0F 00 20 93 04 21 03 0D - 28 AB 07 00 0F 00 0C 93
30: 1F E0 21 21 28 AB 07 00 - 01 00 3C 92 F0 00 00 00
40: 28 AB 07 00 01 00 0C 92 - E6 9B 52 00 28 AB 07 00
50: 02 00 18 92 BF 00 00 00 - 28 AB 07 00 01 00 5C 90
60: 96 BC 1F 3F 28 AB 07 00 - 04 00 00 90 00 01 89 80
70: 28 AB 07 00 0C 00 08 93 - 45 34 48 D0 28 AB 07 00
80: 01 00 50 93 6E 80 10 10 - 28 AB 07 00 04 00 04 93
90: 80 AA 11 C0 28 AB 07 00 - 02 00 8C 91 00 08 1F 20
A0: 28 AB 07 00 0F 00 08 92 - 50 D1 EC 01 28 AB 07 00
B0: 04 00 7C 92 18 18 26 40 - 28 AB 07 00 09 00 CC 92
C0: 25 17 17 5B 28 AB 07 00 - 08 00 B4 92 40 40 81 08
D0: 28 AB 07 00 01 00 60 93 - 72 00 00 00 28 AB 07 00
E0: 07 00 8C 92 20 48 82 00 - 28 AB 07 00 0E 00 40 93
F0: 0A 00 EB 1F 28 AB 07 00 - 03 00 70 92 58 26 40 40
00: 28 AB 07 00 09 00 10 92 - FB 01 C8 0A 28 AB 07 00
10: 04 00 04 90 44 00 21 00 - 0F 00 00 00 28 AA 07 00
20: 04 00 E8 80 80 08 0C 3C - 0F 00 00 00 28 AA 07 00
30: 04 00 14 86 1F 63 20 03 - 28 AA 07 00 02 00 40 84
40: 00 A0 02 FF 28 AA 07 00 - 0D 00 68 86 2A 82 00 B8
50: 28 AA 07 00 04 00 78 86 - 60 40 83 40 28 AA 07 00
60: 08 00 C0 86 00 00 88 5B - 28 AA 07 00 04 00 10 84
70: 00 00 BF 72 28 AA 07 00 - 05 00 40 86 58 CF 05 01
80: 28 AA 07 00 04 00 C8 86 - 50 88 8D 60 28 AA 07 00
90: 07 00 2C 86 0A 10 0A 00 - 28 AA 07 00 0E 00 80 86
A0: 60 0F A0 E8 28 AA 07 00 - 07 00 8C 86 58 40 04 00
B0: 28 AA 07 00 02 00 E0 86 - 00 04 00 08 28 AA 07 00
C0: 04 00 C4 86 FF FF 3F FF - 28 AA 07 00 0F 00 64 84
D0: 00 02 1B E0 28 AA 07 00 - 01 00 38 84 7F 00 00 00
E0: 28 AA 07 00 05 00 0C 86 - FF 9B 12 00 28 AA 07 00
F0: 08 00 24 84 10 0A 0B A4 - 28 AA 07 00
[HECI1] Send msg: 01FC0008
00: 01 00 18 84 7C 00 09 02 - 28 AA 07 00 04 00 BC 86
10: 80 00 10 00 28 AA 07 00 - 06 00 D4 86 C0 80 82 00
20: 28 AA 07 00 02 00 F4 86 - 00 0E 00 00 28 AA 07 00
30: 01 00 5C 86 2A 08 60 00 - 28 AA 07 00 03 00 88 86
40: 20 00 74 24 28 AA 07 00 - 08 00 B4 86 40 40 81 2C
50: 28 AA 07 00 08 00 A0 86 - EC 00 00 1C 28 AA 07 00
60: 03 00 64 86 00 54 00 00 - 28 AA 07 00 04 00 9C 86
70: 00 00 4C 00 28 AA 07 00 - 03 00 4C 86 07 C9 02 01
80: 28 AA 07 00 0A 00 74 86 - 49 FF 80 8D 28 AA 07 00
90: 01 00 3C 86 F0 00 00 00 - 28 AA 07 00 0D 00 E4 86
A0: 50 05 0B 9C 28 AA 07 00 - 0F 00 F0 86 20 28 28 28
B0: 28 AA 07 00 01 00 28 84 - E0 01 02 01 28 AA 07 00
C0: 01 00 10 86 5F 01 C0 00 - 28 AA 07 00 07 00 A4 86
D0: 1C 1C 1C 00 28 AA 07 00 - 0F 00 EC 86 C4 00 00 00
E0: 28 AA 07 00 01 00 54 85 - 06 2A 29 28 28 AA 07 00
F0: 09 00 54 86 02 00 C0 08 - 28 AA 07 00 04 00 00 84
00: 00 01 09 80 28 AA 07 00 - 07 00 04 84 64 C1 24 00
10: 28 AA 07 00 01 00 20 84 - 25 16 07 0D 28 AA 07 00
20: 02 00 3C 84 02 9F 00 00 - 28 AA 07 00 08 00 9C 85
30: 00 0C 49 22 28 AA 07 00 - 03 00 70 86 5A E5 40 40
40: 28 AA 07 00 01 00 90 86 - 48 30 50 75 28 AA 07 00
50: 08 00 84 85 08 0A 00 08 - 28 AA 07 00 03 00 24 86
60: FC 60 33 AA 28 AA 07 00 - 07 00 44 86 4E DE 05 01
70: 28 AA 07 00 08 00 50 86 - 3F 3F 3F 05 28 AA 07 00
80: 01 00 04 86 39 09 05 00 - 28 AA 07 00 02 00 20 86
90: 00 4C 00 00 28 AA 07 00 - 0F 00 64 84 05 00 33 E0
A0: 28 AA 07 00 02 00 30 86 - 50 C0 00 BE 28 AA 07 00
B0: 0A 00 58 86 09 A0 31 81 - 28 AA 07 00 02 00 8C 85
C0: 00 08 1F 20 28 AA 07 00 - 0A 00 00 86 00 A8 52 00
D0: 28 AA 07 00 0F 00 08 86 - 50 FF FF 3F 28 AA 07 00
E0: 03 00 AC 86 EC 60 00 00 - 28 AA 07 00 08 00 60 86
F0: 00 00 00 FF 28 AA 07 00 - 02 00 1C 84
[HECI1] Send msg: 01FC0008
00: 00 C0 00 60 28 AA 07 00 - 09 00 1C 86 A8 00 3B 6E
10: 28 AA 07 00 01 00 64 86 - 08 54 00 00 0F 00 00 00
20: 28 AA 07 00 0F 00 64 8C - 00 00 33 E0 28 AA 07 00
30: 06 00 04 8C 44 01 24 00 - 28 AA 07 00 08 00 24 8C
40: 10 0A 0B A4 28 AA 07 00 - 01 00 1C 8E A8 00 3B 00
50: 28 AA 07 00 04 00 10 8C - 00 00 BF 72 28 AA 07 00
60: 0F 00 64 8C 00 02 1B E0 - 28 AA 07 00 02 00 00 8E
70: 00 69 52 09 28 AA 07 00 - 07 00 48 8E 4C 19 05 01
80: 28 AA 07 00 02 00 74 8E - 49 FF 80 8E 28 AA 07 00
90: 0A 00 54 8E 00 01 C0 00 - 28 AA 07 00 01 00 04 8E
A0: 09 09 05 00 28 AA 07 00 - 08 00 B4 8E 40 40 81 2C
B0: 28 AA 07 00 02 00 20 8E - 00 48 00 00 28 AA 07 00
C0: 09 00 08 8E 50 18 E0 21 - 28 AA 07 00 04 00 78 8E
D0: 60 40 83 40 28 AA 07 00 - 06 00 8C 8E 7C 80 08 00
E0: 28 AA 07 00 04 00 00 8C - 00 01 09 80 28 AA 07 00
F0: 01 00 28 8C E0 01 02 01 - 0F 00 00 00 28 A9 07 00
00: 01 00 04 80 60 00 00 20 - 28 A9 07 00 01 00 30 80
10: 01 04 30 00 28 A9 07 00 - 01 00 3C 80 06 00 00 00
20: 28 A9 07 00 04 00 E8 80 - 80 08 0C 3C 28 A9 07 00
30: 08 00 38 81 C4 C4 00 00 - 28 A9 07 00 0A 00 B0 81
40: 00 3C 00 78 28 A9 07 00 - 01 00 C8 81 01 00 00 00
50: 28 A9 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
60: 28 A9 07 00 07 00 44 86 - 4E DE 05 01 28 A9 07 00
70: 07 00 2C 86 0A 10 0A 00 - 28 A9 07 00 02 00 30 86
80: 50 C0 00 BE 28 A9 07 00 - 01 00 5C 86 2A 08 60 00
90: 28 A9 07 00 02 00 3C 84 - 02 9F 00 00 28 A9 07 00
A0: 02 00 E0 86 00 04 00 08 - 28 A9 07 00 01 00 28 84
B0: E0 01 02 01 28 A9 07 00 - 08 00 50 86 3F 3F 3F 05
C0: 28 A9 07 00 01 00 3C 86 - F0 00 00 00 28 A9 07 00
D0: 03 00 AC 86 EC 60 00 00 - 28 A9 07 00 01 00 18 84
E0: 7C 00 09 02 28 A9 07 00 - 04 00 00 84 00 01 09 80
F0: 28 A9 07 00 04 00 9C 86 - 00 00 4C 00
[HECI1] Send msg: 01FC0008
00: 28 A9 07 00 01 00 04 86 - 39 09 05 00 28 A9 07 00
10: 07 00 A4 86 1C 1C 1C 00 - 28 A9 07 00 04 00 BC 86
20: 80 00 10 00 28 A9 07 00 - 0F 00 F0 86 20 28 28 28
30: 28 A9 07 00 08 00 9C 85 - 00 0C 49 22 28 A9 07 00
40: 01 00 20 84 25 16 07 0D - 28 A9 07 00 0A 00 00 86
50: 00 A8 52 00 28 A9 07 00 - 04 00 78 86 60 40 83 40
60: 28 A9 07 00 0F 00 64 84 - 00 02 1B E0 28 A9 07 00
70: 02 00 1C 84 00 C0 00 60 - 28 A9 07 00 05 00 0C 86
80: FF 9B 12 00 28 A9 07 00 - 04 00 C8 86 50 88 8D 60
90: 28 A9 07 00 03 00 88 86 - 20 00 74 24 28 A9 07 00
A0: 08 00 C0 86 00 00 88 5B - 28 A9 07 00 03 00 24 86
B0: FC 60 33 AA 28 A9 07 00 - 02 00 40 84 00 A0 02 FF
C0: 28 A9 07 00 07 00 04 84 - 64 C1 24 00 28 A9 07 00
D0: 01 00 90 86 48 30 50 75 - 28 A9 07 00 04 00 14 86
E0: 1F 63 20 03 28 A9 07 00 - 09 00 1C 86 A8 00 3B 6E
F0: 28 A9 07 00 02 00 8C 85 - 00 08 1F 20 28 A9 07 00
00: 08 00 24 84 10 0A 0B A4 - 28 A9 07 00 05 00 40 86
10: 58 CF 05 01 28 A9 07 00 - 02 00 20 86 00 4C 00 00
20: 28 A9 07 00 0F 00 08 86 - 50 FF FF 3F 28 A9 07 00
30: 03 00 4C 86 07 C9 02 01 - 28 A9 07 00 0D 00 68 86
40: 2A 82 00 B8 28 A9 07 00 - 0F 00 64 84 05 00 33 E0
50: 28 A9 07 00 03 00 64 86 - 00 54 00 00 28 A9 07 00
60: 04 00 10 84 00 00 BF 72 - 28 A9 07 00 01 00 10 86
70: 5F 01 C0 00 28 A9 07 00 - 0E 00 80 86 60 0F A0 E8
80: 28 A9 07 00 0A 00 58 86 - 09 A0 31 81 28 A9 07 00
90: 08 00 84 85 08 0A 00 08 - 28 A9 07 00 07 00 8C 86
A0: 58 40 04 00 28 A9 07 00 - 08 00 A0 86 EC 00 00 1C
B0: 28 A9 07 00 0D 00 E4 86 - 50 05 0B 9C 28 A9 07 00
C0: 08 00 B4 86 40 40 81 2C - 28 A9 07 00 0A 00 74 86
D0: 49 FF 80 8D 28 A9 07 00 - 01 00 54 85 06 2A 29 28
E0: 28 A9 07 00 09 00 54 86 - 02 00 C0 08 28 A9 07 00
F0: 03 00 70 86 5A E5 40 40 - 28 A9 07 00
[HECI1] Send msg: 01FC0008
00: 04 00 C4 86 FF FF 3F FF - 28 A9 07 00 0F 00 EC 86
10: C4 00 00 00 28 A9 07 00 - 08 00 60 86 00 00 00 FF
20: 28 A9 07 00 06 00 D4 86 - C0 80 82 00 28 A9 07 00
30: 01 00 38 84 7F 00 00 00 - 28 A9 07 00 02 00 F4 86
40: 00 0E 00 00 28 A9 07 00 - 01 00 64 86 08 54 00 00
50: 0F 00 00 00 28 A9 07 00 - 08 00 B4 8E 40 40 81 2C
60: 28 A9 07 00 09 00 08 8E - 50 18 E0 21 28 A9 07 00
70: 04 00 78 8E 60 40 83 40 - 28 A9 07 00 06 00 8C 8E
80: 7C 80 08 00 28 A9 07 00 - 06 00 04 8C 44 01 24 00
90: 28 A9 07 00 07 00 48 8E - 4C 19 05 01 28 A9 07 00
A0: 0A 00 54 8E 00 01 C0 00 - 28 A9 07 00 04 00 10 8C
B0: 00 00 BF 72 28 A9 07 00 - 0F 00 64 8C 00 02 1B E0
C0: 28 A9 07 00 0F 00 64 8C - 00 00 33 E0 28 A9 07 00
D0: 02 00 00 8E 00 69 52 09 - 28 A9 07 00 02 00 74 8E
E0: 49 FF 80 8E 28 A9 07 00 - 08 00 24 8C 10 0A 0B A4
F0: 28 A9 07 00 01 00 28 8C - E0 01 02 01 28 A9 07 00
00: 01 00 1C 8E A8 00 3B 00 - 28 A9 07 00 04 00 00 8C
10: 00 01 09 80 28 A9 07 00 - 02 00 20 8E 00 48 00 00
20: 28 A9 07 00 01 00 04 8E - 09 09 05 00 0F 00 00 00
30: 28 A9 07 00 02 00 74 96 - 49 FF 80 8E 28 A9 07 00
40: 02 00 18 96 BF 00 00 00 - 28 A9 07 00 04 00 5C 96
50: 2A 08 30 00 28 A9 07 00 - 09 00 1C 96 58 00 3B 01
60: 28 A9 07 00 04 00 18 94 - 7C 00 39 02 28 A9 07 00
70: 0C 00 58 96 09 A0 33 01 - 28 A9 07 00 02 00 00 96
80: 00 29 52 09 28 A9 07 00 - 0F 00 04 94 45 01 24 04
90: 28 A9 07 00 07 00 48 96 - 4C 15 05 01 28 A9 07 00
A0: 08 00 E8 96 00 48 17 2C - 28 A9 07 00 03 00 04 96
B0: 09 00 05 00 28 A9 07 00 - 03 00 58 95 00 28 1F 15
C0: 28 A9 07 00 01 00 6C 96 - 28 24 04 48 28 A9 07 00
D0: 01 00 28 94 E0 01 02 01 - 28 A9 07 00 0F 00 64 94
E0: 00 02 1B E0 28 A9 07 00 - 0F 00 54 95 06 2D 2D 28
F0: 28 A9 07 00 04 00 00 94 - 00 01 09 80
[HECI1] Send msg: 01FC0008
00: 28 A9 07 00 08 00 88 96 - 00 30 74 64 28 A9 07 00
10: 08 00 A0 96 EC 00 00 2B - 28 A9 07 00 02 00 2C 96
20: 0A 50 0A 00 28 A9 07 00 - 02 00 F4 96 00 18 00 00
30: 28 A9 07 00 07 00 8C 96 - 70 20 08 00 28 A9 07 00
40: 08 00 24 94 10 0A 0B A4 - 28 A9 07 00 04 00 10 94
50: 00 00 BF 72 28 A9 07 00 - 0F 00 64 94 00 00 33 E0
60: 28 A9 07 00 04 00 9C 96 - 00 00 20 00 28 A9 07 00
70: 07 00 A4 96 2B 2B 2B 00 - 28 A9 07 00 0B 00 54 96
80: 02 01 C0 00 28 A9 07 00 - 05 00 40 96 5E CF 18 01
90: 28 A9 07 00 08 00 B4 96 - 40 40 81 2C 28 A9 07 00
A0: 04 00 78 96 60 40 83 40 - 28 A9 07 00 08 00 50 96
B0: 3F 3F 3F 01 28 A9 07 00 - 09 00 68 96 1E 82 00 BA
C0: 28 A9 07 00 09 00 08 96 - 50 18 E0 21 28 A9 07 00
D0: 02 00 20 96 00 48 00 00 - 28 A9 07 00 04 00 C8 96
E0: 50 88 4F 60 28 A9 07 00 - 07 00 44 96 48 15 05 01
F0: 0F 00 00 00 28 A8 07 00 - 01 00 04 80 60 00 00 20
00: 28 A8 07 00 01 00 30 80 - 01 04 30 00 28 A8 07 00
10: 01 00 3C 80 06 00 00 00 - 28 A8 07 00 04 00 E8 80
20: 80 08 0C 3C 28 A8 07 00 - 08 00 38 81 AC D4 00 00
30: 28 A8 07 00 0B 00 90 81 - 02 06 01 0C 28 A8 07 00
40: 05 00 A8 81 06 00 1F 00 - 28 A8 07 00 0A 00 B0 81
50: 00 3C 00 78 28 A8 07 00 - 01 00 C8 81 01 00 00 00
60: 28 A8 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
70: 0F 00 00 00 29 AC 07 00 - 04 00 1C 01 01 30 00 80
80: 29 AC 07 00 06 00 0C B1 - 40 00 07 00 29 AC 07 00
90: 02 00 6C 03 0B 03 00 00 - 29 AC 07 00 0A 00 70 03
A0: 00 3C 00 78 29 AC 07 00 - 01 00 88 03 01 00 00 00
B0: 29 AC 07 00 01 00 14 B1 - E9 D4 25 48 29 AC 07 00
C0: 04 00 50 03 03 09 02 0C - 0F 00 00 00 28 6A 07 00
D0: 07 00 6C 04 00 00 03 00 - 28 6A 07 00 07 00 EC 03
E0: 00 00 03 00 28 6A 07 00 - 07 00 8C 04 00 00 03 00
F0: 28 6A 07 00 07 00 0C 04 - 00 00 03 00
[HECI1] Send msg: 01FC0008
00: 28 6E 07 00 07 00 2C 04 - 00 00 00 00 28 6E 07 00
10: 07 00 4C 04 00 00 00 00 - 28 6E 07 00 07 00 6C 04
20: 00 00 00 00 28 6E 07 00 - 07 00 8C 04 00 00 00 00
30: 28 69 07 00 02 00 10 03 - 00 30 00 06 28 69 07 00
40: 03 00 04 03 18 18 00 C0 - 28 69 07 00 07 00 0C 03
50: 18 18 03 00 28 69 07 00 - 02 00 30 03 00 30 00 07
60: 28 69 07 00 03 00 24 03 - 18 18 00 C0 28 69 07 00
70: 07 00 2C 03 18 18 03 00 - 28 6E 07 00 02 00 70 03
80: 04 30 00 06 28 6E 07 00 - 03 00 64 03 00 00 00 C0
90: 28 6E 07 00 07 00 6C 03 - 00 00 03 00 28 6E 07 00
A0: 02 00 90 03 04 30 00 07 - 28 6E 07 00 03 00 84 03
B0: 00 00 00 C0 28 6E 07 00 - 07 00 8C 03 00 00 03 00
C0: 28 6D 07 00 02 00 D0 03 - 04 30 20 07 28 6D 07 00
D0: 03 00 C4 03 00 00 00 C0 - 28 6D 07 00 07 00 CC 03
E0: 00 00 03 00 28 6D 07 00 - 07 00 AC 03 00 00 03 00
F0: 28 6D 07 00 07 00 2C 03 - 00 00 03 00 28 6D 07 00
00: 07 00 EC 03 00 00 03 00 - 28 6D 07 00 0C 00 04 07
10: 6C 00 80 01 28 6D 07 00 - 08 00 08 07 00 00 00 00
20: 28 6D 07 00 0C 00 14 07 - 6D 00 80 01 28 6D 07 00
30: 08 00 18 07 00 00 00 00 - 28 6D 07 00 0C 00 24 07
40: 6E 00 80 01 28 6D 07 00 - 08 00 28 07 00 00 00 00
50: 28 6D 07 00 0C 00 34 07 - 6F 00 80 01 28 6D 07 00
60: 08 00 38 07 00 00 00 00 - 28 6D 07 00 0C 00 44 07
70: 70 00 80 01 28 6D 07 00 - 08 00 48 07 00 00 00 00
80: 28 6D 07 00 0C 00 54 07 - 71 00 80 01 28 6D 07 00
90: 08 00 58 07 00 00 00 00 - 28 6D 07 00 0C 00 64 07
A0: 72 00 80 01 28 6D 07 00 - 08 00 68 07 00 00 00 00
B0: 28 6D 07 00 0C 00 74 07 - 73 00 80 01 28 6D 07 00
C0: 08 00 78 07 00 00 00 00 - 28 6D 07 00 08 00 10 03
D0: 00 20 20 02 28 6A 07 00 - 02 00 B0 04 00 00 20 07
E0: 28 6A 07 00 03 00 A4 04 - 00 00 00 C0 28 6A 07 00
F0: 02 00 D0 04 00 00 20 07 - 28 6A 07 00
[HECI1] Send msg: 01FC0008
00: 03 00 C4 04 00 00 00 C0 - 28 6A 07 00 02 00 70 03
10: 04 20 00 07 28 6A 07 00 - 03 00 64 03 00 00 00 C0
20: 28 6A 07 00 07 00 6C 03 - 00 00 02 00 28 6D 07 00
30: 07 00 8C 03 00 00 02 00 - 0F 00 00 00 28 CA 07 00
40: 0F 00 01 40 06 B8 3D 2F - 28 CA 07 00 0F 00 2B 40
50: 05 40 6A 00 28 CA 07 00 - 0F 00 2C 40 80 53 A2 09
60: 28 CA 07 00 0F 00 04 7F - 80 C6 00 00 28 CA 07 00
70: 0F 00 2C 70 00 C2 88 00 - 28 CA 07 00 0F 00 00 70
80: 08 1E 64 64 28 CA 07 00 - 0F 00 2C 70 00 C2 88 00
90: 28 CA 07 00 0F 00 08 70 - 20 5A 2B 22 28 CA 07 00
A0: 0F 00 14 70 18 4D E9 59 - 28 CA 07 00 0F 00 24 70
B0: 00 E8 01 30 28 CA 07 00 - 0F 00 00 41 91 B0 05 FC
C0: 28 CA 07 00 0F 00 26 41 - 4B 92 82 43 28 CA 07 00
D0: 0F 00 08 41 D0 DA 00 00 - 28 CA 07 00 0F 00 00 42
E0: 91 B0 05 FC 28 CA 07 00 - 0F 00 26 42 4B 92 82 43
F0: 28 CA 07 00 0F 00 08 42 - D0 DA 00 00 28 CA 07 00
00: 0F 00 00 43 91 B0 05 FC - 28 CA 07 00 0F 00 26 43
10: 4B 92 82 43 28 CA 07 00 - 0F 00 08 43 D0 DA 00 00
20: 28 CA 07 00 0F 00 00 44 - 91 B0 05 FC 28 CA 07 00
30: 0F 00 26 44 4B 92 82 43 - 28 CA 07 00 0F 00 08 44
40: D0 DA 00 00 28 CA 07 00 - 0F 00 00 45 91 B0 05 FC
50: 28 CA 07 00 0F 00 26 45 - 4B 92 82 43 28 CA 07 00
60: 0F 00 08 45 D0 DA 00 00 - 28 CA 07 00 0F 00 00 46
70: 91 B0 05 FC 28 CA 07 00 - 0F 00 26 46 4B 92 82 43
80: 28 CA 07 00 0F 00 08 46 - D0 DA 00 00 28 CA 07 00
90: 0F 00 00 47 91 B0 05 FC - 28 CA 07 00 0F 00 26 47
A0: 4B 92 82 43 28 CA 07 00 - 0F 00 08 47 D0 DA 00 00
B0: 28 CA 07 00 0F 00 00 48 - 91 B0 05 FC 28 CA 07 00
C0: 0F 00 26 48 4B 92 82 43 - 28 CA 07 00 0F 00 08 48
D0: D0 DA 00 00 28 CA 07 00 - 0F 00 00 49 91 B0 05 FC
E0: 28 CA 07 00 0F 00 26 49 - 4B 92 82 43 28 CA 07 00
F0: 0F 00 08 49 D0 DA 00 00 - 28 CA 07 00
[HECI1] Send msg: 804C0008
00: 0F 00 00 4A 91 B0 05 FC - 28 CA 07 00 0F 00 26 4A
10: 4B 92 82 43 28 CA 07 00 - 0F 00 08 4A D0 DA 00 00
20: 0F 00 00 00 28 AA 07 00 - 0F 00 30 80 01 04 30 00
30: 28 AA 07 00 0F 00 3C 80 - 07 00 00 00 28 AA 07 00
40: 0F 00 04 80 60 00 00 20 - 0F 00 00 00
[HECI1] Got msg Success: 80140008
00: 00 00 05 00 19 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
PeiHeciWriteChipsetInitMsg(): End
No global reset required
ChipsetInitSync() End
One of the modphy lanes assigned to usb skipping setting MPLSPDDGE and MLSPDDGE
DCI Debug Disabled
PmcSendCommand(): IPC_COMMAND=0xA1, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x10000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
CnviConfigureBt() - Start
CNVi has been fused out
POSTCODE=<00009B7F>
PchInit - End
PostMem SaInit Entry
POSTCODE=<00009A00>
PostMemCheckAndForceVddOn start
PostMemCheckAndForceVddOn end status - 0x0
DeviceConfigure Start
POSTCODE=<00009A01>
Sa Register Mirror Start
Programming GGC
Programming TOUUD
Programming TOLUD
Programming BDSM
Programming BDSM 0x7C000001
Programming BGSM
Programming BGSM 0x7B800001
Programming TSEG
Install PPI: 8E3BB474-0545-4902-86B0-6CB5E264B4A5
Initializing SA GNA device
POSTCODE=<00009A16>
CpuDmi16SpeedChange Start
CpuDmi16SpeedChange not supportedInitializing ConfigureCpuTraceHub
POSTCODE=<00009A22>
ConfigureCpuTraceHub () - Start
TraceHubDataHob->EfiHobGuidType.Name: F1187E54-995F-49D9-ACEE-C534F45A18C7
TraceHubDataHob @ 76CB0298
TraceHubDataHobSize - HobHeader: 8
TraceHubDataHobSize: 20
Program MTB/SW/RTIT BAR
Enable MSE
Clearing LPP_CTL_LPME
LPP_CTL = 113, SCRPD0 = 0 EnableMode 0
CPU Intel Trace Hub is in Low Power Mode or not connected and is disabled by SETUP menu . Stop the initialization.
Initializing TCSS
POSTCODE=<00009A31>
[TCSS] TcssInit() - Start
[TCSS] IomReadyCheck - Start
IOMReady bit = 1
IomReady bit updated to TCSS HOB
IOM version: 0x11001600; Engr version: 0x00000000
TCSS HOB updated
[TCSS] IomReadyCheck - End
[TCSS] TcssRtd3Update - Start
TCSS RTD3: 0x1
[TCSS] TcssRtd3Update - End
[TCSS] TcssCstatelimit() - Start
IOM mailbox data = 0x0000000A
IOM mailbox command = 0x80000007
Override MailBoxData from 8 to 10
[TCSS] System Supported TC State = 0x0000000A
[TCSS] TcssCstatelimit() - End - Status Success
[TCSS] SaXdciIrq - Start
IOM mailbox data = 0x01000100
IOM mailbox command = 0x00000102
SA xDCI Int pin: 0x01
SA xDCI Irq: 0x10
[TCSS] SaXdciIrq - End - Status
[TCSS] IomSetTcColdPowerSavingFactor - Start
IOM mailbox data = 0x00000A32
IOM mailbox command = 0x00000009
IomSetTcColdPowerSavingFactor - End - Status Success
[TCSS] TcssInitAuxHslOri() - Start
Origional AuxOriReg: 0x00000000
IomConfig->IomOverrides.AuxOri: 0x00000000
Update AuxOri: 0x80000000
Origional HslOriReg: 0x00000000
IomConfig->IomOverrides.HslOri: 0x00000000
Update HslOri: 0x80000000
[TCSS] TcssInitAuxHslOri() - End
[TCSS] ConfigureTbtPcieSegFuncMap() - Start
TcssHob->TcssData.PcieMultipleSegmentEnabled = 0
R_SA_PCIESEGMAP = 0, R_SA_PCIEFUNCMAP = 688
[TCSS] ConfigureTbtPcieSegFuncMap() - End
SaPcieInit
SaPcieInit End
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0x9A13
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 1
Test for XHCI_MEM_DAP_ESS_PORT
HDCI Debug Disabled
XhciConfigure() - End
xDCI Controller DID: 0x9A15
xDCI: Device enabled
[TCSS]PmcTcssBiosInitDone: Sending TCSS BIOS Init Done message to PMC 0x01
PmcSendCommand(): IPC_COMMAND=0xA5, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000003, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
[TCSS] TcssIomVccStInfoUpdate - Start
TCSS IOM VccSt: 0x1
[TCSS] TcssIomVccStInfoUpdate - End
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Install PPI: 5AD291B8-ACE4-416A-B750-076359FCC15B
[TCSS] TcssInit() - End
PciExpress PostMem Initialization
POSTCODE=<00009A20>
CPU PcieRpInit() Start
---- RpIndex mapping ----
---- RpIndex = 0 ; PortId = 1 => PEG060 ----
MaxCpuPciePortNum = 1
**** RpIndex = 0 ****
Slot implemented bit is set!
Port 1 neither has Endpoint connected not HotPlug enabled!
Set RpDisableMask for Port 1
Configure power management applicable to all port including disabled ports!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Clock gating is enabled!
Setting PTOCGE
Power gating is enabled!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Root port Clock gating is enabled!
RpIndex 0
Offset[E0] 917400
Offset[E0] 917700
Root port Power gating is enabled!
Setting DLSULPPGE+DLSULDLSD.
Load Fia Programming - FIA programming Enabled!
CpuFiaFinalizeConfigurationAndLock - SB_PORTID_PCIE_FIA0
Offset 0x00[CC] = 0x18000
Offset 0x20[PLLCTL] = 0x40000000
Offset 0x40[PMC] = 0x100008
Offset 0x48[PGCUC] = 0x0
CpuPcieWaitForLinkActive, RP mask to wait for = 0x00000000
CpuPcieWaitForLinkActive, all RPs done, lost 0ms waiting
CpuPcieSip16PtmInit for RpBase 30000
PTMCAPR before write in sip16 = 410
PTMCAPR after write in sip16 = 416
PTMCTLR before write RS and PTME = 0
PTMCTLR after write RS and PTME = 3
FomsCp from policy : 0, RpIndex : 0
FomsCpValue : 0
FomsCp after read : 0
Disable mask is set for Portid 1
KeepPortVisible = 0
CPU: DisablePcieRootPort(1) Start
Device is not present.Stopping the port.
PCD register Before write = 0x00000000
PCD register after write = 0x00010000
CPU: Hiding the port 1
DevEnDisablePcieRootPort Start
DevEnDisablePcieRootPort End
CPU: DisablePcieRootPort() End
R_PCIE_RXMC1 before write : 0
R_PCIE_RXMC1 after write : 7FF02810
RXMC2 : D651CA
DekelFwVersion 0
Dekel FW version : 0.0
Lock the registers
CpuPcieRpSetSecuredRegisterLock () Start!
R_PCIE_LPCR before write = FFFFFFFF
Serl from policy: 1
R_PCIE_LPCR after write = FFFFFFFF
CpuPcieRpSetSecuredRegisterLock () End!
CPU PcieRpInit() End
UpdateSaHobPostMem Start
POSTCODE=<00009A02>
PostMem CPU PCIE HOB updated
PostMem SA Data HOB updated
Initializing VMD
POSTCODE=<00009A33>
-----------------VmdInit Start ----------------
VmdInfoHob->EfiHobGuidType.Name: CCD0306E-7FA1-4DF5-9999-C1F89A1D1BA9
VmdInfoHob @ 76CB02B8
&(VmdInfoHob->VmdPortInfo) @ 76CB02D0
VmdHobSize - HobHeaderSize: 174
VmdInfoSize: 174
VMD: VmdDetectPcieStorageDevices Start
VMD: Checking device connection on PEG ports
Read DEVEN register
PegDevenReg = 0
VMD: PEG Port 0/6/0 is not enabled
VMD: Checking device on PCH PCIe ports
VMD: Checking the availability of SATA controller(0/23/0) for sata devices
VMD: Sata device found DevId 0xA0D3
Dumping port info
RpDev 23 RpFunc 0 DevId 0xA0D3 RpIndex 0
VMD Device has been disabled
Initializing Pavp
POSTCODE=<00009A32>
Initializing PAVP
CpuPcieRpConfigureRpfnMapping () Start!
Initializing IPU device
POSTCODE=<00009A14>
IpuInit Begins
IPU Fused off
IPU is not supported
Clear IPU bit at DEVEN regiser
[TCC] TccInit() - Start
TCC Tune system
TCC CacheCfg subregion is not valid
L2CatEntries:0x4,
CacheId:0x0, Mask[0]: 0xFFFFF,
CacheId:0x1, Mask[0]: 0xFFFFF,
CacheId:0x2, Mask[0]: 0xFFFFF,
CacheId:0x3, Mask[0]: 0xFFFFF,
L3CatEntries:0x1,
CacheId:0x0, Mask[0]: 0xFFF,
MaxIaL2Cos: 8
TCC RTCT hob data @0x76CB05D8 with size 0x1BC
Cache Prefetecher Tuning:
IfuTrainEnable: 0
ConvertItomToRfo: 0
[TCC] TccInit() - End
CpuInit Start
POSTCODE=<00009C15>
Cpu Initialization in PostMem start
CollectProcessorFeature Start
POSTCODE=<00009C17>
ProgramProcessorFeature Start
POSTCODE=<00009C18>
PmcIsPchPmTimerEnabled () = 1
TraceHubAcpiBaseAddress = 0
Initialize Processor Trace
Initialize Hardware Duty Cycle
Initialize Protected Processor Inventory Number (PPIN)
Program xAPIC
Initialize Monitor Wait register
Initialize Machine check registers
Initialize miscellaneous processor functions
(MAILBOX) Mailbox Write Command = 1Dh
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 1Ch
(MAILBOX) Mailbox Status = 00h
Initialize AVX Instructions
ProgramProcessorFeature Done
POSTCODE=<00009C19>
CpuInitPreResetCpl Start
POSTCODE=<00009C20>
ProcessorsPrefetcherInitialization Start
POSTCODE=<00009C21>
InitRatl Start
POSTCODE=<00009C22>
TCC activation programmable = 1
ConfigurePidSettings Start
POSTCODE=<00009C24>
SetBootFrequency Start
POSTCODE=<00009C25>
BiosGuardInit Start
POSTCODE=<00009C28>
BIOS Guard Module is Disabled
CpuInitPreResetCpl Done
POSTCODE=<00009C3F>
InitializeCpuDataHob Start
POSTCODE=<00009C43>
InitializeCpuDataHob Done
POSTCODE=<00009C44>
Cpu Initialize performance and power management features before RESET_CPL Done
CpuInit Done
POSTCODE=<00009C4F>
ConfigureSvidVrs Start
POSTCODE=<00009C23>
VR: Configure SVID Vr's
(MAILBOX) Mailbox Write Command = WRITE_PSYS_PMAX_CMD
(MAILBOX) PsysPmax = 172 (1/8 Watt)
(MAILBOX) Mailbox Write Data = 1376
(MAILBOX) Mailbox Write Command = 80000B18h
(MAILBOX) Mailbox Write Data = 560h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = READ_VR_STRAP_CONFIG_CMD
(MAILBOX) Mailbox Read Command = 80000018h
(MAILBOX) Mailbox Status = 00h
VR: VrTopology data = 0x9
VR Type 0 = SVID, VR Type 1 = non-SVID
VCCIN VR Address = 0x0
VCCIN VR Type = 0x0
VR: Update VR overrides
VR: SelectedCtdpLevel = 0
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
VR: Cpu Identifier = 25
VR Address for Vr Index 0 = 0x0
VR SvidEnabled for Vr Index 0 = 0x1
Override IccMax[0] = 104
Override TdcCurrentLimit[0] = 158
Override TdcEnable[0] = 1
Override AcLoadline[0] = 1B8
Override DcLoadline[0] = C8
(MAILBOX) Mailbox Write Command = WRITE_ACDC_LOADLINE_CMD
(MAILBOX) AcLoadline = 440 (1/100 mOhms)
(MAILBOX) DcLoadline = 200 (1/100 mOhms)
(MAILBOX) Mailbox Write Data = 137433606
(MAILBOX) Mailbox Write Command = 80000218h
(MAILBOX) Mailbox Write Data = 8311206h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_PSI_CUTOFF_CMD
(MAILBOX) Psi1Threshold = 80 (1/4 Amp)
(MAILBOX) Psi2Threshold = 20 (1/4 Amp)
(MAILBOX) Psi3Threshold = 4 (1/4 Amp)
(MAILBOX) Psi3Enable = 1, Psi4Enable = 1
(MAILBOX) Mailbox Write Data = 4214864
(MAILBOX) Mailbox Write Command = 80000318h
(MAILBOX) Mailbox Write Data = 405050h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_IMON_CONFIG_CMD
(MAILBOX) ImonOffset = 0 (1/1000)
(MAILBOX) ImonSlope = 0 (1/100)
(MAILBOX) Mailbox Write Data = 0
(MAILBOX) Mailbox Write Command = 80000418h
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) PCODE Mailbox Write Command = WRITE_VR_ICC_MAX_CMD
(MAILBOX) IccMax = 260 (1/4 A)
(MAILBOX) Mailbox Write Command = 80000618h
(MAILBOX) Mailbox Write Data = 104h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_VR_TDC_CONFIG_CMD
(MAILBOX) TdcPowerLimit = 344 (1/8A)
(MAILBOX) Mailbox Write Command = 8000001Ah
(MAILBOX) Mailbox Write Data = 828158h
(MAILBOX) Mailbox Status = 00h
VR SvidEnabled = 0x1
VR: VR Topology data = 0x76C8F100
VR Type 0 = SVID, VR Type 1 = non-SVID
EncodedSpectrum - 8
AmtPostMemInit() - Start
IntelMeFwImageType = 3
AmtPostMemInit() - End
Initializing VtdLateInit
POSTCODE=<00009A37>
VtdLateInit
Processor does not support Boot Guard.
Touud.Data = 0x0000000880400000
SaSecurityLock Start
POSTCODE=<00009A50>
SaSecurityLock End
POSTCODE=<00009A5F>
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
SiInit () - End
Loading PEIM 4E22BF36-C59D-47C4-9FD1-25A603D75958
Loading PEIM at 0x00076E3F000 EntryPoint=0x00076E3F3C5 SaInitFsp.efi
PROGRESS CODE: V03020002 I0
SaInitFsp Start
SaInitEntryPointFspCommon() Start
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Register for FspEventEndOfFirmware callback to set PAM lock before OS handoff
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
SaInitEntryPointFspCommon() End
SaInitFsp End
PROGRESS CODE: V03020003 I0
Loading PEIM 54D7CC18-492A-4B43-AD9E-A461D81F82B5
Loading PEIM at 0x00076E2D000 EntryPoint=0x00076E2D3C5 PchInitFspTgl.efi
PROGRESS CODE: V03020002 I0
PchInitEntryPointFsp() Start
PchInitEntryPointCommon() Start
PchInitEntryPointCommon() End
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
PchInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM EEE8D8EC-40C2-159B-71C7-8796EEEF3FBC
Loading PEIM at 0x00076E1B000 EntryPoint=0x00076E1B3C6 HeciInit.efi
PROGRESS CODE: V03020002 I0
Fsp MeInitEntryPointFsp() Start
Register PPI Notify: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
Fsp MeInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM 29CBB005-C972-49F3-960F-292E2202CECD
Loading PEIM at 0x00076E13000 EntryPoint=0x00076E133C9 FspNotifyPhasePeim.efi
PROGRESS CODE: V03020002 I0
The entry of FspNotificationPeim
Reinstall PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
PROGRESS CODE: V03020003 I0
Loading PEIM 4F1F379F-2A62-48BB-AC34-D3F135C6E2B7
Loading PEIM at 0x00076E0B000 EntryPoint=0x00076E0B346 PcatSingleSegmentPciCfg2Pei.efi
PROGRESS CODE: V03020002 I0
Install PPI: 057A449A-1FDC-4C06-BFC9-F53F6A99BB92
PROGRESS CODE: V03020003 I0
Loading PEIM 76ED893A-B2F9-4C7D-A05F-1EA170ECF6CD
Loading PEIM at 0x00076D7F000 EntryPoint=0x00076D7F4A9 IntelGraphicsPeim.efi
PROGRESS CODE: V03020002 I0
[INFO]:[PeiGraphicsEntryPoint()]:[PEI Module Name: Intel(R) Graphics Pei Module [17.0.1077] [DEBUG]]
[INFO]:[PeiGraphicsEntryPoint()]:[The value of DMI SIM Register[7:0] is 0]
[INFO]:[PeiGraphicsEntryPoint()]:[Simulation mode is disabled. Environment:HW]
Install PPI: 4EABCD09-43D3-4B4D-B73D-43C8D9899905
Install PPI: 776B0413-92BE-4EB3-BA42-4E75AB1934D9
Install PPI: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
PROGRESS CODE: V03020003 I0
DXE IPL Entry
FSP HOB is located at 0x76C90000
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: FFE09F2D
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F1F1D7
MeOnEndOfPei() enter
SendOptionalHeciCommand ()
HobSize for MePeiPreMemConfig: 2C
HobSize for MePeiConfig: 20
HobSize for AmtPeiConfig: 24
MeOnEndOfPei() done.
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F05165
[TCSS] TcssInitEndOfPei Entry
[TCSS] UpdateMgImrStatus Entry
R_IOM_CSME_IMR_MG_STATUS: 0xC00007F9
MG FW version: 0x07F9
Load MG FW success
[TCSS] UpdateMgImrStatus End
R_IOM_CSME_IMR_TBT_STATUS: 0x00000000
TBT FW version: 0x0000
TBT FW has not yet downloaded to IMR
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F01625
SiInitOnEndOfPei - Start
POSTCODE=<00009B40>
PchOnEndOfPei after memory PEI module - Start
PcieRpConfigureRpfnMapping () Start
SPA = 0x00033210
SPB = 0x000E7654
SPC = 0x00043210
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
POSTCODE=<00009B41>
PchThermalInit () Start
POSTCODE=<00009B42>
(WDT) WdtDisableBeforeS3Resume
HD Audio Class Code: 4.3.0.
HDA: Audio DSP Disabled
HDA: Power Gating and Clock Gating enabled
HDA: Configuration Lockdown
POSTCODE=<00009B47>
PchOnEndOfPei after memory PEI module - End
ConfigureMscForCpuAndPchTraceHub() Start
Trace Hub Memory is not allocated, skip configure MSC!!
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
ConfigureMscForCpuAndPchTraceHub() End
Removing PSF access: EPMASK offset 14, BIT26, endpoint: BA
Removing PSF access: EPMASK offset 14, BIT27, endpoint: BB
Removing PSF access: EPMASK offset 14, BIT28, endpoint: BC
Removing PSF access: EPMASK offset 14, BIT29, endpoint: BD
SetBiosDone Start
ReloadMicrocodePatch Start
POSTCODE=<00009C80>
Info: Skipping RaceConditionResponse per Policy
ReloadMicrocodePatch: second patch load started
LoadMicrocode: Before load, revision = 0xAC
LoadMicrocode: After load, revision = 0xAC
ReloadMicrocodePatch: Second patch load success.
ReloadMicrocodePatch Done
POSTCODE=<00009C81>
ApSafePostMicrocodePatchInit Start
POSTCODE=<00009C82>
ApSafePostMicrocodePatchInit Done
POSTCODE=<00009C83>
Set BIOS_RESET_CPL to indicate all configurations complete
POSTCODE=<00009A61>
GraphicsPmInit Start
POSTCODE=<00009A63>
iGfx Initialization start.
Initializing GT PowerManagement
----- GT PMInit() Begin------
Starting Register programming for GT PM.
Poll to verify Force Wake Acknowledge Bit, Result = 1
Enabled DOP clock gating
DSS Enable Read 0x3F Ssid 0x0
Entered RC6 state in idle mode
GT PM Init Done. Exiting.
ProgramCdClkReg: CdClock 0XFF CDCLK_CTL 0XB80518
iGfx Initialization end.
Initializing Pei Display
POSTCODE=<00009A03>
PeiDisplayInit: Begin
Register PPI Notify: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
Notify: PPI Guid: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B, Peim notify entry point: 76F05E37
PeiGraphicsNotifyCallback Entry
POSTCODE=<00009A04>
CallPpiAndFillFrameBuffer
POSTCODE=<00009A05>
CallPpiAndFillFrameBuffer: Begin
GraphicsPpiInit Start
POSTCODE=<00009A06>
[INFO]:[IsGraphicsDeviceSupported()]:[Supported Graphics Device ID Found]
[INFO]:[InitializeVbtManager()]:[VBT Base Address: 0x76A5B91C]
[INFO]:[InitializeVbtBlockPtrTable()]:[Vbt Version = 250]
[INFO]:[InitializePlatformParams()]:[Initializing Pei Platform Parameters.]
[INFO]:[InitializePlatformParams()]:[LID status from PEI platform policy unsupported.]
[INFO]:[InitializeGfxMmioBase()]:[GfxMmio Base address: 0xAF000000]
[INFO]:[InitializeGpuObject()]:[GfxDeviceId = 0x9A49 and GfxSteppingId = 0x1]
[INFO]:[InitializePchObject()]:[PCH Device Id = 0xA088 and Stepping value: 0x20]
[INFO]:[InitializePchObject()]:[PCH Type is TGL-LP.]
[INFO]:[InitializeGfxFrameBufferBase()]:[GFX FrameBuffer Base Address: 0xB0000000]
[INFO]:[InitializeDsmSizeVariable()]:[Amount of main memory pre-allocated by BIOS for GTT:8 MB]
[INFO]:[InitializeDsmSizeVariable()]:[GsmTableIndex as per BIOS is: 254 and GsmTableSize 60MB]
[INFO]:[InitializeVideoMemory()]:[BDSM value from MMIO offset 0x1080C0: 0x7C000000]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[CDCLK_CTL_REG[46000h] = 0xB80518.]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[Maximum supported Cdclk: 0x28C. SWF06: 0xB80518]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[InitializeCdClockFrequency()]:[Value of CD Freq Select: 0x0. Value of CD Freq Decimal: 0x518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[EnableCdClockPll()]:[Cdclk Enable register: 0xC0000022]
[INFO]:[InitializeCdClockFrequency()]:[Configuring the CD clock control register with the value: 0x380518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x33333300]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x706B4633]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 80]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0xB]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 70]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values from SAGV data0 : 0xB]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 1 : 33333300]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 2 : 706B4633]
[INFO]:[WatermarkInit()]:[Watermark Init is done]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP only.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 2/ Actual PchDdcNumber = 2]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 3/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-B]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[TglCheckComboPortLiveStatus()]:[Live State is set for Combo Port]
[INFO]:[ReadLttprCapabilities()]:[Reading LTTPR Caps for DdiType=1/AuxChannelNumber=16]
[INFO]:[DpInitializePort()]:[DPCD revision is 0x12]
[INFO]:[DpInitializePort()]:[Enable down spread for panel]
[INFO]:[DpLibInitializeDscCaps()]:[DSC is not supported for DPCD revision less than 1.4]
[INFO]:[CalculatePortMaxLinkRateDpcd()]:[Maximum port link rate DPCD : 0x14]
[INFO]:[DpInitializePort()]:[Panel Lane Count for DP is 4]
[INFO]:[DpInitializePort()]:[Maximum Link Rate for DP is 0xA]
[INFO]:[DpInitializePort()]:[Updated Panel Lane Count for DP is 4]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability Data type = EDID.]
[INFO]:[ReadEDID()]:[EDID size = 256]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability EDID Data size = 256 Bytes.]
==================== RAW EDID ==========================
00 FF FF FF FF FF FF 00 1E 6D CA 5B 01 01 01 01
01 1F 01 04 A5 3C 22 78 FA 7B 45 A4 55 4A A2 27
0B 50 54 A5 4B 00 71 4F 81 C0 81 00 81 80 95 00
90 40 A9 C0 B3 00 2A 44 80 A0 70 38 27 40 30 20
35 00 E0 0E 11 00 00 1E 02 3A 80 18 71 38 2D 40
58 2C 45 00 FE 22 11 00 00 1E 00 00 00 FD 00 38
4B 1E 55 12 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 46 48 44 0A 20 20 20 20 20 20 01 ED
02 03 1C F1 49 90 04 03 01 10 12 10 1F 13 23 09
07 07 83 01 00 00 65 03 0C 00 10 00 02 3A 80 18
71 38 2D 40 58 2C 45 00 FE 22 11 00 00 1E 01 1D
00 72 51 D0 1E 20 6E 28 55 00 FE 22 11 00 00 1E
8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 FE 22 11 00
00 18 00 00 00 FF 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E3
========================================================
[INFO]:[ParseDisplayIdTiledTopologyBlock()]:[Couldn't find Tiled Display Info Block.]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[DpDetectDisplayDevice()]:[DP Detection successful for port: Ddi-B]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 3]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 5]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetTimingFromDisplayIDExtention()]:[Finding extension block. Block size: 256]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetNativeModeFromEDID()]:[DTD 1 pixel clock is 174500KHz with multiplier 1]
[INFO]:[GetNativeModeFromEDID()]:[EDID Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[GetNativeModeFromEDID()]:[A supported DTD is found with pixel clock = 174500KHz]
[INFO]:[GetAspectRatioFromEdid()]:[Aspect ratio of Device type 3 is 78 ]
[INFO]:[GetNativeModeFromEDID()]:[Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[BuildSupportedModesTable()]:[GetNativeMode Status for dev 1 = Success. Resolution = 1920x1080 Mode Type = 1]
[INFO]:[SetMode()]:[FrameBufferBase = 0xB0000000]
[INFO]:[GetMaxFrameBufferSizeInBytes()]:[Frame Buffer Size in Bytes: 62914560]
[INFO]:[GalSetMode()]:[Mode set called for mode number: 1920x1080 with 4 bytes per pixel.]
[INFO]:[GalSetMode()]:[Current mode Type = 0 and modeType to set = 1]
[INFO]:[GalSetMode()]:[IsDynamicCdClockSupportEnabled = 0]
[INFO]: [GalSetMode()]:[IsHotPlugEventInProgress():0.]
[INFO]: [GalSetMode()]:[Clearing the frame buffer]
[INFO]:[ClearVideoMemory()]:[Starting clear memory from address 0xB0000000]
[INFO]:[ClearVideoMemory()]:[Video Memory size is 0x7E9000]
[INFO]:[GalAllocateGfxResources()]:[Allocating Plane1A PipeA and TranscoderA ]
[INFO]:[GalAllocateGfxResources()]:[Calling PllSelect.]
[INFO]:[PortPllSelect()]:[Display Type DP. Pll Selected DPLL0.]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPipeline=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPlane=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayTranscoder=0]
[INFO]:[CalculateWatermarkValues()]:[The memory latency value from mailbox is: 0x3]
[INFO]:[CalculateWatermarkValues()]:[HTotal Value 2080]
[INFO]:[CalculateWatermarkValues()]:[Adjusted Pixel Rate is 174500]
[INFO]:[CalculateWatermarkValues()]:[Calculated Pipe Line Time is 96]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 1 is 21]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 2 is 32]
[INFO]:[CalculateWatermarkValues()]:[Final Watermark Value is 32]
[INFO]:[CalculateWatermarkValues()]:[Calculated Blocks = 33]
[INFO]:[CalculateWatermarkValues()]:[Calculated Lines = 2]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence started for port: Ddi-B]
[INFO]:[DpEnableDisplayDevice()]:[Type C Port State: 0]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetPanelSupportedBpc()]:[Supported bpc: 2]
[INFO]:[DpEnableDisplayDevice()]:[Original Lane Count = 4,OriginalLinkRateInUseDpcd = 0A]
[INFO]:[DpEnableDisplayDevice()]:[LinkRate = 2700000]
[INFO]:[DpEnableDisplayDevice()]:[Dp Pixel Clock(in KHz) = 174500]
[INFO]:[CalculateMaxPixelClockValue()]:[Calculated MaxPixelClock value is 360000]
[INFO]:[DpLibGetPanelColorDepth()]:[Panel Color Depth Used: 24 Bpp]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[ConfigureComboPhyPortPll ()]:[DP mode index for ref: 38400 Khz and Clock :270000 Khz: 17]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
=========== Dumping DPLL0 registers ===============
PORT_PLL_CFG_CR0_REG [0x00164284]: 0x00E001A5
PORT_PLL_CFG_CR1_REG [0x00164288]: 0x00000088
DPCLKA_CFCR0_REG [0x00164280]: 0x01E17400
============= End of dumping ====================
[INFO]:[DpEnableDisplayDevice()]:[DP Pll configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[Enabled transport control and Buffer control]
[INFO]:[DpLibTrainLink()]:[Start Full Link Training]
[INFO]:[DpLibTrainLink()]:[DpcdRevision = 0x12]
[INFO]:[DpLibTrainLink()]:[Programmed 0xA to DPCD_LNK_BW_SET_REG(0x0100) for DP with Status = Success]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x1111]
[INFO]:[TrainPattern1()]:[Clock Recovery Done]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Lane Alignment Status = 0x1]
[INFO]:[TrainPattern2()]:[Channel Equalization Successful]
[INFO]:[TrainPattern2()]:[Channel Equalization Done and Vswing and PreEmphLevel are 0 and 0]
[INFO]:[DpEnableDisplayDevice()]:[Link training is completed successfully]
[INFO]:[GetWatermarkLineTime()]:[Returning line time value 60]
[INFO]:[DpEnableDisplayDevice()]:[DP pipe scalar is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP MNTu calculation is done]
[INFO]:[TranscoderSetTimings()]:[HActive = 1919/HTotal=2079, VActive = 1079/VTotal=1118]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[DP Main stream attributes are set]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder DDI function control is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder is enabled]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning blocks value 33]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning lines value 2]
[INFO]:[DpEnableDisplayDevice()]:[DP Plane is enabled]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence is completed for port: Ddi-B]
[INFO]:[GalFullSetModeEnableDevice()]:[FullSetMode completed.]
GraphicsPpiGetMode Start
POSTCODE=<00009A07>
[INFO]:[IntelPeiGraphicsGetMode()]:[Current Mode HRes = 1920 VRes = 1080]
MaxMode:0x1
Mode:0x0
SizeOfInfo:0x24
FrameBufferBase:0xB0000000
FrameBufferSize:0x7E9000
Version:0x0
HorizontalResolution:0x780
VerticalResolution:0x438
PixelFormat:0x1
PixelsPerScanLine:0x780
Install PPI: 590AD868-B0B1-4D20-91FF-C2A9D6888194
CallPpiAndFillFrameBuffer: End
PeiGraphicsNotifyCallback Exit
POSTCODE=<00009A0F>
Initializing CD Clock
POSTCODE=<00009A65>
SaPciPrint Start
POSTCODE=<00009A64>
Printing PCI space for device 0
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 14 9A 06 00 90 20 01 00 00 06 00 00 00 00
10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30 00 00 00 00 E0 00 00 00 00 00 00 00 00 00 00 00
40 01 10 DA FE 00 00 00 00 01 00 DC FE 00 00 00 00
50 C1 FE 00 00 11 80 02 00 C7 00 A0 7F 01 00 00 7B
60 01 00 00 C0 00 00 00 00 01 00 DA FE 00 00 00 00
70 08 02 00 01 00 04 00 00 00 00 00 00 88 06 00 00
80 30 33 33 33 33 33 00 00 00 00 00 00 00 00 00 00
90 08 02 00 01 00 04 00 00 1A 02 00 01 00 04 00 00
A0 01 00 00 00 08 00 00 00 01 00 40 80 08 00 00 00
B0 01 00 00 7C 01 00 80 7B 01 00 00 7B 01 00 C0 7F
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 1A 02 00 01 00 04 00 00 00 00 00 00 00 00 00 00
E0 09 00 14 01 10 64 00 F0 08 00 24 90 0A 82 61 06
F0 00 80 1F 00 1D 0F 01 00 00 00 00 00 00 00 00 00
Printing PCI space for device 2
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 49 9A 07 00 10 00 01 00 00 03 00 00 00 00
10 04 00 00 AF 00 00 00 00 0C 00 00 B0 00 00 00 00
20 01 00 00 00 00 00 00 00 00 00 00 00 86 80 12 22
30 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
40 09 70 0C 01 0C 00 FF FF 00 00 00 00 00 00 00 00
50 C1 FE 00 00 11 00 00 00 00 00 00 00 00 00 00 00
60 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
70 10 AC 92 00 00 80 00 10 07 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 05 D0 00 01
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 01 00 00 7C 00 00 00 00 01 00 D9 FE 00 00 00 00
D0 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 C7 00 A0 7F 00 00 00 00 00 00 00 00 00 00 00 00
ConfigureHdAudioCodec() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
POSTCODE=<00009B0F>
DetectAndInitializeCodec() Start
SDI#0 has HD-Audio device.
SDI#0: Detected HD-Audio Codec 0x111D76E0 rev 0x03
ConfigureLinkFrequency() Start [SDI:0]
HDA: HDAudio-Link frequency configuration
SDI#0 Verb F00h ParamtererId = 16h response = 0x00000000
HDA: Codec Static Frequency Switching not supported!
ConfigureLinkFrequency() Exit, Status = Unsupported
Found verb table for vendor 0x111D devId 0x76E0 rev 0xFF (SDI:FF, size: 40 dwords)
SDI#1 has no HD-Audio device.
SDI#2 has HD-Audio device.
SDI#2: Detected HD-Audio Codec 0x80862812 rev 0x00
ConfigureLinkFrequency() Start [SDI:2]
HDA: iDisplay-Link frequency configuration
HDA: iDisplay-Link Static BCLK Frequency Switch ID = 4 - 96MHz
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00000004
ConfigureLinkFrequency() End
ConfigureLinkFrequency() Exit, Status = Success
Found verb table for vendor 0x8086 devId 0x2812 rev 0xFF (SDI:FF, size: 18 dwords)
DetectAndInitializeCodec() End, Status = Success
ConfigureHdAudioCodec() End, Status = Success
CpuPowerMgmtInit Start
POSTCODE=<00009C6A>
PeimInitializePowerMgmt Entry
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
EIST capable
HWP capable
Itbm: Intel Turbo Boost Max Technology 3.0 supported
InitPpm
POSTCODE=<00009C71>
PPM:: ConfigTDP Supported Levels=2
PPM:: ConfigTDP Nominal Ratio=28 Tdp=224
PPM:: ConfigTDP Level1 Ratio=12 Tdp=96
PPM:: ConfigTDP Level2 Ratio=18 Tdp=120
OverClocking Lock Bit is set. Disable the Lock and reset the system
(MAILBOX) Mailbox Read Command = 5h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 22Bh
(MAILBOX) Mailbox Status = 00h
Itbm: InitializeItbm()
Itbm: Itbm support is present in Silicon, but reference code policy is disabled
Itbm: Num of Processors = 0x8
Itbm: Highest performance of slowest core LowestMaxPerf = 0x0
MSR(1FC) before configuring C1E: 0x00240059
MSR(1FC) after configuring C1E: 0x00240059
Programming the C6/C7/C8/C9/C10 (MSR 0x60B, 0x60C ,0x633, 0x634, 0x635 IRTL if not auto.
TAR Ratio Replace at 6 with 14
CTDP Ratio Replace at 5 with 15
PROCHOT# OUT is disabled
PROCHOT# Response is enabled
PPM:: ConfigTDP MSR_CONFIG_TDP_CONTROL=0
PPM:: ConfigTDP MSR_TURBO_ACTIVATION_RATIO=14
PL3 MSR 615 Before Writing 0
PL3 MSR 615 After Writing 0
PL4 MSR 601 Before Writing 0
PL4 MSR 601 After Writing 3C8
DDR Power Limit 1 = 0
DDR Power Limit 2 = 0
New Platform Power Limit 1 0 watt (0 in CPU power unit)
Platform Power Limit 2 Power = 0 Watts (0 in CPU power unit)
CPU Post-Mem Exit
POSTCODE=<00009C7F>
EndOfPeiCheckAndForceVddOn start
EndOfPeiCheckAndForceVddOn end status - 0x0
[SA] BootMode = 0
Clear Temp Gfx BARs at End Of PEI.
BuildFviInfoHob(): Build Smbios FVI Data Hob
IomFwVersion = 11001600
MgFwVersion = 07F9
TbtFwVersion = 0000
InitializeSmbiosCacheInfoHobs() - Start
InitializeSmbiosCacheInfoHobs() - End
InitializeSmbiosProcessorInfoHob() - Start
(MAILBOX) Mailbox Read Command = 105h
(MAILBOX) Mailbox Status = 1Fh
(SMBIOS) BCLK frequency message 0, Status = Success
(SMBIOS) Setting to default BCLK frequency.
(MAILBOX) Mailbox Read Command = 1h
(MAILBOX) Mailbox Status = 1Fh
Turbo MaxSpeed 4400 MHz
InitializeSmbiosProcessorInfoHob() - End
SiInitOnEndOfPei - End
FSP is waiting for NOTIFY
FspSiliconInitApi() - [Status: 0x00000000] - End
PROGRESS CODE: V0000087F I0
Success
FspGfxHob->FrameBufferBase = 0xB0000000
Boot-time Cpu DTS: 0x1B8
Graphics Info: 1920 x 1080 x 32 @ 0xB0000000
MEM: 0000000000000000 00000000000A0000 00 1
MEM: 00000000000A0000 0000000000060000 00 2
MEM: 0000000000100000 00000000760B8000 00 1
MEM: 00000000761B8000 0000000000500000 01 2
MEM: 00000000766B8000 0000000000090000 00 3
MEM: 0000000076748000 0000000000008000 00 4
MEM: 0000000076750000 0000000000500000 00 2
MEM: 0000000076C50000 00000000003B0000 00 2
MEM: 0000000077000000 0000000004000000 00 2
MEM: 000000007B000000 0000000000800000 00 2
MEM: 000000007B800000 0000000000800000 00 2
MEM: 000000007C000000 0000000003C00000 00 2
MEM: 00000000FED20000 0000000000060000 00 2
MEM: 00000000FF530000 0000000000AD0000 00 2
MEM: 0000000100000000 0000000780400000 00 1
MP Init (Wakeup)
SMRR Base: 0x7B000006 Mask: 0xFF800000
MP Init (Run)
Detected 8 CPU threads
CPU 0 APIC ID: 0
CPU 1 APIC ID: 4
CPU 2 APIC ID: 2
CPU 3 APIC ID: 6
CPU 4 APIC ID: 1
CPU 5 APIC ID: 3
CPU 6 APIC ID: 5
CPU 7 APIC ID: 7
PCI Enum
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
PciBus: Discovered PCI @ [00|08|00]
PciBus: Discovered PCI @ [00|0A|00]
PciBus: Discovered PCI @ [00|0D|00]
PciBus: Discovered PCI @ [00|0D|01]
PciBus: Discovered PCI @ [00|10|00]
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
PciBus: Discovered PCI @ [00|14|01]
PciBus: Discovered PCI @ [00|14|02]
PciBus: Discovered PCI @ [00|15|00]
PciBus: Discovered PCI @ [00|15|01]
PciBus: Discovered PCI @ [00|16|00]
PciBus: Discovered PCI @ [00|17|00]
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [01|00|00]
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [02|00|00]
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [03|00|00]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [04|01|00]
PciBus: Discovered PPB @ [04|02|00]
PciBus: Discovered PPB @ [04|03|00]
PciBus: Discovered PPB @ [04|04|00]
PciBus: Discovered PCI @ [09|00|00]
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0A|00|00]
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0B|00|00]
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0C|00|00]
PciBus: Discovered PCI @ [00|1E|00]
PciBus: Discovered PCI @ [00|1E|03]
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
PciBus: Discovered PCI @ [00|1F|04]
PciBus: Discovered PCI @ [00|1F|05]
DumpPciResAllocTable: NumOfEntries 1
Bus : 0 - FF
Io : 2000 - FFFF
Mem32: 80000000 - FFFFFFFF
Mem64: 1000000000 - 1800000000
PCI(00,00,00)
PCI(00,02,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000080000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[1].TYP = 4
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000090000000 BAR[1].LEN = 0000000010000000 BAR[1].ALN = 000000000FFFFFFF
BAR[2].TYP = 1
BAR[2].OFF = 0x20
BAR[2].BAS = 0000000000002000 BAR[2].LEN = 0000000000000040 BAR[2].ALN = 000000000000003F
PCI(00,08,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F40000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,0A,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F20000 BAR[0].LEN = 0000000000008000 BAR[0].ALN = 0000000000007FFF
PCI(00,0D,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F10000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,0D,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081200000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000081F3F000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,10,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F3E000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,10,05)
PCI(00,14,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F00000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,14,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081000000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000081F3D000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,14,02)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F2C000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000081F3C000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,15,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F3B000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,15,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F3A000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,16,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F39000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,17,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F30000 BAR[0].LEN = 0000000000002000 BAR[0].ALN = 0000000000001FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x14
BAR[1].BAS = 0000000081F38000 BAR[1].LEN = 0000000000000100 BAR[1].ALN = 0000000000000FFF
BAR[2].TYP = 1
BAR[2].OFF = 0x18
BAR[2].BAS = 0000000000002080 BAR[2].LEN = 0000000000000008 BAR[2].ALN = 0000000000000007
BAR[3].TYP = 1
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000000002088 BAR[3].LEN = 0000000000000004 BAR[3].ALN = 0000000000000003
BAR[4].TYP = 1
BAR[4].OFF = 0x20
BAR[4].BAS = 0000000000002060 BAR[4].LEN = 0000000000000020 BAR[4].ALN = 000000000000001F
BAR[5].TYP = 3
BAR[5].OFF = 0x24
BAR[5].BAS = 0000000081F37000 BAR[5].LEN = 0000000000000800 BAR[5].ALN = 0000000000000FFF
PCI(00,1C,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081D00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(01,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081D00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081E00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081B00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(02,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081B00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081C00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,04)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(03,00,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(04,00,00)
PPB BAR0/1
PPB APPERTURE
PCI(04,01,00)
PPB BAR0/1
PPB APPERTURE
PCI(04,02,00)
PPB BAR0/1
PPB APPERTURE
PCI(04,03,00)
PPB BAR0/1
PPB APPERTURE
PCI(04,04,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(09,00,00)
BAR[0].TYP = 4
BAR[0].OFF = 0x10
BAR[0].BAS = 00000000A0000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[2].TYP = 4
BAR[2].OFF = 0x1C
BAR[2].BAS = 00000000A1000000 BAR[2].LEN = 0000000000008000 BAR[2].ALN = 0000000000007FFF
PCI(00,1D,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081900000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0A,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081900000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081A00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,01)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081700000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0B,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081700000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081800000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081500000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0C,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081500000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081600000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1E,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F36000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000081F35000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,1E,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F34000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,1F,00)
PCI(00,1F,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F28000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[3].TYP = 3
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000081400000 BAR[3].LEN = 0000000000100000 BAR[3].ALN = 00000000000FFFFF
PCI(00,1F,04)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F33000 BAR[0].LEN = 0000000000000100 BAR[0].ALN = 0000000000000FFF
BAR[3].TYP = 1
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000000002040 BAR[3].LEN = 0000000000000020 BAR[3].ALN = 000000000000001F
PCI(00,1F,05)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F32000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI HOST: Bus(0x00-0C)
BAR[0].TYP = 1
BAR[0].OFF = 0x100
BAR[0].BAS = 0000000000002000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000080000000 BAR[2].LEN = 0000000002000000 BAR[2].ALN = 0000000000FFFFFF
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 0000000090000000 BAR[3].LEN = 0000000011100000 BAR[3].ALN = 000000000FFFFFFF
PciRootBridgeInfoHob: Rev 0x1, Count 0x1
Bus(0x00-0C)
BarType-1: Base 0x0000000000002000 Length 0x0000000000001000
BarType-3: Base 0x0000000080000000 Length 0x0000000002000000
BarType-4: Base 0x0000000090000000 Length 0x0000000011100000
MEM Pool Used: 0x0000703C
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,2,1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 1:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrOverrideCheck 1:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveCpmConfiguration 1:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveL1ssConfiguration 1:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveAspmConfiguration 1:0:0
GetAspmCaps 01:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 01:00:00 - yes
SetAspm on 01:00:00 to 0
RootportDownstreamPmConfiguration 1C:3
RecursiveBusAssignmentP 0:1C:3 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E3000 Val 0 En 0
ConfigureRpLtrOverride 1C:3
RecursiveCpmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:3
GetAspmCaps 00:1C:03 L0s- 4:x L1- 16:x
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:03 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1C:4
RecursiveBusAssignmentP 0:1C:4 -> 0,4,9
IsPcieDevice 03:00:00 - yes
RecursiveBusAssignmentP 3:0:0 -> 3,5,9
IsPcieDevice 04:00:00 - yes
RecursiveBusAssignmentP 4:0:0 -> 4,6,5
IsPcieDevice 04:01:00 - yes
RecursiveBusAssignmentP 4:1:0 -> 4,7,6
IsPcieDevice 04:02:00 - yes
RecursiveBusAssignmentP 4:2:0 -> 4,8,7
IsPcieDevice 04:03:00 - yes
RecursiveBusAssignmentP 4:3:0 -> 4,9,8
IsPcieDevice 04:04:00 - yes
RecursiveBusAssignmentP 4:4:0 -> 4,A,9
IsPcieDevice 09:00:00 - yes
RecursiveLtrConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 04:01:00 - yes
RecursiveLtrConfiguration 4:1:0
HasChildBus04:01:00: yes, 6
IsPcieDevice 04:02:00 - yes
RecursiveLtrConfiguration 4:2:0
HasChildBus04:02:00: yes, 7
IsPcieDevice 04:03:00 - yes
RecursiveLtrConfiguration 4:3:0
HasChildBus04:03:00: yes, 8
IsPcieDevice 04:04:00 - yes
RecursiveLtrConfiguration 4:4:0
HasChildBus04:04:00: yes, 9
IsPcieDevice 09:00:00 - yes
RecursiveLtrConfiguration 9:0:0
Not LtrCapable 09:00:00
RecursiveLtrOverrideCheck 0:1C:4
HasChildBus00:1C:04: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrOverrideCheck 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrOverrideCheck 4:0:0
HasChildBus04:00:00: yes, 5
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 04:01:00 - yes
RecursiveLtrOverrideCheck 4:1:0
HasChildBus04:01:00: yes, 6
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 04:02:00 - yes
RecursiveLtrOverrideCheck 4:2:0
HasChildBus04:02:00: yes, 7
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 04:03:00 - yes
RecursiveLtrOverrideCheck 4:3:0
HasChildBus04:03:00: yes, 8
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 04:04:00 - yes
RecursiveLtrOverrideCheck 4:4:0
HasChildBus04:04:00: yes, 9
IsPcieDevice 09:00:00 - yes
RecursiveLtrOverrideCheck 9:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E4000 Val 0 En 0
ConfigureRpLtrOverride 1C:4
RecursiveCpmConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCpmConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveCpmConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 04:01:00 - yes
RecursiveCpmConfiguration 4:1:0
HasChildBus04:01:00: yes, 6
IsPcieDevice 04:02:00 - yes
RecursiveCpmConfiguration 4:2:0
HasChildBus04:02:00: yes, 7
IsPcieDevice 04:03:00 - yes
RecursiveCpmConfiguration 4:3:0
HasChildBus04:03:00: yes, 8
IsPcieDevice 04:04:00 - yes
RecursiveCpmConfiguration 4:4:0
HasChildBus04:04:00: yes, 9
IsPcieDevice 09:00:00 - yes
RecursiveCpmConfiguration 9:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveL1ssConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveL1ssConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 04:01:00 - yes
RecursiveL1ssConfiguration 4:1:0
HasChildBus04:01:00: yes, 6
IsPcieDevice 04:02:00 - yes
RecursiveL1ssConfiguration 4:2:0
HasChildBus04:02:00: yes, 7
IsPcieDevice 04:03:00 - yes
RecursiveL1ssConfiguration 4:3:0
HasChildBus04:03:00: yes, 8
IsPcieDevice 04:04:00 - yes
RecursiveL1ssConfiguration 4:4:0
HasChildBus04:04:00: yes, 9
IsPcieDevice 09:00:00 - yes
RecursiveL1ssConfiguration 9:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:4
GetAspmCaps 00:1C:04 L0s- 4:x L1- 16:x
HasChildBus00:1C:04: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveAspmConfiguration 3:0:0
GetAspmCaps 03:00:00 L0s- 0:x L1+ 1:x
HasChildBus03:00:00: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveAspmConfiguration 4:0:0
GetAspmCaps 04:00:00 L0s- 0:x L1+ 1:x
HasChildBus04:00:00: yes, 5
SetAspm on 04:00:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 04:01:00 - yes
RecursiveAspmConfiguration 4:1:0
GetAspmCaps 04:01:00 L0s- 0:x L1+ 1:x
HasChildBus04:01:00: yes, 6
SetAspm on 04:01:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 04:02:00 - yes
RecursiveAspmConfiguration 4:2:0
GetAspmCaps 04:02:00 L0s- 0:x L1+ 1:x
HasChildBus04:02:00: yes, 7
SetAspm on 04:02:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 04:03:00 - yes
RecursiveAspmConfiguration 4:3:0
GetAspmCaps 04:03:00 L0s- 0:x L1+ 1:x
HasChildBus04:03:00: yes, 8
SetAspm on 04:03:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 04:04:00 - yes
RecursiveAspmConfiguration 4:4:0
GetAspmCaps 04:04:00 L0s- 0:x L1+ 1:x
HasChildBus04:04:00: yes, 9
IsPcieDevice 09:00:00 - yes
RecursiveAspmConfiguration 9:0:0
GetAspmCaps 09:00:00 L0s+ 5:3 L1+ 16:64
CombineAspm FF:3F -> 3F
SetAspm on 04:04:00 to 2
IsPcieDevice 09:00:00 - yes
SetAspm on 09:00:00 to 2
CombineAspm FF:3F -> 3F
CombineAspm FF:3F -> 3F
SetAspm on 00:1C:04 to 0
IsPcieDevice 03:00:00 - yes
SetAspm on 03:00:00 to 0
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,2,1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 1:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrOverrideCheck 1:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveCpmConfiguration 1:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveL1ssConfiguration 1:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveAspmConfiguration 1:0:0
GetAspmCaps 01:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 01:00:00 - yes
SetAspm on 01:00:00 to 0
RootportDownstreamPmConfiguration 1D:0
RecursiveBusAssignmentP 0:1D:0 -> 0,B,A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration 0:1D:0
HasChildBus00:1D:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration A:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:0
HasChildBus00:1D:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrOverrideCheck A:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E8000 Val 0 En 0
ConfigureRpLtrOverride 1D:0
RecursiveCpmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveCpmConfiguration A:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:0
HasChildBus00:1D:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveL1ssConfiguration A:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:0
GetAspmCaps 00:1D:00 L0s- 4:x L1- 16:x
HasChildBus00:1D:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveAspmConfiguration A:0:0
GetAspmCaps 0A:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:00 to 0
IsPcieDevice 0A:00:00 - yes
SetAspm on 0A:00:00 to 0
RootportDownstreamPmConfiguration 1D:1
RecursiveBusAssignmentP 0:1D:1 -> 0,C,B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration 0:1D:1
HasChildBus00:1D:01: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration B:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:1
HasChildBus00:1D:01: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrOverrideCheck B:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E9000 Val 0 En 0
ConfigureRpLtrOverride 1D:1
RecursiveCpmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveCpmConfiguration B:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:1
HasChildBus00:1D:01: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveL1ssConfiguration B:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:1
GetAspmCaps 00:1D:01 L0s- 4:x L1- 16:x
HasChildBus00:1D:01: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveAspmConfiguration B:0:0
GetAspmCaps 0B:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:01 to 0
IsPcieDevice 0B:00:00 - yes
SetAspm on 0B:00:00 to 0
RootportDownstreamPmConfiguration 1D:3
RecursiveBusAssignmentP 0:1D:3 -> 0,D,C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration 0:1D:3
HasChildBus00:1D:03: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration C:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:3
HasChildBus00:1D:03: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrOverrideCheck C:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride EB000 Val 0 En 0
ConfigureRpLtrOverride 1D:3
RecursiveCpmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveCpmConfiguration C:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:3
HasChildBus00:1D:03: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveL1ssConfiguration C:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:3
GetAspmCaps 00:1D:03 L0s+ 4:x L1+ 16:x
HasChildBus00:1D:03: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveAspmConfiguration C:0:0
GetAspmCaps 0C:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:03 to 2
IsPcieDevice 0C:00:00 - yes
SetAspm on 0C:00:00 to 2
GFX framebuffer WC is enabled @ 0x90000000:0x10000000
Call FspNotifyPhase(20) ... PROGRESS CODE: V00006800 I0
NotifyPhaseApi() - Begin [Phase: 00000020]
FSP Post PCI Enumeration ...
Install PPI: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E3F517
Enable MSE of Telemetry
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E2D472
PchOnPciEnumCompleteFsp() Start
PchOnPciEnumCompleteCommon() Start
Protected range 0: 0x960F1530
Protected range 1: 0x9FFF1650
GpioCheckConflict Start..
[GPIO Conflict Check] No GPIO HOB found.
PchOnPciEnumCompleteCommon() End
PchOnPciEnumCompleteFsp() End
NotifyPhaseApi() - End [Status: 0x00000000]
PROGRESS CODE: V0000687F I0
Success
ACPI NVS, LowPowerS0IdleConstraint(Micro-pep constraints) = 0x0000000069CA07F7
Update Cpu Nvs Done
Revision 0x1, PpmFlags 0x027A7FB3
Initialize VT-d
VTd enabled
ACPI Init
Creating BDAT Table...
No BDAT data exists, exiting without creating table
Updated BDAT Table in AcpiTable Entries
Publish ACPI table: BDAT @ 0x766B8210
Updated DMAR Table in AcpiTable Entries
Update Dmar ACPI Table
McD0BaseAddress 0x00000000, IgdMode 0x0000
GttMode 0x0003, GttMmAdr 0x80000000, GttMemSize 0x00800000
RMRR Base address IGD 000000007B800000
RMRR Limit address IGD 000000007FBFFFFF
RMRR Base address USB 0000000000000000
RMRR Limit address USB 0000000000000000
WARNING: RmrrUsb.RmrrHeader.ReservedMemoryRegionBaseAddress is 0.
RMRR Base address TCSS DMA0 0000000000000000
RMRR Limit Address TCSS DMA0 0000000000000000
RMRR Base address TCSS DMA1 0000000000000000
RMRR Limit Address TCSS DMA1 0000000000000000
VTD base address 1 = FED90000
VTD base address 2 = 0
VTD base address 4 = 0
VTD base address 5 = 0
VTD base address 6 = 0
VTD base address 7 = 0
VTD base address 3 = FED91000
Removing Ibt DRHD engine 0
Removing Ibt DRHD engine 1
Removing Ibt DRHD engine 2
Removing Ibt DRHD engine 3
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Publish ACPI table: DMAR @ 0x766B8240
Not adding ACPI table
Publish ACPI table: FACP @ 0x766B8310
Publish ACPI table: FWST @ 0x766B8430
Publish ACPI table: HPET @ 0x766B8560
Publish ACPI table: LPIT @ 0x766B85A0
Publish ACPI table: APIC @ 0x766B8670
Publish ACPI table: MCFG @ 0x766B8760
Publish ACPI table: FPDT @ 0x766B87A0
Publish ACPI table: TPM2 @ 0x766B8840
Updated Psd Table in AcpiTable Entries
Publish ACPI table: PSDS @ 0x766B8890
Publish ACPI table: SSDT @ 0x766B88F0
Publish ACPI table: SSDT @ 0x766B8D80
Publish ACPI table: SSDT @ 0x766B9210
Publish ACPI table: SSDT @ 0x766B9B00
Publish ACPI table: SSDT @ 0x766B9FE0
Publish ACPI table: SSDT @ 0x766BAB20
Publish ACPI table: SSDT @ 0x766BAEC0
Publish ACPI table: SSDT @ 0x766BB000
Publish ACPI table: SSDT @ 0x766BB820
Publish ACPI table: SSDT @ 0x766BB9F0
CPU PNVS Base Old=0xFFFF0000 New=0x76748D8D
CPU PNVS Size Old=0xAA55 New=0x0065
Publish ACPI table: SSDT @ 0x766BBDD0
Publish ACPI table: SSDT @ 0x766BE240
PNVS Old=0xFFFF0000 New=0x76748AB5
PNVL Old=0x0000AA55 New=0x000002D8
Publish ACPI table: SSDT @ 0x766DFE70
SANV Base Old=0xFFFF0000 New=0x76748DF2
SANV Size Old=0xAA55 New=0x01BC
Publish ACPI table: SSDT @ 0x766E0240
Publish ACPI table: SSDT @ 0x766E6440
Publish ACPI table: SSDT @ 0x766E72C0
Publish ACPI table: BGRT @ 0x766EAF20
Find RTCT table
Not adding ACPI table
ACPI Ret: Success
AppendSmbiosFwSts () Start
Current ME FW HOB data printed -
00: 01 04 00 00 00 00 00 00 - 55 02 00 90 16 01 10 80
10: 20 00 00 00 00 40 00 00 - 00 00 00 00 00 00 40 00
20: 01 00 00 00 FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - FF FF FF FF 04 00 00 00
40: 00 00 00 80 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 05 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
FWSTS SMBIOS table OEM type 0xDB data printed -
00: DB 6A 00 00 01 04 01 55 - 02 00 90 16 01 85 30 20
10: 00 00 00 00 40 00 00 00 - 00 00 00 00 00 40 00 02
20: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - 03 00 00 00 80 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 04 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00
VbtAddress =0x76A5B91C
Extended VBT supported
VBT data found '$VBT TIGERLAKE '
Updating GOP VBT fields using GOP Configuration Lib.
Update VBT for TGL-U (CNT) LPDDR4
VBT Updated.
IgdOpRegion ended
HeciInitialize () - Start
InitializeHeci () - H_RDY is already initialized
HeciInitLib init Status: Success
CSME MeasuredBoot state: 0
Loading Payload ID UEFI
Loading Component EPLD:UEFI
Registering container EPLD
HASH verification for usage (0x00001000) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00001000): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Load Payload ID 0x49464555 @ 0x00B00000
FV Format Payload
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
MP Init (Done)
HOB @ 0x76C10000
Created 3 OS boot options (Current: 0)
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
HECI1 MeFirmwareStatus = 400000
Stage2: HwState 0x4 TpmType 0x1
TPM Lib Private Data not found
Unable to get log area for TCG 2.0 format events !!
Stage2 stack: 0x40000 (stack used 0xA40, HOB used 0x16E0, 0x3DEE0 free)
Stage2 heap: 0x4C0000 (0x2C9C50 used, 0x1F63B0 free, 0x438CD7 max used)
Payload entry: 0x00800320
Jump to payload
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x00000800000, size is 0x00030000, handle is 0x800000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x5 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x0000080D080 EntryPoint=0x0000080D395 PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM A3610442-E69F-4DF3-82CA-2360C4031A23
Loading PEIM at 0x00000812720 EntryPoint=0x00000812A35 ReportStatusCodeRouterPei.efi
Install PPI: 0065D394-9951-4144-82A3-0AFC8579C251
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Loading PEIM 9D225237-FA01-464C-A949-BAABC02D31D0
Loading PEIM at 0x000008157C0 EntryPoint=0x00000815AD5 StatusCodeHandlerPei.efi
Loading PEIM 352C6AF8-315B-4BD6-B04F-31D4ED1EBE57
Loading PEIM at 0x000008186A0 EntryPoint=0x00000818A88 BlSupportPeim.efi
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
MemInfoCallback: Base=0x 0, Size=0x A0000, Type=0x0 (0x1)
MemInfoCallback: Base=0x A0000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0x 100000, Size=0x760B8000, Type=0x0 (0x1)
MemInfoCallback: Base=0x761B8000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x766B8000, Size=0x 90000, Type=0x5 (0x3)
MemInfoCallback: Base=0x76748000, Size=0x 8000, Type=0x5 (0x4)
MemInfoCallback: Base=0x76750000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x76C50000, Size=0x 3B0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x77000000, Size=0x 4000000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B000000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B800000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7C000000, Size=0x 3C00000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFED20000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFF530000, Size=0x AD0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x100000000, Size=0x780400000, Type=0x0 (0x1)
Low memory 0x761B8000
SystemLowMemTop 0x80000000
PeiMemBase: 0x721B0000.
PeiMemSize: 0x4000000.
PeiInstallPeiMemory MemoryBegin 0x721B0000, MemoryLength 0x4000000
ERROR - Invalid Firmware Volume Header Checksum, change 0xE699 to 0x57FE
Found one valid fv : 0x5D000000830000.
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: 801CEA
The 1th FV start address is 0x00000830000, size is 0x005D0000, handle is 0x830000
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Created graphics info hob
Created graphics device info hob
Detected Acpi Table at 0x766B8000, length 0x32F58
Detected Smbios Table at 0x769E8000, length 0x1000
Rsdp at 0x766B8000
Rsdt at 0x766B8030, Xsdt at 0x766B80E0
Found Fadt in Rsdt
Found MM config address in Rsdt
PmCtrl Reg 0x1804
PmTimer Reg 0x1808
Reset Reg 0xCF9
Reset Value 0x6
PmEvt Reg 0x1800
PmGpeEn Reg 0x1870
PcieBaseAddr 0xC0000000
Create acpi board info guid hob
VerifiedBoot 0x0
MeasuredBoot 0x0
Get FSP hob success. FspsBase = 0x76B78000
Get FSP hob success. FspHobList = 0x76C90000
Get SMM info. smm_base = 0x7B000000
smm_size = 0x800000
Base = 0xFF610000, Size=0x40000 Status=0xSuccess
GuidHob = 0x80E90
DeviceTable = 0x76C10E08
found it = 0x1F05
DeviceBase = 0x1F05
2DeviceBase = 0xFD000
SpiPciBase = 0xC00FD000
SpiFlashInfo->Flags = 0x1
SPI flash base at 0xC00FD000
VarStoreBase=0xFF610000, length=0x40000
TpmType - TPM_TYPE_NONE
Temp Stack : BaseAddress=0x88000 Length=0x8000
Temp Heap : BaseAddress=0x80000 Length=0x8000
Total temporary memory: 65536 bytes.
temporary memory stack ever used: 32768 bytes.
temporary memory heap used for HobList: 4192 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Old Stack size 32768, New stack size 131072
Stack Hob: BaseAddress=0x721B0000 Length=0x20000
Heap Offset = 0x72150000 Stack Offset = 0x72140000
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x000761A3000 EntryPoint=0x000761A3355 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x0007619C000 EntryPoint=0x0007619C3F6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
DiscoverPeimsAndOrderWithApriori(): Found 0x0 PEI FFS files in the 1th FV
DXE IPL Entry
Loading PEIM D6A2CB7F-6A18-4E2F-B43B-9920A733700A
Loading PEIM at 0x00076174000 EntryPoint=0x00076174B94 DxeCore.efi
Loading DXE CORE at 0x00076174000 EntryPoint=0x00076174B94
AddressBits=39 5LevelPaging=0 1GPage=1
Pml5=1 Pml4=1 Pdp=512 TotalPage=2
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 80D5FA
HandOffToDxeCore() Stack Base: 0x76154000, Stack Size: 0x20000
HOBLIST address in DXE = 0x758A2018
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000003 0x761A3000 - 0x761AFFFF
Memory Allocation 0x00000003 0x7619C000 - 0x761A2FFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000004 0x75E00000 - 0x75FFFFFF
Memory Allocation 0x00000007 0x76000000 - 0x76153FFF
Memory Allocation 0x00000004 0x721B0000 - 0x721CFFFF
Memory Allocation 0x00000004 0x75DFF000 - 0x75DFFFFF
FV Hob 0x830000 - 0xDFFFFF
InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 761973E0
InstallProtocolInterface: 8F644FA9-E850-4DB1-9CE2-0B44698E8DA4 7589ED30
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7589E098
InstallProtocolInterface: 220E73B6-6BDB-4413-8405-B974B108619A 7589E630
InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 76198070
Loading driver 80CF7257-87AB-47F9-A3FE-D50B76D89541
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754D91C0
Loading driver at 0x000754BA000 EntryPoint=0x000754BA374 PcdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754D9518
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
InstallProtocolInterface: 11B34006-D85B-4D0A-A290-D5A571310EF7 754C12C0
InstallProtocolInterface: 13A3F0F6-264A-3EF0-F2E0-DEC512342F34 754C1220
InstallProtocolInterface: 5BE40F57-FA68-4610-BBBF-E9C5FCDAD365 754C13D0
InstallProtocolInterface: FD0F4478-0EFD-461D-BA2D-E58C45FD5F5E 754C12B0
Loading driver D93CE3D8-A7EB-4730-8C8E-CC466A9ECC3C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C8B40
Loading driver at 0x000759CC000 EntryPoint=0x000759CD0F4 ReportStatusCodeRouterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C9118
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
InstallProtocolInterface: 86212936-0E76-41C8-A03A-2AF2FC1C39E2 759D20D0
InstallProtocolInterface: D2B2B828-0826-48A7-B3DF-983C006024F0 759D20C8
Loading driver F80697E9-7FD6-4665-8646-88E33EF71DFC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C81C0
Loading driver at 0x000753A0000 EntryPoint=0x000753A0418 SecurityStubDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C8498
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
InstallProtocolInterface: 94AB2F58-1438-4EF1-9152-18941A3A0E68 754232B0
InstallProtocolInterface: A46423E3-4617-49F1-B9FF-D1BFA9115839 754232A8
InstallProtocolInterface: 15853D7C-3DDF-43E0-A1CB-EBF85B8F872C 754232B8
Loading driver 1A1E4886-9517-440E-9FDE-3BE44CEE2136
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C7240
Loading driver at 0x00075494000 EntryPoint=0x000754950F4 CpuDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C7598
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
Paging: added 512 pages to page table pool
CurrentPagingContext:
MachineType - 0x8664
PageTableBase - 0x75E01000
Attributes - 0xC0000006
InstallProtocolInterface: 26BACCB1-6F42-11D4-BCE7-0080C73C8881 754A5B50
MemoryProtectionCpuArchProtocolNotify:
ProtectUefiImageCommon - 0x76197D18
- 0x0000000076174000 - 0x0000000000028000
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x0000000000001000 (0x0000000000004000)
SetUefiImageMemoryAttributes - 0x00000000759CD000 - 0x0000000000003000 (0x0000000000020000)
SetUefiImageMemoryAttributes - 0x00000000759D0000 - 0x0000000000006000 (0x0000000000004000)
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
ConvertPages: failed to find range 0 - 9FFFF
ConvertPages: failed to find range A0000 - BFFFF
ConvertPages: failed to find range C0000 - FFFFF
ConvertPages: failed to find range 761B8000 - 766B7FFF
ConvertPages: failed to find range 76750000 - 7AFFFFFF
ConvertPages: failed to find range 7B000000 - 7FBFFFFF
ConvertPages: failed to find range FEC80000 - FECFFFFF
ConvertPages: failed to find range FED20000 - FED7FFFF
ConvertPages: failed to find range FF530000 - FFFFFFFF
ConvertPages: failed to find range 100000000 - 8803FFFFF
AP Loop Mode is 1
WakeupBufferStart = 85000, WakeupBufferSize = 23C0
CpuDxe: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
CpuDxe: 5-Level Paging = 0
Detect CPU count: 8
Does not find any HOB stored CPU BIST information!
InstallProtocolInterface: 3FDDA605-A76E-4F46-AD29-12F4531B3D08 754A5C40
Loading driver C8339973-A563-4561-B858-D8476F9DEFC4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C21C0
Loading driver at 0x000754AA000 EntryPoint=0x000754AA384 Metronome.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C2498
ProtectUefiImageCommon - 0x754C21C0
- 0x00000000754AA000 - 0x0000000000003960
InstallProtocolInterface: 26BACCB2-6F42-11D4-BCE7-0080C73C8881 754AD6B8
Loading driver B601F8C4-43B7-4784-95B1-F4226CB40CEE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B30C0
Loading driver at 0x000759C2000 EntryPoint=0x000759C3118 RuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B3498
ProtectUefiImageCommon - 0x754B30C0
- 0x00000000759C2000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759C3000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759C6000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: B7DFB4E1-052F-449F-87BE-9818FC91B733 759C80A0
Loading driver 4B28E4C7-FF36-4E10-93CF-A82159E777C5
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B37C0
Loading driver at 0x000759B8000 EntryPoint=0x000759B90B4 ResetSystemRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1B18
ProtectUefiImageCommon - 0x754B37C0
- 0x00000000759B8000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759B9000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759BC000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: 27CFAC88-46CC-11D4-9A38-0090273FC14D 0
InstallProtocolInterface: 9DA34AE0-EAF9-4BBF-8EC3-FD60226C44BE 759BE120
InstallProtocolInterface: 695D7835-8D47-4C11-AB22-FA8ACCE7AE7A 759BE0F8
InstallProtocolInterface: 2DF6BA0B-7092-440D-BD04-FB091EC3F3C1 759BE0D0
Loading driver C3099578-F815-4A96-84A3-FC593760181D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B1240
Loading driver at 0x000759AE000 EntryPoint=0x000759AF0B4 SmmControlDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1698
ProtectUefiImageCommon - 0x754B1240
- 0x00000000759AE000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759AF000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759B2000 - 0x0000000000006000 (0x0000000000004008)
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
InstallProtocolInterface: 843DC720-AB1E-42CB-9357-8A0078F3561B 759B40A8
Loading driver A19B1FE7-C1BC-49F8-875F-54A5D542443F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B07C0
Loading driver at 0x0007548A000 EntryPoint=0x0007548A3C4 CpuIo2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0118
ProtectUefiImageCommon - 0x754B07C0
- 0x000000007548A000 - 0x00000000000040C0
InstallProtocolInterface: AD61F191-AE5F-4C0E-B9FA-E869D288C64F 7548DD68
Loading driver 9B680FCE-AD6B-4F3A-B60B-F59899003443
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF040
Loading driver at 0x0007546E000 EntryPoint=0x0007546E374 DevicePathDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0418
ProtectUefiImageCommon - 0x754AF040
- 0x000000007546E000 - 0x000000000000DF60
InstallProtocolInterface: 0379BE4E-D706-437D-B037-EDB82FB772A4 75477230
InstallProtocolInterface: 8B843E20-8132-4852-90CC-551A4E4A7F1C 75477220
InstallProtocolInterface: 05C99A21-C70F-4AD2-8A5F-35DF3343F51E 75477270
Loading driver 96B5C032-DF4C-4B6E-8232-438DCF448D0E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF340
Loading driver at 0x00075486000 EntryPoint=0x00075486374 NullMemoryTestDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AF898
ProtectUefiImageCommon - 0x754AF340
- 0x0000000075486000 - 0x0000000000003C40
InstallProtocolInterface: 309DE7F1-7F5E-4ACE-B49C-531BE5AA95EF 75489938
Loading driver 245CB4DA-8E15-4A1B-87E3-9878FFA07520
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AEB40
Loading driver at 0x00075482000 EntryPoint=0x00075482374 Legacy8259.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AEE98
ProtectUefiImageCommon - 0x754AEB40
- 0x0000000075482000 - 0x0000000000003A80
InstallProtocolInterface: 38321DBA-4FE0-4E17-8AEC-413055EAEDC1 75485780
Loading driver 348C4D62-BFBD-4882-9ECE-C80BB1C4783B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AE1C0
Loading driver at 0x0007537D000 EntryPoint=0x0007537D394 HiiDatabase.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AE498
ProtectUefiImageCommon - 0x754AE1C0
- 0x000000007537D000 - 0x0000000000022F60
InstallProtocolInterface: E9CA4775-8657-47FC-97E7-7ED65A084324 7539E7D8
InstallProtocolInterface: 0FD96974-23AA-4CDC-B9CB-98D17750322A 7539E850
InstallProtocolInterface: EF9FC172-A1B2-4693-B327-6D32FC416042 7539E878
InstallProtocolInterface: 587E72D7-CC50-4F79-8209-CA291FC1A10F 7539E8D0
InstallProtocolInterface: 0A8BADD5-03B8-4D19-B128-7B8F0EDAA596 7539E900
InstallProtocolInterface: 31A6406A-6BDF-4E46-B2A2-EBAA89C40920 7539E7F8
InstallProtocolInterface: 1A1241E6-8F19-41A9-BC0E-E8EF39E06546 7539E820
Loading driver C68DAA4E-7AB5-41E8-A91D-5954421053F3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A9340
Loading driver at 0x0007547E000 EntryPoint=0x0007547E334 BlSupportDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A9698
ProtectUefiImageCommon - 0x754A9340
- 0x000000007547E000 - 0x0000000000003F80
Install Acpi Table at 0x766B8000, length 0x32F58
Install Smbios Table at 0x769E8000, length 0x1000
Loading driver F9D88642-0737-49BC-81B5-6889CD57D9EA
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8840
Loading driver at 0x00075462000 EntryPoint=0x00075462334 SmbiosDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8018
ProtectUefiImageCommon - 0x754A8840
- 0x0000000075462000 - 0x0000000000005D80
InstallProtocolInterface: 03583FF6-CB36-4940-947E-B9B39F4AFAF7 754679B0
Loading driver 9A5163E7-5C29-453F-825C-837A46A81E15
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8340
Loading driver at 0x0007546A000 EntryPoint=0x0007546A374 SerialDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8618
ProtectUefiImageCommon - 0x754A8340
- 0x000000007546A000 - 0x0000000000003EA0
InstallProtocolInterface: BB25CF6F-F1D4-11D2-9A0C-0090273FC1FD 7546DB20
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7546DB68
Loading driver AD61999A-507E-47E6-BA28-79CC609FA1A4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A70C0
Loading driver at 0x00075456000 EntryPoint=0x00075456514 FspWrapperNotifyDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7A18
ProtectUefiImageCommon - 0x754A70C0
- 0x0000000075456000 - 0x0000000000005FA0
Loading driver C9602B47-9569-47C2-9D1E-FD1DF67A72E4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548F040
Loading driver at 0x0007545E000 EntryPoint=0x0007545E334 PowerButtonHandler.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7598
ProtectUefiImageCommon - 0x7548F040
- 0x000000007545E000 - 0x00000000000039E0
Successfully registered power button periodic timer event!
Loading driver 55E76644-78A5-4A82-A900-7126A5798892
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548FA40
Loading driver at 0x0007544A000 EntryPoint=0x0007544A344 HeciInitDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7548F398
ProtectUefiImageCommon - 0x7548FA40
- 0x000000007544A000 - 0x0000000000005DE0
InstallProtocolInterface: 3C7BC880-41F8-4869-AEFC-870A3ED28299 7548F5B8
Loading driver 6C2004EF-4E0E-4BE4-B14C-340EB4AA5891
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493040
Loading driver at 0x000759A5000 EntryPoint=0x000759A60B4 StatusCodeHandlerRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493D98
ProtectUefiImageCommon - 0x75493040
- 0x00000000759A5000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759A6000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759A9000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040003 I0
Loading driver 6D33944A-EC75-4855-A54D-809C75241F6C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493440
Loading driver at 0x0007533F000 EntryPoint=0x0007533F3CC BdsDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493718
ProtectUefiImageCommon - 0x75493440
- 0x000000007533F000 - 0x000000000001EE80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF6-46CC-11D4-9A38-0090273FC14D 7535B798
PROGRESS CODE: V03040003 I0
Loading driver 6CE6B0DE-781C-4F6C-B42D-98346C614BEC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75492CC0
Loading driver at 0x00075444000 EntryPoint=0x00075444414 HpetTimerDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492B98
ProtectUefiImageCommon - 0x75492CC0
- 0x0000000075444000 - 0x00000000000055A0
PROGRESS CODE: V03040002 I0
Init HPET Timer Driver
HPET Base Address = 0xFED00000
HPET_GENERAL_CAPABILITIES_ID = 0x031ABA858086A701
HPET_GENERAL_CONFIGURATION = 0x0000000000000000
HPET_GENERAL_INTERRUPT_STATUS = 0x0000000000000000
HPET_MAIN_COUNTER = 0x00000000A41F7E67
HPET Main Counter Period = 52083333 (fs)
HPET_TIMER0_CONFIGURATION = 0x00F0000000008030
HPET_TIMER0_COMPARATOR = 0x0000000000000000
HPET_TIMER0_MSI_ROUTE = 0x0000000000000000
HPET_TIMER1_CONFIGURATION = 0x00F0000000008000
HPET_TIMER1_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER1_MSI_ROUTE = 0x0000000000000000
HPET_TIMER2_CONFIGURATION = 0x00F0080000008000
HPET_TIMER2_COMPARATOR = 0x0000000076C8FE20
HPET_TIMER2_MSI_ROUTE = 0x0000000000000000
HPET_TIMER3_CONFIGURATION = 0x00F0100000008000
HPET_TIMER3_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER3_MSI_ROUTE = 0x0000000000000000
HPET_TIMER4_CONFIGURATION = 0x000000000000C000
HPET_TIMER4_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER4_MSI_ROUTE = 0x0000000000000000
HPET_TIMER5_CONFIGURATION = 0x000000000000C000
HPET_TIMER5_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER5_MSI_ROUTE = 0x0000000000000000
HPET_TIMER6_CONFIGURATION = 0x000000000000C000
HPET_TIMER6_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER6_MSI_ROUTE = 0x0000000000000000
HPET_TIMER7_CONFIGURATION = 0x000000000000C000
HPET_TIMER7_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER7_MSI_ROUTE = 0x0000000000000000
Choose 64-bit HPET timer.
HPET Interrupt Mode MSI
HPET Interrupt Vector = 0x40
HPET Counter Mask = 0xFFFFFFFFFFFFFFFF
HPET Timer Period = 100000
HPET Timer Count = 0x000000000002EE00
HPET_TIMER0_CONFIGURATION = 0x00F000000000C034
HPET_TIMER0_COMPARATOR = 0x00000000A4284868
HPET_TIMER0_MSI_ROUTE = 0xFEE0000000000140
InstallProtocolInterface: 26BACCB3-6F42-11D4-BCE7-0080C73C8881 75449190
PROGRESS CODE: V03040003 I0
Loading driver 47579CF5-1E4F-4B41-99BB-A5C334846D3B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754923C0
Loading driver at 0x00075440000 EntryPoint=0x00075440334 SmmAccessDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492218
ProtectUefiImageCommon - 0x754923C0
- 0x0000000075440000 - 0x0000000000003E60
PROGRESS CODE: V03040002 I0
SmmAccess: SmmBase = 0x7B000000, SmmSize = 0x800000
SmmAccess: Flags = 0x1, SmmCommSize=0x1000
InstallProtocolInterface: C2702B74-800C-4131-8746-8FB5B89CE4AC 75443BB0
PROGRESS CODE: V03040003 I0
Loading driver FDFF263D-5F68-4591-87BA-B768F445A9AF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x0007536B000 EntryPoint=0x0007536B3D4 Tcg2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491A98
ProtectUefiImageCommon - 0x754910C0
- 0x000000007536B000 - 0x0000000000011940
PROGRESS CODE: V03040002 I0
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
Check the tpm information from the bootloader.
Measure boot is not enabled in bootloader.
TPM is disabled in bootloader.
Error: Image at 0007536B000 start failed: Unsupported
PROGRESS CODE: V03040003 I0
Loading driver EBF342FE-B1D3-4EF8-957C-8048606FF671
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x00075323000 EntryPoint=0x00075323394 SetupBrowser.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491D18
ProtectUefiImageCommon - 0x754910C0
- 0x0000000075323000 - 0x000000000001BDA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: B9D4C360-BCFB-4F9B-9298-53C136982258 7533D8D0
InstallProtocolInterface: A770C357-B693-4E6D-A6CF-D21C728E550B 7533D900
InstallProtocolInterface: 1F73B18D-4630-43C1-A1DE-6F80855D7DA4 7533D8E0
PROGRESS CODE: V03040003 I0
Loading driver 00160F8D-2B35-4DF2-BBE0-B272A8D631F0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490CC0
Loading driver at 0x0007543C000 EntryPoint=0x0007543C344 FirmwarePerformanceDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490B18
ProtectUefiImageCommon - 0x75490CC0
- 0x000000007543C000 - 0x0000000000003D40
PROGRESS CODE: V03040002 I0
Found Fpdt in Rsdt
PROGRESS CODE: V03040003 I0
Loading driver 128FB770-5E79-4176-9E51-9BB268A17DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490340
Loading driver at 0x0007536E000 EntryPoint=0x0007536E3A4 PciHostBridgeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490198
ProtectUefiImageCommon - 0x75490340
- 0x000000007536E000 - 0x000000000000E9A0
PROGRESS CODE: V03040002 I0
InitRootBridge: populated root bus 0, with room for 12 subordinate bus(es)
RootBridge: PciRoot(0x0)
Support/Attr: 7001F / 7001F
DmaAbove4G: No
NoExtConfSpace: No
AllocAttr: 0 ()
Bus: 0 - C Translation=0
Io: 2000 - 2FFF Translation=0
Mem: 80000000 - FE0FFFFF Translation=0
MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7547DE18
InstallProtocolInterface: 2F707EBB-4A1A-11D4-9A38-0090273FC14D 7547D270
PROGRESS CODE: V03040003 I0
Loading driver A487A478-51EF-48AA-8794-7BEE2A0562F1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547CD40
Loading driver at 0x00075361000 EntryPoint=0x00075361480 tftpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7547C618
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7536C3C0
ProtectUefiImageCommon - 0x7547CD40
- 0x0000000075361000 - 0x000000000000CEE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7536BA38
PROGRESS CODE: V03040003 I0
Loading driver 0253F9FA-129A-4A8D-B12E-7DC2B6376302
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547C840
Loading driver at 0x000752FD000 EntryPoint=0x000752FD480 dpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D018
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7530D2E0
ProtectUefiImageCommon - 0x7547C840
- 0x00000000752FD000 - 0x00000000000127A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7530C478
PROGRESS CODE: V03040003 I0
Loading driver F099D67F-71AE-4C36-B2A3-DCEB0EB2B7D8
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545D1C0
Loading driver at 0x00075434000 EntryPoint=0x00075434374 WatchdogTimer.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D998
ProtectUefiImageCommon - 0x7545D1C0
- 0x0000000075434000 - 0x0000000000003920
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF5-46CC-11D4-9A38-0090273FC14D 75437670
PROGRESS CODE: V03040003 I0
Loading driver 2FA2A6DA-11D5-4DC3-999A-749648B03C56
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545CB40
Loading driver at 0x00075999000 EntryPoint=0x0007599A118 PiSmmIpl.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C098
ProtectUefiImageCommon - 0x7545CB40
- 0x0000000075999000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007599A000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007599F000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
SmmAccess: SMRAM Map Buffer too small
SmmAccess: Open SMRAM Region
SMM IPL opened SMRAM window
SMM IPL found SMRAM window 7B001000 - 7B7FFFFF
SMM IPL failed to set SMRAM window to EFI_MEMORY_WB
SMRAM attributes: 0000000000000001
SMM IPL loading SMM Core at SMRAM address 7B7EA000
SMM IPL calling SMM Core at SMRAM address 7B7EB138
PiSmmCoreImageBase - 0x000000007B7EA000
PiSmmCoreImageSize - 0x0000000000015000
SmmAddMemoryRegion
MemBase - 0x7B001000
MemLength - 0x7E9000
Type - 0x7
Attributes - 0xA
SmmAddMemoryRegion
MemBase - 0x7B000000
MemLength - 0x1000
Type - 0x6
Attributes - 0x1A
SmmAddMemoryRegion
MemBase - 0x7B7EA000
MemLength - 0x16000
Type - 0x6
Attributes - 0x1A
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545C298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E82C0
InstallProtocolInterface: F4CCBFB7-F6E0-47FD-9DD4-10A8F150C191 759A1420
InstallProtocolInterface: C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332 759A11F8
InstallProtocolInterface: 378DAEDC-F06B-4446-8314-40AB933C87A3 759A1200
PROGRESS CODE: V03040003 I0
Loading driver E660EA85-058E-4B55-A54B-F02F83A24707
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75451040
Loading driver at 0x000752CF000 EntryPoint=0x000752CF3D8 DisplayEngine.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C818
ProtectUefiImageCommon - 0x75451040
- 0x00000000752CF000 - 0x00000000000168C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 9BBE29E9-FDA1-41EC-AD52-452213742D2E 752E41B8
InstallProtocolInterface: 4311EDC0-6054-46D4-9E40-893EA952FCCC 752E41D0
PROGRESS CODE: V03040003 I0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360B18
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7CC0
Loading SMM driver at 0x0007B7D9000 EntryPoint=0x0007B7DA234 CpuIo2Smm.efi
SmmAccess: SMRAM Map Buffer too small
SmmInstallProtocolInterface: 3242A9D8-CE70-4AA0-955D-5E7B140DE4D2 7B7DF0B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360C98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7AC0
Loading SMM driver at 0x0007B7BC000 EntryPoint=0x0007B7BE124 PiSmmCpuDxeSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMRR Base: 0x7B000000, SMRR Size: 0x800000
PcdCpuSmmCodeAccessCheckEnable = 1
mAddressEncMask = 0x0
PcdControlFlowEnforcementPropertyMask = 0
SMRAM TileSize = 0x00002000 (0x00001000, 0x00001000)
SMRAM SaveState Buffer (0x7B7A6000, 0x00016000)
CPU[000] APIC ID=0000 SMBASE=7B79E000 SaveState=7B7ADC00 Size=00000400
CPU[001] APIC ID=0001 SMBASE=7B7A0000 SaveState=7B7AFC00 Size=00000400
CPU[002] APIC ID=0002 SMBASE=7B7A2000 SaveState=7B7B1C00 Size=00000400
CPU[003] APIC ID=0003 SMBASE=7B7A4000 SaveState=7B7B3C00 Size=00000400
CPU[004] APIC ID=0004 SMBASE=7B7A6000 SaveState=7B7B5C00 Size=00000400
CPU[005] APIC ID=0005 SMBASE=7B7A8000 SaveState=7B7B7C00 Size=00000400
CPU[006] APIC ID=0006 SMBASE=7B7AA000 SaveState=7B7B9C00 Size=00000400
CPU[007] APIC ID=0007 SMBASE=7B7AC000 SaveState=7B7BBC00 Size=00000400
Stacks - 0x7B776000
mSmmStackSize - 0x6000
PcdCpuSmmStackGuard - 0x1
mXdSupported - 0x1
One Semaphore Size = 0x40
Total Semaphores Size = 0x940
PhysicalAddressBits = 39, 5LPageTable = 0.
5LevelPaging Needed - 0
1GPageTable Support - 1
PcdCpuSmmRestrictedMemoryAccess - 1
PhysicalAddressBits - 39
InstallProtocolInterface: 26EEB3DE-B689-492E-80F0-BE8BD7DA4BA7 7B7D3380
SMM IPL registered SMM Entry Point address 7B7EBD44
SmmInstallProtocolInterface: EB346B97-975F-4A9F-8B22-F8E92BB3D569 7B7D33B0
SmmInstallProtocolInterface: 69B792EA-39CE-402D-A2A6-F721DE351DFE 7B7D32A8
CpuSmm: SpinLock Size = 0x40, PcdCpuSmmMpTokenCountPerChunk = 0x40
SmmInstallProtocolInterface: 5D5450D7-990C-4180-A803-8E63F0608307 7B7D3450
SmmInstallProtocolInterface: 1D202CAB-C8AB-4D5C-94F7-3CFCC0D3D335 7B7D3420
SMM CPU Module exit from SMRAM with EFI_SUCCESS
SmmAccess: Prepare to close the SMRAM
SmmAccess:Close SMRAM Region, success!
SMM IPL closed SMRAM window
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360898
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E74C0
Loading SMM driver at 0x0007B759000 EntryPoint=0x0007B75A2C4 FvbSmm.efi
SmmAccess: SMRAM Map Buffer too small
SpiInstance = 7B76A998
PchSpiBase at 0xC00FD000
variable address is set to 0xFF610000
--FileSystemGuid not match: FFFFFFFF-FFFF-FFFF-FFFF-FFFFFFFFFFFF
Fvb: FV header @ 0xFF610000 invalid
FvLength: 0x40000
HeaderLength: 0x48
Header Checksum: 0xF8F7
FvBlockMap[0].NumBlocks: 0x40
FvBlockMap[0].BlockLength: 0x1000
FwBlockService.c: Writing back healthy FV header
Verified boot is not enabled in bootloader.
ImageData=0x75209060, ImageSize=0x3FB8
SmmInstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
SmmInstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7B76A818
InstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E70C0
Loading SMM driver at 0x0007B6BF000 EntryPoint=0x0007B6C031C VariableSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD308 Success
VarCheckLibRegisterEndOfDxeCallback - 0x7B6CEDB8 Success
VarCheckLibRegisterAddressPointer - 0x7B74D920 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD93C Success
[VarCheckPcd] No VarCheckPcdBin found at the first RAW section
VarCheckLibRegisterAddressPointer - 0x7B74D940 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CF7E0 Success
Variable driver common space: 0x1DF9C 0x1DF9C 0x1DF9C
Variable driver will work with auth variable format!
SmmInstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 7B74C318
SmmInstallProtocolInterface: B0D8F3C1-B7DE-4C11-BC89-2FB562C8C411 7B74C300
InstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535FC98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7EC0
Loading SMM driver at 0x0007B661000 EntryPoint=0x0007B662234 BlSmmSupport.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMMBASE_INFO = 7B000000
CPU0 ID:00 Base: 7B79E000
CPU1 ID:01 Base: 7B7A0000
CPU2 ID:02 Base: 7B7A2000
CPU3 ID:03 Base: 7B7A4000
CPU4 ID:04 Base: 7B7A6000
CPU5 ID:05 Base: 7B7A8000
CPU6 ID:06 Base: 7B7AA000
CPU7 ID:07 Base: 7B7AC000
SmmInstallProtocolInterface: 18A3C6DC-5EEA-48C8-A1C1-B53389F98999 7B6670E0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F818
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E72C0
Loading SMM driver at 0x0007B652000 EntryPoint=0x0007B6532A0 SmmFaultTolerantWriteDxe.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
Ftw: FtwWorkSpaceLba - 0x1E, WorkBlockSize - 0x1000, FtwWorkSpaceBase - 0x0
Ftw: FtwSpareLba - 0x20, SpareBlockSize - 0x1000
Ftw: NumberOfWorkBlock - 0x2, FtwWorkBlockLba - 0x1E
Ftw: WorkSpaceLbaInSpare - 0x0, WorkSpaceBaseInSpare - 0x0
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Remaining work space size - 1FE0
Ftw: Work block header check mismatch
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Work block header check mismatch
Ftw: Both working and spare blocks are invalid, init workspace
Ftw: start to reclaim work space
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64B018
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64C018
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62A018
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62B018
FvbProtocolRead: Lba: 0x22 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62C018
FvbProtocolRead: Lba: 0x23 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62D018
FvbProtocolRead: Lba: 0x24 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62E018
FvbProtocolRead: Lba: 0x25 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62F018
FvbProtocolRead: Lba: 0x26 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B630018
FvbProtocolRead: Lba: 0x27 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B631018
FvbProtocolRead: Lba: 0x28 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B632018
FvbProtocolRead: Lba: 0x29 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B633018
FvbProtocolRead: Lba: 0x2A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B634018
FvbProtocolRead: Lba: 0x2B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B635018
FvbProtocolRead: Lba: 0x2C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B636018
FvbProtocolRead: Lba: 0x2D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B637018
FvbProtocolRead: Lba: 0x2E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B638018
FvbProtocolRead: Lba: 0x2F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B639018
FvbProtocolRead: Lba: 0x30 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63A018
FvbProtocolRead: Lba: 0x31 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63B018
FvbProtocolRead: Lba: 0x32 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63C018
FvbProtocolRead: Lba: 0x33 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63D018
FvbProtocolRead: Lba: 0x34 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63E018
FvbProtocolRead: Lba: 0x35 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63F018
FvbProtocolRead: Lba: 0x36 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B640018
FvbProtocolRead: Lba: 0x37 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B641018
FvbProtocolRead: Lba: 0x38 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B642018
FvbProtocolRead: Lba: 0x39 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B643018
FvbProtocolRead: Lba: 0x3A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B644018
FvbProtocolRead: Lba: 0x3B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B645018
FvbProtocolRead: Lba: 0x3C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B646018
FvbProtocolRead: Lba: 0x3D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B647018
FvbProtocolRead: Lba: 0x3E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B648018
FvbProtocolRead: Lba: 0x3F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B649018
FvbProtocolEraseBlocks:
FvbProtocolRead: Lba: 0x20 Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B7E0
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B7E0
FvbProtocolRead: Lba: 0x20 Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B609018
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60A018
FvbProtocolRead: Lba: 0x22 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60B018
FvbProtocolRead: Lba: 0x23 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60C018
FvbProtocolRead: Lba: 0x24 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60D018
FvbProtocolRead: Lba: 0x25 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60E018
FvbProtocolRead: Lba: 0x26 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60F018
FvbProtocolRead: Lba: 0x27 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B610018
FvbProtocolRead: Lba: 0x28 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B611018
FvbProtocolRead: Lba: 0x29 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B612018
FvbProtocolRead: Lba: 0x2A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B613018
FvbProtocolRead: Lba: 0x2B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B614018
FvbProtocolRead: Lba: 0x2C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B615018
FvbProtocolRead: Lba: 0x2D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B616018
FvbProtocolRead: Lba: 0x2E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B617018
FvbProtocolRead: Lba: 0x2F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B618018
FvbProtocolRead: Lba: 0x30 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B619018
FvbProtocolRead: Lba: 0x31 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61A018
FvbProtocolRead: Lba: 0x32 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61B018
FvbProtocolRead: Lba: 0x33 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61C018
FvbProtocolRead: Lba: 0x34 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61D018
FvbProtocolRead: Lba: 0x35 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61E018
FvbProtocolRead: Lba: 0x36 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61F018
FvbProtocolRead: Lba: 0x37 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B620018
FvbProtocolRead: Lba: 0x38 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B621018
FvbProtocolRead: Lba: 0x39 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B622018
FvbProtocolRead: Lba: 0x3A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B623018
FvbProtocolRead: Lba: 0x3B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B624018
FvbProtocolRead: Lba: 0x3C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B625018
FvbProtocolRead: Lba: 0x3D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B626018
FvbProtocolRead: Lba: 0x3E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B627018
FvbProtocolRead: Lba: 0x3F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B628018
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolEraseBlocks:
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolEraseBlocks:
Ftw: reclaim work space successfully
SmmInstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 7B64F028
Variable PK exists.
Variable SetupMode is 0
Variable SecureBoot is 0
Variable SecureBootEnable is 0
Variable CustomMode is 0
Variable VendorKeys is 1
Variable driver will work with auth variable support!
InstallProtocolInterface: 93BA1826-DFFB-45DD-82A7-E7DCAA3BBDF3 0
InstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F218
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E76C0
Loading SMM driver at 0x0007B634000 EntryPoint=0x0007B635234 BlSwSmiHandler.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
Loading driver 9F7DCADE-11EA-448A-A46F-76E003657DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535EB40
Loading driver at 0x0007598D000 EntryPoint=0x0007598E0D4 VariableSmmRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7535E098
ProtectUefiImageCommon - 0x7535EB40
- 0x000000007598D000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007598E000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075993000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
Variable driver runtime cache is enabled.
InstallProtocolInterface: 1E5668E2-8481-11D4-BCF1-0080C73C8881 0
InstallProtocolInterface: CD3D0A05-9E24-437C-A891-1EE053DB7638 759952D0
InstallProtocolInterface: AF23B340-97B4-4685-8D4F-A3F28169B21D 759952A0
InstallProtocolInterface: 6441F818-6362-4E44-B570-7DBA31DD2453 0
PROGRESS CODE: V03040003 I0
Loading driver 42857F0A-13F2-4B21-8A23-53D3F714B840
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310CC0
Loading driver at 0x00075984000 EntryPoint=0x00075985114 CapsuleRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75310A98
ProtectUefiImageCommon - 0x75310CC0
- 0x0000000075984000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075985000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075988000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 5053697E-2CBC-4819-90D9-0580DEEE5754 0
PROGRESS CODE: V03040003 I0
Loading driver AD608272-D07F-4964-801E-7BD3B7888652
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310340
Loading driver at 0x0007597B000 EntryPoint=0x0007597C0B4 MonotonicCounterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9F18
ProtectUefiImageCommon - 0x75310340
- 0x000000007597B000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007597C000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007597F000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1DA97072-BDDC-4B30-99F1-72A0B56FFF2A 0
PROGRESS CODE: V03040003 I0
Loading driver 378D7B65-8DA9-4773-B6E4-A47826A833E1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E91C0
Loading driver at 0x00075971000 EntryPoint=0x000759720C4 PcRtc.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9418
ProtectUefiImageCommon - 0x752E91C0
- 0x0000000075971000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075972000 - 0x0000000000004000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075976000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 27CFAC87-46CC-11D4-9A38-0090273FC14D 0
PROGRESS CODE: V03040003 I0
Loading driver F0E6A44F-7195-41C3-AC64-54F202CD0A21
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E8140
Loading driver at 0x00074D0B000 EntryPoint=0x00074D0B4FC SecureBootConfigDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E8D98
ProtectUefiImageCommon - 0x752E8140
- 0x0000000074D0B000 - 0x0000000000076EE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 752E8998
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 74D7A388
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D79928
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 752E6FA0
InstallProtocolInterface: F0E6A44F-7195-41C3-AC64-54F202CD0A21 752E6F98
PROGRESS CODE: V03040003 I0
Loading driver 93B80004-9FB3-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752082C0
Loading driver at 0x00074DCD000 EntryPoint=0x00074DCD394 PciBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75208C98
ProtectUefiImageCommon - 0x752082C0
- 0x0000000074DCD000 - 0x00000000000154A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DE0FF8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DE1040
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DE1058
InstallProtocolInterface: 19CB87AB-2CB9-4665-8360-DDCF6054F79D 74DE1028
PROGRESS CODE: V03040003 I0
Loading driver 51CCF399-4FDF-4E55-A45B-E123F84D456A
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75207B40
Loading driver at 0x00074DEB000 EntryPoint=0x00074DEB394 ConPlatformDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75207E98
ProtectUefiImageCommon - 0x75207B40
- 0x0000000074DEB000 - 0x0000000000006960
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DF13E0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DF1428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DF1410
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DF13B0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DF1428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DF1410
PROGRESS CODE: V03040003 I0
Loading driver 408EDCEC-CF6D-477C-A5A8-B4844E3DE281
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75207240
Loading driver at 0x00074DB9000 EntryPoint=0x00074DB9374 ConSplitterDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75207518
ProtectUefiImageCommon - 0x75207240
- 0x0000000074DB9000 - 0x0000000000009C00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1E28
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21E8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2158
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1FD0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21B8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2170
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1FA0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC2128
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2188
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1C70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21A0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2140
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1E58
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2110
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74DC1CB0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74DC1CE0
InstallProtocolInterface: 31878C87-0B75-11D5-9A4F-0090273FC14D 74DC1D50
InstallProtocolInterface: 8D59D32B-C655-4AE9-9B15-F25904992A43 74DC1DA8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DC1EA0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DC2010
PROGRESS CODE: V03040003 I0
Loading driver CCCB0C28-4B24-11D5-9A5A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752012C0
Loading driver at 0x00074DC5000 EntryPoint=0x00074DC5394 GraphicsConsoleDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75201C98
ProtectUefiImageCommon - 0x752012C0
- 0x0000000074DC5000 - 0x0000000000007D40
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DCB180
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DCC7A8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DCC790
PROGRESS CODE: V03040003 I0
Loading driver 9E863906-A40F-4875-977F-5B93FF237FC6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF8B40
Loading driver at 0x00074DA3000 EntryPoint=0x00074DA3394 TerminalDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8E98
ProtectUefiImageCommon - 0x74DF8B40
- 0x0000000074DA3000 - 0x000000000000A540
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DACB38
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DACCC8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DACCB0
PROGRESS CODE: V03040003 I0
Loading driver 6B38F7B4-AD98-40E9-9093-ACA2B5A253C4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF81C0
Loading driver at 0x00074DB2000 EntryPoint=0x00074DB2374 DiskIoDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8498
ProtectUefiImageCommon - 0x74DF81C0
- 0x0000000074DB2000 - 0x0000000000006800
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DB81A8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DB8268
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DB8280
PROGRESS CODE: V03040003 I0
Loading driver 1FA1F39E-FEFF-4AAE-BD7B-38A070A3B609
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF7CC0
Loading driver at 0x00074D91000 EntryPoint=0x00074D91394 PartitionDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7B18
ProtectUefiImageCommon - 0x74DF7CC0
- 0x0000000074D91000 - 0x0000000000008A60
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D992C0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D99320
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D99308
PROGRESS CODE: V03040003 I0
Loading driver CD3BAFB6-50FB-4FE8-8E4E-AB74D2C1A600
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF72C0
Loading driver at 0x00074DE3000 EntryPoint=0x00074DE3374 EnglishDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7A18
ProtectUefiImageCommon - 0x74DF72C0
- 0x0000000074DE3000 - 0x0000000000003E00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1D85CD7F-F43D-11D2-9A0C-0090273FC14D 74DE67B8
InstallProtocolInterface: A4C751FC-23AE-4C3E-92E9-4964CF63F349 74DE67F0
PROGRESS CODE: V03040003 I0
Loading driver 820C59BB-274C-43B2-83EA-DAC673035A59
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF68C0
Loading driver at 0x00074D8B000 EntryPoint=0x00074D8B374 SataController.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF6B98
ProtectUefiImageCommon - 0x74DF68C0
- 0x0000000074D8B000 - 0x0000000000005120
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D8FC88
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D8FCB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D8FCD0
PROGRESS CODE: V03040003 I0
Loading driver 19DF145A-B1D4-453F-8507-38816676D7F6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF6440
Loading driver at 0x00074D82000 EntryPoint=0x00074D82384 AtaBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF5F98
ProtectUefiImageCommon - 0x74DF6440
- 0x0000000074D82000 - 0x0000000000008460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D89B20
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D89D48
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D89D30
PROGRESS CODE: V03040003 I0
Loading driver 5E523CB4-D397-4986-87BD-A6DD8B22F455
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF5140
Loading driver at 0x00074CEF000 EntryPoint=0x00074CEF3A4 AtaAtapiPassThruDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF5398
ProtectUefiImageCommon - 0x74DF5140
- 0x0000000074CEF000 - 0x000000000000D2E0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CFB6F8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CFB728
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CFB740
PROGRESS CODE: V03040003 I0
Loading driver 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF5540
Loading driver at 0x00074D05000 EntryPoint=0x00074D05374 ScsiBus.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2B18
ProtectUefiImageCommon - 0x74DF5540
- 0x0000000074D05000 - 0x0000000000005BA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D0A660
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D0A690
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D0A6A8
PROGRESS CODE: V03040003 I0
Loading driver 0A66E322-3740-4CCE-AD62-BD172CECCA35
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF27C0
Loading driver at 0x00074CD3000 EntryPoint=0x00074CD3374 ScsiDisk.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2D18
ProtectUefiImageCommon - 0x74DF27C0
- 0x0000000074CD3000 - 0x000000000000D520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CDFB60
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CDFBD8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CDFBC0
PROGRESS CODE: V03040003 I0
Loading driver 961578FE-B6B7-44C3-AF35-6BC705CD2B1F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEA040
Loading driver at 0x00074CC5000 EntryPoint=0x00074CC539C Fat.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEAD18
ProtectUefiImageCommon - 0x74DEA040
- 0x0000000074CC5000 - 0x000000000000D0C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CD1300
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CD1348
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CD1330
PROGRESS CODE: V03040003 I0
Loading driver 8E325979-3FE1-4927-AAE2-8F5C4BD2AF0D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEA9C0
Loading driver at 0x00074CB7000 EntryPoint=0x00074CB7374 SdMmcPciHcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEA898
ProtectUefiImageCommon - 0x74DEA9C0
- 0x0000000074CB7000 - 0x000000000000D460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CC3750
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CC3998
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CC39B0
PROGRESS CODE: V03040003 I0
Loading driver 2145F72F-E6F1-4440-A828-59DC9AAB5F89
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE9040
Loading driver at 0x00074CAC000 EntryPoint=0x00074CAC374 EmmcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEA598
ProtectUefiImageCommon - 0x74DE9040
- 0x0000000074CAC000 - 0x000000000000A900
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CB5F70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CB60D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CB60B8
PROGRESS CODE: V03040003 I0
Loading driver 430AC2F7-EEC6-4093-94F7-9F825A7C1C40
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE9440
Loading driver at 0x00074CE6000 EntryPoint=0x00074CE6374 SdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE9698
ProtectUefiImageCommon - 0x74DE9440
- 0x0000000074CE6000 - 0x00000000000084C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CEDC00
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CEDDB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CEDDA0
PROGRESS CODE: V03040003 I0
Loading driver 5BE3BDF4-53CF-46A3-A6A9-73C34A6E5EE3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE8B40
Loading driver at 0x00074C92000 EntryPoint=0x00074C924C8 NvmExpressDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE9898
ProtectUefiImageCommon - 0x74DE8B40
- 0x0000000074C92000 - 0x000000000000C700
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C9DCE8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C9DD78
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C9DD60
InstallProtocolInterface: 5C198761-16A8-4E69-972C-89D67954F81D 74C9DD28
PROGRESS CODE: V03040003 I0
Loading driver 2FB92EFA-2EE0-4BAE-9EB6-7464125E1EF7
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE8240
Loading driver at 0x00074D9A000 EntryPoint=0x00074D9A374 UhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE8598
ProtectUefiImageCommon - 0x74DE8240
- 0x0000000074D9A000 - 0x0000000000008FE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DA27E8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DA2830
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DA2818
PROGRESS CODE: V03040003 I0
Loading driver BDFE430E-8F2A-4DB0-9991-6F856594777E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE7CC0
Loading driver at 0x00074C87000 EntryPoint=0x00074C87374 EhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE7918
ProtectUefiImageCommon - 0x74DE7CC0
- 0x0000000074C87000 - 0x000000000000AC00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C91388
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C91408
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C913F0
PROGRESS CODE: V03040003 I0
Loading driver B7F50E91-A759-412C-ADE4-DCD03E7F7C28
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE7340
Loading driver at 0x00074C67000 EntryPoint=0x00074C67374 XhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE7B18
ProtectUefiImageCommon - 0x74DE7340
- 0x0000000074C67000 - 0x000000000000F520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C759D8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C75B38
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C75B20
PROGRESS CODE: V03040003 I0
Loading driver 240612B7-A063-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC4140
Loading driver at 0x00074C7B000 EntryPoint=0x00074C7B394 UsbBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC4B18
ProtectUefiImageCommon - 0x74DC4140
- 0x0000000074C7B000 - 0x000000000000BD20
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C86268
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C862B0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C86298
PROGRESS CODE: V03040003 I0
Loading driver 2D2E62CF-9ECF-43B7-8219-94E7FC713DFE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC4540
Loading driver at 0x00074C5E000 EntryPoint=0x00074C5E394 UsbKbDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC3018
ProtectUefiImageCommon - 0x74DC4540
- 0x0000000074C5E000 - 0x0000000000008220
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C65450
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C65B80
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C65B68
PROGRESS CODE: V03040003 I0
Loading driver 9FB4B4A7-42C0-4BCD-8540-9BCC6711F83E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC3140
Loading driver at 0x00074C55000 EntryPoint=0x00074C55374 UsbMassStorageDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC3B18
ProtectUefiImageCommon - 0x74DC3140
- 0x0000000074C55000 - 0x0000000000008080
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C5C828
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C5C900
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C5C8E8
PROGRESS CODE: V03040003 I0
Loading driver 0B04B2ED-861C-42CD-A22F-C3AAFACCB896
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC3540
Loading driver at 0x00074CA5000 EntryPoint=0x00074CA5394 GraphicsOutputDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DB1F98
ProtectUefiImageCommon - 0x74DC3540
- 0x0000000074CA5000 - 0x0000000000006B80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CAB5C8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CAB608
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CAB620
PROGRESS CODE: V03040003 I0
Driver 4D9CBEF0-15A0-4D0C-83DB-5213E710C23F was discovered but not loaded!!
Driver 5CAB08D5-AD8F-4D8B-B828-D17A8D9FE977 was discovered but not loaded!!
PROGRESS CODE: V03041001 I0
[Bds] Entry...
[BdsDxe] Locate Variable Lock protocol - Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformLangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:LangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOptionSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:HwErrRecSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:OsIndicationsSupported Success
Variable Driver Auto Update Lang, Lang:eng, PlatformLang:en Status: Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformRecovery0000 Success
PROGRESS CODE: V03051005 I0
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
SR-IOV: SupportedPageSize = 0x553; SystemPageSize = 0x1; FirstVFOffset = 0x1;
InitialVFs = 0x7; ReservedBusNum = 0x1; CapOffset = 0x320
BAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[1]: Type = PMem64; Alignment = 0xFFFFFFF; Length = 0x10000000; Offset = 0x18
BAR[2]: Type = Io16; Alignment = 0x3F; Length = 0x40; Offset = 0x20
VFBAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x7000000; Offset = 0x344
VFBAR[1]: Type = PMem64; Alignment = 0x1FFFFFFF; Length = 0xE0000000; Offset = 0x34C
PciBus: Discovered PCI @ [00|08|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|0A|00]
BAR[0]: Type = Mem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|10|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|14|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|14|02]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|15|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|15|01]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|16|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|17|00]
BAR[0]: Type = Mem32; Alignment = 0x1FFF; Length = 0x2000; Offset = 0x10
BAR[1]: Type = Mem32; Alignment = 0xFFF; Length = 0x100; Offset = 0x14
BAR[2]: Type = Io16; Alignment = 0x7; Length = 0x8; Offset = 0x18
BAR[3]: Type = Io16; Alignment = 0x3; Length = 0x4; Offset = 0x1C
BAR[4]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
BAR[5]: Type = Mem32; Alignment = 0xFFF; Length = 0x800; Offset = 0x24
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [01|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [02|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [03|00|00]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [04|01|00]
PciBus: Discovered PPB @ [04|02|00]
PciBus: Discovered PPB @ [04|03|00]
PciBus: Discovered PPB @ [04|04|00]
PciBus: Discovered PCI @ [09|00|00]
ARI: forwarding enabled for PPB[04:04:00]
ARI: CapOffset = 0x150
BAR[0]: Type = PMem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[2]: Type = PMem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0A|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0B|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0C|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PCI @ [00|1E|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|1E|03]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[3]: Type = Mem64; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|04]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x100; Offset = 0x10
BAR[3]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|05]
BAR[0]: Type = Mem32; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DB0F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DB0428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DB0F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DB0828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3028
Found PCI VGA device
Found LPC Bridge device
[EnumUsbKeyboard] USB keyboard path exists
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x5000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74C03000
XhcInitSched: Created CMD ring [74C03240~74C04240) EVENT ring [74C04240~74C06240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74C13038
XhcDriverBindingStart: XHCI started for controller @ 74CFEE18
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74BE5020
XhcGetCapability: 5 ports, 64 bit 1
UsbRootHubInit: root hub 74CA1218 - max speed 3, 5 ports
UsbBusStart: usb bus started on 74CFEE18, root hub 74CA1218
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x10000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74BBF000
XhcInitSched: Created CMD ring [74BBF240~74BC0240) EVENT ring [74BC0240~74BC2240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74BD0038
XhcDriverBindingStart: XHCI started for controller @ 74D02C98
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74B9B020
XhcGetCapability: 16 ports, 64 bit 1
UsbRootHubInit: root hub 74B9BC98 - max speed 3, 16 ports
XhcClearRootHubPortFeature: status Success
UsbEnumeratePort: port 0 state - 01, change - 01 on 74B9BC98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 0
XhcUsbPortReset!
XhcSetRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
Enable Slot Successfully, The Slot ID = 0x1
Address 1 assigned successfully
UsbEnumerateNewDev: hub port 0 is reset
UsbEnumerateNewDev: device is of 2 speed
UsbEnumerateNewDev: device uses translator (0, 0)
UsbEnumerateNewDev: device is now ADDRESSED at 1
UsbEnumerateNewDev: max packet size for EP 0 is 64
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 25
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BC3AC0~74BC4AC0)
Configure Endpoint
UsbEnumerateNewDev: device 1 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 1
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B9AB98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B9AAC0
UsbConnectDriver: found a hub device
Configure Hub Slot Context
UsbHubInit: hub 1 has 4 ports
UsbHubInit: hub 1 initialized
UsbBusStart: usb bus started on 74D02C98, root hub 74B9BC98
[Variable] Lock: AEB9C5C1-94F1-4D02-BFD9-4602DB2D3C54:Tcg2PhysicalPresenceFlags Success
[TPM2] Initial physical presence flags value is 0x700E2
[TPM2] Flags=700E2, PPRequest=0 (LastPPRequest=0)
[TPM2] PPResponse = 0 (LastPPReqUsbEnumeratePort: port 2 state - 201, change - 01 on 74B9AA98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 2
Enable Slot Successfully, The Slot ID = 0x2
Address 2 assigned successfully
UsbEnumerateNewDev: hub port 2 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 3)
UsbEnumerateNewDev: device is now ADDRESSED at 2
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 59
UsbParseConfigDesc: config 1 has 2 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
UsbParseInterfaceDesc: interface 1(setting 0) has 1 endpoints
XhcCheckUrbResult: STALL_ERROR! Completecode = 6
Recovery Halted Slot = 2,Dci = 1
XhcResetEndpoint: Slot = 0x2, Dci = 0x1
XhcSetTrDequeuePointer: Slot = 0x2, Dci = 0x1, Urb = 0x74B98F18
XhcControlTransfer: error - Device Error, transfer - 2
UsbBuildDescTable: get language ID table Unsupported
Endpoint[81]: Created INT ring [74BC6300~74BC7300)
Endpoint[82]: Created INT ring [74BC7300~74BC8300)
Configure Endpoint
UsbEnumerateNewDev: device 2 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 2
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B97B98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B97AC0
UsbConnectDriver: TPL before connect is 8, 74B98D18
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74B96038
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74B96050
InstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
UsbConnectDriver: TPL after connect is 8
UsbSelectSetting: setting 0 selected for interface 1
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B99798
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B96BC0
UsbEnumeratePort: port 3 state - 201, change - 01 on 74B9AA98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 3
Enable Slot Successfully, The Slot ID = 0x3
Address 3 assigned successfully
UsbEnumerateNewDev: hub port 3 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 4)
UsbEnumerateNewDev: device is now ADDRESSED at 3
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 34
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BC9B40~74BCAB40)
Configure Endpoint
UsbEnumerateNewDev: device 3 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 3
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B92C98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B92BC0
uest=0, Flags=700E2)
InstallReadyToLock entering......
SmmEndOfDxeHandler
SmmInstallProtocolInterface: 24E70042-D5C5-4260-8C39-0AD3AA32E93D 0
SMM MemoryProtectionAttribute - 0x0000000000000001
MemoryMapSize - 0xBD0
MemoryMap - 0x7B631018
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
[Variable]SMM_END_OF_DXE is signaled
[Variable] Lock: E20939BE-32D4-41BE-A150-897F85D49829:MemoryOverwriteRequestControl Success
[Variable] Lock: BB983CCF-151D-40E1-A07B-4A17BE168292:MemoryOverwriteRequestControlLock Success
VarCheckHiiGenDxeFromHii - HII Database exported at 0x74B87000, size = 0x9B34
VarCheckHiiGenDxeFromFv
VarCheckHiiBin - size = 0x0
[VarCheckHii] This driver could be removed from *.dsc and *.fdf
Initialize variable error flag (FF)
All EndOfDxe callbacks have returned successfully
InstallProtocolInterface: 60FF8964-E906-41D0-AFED-F241E974E08E 0
SMI LOCK is set.
SmmAccess: Prepare to lock SMRAM Region
SmmAccess: Locked SMM success!
SmmInstallProtocolInterface: 47B7FA8C-F4BD-4AF6-8200-333086F0D2C8 0
GetUefiMemoryMap
SMM Driver 44A20657-10B8-4049-A148-ACD8812AF257 was discovered but not loaded!!
Patch page table start ...
Patch page table done!
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
PatchSmmSaveStateMap:
PatchGdtIdtMap - GDT:
PatchGdtIdtMap - IDT:
SetUefiMemMapAttributes
UefiMemory protection: 0x0 - 0xA0000 Success
UefiMemory protection: 0x100000 - 0x758A6000 Success
UefiMemory protection: 0x75DEC000 - 0x761B8000 Success
UefiMemory protection: 0x766B8000 - 0x76748000 Success
UefiMemory protection: 0x100000000 - 0x880400000 Success
UefiMemoryAttribute protection: 0x75972000 - 0x75976000 Success
UefiMemoryAttribute protection: 0x7597C000 - 0x7597F000 Success
UefiMemoryAttribute protection: 0x75985000 - 0x75988000 Success
UefiMemoryAttribute protection: 0x7598E000 - 0x75993000 Success
UefiMemoryAttribute protection: 0x7599A000 - 0x7599F000 Success
UefiMemoryAttribute protection: 0x759A6000 - 0x759A9000 Success
UefiMemoryAttribute protection: 0x759AF000 - 0x759B2000 Success
UefiMemoryAttribute protection: 0x759B9000 - 0x759BC000 Success
UefiMemoryAttribute protection: 0x759C3000 - 0x759C6000 Success
UefiMemoryAttribute protection: 0x759CD000 - 0x759D0000 Success
SetPageTableAttributes
Start...
SMM IPL locked SMRAM window
InstallReadyToLock end
[GraphicsOutputDxe]: GraphicsDeviceInfo HOB:
VendorId = 8086, DeviceId = 9A49,
RevisionId = FF, BarIndex = 1,
SubsystemVendorId = FFFF, SubsystemId = FFFF
[GraphicsOutputDxe]: BAR[1]: Base = 90000000, Length = 10000000
[GraphicsOutputDxe]: ... matched!
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 75452928
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 75452818
[Bds]RegisterKeyNotify: 000C/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0002/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0000/000D 80000000/00 Success
Terminal - Mode 0, Column = 80, Row = 25
Terminal - Mode 1, Column = 80, Row = 50
Terminal - Mode 2, Column = 100, Row = 31
^[[2J^[[01;01H^[[=3h^[[2J^[[01;01HInstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74B8E540
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74B8E628
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74B8E558
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B8E498
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: D3B36F2D-D551-11D4-9A46-0090273FC14D 0
^[[0m^[[35m^[[40mInstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
GraphicsConsole video resolution 1920 x 1080
Graphics - Mode 0, Column = 80, Row = 25
Graphics - Mode 1, Column = 80, Row = 50
Graphics - Mode 2, Column = 100, Row = 31
Graphics - Mode 3, Column = 240, Row = 56
Graphics Console Started, Mode: 0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74B8C630
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 74DC1F30
^[[0m^[[37m^[[40mUsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
Original PCI Attributes = 0x4700
Supported PCI Attributes = 0xE700
Enabled PCI Attributes = 0x700
Ports Implemented(PI) = 0x1
HBA Capabilities(CAP) = 0xE534FF00
InstallProtocolInterface: A1E37052-80D9-4E65-A317-3E9A55C43EC9 74B8C3A0
SataControllerStart end with Success
==AtaAtapiPassThru Start== Controller = 74DB1598
IDENTIFY DEVICE: [0] = 000000000000427A, [2] = 000000000000C837, [83] = 0000000000007408, [86] = 000000000000BC08
port [0] port multitplier [0] has a [harddisk]
Enabled S.M.A.R.T feature at port [0] PortMultiplier [0]!
CalculateBestPioMode: AdvancedPioMode = 3
IdeInitCalculateMode: PioMode = 4
CalculateBestUdmaMode: DeviceUDmaMode = 407F
IdeInitCalculateMode: UdmaMode = 5
InstallProtocolInterface: 1D3DE7F0-0807-424F-AA69-11A54E19A46F 74B858C0
InstallProtocolInterface: 143B7632-B81B-4CB7-ABD3-B625A5B9BFFE 74B85910
InstallProtocolInterface: 19DF145A-B1D4-453F-8507-38816676D7F6 74A81F18
AtaBus - Identify Device: Port 0 PortMultiplierPort FFFF
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74A81B98
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74A810A8
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74A810D8
InstallProtocolInterface: D432A67F-14DC-484B-B3BB-3F0291849327 74A81130
InstallProtocolInterface: 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B 74A81920
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74A7EDA0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74A7EDB8
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74A7E818
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74A70D30
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74A70D60
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74A70DE8
InstallProtocolInterface: C12A7328-F81F-11D2-BA4B-00A0C93EC93B 0
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74A70B18
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74A702B0
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74A702E0
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74A70368
InstallProtocolInterface: 0FC63DAF-8483-4772-8E79-3D69D8477DE4 0
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74A70618
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74A6F030
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74A6F060
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74A6F0E8
InstallProtocolInterface: E6D6D379-F507-44C2-A23C-238F2A3DF928 0
Prepare to Free Pool
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74A6FC20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74A6FC38
BlockSize : 512
LastBlock : 12BFFF
InstallProtocolInterface: 964E5B22-6459-11D2-8E39-00A0C969723B 74A75030
Installed Fat filesystem on 74A7E598
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74A70020
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74A70038
BlockSize : 512
LastBlock : 1FFFFF
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74A74C20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74A74C38
BlockSize : 512
LastBlock : EB4F7FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
SataControllerStart error. return status = Already started
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
F2 or Down to enter Boot Manager Menu.
ENTER to boot directly.
[Bds]OsIndication: 0000000000000000
[Bds]=============Begin Load Options Dumping ...=============
Driver Options:
SysPrep Options:
Boot Options:
Boot0000: UiApp 0x0109
Boot0001: UEFI 128GB NANDrive 00000000001R11M7MMXF 0x0001
Boot0002: UEFI Shell 0x0001
PlatformRecovery Options:
PlatformRecovery0000: Default PlatformRecovery 0x0001
[Bds]=============End Load Options Dumping=============
[Bds]BdsWait ...Zzzzzzzzzzzz...
[Bds]BdsWait(3)..Zzzz...
[Bds]BdsWait(2)..Zzzz...
[Bds]BdsWait(1)..Zzzz...
[Bds]Exit the waiting!
PROGRESS CODE: V03051007 I0
[Bds]Stop Hotkey Service!
[Bds]UnregisterKeyNotify: 000C/0000 Success
[Bds]UnregisterKeyNotify: 0002/0000 Success
[Bds]UnregisterKeyNotify: 0000/000D Success
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
Install PPI: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
FSP NotifyPhase ReadyToBoot Success.
PROGRESS CODE: V03051001 I0
Memory Previous Current Next
Type Pages Pages Pages
====== ======== ======== ========
09 00000008 00000000 00000008
0A 0000000A 00000000 0000000A
00 00000016 00000002 00000016
06 00000400 0000004F 00000400
05 00000130 00000065 00000130
[Bds]Booting UEFI 128GB NANDrive 00000000001R11M7MMXF
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
FSOpen: Open '\EFI\BOOT\BOOTX64.EFI' Success
[Bds] Expand PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0) -> PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,1E2FDFDE-4B2C-46EE-B70C-995B4F0DECDA,0x800,0x12C000)/\EFI\BOOT\BOOTX64.EFI
PROGRESS CODE: V03058000 I0
[Security] 3rd party image[0] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,1E2FDFDE-4B2C-46EE-B70C-995B4F0DECDA,0x800,0x12C000)/\EFI\BOOT\BOOTX64.EFI.
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 745C63C0
Loading driver at 0x0007440C000 EntryPoint=0x0007442F000
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74B91818
ProtectUefiImageCommon - 0x745C63C0
- 0x000000007440C000 - 0x00000000000D2000
PROGRESS CODE: V03058001 I0
InstallProtocolInterface: 605DAB50-E046-4300-ABB6-3DD810DD8B23 744BD6E0
FSOpen: Open '\EFI\BOOT\fbx64.efi' Success
FSOpen: Open '\EFI\BOOT\fbx64.efi' Success
FSOpen: Open 'EFI' Success
FSOpen: Open 'redhat' Success
FSOpen: Open 'BOOTX64.CSV' Success
FSOpen: Open '\EFI\redhat\BOOTX64.CSV' Success
FSOpen: Open '\EFI\redhat\shimx64.efi' Success
[Security] 3rd party image[0] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,1E2FDFDE-4B2C-46EE-B70C-995B4F0DECDA,0x800,0x12C000)/\EFI\redhat\shimx64.efi.
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 745C5040
Loading driver at 0x00074252000 EntryPoint=0x00074275000
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 745C5E98
ProtectUefiImageCommon - 0x745C5040
- 0x0000000074252000 - 0x00000000000D2000
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListXRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:SbatLevelRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListTrustedRT
InstallProtocolInterface: 605DAB50-E046-4300-ABB6-3DD810DD8B23 743036E0
FSOpen: Open '\EFI\redhat\grubx64.efi' Success
ConvertPages: Incompatible memory types, the pages to allocate have been allocated
XhcClearBiosOwnership: called to clear BIOS ownership
XhcClearBiosOwnership: called to clear BIOS ownership
FPDT: -ResetEnd = 21000000
FPDT: -OsLoaderLoadImageStart = 164865000000
FPDT: -OsLoaderStartImageStart = 164915000000
FPDT: -ExitBootServicesEntry = 167275000000
Install PPI: BD44F629-EAE7-4198-87F1-39FAB0FD717E
FSP NotifyPhase EndOfFirmware Success.
gAddPerfRecordProtocolGuid - Locate protocol failed
SmmInstallProtocolInterface: 296EB418-C4C8-4E05-AB59-39E8AF56F00A 0
CpuDxe: 5-Level Paging = 0
MpInitChangeApLoopCallback() done!
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x000000000000C000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x000000000000C000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x000000000000A000 (0x0000000000000008)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: Test_08Jan25_0_payloaddebug_withadvantechnvme.log --]
[-- Type: text/x-log; name="Test_08Jan25_0_payloaddebug_withadvantechnvme.log", Size: 1572225 bytes --]
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2025.01.08 14:54:25 =~=~=~=~=~=~=~=~=~=~=~=
\0
============= Intel Slim Bootloader STAGE1A =============
Serial Port Base: 00000000FE032000
PcdPciExpressBaseAddress: 00000000C0000000
mUartMmPciOffset[DebugPort]: 00000000000F0000
PciAddress: 00000000C00F0000
SBID: CTIPL_TGL
ISVN: 001
IVER: 001.000.001.008.00012
SVER: 0000000000000000
FDBG: BLD(D IA32) FSP(D)
FSPV: ID(TGLI-FSP) REV(0A007E70)
CPUV: ID(806C1) UCODE(AC)
Loader global data @ 0xFEF3FC10
Run STAGE1A @ 0xFFFEA000
Load STAGE1B @ 0xFFD80000
============= Intel Slim Bootloader STAGE1B =============
[Boot Guard] AcmStatus : 0x00000000
[Boot Guard] BootStatus: 0x00000000
[Boot Guard] Boot Guard Failed or is Disabled!
SpiInstance = FEF4C3D0
PchSpiBase at 0x00001F05
ScSpiBar0 at 0xF0000000
Loading Component KEYH:_HS_
Registering container KEYH
HASH verification for usage (0x00000100) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000100): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Append public key hash into store: Success
Load EXT CFG Data @ 0xFEF4CB54:0x1034 ... Success
HASH verification for usage (0x00000200) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000200): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Processor does not support Boot Guard.
Boot Guard Support status: 0
GetPlatformDataPtr is copied 0xFEF4CB34
BOOT: BP0
MODE: 0
PlatformName: INDi11
Memory Init
FSPM CfgData assignment
Load Memory Cfg Data
SkipMbpHob = 0x0
Load Graphics Cfg Data
Call FspMemoryInit ...
============= FSP Spec v2.2 Header Revision v5 (TGLI-FSP vA.0.7E.70) =============
Fsp BootFirmwareVolumeBase - 0xFFDEE000
Fsp BootFirmwareVolumeSize - 0x112000
Fsp TemporaryRamBase - 0xFEF4FF00
Fsp TemporaryRamSize - 0x50000
Fsp PeiTemporaryRamBase - 0xFEF4FF00
Fsp PeiTemporaryRamSize - 0x50000
Fsp StackBase - 0xFEF3EFD0
Fsp StackSize - 0x0
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x000FFDEE000, size is 0x00112000, handle is 0xFFDEE000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: A1EEAB87-C859-479D-89B5-1461F4061A3E
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x7 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x000FFE09C98 EntryPoint=0x000FFE09DCD PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM 6141E486-7543-4F1A-A579-FF532ED78E75
Loading PEIM at 0x000FFE0B59C EntryPoint=0x000FFE0B7DD ResetSystemPei.efi
Install PPI: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: 8C9F4DE3-7B90-47EF-9308-287CECD66DE8
Install PPI: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Install PPI: 75CF14AE-3441-49DC-AA10-BB35A7BA8BAB
Loading PEIM BAEB5BEE-5B33-480A-8AB7-B29C85E7CEAB
Loading PEIM at 0x000FFE0CBCC EntryPoint=0x000FFE0CE2D FspGlobalDataInitPei.efi
FspData: Signature - 0x44505346
FspData: Version - 0x0
FspData: PerfIdx - 0x3
FspData: PerfSig - 0x46524550
FspData: FspMode - API
FspData: FspInfoHeader - 0xFFDEE094
FspData: TempRamInitUpdPtr - 0x0
Loading PEIM 1B04374D-FA9C-420F-AC62-FEE6D45E8443
Loading PEIM at 0x000FFE15BDC EntryPoint=0x000FFE15E1D FspDebugServicePei.efi
=====================================
FSP Version : 0A.00.7E.70
RC Version : 0A.E0.7E.70
Build Date : 202403221131
=====================================
Install PPI: 835F3942-1545-414B-9459-BF072FA9A289
Loading PEIM 88C17E54-EBFE-4531-A992-581029F58126
Loading PEIM at 0x000FFE1F554 EntryPoint=0x000FFE1F70A FspPcdInit.efi
FspPcdInitEntryPoint() - Updating PcdPciExpressRegionLength to 0x10000000 & PcdPciExpressBaseAddress to 0xC0000000
Loading PEIM A8499E65-A6F6-48B0-96DB-45C266030D83
Loading PEIM at 0x000FFE20054 EntryPoint=0x000FFE20725 SiInitPreMemFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
SiInitPrePolicy() Start
PCH Series : TGL PCH-LP
PCH Stepping : B0
PCH SKU : LP IOT SKU
GBLRST_CAUSE0: 0x0
GBLRST_CAUSE1: 0x0
HPR_CAUSE0 : 0x0
FIA LOS0 = 0x00000011
FIA LOS1 = 0x00000200
POSTCODE=<00000B00>
PchInitPrePolicy() - Start
PCH PWRM Base needs to be programmed before here
(WDT) Readback = 0x00002000
Register PPI Notify: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Notify: PPI Guid: E09F355D-DAE8-4910-B14A-92780FDCF7CB, Peim notify entry point: FFE3F544
Install PPI: F38D1338-AF7A-4FB6-91DB-1A9C2183570D
SpiServiceInit() Start
Flash Region read Permission : FF
Flash Region write Permission : FF
Component 0 SFDP VSCC value : B1D82084
Component 1 SFDP VSCC value : 2000
Component Number : 1
Total Flash Size : 2000000
PchStrapBaseAddr : 100
PchStrapSize : 118
Mdtba : C00
CpuStrapBaseAddr : C68
CpuStrapSize : 44
SPI PPI Installed
Install PPI: DADE7CE3-6971-4B75-825E-0EE0EB17722D
SpiServiceInit() End
POSTCODE=<00000B02>
LpcOnEarlyPeiConfigure()
PchEarlyDisabledDeviceHandling() - Start
SPA Controller PCD Value = 3210
SPB Controller PCD Value = 7654
SPC Controller PCD Value = 3210
Multilane check for PCIE Controller 0: PCIe SPA is 4x1
No ports disabled
Multilane check for PCIE Controller 1: PCIe SPB is 1x4
Disabling RP 6/7/8
Multilane check for PCIE Controller 2: PCIe SPC is 4x1
No ports disabled
SCS UFS[0] Fuse disabled - performing PSF disable
SCS UFS[1] Fuse disabled - performing PSF disable
ISH Supported and Fuse disabled - performing PSF disable
GBE Supported and Fuse disabled - performing PSF disable
CNVi WiFi function Fuse disabled - performing PSF disable
PchEarlyDisabledDeviceHandling() - End
POSTCODE=<00000B7F>
PchInitPrePolicy() - End
Register PPI Notify: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Install PPI: BC1CFBDB-7E50-42BE-B487-22E0A90CB052
Install PPI: FEC36242-F8D8-4B43-8794-4F1F9F638DDC
SiInitPrePolicy() - End
Loading PEIM 9E1CC850-6731-4848-8752-6673C7005EEE
Loading PEIM at 0x000FFEE2268 EntryPoint=0x000FFEE2595 FspInitPreMem.efi
FspInitPreMemEntryPoint
POSTCODE=<0000D800>
Register PPI Notify: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: EF398D58-9DFD-4103-BF94-78C6F4FE712F
Installing StallPpi
Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56
Dumping FSPM_UPD - Size: 0x00000978
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x4D 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xF4 0xFE 0x00 0x00 0x05 0x00
0x00000030: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x00 0x60 0x97 0x05 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x01 0xB4 0xE5 0xF4 0xFE
0x00000050: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000060: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000070: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000080: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00
0x000000A0: 0x01 0x00 0x00 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x06 0x07 0x03 0x02 0x05 0x04
0x000000B0: 0x0F 0x08 0x09 0x0E 0x0C 0x0B 0x0A 0x0D 0x0B 0x0C 0x08 0x0F 0x09 0x0E 0x0A 0x0D
0x000000C0: 0x03 0x04 0x07 0x00 0x06 0x01 0x05 0x02 0x04 0x05 0x03 0x02 0x07 0x01 0x00 0x06
0x000000D0: 0x0B 0x0A 0x0C 0x0D 0x08 0x09 0x0E 0x0F 0x0C 0x0B 0x08 0x0D 0x0E 0x0F 0x09 0x0A
0x000000E0: 0x04 0x07 0x03 0x02 0x01 0x06 0x00 0x05 0x0B 0x0A 0x09 0x08 0x0C 0x0D 0x0F 0x0E
0x000000F0: 0x04 0x05 0x06 0x07 0x03 0x02 0x00 0x01 0x00 0x07 0x01 0x06 0x03 0x05 0x02 0x04
0x00000100: 0x09 0x08 0x0A 0x0B 0x0E 0x0F 0x0D 0x0C 0x04 0x05 0x06 0x01 0x03 0x02 0x07 0x00
0x00000110: 0x0A 0x0D 0x0C 0x0B 0x0E 0x09 0x0F 0x08 0x0A 0x0C 0x09 0x0F 0x08 0x0B 0x0D 0x0E
0x00000120: 0x03 0x04 0x01 0x02 0x06 0x00 0x05 0x07 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x00
0x00000150: 0x02 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000160: 0x00 0x00 0xD9 0xFE 0x00 0x20 0xD9 0xFE 0x00 0x10 0xD9 0xFE 0x00 0x40 0xD8 0xFE
0x00000170: 0x00 0x50 0xD8 0xFE 0x00 0x60 0xD8 0xFE 0x00 0x70 0xD8 0xFE 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0xFE 0x01 0x01 0x05 0x00 0x00 0x00
0x00000190: 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x20 0xDA 0xFE 0x00 0x30 0xDA 0xFE
0x000001D0: 0x00 0x40 0xDA 0xFE 0x2C 0x01 0x64 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0xAF 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01 0x01
0x00000260: 0x01 0x00 0x00 0x00 0xFF 0xFF 0xFF 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x02 0x02 0x04 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00
0x000002A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x02 0x00 0x01 0x01 0x08
0x00000300: 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02
0x00000310: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000320: 0x00 0x00 0x00 0x01 0x00 0x00 0x02 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000330: 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000360: 0x00 0x00 0x00 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x6C 0xFF 0x00 0x00 0x00 0x00
0x00000370: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000380: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000390: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000400: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000410: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000420: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000430: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000440: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000450: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000460: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000470: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000480: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000490: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000500: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000510: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000520: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000530: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000540: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000550: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000560: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000570: 0x00 0x00 0x04 0x00 0xA0 0xEF 0x00 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0xFF 0xFF
0x00000580: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08
0x00000590: 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 0xF0 0xD9 0xF4 0xFE 0xFF 0xFF 0xFF 0x00
0x000005A0: 0x10 0x00 0x00 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x08 0x00 0x00 0x60 0x03 0xFE
0x000005B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x07 0x00
0x000005C0: 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01
0x000005D0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01
0x000005E0: 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x3F 0xFF 0x3F
0x00000600: 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0x01 0x01 0x01 0x01
0x00000610: 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x01 0x00 0x01 0x01
0x00000620: 0x01 0x01 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0xCC 0x30
0x00000630: 0x00 0xE1 0xF5 0x05 0x1A 0x00 0x0B 0x00 0x0B 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A
0x00000640: 0x0A 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC
0x00000650: 0xAC 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD
0x00000660: 0xDD 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x03 0x00
0x00000670: 0x00 0x01 0x00 0x01 0x0F 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000680: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000690: 0x00 0x03 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006B0: 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006C0: 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000006D0: 0x00 0x00 0x40 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x000006E0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x01 0x01 0x01 0x01 0x01 0x01
0x000006F0: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x00000700: 0x01 0x01 0x01 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02 0x01 0x01 0x01 0x00
0x00000710: 0x02 0x00 0x00 0x00 0xE8 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000720: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000730: 0x00 0x00 0x00 0x00 0x00 0x28 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000740: 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000750: 0x06 0x0C 0x46 0x29 0x04 0x0E 0x46 0x29 0x02 0x14 0x46 0x29 0x03 0x16 0x46 0x29
0x00000760: 0x00 0x00 0x00 0x00 0x07 0x04 0x46 0x29 0x05 0x06 0x46 0x29 0x00 0x00 0x00 0x00
0x00000770: 0x00 0x00 0x01 0x01 0x00 0x00 0x04 0x03 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01
0x00000780: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000790: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000800: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000810: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000820: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000830: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000840: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000850: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000860: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000870: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000880: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000890: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008A0: 0x01 0x02 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x00 0x00
0x000008C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000900: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x07 0x00 0x00
0x00000910: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000920: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x64 0x00
0x00000930: 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000940: 0x07 0x07 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000950: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x00 0x00 0x00
0x00000960: 0x00 0x01 0x00 0x00 0x02 0x00 0x60 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000970: 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Install PPI: 824D5A3A-AF92-4C0C-9F19-19526DCA4ABB
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x40
TotalBlockSize after adding Block[0x2]= 0x11C
TotalBlockSize after adding Block[0x3]= 0x198
TotalBlockSize after adding Block[0x4]= 0x200
TotalBlockSize after adding Block[0x0]= 0x2C
TotalBlockSize after adding Block[0x0]= 0x68
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0x168
TotalBlockSize after adding Block[0x3]= 0x270
TotalBlockSize after adding Block[0x0]= 0x28
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xB4
TotalBlockSize = 0xB40
gSiPreMemConfigGuid = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemBlock->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCIe AddConfigBlocks
PciePreMemConfig->Header.GuidHob.Name = D0F9C2A9-7332-4733-8DB1-98792760DAE6
PciePreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCH AddPreMemConfigBlocks
PchGeneralPreMemConfig->Header.GuidHob.Name = C65F62FA-52B9-4837-86EB-1AFBD4ADBB3E
PchGeneralPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
LpcPreMemConfig->Header.GuidHob.Name = A6E6032F-1E58-407E-9AB8-C630C6C4118E
LpcPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HsioPciePreMemConfig->Header.GuidHob.Name = E8FB0C12-0DA1-4A20-B336-FB75938CE014
HsioPciePreMemConfig->Header.GuidHob.Header.HobLength = 0xDC
HsioSataPreMemConfig->Header.GuidHob.Name = 732260D0-A5C1-4119-AA0C-93DCAC670A31
HsioSataPreMemConfig->Header.GuidHob.Header.HobLength = 0x7C
PcieRpPreMemConfig->Header.GuidHob.Name = 8377AB38-F8B0-476A-9CA1-68EA7857D82A
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
GetClkReqForClkSrc 0->0, register 06543210
GetClkReqForClkSrc 1->1, register 06543210
GetClkReqForClkSrc 2->2, register 06543210
GetClkReqForClkSrc 3->3, register 06543210
GetClkReqForClkSrc 4->4, register 06543210
GetClkReqForClkSrc 5->5, register 06543210
GetClkReqForClkSrc 6->6, register 06543210
Me AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x4
MiscPeiPreMemConfig->Header.GuidHob.Name = 4A525577-3469-4F11-99CF-FBCD5EF184E4
MiscPeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
PramPreMemConfig->Header.GuidHob.Name = CF0B9B31-A1A6-46D9-8D14-E3AC690F523A
PramPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
MemConfig->Header.GuidHob.Name = 26CF084C-C9DB-41BB-92C6-D197B8A1E4BF
MemConfig->Header.GuidHob.Header.HobLength = 0xE0
MemConfigNoCrc->Header.GuidHob.Name = C56C73D0-1CDB-4C0C-A957-EA62A9E6F50C
MemConfigNoCrc->Header.GuidHob.Header.HobLength = 0x108
Applying Sample policy defaults for LPDDR4
CPU Pre-Mem Entry
POSTCODE=<0000DC00>
CpuSecurityPreMemConfig->Header.GuidHob.Name = 0FD5C346-8260-4067-9469-CF9168A34290
CpuSecurityPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTxtPreMemConfig->Header.GuidHob.Name = 20B4DB03-D160-4F83-A401-9A8AA8886814
CpuTxtPreMemConfig->Header.GuidHob.Header.HobLength = 0x60
CpuConfigLibPreMemConfig->Header.GuidHob.Name = FC1C0EC2-C6B4-4F05-BB85-C8008D5B4AB7
CpuConfigLibPreMemConfig->Header.GuidHob.Header.HobLength = 0x2C
CpuAddPreMemConfigBlocks Done
POSTCODE=<0000DC0F>
IpuPreMemPolicy->Header.GuidHob.Name = 830A222B-3FF5-432E-9DD5-4EE3FCA2AAA2
IpuPreMemPolicy->Header.GuidHob.Header.HobLength = 0x34
DciPreMemConfig->Header.GuidHob.Name = AB4AF366-2250-40C3-92DB-3661C6713C5A
DciPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
CpuTraceHubPreMemConfig->Header.GuidHob.Name = F2E17477-93F3-430D-9E08-3CCC6E2F6C4B
CpuTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
PchTraceHubPreMemConfig->Header.GuidHob.Name = 08456C11-DB85-4914-8D1A-E5AC6437E896
PchTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HdaPreMemConfig->Header.GuidHob.Name = D38F1E2B-21B3-43D1-9FA8-A5E178731E88
HdaPreMemConfig->Header.GuidHob.Header.HobLength = 0x74
PcieRpPreMemConfig->Header.GuidHob.Name = 7C24E649-C1F0-4CF9-8796-E7A0EE3443F8
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
SmbusPreMemConfig->Header.GuidHob.Name = 77A6E62C-716B-4386-9E9C-23A02E137B3A
SmbusPreMemConfig->Header.GuidHob.Header.HobLength = 0xA4
WdtPreMemConfig->Header.GuidHob.Name = FBCE08CC-60F2-4BDF-B788-09BB8165522B
WdtPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
OverClockingPreMemConfig->Header.GuidHob.Name = AD151BBC-D5A0-481E-9D19-F67B79E98F68
OverClockingPreMemConfig->Header.GuidHob.Header.HobLength = 0x94
GtPreMemConfig->Header.GuidHob.Name = 0319C56B-C43A-42F1-80BE-CA5BD1D5C928
GtPreMemConfig->Header.GuidHob.Header.HobLength = 0x50
TcssPreMemConfig->Header.GuidHob.Name = 514ED829-B2BB-46BE-A978-6D0C91C1EBE4
TcssPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
Vtd->Header.GuidHob.Name = 03E5CF63-BEBB-4041-B7E7-BF546120F1C5
Vtd->Header.GuidHob.Header.HobLength = 0x44
boot mode : 0x0
CpuPcieRpPreMemConfig->Header.GuidHob.Name = 41AEF892-C800-4AC0-A930-84AC47CACA7E
CpuPcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x38
PciePeiPreMemConfig->Header.GuidHob.Name = 81BAF3C9-F295-4572-8B21-793FA31BA5DB
PciePeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x44
CpuDmiPreMemConfig->Header.GuidHob.Name = 30D12AD5-A3C6-49C7-A2FD-355CCB61CBCF
CpuDmiPreMemConfig->Header.GuidHob.Header.HobLength = 0xA8
HostBridgePreMemConfig->Header.GuidHob.Name = BDEF6805-2080-44AD-932E-0004F52CB7A1
HostBridgePreMemConfig->Header.GuidHob.Header.HobLength = 0x40
TelemetryConfig->Header.GuidHob.Name = 422DE269-B2EF-4829-9336-0BE498B553B2
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
HgConfig->Header.GuidHob.Name = C7956998-C065-46C4-8E2F-582B67EBBE2F
HgConfig->Header.GuidHob.Header.HobLength = 0x88
DpInPreMemConfig->Header.GuidHob.Name = 080C14BA-CC84-4746-BF6B-D1F18EAAE835
DpInPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
TccConfig->Header.GuidHob.Name = AFFE7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x38
Install PPI: C133FE57-17C7-4B09-8B3C-97C189D0AB8D
FspUpdatePeiMePolicyPreMem
FSP UpdatePeiSaPolicyPreMem
MemConfig->SaGv = 0
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
---------------------- Si Pre-Mem Config Block Print Begin -----------------
PlatformDebugConsent = 0
SkipOverrideBootModeWhenFwUpdate = 0
---------------------- Si Pre-Mem Config Block Print End -------------------
---------------------- PCIe Pre-Mem Config Block Print Begin -----------------
PcieImrEnabled = 0
PcieImrRpLocation = 0
PcieImrSize = 0
PcieImrRpSelection = 0
---------------------- PCIe Pre-Mem Config Block Print End -------------------
------------------------ PCH Print PreMemPolicy Start ------------------------
Revision= 1
------------------ PCH General PreMem Config ------------------
Port80Route= 0
PcieRefPllSsc= FF
GpioOverride= 0
------------------ PCH LPC PreMem Config ------------------
EnhancePort8xhDecoding= 1
------------------ HSIO PCIE PreMem Config ------------------
RootPort[0] HsioRxSetCtleEnable= 0
RootPort[0] HsioRxSetCtle= 0
RootPort[0] HsioTxGen1DownscaleAmpEnable= 0
RootPort[0] HsioTxGen1DownscaleAmp= 0
RootPort[0] HsioTxGen2DownscaleAmpEnable= 0
RootPort[0] HsioTxGen2DownscaleAmp= 0
RootPort[0] HsioTxGen3DownscaleAmpEnable= 0
RootPort[0] HsioTxGen3DownscaleAmp= 0
RootPort[0] HsioTxGen1DeEmphEnable= 0
RootPort[0] HsioTxGen1DeEmph= 0
RootPort[0] HsioTxGen2DeEmph3p5Enable= 0
RootPort[0] HsioTxGen2DeEmph3p5= 0
RootPort[0] HsioTxGen2DeEmph6p0Enable= 0
RootPort[0] HsioTxGen2DeEmph6p0= 0
RootPort[1] HsioRxSetCtleEnable= 0
RootPort[1] HsioRxSetCtle= 0
RootPort[1] HsioTxGen1DownscaleAmpEnable= 0
RootPort[1] HsioTxGen1DownscaleAmp= 0
RootPort[1] HsioTxGen2DownscaleAmpEnable= 0
RootPort[1] HsioTxGen2DownscaleAmp= 0
RootPort[1] HsioTxGen3DownscaleAmpEnable= 0
RootPort[1] HsioTxGen3DownscaleAmp= 0
RootPort[1] HsioTxGen1DeEmphEnable= 0
RootPort[1] HsioTxGen1DeEmph= 0
RootPort[1] HsioTxGen2DeEmph3p5Enable= 0
RootPort[1] HsioTxGen2DeEmph3p5= 0
RootPort[1] HsioTxGen2DeEmph6p0Enable= 0
RootPort[1] HsioTxGen2DeEmph6p0= 0
RootPort[2] HsioRxSetCtleEnable= 0
RootPort[2] HsioRxSetCtle= 0
RootPort[2] HsioTxGen1DownscaleAmpEnable= 0
RootPort[2] HsioTxGen1DownscaleAmp= 0
RootPort[2] HsioTxGen2DownscaleAmpEnable= 0
RootPort[2] HsioTxGen2DownscaleAmp= 0
RootPort[2] HsioTxGen3DownscaleAmpEnable= 0
RootPort[2] HsioTxGen3DownscaleAmp= 0
RootPort[2] HsioTxGen1DeEmphEnable= 0
RootPort[2] HsioTxGen1DeEmph= 0
RootPort[2] HsioTxGen2DeEmph3p5Enable= 0
RootPort[2] HsioTxGen2DeEmph3p5= 0
RootPort[2] HsioTxGen2DeEmph6p0Enable= 0
RootPort[2] HsioTxGen2DeEmph6p0= 0
RootPort[3] HsioRxSetCtleEnable= 0
RootPort[3] HsioRxSetCtle= 0
RootPort[3] HsioTxGen1DownscaleAmpEnable= 0
RootPort[3] HsioTxGen1DownscaleAmp= 0
RootPort[3] HsioTxGen2DownscaleAmpEnable= 0
RootPort[3] HsioTxGen2DownscaleAmp= 0
RootPort[3] HsioTxGen3DownscaleAmpEnable= 0
RootPort[3] HsioTxGen3DownscaleAmp= 0
RootPort[3] HsioTxGen1DeEmphEnable= 0
RootPort[3] HsioTxGen1DeEmph= 0
RootPort[3] HsioTxGen2DeEmph3p5Enable= 0
RootPort[3] HsioTxGen2DeEmph3p5= 0
RootPort[3] HsioTxGen2DeEmph6p0Enable= 0
RootPort[3] HsioTxGen2DeEmph6p0= 0
RootPort[4] HsioRxSetCtleEnable= 0
RootPort[4] HsioRxSetCtle= 0
RootPort[4] HsioTxGen1DownscaleAmpEnable= 0
RootPort[4] HsioTxGen1DownscaleAmp= 0
RootPort[4] HsioTxGen2DownscaleAmpEnable= 0
RootPort[4] HsioTxGen2DownscaleAmp= 0
RootPort[4] HsioTxGen3DownscaleAmpEnable= 0
RootPort[4] HsioTxGen3DownscaleAmp= 0
RootPort[4] HsioTxGen1DeEmphEnable= 0
RootPort[4] HsioTxGen1DeEmph= 0
RootPort[4] HsioTxGen2DeEmph3p5Enable= 0
RootPort[4] HsioTxGen2DeEmph3p5= 0
RootPort[4] HsioTxGen2DeEmph6p0Enable= 0
RootPort[4] HsioTxGen2DeEmph6p0= 0
RootPort[5] HsioRxSetCtleEnable= 0
RootPort[5] HsioRxSetCtle= 0
RootPort[5] HsioTxGen1DownscaleAmpEnable= 0
RootPort[5] HsioTxGen1DownscaleAmp= 0
RootPort[5] HsioTxGen2DownscaleAmpEnable= 0
RootPort[5] HsioTxGen2DownscaleAmp= 0
RootPort[5] HsioTxGen3DownscaleAmpEnable= 0
RootPort[5] HsioTxGen3DownscaleAmp= 0
RootPort[5] HsioTxGen1DeEmphEnable= 0
RootPort[5] HsioTxGen1DeEmph= 0
RootPort[5] HsioTxGen2DeEmph3p5Enable= 0
RootPort[5] HsioTxGen2DeEmph3p5= 0
RootPort[5] HsioTxGen2DeEmph6p0Enable= 0
RootPort[5] HsioTxGen2DeEmph6p0= 0
RootPort[6] HsioRxSetCtleEnable= 0
RootPort[6] HsioRxSetCtle= 0
RootPort[6] HsioTxGen1DownscaleAmpEnable= 0
RootPort[6] HsioTxGen1DownscaleAmp= 0
RootPort[6] HsioTxGen2DownscaleAmpEnable= 0
RootPort[6] HsioTxGen2DownscaleAmp= 0
RootPort[6] HsioTxGen3DownscaleAmpEnable= 0
RootPort[6] HsioTxGen3DownscaleAmp= 0
RootPort[6] HsioTxGen1DeEmphEnable= 0
RootPort[6] HsioTxGen1DeEmph= 0
RootPort[6] HsioTxGen2DeEmph3p5Enable= 0
RootPort[6] HsioTxGen2DeEmph3p5= 0
RootPort[6] HsioTxGen2DeEmph6p0Enable= 0
RootPort[6] HsioTxGen2DeEmph6p0= 0
RootPort[7] HsioRxSetCtleEnable= 0
RootPort[7] HsioRxSetCtle= 0
RootPort[7] HsioTxGen1DownscaleAmpEnable= 0
RootPort[7] HsioTxGen1DownscaleAmp= 0
RootPort[7] HsioTxGen2DownscaleAmpEnable= 0
RootPort[7] HsioTxGen2DownscaleAmp= 0
RootPort[7] HsioTxGen3DownscaleAmpEnable= 0
RootPort[7] HsioTxGen3DownscaleAmp= 0
RootPort[7] HsioTxGen1DeEmphEnable= 0
RootPort[7] HsioTxGen1DeEmph= 0
RootPort[7] HsioTxGen2DeEmph3p5Enable= 0
RootPort[7] HsioTxGen2DeEmph3p5= 0
RootPort[7] HsioTxGen2DeEmph6p0Enable= 0
RootPort[7] HsioTxGen2DeEmph6p0= 0
RootPort[8] HsioRxSetCtleEnable= 0
RootPort[8] HsioRxSetCtle= 0
RootPort[8] HsioTxGen1DownscaleAmpEnable= 0
RootPort[8] HsioTxGen1DownscaleAmp= 0
RootPort[8] HsioTxGen2DownscaleAmpEnable= 0
RootPort[8] HsioTxGen2DownscaleAmp= 0
RootPort[8] HsioTxGen3DownscaleAmpEnable= 0
RootPort[8] HsioTxGen3DownscaleAmp= 0
RootPort[8] HsioTxGen1DeEmphEnable= 0
RootPort[8] HsioTxGen1DeEmph= 0
RootPort[8] HsioTxGen2DeEmph3p5Enable= 0
RootPort[8] HsioTxGen2DeEmph3p5= 0
RootPort[8] HsioTxGen2DeEmph6p0Enable= 0
RootPort[8] HsioTxGen2DeEmph6p0= 0
RootPort[9] HsioRxSetCtleEnable= 0
RootPort[9] HsioRxSetCtle= 0
RootPort[9] HsioTxGen1DownscaleAmpEnable= 0
RootPort[9] HsioTxGen1DownscaleAmp= 0
RootPort[9] HsioTxGen2DownscaleAmpEnable= 0
RootPort[9] HsioTxGen2DownscaleAmp= 0
RootPort[9] HsioTxGen3DownscaleAmpEnable= 0
RootPort[9] HsioTxGen3DownscaleAmp= 0
RootPort[9] HsioTxGen1DeEmphEnable= 0
RootPort[9] HsioTxGen1DeEmph= 0
RootPort[9] HsioTxGen2DeEmph3p5Enable= 0
RootPort[9] HsioTxGen2DeEmph3p5= 0
RootPort[9] HsioTxGen2DeEmph6p0Enable= 0
RootPort[9] HsioTxGen2DeEmph6p0= 0
RootPort[10] HsioRxSetCtleEnable= 0
RootPort[10] HsioRxSetCtle= 0
RootPort[10] HsioTxGen1DownscaleAmpEnable= 0
RootPort[10] HsioTxGen1DownscaleAmp= 0
RootPort[10] HsioTxGen2DownscaleAmpEnable= 0
RootPort[10] HsioTxGen2DownscaleAmp= 0
RootPort[10] HsioTxGen3DownscaleAmpEnable= 0
RootPort[10] HsioTxGen3DownscaleAmp= 0
RootPort[10] HsioTxGen1DeEmphEnable= 0
RootPort[10] HsioTxGen1DeEmph= 0
RootPort[10] HsioTxGen2DeEmph3p5Enable= 0
RootPort[10] HsioTxGen2DeEmph3p5= 0
RootPort[10] HsioTxGen2DeEmph6p0Enable= 0
RootPort[10] HsioTxGen2DeEmph6p0= 0
RootPort[11] HsioRxSetCtleEnable= 0
RootPort[11] HsioRxSetCtle= 0
RootPort[11] HsioTxGen1DownscaleAmpEnable= 0
RootPort[11] HsioTxGen1DownscaleAmp= 0
RootPort[11] HsioTxGen2DownscaleAmpEnable= 0
RootPort[11] HsioTxGen2DownscaleAmp= 0
RootPort[11] HsioTxGen3DownscaleAmpEnable= 0
RootPort[11] HsioTxGen3DownscaleAmp= 0
RootPort[11] HsioTxGen1DeEmphEnable= 0
RootPort[11] HsioTxGen1DeEmph= 0
RootPort[11] HsioTxGen2DeEmph3p5Enable= 0
RootPort[11] HsioTxGen2DeEmph3p5= 0
RootPort[11] HsioTxGen2DeEmph6p0Enable= 0
RootPort[11] HsioTxGen2DeEmph6p0= 0
---------------- HSIO SATA PreMem Config for controller 0 ----------------
PortSettings[0] HsioRxGen1EqBoostMagEnable= 0
PortSettings[0] HsioRxGen1EqBoostMag= 0
PortSettings[0] HsioRxGen2EqBoostMagEnable= 0
PortSettings[0] HsioRxGen2EqBoostMag= 0
PortSettings[0] HsioRxGen3EqBoostMagEnable= 0
PortSettings[0] HsioRxGen3EqBoostMag= 0
PortSettings[0] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen1DownscaleAmp= 0
PortSettings[0] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen2DownscaleAmp= 0
PortSettings[0] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen3DownscaleAmp= 0
PortSettings[0] HsioTxGen1DeEmphEnable= 0
PortSettings[0] HsioTxGen1DeEmph= 0
PortSettings[0] HsioTxGen2DeEmphEnable= 0
PortSettings[0] HsioTxGen2DeEmph= 0
PortSettings[0] HsioTxGen3DeEmphEnable= 0
PortSettings[0] HsioTxGen3DeEmph= 0
PortSettings[1] HsioRxGen1EqBoostMagEnable= 0
PortSettings[1] HsioRxGen1EqBoostMag= 0
PortSettings[1] HsioRxGen2EqBoostMagEnable= 0
PortSettings[1] HsioRxGen2EqBoostMag= 0
PortSettings[1] HsioRxGen3EqBoostMagEnable= 0
PortSettings[1] HsioRxGen3EqBoostMag= 0
PortSettings[1] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen1DownscaleAmp= 0
PortSettings[1] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen2DownscaleAmp= 0
PortSettings[1] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen3DownscaleAmp= 0
PortSettings[1] HsioTxGen1DeEmphEnable= 0
PortSettings[1] HsioTxGen1DeEmph= 0
PortSettings[1] HsioTxGen2DeEmphEnable= 0
PortSettings[1] HsioTxGen2DeEmph= 0
PortSettings[1] HsioTxGen3DeEmphEnable= 0
PortSettings[1] HsioTxGen3DeEmph= 0
------------------ PCH PCIe RP PreMem Config ------------------
Port[0] RpEnabled= 1
Port[1] RpEnabled= 1
Port[2] RpEnabled= 1
Port[3] RpEnabled= 1
Port[4] RpEnabled= 1
Port[5] RpEnabled= 1
Port[6] RpEnabled= 1
Port[7] RpEnabled= 1
Port[8] RpEnabled= 1
Port[9] RpEnabled= 1
Port[10] RpEnabled= 1
Port[11] RpEnabled= 1
Clock[0] Usage= 80
Clock[0] ClkReq= 0
Clock[1] Usage= 80
Clock[1] ClkReq= 1
Clock[2] Usage= 80
Clock[2] ClkReq= 2
Clock[3] Usage= 80
Clock[3] ClkReq= 3
Clock[4] Usage= 80
Clock[4] ClkReq= 4
Clock[5] Usage= 80
Clock[5] ClkReq= 5
Clock[6] Usage= 80
Clock[6] ClkReq= 6
------------------------ PCH Print PreMemPolicy End --------------------------
---------------------- Me Config Block Pre-Mem Print Begin -----------------
------------------------ ME_PEI_PREMEM_CONFIG -----------------
Revision : 0x2
HeciTimeouts : 0x1
DidInitStat : 0x0
DisableCpuReplacedPolling : 0x0
SendDidMsg (deprecated) : 0x0
DisableMessageCheck : 0x0
SkipMbpHob : 0x0
HeciCommunication2 : 0x0
KtDeviceEnable : 0x1
SkipCpuReplacementCheck : 0x1
Heci1BarAddress : 0xFEDA2000
Heci2BarAddress : 0xFEDA3000
Heci3BarAddress : 0xFEDA4000
---------------------- Me Config Block Pre-Mem Print End -------------------
------------------------ SA Policy (PEI PreMem) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_PREMEM_CONFIG ------------------------
Revision : 2
SpdAddressTable[16] : 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
SmbusBar: 0xEFA0
TsegSize: 0x800000
UserBd: 0x5
SkipExtGfxScan: 1
S3DataPtr: 0x0
WrcFeatureEnable : 0x0
VcRtMappingPegEn : 0x0
TxtImplemented: 0
BdatEnable: 0
BdatTestType: 0
ScanExtGfxForLegacyOpRom: 0
CridEnable: 0
AcpiReservedMemoryBase: 0x0
AcpiReservedMemorySize: 0x0
SystemMemoryLength: 0x0
OpRomScanTempMmioBar: 0x80000000
OpRomScanTempMmioLimit: 0xC0000000
------------------------ MEMORY_CONFIG_NO_CRC ------------------------
CleanMemory: 0
MemTestOnWarmBoot: 1
SerialDebugLevel: 3
PlatformMemorySize: 0x5976000
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DMI PreMem Config ------------------
DmiMaxLinkSpeed : 0x3
DmiAspm : 0x2
DmiHWEQ : 0x1
DmiGen3EqPh2Enable : 0x2
DmiGen3EqPh3Method : 0x0
DmiGen3ProgramStaticEq : 0x1
DmiGen3RootPortPreset[8] : 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8
DmiGen3EndPointPreset[8] : 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7
DmiGen3EndPointHint[8] : 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2
DmiGen3RxCtlePeaking[4] : 0x0 0x0 0x0 0x0 DmiDeEmphasis : 0x1
------------------------ GRAPHICS_PEI_PREMEM_CONFIG -----------------
Revision : 3
PanelPowerEnable : 0x1
GttSize : 8 MB
IgdDvmt50PreAlloc : 0xFE
InternalGraphics : 0x1
PrimaryDisplay : 0x0
ApertureSize : 0x1
GtPsmiSupport : 0x0
PsmiRegionSize : 0x0
DismSize : 0x0
GttMmAdr : 0xAF000000
GmAdr64 : 0xB0000000
DfdRestoreEnable : 0x0
DdiPortAConfig : 0x0
DdiPortBConfig : 0x0
DdiPortAHpd : 0x0
DdiPortBHpd : 0x0
DdiPortCHpd : 0x0
DdiPort1Hpd : 0x0
DdiPort2Hpd : 0x0
DdiPort3Hpd : 0x0
DdiPort4Hpd : 0x0
DdiPortADdc : 0x0
DdiPortBDdc : 0x0
DdiPortCDdc : 0x0
DdiPort1Ddc : 0x0
DdiPort2Ddc : 0x0
DdiPort3Ddc : 0x0
DdiPort4Ddc : 0x0
------------------------ GRAPHICS_PEI_PREMEM_CONFIG Print END -----------------
----------------------- TCSS_PEI_PREMEM_CONFIG -----------------
Revision : 1
TCSS Port Enabled Bitmap : F
TcssPeiPreMemConfig->MiscConfig.PcieMultipleSegmentEnabled : 0x0
TCSS ITBT PCIE 0-3 Enable : 1 1 1 1
TCSS xHCI Enable : 1
TCSS xDCI Enable : 1
TCSS ITBT DMA 0-1 Enable : 1 1
------------------------ VTD_CONFIG -----------------
Revision : 1
VtdDisable : 0x0
X2ApicOptOut : 0x0
DmaControlGuarantee : 0x1
VtdIgdEnable : 0x1
VtdIpuEnable : 0x1
VtdIopEnable : 0x1
VtdItbtEnable : 0x1
VtdBaseAddress[0] : 0xFED90000
VtdBaseAddress[1] : 0xFED92000
VtdBaseAddress[2] : 0xFED91000
VtdBaseAddress[3] : 0xFED84000
VtdBaseAddress[4] : 0xFED85000
VtdBaseAddress[5] : 0xFED86000
VtdBaseAddress[6] : 0xFED87000
PreBootDmaMask : 0x0
DmaBufferSize : 0x400000
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge PreMem Config ------------------
Revision : 1
MchBar : 0xFEDC0000
DmiBar : 0xFEDA0000
EpBar : 0xFEDA1000
EdramBar : 0xFED80000
RegBar : 0xFB000000
EnableAbove4GBMmio : 0x1
------------------------ CPU - SiPreMemPolicyPpi Print Begin in PreMem -----------------
Revision= 1
------------------ CPU Security PreMem Config ------------------
CPU_SECURITY_PREMEM_CONFIG : PrmrrSize = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosSize = 0x2800
CPU_SECURITY_PREMEM_CONFIG : BiosGuard = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosGuardToolsInterface = 0x0
CPU_SECURITY_PREMEM_CONFIG : Txt = 0x0
CPU_SECURITY_PREMEM_CONFIG : SkipStopPbet = 0x0
CPU_SECURITY_PREMEM_CONFIG : EnableC6Dram = 0x0
CPU_SECURITY_PREMEM_CONFIG : ResetAux = 0x0
CPU_SECURITY_PREMEM_CONFIG : TxtAcheckRequest = 0x0
------------------ CPU TXT PreMem Config ------------------
CPU_TXT_PREMEM_CONFIG : SinitMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtHeapMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TgaSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemoryBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemorySize = 0x400000
CPU_TXT_PREMEM_CONFIG : BiosAcmSize = 0x0
CPU_TXT_PREMEM_CONFIG : BiosAcmBase = 0xFF6C0000
CPU_TXT_PREMEM_CONFIG : ApStartupBase = 0x0
------------------ CPU Config Lib PreMem Config ------------------
CPU_CONFIG_LIB_PREMEM_CONFIG : HyperThreading = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : BootFrequency = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : ActiveCoreCount1 = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : JtagC10PowerGateDisable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BistOnReset = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : VmxEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceEnable = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceLockEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : TmeEnable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : CpuRatio = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : ConfigTdpLevel = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BclkSource = 0x0
------------------------ CPU - SiPreMemPolicyPpi Print End -----------------
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DCI PreMem Config ------------------
DciEn = 0
DciDbcMode = 4
DciModphyPg = 0
DciUsb3TypecUfpDbg = 2
------------------ HD Audio PreMem Config ------------------
Enable = 1
DSP Enable = 0
DSP UAA Compliance = 0
Audio Link: HDA Link = 1
Audio Link: DMIC#0 = 0
DMIC#0 Clock Select = 0
Audio Link: DMIC#1 = 0
DMIC#1 Clock Select = 0
Audio Link: SSP#0 = 0
Audio Link: SSP#1 = 0
Audio Link: SSP#2 = 0
Audio Link: SSP#3 = 0
Audio Link: SSP#4 = 0
Audio Link: SSP#5 = 0
Audio Link: SoundWire#1 = 1
Audio Link: SoundWire#2 = 1
Audio Link: SoundWire#3 = 0
Audio Link: SoundWire#4 = 0
VC Type = 0
iDisp Codec Disconnect = 0
iDisp Link Frequency = 4
iDisp Link T-Mode = 3
ResetWaitTimer = 258
Hda Sdi0 Enable = 1
Hda Sdi1 Enable = 0
------------------ ISH PreMem Config ------------------
Enable= 1
------------------ CPU Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x0
------------------ PCH Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x1
------------------ SMBUS PreMem Config ------------------
Enable= 1
ArpEnable= 0
DynamicPowerGating= 1
SpdWriteDisable= 1
SmbAlertEnable= 0
SmbusIoBase= EFA0
NumRsvdSmbusAddresses= 4
RsvdSmbusAddressTable= { A2h A0h A2h A0h }
------------------ WDT PreMem Config ------------------
DisableAndLock= 0
------------------ OverClocking PreMem Config ------------------
OVERCLOCKING_PREMEM_CONFIG:: OcSupport : 0x0
OVERCLOCKING_PREMEM_CONFIG:: OcLock : 0x1
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingDownBin : 0x1
OVERCLOCKING_PREMEM_CONFIG:: Avx2RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: Avx3RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: BclkAdaptiveVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CorePllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: McPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: TjMaxOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrFaults : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrEfficiency : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RealtimeMemoryTiming : 0x0
OVERCLOCKING_PREMEM_CONFIG:: DynamicMemoryChange : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingCcfAutoGvDisable : 0x1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG -----------------
Revision : 4
RpEnabledMask : 0xFFFFFF
Link Down GPIOs : 0x0
ClockReq Messaging Enable : 0x1
RootPort[0] PcieSpeed : 0
RootPort[0] CdrRelock : 1
RootPort[0] Xl1el : 0
RootPort[0] NewFomDisable : 1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG Print END -----------------
------------------------ PCIE_PEI_PREMEM_CONFIG -----------------
Revision : 1
------------------------ PCIE_PEI_PREMEM_CONFIG Print END -----------------
------------------------ HYBRID_GRAPHICS_CONFIG -----------------
Revision : 2
HgConfig->CpuPcie0Rtd3Gpio.GpioSupport : 0x0
HgMode : 0
HgSlot : 0
------------------------ HG_DELAY_OPTIMIZATION_DATA -----------------
SaRtd3.HgDelayAfterHoldReset : 0x64
SaRtd3.HgDelayAfterPwrEn : 0x12C
------------------------ HYBRID_GRAPHICS_CONFIG print END -----------------
----------------------- DPIN_PREMEM_CONFIG -----------------
Revision : 2
DPIN DPin External Connection Policy : 0
DPIN NumberOfDpInPort : 0x0
DPIN DpInPortConnectMap : 0x0
DPIN DPinDynamicSwitch : 0x0
DPIN DPinDynamicSwitchDelay0 : 0x0
DPIN DPinDynamicSwitchDelay1 : 0x3E8
------------------ TCC PreMem Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Install PPI: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
FspInitPreMemEntryPoint done
Notify: PPI Guid: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8, Peim notify entry point: FFEE2689
Notify: PPI Guid: 85270BEF-6984-4375-A6EA-B5AA906EDD4A, Peim notify entry point: FFE207C3
SiInitPreMemOnPolicy() Start
PsmiInit () - Start
Install PSMI DATA HOB
PsmiDataHob->EfiHobGuidType.Name: 0A9652BD-6ACD-47E5-803A-09537BD2A848
PsmiDataHob @ FEF555B8
PsmiDataHobSize - HobHeader: 6A
PsmiDataHobSize: 82
PSMI HOB installed
PSMI SCRPD1 = 0x0
No PSMI Reservation Request
PsmiInit () - End
ME-BIOS: HECI PPI Entry.
POSTCODE=<0000DE03>
Install PPI: D14319E2-407A-9580-8DE5-51A8FFC6D7D7
ME-BIOS: HECI PPI Exit - Success.
POSTCODE=<0000DE23>
MeDeviceInit [HECI1] H: 00000000, L: FEDA2000
POSTCODE=<0000D001> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI2] H: 00000000, L: FEDA3000
POSTCODE=<0000D002> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI3] H: 00000000, L: FEDA4000
POSTCODE=<0000D003> - ME Device Init
Program HECI MMIO address
HeciEnable
[HECI1] Clearing D0I3 bit
[HECI1] D0I3C register = 00000010
Enabling CSME device 0:22:0
HeciInitialize () - Start
[HECI1] HfSts1 = 0x80000015
InitializeHeci () - Set H_RDY
Heci2Disable
[HECI2] Setting D0I3 bit
[HECI2] D0I3C register = 00000015
Disabling CSME device 0:22:1
Heci3Enable
[HECI3] Clearing D0I3 bit
[HECI3] D0I3C register = 00000010
Enabling CSME device 0:22:4
SolEnable
Enabling CSME device 0:22:3
PeiSiPolicyOverridePreMem ()
SiPreMemConfig->PlatformDebugConsent = 0
DciPreMemConfig->DciEn = 0
DciPreMemConfig->DciModphyPg = 1
DciPreMemConfig->DciDbcMode = 4
CpuTraceHubPreMemConfig->TraceHub.EnableMode = 0
CpuTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
CpuTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
PchTraceHubPreMemConfig->TraceHub.EnableMode = 0
PchTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
PchTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
POSTCODE=<0000DB48>
PchOnPolicyInstalled() - Start
ConfigureHdAudio() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
SetHdaControllerReset() - De-assert Reset
ConfigureAudioLinks() Start
HDA: HD Audio Link pins configuration
HDA: SoundWire#0 interface pins configuration, Status = Success
HDA: SoundWire#1 interface pins configuration, Status = Success
ConfigureAudioLinks() End
InitializeDisplayAudio() Start
EnablePowerWell Started !
EnablePowerWell Successfull
InitializeDisplayAudio() End
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00810004
HDA: SRAM retention mode idle wait - 64 XTAL oscillator clocks
ConfigureHdAudio() End - Status = Success
POSTCODE=<0000DB49>
PchHsioBiosProgPreMem() Start
PchHsioBiosProgPreMem() End
POSTCODE=<0000DB4A>
ECTRL Old = 0x0000B860
ECTRL New = 0x0000B861
DCI Debug Disabled
POSTCODE=<0000DB4D>
TraceHubInitialize() - Start
Early Trace is Enabled
Disable early trace complete
SCRPD0 = 0x00000000
TraceHubInitialize() - End. STT disconnected and Trace Hub requested to be disable
Register PPI Notify: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
SetPcieRefPllSsc()
POSTCODE=<0000DB15>
InitializePchSmbus() Start
Install PPI: 9CA93627-B65B-4324-A202-C0B461764543
InitializePchSmbus() End
POSTCODE=<0000DB52>
LpcOnPolicyConfigure()
POSTCODE=<0000DB53>
DCI Debug Disabled
Configure PCH SBU pins
POSTCODE=<0000DB55>
PchOnPolicyInstalled() - End
CpuOnPolicyInstalled Start
POSTCODE=<0000DC20>
XmmInit Start
POSTCODE=<0000DC2F>
Fit Entry Type: Startup ACM Entry
Fit Error Code: Startup ACM not supported by CPU
Microcode Update: 0x000000AC
TxtInit Start
POSTCODE=<0000DC3F>
Install PPI: 38CDD10B-767D-4F6E-A744-67EE1DFE2FA5
TXTPEI: TxtInfoHob passed from platform as:
TXTPEI: ChipsetIsTxtCapable = 1
TXTPEI: ProcessorIsTxtCapable = 1
TXTPEI: TxtMode = 0
TXTPEI: TxtAcheckRequest = 0
TXTPEI: ResetAux = 0
TXTPEI: AcpiBase = 1800
TXTPEI: SinitMemorySize = 0
TXTPEI: TxtHeapMemorySize = 0
TXTPEI: TxtDprMemoryBase = 0
TXTPEI: TxtDprMemorySize = 400000
TXTPEI: BiosAcmBase = FF6C0000
TXTPEI: BiosAcmSize = 0
TXTPEI: SinitAcmBase = 0
TXTPEI: SinitAcmSize = 0
TXTPEI: TgaSize = 0
TXTPEI: TxtLcpPdBase = 0
TXTPEI: TxtLcpPdSize = 0
TXTPEI: Flags = 0
TXTPEI: ApStartupBase = 0
TXTPEI: BIOS ACM is not matched to chipset!! Force TxtMode=0 and unloaded!!
TXTPEI::PEI Lib initialization failure
TXTPEI::Processor, PCH & Platform is TXT capable
TXTPEI::Unlock memory
TXTPEI::TXT failed reported by S-ACM
Install PPI: 9ECAFD30-29E2-42F6-BAF3-8B7DB8FE1F22
Processor does not support Boot Guard.
Boot Guard is not supported.
POSTCODE=<0000DC4F>
SetCpuStrapAndEarlyPowerOnConfig Start
POSTCODE=<0000DC0A>
SetCpuStrapAndEarlyPowerOnConfig: BootMode = 0
Set CPU Soft Straps Entry Point
Current CPU Strap Data = 0x1000
HT is supported
Number of Total Cores = 0x4. Number of Active Cores / Threads = 0x4 / 0x8
Ratio from Policy is 0x0
Current Flex Ratio from MSR is 0x0
Current Flex Ratio from CPU Strap: 0x0
No need to set Flex Ratio.
SetCpuStrapAndEarlyPowerOnConfig Done
POSTCODE=<0000DC14>
POSTCODE=<0000DC5F>
CpuOcInitPreMem Start
POSTCODE=<0000DC26>
(OC) Overclocking is disabled. Bypassing CPU core overclocking flow.
Invoking LockEnableDisableCpuDebug
CPU Pre-Mem Exit
POSTCODE=<0000DC6F>
MeOnPolicyInstalled() - Start
PWRM_PMCON_A = 0xD0801038
MePmInit () - Force an S5 exit path.
MeOnPolicyInstalled() - End
Programming Host Bridge Bars
POSTCODE=<0000DA06>
HostBridgeDataHob->EfiHobGuidType.Name: 3B682D57-D402-40A6-B134-A0C4F6311D09
HostBridgeDataHob @ FEF55988
HostBridgeDataHob Size - HobHeaderSize: 4
HostBridgeDataHobSize: 1C
HostBridgeDataHob->EnableAbove4GBMmio: 1
Host Bridge Data HOB installed
Enable VLW
Install SA HOBs
POSTCODE=<0000DA08>
SaDataHob->EfiHobGuidType.Name: E07D0BDA-BF90-46A9-B00E-B2C44A0ED6D0
SaConfigHob->EfiHobGuidType.Name: 762FA2E6-EA3B-41C8-8C52-63766D7039E0
SaDataHob @ FEF559A8
SaDataHobSize - HobHeader: 3
SaDataHobSize: 1B
SA HOBs installed
Reporting CPU PCIe code version
POSTCODE=<0000DA0A>
***************** System Agent PCIe code version *****************
** Major version number is: 10 **
** Minor version number is: 224 **
** Rev version number is: 126 **
** Build number is: 112 **
******************************************************************
Initializing DMI/OPI Max PayLoad Size
POSTCODE=<0000DA1F>
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
Initializing HybridGraphics
POSTCODE=<0000DA20>
HG:: HybridGraphics PEI initialization Starting
HgInfoHob->EfiHobGuidType.Name: 46CBED07-717A-4A75-85B3-F4B6C4E23A75
HgInfoHob @ FEF559F0
HgInfoHobSize - HobHeader: 4E
HgInfoHobSize: 66
Install HG Info HOB
HG:: HybridGraphics PEI initialization Ends
Initializing CPU PCIe
POSTCODE=<0000DA30>
CpuPcieHob Created
CpuPcieHob->EfiHobGuidType.Name: 440AB2E5-A3EA-466F-8496-DFB13B752995
CpuPcieHob @ FEF55A58
CpuPcieHob - HobHeader: DB
Initialize CPU PciExpress controllers in Premem : PciExpressInit Start
MaxCpuPciePortNum = 1
RpEnabledMask from Policy = FFFFFF
Read DEVEN register
DevEnable = 2F091
RpEnabledMask formed from DEVEN = 1
CpuPcieHob->RpEnabledMask formed after reading DID/setup and controllerconfig = 1
Call DEKEL init function to configure the PHY registers
GetCpuPcieCdrValue = 15
Default Case
GetCpuPcieCdrValue = 15
Default Case
CdrRelock is Enabled for PEG60
CdrRelock is Disabled for PEG10
ClockReq Messaging Enable
CPU PCIE Clock Req configuration Start
Keeping L1SubStates enable by default for RpIndex 0
CpuPcieEnableClkReqMsg Start
Configure CLKREQ# GPIO
Program the registers in CPU Root port
CpuPcieProgramClkReqMsgProtocolReg Start
CpuPcieProgramClkReqMsgProtocolReg End
PchEnableCpuPciePortClkReqMapping Entry
PchFiaEnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Exit
PchFiaEnableCpuPciePortClkReq Exit
PchEnableCpuPciePortClkReqMapping Exit
CpuPcieEnableClkReqMsg End
CPU PCIE Clock Req configuration End
Before PchFiaSetClockOutputDelay!!!
**** BDF = 060 ****
Set Slot Implemented Bit
Set TLS to gen1
Set speed capability in rootport 0
PcieSpeed from policy = 0
ElasticBufferProgramming StartElasticBufferProgramming EndRetrain link by clearing BLKDQDASD
PdsEnabledMask= 1
Target link speed = 1
Current link speed = 1
Negotiated link Width = 4
Program the CLKREQ ASSERT pin
CpuPcieSetAssertClkReq Start
CpuPcieSetAssertClkReq End
ClkReqAssertedMask = 0
CpuPciePollClkReqMsgSts StatusBit = 0
CpuPciePollClkReqMsgSts failed, so Disable CLKREQ# messaging
CpuPcieDisableClkReqMsg Start
Disable the CLKREQ# Messaging based on the polling
L1SubStates should not be enabled if CLKREQ# messaging is not enabled
Disable CLKREQ# messaging in Cpu Pcie RP
CpuPcieDisableClkReqMessaging Start
CpuPcieDisableClkReqMessaging End
CpuPcieDisableClkReqMsg End
**** Premem PciExpressInit End ****
Initializing DMI Tc/Vc mapping
POSTCODE=<0000DA40>
DmiBar + R_PCIE_PVCCR1 = 0
TC:0 VC:0!
TC:1 VC:1!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:7 VC:2!
VC:0 VCID:0 Enable:1!
VC:1 VCID:1 Enable:1!
VC:2 VCID:7 Enable:1!
Create Graphics Data Hob
GfxDataHob->EfiHobGuidType.Name: 48E6E20A-9110-4332-8C9F-5F7CAE76FCF3
GfxDataHob @ FEF55B50
GfxDataHobSize - HobHeader: 10
GfxDataHobSize: 28
GfxDataHob->PrimaryDisplayDetection: 0
GfxDataHob->ExternalGfxScanEnable: 0
Gfx HOBs installed
Graphics detection
Initializing Graphics
POSTCODE=<0000DA45>
iGFX initialization start
GTBaseAddress 0XAF000000:
IGD enabled.
Update CONFIG0 Address D00 : 10
Configuring iTouch Source Registers Doorbell and GSA_Touch
iGFX initialization end
Initializing Pre-Memory Display
POSTCODE=<0000DA0B>
DisplayNativeGpioInit: Begin
DisplayNativeGpioInit: End
ProgramDisplayWorkaround: Begin
POSTCODE=<0000DA48>
Initializing DpIn PreMem Config.
[DpIn] DpInPreMemInit() - Start
Dp-In External Gfx Card Support = 0 From DpIn PreMemConfigBlock
Initializing CPU specific PreMem Pei Config in Pre-Mem
GetDpInPrivateCpuData - Dp-In not Supported by Silicon. Max DP-In Port Support = 0x0
Initializing Dp-In Config Policy
[DPIN] DpInPostGfxInit() - Start
[DPIN] DpInPostGfxInit() - End
POSTCODE=<0000DA49>
[TCSS] TcssPreMemInit() - Start
Install TCSS DATA HOB
TcssHob->EfiHobGuidType.Name: 455702CE-4ADB-45D9-8B27-F7B0D9798AE0
TcssHob @ FEF55B78
&(TcssHob->TcssData) @ FEF55B90
TcssHob - HobHeader: 6E
TcssData: 32
Install TCSS SSID DATA HOB
TcssSsidHob->EfiHobGuidType.Name: 8903D47A-8F82-4063-A840-31689C9E7820
TcssSsidHob @ FEF55C00
&(TcssHob->TcssSsidTable) @ FEF55C18
TcssSsidHob->NumberOfTcssSsidTable: 8
[TCSS] TcssDevEnInitPreMem - Start
TCSS DEVEN = 0x00000300
IOM mailbox data = 0x00000300
IOM mailbox command = 0x00000001
[TCSS] Updated TCSS_DEVEN to TCSS HOB
[TCSS] TcssDevEnInitPreMem - End
[TCSS] TcssPreMemInit() - End
POSTCODE=<0000DA50>
[TCSS] UpdateDpinToHob Entry
[TCSS] UpdateDpinToHob End
Initializing Vtd
POSTCODE=<0000DA51>
Install VTD DATA HOB
VtdDataHob->EfiHobGuidType.Name: 1D60DCE8-503A-44A8-B32D-56B388F34C55
VtdDataHob @ FEF55C20
VtdDataHobSize - HobHeader: 24
VtdDataHobSize: 3C
VTd enabled
IgdIommuOverride start
Before Override: EcapReg=69E2FF0505E
After Override: EcapReg=29A00F0505E
Initializing System Agent Overclocking
POSTCODE=<0000DA52>
SaOcInit Start
(OC) Overclocking is disabled. Bypassing SA overclocking flow.
Configuring Telemetry CPU CrashLog Device with DEVEN 0x2F091
TotalMmioLength: 0x00000000 bytes
[InstallMrcCallback] MRC Entry...
[InstallMrcCallback] Register PeiMasterBootModePpi Notify Status = Success
Register PPI Notify: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Notify: PPI Guid: 7408D748-FC8C-4EE6-9288-C4BEC092A410, Peim notify entry point: FFE483A5
[PrememoryInitCallBack]
[PeimMemoryInit]
Post Code: DD00h
Processor supports TXT
Platform / PCH supports TXT
TigerLake ULT: Stepping B0
Microcode Update: 0x000000AC
System boot mode: 0h - BOOT_WITH_FULL_CONFIGURATION
Restore data of size 0 from 0x0
Global data of size 132013 is at 0xFEF1A134
MiscPeiPreMemConfig->S3DataPtr: 0 check completed, SysBootMode: 0
Calling CpuReplacementCheck
Skip CPU replacement check by policy
ForceFullTraining 0
Cold boot
(MAILBOX) Mailbox Read Command = 341h
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BIOS_CMD_MRC_CONFIG scesfie. MailboxStatus = 0h, MailboxData = 17Ch
TXTPEI: TXT.E2STS=4
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Spd Address for Mc 0 Channel 0 Dimm 0: 0
Spd Address for Mc 0 Channel 0 Dimm 1: 0
Spd Address for Mc 0 Channel 1 Dimm 0: 0
Spd Address for Mc 0 Channel 1 Dimm 1: 0
Spd Address for Mc 0 Channel 2 Dimm 0: 0
Spd Address for Mc 0 Channel 2 Dimm 1: 0
Spd Address for Mc 0 Channel 3 Dimm 0: 0
Spd Address for Mc 0 Channel 3 Dimm 1: 0
Spd Address for Mc 1 Channel 0 Dimm 0: 0
Spd Address for Mc 1 Channel 0 Dimm 1: 0
Spd Address for Mc 1 Channel 1 Dimm 0: 0
Spd Address for Mc 1 Channel 1 Dimm 1: 0
Spd Address for Mc 1 Channel 2 Dimm 0: 0
Spd Address for Mc 1 Channel 2 Dimm 1: 0
Spd Address for Mc 1 Channel 3 Dimm 0: 0
Spd Address for Mc 1 Channel 3 Dimm 1: 0
IMR Configuration start
ME status: 0x80000015
IPU Fused off
BiosImrDisableMask0 = FFFFBBDF
PCIe IMR Size = 0
Heci Get IMR Size Msg
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80100007
00: F0 0C 00 00 DF BB FF FF - FF FF FF FF 00 00 00 00
[HECI1] Got msg Success: 80100007
00: F0 8C 00 00 00 00 0C 02 - 00 00 00 01 00 00 00 00
Heci Get IMR Size Msg successful. Response:
IMR Size = 0x020C0000
Largest IMR Size = 0x01000000
Flags = 0x00000000
POSTCODE=<0000D000> - Heci Get IMR Size Msg
Requested CSE IMR size = 34340864 Bytes
Largest CSE IMR size = 16777216 Bytes
Requested CSE IMR size (rounded up) = 64 MB
Largest CSE IMR size = 16 MB
MRC Start Memory Configuration
@@@@ Inputs->MemoryProfile:0
*********************************************************************
** Copyright (c) 2011- 2020 Intel Corporation. All rights reserved. **
** Tigerlake memory detection and initialization code. **
** Major version number is: 2 **
** Minor version number is: 0 **
** Rev version number is: 2 **
** Build number is: 10 **
*********************************************************************
BootMode == bmCold
SAGV: Disabled, running at point 3
Post Code: DD03h
MRC task -- MRC Early Overrides -- Started.
MRC task MRC Early Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD02h
MRC task -- Safe Mode Override -- Started.
MRC task Safe Mode Override -- SUCCEEDED, Status = 0h.
Post Code: DD1Dh
MRC task -- Print input parameters -- Started.
Debug.Stream: FEF3E99Ch
Debug.Level: 3h
FreqMax: 0
GearRatio: 0
Ratio: 0
RefClk: 133MHz
BClk: 100000000Hz
MemoryProfile: 0
RealtimeMemoryOC: 0
OcSupport: disabled
OverrideDowngradeForMixedMemory: disabled
BoardType: 5
CmdRanksTerminated: 1h
DqPinsInterleaved: 0
SeparateCkeDelayDdr4: 1
CpuModel: 806C0h
CpuStepping: 1h
GraphicsStolenSize: 3Ch
GraphicsGttSize: 8h
Iteration: 0h
VddVoltage: 0 mV
BootMode: 0h
TxtFlag: 0h
SimicsFlag: 0h
MobilePlatform: 1h
EccSupport: 1h
CleanMemory: 0x0
Ibecc: 0h
IbeccOperationMode: 0x2
IbeccParity: 0x1
McParity: 1h
GfxIsVersatileAcceleration: 0h
ScramblerSupport: 0h
LpFreqSwitch: 1h
MemSSFusa: 0h
RemapEnable: 1h
PowerDownMode: 0h
PwdwnIdleCounter: 0h
DisPgCloseIdleTimeout: 0h
RankInterleave: 1h
EnhancedInterleave: 1h
WeaklockEn: 0h
EnCmdRate: 7h
BaseAddresses
PciE: C0000000h
MchBar: FEDC0000h
Smbus: EFA0h
MeStolenSize: 40h
MmioSize: 800h
TsegSize: 8h
DprSize: 0h
PrmrrSize: 0h
TccMemAddress: 40080000h
TccMemSize: 0h
VddSettleWaitTime: 0h
VccIomV: 950
RmtPerTask: 0
TrainTrace: 0
MarginLimitCheck: 0
MarginLimitL2: 100
AutoSelfRefreshSupport: 1
ExtTemperatureSupport: 1
RhPrevention: 0
RhSolution: 0
RhRefreshSolution: 2
RefreshWm: 1h
RefreshPanicWm: 8h
RefreshHpWm: 7h
LctCmdEyeWidth: 96
RetrainOnFastFail: 1
LpDdrDqDqsReTraining (LpDqsOscEn) : 0h
NewFeatureEnable1: 0
NewFeatureEnable2: 0
MrcSafeConfig: 1h
SafeMode: 1h
VddqVoltageOverride(# of 1mV): 0
ChHashOverride: 0h
ChHashEnable: 1h
ChHashMask: 30CCh
ChHashInterleaveBit: 2h
ExtendedBankHashing: 1h
PerBankRefresh: 1h
ProbelessTrace: 0
Force1Dpc: 0
ForceSingleRank: 0
VttCompForVsshi: 1
Lp5CccConfig: 0x0
CmdMirror: 0x0
Ddr4OneDpc: 0
RxMode: 255
PowerTrainingMode: margin optimization
BdatEnable: 0
BdatTestType: 0
Lp5CccConfig: 0h
*************************************
***** MRC TRAINING STEPS *****
*************************************
TrainingSteps: 0x24FC073B TrainingSteps2: 0xC002
TrainingEnables.SOT: 1
TrainingEnables.ERDMPRTC2D: 0
TrainingEnables.ECT: 1
TrainingEnables.PDA: 1
TrainingEnables.RCVET: 1
TrainingEnables.RDMPRT: 1
TrainingEnables.JWRL: 1
TrainingEnables.EWRTC2D: 0
TrainingEnables.ERDTC2D: 0
TrainingEnables.WRTC1D: 1
TrainingEnables.WRVC1D: 1
TrainingEnables.RDTC1D: 1
DDR4MAP: 0
TrainingEnables2.DIMMODTCAT: 0
TrainingEnables.DIMMODTT: 0
TrainingEnables.DIMMRONT: 0
TrainingEnables.WRDSEQT: 0
TrainingEnables.WRDSUDT: 0
TrainingEnables.WRSRT: 0
TrainingEnables.RDODTT: 0
TrainingEnables.RDEQT: 0
TrainingEnables.RDAPT: 0
TrainingEnables.CMDVC: 1
TrainingEnables.WRTC2D: 1
TrainingEnables.RDTC2D: 1
TrainingEnables.WRVC2D: 1
TrainingEnables.RDVC2D: 1
TrainingEnables.LCT: 1
TrainingEnables.RTL: 0
TrainingEnables.TAT: 0
TrainingEnables.RMT: 1
TrainingEnables.MEMTST: 0
TrainingEnables.ALIASCHK: 0
TrainingEnables.RCVENC1D: 1
TrainingEnables.RMC: 0
TrainingEnables2.DCC: 0
TrainingEnables2.RDVC1D: 1
TrainingEnables2.TXTCO: 0
TrainingEnables2.CLKTCO: 0
TrainingEnables2.CMDSR: 0
TrainingEnables2.CMDDSEQ: 0
TrainingEnables2.DIMMODTCA: 0
TrainingEnables2.TXTCODQS: 0
TrainingEnables2.CMDDRUD: 0
TrainingEnables2.VCCDLLBP: 0
TrainingEnables2.PVTTDNLP: 0
TrainingEnables2.RDVREFDC: 0
TrainingEnables2.VDDQT: 0
TrainingEnables2.RMTBIT: 0
TrainingEnables2.WRITE0: 1
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
*************************************
***** MRC TIMING DATA *****
*************************************
Controller[0] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 0/0/0 Status: 0h
Controller, Channel, Dimm 0/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/0/1 Status: 0h
Controller, Channel, Dimm 0/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 0/1/0 Status: 0h
Controller, Channel, Dimm 0/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/1/1 Status: 0h
Controller, Channel, Dimm 0/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 0/2/0 Status: 0h
Controller, Channel, Dimm 0/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/2/1 Status: 0h
Controller, Channel, Dimm 0/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 0/3/0 Status: 0h
Controller, Channel, Dimm 0/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/3/1 Status: 0h
Controller, Channel, Dimm 0/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller[1] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 1/0/0 Status: 0h
Controller, Channel, Dimm 1/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/0/1 Status: 0h
Controller, Channel, Dimm 1/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 1/1/0 Status: 0h
Controller, Channel, Dimm 1/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/1/1 Status: 0h
Controller, Channel, Dimm 1/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 1/2/0 Status: 0h
Controller, Channel, Dimm 1/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/2/1 Status: 0h
Controller, Channel, Dimm 1/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 1/3/0 Status: 0h
Controller, Channel, Dimm 1/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/3/1 Status: 0h
Controller, Channel, Dimm 1/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
*************************************
***** THERMAL OVERWRITE *******
*************************************
ThermalEnables.EnablePwrDn : 1h
ThermalEnables.EnablePwrDnLpddr: 1h
ThermalEnables.Refresh2X : 0h
SrefCfgEna : 1h
SrefCfgIdleTmr : 200h
ThrtCkeMinDefeat: 1h
ThrtCkeMinTmr : 0h
ThrtCkeMinDefeatLpddr: 1h
ThrtCkeMinTmrLpddr : 0h
*************************************
***** DQDQS SWIZZLING *******
*************************************
Mc0.Ch0: 0 1 DqMapCpu2Dram: 0 1 6 7 3 2 5 4 15 8 9 14 12 11 10 13
Mc0.Ch1: 1 0 DqMapCpu2Dram: 11 12 8 15 9 14 10 13 3 4 7 0 6 1 5 2
Mc0.Ch2: 0 1 DqMapCpu2Dram: 4 5 3 2 7 1 0 6 11 10 12 13 8 9 14 15
Mc0.Ch3: 1 0 DqMapCpu2Dram: 12 11 8 13 14 15 9 10 4 7 3 2 1 6 0 5
Mc1.Ch0: 1 0 DqMapCpu2Dram: 11 10 9 8 12 13 15 14 4 5 6 7 3 2 0 1
Mc1.Ch1: 0 1 DqMapCpu2Dram: 0 7 1 6 3 5 2 4 9 8 10 11 14 15 13 12
Mc1.Ch2: 0 1 DqMapCpu2Dram: 4 5 6 1 3 2 7 0 10 13 12 11 14 9 15 8
Mc1.Ch3: 1 0 DqMapCpu2Dram: 10 12 9 15 8 11 13 14 3 4 1 2 6 0 5 7
RcompResistor: 0
RcompTarget[RdOdt]: 0
RcompTarget[WrDS]: 0
RcompTarget[WrDSCmd]: 0
RcompTarget[WrDSCtl]: 0
RcompTarget[WrDSClk]: 0
MRC task Print input parameters -- SUCCEEDED, Status = 0h. Stack Depth: 149824
Post Code: DD20h
MRC task -- SPD PROCESSING -- Started.
SPD Dimm recognition, Controller, Channel, Dimm 0/0/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/1/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/2/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/3/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/0/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/1/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/2/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/3/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
CAPID0_A: F0006410h
CAPID0_B: 90240008h
CAPID0_C: 0661820Ah
CAPID0_E: 001F8000h
DMFC: 4267
Max_Data_Rate_At_GEAR1: 2667
DDR_OVERCLOCK: 0, PLL_REF100_CFG: 1
MrcMcCapabilityPreSpd Inputs->RefClk = 0
MrcMcCapabilityPreSpd Outputs->RefClk = 0
HighGear 1
Gear2Ever 0
Outputs->MemoryClockMax: 750000, Outputs->FreqMax : 2667, Gear1
The maximum memory frequency allowed is 2667, tCK=750000fs
133MHz reference clock is selected
SPD Dimm timing calculation
Timebase (MTB/FTB):
Profile Controller Channel Dimm Value
0 0 0 0 125000 1000
0 0 1 0 125000 1000
0 0 2 0 125000 1000
0 0 3 0 125000 1000
0 1 0 0 125000 1000
0 1 1 0 125000 1000
0 1 2 0 125000 1000
0 1 3 0 125000 1000
1 0 0 0 125000 1000
1 0 1 0 125000 1000
1 0 2 0 125000 1000
1 0 3 0 125000 1000
1 1 0 0 125000 1000
1 1 1 0 125000 1000
1 1 2 0 125000 1000
1 1 3 0 125000 1000
SDRAM Cycle Time (tCKmin):
Profile Controller Channel Dimm Value (fs)
0 0 0 0 750000
0 0 1 0 750000
0 0 2 0 750000
0 0 3 0 750000
0 1 0 0 750000
0 1 1 0 750000
0 1 2 0 750000
0 1 3 0 750000
1 0 0 0 750000
1 0 1 0 750000
1 0 2 0 750000
1 0 3 0 750000
1 1 0 0 750000
1 1 1 0 750000
1 1 2 0 750000
1 1 3 0 750000
Best case value for profiles 0-3: 750000 750000
CAS Latency Time (tAAmin):
Profile Controller Channel Dimm Value tCL Mask
0 0 0 0 24 5592h
0 0 1 0 24 5592h
0 0 2 0 24 5592h
0 0 3 0 24 5592h
0 1 0 0 24 5592h
0 1 1 0 24 5592h
0 1 2 0 24 5592h
0 1 3 0 24 5592h
Profile 0 common set of supported CAS Latency values = 5592h
1 0 0 0 24 5592h
1 0 1 0 24 5592h
1 0 2 0 24 5592h
1 0 3 0 24 5592h
1 1 0 0 24 5592h
1 1 1 0 24 5592h
1 1 2 0 24 5592h
1 1 3 0 24 5592h
Profile 1 common set of supported CAS Latency values = 5592h
Best case value for profiles 0-3: 24 24
Memory clock = 750000fs
Memory Frequency = 2667
CAS Write Latency (tCWLmin):
Profile Controller Channel Dimm Value
0 0 0 0 23
0 0 1 0 23
0 0 2 0 23
0 0 3 0 23
0 1 0 0 23
0 1 1 0 23
0 1 2 0 23
0 1 3 0 23
1 0 0 0 23
1 0 1 0 23
1 0 2 0 23
1 0 3 0 23
1 1 0 0 23
1 1 1 0 23
1 1 2 0 23
1 1 3 0 23
Best case value for profiles 0-3: 23 23
Active to precharge delay time (tRASmin):
Profile Controller Channel Dimm Value
0 0 0 0 56
0 0 1 0 56
0 0 2 0 56
0 0 3 0 56
0 1 0 0 56
0 1 1 0 56
0 1 2 0 56
0 1 3 0 56
1 0 0 0 56
1 0 1 0 56
1 0 2 0 56
1 0 3 0 56
1 1 0 0 56
1 1 1 0 56
1 1 2 0 56
1 1 3 0 56
Best case value for profiles 0-3: 56 56
RAS# to CAS# delay time (tRCDmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Active to active/refresh delay time (tRCmin):
Profile Controller Channel Dimm Value
0 0 0 0 80
0 0 1 0 80
0 0 2 0 80
0 0 3 0 80
0 1 0 0 80
0 1 1 0 80
0 1 2 0 80
0 1 3 0 80
1 0 0 0 80
1 0 1 0 80
1 0 2 0 80
1 0 3 0 80
1 1 0 0 80
1 1 1 0 80
1 1 2 0 80
1 1 3 0 80
Best case value for profiles 0-3: 80 80
Average Periodic Refresh Interval (tREFImin):
Profile Controller Channel Dimm Value
0 0 0 0 5206
0 0 1 0 5206
0 0 2 0 5206
0 0 3 0 5206
0 1 0 0 5206
0 1 1 0 5206
0 1 2 0 5206
0 1 3 0 5206
1 0 0 0 5206
1 0 1 0 5206
1 0 2 0 5206
1 0 3 0 5206
1 1 0 0 5206
1 1 1 0 5206
1 1 2 0 5206
1 1 3 0 5206
Best case value for profiles 0-3: 5206 5206
Refresh recovery delay time (tRFCmin):
Profile Controller Channel Dimm Value
0 0 0 0 280
0 0 1 0 280
0 0 2 0 280
0 0 3 0 280
0 1 0 0 280
0 1 1 0 280
0 1 2 0 280
0 1 3 0 280
1 0 0 0 280
1 0 1 0 280
1 0 2 0 280
1 0 3 0 280
1 1 0 0 280
1 1 1 0 280
1 1 2 0 280
1 1 3 0 280
Best case value for profiles 0-3: 280 280
Per Bank refresh recovery delay time (tRFCpb):
Profile Controller Channel Dimm Value
0 0 0 0 120
0 0 1 0 120
0 0 2 0 120
0 0 3 0 120
0 1 0 0 120
0 1 1 0 120
0 1 2 0 120
0 1 3 0 120
1 0 0 0 120
1 0 1 0 120
1 0 2 0 120
1 0 3 0 120
1 1 0 0 120
1 1 1 0 120
1 1 2 0 120
1 1 3 0 120
Best case value for profiles 0-3: 120 120
Row precharge delay time (tRPmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Row precharge delay time for all banks (tRPab):
Profile Controller Channel Dimm Value
0 0 0 0 28
Best case value for profiles 0-3: 28 28
Active to active/refresh delay time (tFAWmin):
Profile Controller Channel Dimm Value
0 0 0 0 54
0 0 1 0 54
0 0 2 0 54
0 0 3 0 54
0 1 0 0 54
0 1 1 0 54
0 1 2 0 54
0 1 3 0 54
1 0 0 0 54
1 0 1 0 54
1 0 2 0 54
1 0 3 0 54
1 1 0 0 54
1 1 1 0 54
1 1 2 0 54
1 1 3 0 54
Best case value for profiles 0-3: 54 54
Row active to row active delay time (tRRDmin):
Profile Controller Channel Dimm Value
0 0 0 0 14
0 0 1 0 14
0 0 2 0 14
0 0 3 0 14
0 1 0 0 14
0 1 1 0 14
0 1 2 0 14
0 1 3 0 14
1 0 0 0 14
1 0 1 0 14
1 0 2 0 14
1 0 3 0 14
1 1 0 0 14
1 1 1 0 14
1 1 2 0 14
1 1 3 0 14
Best case value for profiles 0-3: 14 14
Internal read to precharge delay time (tRTPmin):
Profile Controller Channel Dimm Value
0 0 0 0 10
0 0 1 0 10
0 0 2 0 10
0 0 3 0 10
0 1 0 0 10
0 1 1 0 10
0 1 2 0 10
0 1 3 0 10
1 0 0 0 10
1 0 1 0 10
1 0 2 0 10
1 0 3 0 10
1 1 0 0 10
1 1 1 0 10
1 1 2 0 10
1 1 3 0 10
Best case value for profiles 0-3: 10 10
Write recovery time (tWRmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Internal write to read command delay time (tWTRmin):
Profile Controller Channel Dimm Value
0 0 0 0 14
0 0 1 0 14
0 0 2 0 14
0 0 3 0 14
0 1 0 0 14
0 1 1 0 14
0 1 2 0 14
0 1 3 0 14
1 0 0 0 14
1 0 1 0 14
1 0 2 0 14
1 0 3 0 14
1 1 0 0 14
1 1 1 0 14
1 1 2 0 14
1 1 3 0 14
Best case value for profiles 0-3: 14 14
Refresh recovery delay time (tRFC2min):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Refresh recovery delay time (tRFC4min):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Row active to row active delay time (tRRD_Lmin):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Row active to row active delay time (tRRD_Smin):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Internal write to read command delay time (tWTR_L):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Internal write to read command delay time (tWTR_S):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
CAS to CAS delay for same bank group (tCCD_L):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Command rate mode (Nmode):
Profile Controller Channel Dimm Value
0 0 0 0 1
0 0 1 0 1
0 0 2 0 1
0 0 3 0 1
0 1 0 0 1
0 1 1 0 1
0 1 2 0 1
0 1 3 0 1
1 0 0 0 1
1 0 1 0 1
1 0 2 0 1
1 0 3 0 1
1 1 0 0 1
1 1 1 0 1
1 1 2 0 1
1 1 3 0 1
Best case value for profiles 0-3: 1 1
Module voltage VDD (mVolts):
Profile Controller Channel Dimm Value
0 0 0 0 1100
0 0 1 0 1100
0 0 2 0 1100
0 0 3 0 1100
0 1 0 0 1100
0 1 1 0 1100
0 1 2 0 1100
0 1 3 0 1100
1 0 0 0 1100
1 0 1 0 1100
1 0 2 0 1100
1 0 3 0 1100
1 1 0 0 1100
1 1 1 0 1100
1 1 2 0 1100
1 1 3 0 1100
Best case value for profiles 0-3: 1100 1100
MRC task SPD PROCESSING -- SUCCEEDED, Status = 0h. Stack Depth: 149940
Post Code: DD21h
MRC task -- MRC Auto Updates and Overrides -- Started.
LPDDR Low Frequency: 1067
RxMode: Unmatched w/ Rload DQS
LowFrequency: 1067
Updating Rcomp Resistors: 100
Updating Rcomp Targets:
RcompTarget[RdOdt]: 80
RcompTarget[WrDS]: 40
RcompTarget[WrDSCmd]: 40
RcompTarget[WrDSCtl]: 40
RcompTarget[WrDSClk]: 30
DDRIO ODT Mode: Vss
MRC task MRC Auto Updates and Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD22h
MRC task -- MC Capabilities -- Started.
Memory allocated for IGD = 60MB and for GTT = 8MB.
Maximum size of memory allowed on a channel = 65536MB.
Number of channels supported = 4
Number of DIMMs per channel supported = 1
Controller, Channel, Dimm 0/0/0 NMode = 1
Controller, Channel, Dimm 0/1/0 NMode = 1
Controller, Channel, Dimm 0/2/0 NMode = 1
Controller, Channel, Dimm 0/3/0 NMode = 1
Controller, Channel, Dimm 1/0/0 NMode = 1
Controller, Channel, Dimm 1/1/0 NMode = 1
Controller, Channel, Dimm 1/2/0 NMode = 1
Controller, Channel, Dimm 1/3/0 NMode = 1
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
MRC task MC Capabilities -- SUCCEEDED, Status = 0h.
Post Code: DD11h
MRC task -- MC Frequency Lock -- Started.
(MAILBOX) Mailbox Read Command = 33Fh
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BCLK_CONFIG_GET_SSC_CONTROL_SUBCOMMAND success. MailboxStatus = 0h
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
W GsmIocScramLpMode: 1
MRC task MC Frequency Lock -- SUCCEEDED, Status = 0h. Stack Depth: 150088
Post Code: DD15h
MRC task -- Memory SubSystem Config -- Started.
W .B0 GsmCmiLsbMaskBit: 8336 (0x2090)
W .B0 GsmCmiHashMode: 2
Controller HASH Enabled
W .B0 EndOfCmiMarker: 0
W .B0 EndOfCmiMarker: 0
Interleaved Memory between controllers 32768 Megabytes
Updating the registers for CMF0
W .B0 GsmCmiStackedMode: 1
W .B0 GsmCmiStackMsMap: 0
W .B0 GsmCmiLMadSliceMap: 0
W .B0 GsmCmiSliceDisable: 0
W .B0 GsmCmiStackedMsHash: 32 (0x20)
W .B0 GsmCmiSMadSliceSize: 0
MRC task Memory SubSystem Config -- SUCCEEDED, Status = 0h. Stack Depth: 150416
Post Code: DD09h
MRC task -- DDRIO Config - Pre DCC -- Started.
W GsmIocScramDdr4Mode: 1
W GsmIocScramLp5Mode: 1
W GsmIocDisIosfSbClkGate: 0
MRC task DDRIO Config - Pre DCC -- SUCCEEDED, Status = 0h.
Post Code: DD23h
MRC task -- MC Config -- Started.
Timing Config
W Mc0.C0 GsmMctRP: 24 (0x18)
W Mc0.C0 GsmMctRPabExt: 24 (0x18)
W Mc0.C0 GsmMctRAS: 4
W Mc0.C0 GsmMctRDPRE: 56 (0x38)
W Mc0.C0 GsmMctPPD: 18 (0x12)
W Mc0.C0 GsmMctFAW: 63 (0x3F)
W Mc0.C0 GsmMctRRDsg: 54 (0x36)
W Mc0.C0 GsmMctRRDdg: 14 (0xE)
W Mc0.C0 GsmMctREFSbRd: 14 (0xE)
W Mc0.C0 GsmMctRDRDsg: 3
W Mc0.C0 GsmMctOdtRdDelay: 0
W Mc0.C0 GsmMctOdtWrDuration: 0
W Mc0.C0 GsmMctOdtWrDelay: 0
W Mc0.C0 GsmMctWrEarlyOdt: 0
W Mc0.C0 GsmMctCL: 0
W Mc0.C0 GsmMctCWL: 24 (0x18)
W Mc0.C0 GsmMctAONPD: 22 (0x16)
W Mc0.C0 GsmMctCWLAdd: 0
W Mc0.C0 GsmMctWRPRE: 4
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdd: 33 (0x21)
W Mc0.C0 GsmMctRDWRsg: 34 (0x22)
W Mc0.C0 GsmMctRDWRdg: 41 (0x29)
W Mc0.C0 GsmMctRDWRdr: 41 (0x29)
W Mc0.C0 GsmMctRDWRdd: 41 (0x29)
W Mc0.C0 GsmMctWRRDsg: 42 (0x2A)
W Mc0.C0 GsmMctWRRDdg: 64 (0x40)
W Mc0.C0 GsmMctWRRDdr: 64 (0x40)
W Mc0.C0 GsmMctWRRDdd: 32 (0x20)
W Mc0.C0 GsmMctWRWRsg: 32 (0x20)
W Mc0.C0 GsmMctWRWRdg: 26 (0x1A)
W Mc0.C0 GsmMctWRWRdr: 26 (0x1A)
W Mc0.C0 GsmMctWRWRdd: 35 (0x23)
W Mc0.C0 GsmMctCKE: 35 (0x23)
W Mc0.C0 GsmMctXP: 10 (0xA)
W Mc0.C0 GsmMctXPDLL: 10 (0xA)
W Mc0.C0 GsmMctRDPDEN: 5
W Mc0.C0 GsmMctWRPDEN: 46 (0x2E)
W Mc0.C0 GsmMctCA2CS: 66 (0x42)
W Mc0.C0 GsmMctPRPDEN: 10 (0xA)
W Mc0.C1 GsmMctRP: 24 (0x18)
W Mc0.C1 GsmMctRPabExt: 24 (0x18)
W Mc0.C1 GsmMctRAS: 4
W Mc0.C1 GsmMctRDPRE: 56 (0x38)
W Mc0.C1 GsmMctPPD: 18 (0x12)
W Mc0.C1 GsmMctFAW: 63 (0x3F)
W Mc0.C1 GsmMctRRDsg: 54 (0x36)
W Mc0.C1 GsmMctRRDdg: 14 (0xE)
W Mc0.C1 GsmMctREFSbRd: 14 (0xE)
W Mc0.C1 GsmMctRDRDsg: 3
W Mc0.C1 GsmMctOdtRdDelay: 0
W Mc0.C1 GsmMctOdtWrDuration: 0
W Mc0.C1 GsmMctOdtWrDelay: 0
W Mc0.C1 GsmMctWrEarlyOdt: 0
W Mc0.C1 GsmMctCL: 0
W Mc0.C1 GsmMctCWL: 24 (0x18)
W Mc0.C1 GsmMctAONPD: 22 (0x16)
W Mc0.C1 GsmMctCWLAdd: 0
W Mc0.C1 GsmMctWRPRE: 4
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdd: 33 (0x21)
W Mc0.C1 GsmMctRDWRsg: 34 (0x22)
W Mc0.C1 GsmMctRDWRdg: 41 (0x29)
W Mc0.C1 GsmMctRDWRdr: 41 (0x29)
W Mc0.C1 GsmMctRDWRdd: 41 (0x29)
W Mc0.C1 GsmMctWRRDsg: 42 (0x2A)
W Mc0.C1 GsmMctWRRDdg: 64 (0x40)
W Mc0.C1 GsmMctWRRDdr: 64 (0x40)
W Mc0.C1 GsmMctWRRDdd: 32 (0x20)
W Mc0.C1 GsmMctWRWRsg: 32 (0x20)
W Mc0.C1 GsmMctWRWRdg: 26 (0x1A)
W Mc0.C1 GsmMctWRWRdr: 26 (0x1A)
W Mc0.C1 GsmMctWRWRdd: 35 (0x23)
W Mc0.C1 GsmMctCKE: 35 (0x23)
W Mc0.C1 GsmMctXP: 10 (0xA)
W Mc0.C1 GsmMctXPDLL: 10 (0xA)
W Mc0.C1 GsmMctRDPDEN: 5
W Mc0.C1 GsmMctWRPDEN: 46 (0x2E)
W Mc0.C1 GsmMctCA2CS: 66 (0x42)
W Mc0.C1 GsmMctPRPDEN: 10 (0xA)
W Mc1.C0 GsmMctRP: 24 (0x18)
W Mc1.C0 GsmMctRPabExt: 24 (0x18)
W Mc1.C0 GsmMctRAS: 4
W Mc1.C0 GsmMctRDPRE: 56 (0x38)
W Mc1.C0 GsmMctPPD: 18 (0x12)
W Mc1.C0 GsmMctFAW: 63 (0x3F)
W Mc1.C0 GsmMctRRDsg: 54 (0x36)
W Mc1.C0 GsmMctRRDdg: 14 (0xE)
W Mc1.C0 GsmMctREFSbRd: 14 (0xE)
W Mc1.C0 GsmMctRDRDsg: 3
W Mc1.C0 GsmMctOdtRdDelay: 0
W Mc1.C0 GsmMctOdtWrDuration: 0
W Mc1.C0 GsmMctOdtWrDelay: 0
W Mc1.C0 GsmMctWrEarlyOdt: 0
W Mc1.C0 GsmMctCL: 0
W Mc1.C0 GsmMctCWL: 24 (0x18)
W Mc1.C0 GsmMctAONPD: 22 (0x16)
W Mc1.C0 GsmMctCWLAdd: 0
W Mc1.C0 GsmMctWRPRE: 4
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdd: 33 (0x21)
W Mc1.C0 GsmMctRDWRsg: 34 (0x22)
W Mc1.C0 GsmMctRDWRdg: 41 (0x29)
W Mc1.C0 GsmMctRDWRdr: 41 (0x29)
W Mc1.C0 GsmMctRDWRdd: 41 (0x29)
W Mc1.C0 GsmMctWRRDsg: 42 (0x2A)
W Mc1.C0 GsmMctWRRDdg: 64 (0x40)
W Mc1.C0 GsmMctWRRDdr: 64 (0x40)
W Mc1.C0 GsmMctWRRDdd: 32 (0x20)
W Mc1.C0 GsmMctWRWRsg: 32 (0x20)
W Mc1.C0 GsmMctWRWRdg: 26 (0x1A)
W Mc1.C0 GsmMctWRWRdr: 26 (0x1A)
W Mc1.C0 GsmMctWRWRdd: 35 (0x23)
W Mc1.C0 GsmMctCKE: 35 (0x23)
W Mc1.C0 GsmMctXP: 10 (0xA)
W Mc1.C0 GsmMctXPDLL: 10 (0xA)
W Mc1.C0 GsmMctRDPDEN: 5
W Mc1.C0 GsmMctWRPDEN: 46 (0x2E)
W Mc1.C0 GsmMctCA2CS: 66 (0x42)
W Mc1.C0 GsmMctPRPDEN: 10 (0xA)
W Mc1.C1 GsmMctRP: 24 (0x18)
W Mc1.C1 GsmMctRPabExt: 24 (0x18)
W Mc1.C1 GsmMctRAS: 4
W Mc1.C1 GsmMctRDPRE: 56 (0x38)
W Mc1.C1 GsmMctPPD: 18 (0x12)
W Mc1.C1 GsmMctFAW: 63 (0x3F)
W Mc1.C1 GsmMctRRDsg: 54 (0x36)
W Mc1.C1 GsmMctRRDdg: 14 (0xE)
W Mc1.C1 GsmMctREFSbRd: 14 (0xE)
W Mc1.C1 GsmMctRDRDsg: 3
W Mc1.C1 GsmMctOdtRdDelay: 0
W Mc1.C1 GsmMctOdtWrDuration: 0
W Mc1.C1 GsmMctOdtWrDelay: 0
W Mc1.C1 GsmMctWrEarlyOdt: 0
W Mc1.C1 GsmMctCL: 0
W Mc1.C1 GsmMctCWL: 24 (0x18)
W Mc1.C1 GsmMctAONPD: 22 (0x16)
W Mc1.C1 GsmMctCWLAdd: 0
W Mc1.C1 GsmMctWRPRE: 4
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdd: 33 (0x21)
W Mc1.C1 GsmMctRDWRsg: 34 (0x22)
W Mc1.C1 GsmMctRDWRdg: 41 (0x29)
W Mc1.C1 GsmMctRDWRdr: 41 (0x29)
W Mc1.C1 GsmMctRDWRdd: 41 (0x29)
W Mc1.C1 GsmMctWRRDsg: 42 (0x2A)
W Mc1.C1 GsmMctWRRDdg: 64 (0x40)
W Mc1.C1 GsmMctWRRDdr: 64 (0x40)
W Mc1.C1 GsmMctWRRDdd: 32 (0x20)
W Mc1.C1 GsmMctWRWRsg: 32 (0x20)
W Mc1.C1 GsmMctWRWRdg: 26 (0x1A)
W Mc1.C1 GsmMctWRWRdr: 26 (0x1A)
W Mc1.C1 GsmMctWRWRdd: 35 (0x23)
W Mc1.C1 GsmMctCKE: 35 (0x23)
W Mc1.C1 GsmMctXP: 10 (0xA)
W Mc1.C1 GsmMctXPDLL: 10 (0xA)
W Mc1.C1 GsmMctRDPDEN: 5
W Mc1.C1 GsmMctWRPDEN: 46 (0x2E)
W Mc1.C1 GsmMctCA2CS: 66 (0x42)
W Mc1.C1 GsmMctPRPDEN: 10 (0xA)
Refresh Config
W Mc0.C0 GsmMctSRXRefDebits: 45 (0x2D)
W Mc0.C0 GsmMctRefreshHpWm: 64 (0x40)
W Mc0.C0 GsmMctRFC: 5206 (0x1456)
W Mc0.C0 GsmMctOrefRi: 280 (0x118)
W Mc0.C0 GsmMctRefreshPanicWm: 7
W Mc0.C0 GsmMctREFIx9: 8
W Mc0.C0 GsmMccPbrIssueNop: 1
W Mc0.C0 GsmMccOdtOverride: 0
W Mc0.C0 EndOfMctMarker: 120 (0x78)
W Mc0.C0 GsmMctXSR: 290 (0x122)
W Mc0.C0 GsmMctSrIdle: 19 (0x13)
W Mc0.C0 GsmMctMOD: 0
W Mc0.C0 GsmMctSR: 290 (0x122)
W Mc0.C0 GsmMctCPDED: 1334 (0x536)
W Mc0.C0 GsmMctZQCAL: 40 (0x28)
W Mc0.C0 GsmMctZQCS: 256 (0x100)
W Mc0.C0 GsmMccTRefiPulseStaggerDis: 1
W Mc0.C1 GsmMctSRXRefDebits: 45 (0x2D)
W Mc0.C1 GsmMctRefreshHpWm: 64 (0x40)
W Mc0.C1 GsmMctRFC: 5206 (0x1456)
W Mc0.C1 GsmMctOrefRi: 280 (0x118)
W Mc0.C1 GsmMctRefreshPanicWm: 7
W Mc0.C1 GsmMctREFIx9: 8
W Mc0.C1 GsmMccPbrIssueNop: 1
W Mc0.C1 GsmMccOdtOverride: 0
W Mc0.C1 EndOfMctMarker: 120 (0x78)
W Mc0.C1 GsmMctXSR: 290 (0x122)
W Mc0.C1 GsmMctSrIdle: 19 (0x13)
W Mc0.C1 GsmMctMOD: 0
W Mc0.C1 GsmMctSR: 290 (0x122)
W Mc0.C1 GsmMctCPDED: 1334 (0x536)
W Mc0.C1 GsmMctZQCAL: 40 (0x28)
W Mc0.C1 GsmMctZQCS: 256 (0x100)
W Mc0.C1 GsmMccTRefiPulseStaggerDis: 1
W Mc1.C0 GsmMctSRXRefDebits: 45 (0x2D)
W Mc1.C0 GsmMctRefreshHpWm: 64 (0x40)
W Mc1.C0 GsmMctRFC: 5206 (0x1456)
W Mc1.C0 GsmMctOrefRi: 280 (0x118)
W Mc1.C0 GsmMctRefreshPanicWm: 7
W Mc1.C0 GsmMctREFIx9: 8
W Mc1.C0 GsmMccPbrIssueNop: 1
W Mc1.C0 GsmMccOdtOverride: 0
W Mc1.C0 EndOfMctMarker: 120 (0x78)
W Mc1.C0 GsmMctXSR: 290 (0x122)
W Mc1.C0 GsmMctSrIdle: 19 (0x13)
W Mc1.C0 GsmMctMOD: 0
W Mc1.C0 GsmMctSR: 290 (0x122)
W Mc1.C0 GsmMctCPDED: 1334 (0x536)
W Mc1.C0 GsmMctZQCAL: 40 (0x28)
W Mc1.C0 GsmMctZQCS: 256 (0x100)
W Mc1.C0 GsmMccTRefiPulseStaggerDis: 1
W Mc1.C1 GsmMctSRXRefDebits: 45 (0x2D)
W Mc1.C1 GsmMctRefreshHpWm: 64 (0x40)
W Mc1.C1 GsmMctRFC: 5206 (0x1456)
W Mc1.C1 GsmMctOrefRi: 280 (0x118)
W Mc1.C1 GsmMctRefreshPanicWm: 7
W Mc1.C1 GsmMctREFIx9: 8
W Mc1.C1 GsmMccPbrIssueNop: 1
W Mc1.C1 GsmMccOdtOverride: 0
W Mc1.C1 EndOfMctMarker: 120 (0x78)
W Mc1.C1 GsmMctXSR: 290 (0x122)
W Mc1.C1 GsmMctSrIdle: 19 (0x13)
W Mc1.C1 GsmMctMOD: 0
W Mc1.C1 GsmMctSR: 290 (0x122)
W Mc1.C1 GsmMctCPDED: 1334 (0x536)
W Mc1.C1 GsmMctZQCAL: 40 (0x28)
W Mc1.C1 GsmMctZQCS: 256 (0x100)
W Mc1.C1 GsmMccTRefiPulseStaggerDis: 1
Scheduler parameters
SCHED_CBIT = 80001000h
SCHED_SECOND_CBIT = 0E000200h
SC_PCIT = 00000040h
W Mc0.C0 GsmMccCmdTriStateDis: 0
W Mc0.C0 GsmMccGear2: 0
W Mc0.C0 GsmMccDdr4OneDpc: 0
W Mc0.C0 GsmMccAddrMirror: 1
W Mc0.C0 GsmMccCmdStretch: 3
W Mc0.C0 GsmMccCmdGapRatio: 0
W Mc0.C0 GsmMccCmdTriStateDisTrain: 1
W Mc0.C0 GsmMccEnableOdtMatrix: 3
W Mc0.C0 GsmMctCAL: 1
W Mc0.C0 GsmMctCSCKEH: 7
W Mc0.C0 GsmMctRFCpb: 7
W Mc0.C0 GsmMccLpddrPasrRowMsb: 2
W Mc0.C0 EndOfMccMarker: 2
W Mc0.C1 GsmMccCmdTriStateDis: 0
W Mc0.C1 GsmMccGear2: 0
W Mc0.C1 GsmMccDdr4OneDpc: 0
W Mc0.C1 GsmMccAddrMirror: 1
W Mc0.C1 GsmMccCmdStretch: 3
W Mc0.C1 GsmMccCmdGapRatio: 0
W Mc0.C1 GsmMccCmdTriStateDisTrain: 1
W Mc0.C1 GsmMccEnableOdtMatrix: 3
W Mc0.C1 GsmMctCAL: 1
W Mc0.C1 GsmMctCSCKEH: 7
W Mc0.C1 GsmMctRFCpb: 7
W Mc0.C1 GsmMccLpddrPasrRowMsb: 2
W Mc0.C1 EndOfMccMarker: 2
SCHED_CBIT = 80001000h
SCHED_SECOND_CBIT = 0E000200h
SC_PCIT = 00000040h
W Mc1.C0 GsmMccCmdTriStateDis: 0
W Mc1.C0 GsmMccGear2: 0
W Mc1.C0 GsmMccDdr4OneDpc: 0
W Mc1.C0 GsmMccAddrMirror: 1
W Mc1.C0 GsmMccCmdStretch: 3
W Mc1.C0 GsmMccCmdGapRatio: 0
W Mc1.C0 GsmMccCmdTriStateDisTrain: 1
W Mc1.C0 GsmMccEnableOdtMatrix: 3
W Mc1.C0 GsmMctCAL: 1
W Mc1.C0 GsmMctCSCKEH: 7
W Mc1.C0 GsmMctRFCpb: 7
W Mc1.C0 GsmMccLpddrPasrRowMsb: 2
W Mc1.C0 EndOfMccMarker: 2
W Mc1.C1 GsmMccCmdTriStateDis: 0
W Mc1.C1 GsmMccGear2: 0
W Mc1.C1 GsmMccDdr4OneDpc: 0
W Mc1.C1 GsmMccAddrMirror: 1
W Mc1.C1 GsmMccCmdStretch: 3
W Mc1.C1 GsmMccCmdGapRatio: 0
W Mc1.C1 GsmMccCmdTriStateDisTrain: 1
W Mc1.C1 GsmMccEnableOdtMatrix: 3
W Mc1.C1 GsmMctCAL: 1
W Mc1.C1 GsmMctCSCKEH: 7
W Mc1.C1 GsmMctRFCpb: 7
W Mc1.C1 GsmMccLpddrPasrRowMsb: 2
W Mc1.C1 EndOfMccMarker: 2
Address Decoding Config
Channel HASH Auto Enabled - Default to DramType:3
W Mc0 GsmMccHashMode: 2
W Mc0 GsmMccLsbMaskBit: 2096 (0x830)
W Mc0 GsmMccDisableCkTristate: 1
W Mc0 GsmMccStackedMode: 3
W Mc0 GsmMccHalfCachelineMode: 0
W Mc0 GsmMccStackedChHash: 16 (0x10)
W Mc0 GsmMccSChannelSize: 0
W Mc0.C0 GsmMccLDimmDramWidth: 8
W Mc0.C0 GsmMccSDimmSize: 1
W Mc0.C0 GsmMccSDimmDramWidth: 8
W Mc0.C0 GsmMccSDdr58GbDevice: 1
W Mc0.C0 GsmMccLDimmRankCnt: 1
W Mc0.C0 GsmMccSDimmRankCnt: 1
W Mc0.C0 GsmMccRankInterleave: 0
W Mc0.C0 GsmMccEccMode: 1
W Mc0.C0 GsmMccAddrDecodeDdrType: 0
W Mc0.C1 GsmMccLDimmDramWidth: 8
W Mc0.C1 GsmMccSDimmSize: 1
W Mc0.C1 GsmMccSDimmDramWidth: 8
W Mc0.C1 GsmMccSDdr58GbDevice: 1
W Mc0.C1 GsmMccLDimmRankCnt: 1
W Mc0.C1 GsmMccSDimmRankCnt: 1
W Mc0.C1 GsmMccRankInterleave: 0
W Mc0.C1 GsmMccEccMode: 1
W Mc0.C1 GsmMccAddrDecodeDdrType: 0
Channel HASH Auto Enabled - Default to DramType:3
W Mc1 GsmMccHashMode: 2
W Mc1 GsmMccLsbMaskBit: 2096 (0x830)
W Mc1 GsmMccDisableCkTristate: 1
W Mc1 GsmMccStackedMode: 3
W Mc1 GsmMccHalfCachelineMode: 0
W Mc1 GsmMccStackedChHash: 16 (0x10)
W Mc1 GsmMccSChannelSize: 0
W Mc1.C0 GsmMccLDimmDramWidth: 8
W Mc1.C0 GsmMccSDimmSize: 1
W Mc1.C0 GsmMccSDimmDramWidth: 8
W Mc1.C0 GsmMccSDdr58GbDevice: 1
W Mc1.C0 GsmMccLDimmRankCnt: 1
W Mc1.C0 GsmMccSDimmRankCnt: 1
W Mc1.C0 GsmMccRankInterleave: 0
W Mc1.C0 GsmMccEccMode: 1
W Mc1.C0 GsmMccAddrDecodeDdrType: 0
W Mc1.C1 GsmMccLDimmDramWidth: 8
W Mc1.C1 GsmMccSDimmSize: 1
W Mc1.C1 GsmMccSDimmDramWidth: 8
W Mc1.C1 GsmMccSDdr58GbDevice: 1
W Mc1.C1 GsmMccLDimmRankCnt: 1
W Mc1.C1 GsmMccSDimmRankCnt: 1
W Mc1.C1 GsmMccRankInterleave: 0
W Mc1.C1 GsmMccEccMode: 1
W Mc1.C1 GsmMccAddrDecodeDdrType: 0
Maintenance Configuration
W Mc0.C0 GsmMccMcSrx: 15 (0xF)
W Mc0.C1 GsmMccMcSrx: 15 (0xF)
W Mc1.C0 GsmMccMcSrx: 15 (0xF)
W Mc1.C1 GsmMccMcSrx: 15 (0xF)
MCHTrace = 0x0
SCHTrace = 0x0
ECC_EN = 0x0
DDRPL_Activate = 0x0
MCHTrace = 0x0
SCHTrace = 0x0
ECC_EN = 0x0
DDRPL_Activate = 0x0
MRC task MC Config -- SUCCEEDED, Status = 0h.
Post Code: DD12h
MRC task -- DDRIO Config - Post DCC -- Started.
Mc0.C0: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C1: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C2: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C3: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0: ValidChBitMask=0xF
Mc1.C0: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C1: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C2: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C3: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1: ValidChBitMask=0xF
ValidMcBitMask=0x3, Overall ValidChBitMask=0xFF
DdrCrVsshiControl: 0xF28014
Init Dimm Vref CRs
SdramCount: 0x2
Condition didnt meet any of the allowed Sleepcycles values, default SleepCycles = 4
DDRMISCCONTROL2 = 0xFE642130
MiscControl7.Cas2FSWCK = 126
New ODT Mode: Vss Original ODT Mode: Vss
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
Init Data CRs
W Mc0.C0 RoundTripIoComp: 18 (0x12)
W Mc0.C0 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C0 RxDqDataValidQclkDelay: 7
W Mc0.C0 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C0.R0 RxIoTclDelay: 0
W Mc0.C0.R1 RxIoTclDelay: 0
W Mc0.C0.R0 RxFifoRdEnTclDelay: 7
W Mc0.C0.R1 RxFifoRdEnTclDelay: 7
W Mc0.C0.R0 RoundTripDelay: 83 (0x53)
W Mc0.C0.R1 RoundTripDelay: 83 (0x53)
W Mc0.C1 RoundTripIoComp: 18 (0x12)
W Mc0.C1 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C1 RxDqDataValidQclkDelay: 7
W Mc0.C1 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C1.R0 RxIoTclDelay: 0
W Mc0.C1.R1 RxIoTclDelay: 0
W Mc0.C1.R0 RxFifoRdEnTclDelay: 7
W Mc0.C1.R1 RxFifoRdEnTclDelay: 7
W Mc0.C1.R0 RoundTripDelay: 83 (0x53)
W Mc0.C1.R1 RoundTripDelay: 83 (0x53)
W Mc0.C2 RoundTripIoComp: 18 (0x12)
W Mc0.C2 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C2 RxDqDataValidQclkDelay: 7
W Mc0.C2 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C2.R0 RxIoTclDelay: 0
W Mc0.C2.R1 RxIoTclDelay: 0
W Mc0.C2.R0 RxFifoRdEnTclDelay: 7
W Mc0.C2.R1 RxFifoRdEnTclDelay: 7
W Mc0.C2.R0 RoundTripDelay: 83 (0x53)
W Mc0.C2.R1 RoundTripDelay: 83 (0x53)
W Mc0.C3 RoundTripIoComp: 18 (0x12)
W Mc0.C3 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C3 RxDqDataValidQclkDelay: 7
W Mc0.C3 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C3.R0 RxIoTclDelay: 0
W Mc0.C3.R1 RxIoTclDelay: 0
W Mc0.C3.R0 RxFifoRdEnTclDelay: 7
W Mc0.C3.R1 RxFifoRdEnTclDelay: 7
W Mc0.C3.R0 RoundTripDelay: 83 (0x53)
W Mc0.C3.R1 RoundTripDelay: 83 (0x53)
W Mc1.C4 RoundTripIoComp: 16 (0x10)
W Mc1.C4 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C4 RxDqDataValidQclkDelay: 7
W Mc1.C4 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C4.R0 RxIoTclDelay: 0
W Mc1.C4.R1 RxIoTclDelay: 0
W Mc1.C4.R0 RxFifoRdEnTclDelay: 7
W Mc1.C4.R1 RxFifoRdEnTclDelay: 7
W Mc1.C0.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C0.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C5 RoundTripIoComp: 16 (0x10)
W Mc1.C5 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C5 RxDqDataValidQclkDelay: 7
W Mc1.C5 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C5.R0 RxIoTclDelay: 0
W Mc1.C5.R1 RxIoTclDelay: 0
W Mc1.C5.R0 RxFifoRdEnTclDelay: 7
W Mc1.C5.R1 RxFifoRdEnTclDelay: 7
W Mc1.C1.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C1.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C6 RoundTripIoComp: 16 (0x10)
W Mc1.C6 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C6 RxDqDataValidQclkDelay: 7
W Mc1.C6 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C6.R0 RxIoTclDelay: 0
W Mc1.C6.R1 RxIoTclDelay: 0
W Mc1.C6.R0 RxFifoRdEnTclDelay: 7
W Mc1.C6.R1 RxFifoRdEnTclDelay: 7
W Mc1.C2.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C2.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C7 RoundTripIoComp: 16 (0x10)
W Mc1.C7 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C7 RxDqDataValidQclkDelay: 7
W Mc1.C7 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C7.R0 RxIoTclDelay: 0
W Mc1.C7.R1 RxIoTclDelay: 0
W Mc1.C7.R0 RxFifoRdEnTclDelay: 7
W Mc1.C7.R1 RxFifoRdEnTclDelay: 7
W Mc1.C3.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C3.R1 RoundTripDelay: 75 (0x4B)
Mc0 C0 Dec_tCWL: 2
W Mc0.C0 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C0 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C0 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C0 GsmIocInternalClocksOn: 0
W Mc0.C0 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C0 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C0.R0 TxDqsTcoPFallNRise: 0
W Mc0.C0.R1 TxDqsTcoPFallNRise: 0
Mc0 C1 Dec_tCWL: 2
W Mc0.C1 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C1 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C1 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C1 GsmIocInternalClocksOn: 0
W Mc0.C1 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C1 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C1.R0 TxDqsTcoPFallNRise: 0
W Mc0.C1.R1 TxDqsTcoPFallNRise: 0
Mc0 C2 Dec_tCWL: 2
W Mc0.C2 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C2 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C2 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C2 GsmIocInternalClocksOn: 0
W Mc0.C2 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C2 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C2.R0 TxDqsTcoPFallNRise: 0
W Mc0.C2.R1 TxDqsTcoPFallNRise: 0
Mc0 C3 Dec_tCWL: 2
W Mc0.C3 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C3 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C3 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C3 GsmIocInternalClocksOn: 0
W Mc0.C3 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C3 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C3.R0 TxDqsTcoPFallNRise: 0
W Mc0.C3.R1 TxDqsTcoPFallNRise: 0
Mc1 C0 Dec_tCWL: 4
W Mc1.C4 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C4 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C4 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C4 GsmIocInternalClocksOn: 0
W Mc1.C4 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C4 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C4.R0 TxDqsTcoPFallNRise: 0
W Mc1.C4.R1 TxDqsTcoPFallNRise: 0
Mc1 C1 Dec_tCWL: 4
W Mc1.C5 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C5 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C5 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C5 GsmIocInternalClocksOn: 0
W Mc1.C5 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C5 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C5.R0 TxDqsTcoPFallNRise: 0
W Mc1.C5.R1 TxDqsTcoPFallNRise: 0
Mc1 C2 Dec_tCWL: 4
W Mc1.C6 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C6 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C6 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C6 GsmIocInternalClocksOn: 0
W Mc1.C6 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C6 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C6.R0 TxDqsTcoPFallNRise: 0
W Mc1.C6.R1 TxDqsTcoPFallNRise: 0
Mc1 C3 Dec_tCWL: 4
W Mc1.C7 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C7 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C7 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C7 GsmIocInternalClocksOn: 0
W Mc1.C7 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C7 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C7.R0 TxDqsTcoPFallNRise: 0
W Mc1.C7.R1 TxDqsTcoPFallNRise: 0
W Mc0.C0.R0.S0 RxTap1: 10 (0xA)
W Mc0.C0.R0.S1 RxTap1: 10 (0xA)
W Mc0.C0.R1.S0 RxTap1: 10 (0xA)
W Mc0.C0.R1.S1 RxTap1: 10 (0xA)
W Mc0.C0.R0.S0 RloadDqsDn: 5
W Mc0.C0.R0.S1 RloadDqsDn: 5
W Mc0.C0.R1.S0 RloadDqsDn: 5
W Mc0.C0.R1.S1 RloadDqsDn: 5
W Mc0.C0.R0.S0 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S1 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S0 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S1 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S0 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S1 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S0 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S1 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S0 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1.S0 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R1.S1 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R0.S0.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S1 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S0 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S1 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S0.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S0 RxVocUnmatched: 8
W Mc0.C0.R0.S1 RxVocUnmatched: 8
W Mc0.C0.R1.S0 RxVocUnmatched: 8
W Mc0.C0.R1.S1 RxVocUnmatched: 8
W Mc0.C0.R0.S0 TxEq: 10 (0xA)
W Mc0.C0.R0.S1 TxEq: 10 (0xA)
W Mc0.C0.R1.S0 TxEq: 10 (0xA)
W Mc0.C0.R1.S1 TxEq: 10 (0xA)
W Mc0.C0.R0.S0 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S0 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S1 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S1 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S0 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S0 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S1 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S1 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S0 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S0 RxRankMuxDelay: 0
W Mc0.C0.R0.S1 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S1 RxRankMuxDelay: 0
W Mc0.C0.R1.S0 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S0 RxRankMuxDelay: 0
W Mc0.C0.R1.S1 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S1 RxRankMuxDelay: 0
W Mc0.C0.R0.S2 RxTap1: 10 (0xA)
W Mc0.C0.R0.S3 RxTap1: 10 (0xA)
W Mc0.C0.R1.S2 RxTap1: 10 (0xA)
W Mc0.C0.R1.S3 RxTap1: 10 (0xA)
W Mc0.C0.R0.S2 RloadDqsDn: 5
W Mc0.C0.R0.S3 RloadDqsDn: 5
W Mc0.C0.R1.S2 RloadDqsDn: 5
W Mc0.C0.R1.S3 RloadDqsDn: 5
W Mc0.C0.R0.S2 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S3 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S2 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S3 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S2 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S3 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S2 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S3 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S2 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R1.S2 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R1.S3 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R0.S2.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S3 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S2 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S3 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S2.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S2 RxVocUnmatched: 8
W Mc0.C0.R0.S3 RxVocUnmatched: 8
W Mc0.C0.R1.S2 RxVocUnmatched: 8
W Mc0.C0.R1.S3 RxVocUnmatched: 8
W Mc0.C0.R0.S2 TxEq: 10 (0xA)
W Mc0.C0.R0.S3 TxEq: 10 (0xA)
W Mc0.C0.R1.S2 TxEq: 10 (0xA)
W Mc0.C0.R1.S3 TxEq: 10 (0xA)
W Mc0.C0.R0.S2 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S2 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S3 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S3 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S2 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S2 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S3 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S3 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S2 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S2 RxRankMuxDelay: 0
W Mc0.C0.R0.S3 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S3 RxRankMuxDelay: 0
W Mc0.C0.R1.S2 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S2 RxRankMuxDelay: 0
W Mc0.C0.R1.S3 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S3 RxRankMuxDelay: 0
W Mc0.C0.R0.S4 RxTap1: 10 (0xA)
W Mc0.C0.R0.S5 RxTap1: 10 (0xA)
W Mc0.C0.R1.S4 RxTap1: 10 (0xA)
W Mc0.C0.R1.S5 RxTap1: 10 (0xA)
W Mc0.C0.R0.S4 RloadDqsDn: 5
W Mc0.C0.R0.S5 RloadDqsDn: 5
W Mc0.C0.R1.S4 RloadDqsDn: 5
W Mc0.C0.R1.S5 RloadDqsDn: 5
W Mc0.C0.R0.S4 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S5 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S4 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S5 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S4 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S5 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S4 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S5 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S4 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R1.S4 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R1.S5 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R0.S4.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S5 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S4 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S5 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S4.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S4 RxVocUnmatched: 8
W Mc0.C0.R0.S5 RxVocUnmatched: 8
W Mc0.C0.R1.S4 RxVocUnmatched: 8
W Mc0.C0.R1.S5 RxVocUnmatched: 8
W Mc0.C0.R0.S4 TxEq: 10 (0xA)
W Mc0.C0.R0.S5 TxEq: 10 (0xA)
W Mc0.C0.R1.S4 TxEq: 10 (0xA)
W Mc0.C0.R1.S5 TxEq: 10 (0xA)
W Mc0.C0.R0.S4 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S4 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S5 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S5 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S4 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S4 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S5 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S5 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S4 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S4 RxRankMuxDelay: 0
W Mc0.C0.R0.S5 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S5 RxRankMuxDelay: 0
W Mc0.C0.R1.S4 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S4 RxRankMuxDelay: 0
W Mc0.C0.R1.S5 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S5 RxRankMuxDelay: 0
W Mc0.C0.R0.S6 RxTap1: 10 (0xA)
W Mc0.C0.R0.S7 RxTap1: 10 (0xA)
W Mc0.C0.R1.S6 RxTap1: 10 (0xA)
W Mc0.C0.R1.S7 RxTap1: 10 (0xA)
W Mc0.C0.R0.S6 RloadDqsDn: 5
W Mc0.C0.R0.S7 RloadDqsDn: 5
W Mc0.C0.R1.S6 RloadDqsDn: 5
W Mc0.C0.R1.S7 RloadDqsDn: 5
W Mc0.C0.R0.S6 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S7 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S6 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S7 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S6 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S7 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S6 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S7 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S6 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C0.R1.S6 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R1.S7 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C0.R0.S6.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S7 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S6 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S7 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S6.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S6 RxVocUnmatched: 8
W Mc0.C0.R0.S7 RxVocUnmatched: 8
W Mc0.C0.R1.S6 RxVocUnmatched: 8
W Mc0.C0.R1.S7 RxVocUnmatched: 8
W Mc0.C0.R0.S6 TxEq: 10 (0xA)
W Mc0.C0.R0.S7 TxEq: 10 (0xA)
W Mc0.C0.R1.S6 TxEq: 10 (0xA)
W Mc0.C0.R1.S7 TxEq: 10 (0xA)
W Mc0.C0.R0.S6 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S6 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S7 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S7 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S6 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S6 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S7 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S7 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S6 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S6 RxRankMuxDelay: 0
W Mc0.C0.R0.S7 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S7 RxRankMuxDelay: 0
W Mc0.C0.R1.S6 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S6 RxRankMuxDelay: 0
W Mc0.C0.R1.S7 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S7 RxRankMuxDelay: 0
W Mc1.C1.R0.S0 RxTap1: 10 (0xA)
W Mc1.C1.R0.S1 RxTap1: 10 (0xA)
W Mc1.C1.R1.S0 RxTap1: 10 (0xA)
W Mc1.C1.R1.S1 RxTap1: 10 (0xA)
W Mc1.C1.R0.S0 RloadDqsDn: 5
W Mc1.C1.R0.S1 RloadDqsDn: 5
W Mc1.C1.R1.S0 RloadDqsDn: 5
W Mc1.C1.R1.S1 RloadDqsDn: 5
W Mc1.C1.R0.S0 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S1 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S0 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S1 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S0 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S1 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S0 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S1 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S0 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R1.S0 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R1.S1 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R0.S0.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S1 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S0 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S1 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S0.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S0 RxVocUnmatched: 8
W Mc1.C1.R0.S1 RxVocUnmatched: 8
W Mc1.C1.R1.S0 RxVocUnmatched: 8
W Mc1.C1.R1.S1 RxVocUnmatched: 8
W Mc1.C1.R0.S0 TxEq: 10 (0xA)
W Mc1.C1.R0.S1 TxEq: 10 (0xA)
W Mc1.C1.R1.S0 TxEq: 10 (0xA)
W Mc1.C1.R1.S1 TxEq: 10 (0xA)
W Mc1.C1.R0.S0 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S0 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S1 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S1 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S0 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S0 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S1 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S1 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S0 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S0 RxRankMuxDelay: 0
W Mc1.C1.R0.S1 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S1 RxRankMuxDelay: 0
W Mc1.C1.R1.S0 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S0 RxRankMuxDelay: 0
W Mc1.C1.R1.S1 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S1 RxRankMuxDelay: 0
W Mc1.C1.R0.S2 RxTap1: 10 (0xA)
W Mc1.C1.R0.S3 RxTap1: 10 (0xA)
W Mc1.C1.R1.S2 RxTap1: 10 (0xA)
W Mc1.C1.R1.S3 RxTap1: 10 (0xA)
W Mc1.C1.R0.S2 RloadDqsDn: 5
W Mc1.C1.R0.S3 RloadDqsDn: 5
W Mc1.C1.R1.S2 RloadDqsDn: 5
W Mc1.C1.R1.S3 RloadDqsDn: 5
W Mc1.C1.R0.S2 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S3 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S2 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S3 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S2 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S3 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S2 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S3 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S2 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R1.S2 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R1.S3 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R0.S2.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S3 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S2 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S3 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S2.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S2 RxVocUnmatched: 8
W Mc1.C1.R0.S3 RxVocUnmatched: 8
W Mc1.C1.R1.S2 RxVocUnmatched: 8
W Mc1.C1.R1.S3 RxVocUnmatched: 8
W Mc1.C1.R0.S2 TxEq: 10 (0xA)
W Mc1.C1.R0.S3 TxEq: 10 (0xA)
W Mc1.C1.R1.S2 TxEq: 10 (0xA)
W Mc1.C1.R1.S3 TxEq: 10 (0xA)
W Mc1.C1.R0.S2 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S2 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S3 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S3 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S2 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S2 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S3 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S3 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S2 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S2 RxRankMuxDelay: 0
W Mc1.C1.R0.S3 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S3 RxRankMuxDelay: 0
W Mc1.C1.R1.S2 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S2 RxRankMuxDelay: 0
W Mc1.C1.R1.S3 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S3 RxRankMuxDelay: 0
W Mc1.C1.R0.S4 RxTap1: 10 (0xA)
W Mc1.C1.R0.S5 RxTap1: 10 (0xA)
W Mc1.C1.R1.S4 RxTap1: 10 (0xA)
W Mc1.C1.R1.S5 RxTap1: 10 (0xA)
W Mc1.C1.R0.S4 RloadDqsDn: 5
W Mc1.C1.R0.S5 RloadDqsDn: 5
W Mc1.C1.R1.S4 RloadDqsDn: 5
W Mc1.C1.R1.S5 RloadDqsDn: 5
W Mc1.C1.R0.S4 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S5 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S4 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S5 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S4 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S5 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S4 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S5 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S4 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R1.S4 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R1.S5 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R0.S4.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S5 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S4 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S5 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S4.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S4 RxVocUnmatched: 8
W Mc1.C1.R0.S5 RxVocUnmatched: 8
W Mc1.C1.R1.S4 RxVocUnmatched: 8
W Mc1.C1.R1.S5 RxVocUnmatched: 8
W Mc1.C1.R0.S4 TxEq: 10 (0xA)
W Mc1.C1.R0.S5 TxEq: 10 (0xA)
W Mc1.C1.R1.S4 TxEq: 10 (0xA)
W Mc1.C1.R1.S5 TxEq: 10 (0xA)
W Mc1.C1.R0.S4 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S4 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S5 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S5 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S4 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S4 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S5 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S5 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S4 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S4 RxRankMuxDelay: 0
W Mc1.C1.R0.S5 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S5 RxRankMuxDelay: 0
W Mc1.C1.R1.S4 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S4 RxRankMuxDelay: 0
W Mc1.C1.R1.S5 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S5 RxRankMuxDelay: 0
W Mc1.C1.R0.S6 RxTap1: 10 (0xA)
W Mc1.C1.R0.S7 RxTap1: 10 (0xA)
W Mc1.C1.R1.S6 RxTap1: 10 (0xA)
W Mc1.C1.R1.S7 RxTap1: 10 (0xA)
W Mc1.C1.R0.S6 RloadDqsDn: 5
W Mc1.C1.R0.S7 RloadDqsDn: 5
W Mc1.C1.R1.S6 RloadDqsDn: 5
W Mc1.C1.R1.S7 RloadDqsDn: 5
W Mc1.C1.R0.S6 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S7 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S6 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S7 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S6 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S7 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S6 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S7 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S6 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R1.S6 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R1.S7 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R0.S6.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S7 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S6 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S7 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S6.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S6 RxVocUnmatched: 8
W Mc1.C1.R0.S7 RxVocUnmatched: 8
W Mc1.C1.R1.S6 RxVocUnmatched: 8
W Mc1.C1.R1.S7 RxVocUnmatched: 8
W Mc1.C1.R0.S6 TxEq: 10 (0xA)
W Mc1.C1.R0.S7 TxEq: 10 (0xA)
W Mc1.C1.R1.S6 TxEq: 10 (0xA)
W Mc1.C1.R1.S7 TxEq: 10 (0xA)
W Mc1.C1.R0.S6 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S6 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S7 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S7 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S6 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S6 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S7 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S7 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S6 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S6 RxRankMuxDelay: 0
W Mc1.C1.R0.S7 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S7 RxRankMuxDelay: 0
W Mc1.C1.R1.S6 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S6 RxRankMuxDelay: 0
W Mc1.C1.R1.S7 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S7 RxRankMuxDelay: 0
W GsmIocStrobeOdtStaticDis: 0
W Mc0.C0.S0 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S1 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S2 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S3 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S4 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S5 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S6 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S7 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S0 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S1 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S2 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S3 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S4 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S5 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S6 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S7 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S0 GsmIocDataOdtMode: 1
W Mc0.C0.S1 GsmIocDataOdtMode: 1
W Mc0.C0.S0 McOdtDelay: 0
W Mc0.C0.S1 McOdtDelay: 0
W Mc0.C0.S2 McOdtDelay: 0
W Mc0.C0.S3 McOdtDelay: 0
W Mc0.C0.S4 McOdtDelay: 0
W Mc0.C0.S5 McOdtDelay: 0
W Mc0.C0.S6 McOdtDelay: 0
W Mc0.C0.S7 McOdtDelay: 0
W Mc1.C1.S0 McOdtDelay: 0
W Mc1.C1.S1 McOdtDelay: 0
W Mc1.C1.S2 McOdtDelay: 0
W Mc1.C1.S3 McOdtDelay: 0
W Mc1.C1.S4 McOdtDelay: 0
W Mc1.C1.S5 McOdtDelay: 0
W Mc1.C1.S6 McOdtDelay: 0
W Mc1.C1.S7 McOdtDelay: 0
W Mc0.C0.S0 SenseAmpDelay: 0
W Mc0.C0.S1 SenseAmpDelay: 0
W Mc0.C0.S2 SenseAmpDelay: 0
W Mc0.C0.S3 SenseAmpDelay: 0
W Mc0.C0.S4 SenseAmpDelay: 0
W Mc0.C0.S5 SenseAmpDelay: 0
W Mc0.C0.S6 SenseAmpDelay: 0
W Mc0.C0.S7 SenseAmpDelay: 0
W Mc1.C1.S0 SenseAmpDelay: 0
W Mc1.C1.S1 SenseAmpDelay: 0
W Mc1.C1.S2 SenseAmpDelay: 0
W Mc1.C1.S3 SenseAmpDelay: 0
W Mc1.C1.S4 SenseAmpDelay: 0
W Mc1.C1.S5 SenseAmpDelay: 0
W Mc1.C1.S6 SenseAmpDelay: 0
W Mc1.C1.S7 SenseAmpDelay: 0
W Mc0.C0.S0 DqsOdtDelay: 0
W Mc0.C0.S1 DqsOdtDelay: 0
W Mc0.C0.S2 DqsOdtDelay: 0
W Mc0.C0.S3 DqsOdtDelay: 0
W Mc0.C0.S4 DqsOdtDelay: 0
W Mc0.C0.S5 DqsOdtDelay: 0
W Mc0.C0.S6 DqsOdtDelay: 0
W Mc0.C0.S7 DqsOdtDelay: 0
W Mc1.C1.S0 DqsOdtDelay: 0
W Mc1.C1.S1 DqsOdtDelay: 0
W Mc1.C1.S2 DqsOdtDelay: 0
W Mc1.C1.S3 DqsOdtDelay: 0
W Mc1.C1.S4 DqsOdtDelay: 0
W Mc1.C1.S5 DqsOdtDelay: 0
W Mc1.C1.S6 DqsOdtDelay: 0
W Mc1.C1.S7 DqsOdtDelay: 0
W Mc0.C0.S0 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S1 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S2 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S3 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S4 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S5 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S6 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S7 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S0 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S1 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S2 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S3 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S4 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S5 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S6 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S7 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S0 McOdtDuration: 15 (0xF)
W Mc0.C0.S1 McOdtDuration: 15 (0xF)
W Mc0.C0.S2 McOdtDuration: 15 (0xF)
W Mc0.C0.S3 McOdtDuration: 15 (0xF)
W Mc0.C0.S4 McOdtDuration: 15 (0xF)
W Mc0.C0.S5 McOdtDuration: 15 (0xF)
W Mc0.C0.S6 McOdtDuration: 15 (0xF)
W Mc0.C0.S7 McOdtDuration: 15 (0xF)
W Mc1.C1.S0 McOdtDuration: 15 (0xF)
W Mc1.C1.S1 McOdtDuration: 15 (0xF)
W Mc1.C1.S2 McOdtDuration: 15 (0xF)
W Mc1.C1.S3 McOdtDuration: 15 (0xF)
W Mc1.C1.S4 McOdtDuration: 15 (0xF)
W Mc1.C1.S5 McOdtDuration: 15 (0xF)
W Mc1.C1.S6 McOdtDuration: 15 (0xF)
W Mc1.C1.S7 McOdtDuration: 15 (0xF)
W Mc0.C0.S0 DqsOdtDuration: 7
W Mc0.C0.S1 DqsOdtDuration: 7
W Mc0.C0.S2 DqsOdtDuration: 7
W Mc0.C0.S3 DqsOdtDuration: 7
W Mc0.C0.S4 DqsOdtDuration: 7
W Mc0.C0.S5 DqsOdtDuration: 7
W Mc0.C0.S6 DqsOdtDuration: 7
W Mc0.C0.S7 DqsOdtDuration: 7
W Mc1.C1.S0 DqsOdtDuration: 7
W Mc1.C1.S1 DqsOdtDuration: 7
W Mc1.C1.S2 DqsOdtDuration: 7
W Mc1.C1.S3 DqsOdtDuration: 7
W Mc1.C1.S4 DqsOdtDuration: 7
W Mc1.C1.S5 DqsOdtDuration: 7
W Mc1.C1.S6 DqsOdtDuration: 7
W Mc1.C1.S7 DqsOdtDuration: 7
W Mc0.C0.S0 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S1 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S2 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S3 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S4 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S5 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S6 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S7 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S0 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S1 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S2 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S3 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S4 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S5 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S6 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S7 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S0 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S1 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S2 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S3 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S4 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S5 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S6 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S7 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S0 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S1 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S2 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S3 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S4 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S5 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S6 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S7 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S0 GsmIocDisableQuickComp: 1
W Mc0.C0.S1 GsmIocDisableQuickComp: 1
W Mc0.C0.S2 GsmIocDisableQuickComp: 1
W Mc0.C0.S3 GsmIocDisableQuickComp: 1
W Mc0.C0.S4 GsmIocDisableQuickComp: 1
W Mc0.C0.S5 GsmIocDisableQuickComp: 1
W Mc0.C0.S6 GsmIocDisableQuickComp: 1
W Mc0.C0.S7 GsmIocDisableQuickComp: 1
W Mc1.C1.S0 GsmIocDisableQuickComp: 1
W Mc1.C1.S1 GsmIocDisableQuickComp: 1
W Mc1.C1.S2 GsmIocDisableQuickComp: 1
W Mc1.C1.S3 GsmIocDisableQuickComp: 1
W Mc1.C1.S4 GsmIocDisableQuickComp: 1
W Mc1.C1.S5 GsmIocDisableQuickComp: 1
W Mc1.C1.S6 GsmIocDisableQuickComp: 1
W Mc1.C1.S7 GsmIocDisableQuickComp: 1
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
Init Dimm Vref CRs
DdrCrVrefControl: 0x240C1E
W Mc0.C0.S0 CmdGrpPi: 128 (0x80)
W Mc0.C0.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C0.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C0.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C0.S0 CkeGrpPi: 128 (0x80)
W Mc0.C1.S0 CmdGrpPi: 128 (0x80)
W Mc0.C1.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C1.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C1.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C1.S0 CkeGrpPi: 128 (0x80)
W Mc0.C2.S0 CmdGrpPi: 128 (0x80)
W Mc0.C2.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C2.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C2.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C2.S0 CkeGrpPi: 128 (0x80)
W Mc0.C3.S0 CmdGrpPi: 128 (0x80)
W Mc0.C3.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C3.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C3.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C3.S0 CkeGrpPi: 128 (0x80)
W Mc1.C4.S0 CmdGrpPi: 128 (0x80)
W Mc1.C4.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C4.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C4.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C4.S0 CkeGrpPi: 128 (0x80)
W Mc1.C5.S0 CmdGrpPi: 128 (0x80)
W Mc1.C5.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C5.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C5.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C5.S0 CkeGrpPi: 128 (0x80)
W Mc1.C6.S0 CmdGrpPi: 128 (0x80)
W Mc1.C6.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C6.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C6.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C6.S0 CkeGrpPi: 128 (0x80)
W Mc1.C7.S0 CmdGrpPi: 128 (0x80)
W Mc1.C7.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C7.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C7.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C7.S0 CkeGrpPi: 128 (0x80)
MrcSetupVtt: RodtCpu=80 ohm, RonDimm=34 ohm
Itarget=10 uA,
IcompDn=23 uA, IcompUp=1 uA
Init MISC CRs
PCU_CR_DDR_VOLTAGE = 0x06
Init COMP CRs
WrDSClk: Target (Up/Down) value: 30/ 30 ReferenceR (Up/Down): 33/ 30 VrefOffset (Up/Down): 100/ 96 Current Comp code (Up/Down): 11/ 13
WrDSCtl: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 33/ 40 VrefOffset (Up/Down): 86/ 96 Current Comp code (Up/Down): 5/ 6
WrDSCmd: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 33/ 40 VrefOffset (Up/Down): 86/ 96 Current Comp code (Up/Down): 5/ 5
RloadVref: 13 set equal to CmdDrvVrefUp (WrDSCmd)
WrDS: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 50/ 40 VrefOffset (Up/Down): 106/ 96 Current Comp code (Up/Down): 15/ 22
RdOdt: Target (Up/Down) value: 80/ 40 ReferenceR (Up/Down): 100/ 80 VrefOffset (Up/Down): 106/127 Current Comp code (Up/Down): 8/ 8
Vdd2Mv = 1100mV, VccIo - 375 = 575mV, TargetV = 148mV, PanicV = 25mV, DDRVSSHIAFEA_CR_DDRCRVSSHISAMPLER = 0x10FC0494
VsshiTargetCompOfst = 0x3F, PanicHiCompOfst = 0x3F, PanicLoCompOfst = 0x3F
START_VssHi_Regulator_Offset_Correction
DDRVSSHIAFEA_CR_DDRCRVSSHISAMPLER = 0x10FC0494
VssHiTargetUsePmos = 0x1
PanicHiUsePmos = 0x1
PanicLoUsePmos = 0x1
STOP_VssHi_Regulator_Offset_Correction
final panicvttup0 = 0x2D
final panicvttup1 = 0x2D
final panicvttdn0 = 0x22
final panicvttdn1 = 0x22
W GsmIocDataDqDccLaneStatusResult: 0
MRC task DDRIO Config - Post DCC -- SUCCEEDED, Status = 0h. Stack Depth: 151104
Post Code: DD6Bh
MRC task -- Memory Subsystem FUSA Configuration -- Started.
Disable CMI Parity
CmiParity PARITY_EN: 1
CmiParity ADDR_PARITY_CHK_MASK: 255
Disable MC0 Parity
Mc0Parity PARITY_EN: 1
Mc0Parity RDATA_PARITY_EN: 1
Mc0Parity WDATA_PARITY_EN: 0
Mc0Parity WBE_PARITY_EN: 0
Mc0Parity ADDR_PARITY_EN: 1
Disable MC1 Parity
Mc1Parity PARITY_EN: 1
Mc1Parity RDATA_PARITY_EN: 1
Mc1Parity WDATA_PARITY_EN: 0
Mc1Parity WBE_PARITY_EN: 0
Mc1Parity ADDR_PARITY_EN: 1
CmiParity PARITY_EN: 1
Mc0Parity PARITY_EN: 1
Ibecc0Parity PARITY_EN: 1
Mc1Parity PARITY_EN: 1
Ibecc1Parity PARITY_EN: 1
MRC task Memory Subsystem FUSA Configuration -- SUCCEEDED, Status = 0h.
Post Code: DD7Bh
MRC task -- MRC Check-The-Checker -- Started.
MRC task MRC Check-The-Checker -- SUCCEEDED, Status = 0h.
Post Code: DD0Ah
MRC task -- FLL Init -- Started.
MRC task FLL Init -- SUCCEEDED, Status = 0h.
Post Code: DD14h
MRC task -- DDR COMP Calc - PreTraining -- Started.
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
R SCompCodeCtl: 15 (0xF)
W GsmIocNoDqInterleave: 1
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
MRC task DDR COMP Calc - PreTraining -- SUCCEEDED, Status = 0h.
Post Code: DD13h
MRC task -- DDR SCOMP Config -- Started.
Bypass SCompDq
Bypass SCompCmd
Bypass SCompCtl
Bypass SCompClk
MRC task DDR SCOMP Config -- SUCCEEDED, Status = 0h.
Post Code: DD24h
MRC task -- MC MEMORY MAP -- Started.
PrmrrSize adjusted to = 0 MB
TOM (Total physical memory size) = 32768 MB
GGC value = FEC0h
Unaligned TSEG base = 7B4h
Unaligned GTT base = 7BCh
Unaligned BDSM base = 7C4h
Unaligned TOLUD base = 800h
TSEG base = 7B0h
GTT base = 7B8h
BDSM base = 7C0h
TOLUD base = 7FCh
Reclaim Enable
Remap Base 8000h
Remap Limit 8803h
TOUUD Base 8804h
ME stolen base 770h
ME stolen size 40h
TotalMemorySize = 8000
ToludBase = 7FC
TouudBase = 8804
TsegBase = 7B0
BdsmBase = 7C0
BgsmBase = 7B8
GraphicsControlRegister = FEC0
SetIaGtImrExclusion Enter
SetIaGtImrExclusion End
Set Gfx Memory Map
GMSSize: 60MB
GMSBase read from R_SA_BDSM: 0x7C000000
Rc6CtxBaseLow: 0x7FBF7000
DoorbellCtxBaseLow: 0x7FBFF000
RC6 Context Base: 0x7FBF7001
RC6 Context Base Programming done
MRC task MC MEMORY MAP -- SUCCEEDED, Status = 0h.
Post Code: DD27h
MRC task -- Pre-Training -- Started.
CPGC Mode locked
MRC task Pre-Training -- SUCCEEDED, Status = 0h.
Post Code: DD5Eh
MRC task -- Reset Recovery -- Started.
Issue ZQ CAL on all channels / ranks
Issues 5 write transactions!Reset de-asserted correctly in iter 0!MRC task Reset Recovery -- SUCCEEDED, Status = 0h.
Post Code: DD1Fh
MRC task -- DDR Offset Correction - PreTraining -- Started.
VccDll Bypass!
VssHi FF Offset
W Mc0.C0.S0 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S1 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S2 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S3 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S4 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S5 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S6 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S7 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S0 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S1 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S2 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S3 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S4 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S5 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S6 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S7 GsmIocDqsMaskPulseCnt: 1
Issue ZQ CAL on all channels / ranks
Issue ZQ CAL on all channels / ranks
START_PreTrain_Offset_Correction_VssHi_FF
STOP_PreTrain_Offset_Correction_VssHi_FF
MRC task DDR Offset Correction - PreTraining -- SUCCEEDED, Status = 0h.
Post Code: DD26h
MRC task -- JEDEC RESET -- Started.
Attempting value = 0xB9B80008 - Pll busy wait - done
Requested/actual ratio 8/8, Frequency=1067, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=1874999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MC0C0 DqOdt = 48 , CaOdt = 60
DriverPullUp = 40, DriverPullDown = 0, ReceiverOdt = 48, Vdd = 1100, Vterm = 0
VrefType = WrV, Vref = 300
DriverPullUp = 40, DriverPullDown = 0, ReceiverOdt = 60, Vdd = 1100, Vterm = 0
VrefType = CmdV, Vref = 330
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 1: MR23, Opcode=0x04
Issue ZQ CAL on all channels / ranks
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task JEDEC RESET -- SUCCEEDED, Status = 0h.
Post Code: DD25h
MRC task -- Print DDR MRs -- Started.
MRC task Print DDR MRs -- SUCCEEDED, Status = 0h.
Post Code: DD29h
MRC task -- SenseAmp Offset Training -- Started.
SampOffset Training:RxVoc,RxDqsUnmatchedAmpOffset
MC 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bits 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S
SAmp
0 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
1 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
2 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
3 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
4 111111111 111111111 111111011 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
5 111111111 111111111 111111011 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
6 111111111 111111111 111111011 111111111 111111111 111111111 111111011 111111111 111111111 111111111 111101111 111111011 111110111 111111111 111101011 111111111
7 111110111 111111111 111111011 111111111 111110101 111110101 111101011 111111111 111111101 111111101 111101111 111101011 111110101 111111111 111101011 111111011
8 111110101 111111011 111111011 111101011 111110101 111110101 111101011 111111011 111110101 111111101 111101011 111101011 111110101 111111111 111101011 111111011
9 111110101 111111011 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011
10 111110001 111101011 111101011 111101001 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011
11 111110001 111100001 111101001 111101001 111110101 111100001 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101001
12 111110001 111100001 111101001 111101001 111110101 111100001 111101001 111100011 111110001 111110101 111101011 111101011 111100101 111110101 111101001 111101001
13 111100001 110100001 111100001 110101001 111100100 111100001 111100001 111100000 111110001 111110101 111101001 011101011 111100101 111100001 111101001 111100001
14 110100001 110100001 001100001 100100001 110100000 111000001 011100001 111000000 010000001 110000001 111100001 011001001 111100001 110100001 101100001 111100001
15 000100001 100100001 001100001 000000001 000000000 011000001 011100001 110000000 010000001 000000001 011000001 000001000 010100000 000100001 101100001 011100001
16 000000001 000000000 000000001 000000001 000000000 010000001 000000001 010000000 000000001 000000001 010000001 000000000 010000000 000100001 000000000 010000000
17 000000001 000000000 000000000 000000001 000000000 000000001 000000000 000000000 000000001 000000001 000000000 000000000 000000000 000000000 000000000 010000000
18 000000001 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000
19 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000
20 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
21 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
22 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
23 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
24 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
25 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
26 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
27 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
28 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
29 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
30 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
Results
W Mc0.C0.R0.S0.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B2 RxVoc: 18 (0x12)
W Mc0.C0.R1.S0.B2 RxVoc: 18 (0x12)
W Mc0.C0.R0.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxVoc: 19 (0x13)
W Mc0.C0.R1.S0.B4 RxVoc: 19 (0x13)
W Mc0.C0.R0.S0.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S0.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S0.B6 RxVoc: 22 (0x16)
W Mc0.C0.R1.S0.B6 RxVoc: 22 (0x16)
W Mc0.C0.R0.S0.B7 RxVoc: 24 (0x18)
W Mc0.C0.R1.S0.B7 RxVoc: 24 (0x18)
W Mc0.C0.R0.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc0.C0.R1.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc0.C0.R0.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S1.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S1.B2 RxVoc: 19 (0x13)
W Mc0.C0.R1.S1.B2 RxVoc: 19 (0x13)
W Mc0.C0.R0.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxVoc: 22 (0x16)
W Mc0.C0.R1.S1.B4 RxVoc: 22 (0x16)
W Mc0.C0.R0.S1.B5 RxVoc: 21 (0x15)
W Mc0.C0.R1.S1.B5 RxVoc: 21 (0x15)
W Mc0.C0.R0.S1.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S1.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S1.B7 RxVoc: 21 (0x15)
W Mc0.C0.R1.S1.B7 RxVoc: 21 (0x15)
W Mc0.C0.R0.S1 RxDqsUnmatchedAmpOffset: 0
W Mc0.C0.R1.S1 RxDqsUnmatchedAmpOffset: 0
W Mc0.C0.R0.S2.B0 RxVoc: 18 (0x12)
W Mc0.C0.R1.S2.B0 RxVoc: 18 (0x12)
W Mc0.C0.R0.S2.B1 RxVoc: 18 (0x12)
W Mc0.C0.R1.S2.B1 RxVoc: 18 (0x12)
W Mc0.C0.R0.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxVoc: 23 (0x17)
W Mc0.C0.R1.S2.B4 RxVoc: 23 (0x17)
W Mc0.C0.R0.S2.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S2.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S2.B6 RxVoc: 28 (0x1C)
W Mc0.C0.R1.S2.B6 RxVoc: 28 (0x1C)
W Mc0.C0.R0.S2.B7 RxVoc: 21 (0x15)
W Mc0.C0.R1.S2.B7 RxVoc: 21 (0x15)
W Mc0.C0.R0.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S3.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S3.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S3.B1 RxVoc: 18 (0x12)
W Mc0.C0.R1.S3.B1 RxVoc: 18 (0x12)
W Mc0.C0.R0.S3.B2 RxVoc: 19 (0x13)
W Mc0.C0.R1.S3.B2 RxVoc: 19 (0x13)
W Mc0.C0.R0.S3.B3 RxVoc: 17 (0x11)
W Mc0.C0.R1.S3.B3 RxVoc: 17 (0x11)
W Mc0.C0.R0.S3.B4 RxVoc: 24 (0x18)
W Mc0.C0.R1.S3.B4 RxVoc: 24 (0x18)
W Mc0.C0.R0.S3.B5 RxVoc: 18 (0x12)
W Mc0.C0.R1.S3.B5 RxVoc: 18 (0x12)
W Mc0.C0.R0.S3.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S3.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S3.B7 RxVoc: 22 (0x16)
W Mc0.C0.R1.S3.B7 RxVoc: 22 (0x16)
W Mc0.C0.R0.S3 RxDqsUnmatchedAmpOffset: 29 (0x1D)
W Mc0.C0.R1.S3 RxDqsUnmatchedAmpOffset: 29 (0x1D)
W Mc0.C0.R0.S4.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B2 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B2 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B3 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B3 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B4 RxVoc: 19 (0x13)
W Mc0.C0.R1.S4.B4 RxVoc: 19 (0x13)
W Mc0.C0.R0.S4.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S4.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S4.B6 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B6 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B7 RxVoc: 25 (0x19)
W Mc0.C0.R1.S4.B7 RxVoc: 25 (0x19)
W Mc0.C0.R0.S4 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R1.S4 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R0.S5.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S5.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S5.B1 RxVoc: 1
W Mc0.C0.R1.S5.B1 RxVoc: 1
W Mc0.C0.R0.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxVoc: 18 (0x12)
W Mc0.C0.R1.S5.B3 RxVoc: 18 (0x12)
W Mc0.C0.R0.S5.B4 RxVoc: 21 (0x15)
W Mc0.C0.R1.S5.B4 RxVoc: 21 (0x15)
W Mc0.C0.R0.S5.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S5.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S5.B6 RxVoc: 21 (0x15)
W Mc0.C0.R1.S5.B6 RxVoc: 21 (0x15)
W Mc0.C0.R0.S5.B7 RxVoc: 25 (0x19)
W Mc0.C0.R1.S5.B7 RxVoc: 25 (0x19)
W Mc0.C0.R0.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc0.C0.R1.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc0.C0.R0.S6.B0 RxVoc: 18 (0x12)
W Mc0.C0.R1.S6.B0 RxVoc: 18 (0x12)
W Mc0.C0.R0.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxVoc: 25 (0x19)
W Mc0.C0.R1.S6.B4 RxVoc: 25 (0x19)
W Mc0.C0.R0.S6.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S6.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S6.B6 RxVoc: 26 (0x1A)
W Mc0.C0.R1.S6.B6 RxVoc: 26 (0x1A)
W Mc0.C0.R0.S6.B7 RxVoc: 20 (0x14)
W Mc0.C0.R1.S6.B7 RxVoc: 20 (0x14)
W Mc0.C0.R0.S6 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S6 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxVoc: 1
W Mc0.C0.R1.S7.B1 RxVoc: 1
W Mc0.C0.R0.S7.B2 RxVoc: 17 (0x11)
W Mc0.C0.R1.S7.B2 RxVoc: 17 (0x11)
W Mc0.C0.R0.S7.B3 RxVoc: 18 (0x12)
W Mc0.C0.R1.S7.B3 RxVoc: 18 (0x12)
W Mc0.C0.R0.S7.B4 RxVoc: 23 (0x17)
W Mc0.C0.R1.S7.B4 RxVoc: 23 (0x17)
W Mc0.C0.R0.S7.B5 RxVoc: 20 (0x14)
W Mc0.C0.R1.S7.B5 RxVoc: 20 (0x14)
W Mc0.C0.R0.S7.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S7.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S7.B7 RxVoc: 19 (0x13)
W Mc0.C0.R1.S7.B7 RxVoc: 19 (0x13)
W Mc0.C0.R0.S7 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R1.S7 RxDqsUnmatchedAmpOffset: 3
W Mc1.C1.R0.S0.B0 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B0 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B4 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B4 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B5 RxVoc: 24 (0x18)
W Mc1.C1.R1.S0.B5 RxVoc: 24 (0x18)
W Mc1.C1.R0.S0.B6 RxVoc: 20 (0x14)
W Mc1.C1.R1.S0.B6 RxVoc: 20 (0x14)
W Mc1.C1.R0.S0.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S0.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc1.C1.R1.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc1.C1.R0.S1.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S1.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S1.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S1.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S1.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B4 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B4 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B5 RxVoc: 23 (0x17)
W Mc1.C1.R1.S1.B5 RxVoc: 23 (0x17)
W Mc1.C1.R0.S1.B6 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B6 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S1.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S1 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc1.C1.R1.S1 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc1.C1.R0.S2.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S2.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S2.B1 RxVoc: 1
W Mc1.C1.R1.S2.B1 RxVoc: 1
W Mc1.C1.R0.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxVoc: 17 (0x11)
W Mc1.C1.R1.S2.B3 RxVoc: 17 (0x11)
W Mc1.C1.R0.S2.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S2.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S2.B5 RxVoc: 18 (0x12)
W Mc1.C1.R1.S2.B5 RxVoc: 18 (0x12)
W Mc1.C1.R0.S2.B6 RxVoc: 24 (0x18)
W Mc1.C1.R1.S2.B6 RxVoc: 24 (0x18)
W Mc1.C1.R0.S2.B7 RxVoc: 19 (0x13)
W Mc1.C1.R1.S2.B7 RxVoc: 19 (0x13)
W Mc1.C1.R0.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R1.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R0.S3.B0 RxVoc: 19 (0x13)
W Mc1.C1.R1.S3.B0 RxVoc: 19 (0x13)
W Mc1.C1.R0.S3.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S3.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S3.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S3.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S3.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S3.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S3.B4 RxVoc: 25 (0x19)
W Mc1.C1.R1.S3.B4 RxVoc: 25 (0x19)
W Mc1.C1.R0.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S3.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S3.B7 RxVoc: 18 (0x12)
W Mc1.C1.R1.S3.B7 RxVoc: 18 (0x12)
W Mc1.C1.R0.S3 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R1.S3 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R0.S4.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S4.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S4.B1 RxVoc: 1
W Mc1.C1.R1.S4.B1 RxVoc: 1
W Mc1.C1.R0.S4.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S4.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxVoc: 20 (0x14)
W Mc1.C1.R1.S4.B4 RxVoc: 20 (0x14)
W Mc1.C1.R0.S4.B5 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S4.B5 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S4.B6 RxVoc: 18 (0x12)
W Mc1.C1.R1.S4.B6 RxVoc: 18 (0x12)
W Mc1.C1.R0.S4.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S4.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S4 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R1.S4 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R0.S5.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S5.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S5.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S5.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S5.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S5.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S5.B3 RxVoc: 1
W Mc1.C1.R1.S5.B3 RxVoc: 1
W Mc1.C1.R0.S5.B4 RxVoc: 19 (0x13)
W Mc1.C1.R1.S5.B4 RxVoc: 19 (0x13)
W Mc1.C1.R0.S5.B5 RxVoc: 23 (0x17)
W Mc1.C1.R1.S5.B5 RxVoc: 23 (0x17)
W Mc1.C1.R0.S5.B6 RxVoc: 19 (0x13)
W Mc1.C1.R1.S5.B6 RxVoc: 19 (0x13)
W Mc1.C1.R0.S5.B7 RxVoc: 23 (0x17)
W Mc1.C1.R1.S5.B7 RxVoc: 23 (0x17)
W Mc1.C1.R0.S5 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R1.S5 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R0.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxVoc: 18 (0x12)
W Mc1.C1.R1.S6.B1 RxVoc: 18 (0x12)
W Mc1.C1.R0.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S6.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S6.B5 RxVoc: 18 (0x12)
W Mc1.C1.R1.S6.B5 RxVoc: 18 (0x12)
W Mc1.C1.R0.S6.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S6.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S6.B7 RxVoc: 20 (0x14)
W Mc1.C1.R1.S6.B7 RxVoc: 20 (0x14)
W Mc1.C1.R0.S6 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R1.S6 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R0.S7.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S7.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S7.B1 RxVoc: 2
W Mc1.C1.R1.S7.B1 RxVoc: 2
W Mc1.C1.R0.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxVoc: 23 (0x17)
W Mc1.C1.R1.S7.B4 RxVoc: 23 (0x17)
W Mc1.C1.R0.S7.B5 RxVoc: 19 (0x13)
W Mc1.C1.R1.S7.B5 RxVoc: 19 (0x13)
W Mc1.C1.R0.S7.B6 RxVoc: 25 (0x19)
W Mc1.C1.R1.S7.B6 RxVoc: 25 (0x19)
W Mc1.C1.R0.S7.B7 RxVoc: 21 (0x15)
W Mc1.C1.R1.S7.B7 RxVoc: 21 (0x15)
W Mc1.C1.R0.S7 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R1.S7 RxDqsUnmatchedAmpOffset: 0
SampOffset Training:RxPerBitDeskewCal,
MC 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bits 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567
SAmp
0 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
2 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
3 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
4 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
5 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
6 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
7 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
8 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
9 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
10 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
12 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
13 11111111 11111111 11110111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111101 11111111 11101111
14 11101100 10111101 11110011 10110111 01111111 01110101 11110111 01111110 11101001 11111101 11111011 11111111 10011110 01111101 10111111 11100110
15 01101000 00101101 11100011 00010101 01001010 00110001 00110101 01111100 10100001 11100101 11010011 11101101 00010110 00101100 10110010 10100010
16 00000000 00000001 10000000 00010000 00001000 00010001 00110001 00111100 00000000 00000000 01000010 10000100 00000100 00100100 00000000 10100000
17 00000000 00000001 10000000 00000000 00000000 00000000 00000000 00010000 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000000
18 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
19 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
20 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
21 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
22 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
23 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
24 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
25 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
26 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
27 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
28 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
29 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
30 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Results
W Mc0.C0.R0.S0.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S0.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S0.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S1.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B7 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S1.B7 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S2.B0 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S2.B0 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S2.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S2.B4 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R1.S2.B4 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R0.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S3.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S3.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S3.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S3.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S3.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S4.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S4.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S4.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S5.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S5.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S5.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S5.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S6.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S7.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S7.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S7.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B5 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B5 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S7.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S0.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S0.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S2.B1 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S2.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S2.B6 RxPerBitDeskewCal: 2
W Mc1.C1.R1.S2.B6 RxPerBitDeskewCal: 2
W Mc1.C1.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S3.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S4.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S4.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S4.B2 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B2 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S4.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S4.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S4.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S5.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S5.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S5.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S5.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S5.B6 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S5.B6 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S5.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S6.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S7.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S7.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S7.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S7.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S7.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S7.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S7.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S7.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S7.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S7.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S7.B7 RxPerBitDeskewCal: 18 (0x12)
MRC task SenseAmp Offset Training -- SUCCEEDED, Status = 0h. Stack Depth: 151672
Post Code: DD28h
MRC task -- Early command training -- Started.
Start Bit Swizzle
W Mc0 GsmMccLDimmSize: 1
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1 GsmMccLDimmSize: 1
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 8
W Mc0.C0 GsmMctRDRDdr: 8
W Mc0.C1 GsmMctRDRDdg: 8
W Mc0.C1 GsmMctRDRDdr: 8
W Mc1.C0 GsmMctRDRDdg: 8
W Mc1.C0 GsmMctRDRDdr: 8
W Mc1.C1 GsmMctRDRDdg: 8
W Mc1.C1 GsmMctRDRDdr: 8
Running Bit 0
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Running Bit 1
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Running Bit 2
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Running Bit 3
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Running Bit 4
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Running Bit 5
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Running Bit 6
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Running Bit 7
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
MapCA2DQPins Results for Mc0.Ch0 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 0 1 6 7 3 2 5 4
CPU Byte1: 15 8 9 14 12 11 10 13
MapCA2DQPins Results for Mc0.Ch1 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 11 12 8 15 9 14 10 13
CPU Byte1: 3 4 7 0 6 1 5 2
MapCA2DQPins Results for Mc0.Ch2 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 4 5 3 2 7 1 0 6
CPU Byte1: 11 10 12 13 8 9 14 15
MapCA2DQPins Results for Mc0.Ch3 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 12 11 8 13 14 15 9 10
CPU Byte1: 4 7 3 2 1 6 0 5
MapCA2DQPins Results for Mc1.Ch0 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 11 10 9 8 12 13 15 14
CPU Byte1: 4 5 6 7 3 2 0 1
MapCA2DQPins Results for Mc1.Ch1 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 0 7 1 6 3 5 2 4
CPU Byte1: 9 8 10 11 14 15 13 12
MapCA2DQPins Results for Mc1.Ch2 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 4 5 6 1 3 2 7 0
CPU Byte1: 10 13 12 11 14 9 15 8
MapCA2DQPins Results for Mc1.Ch3 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 10 12 9 15 8 11 13 14
CPU Byte1: 3 4 1 2 6 0 5 7
Revert MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
Revert MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 0
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
End Bit Swizzle
LowFreqCsCmdSweepDone 1
Mc0C0R0 Mc0C1R0 Mc0C2R0 Mc0C3R0 Mc1C0R0 Mc1C1R0 Mc1C2R0 Mc1C3R0 Mc0C0R1 Mc0C1R1 Mc0C2R1 Mc0C3R1 Mc1C0R1 Mc1C1R1 Mc1C2R1 Mc1C3R1
CS: 88
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(88): 11
CS: 96
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(96): 11
CS: 104
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(104): 11
CS: 112
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(112): 11
CS: 120
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(120): 11
CS: 128
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(128): 11
CS: 136
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(136): 11
CS: 144
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(144): 11
CS: 152
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(152): 11
CS: 160
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(160): 11
CS: 168
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(168): 11
CS: 88
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
Selected values Mc0C0: CS = 88, CMD = 120
Selected values Mc0C1: CS = 88, CMD = 120
Selected values Mc0C2: CS = 88, CMD = 120
Selected values Mc0C3: CS = 88, CMD = 120
Selected values Mc1C0: CS = 88, CMD = 120
Selected values Mc1C1: CS = 88, CMD = 120
Selected values Mc1C2: CS = 88, CMD = 120
Selected values Mc1C3: CS = 88, CMD = 120
Mc0C0R0 Mc0C1R0 Mc0C2R0 Mc0C3R0 Mc1C0R0 Mc1C1R0 Mc1C2R0 Mc1C3R0 Mc0C0R1 Mc0C1R1 Mc0C2R1 Mc0C3R1 Mc1C0R1 Mc1C1R1 Mc1C2R1 Mc1C3R1
CS: 88 . . . . . . . . . . . . . . . .
CS: 96 . . . . . . . . . . . . . . . .
CS: 104 . . . . . . . . . . . . . . . .
Final selected values Mc0C0: CS = 92, CMD = 120
Final selected values Mc0C1: CS = 92, CMD = 120
Final selected values Mc0C2: CS = 92, CMD = 120
Final selected values Mc0C3: CS = 92, CMD = 120
Final selected values Mc1C0: CS = 92, CMD = 120
Final selected values Mc1C1: CS = 92, CMD = 120
Final selected values Mc1C2: CS = 92, CMD = 120
Final selected values Mc1C3: CS = 92, CMD = 120
EarlyChipSelectTrainingLp4 started
PiLow = 88, PiHigh = 168 PiStep = 2
R0: MrcSendCaVrefOnDq done
Mc0Ch0 p1 Mc0Ch1 p1 Mc0Ch2 p1 Mc0Ch3 p1 Mc1Ch0 p1 Mc1Ch1 p1 Mc1Ch2 p1 Mc1Ch3 p1 Mc0Ch0 p2 Mc0Ch1 p2 Mc0Ch2 p2 Mc0Ch3 p2 Mc1Ch0 p2 Mc1Ch1 p2 Mc1Ch2 p2 Mc1Ch3 p2
CTL PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
90: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
92: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
94: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
96: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
98: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
100: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
102: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
104: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
106: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
108: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
110: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
112: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
114: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
116: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
118: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
120: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
122: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
124: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
126: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
128: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
130: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
132: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
134: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
136: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
138: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
140: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
142: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
144: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
146: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
148: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
150: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
152: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
154: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
156: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
158: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
160: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
162: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
164: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
166: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
168: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
CS training data Mc0 Ch0 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch1 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc0 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch0 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch1 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
R1: MrcSendCaVrefOnDq done
Mc0Ch0 p1 Mc0Ch1 p1 Mc0Ch2 p1 Mc0Ch3 p1 Mc1Ch0 p1 Mc1Ch1 p1 Mc1Ch2 p1 Mc1Ch3 p1 Mc0Ch0 p2 Mc0Ch1 p2 Mc0Ch2 p2 Mc0Ch3 p2 Mc1Ch0 p2 Mc1Ch1 p2 Mc1Ch2 p2 Mc1Ch3 p2
CTL PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
90: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
92: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
94: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
96: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
98: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
100: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
102: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
104: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
106: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
108: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
110: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
112: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
114: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
116: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
118: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
120: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
122: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
124: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
126: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
128: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
130: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
132: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
134: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
136: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
138: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
140: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
142: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
144: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
146: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
148: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
150: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
152: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
154: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
156: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
158: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
160: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
162: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
164: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
166: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
168: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
CS training data Mc0 Ch0 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch1 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc0 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch0 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch1 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
Finding best CS PIs:
Mc0C0 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C1 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C2 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C3 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C0 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C1 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C2 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C3 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
EarlyCaTraining started
PiLow = 88, PiHigh = 168, PiStep = 2
R0: MrcSendCaVrefOnDq done
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
CMD PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: .A4 .91 .29 .4A .25 .49 .2A .64
90: .A4 .91 .29 .4A .25 .49 .2A .64
92: .A4 .91 .29 .4A .25 .49 .2A .64
94: .A4 .91 .29 .4A .25 .49 .2A .64
96: .A4 .91 .29 .4A .25 .49 .2A .64
98: .A4 .91 .29 .4A .25 .49 .2A .64
100: .A4 .91 .29 .4A .25 .49 .2A .64
102: .A4 .91 .29 .4A .25 .49 .2A .64
104: .A4 .91 .29 .4A .25 .49 .2A .64
106: .A4 .91 .29 .4A .25 .49 .2A .64
108: .A4 .91 .29 .4A .25 .49 .2A .64
110: .A4 .91 .29 .4A .25 .49 .2A .64
112: .A4 .91 .29 .4A .25 .49 .2A .64
114: .A4 .91 .29 .4A .25 .49 .2A .64
116: .A4 .91 .29 .4A .25 .49 .2A .64
118: .A4 .91 .29 .4A .25 .49 .2A .64
120: .A4 .91 .29 .4A .25 .49 .2A .64
122: .A4 .91 .29 .4A .25 .49 .2A .64
124: .A4 .91 .29 .4A .25 .49 .2A .64
126: .A4 .91 .29 .4A .25 .49 .2A .64
128: .A4 .91 .29 .4A .25 .49 .2A .64
130: .A4 .91 .29 .4A .25 .49 .2A .64
132: .A4 .91 .29 .4A .25 .49 .2A .64
134: .A4 .91 .29 .4A .25 .49 .2A .64
136: .A4 .91 .29 .4A .25 .49 .2A .64
138: .A4 .91 .29 .4A .25 .49 .2A .64
140: .A4 .91 .29 .4A .25 .49 .2A .64
142: .A4 .91 .29 .4A .25 .49 .2A .64
144: .A4 .91 .29 .4A .25 .49 .2A .64
146: .A4 .91 .29 .4A .25 .49 .2A .64
148: .A4 .91 .29 .4A .25 .49 .2A .64
150: .A4 .91 .29 .4A .25 .49 .2A .64
152: .A4 .91 .29 .4A .25 .49 .2A .64
154: .A4 .91 .29 .4A .25 .49 .2A .64
156: .A4 .91 .29 .4A .25 .49 .2A .64
158: .A4 .91 .29 .4A .25 .49 .2A .64
160: .A4 .91 .29 .4A .25 .49 .2A .64
162: .A4 .91 .29 .4A .25 .49 .2A .64
164: .A4 .91 .29 .4A .25 .49 .2A .64
166: .A4 .91 .29 .4A .25 .49 .2A .64
168: .A4 .91 .29 .4A .25 .49 .2A .64
CA training data Mc0 Ch0 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch1 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc0 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch0 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch1 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
R1: MrcSendCaVrefOnDq done
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
CMD PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: .A4 .91 .29 .4A .25 .49 .2A .64
90: .A4 .91 .29 .4A .25 .49 .2A .64
92: .A4 .91 .29 .4A .25 .49 .2A .64
94: .A4 .91 .29 .4A .25 .49 .2A .64
96: .A4 .91 .29 .4A .25 .49 .2A .64
98: .A4 .91 .29 .4A .25 .49 .2A .64
100: .A4 .91 .29 .4A .25 .49 .2A .64
102: .A4 .91 .29 .4A .25 .49 .2A .64
104: .A4 .91 .29 .4A .25 .49 .2A .64
106: .A4 .91 .29 .4A .25 .49 .2A .64
108: .A4 .91 .29 .4A .25 .49 .2A .64
110: .A4 .91 .29 .4A .25 .49 .2A .64
112: .A4 .91 .29 .4A .25 .49 .2A .64
114: .A4 .91 .29 .4A .25 .49 .2A .64
116: .A4 .91 .29 .4A .25 .49 .2A .64
118: .A4 .91 .29 .4A .25 .49 .2A .64
120: .A4 .91 .29 .4A .25 .49 .2A .64
122: .A4 .91 .29 .4A .25 .49 .2A .64
124: .A4 .91 .29 .4A .25 .49 .2A .64
126: .A4 .91 .29 .4A .25 .49 .2A .64
128: .A4 .91 .29 .4A .25 .49 .2A .64
130: .A4 .91 .29 .4A .25 .49 .2A .64
132: .A4 .91 .29 .4A .25 .49 .2A .64
134: .A4 .91 .29 .4A .25 .49 .2A .64
136: .A4 .91 .29 .4A .25 .49 .2A .64
138: .A4 .91 .29 .4A .25 .49 .2A .64
140: .A4 .91 .29 .4A .25 .49 .2A .64
142: .A4 .91 .29 .4A .25 .49 .2A .64
144: .A4 .91 .29 .4A .25 .49 .2A .64
146: .A4 .91 .29 .4A .25 .49 .2A .64
148: .A4 .91 .29 .4A .25 .49 .2A .64
150: .A4 .91 .29 .4A .25 .49 .2A .64
152: .A4 .91 .29 .4A .25 .49 .2A .64
154: .A4 .91 .29 .4A .25 .49 .2A .64
156: .A4 .91 .29 .4A .25 .49 .2A .64
158: .A4 .91 .29 .4A .25 .49 .2A .64
160: .A4 .91 .29 .4A .25 .49 .2A .64
162: .A4 .91 .29 .4A .25 .49 .2A .64
164: .A4 .91 .29 .4A .25 .49 .2A .64
166: .A4 .91 .29 .4A .25 .49 .2A .64
168: .A4 .91 .29 .4A .25 .49 .2A .64
CA training data Mc0 Ch0 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch1 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc0 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch0 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch1 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
Finding best CMD PIs:
Mc0C0 Left Right Center
CAA 88 168 128
Mc0C1 Left Right Center
CAA 88 168 128
Mc0C2 Left Right Center
CAA 88 168 128
Mc0C3 Left Right Center
CAA 88 168 128
Mc1C0 Left Right Center
CAA 88 168 128
Mc1C1 Left Right Center
CAA 88 168 128
Mc1C2 Left Right Center
CAA 88 168 128
Mc1C3 Left Right Center
CAA 88 168 128
Mc0.Ch0 DESWIZZLE_LOW=0x825C8F948, DESWIZZLE_LOW_ERM=0x825C8F948
DqsMapCpu2Dram[0]: 0
Mc0.Ch0 Byte0 WrRetrainSwizzleControl=0x006B7948
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc0.Ch0 Byte1 WrRetrainSwizzleControl=0x016B7948
Mc0.Ch1 DESWIZZLE_HIGH=0x2508D111EB, DESWIZZLE_HIGH_ERM=0x2508D111EB
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc0.Ch1 Byte0 WrRetrainSwizzleControl=0x015311EB
DqsMapCpu2Dram[1]: 0
Mc0.Ch1 Byte1 WrRetrainSwizzleControl=0x005311EB
Mc0.Ch2 DESWIZZLE_LOW=0x8103604EE, DESWIZZLE_LOW_ERM=0x8103604EE
DqsMapCpu2Dram[0]: 0
Mc0.Ch2 Byte0 WrRetrainSwizzleControl=0x009C84EE
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc0.Ch2 Byte1 WrRetrainSwizzleControl=0x019C84EE
Mc0.Ch3 DESWIZZLE_HIGH=0x2501F904E6, DESWIZZLE_HIGH_ERM=0x2501F904E6
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc0.Ch3 Byte0 WrRetrainSwizzleControl=0x013784E6
DqsMapCpu2Dram[1]: 0
Mc0.Ch3 Byte1 WrRetrainSwizzleControl=0x003784E6
Mc1.Ch0 DESWIZZLE_LOW=0x12029897E, DESWIZZLE_LOW_ERM=0x12029897E
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc1.Ch0 Byte0 WrRetrainSwizzleControl=0x0168897E
DqsMapCpu2Dram[1]: 0
Mc1.Ch0 Byte1 WrRetrainSwizzleControl=0x0068897E
Mc1.Ch1 DESWIZZLE_HIGH=0x2C3B40F990, DESWIZZLE_HIGH_ERM=0x2C3B40F990
DqsMapCpu2Dram[0]: 0
Mc1.Ch1 Byte0 WrRetrainSwizzleControl=0x002EF990
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc1.Ch1 Byte1 WrRetrainSwizzleControl=0x012EF990
Mc1.Ch2 DESWIZZLE_LOW=0x81317895F, DESWIZZLE_LOW_ERM=0x81317895F
DqsMapCpu2Dram[0]: 0
Mc1.Ch2 Byte0 WrRetrainSwizzleControl=0x00C8895F
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc1.Ch2 Byte1 WrRetrainSwizzleControl=0x01C8895F
Mc1.Ch3 DESWIZZLE_HIGH=0x250D0A10D5, DESWIZZLE_HIGH_ERM=0x250D0A10D5
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc1.Ch3 Byte0 WrRetrainSwizzleControl=0x01F310D5
DqsMapCpu2Dram[1]: 0
Mc1.Ch3 Byte1 WrRetrainSwizzleControl=0x00F310D5
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task Early command training -- SUCCEEDED, Status = 0h. Stack Depth: 152116
Post Code: DD2Bh
MRC task -- Read Leveling training -- Started.
W Mc0.C0.R0 RxIoTclDelay: 3
W Mc0.C0.R1 RxIoTclDelay: 3
R Mc0.C0.S0 GsmIocForceOdtOn: 1
W Mc0.C1.R0 RxIoTclDelay: 3
W Mc0.C1.R1 RxIoTclDelay: 3
W Mc0.C2.R0 RxIoTclDelay: 3
W Mc0.C2.R1 RxIoTclDelay: 3
W Mc0.C3.R0 RxIoTclDelay: 3
W Mc0.C3.R1 RxIoTclDelay: 3
W Mc1.C4.R0 RxIoTclDelay: 3
W Mc1.C4.R1 RxIoTclDelay: 3
W Mc1.C5.R0 RxIoTclDelay: 3
W Mc1.C5.R1 RxIoTclDelay: 3
W Mc1.C6.R0 RxIoTclDelay: 3
W Mc1.C6.R1 RxIoTclDelay: 3
W Mc1.C7.R0 RxIoTclDelay: 3
W Mc1.C7.R1 RxIoTclDelay: 3
W Mc0.C0.S0 GsmIocForceOdtOn: 0
W Mc0.C0.S1 GsmIocForceOdtOn: 0
W Mc0.C0.S2 GsmIocForceOdtOn: 0
W Mc0.C0.S3 GsmIocForceOdtOn: 0
W Mc0.C0.S4 GsmIocForceOdtOn: 0
W Mc0.C0.S5 GsmIocForceOdtOn: 0
W Mc0.C0.S6 GsmIocForceOdtOn: 0
W Mc0.C0.S7 GsmIocForceOdtOn: 0
W Mc1.C1.S0 GsmIocForceOdtOn: 0
W Mc1.C1.S1 GsmIocForceOdtOn: 0
W Mc1.C1.S2 GsmIocForceOdtOn: 0
W Mc1.C1.S3 GsmIocForceOdtOn: 0
W Mc1.C1.S4 GsmIocForceOdtOn: 0
W Mc1.C1.S5 GsmIocForceOdtOn: 0
W Mc1.C1.S6 GsmIocForceOdtOn: 0
W Mc1.C1.S7 GsmIocForceOdtOn: 0
Rank 0
Step 1 Find Middle of high region
Ch/Byte 0 1
RcvEnPi 012345678 012345678
256: 11 00 00 00 00 00 11 00
264: 11 00 00 00 00 00 11 00
272: 11 00 00 01 11 00 01 10
280: 00 00 00 11 11 00 00 10
288: 00 00 00 11 11 01 00 11
296: 00 11 10 11 11 01 00 11
304: 00 11 11 11 11 11 00 11
312: 00 11 11 11 11 11 00 11
320: 00 11 11 11 11 11 00 11
328: 00 11 11 11 11 11 00 11
336: 00 11 11 11 10 11 10 11
344: 11 11 11 00 00 11 11 01
352: 11 11 11 00 00 11 11 00
360: 11 00 11 00 00 11 11 00
368: 11 00 01 00 00 00 11 00
376: 11 00 00 00 00 00 11 00
384: 11 00 00 00 00 00 11 00
392: 11 00 00 00 00 00 11 00
400: 11 00 00 11 11 00 01 10
408: 00 00 00 11 11 00 00 10
416: 00 01 00 11 11 01 00 11
424: 00 11 10 11 11 01 00 11
432: 00 11 11 11 11 11 00 11
440: 00 11 11 11 11 11 00 11
Mc0C0.R0: Left Right Width Center
B0: 344 400 56 372
B1: 344 400 56 372
Mc0C1.R0: Left Right Width Center
B0: 296 352 56 324
B1: 296 352 56 324
Mc0C2.R0: Left Right Width Center
B0: 296 360 64 328
B1: 304 368 64 336
Mc0C3.R0: Left Right Width Center
B0: 280 336 56 308
B1: 272 336 64 304
Mc1C0.R0: Left Right Width Center
B0: 272 336 64 304
B1: 272 328 56 300
Mc1C1.R0: Left Right Width Center
B0: 304 360 56 332
B1: 288 360 72 324
Mc1C2.R0: Left Right Width Center
B0: 336 392 56 364
B1: 344 400 56 372
Mc1C3.R0: Left Right Width Center
B0: 272 336 64 304
B1: 288 344 56 316
Step 2: Move cycle delay from Byte to Channel
Mc0.C0
Mc0.C1
Mc0.C2
Mc0.C3
Mc1.C0
Mc1.C1
Mc1.C2
Mc1.C3
Step 3: Quarter Preamble - Walk Backwards (In PI ticks)
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H
-128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H
-256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H
-384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H
-512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H
-640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H
-768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H
-896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H
-1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H
-1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H
-1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H
-1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H
-1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1664 H H -1664 H H -1664 H H -1664 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1792 H H -1792 H H -1792 H H -1792 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1920 L L -1920 L L -1920 L L -1920 L L
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 372
B1: 372
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 324
B1: 324
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 328
B1: 336
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 308
B1: 304
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 304
B1: 300
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 332
B1: 324
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 364
B1: 372
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 304
B1: 316
Step 4: Add 1qclk.
W Mc0.C0.R0.S0 RecEnDelay: 436 (0x1B4)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 436 (0x1B4)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R0.S2 RecEnDelay: 388 (0x184)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 388 (0x184)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R0.S4 RecEnDelay: 392 (0x188)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 400 (0x190)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R0.S6 RecEnDelay: 372 (0x174)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R0.S0 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 364 (0x16C)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R0.S2 RecEnDelay: 396 (0x18C)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 388 (0x184)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R0.S4 RecEnDelay: 428 (0x1AC)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 436 (0x1B4)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R0.S6 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 380 (0x17C)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
Step 5: Walk forward to find rising edge
ChResult[Mc0][Ch0]: 0x3
ChResult[Mc0][Ch1]: 0x3
ChResult[Mc0][Ch2]: 0x3
ChResult[Mc0][Ch3]: 0x3
ChResult[Mc1][Ch0]: 0x3
ChResult[Mc1][Ch1]: 0x3
ChResult[Mc1][Ch2]: 0x3
ChResult[Mc1][Ch3]: 0x3
Step 6: Mid Preamble
Mc0.Ch0: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 29
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 367
B1: 370
Mc0.Ch1: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 23
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 319
B1: 316
Mc0.Ch2: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 26
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 323
B1: 331
Mc0.Ch3: Preamble Increment
B0, IncPreAmble 29
B1, IncPreAmble 26
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 306
B1: 299
Mc1.Ch0: Preamble Increment
B0, IncPreAmble 28
B1, IncPreAmble 30
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 301
B1: 299
Mc1.Ch1: Preamble Increment
B0, IncPreAmble 26
B1, IncPreAmble 24
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 327
B1: 317
Mc1.Ch2: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 27
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 360
B1: 368
Mc1.Ch3: Preamble Increment
B0, IncPreAmble 30
B1, IncPreAmble 25
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 303
B1: 310
Rank 1
Step 1 Find Middle of high region
Ch/Byte 0 1
RcvEnPi 012345678 012345678
256: 11 00 00 00 00 00 11 00
264: 11 00 00 00 00 00 11 00
272: 11 00 00 11 11 00 11 00
280: 00 00 00 11 11 00 11 10
288: 00 11 00 11 11 00 01 10
296: 00 11 10 11 11 00 00 11
304: 00 11 11 11 11 01 00 11
312: 00 11 11 11 11 11 00 11
320: 00 11 11 11 11 11 00 11
328: 00 11 11 11 11 11 00 11
336: 11 11 11 10 11 11 00 11
344: 11 11 11 00 00 11 10 11
352: 11 11 11 00 00 11 11 01
360: 11 00 11 00 00 11 11 01
368: 11 00 01 00 00 11 11 00
376: 11 00 00 00 00 10 11 00
384: 11 00 00 00 00 00 11 00
392: 11 00 00 00 00 00 11 00
400: 11 00 00 11 11 00 11 00
408: 00 00 00 11 11 00 01 10
416: 00 11 00 11 11 00 00 10
424: 00 11 10 11 11 00 00 11
432: 00 11 11 11 11 01 00 11
440: 00 11 11 11 11 11 00 11
Mc0C0.R1: Left Right Width Center
B0: 336 400 64 368
B1: 336 400 64 368
Mc0C1.R1: Left Right Width Center
B0: 288 352 64 320
B1: 288 352 64 320
Mc0C2.R1: Left Right Width Center
B0: 296 360 64 328
B1: 304 368 64 336
Mc0C3.R1: Left Right Width Center
B0: 272 336 64 304
B1: 272 328 56 300
Mc1C0.R1: Left Right Width Center
B0: 272 336 64 304
B1: 272 336 64 304
Mc1C1.R1: Left Right Width Center
B0: 312 376 64 344
B1: 304 368 64 336
Mc1C2.R1: Left Right Width Center
B0: 344 400 56 372
B1: 352 408 56 380
Mc1C3.R1: Left Right Width Center
B0: 280 344 64 312
B1: 296 360 64 328
Step 2: Move cycle delay from Byte to Channel
Mc0.C0
Mc0.C1
Mc0.C2
Mc0.C3
Mc1.C0
Mc1.C1
Mc1.C2
Mc1.C3
Step 3: Quarter Preamble - Walk Backwards (In PI ticks)
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H
-128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H
-256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H
-384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H
-512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H
-640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H
-768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H
-896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H
-1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H
-1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H
-1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H
-1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H
-1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1664 H H -1664 H H -1664 H H -1664 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1792 H H -1792 H H -1792 H H -1792 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1920 L L -1920 L L -1920 L L -1920 L L
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 368
B1: 368
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 320
B1: 320
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 328
B1: 336
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 304
B1: 300
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 304
B1: 304
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 344
B1: 336
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 372
B1: 380
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 312
B1: 328
Step 4: Add 1qclk.
W Mc0.C0.R1.S0 RecEnDelay: 432 (0x1B0)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R1.S1 RecEnDelay: 432 (0x1B0)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1.S2 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R1.S3 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R1.S4 RecEnDelay: 392 (0x188)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R1.S5 RecEnDelay: 400 (0x190)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R1.S6 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R1.S7 RecEnDelay: 364 (0x16C)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R1.S0 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R1.S1 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R1.S2 RecEnDelay: 408 (0x198)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R1.S3 RecEnDelay: 400 (0x190)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R1.S4 RecEnDelay: 436 (0x1B4)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R1.S5 RecEnDelay: 444 (0x1BC)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R1.S6 RecEnDelay: 376 (0x178)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R1.S7 RecEnDelay: 392 (0x188)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
Step 5: Walk forward to find rising edge
ChResult[Mc0][Ch0]: 0x3
ChResult[Mc0][Ch1]: 0x3
ChResult[Mc0][Ch2]: 0x3
ChResult[Mc0][Ch3]: 0x3
ChResult[Mc1][Ch0]: 0x3
ChResult[Mc1][Ch1]: 0x3
ChResult[Mc1][Ch2]: 0x3
ChResult[Mc1][Ch3]: 0x3
Step 6: Mid Preamble
Mc0.Ch0: Preamble Increment
B0, IncPreAmble 29
B1, IncPreAmble 29
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 366
B1: 366
Mc0.Ch1: Preamble Increment
B0, IncPreAmble 23
B1, IncPreAmble 21
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 312
B1: 310
Mc0.Ch2: Preamble Increment
B0, IncPreAmble 23
B1, IncPreAmble 25
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 320
B1: 330
Mc0.Ch3: Preamble Increment
B0, IncPreAmble 29
B1, IncPreAmble 29
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 302
B1: 298
Mc1.Ch0: Preamble Increment
B0, IncPreAmble 31
B1, IncPreAmble 31
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 304
B1: 304
Mc1.Ch1: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 23
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 338
B1: 328
Mc1.Ch2: Preamble Increment
B0, IncPreAmble 31
B1, IncPreAmble 31
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 372
B1: 380
Mc1.Ch3: Preamble Increment
B0, IncPreAmble 30
B1, IncPreAmble 21
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 311
B1: 318
W Mc0.C0.S0 GsmIocForceOdtOn: 1
W Mc0.C0.S1 GsmIocForceOdtOn: 1
W Mc0.C0.S2 GsmIocForceOdtOn: 1
W Mc0.C0.S3 GsmIocForceOdtOn: 1
W Mc0.C0.S4 GsmIocForceOdtOn: 1
W Mc0.C0.S5 GsmIocForceOdtOn: 1
W Mc0.C0.S6 GsmIocForceOdtOn: 1
W Mc0.C0.S7 GsmIocForceOdtOn: 1
W Mc1.C1.S0 GsmIocForceOdtOn: 1
W Mc1.C1.S1 GsmIocForceOdtOn: 1
W Mc1.C1.S2 GsmIocForceOdtOn: 1
W Mc1.C1.S3 GsmIocForceOdtOn: 1
W Mc1.C1.S4 GsmIocForceOdtOn: 1
W Mc1.C1.S5 GsmIocForceOdtOn: 1
W Mc1.C1.S6 GsmIocForceOdtOn: 1
W Mc1.C1.S7 GsmIocForceOdtOn: 1
Step 7: Program RcvEn Delays and Rx FIFO Timing
W Mc0.C0 RoundTripIoComp: 18 (0x12)
W Mc0.C0 RxDqDataValidDclkDelay: 25 (0x19)
W Mc0.C0.R0 RxIoTclDelay: 0
W Mc0.C0.R0 RxFifoRdEnTclDelay: 8
W Mc0.C0.R0 RoundTripDelay: 88 (0x58)
W Mc0.C0.R0.S0 RecEnDelay: 495 (0x1EF)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 498 (0x1F2)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1 RxIoTclDelay: 0
W Mc0.C0.R1 RxFifoRdEnTclDelay: 8
W Mc0.C0.R1 RoundTripDelay: 88 (0x58)
W Mc0.C0.R1.S0 RecEnDelay: 494 (0x1EE)
W Mc0.C0.R0.S0 RxFlybyDelay: 6
W Mc0.C0.R1.S1 RecEnDelay: 494 (0x1EE)
W Mc0.C0.R0.S1 RxFlybyDelay: 6
W Mc0.C1 RoundTripIoComp: 17 (0x11)
W Mc0.C1 RxDqDataValidDclkDelay: 24 (0x18)
W Mc0.C1.R0 RxIoTclDelay: 0
W Mc0.C1.R0 RxFifoRdEnTclDelay: 9
W Mc0.C1.R0 RoundTripDelay: 87 (0x57)
W Mc0.C0.R0.S2 RecEnDelay: 575 (0x23F)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 572 (0x23C)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C1.R1 RxIoTclDelay: 0
W Mc0.C1.R1 RxFifoRdEnTclDelay: 9
W Mc0.C1.R1 RoundTripDelay: 87 (0x57)
W Mc0.C0.R1.S2 RecEnDelay: 568 (0x238)
W Mc0.C0.R0.S2 RxFlybyDelay: 8
W Mc0.C0.R1.S3 RecEnDelay: 566 (0x236)
W Mc0.C0.R0.S3 RxFlybyDelay: 8
W Mc0.C2 RoundTripIoComp: 18 (0x12)
W Mc0.C2 RxDqDataValidDclkDelay: 25 (0x19)
W Mc0.C2.R0 RxIoTclDelay: 0
W Mc0.C2.R0 RxFifoRdEnTclDelay: 8
W Mc0.C2.R0 RoundTripDelay: 88 (0x58)
W Mc0.C0.R0.S4 RecEnDelay: 451 (0x1C3)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 459 (0x1CB)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C2.R1 RxIoTclDelay: 0
W Mc0.C2.R1 RxFifoRdEnTclDelay: 8
W Mc0.C2.R1 RoundTripDelay: 88 (0x58)
W Mc0.C0.R1.S4 RecEnDelay: 448 (0x1C0)
W Mc0.C0.R0.S4 RxFlybyDelay: 6
W Mc0.C0.R1.S5 RecEnDelay: 458 (0x1CA)
W Mc0.C0.R0.S5 RxFlybyDelay: 6
W Mc0.C3 RoundTripIoComp: 17 (0x11)
W Mc0.C3 RxDqDataValidDclkDelay: 24 (0x18)
W Mc0.C3.R0 RxIoTclDelay: 0
W Mc0.C3.R0 RxFifoRdEnTclDelay: 9
W Mc0.C3.R0 RoundTripDelay: 87 (0x57)
W Mc0.C0.R0.S6 RecEnDelay: 562 (0x232)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 555 (0x22B)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C3.R1 RxIoTclDelay: 0
W Mc0.C3.R1 RxFifoRdEnTclDelay: 9
W Mc0.C3.R1 RoundTripDelay: 87 (0x57)
W Mc0.C0.R1.S6 RecEnDelay: 558 (0x22E)
W Mc0.C0.R0.S6 RxFlybyDelay: 8
W Mc0.C0.R1.S7 RecEnDelay: 554 (0x22A)
W Mc0.C0.R0.S7 RxFlybyDelay: 8
W Mc1.C4 RoundTripIoComp: 15 (0xF)
W Mc1.C4 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C4.R0 RxIoTclDelay: 0
W Mc1.C4.R0 RxFifoRdEnTclDelay: 9
W Mc1.C0.R0 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R0.S0 RecEnDelay: 557 (0x22D)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 555 (0x22B)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C4.R1 RxIoTclDelay: 0
W Mc1.C4.R1 RxFifoRdEnTclDelay: 9
W Mc1.C0.R1 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R1.S0 RecEnDelay: 560 (0x230)
W Mc1.C1.R0.S0 RxFlybyDelay: 8
W Mc1.C1.R1.S1 RecEnDelay: 560 (0x230)
W Mc1.C1.R0.S1 RxFlybyDelay: 8
W Mc1.C5 RoundTripIoComp: 15 (0xF)
W Mc1.C5 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C5.R0 RxIoTclDelay: 0
W Mc1.C5.R0 RxFifoRdEnTclDelay: 10 (0xA)
W Mc1.C1.R0 RoundTripDelay: 80 (0x50)
W Mc1.C1.R0.S2 RecEnDelay: 583 (0x247)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 573 (0x23D)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C5.R1 RxIoTclDelay: 0
W Mc1.C5.R1 RxFifoRdEnTclDelay: 10 (0xA)
W Mc1.C1.R1 RoundTripDelay: 80 (0x50)
W Mc1.C1.R1.S2 RecEnDelay: 594 (0x252)
W Mc1.C1.R0.S2 RxFlybyDelay: 8
W Mc1.C1.R1.S3 RecEnDelay: 584 (0x248)
W Mc1.C1.R0.S3 RxFlybyDelay: 8
W Mc1.C6 RoundTripIoComp: 16 (0x10)
W Mc1.C6 RxDqDataValidDclkDelay: 21 (0x15)
W Mc1.C6.R0 RxIoTclDelay: 0
W Mc1.C6.R0 RxFifoRdEnTclDelay: 8
W Mc1.C2.R0 RoundTripDelay: 80 (0x50)
W Mc1.C1.R0.S4 RecEnDelay: 488 (0x1E8)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 496 (0x1F0)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C6.R1 RxIoTclDelay: 0
W Mc1.C6.R1 RxFifoRdEnTclDelay: 8
W Mc1.C2.R1 RoundTripDelay: 80 (0x50)
W Mc1.C1.R1.S4 RecEnDelay: 500 (0x1F4)
W Mc1.C1.R0.S4 RxFlybyDelay: 6
W Mc1.C1.R1.S5 RecEnDelay: 508 (0x1FC)
W Mc1.C1.R0.S5 RxFlybyDelay: 6
W Mc1.C7 RoundTripIoComp: 15 (0xF)
W Mc1.C7 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C7.R0 RxIoTclDelay: 0
W Mc1.C7.R0 RxFifoRdEnTclDelay: 9
W Mc1.C3.R0 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R0.S6 RecEnDelay: 559 (0x22F)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 566 (0x236)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C7.R1 RxIoTclDelay: 0
W Mc1.C7.R1 RxFifoRdEnTclDelay: 9
W Mc1.C3.R1 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R1.S6 RecEnDelay: 567 (0x237)
W Mc1.C1.R0.S6 RxFlybyDelay: 8
W Mc1.C1.R1.S7 RecEnDelay: 574 (0x23E)
W Mc1.C1.R0.S7 RxFlybyDelay: 8
Adjusted Receive Enable Settings.
Mc0.Ch0.R0:
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 495
B1: 498
Mc0.Ch0.R1:
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 494
B1: 494
Mc0.Ch1.R0:
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 575
B1: 572
Mc0.Ch1.R1:
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 568
B1: 566
Mc0.Ch2.R0:
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 451
B1: 459
Mc0.Ch2.R1:
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 448
B1: 458
Mc0.Ch3.R0:
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 562
B1: 555
Mc0.Ch3.R1:
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 558
B1: 554
Mc1.Ch0.R0:
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 557
B1: 555
Mc1.Ch0.R1:
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 560
B1: 560
Mc1.Ch1.R0:
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 583
B1: 573
Mc1.Ch1.R1:
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 594
B1: 584
Mc1.Ch2.R0:
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 488
B1: 496
Mc1.Ch2.R1:
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 500
B1: 508
Mc1.Ch3.R0:
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 559
B1: 566
Mc1.Ch3.R1:
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 567
B1: 574
MRC task Read Leveling training -- SUCCEEDED, Status = 0h. Stack Depth: 154060
Post Code: DD2Ah
MRC task -- CPGC-Based Read MPR training -- Started.
Setting MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 1
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
Setting MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 1
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 8
W Mc0.C0 GsmMctRDRDdr: 8
W Mc0.C1 GsmMctRDRDdg: 8
W Mc0.C1 GsmMctRDRDdr: 8
W Mc1.C0 GsmMctRDRDdg: 8
W Mc1.C0 GsmMctRDRDdr: 8
W Mc1.C1 GsmMctRDRDdg: 8
W Mc1.C1 GsmMctRDRDdr: 8
--- CPGC-based RDMPR ---
Rank = 0
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-62 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-61 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-60 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-59 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-58 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-57 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-56 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-55 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-54 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-53 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-51 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-49 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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MC0.C0.R0: Left Right Width Center RxDqsPN
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MC0.C1.R0: Left Right Width Center RxDqsPN
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MC0.C2.R0: Left Right Width Center RxDqsPN
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MC0.C3.R0: Left Right Width Center RxDqsPN
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MC1.C0.R0: Left Right Width Center RxDqsPN
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MC1.C1.R0: Left Right Width Center RxDqsPN
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MC1.C2.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -27 4 31 -12 20
MC1.C3.R0: Left Right Width Center RxDqsPN
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--- CPGC-based RDMPR ---
Rank = 1
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
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-12 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
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-1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
0 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
2 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
3 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
4 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
MC0.C0.R1: Left Right Width Center RxDqsPN
B0: -28 4 32 -12 20
B1: -27 4 31 -12 20
MC0.C1.R1: Left Right Width Center RxDqsPN
B0: -20 4 24 -8 24
B1: -27 4 31 -12 20
MC0.C2.R1: Left Right Width Center RxDqsPN
B0: -28 4 32 -12 20
B1: -29 4 33 -13 19
MC0.C3.R1: Left Right Width Center RxDqsPN
B0: -15 4 19 -6 26
B1: -25 4 29 -11 21
MC1.C0.R1: Left Right Width Center RxDqsPN
B0: -29 4 33 -13 19
B1: -31 4 35 -14 18
MC1.C1.R1: Left Right Width Center RxDqsPN
B0: -31 4 35 -14 18
B1: -31 4 35 -14 18
MC1.C2.R1: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -30 4 34 -13 19
MC1.C3.R1: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -30 4 34 -13 19
Revert MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 0
Revert MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task CPGC-Based Read MPR training -- SUCCEEDED, Status = 0h.
Post Code: DD2Ch
MRC task -- Jedec Write Leveling training -- Started.
Rank 0
Ch0 Ch1
WLDelay 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
192: .30 .32 .32 .30 .32 .30 .32 .32 .30 .30 .32 .32 .32 .30 .30 .32
194: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
196: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
198: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
200: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
202: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
204: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
206: .32 .32 .32 .32 .32 #2 .32 .32 .32 .32 .32 .32 .32 .32 .32 #2
208: .32 .32 .32 .32 .32 #0 .32 .32 .32 .32 #2 .32 .32 #2 .32 #0
210: #2 #5 .29 .32 .32 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
212: #0 #0 #2 .32 .27 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
214: #0 #0 #0 .32 #2 #0 #2 .32 .32 .32 #0 #2 #2 #0 #2 #0
216: #0 #0 #0 #5 #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0
218: #0 #0 #0 #0 #0 #0 #0 .27 .32 .27 #0 #0 #0 #0 #0 #0
220: #0 #0 #0 #0 #0 #0 #0 #2 #2 #2 #0 #0 #0 #0 #0 #0
222: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
224: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
226: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
228: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
230: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
232: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
234: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
236: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
238: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
240: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
242: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
244: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
246: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
248: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
250: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
252: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
254: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
256: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
258: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
260: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
262: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
264: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
266: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
268: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
270: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
272: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
274: #0 #0 #0 #0 #0 .16 #0 #0 #0 #0 #0 #0 #0 .30 #0 .29
276: #10 #0 #0 #0 #0 .31 #0 #0 #0 #0 .26 #0 #0 .32 #0 .32
278: .30 .30 .21 #0 #0 .32 #0 #0 #0 #0 .32 #0 #0 .32 #0 .32
280: .32 .32 .31 #0 #0 .32 #0 #0 #0 #0 .32 #0 #0 .32 #0 .32
282: .32 .32 .32 #0 .30 .32 .30 #0 #0 #0 .32 .16 .30 .32 .30 .32
284: .32 .32 .32 #15 .32 .32 .32 #0 #0 #0 .32 .31 .32 .32 .32 .32
286: .32 .32 .32 .30 .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32
288: .32 .32 .32 .32 .32 .32 .32 .30 #0 .29 .32 .32 .32 .32 .32 .32
290: .32 .32 .32 .32 .32 .32 .32 .32 .30 .32 .32 .32 .32 .32 .32 .32
292: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
294: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
296: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
298: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
300: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
302: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
304: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
306: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
308: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
310: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
312: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
314: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
316: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
318: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
InitPassSt InitPassEn CurrPassSt CurrPassEn LargPassSt LargPassEn
Mc0
C0
B0: 192 208 278 336 278 336
B1: 192 208 278 336 278 336
C1
B0: 192 210 278 338 278 338
B1: 192 214 286 342 286 342
C2
B0: 192 212 282 340 282 340
B1: 192 204 274 332 274 332
C3
B0: 192 212 282 340 282 340
B1: 192 218 288 346 288 346
Mc1
C0
B0: 192 218 290 346 290 346
B1: 192 218 288 346 288 346
C1
B0: 192 206 276 334 276 334
B1: 192 212 282 340 282 340
C2
B0: 192 212 282 340 282 340
B1: 192 206 274 334 274 334
C3
B0: 192 212 282 340 282 340
B1: 192 204 274 332 274 332
W Mc0.C0 GsmMccOdtOn: 0
W Mc0.C0 GsmMccMprTrainDdrOn: 0
Mc0.C0.R0: LftEdge Width
B0: 278 58
B1: 278 58
Mc0.C0.R0: DqsPi DqPi
B0: 278 310
B1: 278 310
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc0.C1.R0: LftEdge Width
B0: 278 60
B1: 286 56
Mc0.C1.R0: DqsPi DqPi
B0: 278 310
B1: 286 318
W Mc0.C1 GsmMccOdtOn: 0
W Mc0.C1 GsmMccMprTrainDdrOn: 0
Mc0.C2.R0: LftEdge Width
B0: 282 58
B1: 274 58
Mc0.C2.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc0.C3.R0: LftEdge Width
B0: 282 58
B1: 288 58
Mc0.C3.R0: DqsPi DqPi
B0: 282 314
B1: 288 320
W Mc1.C0 GsmMccOdtOn: 0
W Mc1.C0 GsmMccMprTrainDdrOn: 0
Mc1.C0.R0: LftEdge Width
B0: 290 56
B1: 288 58
Mc1.C0.R0: DqsPi DqPi
B0: 290 322
B1: 288 320
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc1.C1.R0: LftEdge Width
B0: 276 58
B1: 282 58
Mc1.C1.R0: DqsPi DqPi
B0: 276 308
B1: 282 314
W Mc1.C1 GsmMccOdtOn: 0
W Mc1.C1 GsmMccMprTrainDdrOn: 0
Mc1.C2.R0: LftEdge Width
B0: 282 58
B1: 274 60
Mc1.C2.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc1.C3.R0: LftEdge Width
B0: 282 58
B1: 274 58
Mc1.C3.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
Rank 1
Ch0 Ch1
WLDelay 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
192: .30 .32 .32 .32 .30 .32 .32 .30 .30 .30 .30 .30 .30 .32 .30 .32
194: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
196: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
198: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
200: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
202: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
204: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
206: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 #12 .32 #3
208: .32 .32 .32 .32 .32 #4 .32 .32 .32 .32 #2 .32 .32 #2 .32 #0
210: #11 #2 .32 .32 .32 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
212: #1 #0 #5 .32 .32 #0 .32 .32 .32 .32 #0 .25 .32 #0 .32 #0
214: #0 #0 #0 .32 #11 #0 #3 .32 .32 .32 #0 #2 #2 #0 #2 #0
216: #0 #0 #0 .32 #1 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0
218: #0 #0 #0 #2 #0 #0 #0 .32 .32 #3 #0 #0 #0 #0 #0 #0
220: #0 #0 #0 #0 #0 #0 #0 #2 #11 #0 #0 #0 #0 #0 #0 #0
222: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
224: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
226: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
228: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
230: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
232: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
234: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
236: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
238: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
240: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
242: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
244: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
246: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
248: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
250: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
252: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
254: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
256: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
258: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
260: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
262: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
264: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
266: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
268: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
270: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
272: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
274: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 .30 #0 .24
276: #0 #13 #0 #0 #0 .30 #0 #0 #0 #0 #0 #0 #0 .32 #0 .31
278: .30 .32 #0 #0 #0 .32 #0 #0 #0 #0 .30 #0 #0 .32 #0 .32
280: .32 .32 .30 #0 #0 .32 #0 #0 #0 #0 .32 #0 .31 .32 #0 .32
282: .32 .32 .32 #0 #0 .32 #3 #0 #0 #0 .32 #0 .32 .32 #0 .32
284: .32 .32 .32 #0 .30 .32 .30 #0 #0 #0 .32 .30 .32 .32 .30 .32
286: .32 .32 .32 .30 .32 .32 .32 .20 #0 #0 .32 .32 .32 .32 .32 .32
288: .32 .32 .32 .32 .32 .32 .32 .31 #0 #7 .32 .32 .32 .32 .32 .32
290: .32 .32 .32 .32 .32 .32 .32 .32 .30 .31 .32 .32 .32 .32 .32 .32
292: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
294: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
296: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
298: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
300: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
302: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
304: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
306: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
308: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
310: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
312: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
314: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
316: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
318: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
InitPassSt InitPassEn CurrPassSt CurrPassEn LargPassSt LargPassEn
Mc0
C0
B0: 192 208 278 336 278 336
B1: 192 208 278 336 278 336
C1
B0: 192 210 280 338 280 338
B1: 192 216 286 344 286 344
C2
B0: 192 212 284 340 284 340
B1: 192 206 276 334 276 334
C3
B0: 192 212 284 340 284 340
B1: 192 218 286 346 286 346
Mc1
C0
B0: 192 218 290 346 290 346
B1: 192 216 290 344 290 344
C1
B0: 192 206 278 334 278 334
B1: 192 212 284 340 284 340
C2
B0: 192 212 280 340 280 340
B1: 192 204 274 332 274 332
C3
B0: 192 212 284 340 284 340
B1: 192 204 274 332 274 332
W Mc0.C0 GsmMccOdtOn: 0
W Mc0.C0 GsmMccMprTrainDdrOn: 0
Mc0.C0.R1: LftEdge Width
B0: 278 58
B1: 278 58
Mc0.C0.R1: DqsPi DqPi
B0: 278 310
B1: 278 310
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc0.C1.R1: LftEdge Width
B0: 280 58
B1: 286 58
Mc0.C1.R1: DqsPi DqPi
B0: 280 312
B1: 286 318
W Mc0.C1 GsmMccOdtOn: 0
W Mc0.C1 GsmMccMprTrainDdrOn: 0
Mc0.C2.R1: LftEdge Width
B0: 284 56
B1: 276 58
Mc0.C2.R1: DqsPi DqPi
B0: 284 316
B1: 276 308
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc0.C3.R1: LftEdge Width
B0: 284 56
B1: 286 60
Mc0.C3.R1: DqsPi DqPi
B0: 284 316
B1: 286 318
W Mc1.C0 GsmMccOdtOn: 0
W Mc1.C0 GsmMccMprTrainDdrOn: 0
Mc1.C0.R1: LftEdge Width
B0: 290 56
B1: 290 54
Mc1.C0.R1: DqsPi DqPi
B0: 290 322
B1: 290 322
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc1.C1.R1: LftEdge Width
B0: 278 56
B1: 284 56
Mc1.C1.R1: DqsPi DqPi
B0: 278 310
B1: 284 316
W Mc1.C1 GsmMccOdtOn: 0
W Mc1.C1 GsmMccMprTrainDdrOn: 0
Mc1.C2.R1: LftEdge Width
B0: 280 60
B1: 274 58
Mc1.C2.R1: DqsPi DqPi
B0: 280 312
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc1.C3.R1: LftEdge Width
B0: 284 56
B1: 274 58
Mc1.C3.R1: DqsPi DqPi
B0: 284 316
B1: 274 306
MRC task Jedec Write Leveling training -- SUCCEEDED, Status = 0h.
Post Code: DD4Eh
MRC task -- Write Leveling FlyBy training -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Params : DqSweepStart: -52, DqSweepStop: 18, DQ_SWEEP_STEP: 2
Rank 0
Params : MaxDec: 18, MaxAdd: 14, PiCycleDec: 2, PiCycleAdd: 13
MinCode: 274, MaxCode: 322, Start: -20, End: 27
Sweep through the cycle offsets until we find a value that passes
Channel 0 1
Delay DqOffset Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
-20 -52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -32 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -30 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -28 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -26 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -24 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -22 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -20 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 0 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -32 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -30 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -28 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -26 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -24 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -22 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -20 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 -2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 0 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-19 18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
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-18 -30 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -28 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -26 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -24 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -22 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -20 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
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-18 -12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-18 -6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
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-3 14 . # # # . . # # # # # # # # # # 0x0000000000000E00 0x000000000000EFFF 0x0000000000000000 0x00000000000010FF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
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Rank 1
Params : MaxDec: 18, MaxAdd: 14, PiCycleDec: 2, PiCycleAdd: 13
MinCode: 274, MaxCode: 322, Start: -20, End: 27
Sweep through the cycle offsets until we find a value that passes
Channel 0 1
Delay DqOffset Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
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-3 -12 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 -10 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 -8 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 -6 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 -4 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 -2 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 0 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 2 . . . . . . . . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 4 . . . . . . # . # # # # # # # # 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x00000000000000FE 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 6 . . # . . . # . # # # # # # # # 0x0000000000000000 0x0000000000000010 0x0000000000000000 0x00000000000000FF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 8 . . # . . . # . # # # # # # # # 0x0000000000000000 0x00000000000000FF 0x0000000000000000 0x00000000000000FF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 10 . . # . . . # . # # # # # # # # 0x0000000000000000 0x00000000000000FF 0x0000000000000000 0x00000000000000FF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 12 . . # . . . # . # # # # # # # # 0x0000000000000000 0x00000000000000FF 0x0000000000000000 0x00000000000000FF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 14 # # # # . # # # # # # # # # # # 0x0000000000000602 0x000000000000BDFF 0x0000000000000300 0x0000000000007FFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 16 # # # # # # # # # # # # # # # # 0x0000000000007F03 0x000000000000FFFF 0x000000000000FF7F 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-3 18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
257
253
244
259
260
250
247
262
267
265
251
261
259
248
260
251
253
253
246
259
260
250
249
259
267
267
256
263
258
250
262
251
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Leveling FlyBy training -- SUCCEEDED, Status = 0h.
Post Code: DD2Eh
MRC task -- Write Timing Centering -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-86 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-85 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-84 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-83 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-82 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-81 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-80 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-79 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-78 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-77 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-76 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-75 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-74 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-73 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-72 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-71 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-70 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-69 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-68 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-67 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-66 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-65 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-64 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-63 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-62 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-61 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-60 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-59 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-58 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-57 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-56 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-55 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-54 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-53 # # # # # # # # # # # # # # # # 0x17EF_0 0x17ED_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-52 # # # # # # # # # # # # # # # # 0x17EE_0 0x17E6_0 0x17EF_0 0x17E6_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-51 # # # # # # # # # # # # # # # # 0x17EB_0 0x17B0_0 0x17EF_0 0x17B6_0 0x17EF_0 0x17EF_0 0x17EE_0 0x17EF_0
-50 # # # # # # # # # # # # # # # # 0x17DD_0 0x1793_0 0x17ED_0 0x179B_0 0x17EB_0 0x17EF_0 0x17E6_0 0x17EF_0
-49 # # # # # # # # # # # # # # # # 0x17CD_0 0x16FD_0 0x17E3_0 0x1774_0 0x17D2_0 0x17E3_0 0x17C6_0 0x17EF_0
-48 # # # # # # # # # # # # # # # # 0x17C4_0 0x1610_0 0x17DD_0 0x1737_0 0x17C3_0 0x17E0_0 0x17B2_0 0x17EC_0
-47 # # # # # # # # # # # # # # # # 0x179A_0 0xE6C_0 0x17A8_0 0x167E_0 0x178A_0 0x17B8_0 0x177F_0 0x17E9_0
-46 # # # # # # # # # # # # # # # # 0x16E7_0 0x807_0 0x177C_0 0x135E_0 0x1753_0 0x179D_0 0x1727_0 0x17CD_0
-45 # # # # # # # # # # # # # # # # 0x15A3_0 0x50A_0 0x16A7_0 0x980_0 0x139E_0 0x1765_0 0x12E6_0 0x17B9_0
-44 # # # # # # # # # # # # # # # # 0x152C_0 0x45D_0 0x14D7_0 0x3A3_0 0xB24_0 0x16A8_0 0xD50_0 0x1792_0
-43 # # # # # # # # # # # # # # # # 0xF95_0 0x27E_0 0xE2D_0 0x13D_0 0x566_0 0x1229_0 0x670_0 0x167A_0
-42 # # # # # # # # # # # # # # # # 0x536_0 0xC7_0 0x5BC_0 0x48_0 0x1EB_0 0xA0D_0 0x25A_0 0xD7D_0
-41 # # # # # # . # # # # # # # # # 0x22D_0 0x31_0 0x2AE_0 0x9_0 0x81_0 0x726_0 0xEA_0 0x689_0
-40 # # . # # # # # # # . # # . # # 0xBE_0 0x1_0 0x152_0 0x4_0 0x1A_0 0x4E0_0 0x62_0 0x332_0
-39 # . . # # . . # # # . # # . # # 0x2C_0 0x1_0 0xE_0 0x1_0 0x5_0 0x1AD_0 0x4_0 0xC8_0
-38 # . . . . . . . . . . # . . # # 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0 0xB_0 0x0_0 0xC_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x18_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x1B4_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . # . . . # . . . . . . . . . 0x0_0 0x37_0 0x0_0 0x53F_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . # . . . # . . . . . . . . . 0x0_0 0x211_0 0x0_0 0xB03_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . # . . . # . . . . . . . . . 0x0_0 0x40F_0 0x0_0 0xD6C_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . # . . . # . . . . . . . . . 0x0_0 0x9E0_0 0x0_0 0xEA8_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . # . . . # . . . . . . . . . 0x0_0 0xF8E_0 0x0_0 0xFC1_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . # . . . # . . . . . . . . . 0x0_0 0xFF4_0 0x0_0 0xFEC_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . # # . . # . . . . . . . . . 0x0_0 0xFF6_0 0x0_0 0xFF4_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . # # . . # # . . . . . . . . 0x0_0 0x1004_0 0x0_0 0xFFE_0 0x0_0 0x0_0 0x0_0 0x0_0
14 # # # # . # # # . . # . . # . # 0xC0_0 0x1068_0 0x4_0 0x10E9_0 0x0_0 0x5_0 0x2D_0 0x4D_0
15 # # # # . # # # . # # . . # . # 0x4BA_0 0x1135_0 0xC5_0 0x1308_0 0x1_0 0x229_0 0x312_0 0x32E_0
16 # # # # . # # # . . # . . # . # 0x95E_0 0x124D_0 0x345_0 0x1461_0 0x0_0 0xD9F_0 0x6D0_0 0x6E4_0
17 # # # # # # # # # # # # # # . # 0xFB6_0 0x15C6_0 0xDC3_0 0x1706_0 0x195_0 0x117E_0 0xE19_0 0xDED_0
18 # # # # # # # # # # # # # # # # 0x1211_0 0x1797_0 0x10E3_0 0x17E0_0 0xDFD_0 0x11E8_0 0x129A_0 0x1046_0
19 # # # # # # # # # # # # # # # # 0x148A_0 0x17DD_0 0x135F_0 0x17EC_0 0x11BC_0 0x1299_0 0x13FF_0 0x10E3_0
20 # # # # # # # # # # # # # # # # 0x15A6_0 0x17EC_0 0x155C_0 0x17EC_0 0x1702_0 0x15B8_0 0x16A5_0 0x1283_0
21 # # # # # # # # # # # # # # # # 0x1721_0 0x17EC_0 0x16D3_0 0x17EC_0 0x17EA_0 0x1735_0 0x17A4_0 0x13FF_0
22 # # # # # # # # # # # # # # # # 0x17E1_0 0x17EC_0 0x17E5_0 0x17EC_0 0x17EC_0 0x17DC_0 0x17EC_0 0x16AD_0
23 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EA_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x177C_0
24 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17C1_0
25 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
26 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
27 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
28 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
29 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
30 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
31 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
32 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
33 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
34 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
35 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
36 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
37 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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42 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
43 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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49 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
50 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
51 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
52 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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55 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
56 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
57 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
58 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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60 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
61 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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63 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
64 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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73 # # # # # # # # # # # # # # # # 0x17EC_0 0x1A69_0 0x17EC_0 0x1B84_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
74 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BBF_0 0x17EC_0 0x1BC0_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
75 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BCF_0 0x17EC_0 0x1BCF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
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77 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BDA_0 0x17EC_0 0x1BD1_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
78 # # # # # # # # # # # # # # # # 0x1840_0 0x1C04_0 0x17F0_0 0x1C19_0 0x17EC_0 0x17ED_0 0x17F0_0 0x17FB_0
79 # # # # # # # # # # # # # # # # 0x18FF_0 0x1C08_0 0x181C_0 0x1C99_0 0x17ED_0 0x1881_0 0x18B5_0 0x18C6_0
80 # # # # # # # # # # # # # # # # 0x1A93_0 0x1BDB_0 0x1921_0 0x1CF9_0 0x17EC_0 0x1B76_0 0x19C2_0 0x19EF_0
81 # # # # # # # # # # # # # # # # 0x1B6E_0 0x1B33_0 0x1ABC_0 0x1D3F_0 0x181D_0 0x1BF7_0 0x1AEC_0 0x1B06_0
82 # # # # # # # # # # # # # # # # 0x1C42_0 0x190C_0 0x1C05_0 0x1C8C_0 0x1B50_0 0x1C30_0 0x1C43_0 0x1BDB_0
83 # # # # # # # # # # # # # # # # 0x1C87_0 0x1852_0 0x1C7A_0 0x19E1_0 0x1B48_0 0x1C71_0 0x1BBC_0 0x1C19_0
84 # # # # # # # # # # # # # # # # 0x1C6A_0 0x1846_0 0x1C18_0 0x1853_0 0x19B8_0 0x1CD2_0 0x1A8A_0 0x1C66_0
85 # # # # # # # # # # # # # # # # 0x1B67_0 0x1833_0 0x1AF9_0 0x182A_0 0x18F3_0 0x1C37_0 0x1954_0 0x1CAA_0
86 # # # # # # # # # # # # # # # # 0x1955_0 0x1813_0 0x1988_0 0x1800_0 0x186C_0 0x1A81_0 0x1884_0 0x1B15_0
Mc0.C0.R0: Left Right Width Center
B0: -37 13 50 -12
B1: -39 13 52 -13
Mc0.C1.R0: Left Right Width Center
B0: -40 4 44 -18
B1: -38 11 49 -14
Mc0.C2.R0: Left Right Width Center
B0: -38 16 54 -11
B1: -39 13 52 -13
Mc0.C3.R0: Left Right Width Center
B0: -39 3 42 -18
B1: -38 12 50 -13
Mc1.C0.R0: Left Right Width Center
B0: -38 16 54 -11
B1: -38 14 52 -12
Mc1.C1.R0: Left Right Width Center
B0: -40 13 53 -14
B1: -37 16 53 -11
Mc1.C2.R0: Left Right Width Center
B0: -38 16 54 -11
B1: -40 13 53 -14
Mc1.C3.R0: Left Right Width Center
B0: -37 17 54 -10
B1: -37 13 50 -12
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
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78 # # # # # # # # # # # # # # # # 0x17FD_0 0x1BDD_0 0x1861_0 0x1CBF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
79 # # # # # # # # # # # # # # # # 0x190C_0 0x1BEF_0 0x1A35_0 0x1D1D_0 0x17EC_0 0x17EC_0 0x17ED_0 0x17F1_0
80 # # # # # # # # # # # # # # # # 0x1A1D_0 0x1C42_0 0x1BBE_0 0x1C8F_0 0x17EC_0 0x17EC_0 0x17F1_0 0x182D_0
81 # # # # # # # # # # # # # # # # 0x1B9A_0 0x1AE1_0 0x1C6C_0 0x1A72_0 0x17EC_0 0x1802_0 0x1842_0 0x1919_0
82 # # # # # # # # # # # # # # # # 0x1C1D_0 0x18E6_0 0x1C58_0 0x18FC_0 0x1824_0 0x1957_0 0x19E5_0 0x1AF7_0
83 # # # # # # # # # # # # # # # # 0x1BA7_0 0x1857_0 0x1B07_0 0x189A_0 0x1AE2_0 0x1B35_0 0x1B7B_0 0x1BD3_0
84 # # # # # # # # # # # # # # # # 0x1AC5_0 0x1832_0 0x1929_0 0x185C_0 0x1B90_0 0x1BB5_0 0x1BC3_0 0x1BED_0
85 # # # # # # # # # # # # # # # # 0x18E1_0 0x183E_0 0x1865_0 0x17FD_0 0x1AA7_0 0x1C2F_0 0x1ACD_0 0x1BCB_0
86 # # # # # # # # # # # # # # # # 0x1807_0 0x181A_0 0x182A_0 0x17E6_0 0x1908_0 0x1C9C_0 0x1A16_0 0x1A87_0
Mc0.C0.R1: Left Right Width Center
B0: -37 12 49 -13
B1: -40 13 53 -14
Mc0.C1.R1: Left Right Width Center
B0: -40 4 44 -18
B1: -36 11 47 -13
Mc0.C2.R1: Left Right Width Center
B0: -38 12 50 -13
B1: -40 11 51 -15
Mc0.C3.R1: Left Right Width Center
B0: -43 1 44 -21
B1: -41 12 53 -15
Mc1.C0.R1: Left Right Width Center
B0: -36 17 53 -10
B1: -36 17 53 -10
Mc1.C1.R1: Left Right Width Center
B0: -34 16 50 -9
B1: -33 17 50 -8
Mc1.C2.R1: Left Right Width Center
B0: -35 16 51 -10
B1: -38 14 52 -12
Mc1.C3.R1: Left Right Width Center
B0: -35 16 51 -10
B1: -36 14 50 -11
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD4Bh
MRC task -- Write Voltage Centering -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
WriteVoltage
-40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc1.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc1.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
WriteVoltage
-40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc1.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD57h
MRC task -- Read Voltage Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
ReadVoltage
-63 # # # # # # # # # # # # # # # # 0x1B94_0 0x1B0F_0 0x1402_0 0x1C23_0 0x127C_0 0x14AC_0 0x1CA1_0 0x15A7_0
-62 # # # # # # # # # # # # # # # # 0x1984_0 0x19BF_0 0x12D1_0 0x1ADC_0 0x11A3_0 0x1386_0 0x1ABE_0 0x13D4_0
-61 # # # # # # # # # # # # # # # # 0x1703_0 0x1877_0 0x11E4_0 0x19DA_0 0x10A2_0 0x12AC_0 0x188D_0 0x11D3_0
-60 # # # # # # # # # # # # # # # # 0x150F_0 0x17C3_0 0x1175_0 0x18F9_0 0xF5B_0 0x119E_0 0x16EC_0 0x107F_0
-59 # # # # # # # # # # # # # # # # 0x12C0_0 0x16A1_0 0x1092_0 0x181E_0 0xD71_0 0x1041_0 0x14CC_0 0xF70_0
-58 # # # # # # # # # # # # # # # # 0xFF8_0 0x1576_0 0xF5A_0 0x172D_0 0xB43_0 0xF54_0 0x12BB_0 0xE80_0
-57 # # # # # # # # # # # # # # # # 0xD7E_0 0x144A_0 0xE8C_0 0x1608_0 0xA48_0 0xE09_0 0x103D_0 0xD81_0
-56 # # # # # # # # # # # # # # # # 0xB6C_0 0x12E0_0 0xD9A_0 0x144F_0 0x8F8_0 0xD25_0 0xE74_0 0xC6C_0
-55 # # # # # # # # # # # # # # # # 0x996_0 0x10A1_0 0xBE5_0 0x1230_0 0x728_0 0xC69_0 0xC1B_0 0xAD4_0
-54 # # # # # # # # # # # # # # # # 0x820_0 0xE2D_0 0x9EF_0 0x1057_0 0x5BC_0 0xB85_0 0xA40_0 0x93A_0
-53 # # # # # # # # # # # # # # # # 0x6E7_0 0xC52_0 0x818_0 0xEDA_0 0x4B5_0 0xA82_0 0x889_0 0x738_0
-52 # # # # # # # # # # # # # # # # 0x600_0 0xB16_0 0x67B_0 0xDA9_0 0x446_0 0x985_0 0x74E_0 0x5B7_0
-51 # # # # # # # # # # # # # # # # 0x4FA_0 0x9DB_0 0x53D_0 0xCC3_0 0x3F1_0 0x83D_0 0x671_0 0x4B7_0
-50 # # # # # # # # # # # # # # # # 0x43A_0 0x8E5_0 0x463_0 0xB78_0 0x3C2_0 0x6D9_0 0x593_0 0x43B_0
-49 # # # # # # # # # # # # # # # # 0x37D_0 0x7EA_0 0x3FC_0 0xA59_0 0x352_0 0x5B6_0 0x482_0 0x3A5_0
-48 # # # # # # # # # # # # # # # # 0x2C3_0 0x6F3_0 0x392_0 0x8D2_0 0x27B_0 0x4E6_0 0x3B4_0 0x2A0_0
-47 # # # # # # # # # # # # # # # # 0x1D9_0 0x59A_0 0x2A9_0 0x766_0 0x155_0 0x3FD_0 0x2F0_0 0x17A_0
-46 # # # # # # # # # # # # # # # # 0xDD_0 0x426_0 0x1CC_0 0x634_0 0x80_0 0x34B_0 0x22A_0 0x84_0
-45 # # # # # # # # # . # # # # # # 0x5D_0 0x2C9_0 0xC3_0 0x529_0 0x32_0 0x2DB_0 0x166_0 0x30_0
-44 # # # # # # # # # . # # # # # # 0x36_0 0x20D_0 0x3B_0 0x44E_0 0x11_0 0x2A2_0 0xA9_0 0xC_0
-43 # # # # . # # . # . # # # # # . 0x14_0 0x150_0 0x5_0 0x389_0 0x3_0 0x24C_0 0x43_0 0x1_0
-42 # . # . . . # . # . # # # . . . 0x7_0 0xC2_0 0x0_0 0x2CE_0 0x1_0 0x1E8_0 0x25_0 0x0_0
-41 # . # . . . # . # . # # # . . . 0x1_0 0x77_0 0x0_0 0x275_0 0x1_0 0x149_0 0x1A_0 0x0_0
-40 # . # . . . # . . . # # # . . . 0x1_0 0x44_0 0x0_0 0x1F2_0 0x0_0 0xEA_0 0x12_0 0x0_0
-39 . . # . . . # . . . # # # . . . 0x0_0 0x24_0 0x0_0 0x18B_0 0x0_0 0x90_0 0xC_0 0x0_0
-38 . . # . . . # . . . # . # . . . 0x0_0 0x11_0 0x0_0 0x136_0 0x0_0 0x5B_0 0x7_0 0x0_0
-37 . . # . . . # . . . # . # . . . 0x0_0 0xA_0 0x0_0 0xE6_0 0x0_0 0x32_0 0x5_0 0x0_0
-36 . . # . . . # . . . # . # . . . 0x0_0 0x6_0 0x0_0 0xA3_0 0x0_0 0xC_0 0x2_0 0x0_0
-35 . . # . . . # . . . # . . . . . 0x0_0 0x3_0 0x0_0 0x72_0 0x0_0 0x2_0 0x0_0 0x0_0
-34 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x47_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x30_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x19_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x12_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x7_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x9_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x6_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x4_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x5_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x9_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xA_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x20_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x25_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x41_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x4E_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x78_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0xCF_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0xEB_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . # . . . # . . . # . . . . . 0x0_0 0x1_0 0x0_0 0x114_0 0x0_0 0x1_0 0x0_0 0x0_0
41 . . # . . . # . . . # . # . . . 0x0_0 0x5_0 0x0_0 0x15D_0 0x0_0 0x9_0 0x1_0 0x0_0
42 . . # . . . # . . . # . # . . . 0x0_0 0xB_0 0x0_0 0x1AE_0 0x0_0 0x16_0 0x1_0 0x0_0
43 . . # . . . # . . . # . # . . . 0x0_0 0x16_0 0x0_0 0x228_0 0x0_0 0x50_0 0x4_0 0x0_0
44 . . # . . . # . . . # . # . . . 0x0_0 0x26_0 0x0_0 0x266_0 0x0_0 0x84_0 0x7_0 0x0_0
45 . . # . . # # . . . # # # # . . 0x0_0 0x54_0 0x8_0 0x2A1_0 0x0_0 0x13B_0 0x13_0 0x0_0
46 . # # . . # # . . . # # # . . . 0x2_0 0x91_0 0x21_0 0x339_0 0x0_0 0x1C5_0 0x1A_0 0x0_0
47 # # # # . # # . . . # # # # . # 0x2_0 0xC9_0 0x8D_0 0x3D8_0 0x0_0 0x31E_0 0x43_0 0x1_0
48 . # # # # # # # . . # # # # . # 0x3_0 0x14F_0 0xF0_0 0x46F_0 0x0_0 0x3F0_0 0x61_0 0x1_0
49 # # # # # # # # . . # # # # . # 0x5_0 0x206_0 0x1E6_0 0x4F2_0 0x0_0 0x4F2_0 0xC2_0 0x8_0
50 # # # # # # # # # . # # # # . # 0x20_0 0x2F9_0 0x340_0 0x611_0 0x1_0 0x61A_0 0x153_0 0x3D_0
51 # # # # # # # # # . # # # # . # 0x45_0 0x530_0 0x4CA_0 0x6D0_0 0x1_0 0x73C_0 0x267_0 0xAA_0
52 # # # # # # # # # . # # # # # # 0x98_0 0x710_0 0x5DC_0 0x778_0 0x3_0 0x84E_0 0x3E4_0 0x185_0
53 # # # # # # # # # # # # # # # # 0x189_0 0x99C_0 0x759_0 0x8FE_0 0x24_0 0x96B_0 0x62C_0 0x319_0
54 # # # # # # # # # # # # # # # # 0x2E5_0 0xBAC_0 0x81C_0 0xA01_0 0x62_0 0xA6D_0 0x7D9_0 0x41A_0
55 # # # # # # # # # # # # # # # # 0x433_0 0xD3D_0 0x925_0 0xB96_0 0xFA_0 0xB37_0 0xA0C_0 0x4E7_0
56 # # # # # # # # # # # # # # # # 0x684_0 0xEDE_0 0xA5F_0 0xD8B_0 0x1FE_0 0xC00_0 0xB7B_0 0x55D_0
57 # # # # # # # # # # # # # # # # 0xA01_0 0x1114_0 0xC5F_0 0x1029_0 0x4A2_0 0xD0D_0 0xE84_0 0x669_0
58 # # # # # # # # # # # # # # # # 0xB4D_0 0x11DD_0 0xD76_0 0x11E3_0 0x6EB_0 0xE00_0 0xFE8_0 0x732_0
59 # # # # # # # # # # # # # # # # 0xEF2_0 0x1351_0 0xF84_0 0x1407_0 0x9C3_0 0xF45_0 0x123C_0 0x8F0_0
60 # # # # # # # # # # # # # # # # 0x101F_0 0x13ED_0 0x1014_0 0x149C_0 0xA9D_0 0xFD1_0 0x1318_0 0x9E7_0
61 # # # # # # # # # # # # # # # # 0x122A_0 0x14FE_0 0x1176_0 0x1616_0 0xD17_0 0x1181_0 0x157E_0 0xBED_0
62 # # # # # # # # # # # # # # # # 0x14CA_0 0x167D_0 0x123D_0 0x175D_0 0xFD5_0 0x1280_0 0x1768_0 0xD93_0
63 # # # # # # # # # # # # # # # # 0x16BD_0 0x175E_0 0x1340_0 0x1874_0 0x1347_0 0x1388_0 0x19F3_0 0xF3A_0
Mc0.C0.R0: Left Right Width Center
B0: -39 46 85 3
B1: -42 45 87 1
Mc0.C1.R0: Left Right Width Center
B0: -26 34 60 4
B1: -42 46 88 2
Mc0.C2.R0: Left Right Width Center
B0: -43 47 90 2
B1: -42 44 86 1
Mc0.C3.R0: Left Right Width Center
B0: -15 23 38 4
B1: -43 47 90 2
Mc1.C0.R0: Left Right Width Center
B0: -40 49 89 4
B1: -45 52 97 3
Mc1.C1.R0: Left Right Width Center
B0: -34 39 73 2
B1: -38 44 82 3
Mc1.C2.R0: Left Right Width Center
B0: -35 40 75 2
B1: -42 44 86 1
Mc1.C3.R0: Left Right Width Center
B0: -42 51 93 4
B1: -43 46 89 1
MRC task Read Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD2Fh
MRC task -- Read Timing Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
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-28 . . # . # . # # . . . . . # . . 0x0_0 0x99F_0 0x2_0 0xFD9_0 0x0_0 0x0_0 0x2D_0 0x0_0
-27 . . # . # . # # . . . . . # . . 0x0_0 0x6D5_0 0x1_0 0xEFF_0 0x0_0 0x0_0 0x1_0 0x0_0
-26 . . # . . . # # . . . . . . . . 0x0_0 0x4C5_0 0x0_0 0xDE7_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . # . . . # # . . . . . . . . 0x0_0 0x30C_0 0x0_0 0xCD5_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . # . . . # . . . . . . . . . 0x0_0 0x132_0 0x0_0 0xB6B_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . # . . . # . . . . . . . . . 0x0_0 0x7D_0 0x0_0 0x958_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . # . . . # . . . . . . . . . 0x0_0 0x29_0 0x0_0 0x797_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . # . . . # . . . . . . . . . 0x0_0 0xA_0 0x0_0 0x541_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x2EC_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x180_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xB5_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x66_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x25_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xE_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -28 5 33 -12
Mc0.C1.R0: Left Right Width Center
B0: -18 5 23 -7
B1: -28 5 33 -12
Mc0.C2.R0: Left Right Width Center
B0: -26 5 31 -11
B1: -28 5 33 -12
Mc0.C3.R0: Left Right Width Center
B0: -13 5 18 -4
B1: -24 5 29 -10
Mc1.C0.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -31 5 36 -13
Mc1.C1.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -28 5 33 -12
Mc1.C2.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -26 5 31 -11
Mc1.C3.R0: Left Right Width Center
B0: -31 5 36 -13
B1: -28 5 33 -12
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-62 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-61 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-60 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-59 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-58 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-57 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-56 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-55 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-54 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-53 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-52 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-51 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-50 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-49 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-48 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-47 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-46 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-45 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17EC_0 0x17ED_0 0x17ED_0
-44 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17DC_0 0x17ED_0 0x17ED_0
-43 # # # # # # # # # # # # # # # # 0x17EB_0 0x17ED_0 0x17E6_0 0x17ED_0 0x17ED_0 0x1726_0 0x17ED_0 0x17C5_0
-42 # # # # # # # # # # # # # # # # 0x17E7_0 0x17EB_0 0x17D1_0 0x17ED_0 0x17ED_0 0x1670_0 0x17ED_0 0x177E_0
-41 # # # # # # # # # # # # # # # # 0x17D9_0 0x17EA_0 0x176E_0 0x17ED_0 0x17ED_0 0x1579_0 0x17E9_0 0x16A1_0
-40 # # # # # # # # # # # # # # # # 0x17B9_0 0x17CD_0 0x16E2_0 0x17ED_0 0x17E1_0 0x1495_0 0x17DC_0 0x15CC_0
-39 # # # # # # # # # # # # # # # # 0x1751_0 0x174B_0 0x155C_0 0x17E8_0 0x1734_0 0x1257_0 0x1772_0 0x13AA_0
-38 # # # # # # # # # # # # # # # # 0x16C6_0 0x16AF_0 0x13F9_0 0x17D6_0 0x1630_0 0x1084_0 0x16AC_0 0x11F8_0
-37 # # # # # # # # # # # # # # # # 0x154E_0 0x15CB_0 0x111C_0 0x17BF_0 0x13D1_0 0xB2B_0 0x154D_0 0xF3E_0
-36 # # # # # # # # # # # # # # # # 0x11B1_0 0x14A5_0 0xBD7_0 0x176E_0 0x106B_0 0x5DF_0 0x12E8_0 0xABE_0
-35 # # # # # # # # # # # # # # # # 0xCE9_0 0x13C1_0 0x741_0 0x16C2_0 0xB3B_0 0x2C9_0 0x100B_0 0x764_0
-34 # # # # # # # # # # # # # # # # 0x947_0 0x134F_0 0x538_0 0x1667_0 0x6D8_0 0x18E_0 0xD82_0 0x58C_0
-33 # # # # # # # # # # # # # # # # 0x628_0 0x128C_0 0x357_0 0x1589_0 0x3D2_0 0xD5_0 0x93D_0 0x37A_0
-32 # # # # # # # # # # # # # # . # 0x332_0 0x11A7_0 0x130_0 0x1472_0 0x1A3_0 0x68_0 0x4A1_0 0x1C6_0
-31 # # # # # # # # # . # # . # . # 0xF0_0 0x1061_0 0x11_0 0x1342_0 0x76_0 0xA_0 0x19B_0 0xDA_0
-30 # # # # # # # # # . # # . # . # 0x2B_0 0xEEA_0 0x5_0 0x1252_0 0x18_0 0x1_0 0x4B_0 0x1B_0
-29 # # # # # # # # # . . . . # . # 0xB_0 0xD40_0 0x2_0 0x1191_0 0x1_0 0x0_0 0xA_0 0x4_0
-28 # # # # # # # # . . . . . . . # 0x3_0 0xA3E_0 0x1_0 0x106B_0 0x0_0 0x0_0 0x0_0 0x1_0
-27 . . # . . . # . . . . . . . . # 0x0_0 0x64F_0 0x0_0 0xF59_0 0x0_0 0x0_0 0x0_0 0x1_0
-26 . . # . . . # . . . . . . . . . 0x0_0 0x46F_0 0x0_0 0xE8B_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . # . . . # . . . . . . . . . 0x0_0 0x362_0 0x0_0 0xD79_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . # . . . # . . . . . . . . . 0x0_0 0x1C3_0 0x0_0 0xB60_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . # . . . # . . . . . . . . . 0x0_0 0xA7_0 0x0_0 0x913_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . # . . . # . . . . . . . . . 0x0_0 0x3F_0 0x0_0 0x6FE_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . # . . . # . . . . . . . . . 0x0_0 0x10_0 0x0_0 0x522_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x30A_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x18B_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xC7_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x75_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x18_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -27 5 32 -11
B1: -27 5 32 -11
Mc0.C1.R1: Left Right Width Center
B0: -18 5 23 -7
B1: -27 5 32 -11
Mc0.C2.R1: Left Right Width Center
B0: -27 5 32 -11
B1: -27 5 32 -11
Mc0.C3.R1: Left Right Width Center
B0: -13 5 18 -4
B1: -27 5 32 -11
Mc1.C0.R1: Left Right Width Center
B0: -28 5 33 -12
B1: -31 5 36 -13
Mc1.C1.R1: Left Right Width Center
B0: -29 5 34 -12
B1: -29 5 34 -12
Mc1.C2.R1: Left Right Width Center
B0: -31 5 36 -13
B1: -28 5 33 -12
Mc1.C3.R1: Left Right Width Center
B0: -32 5 37 -14
B1: -26 5 31 -11
MRC task Read Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD38h
MRC task -- Write Timing Centering 2D Before Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 250 260 260 220 220 240 250 270 270 260 260 210 210 250 250 270 270 260 260 260 270 260 270 270 270 260 270 270 270 250 250 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 240 240 240 190 200 210 230 240 240 230 250 200 190 230 240 240 230 250 250 240 250 220 250 250 240 240 260 230 250 220 230
Weighted Center 1 0 1 1 0 1 -1 1 -1 0 1 2 -1 1 1 1
Final Center 75 73 69 73 75 74 67 74 74 74 73 77 74 73 77 75
Edges we pass on to GetMarginBit are
230 230 240 240 200 190 220 220 240 240 240 240 190 200 240 230 230 240 250 250 250 240 240 230 240 250 250 250 240 240 230 220
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .#.#.... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0707070707070707 ......#. 0x0707070707070707 .......# 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 .......# 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0709070907070707 #.....#. 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 .....#.. 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0606060606060706 ......$. 0x0606060606060607 .......$ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060607 .......$ 0x0606060606060606 ........ 0x0606060606060606 .......# 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0709060906060706 $$#$.#$. 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606070606 ..#..$#. 0x0606060606060606 .#...... 0x0606060606060606 .......# 0x0606060606060606 ........
0x0505050505050705 ......$# 0x0505050505050507 .......$ 0x0505050505050505 ......#. 0x0505050505050505 ....#.#. 0x0505050505050507 .......$ 0x0505050505050505 ...#..#. 0x0505050505050506 .......$ 0x0505050505050505 ........ 0x0505050505050505 .....##. 0x0709060905060705 $$$$.$$. 0x0505050505050505 .#...... 0x0505050505050505 .....#.. 0x0505060505070605 ##$..$$. 0x0506050505050505 .$...... 0x0505050505050506 .......$ 0x0505050505050505 ....#...
0x0404040404040705 ......$$ 0x0404040404040407 .....##$ 0x0404040404040504 .....#$. 0x0404040405040504 ....$.$. 0x0404040404040407 .#.#...$ 0x0404040504040504 ..#$..$. 0x0404040404040406 .......$ 0x0404040404040404 ........ 0x0404040404050504 .....$$. 0x0709060904060704 $$$$.$$# 0x0405040404040404 .$...... 0x0404040404050404 .....$.# 0x0505060404070604 $$$.#$$. 0x0406040404040404 .$#..##. 0x0404040404040406 .......$ 0x0404040405040404 ....$..#
0x0303030303030705 ......$$ 0x0303030303040407 .....$$$ 0x0303030303040503 .....$$. 0x0303030305030503 ....$.$. 0x0304030403030307 #$.$...$ 0x0303040503030503 ..$$..$# 0x0303030303030306 ...#..#$ 0x0303030303030303 ........ 0x0303030303050503 ....#$$# 0x0709060903060704 $$$$.$$$ 0x0305030303030303 .$.....# 0x0303030303050304 ..#.#$.$ 0x0505060304070603 $$$.$$$. 0x0306040303040403 .$$.#$$. 0x0303030303030306 .......$ 0x0303030305030304 ....$..$
0x0202020202020705 ..#...$$ 0x0202020202040407 ..#.#$$$ 0x0202020202040502 ....#$$# 0x0202020205020502 ....$.$. 0x0304020402020207 $$.$.#.$ 0x0202040502020503 ..$$..$$ 0x0202020302020306 ...$##$$ 0x0202020202020202 ........ 0x0202020203050503 .#..$$$$ 0x0709060902060704 $$$$#$$$ 0x0205020202020203 .$##...$ 0x0202030203050204 .#$#$$#$ 0x0505060204070602 $$$#$$$. 0x0206040203040402 .$$.$$$# 0x0202020202020206 .#.##.#$ 0x0202020205020204 ....$.#$
0x0101020101010705 ..$#..$$ 0x0101020102040407 ##$#$$$$ 0x0101010102040502 ...#$$$$ 0x0101010105010501 ....$#$# 0x0304010401020107 $$#$.$.$ 0x0101040501010503 ..$$.#$$ 0x0101010302020306 #.#$$$$$ 0x0101010101010101 .....#.# 0x0102010103050503 .$..$$$$ 0x0709060902060704 $$$$$$$$ 0x0105020201010103 .$$$.#.$ 0x0102030203050204 .$$$$$$$ 0x0505060204070601 $$$$$$$. 0x0106040103040402 #$$.$$$$ 0x0102010202010206 .$.$$.$$ 0x0101010105010204 ....$#$$
0x0000020100000705 ..$$##$$ 0x0101020102040407 $$$$$$$$ 0x0000000102040502 #.#$$$$$ 0x0000000005010501 ....$$$$ 0x0304010400020007 $$$$.$#$ 0x0000040500010503 ..$$#$$$ 0x0100010302020306 $#$$$$$$ 0x0000000000010001 .....$.$ 0x0002000003050503 .$..$$$$ 0x0709060902060704 $$$$$$$$ 0x0005020200010003 .$$$.$.$ 0x0002030203050204 #$$$$$$$ 0x0505060204070600 $$$$$$$# 0x0106040003040402 $$$.$$$$ 0x0002000202000206 #$#$$#$$ 0x0000000005010204 .#..$$$$
+--MrcGetMarginBit, rsign = 1
0x0808080808080808 ........ 0x0808080808080808 .#...... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ##...... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0907090909090909 ..##.... 0x0909090909090909 ........ 0x0909090909090909 .....#.. 0x0909090909090909 ........ 0x0707090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 #.#.#.## 0x0909090909090909 ........ 0x0909090909090909 #....... 0x0909090909090909 ........ 0x0909090909090909 ...#.... 0x0909090909090909 ..#..... 0x0909090909090909 ..#.....
0x0A0A0A0A0A0A0A0A .#...... 0x0A0709090A0A0A0A .$$$.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A090A0A .....$.. 0x0A0A0A0A0A0A0A0A ......#. 0x07070A0A0A0A0A0A $$...... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ....#... 0x0A0A0A0A0A0A0A0A ........ 0x090A090A090A0909 $#$.$#$$ 0x0A0A0A0A0A0A0A0A ........ 0x090A0A0A0A0A0A0A $.##.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A090A0A0A0A #..$.... 0x0A0A090A0A0A0A0A ..$..... 0x0A0A090A0A0A0A0A ..$.....
0x0B0A0B0B0B0B0B0B .$...... 0x0B0709090B0B0B0B #$$$.... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B090B0B ...#.$.. 0x0B0B0B0B0B0B0A0B ....#.$. 0x07070B0B0B0B0B0B $$...... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0A0B0B0B ....$... 0x0B0B0B0B0B0B0B0B #....... 0x090A090B090A0909 $$$#$$$$ 0x0B0B0B0B0B0B0B0B #....... 0x090B0A0A0B0B0B0B $.$$.... 0x0B0B0B0B0B0B0B0B ........ 0x0A0B0B090B0B0B0B $..$.... 0x0B0B090B0B0B0B0B ..$.#... 0x0B0B090B0B0B0B0B ..$.....
0x0C0A0C0C0C0C0C0C .$...... 0x0B0709090C0C0C0C $$$$.... 0x0C0C0C0C0C0C0C0C ...##... 0x0C0C0C0B0C090C0C #..$.$.# 0x0C0C0C0C0B0C0A0C ..#.$.$. 0x07070C0C0C0C0C0C $$...... 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0A0C0C0C ..#.$... 0x0B0C0C0C0C0C0C0C $....... 0x090A090B090A0909 $$$$$$$$ 0x0B0C0C0C0C0C0C0C $...#... 0x090C0A0A0C0C0C0C $#$$#... 0x0C0C0C0C0C0C0C0C ........ 0x0A0C0C090C0C0C0C $.#$.... 0x0C0C090C0B0C0C0C ..$#$... 0x0C0C090C0C0C0C0C #.$..#..
0x0D0A0D0D0D0D0D0D .$...... 0x0B0709090D0D0D0D $$$$##.. 0x0D0D0D0C0C0D0D0D ...$$... 0x0C0D0D0B0D090D0C $..$.$.$ 0x0D0D0C0D0B0D0A0D ..$.$.$. 0x07070D0D0D0D0D0D $$...... 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0C0D0A0D0D0D ..$#$... 0x0B0D0D0D0D0D0D0D $.##.... 0x090A090B090A0909 $$$$$$$$ 0x0B0D0D0D0C0D0D0D $...$... 0x090C0A0A0C0D0D0D $$$$$... 0x0D0D0D0D0D0D0D0D ...#.... 0x0A0D0C090D0D0D0D $.$$.#.# 0x0D0D090C0B0D0D0D #.$$$#.. 0x0C0D090D0D0C0D0D $.$..$..
0x0E0A0E0E0E0E0E0E #$...... 0x0B0709090D0D0E0E $$$$$$#. 0x0E0E0E0C0C0E0E0E ##.$$... 0x0C0E0E0B0E090E0C $##$.$.$ 0x0E0E0C0E0B0E0A0E .#$.$.$. 0x07070E0E0E0E0E0E $$##.#.. 0x0E0E0E0E0E0E0E0E ......#. 0x0E0E0C0D0A0E0E0E ..$$$... 0x0B0E0D0D0E0E0E0E $#$$.... 0x090A090B090A0909 $$$$$$$$ 0x0B0E0E0E0C0E0E0E $...$... 0x090C0A0A0C0E0E0E $$$$$.## 0x0E0E0E0D0E0E0E0E ...$#... 0x0A0E0C090E0D0E0D $.$$.$.$ 0x0D0E090C0B0D0E0E $#$$$$.# 0x0C0E090E0E0C0E0E $.$#.$..
0x0E0A0F0F0F0F0F0F $$...... 0x0B0709090D0D0E0F $$$$$$$. 0x0E0E0F0C0C0F0F0F $$#$$..# 0x0C0E0E0B0F090F0C $$$$.$#$ 0x0F0E0C0F0B0F0A0F .$$.$#$. 0x07070E0E0F0E0F0F $$$$.$.. 0x0F0F0F0F0F0F0E0F ......$. 0x0F0F0C0D0A0F0F0F .#$$$.#. 0x0B0E0D0D0F0F0F0F $$$$.... 0x090A090B090A0909 $$$$$$$$ 0x0B0F0F0F0C0F0F0F $...$... 0x090C0A0A0C0F0E0E $$$$$#$$ 0x0F0F0F0D0E0F0F0F ...$$..# 0x0A0F0C090F0D0F0D $#$$.$#$ 0x0D0E090C0B0D0F0E $$$$$$#$ 0x0C0F090E0F0C0F0F $.$$.$..
0x0E0A101010101010 $$..##.. 0x0B0709090D0D0E10 $$$$$$$. 0x0E0E0F0C0C10100F $$$$$..$ 0x0C0E0E0B10090F0C $$$$.$$$ 0x100E0C100B0F0A10 .$$.$$$. 0x07070E0E100E1010 $$$$#$.. 0x1010101010100E10 ....##$# 0x100F0C0D0A100F10 #$$$$#$# 0x0B0E0D0D10101010 $$$$##.# 0x090A090B090A0909 $$$$$$$$ 0x0B1010100C101010 $...$... 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E10100F ###$$..$ 0x0A0F0C09100D0F0D $$$$#$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C10090E100C1010 $.$$.$..
0x0E0A111110101111 $$.#$$.. 0x0B0709090D0D0E11 $$$$$$$# 0x0E0E0F0C0C11110F $$$$$..$ 0x0C0E0E0B11090F0C $$$$#$$$ 0x110E0C110B0F0A11 #$$.$$$. 0x07070E0E100E1111 $$$$$$.. 0x1111111110100E10 ..#.$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$#$ 0x090A090B090A0909 $$$$$$$$ 0x0B1111110C111111 $.#.$.#. 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E11110F $$$$$.#$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C11090E110C1111 $.$$#$#.
0x0E0A121110101212 $$.$$$.. 0x0B0709090D0D0E11 $$$$$$$$ 0x0E0E0F0C0C12120F $$$$$##$ 0x0C0E0E0B11090F0C $$$$$$$$ 0x110E0C120B0F0A12 $$$.$$$. 0x07070E0E100E1212 $$$$$$## 0x1212111210100E10 ..$.$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$$$ 0x090A090B090A0909 $$$$$$$$ 0x0B1211120C121112 $.$.$.$. 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E12110F $$$$$#$$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C12090E110C1112 $.$$$$$.
0x0E0A131110101313 $$#$$$#. 0x0B0709090D0D0E11 $$$$$$$$ 0x0E0E0F0C0C12120F $$$$$$$$ 0x0C0E0E0B11090F0C $$$$$$$$ 0x110E0C130B0F0A13 $$$#$$$. 0x07070E0E100E1212 $$$$$$$$ 0x1313111310100E10 ..$.$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$$$ 0x090A090B090A0909 $$$$$$$$ 0x0B1311130C131113 $.$.$.$. 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E12110F $$$$$$$$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C13090E110C1113 $#$$$$$.
0x0E0A131110101314 $$$$$$$. 0x0B0709090D0D0E11 $$$$$$$$ 0x0E0E0F0C0C12120F $$$$$$$$ 0x0C0E0E0B11090F0C $$$$$$$$ 0x110E0C130B0F0A14 $$$$$$$# 0x07070E0E100E1212 $$$$$$$$ 0x1414111410100E10 ##$#$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$$$ 0x090A090B090A0909 $$$$$$$$ 0x0B1411140C141114 $#$.$.$. 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E12110F $$$$$$$$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C13090E110C1114 $$$$$$$.
0x0E0A131110101315 $$$$$$$# 0x0B0709090D0D0E11 $$$$$$$$ 0x0E0E0F0C0C12120F $$$$$$$$ 0x0C0E0E0B11090F0C $$$$$$$$ 0x110E0C130B0F0A14 $$$$$$$$ 0x07070E0E100E1212 $$$$$$$$ 0x1414111410100E10 $$$$$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$$$ 0x090A090B090A0909 $$$$$$$$ 0x0B1411150C151115 $$$.$#$# 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E12110F $$$$$$$$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C13090E110C1115 $$$$$$$.
0x0E0A131110101315 $$$$$$$$ 0x0B0709090D0D0E11 $$$$$$$$ 0x0E0E0F0C0C12120F $$$$$$$$ 0x0C0E0E0B11090F0C $$$$$$$$ 0x110E0C130B0F0A14 $$$$$$$$ 0x07070E0E100E1212 $$$$$$$$ 0x1414111410100E10 $$$$$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$$$ 0x090A090B090A0909 $$$$$$$$ 0x0B1411160C151115 $$$.$$$$ 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E12110F $$$$$$$$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C13090E110C1116 $$$$$$$.
0x0E0A131110101315 $$$$$$$$ 0x0B0709090D0D0E11 $$$$$$$$ 0x0E0E0F0C0C12120F $$$$$$$$ 0x0C0E0E0B11090F0C $$$$$$$$ 0x110E0C130B0F0A14 $$$$$$$$ 0x07070E0E100E1212 $$$$$$$$ 0x1414111410100E10 $$$$$$$$ 0x100F0C0D0A100F10 $$$$$$$$ 0x0B0E0D0D10101110 $$$$$$$$ 0x090A090B090A0909 $$$$$$$$ 0x0B1411170C151115 $$$#$$$$ 0x090C0A0A0C0F0E0E $$$$$$$$ 0x1010100D0E12110F $$$$$$$$ 0x0A0F0C09100D0F0D $$$$$$$$ 0x0D0E090C0B0D0F0E $$$$$$$$ 0x0C13090E110C1117 $$$$$$$#
Edges
Mc0.Ch0.B0: [ 0 13][ 0 9][ 3 18][ 2 16][ 1 15][ 1 15][ 8 18][ 6 20]
Mc0.Ch0.B1: [ 2 10][ 2 7][ 3 8][ 2 8][ 3 12][ 5 12][ 5 13][ 8 16]
Mc0.Ch1.B0: [ 1 13][ 0 13][ 1 14][ 2 11][ 3 11][ 5 17][ 6 17][ 3 14]
Mc0.Ch1.B1: [ 0 11][ 0 13][ 0 13][ 0 10][ 6 16][ 2 8][ 6 14][ 2 11]
Mc0.Ch2.B0: [ 4 16][ 5 13][ 2 11][ 5 18][ 0 10][ 3 14][ 1 9][ 8 19]
Mc0.Ch2.B1: [ 0 7][ 0 7][ 5 13][ 6 13][ 1 15][ 2 13][ 6 17][ 4 17]
Mc0.Ch3.B0: [ 2 19][ 1 19][ 2 16][ 4 19][ 3 15][ 3 15][ 4 13][ 7 15]
Mc0.Ch3.B1: [ 0 15][ 0 14][ 0 11][ 0 12][ 0 9][ 2 15][ 0 14][ 2 15]
Mc1.Ch0.B0: [ 0 10][ 3 13][ 0 12][ 0 12][ 4 15][ 6 15][ 6 16][ 4 15]
Mc1.Ch0.B1: [ 8 8][ 9 9][ 7 8][ 9 10][ 3 8][ 7 9][ 8 8][ 5 8]
Mc1.Ch1.B0: [ 0 10][ 6 19][ 3 16][ 3 22][ 0 11][ 2 20][ 0 16][ 4 20]
Mc1.Ch1.B1: [ 1 8][ 3 11][ 4 9][ 3 9][ 4 11][ 6 14][ 3 13][ 5 13]
Mc1.Ch2.B0: [ 6 15][ 6 15][ 7 15][ 3 12][ 5 13][ 8 17][ 7 16][ 1 14]
Mc1.Ch2.B1: [ 2 9][ 7 14][ 5 11][ 0 8][ 4 15][ 5 12][ 5 14][ 3 12]
Mc1.Ch3.B0: [ 1 12][ 3 13][ 1 8][ 3 11][ 3 10][ 1 12][ 3 14][ 7 13]
Mc1.Ch3.B1: [ 0 11][ 1 18][ 0 8][ 0 13][ 6 16][ 2 11][ 3 16][ 5 22]
Per Bit Offset
Mc0.Ch0.B0: -2 -4 3 1 0 0 5 5
Mc0.Ch0.B1: -2 -4 -3 -3 -1 1 1 4
Mc0.Ch1.B0: -1 -2 -1 -2 -1 3 4 1
Mc0.Ch1.B1: -3 -2 -2 -3 3 -3 2 -2
Mc0.Ch2.B0: 2 1 -2 4 -3 1 -3 6
Mc0.Ch2.B1: -5 -5 1 2 0 -1 4 3
Mc0.Ch3.B0: 3 2 1 4 1 1 1 3
Mc0.Ch3.B1: -1 -1 -3 -2 -4 1 -1 1
Mc1.Ch0.B0: -3 0 -2 -2 2 3 3 2
Mc1.Ch0.B1: 0 1 -1 2 -3 0 0 -2
Mc1.Ch1.B0: -3 5 2 5 -3 3 0 4
Mc1.Ch1.B1: -4 -1 -2 -2 -1 2 0 1
Mc1.Ch2.B0: 3 3 3 -1 1 5 4 -1
Mc1.Ch2.B1: -3 3 0 -4 2 1 2 -1
Mc1.Ch3.B0: -2 0 -4 -1 -2 -2 1 2
Mc1.Ch3.B1: -3 2 -4 -2 3 -2 2 6
START_TxDqBitDelay
R Mc0.C0.R0.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R0.S0.B1 TxDqBitDelay: 4
R Mc0.C0.R0.S0.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S0.B3 TxDqBitDelay: 9
R Mc0.C0.R0.S0.B4 TxDqBitDelay: 8
R Mc0.C0.R0.S0.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S0.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S0.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S1.B0 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B1 TxDqBitDelay: 4
R Mc0.C0.R0.S1.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B4 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S2.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S2.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S2.B2 TxDqBitDelay: 7
R Mc0.C0.R0.S2.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S2.B4 TxDqBitDelay: 7
R Mc0.C0.R0.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S2.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S2.B7 TxDqBitDelay: 9
R Mc0.C0.R0.S3.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S3.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S3.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B4 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S3.B5 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B6 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S3.B7 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S4.B1 TxDqBitDelay: 9
R Mc0.C0.R0.S4.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S4.B4 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S4.B6 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S5.B0 TxDqBitDelay: 3
R Mc0.C0.R0.S5.B1 TxDqBitDelay: 3
R Mc0.C0.R0.S5.B2 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B3 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B4 TxDqBitDelay: 8
R Mc0.C0.R0.S5.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S5.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S6.B0 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S6.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S6.B2 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S6.B4 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S7.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B4 TxDqBitDelay: 4
R Mc0.C0.R0.S7.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S7.B6 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S0.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S0.B1 TxDqBitDelay: 8
R Mc1.C1.R0.S0.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B3 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S1.B0 TxDqBitDelay: 8
R Mc1.C1.R0.S1.B1 TxDqBitDelay: 9
R Mc1.C1.R0.S1.B2 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S1.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S1.B5 TxDqBitDelay: 8
R Mc1.C1.R0.S1.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S1.B7 TxDqBitDelay: 6
R Mc1.C1.R0.S2.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B1 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S2.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S2.B3 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S2.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S2.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S2.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S3.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S3.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B3 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S3.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S3.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B0 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B2 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B3 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B4 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B5 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S4.B6 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S4.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S5.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S5.B2 TxDqBitDelay: 8
R Mc1.C1.R0.S5.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S5.B5 TxDqBitDelay: 9
R Mc1.C1.R0.S5.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S5.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B1 TxDqBitDelay: 8
R Mc1.C1.R0.S6.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S6.B3 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B4 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S7.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S7.B3 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S7.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B7 TxDqBitDelay: 14 (0xE)
STOP_TxDqBitDelay
LstSavd Margins 240 250 260 270 220 220 230 240 250 250 250 260 220 220 260 270 260 270 260 270 250 250 250 250 250 260 260 260 250 260 250 250 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 230 210 250 190 210 240 220 240 240 230 240 190 200 230 250 240 260 250 260 250 230 240 230 230 250 230 250 240 250 220 230
Weighted Center 1 2 1 -1 0 1 1 1 1 1 -1 -1 1 1 1 1
Final Center 74 74 69 72 73 72 66 72 77 77 76 77 77 75 77 76
Edges we pass on to GetMarginBit are
230 220 230 230 200 200 230 230 240 240 240 230 200 190 240 240 250 250 260 250 240 240 230 240 240 240 240 240 250 240 230 220
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ..#..... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .....#.. 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .......#
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707090707070707 ....#... 0x0707070707070707 .......# 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707090707 ......#. 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 .......# 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070709 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 .....#.. 0x0606090607060606 ..$.$.#. 0x0606060606060607 .....#.$ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 .......# 0x0606060606090706 .....$$# 0x0606060606060606 .#...... 0x0606060606060606 ...#.#.# 0x0606060606060607 .#....#$ 0x0606060606060606 ......#. 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060609 .......$
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505060505 .....$.. 0x0505090507050605 ..$.$.$# 0x0505050505060507 ##.#.$.$ 0x0505050505050505 ......#. 0x0505050505050505 ....#... 0x0505050505050506 #....#.$ 0x0505050505090706 .....$$$ 0x0506050505050505 .$#..... 0x0505050605060506 ...$.$.$ 0x0506050505050607 .$..##$$ 0x0505050505050605 ..#..#$. 0x0505050505050505 ......#. 0x0505050505050505 .......# 0x0505050505050509 ....#..$
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404060404 ....#$.. 0x0404090407040605 ..$.$#$$ 0x0505040504060407 $$.$.$.$ 0x0404040404040504 ...#..$. 0x0404040405040404 ....$... 0x0504040404050406 $....$.$ 0x0404040404090706 ....#$$$ 0x0406050404040404 .$$..### 0x0404040604060406 ...$.$.$ 0x0406040405050607 #$##$$$$ 0x0404050404050604 ..$..$$. 0x0404040404040504 .#..#.$. 0x0404040404040405 .......$ 0x0404040405040409 ....$..$
0x0303030303030303 ........ 0x0303030303030303 .......# 0x0303030304060303 ...#$$.. 0x0303090307040605 ..$.$$$$ 0x0505030503060307 $$.$.$.$ 0x0303030403030503 ...$..$# 0x0303030305030303 ....$... 0x0503030303050306 $....$#$ 0x0303030304090706 ....$$$$ 0x0306050303040404 .$$#.$$$ 0x0303030603060306 .#.$.$.$ 0x0406040405050607 $$$$$$$$ 0x0303050303050603 ..$..$$. 0x0304030304030503 .$..$.$. 0x0303030303030305 .......$ 0x0303030305030309 ....$.#$
0x0202020202020202 ......## 0x0202020202020203 ......#$ 0x0202020304060202 #..$$$## 0x0202090207040605 .#$.$$$$ 0x0505020502060207 $$.$.$.$ 0x0202020402020503 ..#$..$$ 0x0202020205020202 ....$... 0x0502020202050306 $#.##$$$ 0x0202020204090706 ...#$$$$ 0x0206050302040404 .$$$.$$$ 0x0203020602060206 .$.$.$.$ 0x0406040405050607 $$$$$$$$ 0x0202050202050602 ##$..$$. 0x0204020204020502 .$..$.$. 0x0202020202020205 ......#$ 0x0202020205020309 ....$.$$
0x0101010101010202 ......$$ 0x0101010101010203 ......$$ 0x0201010304060202 $##$$$$$ 0x0102090107040605 #$$.$$$$ 0x0505010501060107 $$.$.$.$ 0x0101020401010503 ..$$#.$$ 0x0101010105010101 ....$... 0x0502010202050306 $$.$$$$$ 0x0101010204090706 .#.$$$$$ 0x0106050301040404 #$$$.$$$ 0x0103010601060106 .$#$.$.$ 0x0406040405050607 $$$$$$$$ 0x0202050101050601 $$$..$$. 0x0104010104010501 .$#.$.$. 0x0101010101010205 .#.#..$$ 0x0101010105010309 .#..$.$$
0x0000000000000202 ..##..$$ 0x0000000000000203 ......$$ 0x0201010304060202 $$$$$$$$ 0x0102090007040605 $$$#$$$$ 0x0505000500060007 $$#$#$#$ 0x0000020401000503 ..$$$#$$ 0x0000000005000000 ....$#.# 0x0502000202050306 $$.$$$$$ 0x0001000204090706 #$#$$$$$ 0x0106050300040404 $$$$#$$$ 0x0003010600060006 .$$$.$#$ 0x0406040405050607 $$$$$$$$ 0x0202050000050600 $$$.#$$. 0x0004010004000500 .$$.$.$# 0x0001000100000205 #$#$..$$ 0x0001000005000309 .$..$.$$
+--MrcGetMarginBit, rsign = 1
0x0808080808080808 ........ 0x0808080808080808 .#...... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0907090909090909 ..#..... 0x0909090909090909 ..###... 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ..#.#... 0x0909090909090909 #..#.... 0x0909090909090909 ........ 0x0909090909090909 #...#... 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A07090A0A0A0A0A .$$#.... 0x0A0A0909090A0A0A ..$$$..# 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ....#.#. 0x0A0A0A0A0A0A0A0A #....... 0x0A0A0A0A0A0A0A0A .....##. 0x0A0A090A090A0A0A ..$#$... 0x090A0A090A0A0A0A $.#$.... 0x0A0A0A0A0A0A0A0A ....#... 0x090A0A0A090A0A0A $...$... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ...#.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ..#..... 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B .#...... 0x0B07090A0B0B0B0B .$$$.... 0x0B0B0909090B0B0A #.$$$#.$ 0x0B0B0B0B0B0B0B0B ...#.#.. 0x0B0B0B0B0A0B0A0B ....$.$. 0x0A0B0B0B0B0B0B0B $#...... 0x0B0B0B0B0B0A0A0B ....#$$. 0x0B0B090A090B0B0B ..$$$.#. 0x090B0A090B0B0B0B $.$$.... 0x0B0B0B0B0A0B0B0B ###.$.## 0x090B0B0B090B0B0B $...$... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0A0B0B0B0B ...$.... 0x0B0B0B0B0B0B0B0B ...#.... 0x0B0B0A0B0B0B0B0B ..$.##.. 0x0B0B0B0B0B0B0B0B ........
0x0C0B0C0C0C0C0C0C .$...... 0x0C07090A0C0C0C0C .$$$#... 0x0B0C0909090B0C0A $#$$$$.$ 0x0C0C0C0B0C0B0C0C ...$.$.# 0x0C0C0C0C0A0C0A0C ..#.$#$. 0x0A0B0C0C0C0C0C0C $$...... 0x0C0C0C0C0B0A0A0C ....$$$. 0x0C0C090A090C0B0C ..$$$#$. 0x090C0A090C0C0C0C $#$$#... 0x0B0B0B0C0A0C0B0B $$$.$#$$ 0x090C0C0C090C0C0C $.#.$... 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0A0C0C0C0C ...$#..# 0x0C0C0C0B0C0C0C0C ...$.... 0x0C0C0A0C0B0B0C0C ..$.$$.. 0x0C0C0C0C0C0C0C0C ........
0x0D0B0D0D0D0D0D0D #$...... 0x0D07090A0C0D0D0D #$$$$#.. 0x0B0C0909090B0D0A $$$$$$#$ 0x0D0D0D0B0D0B0D0C #..$.$.$ 0x0D0D0C0D0A0C0A0D ..$.$$$. 0x0A0B0D0D0D0D0D0D $$...... 0x0D0D0D0D0B0A0A0D ....$$$. 0x0D0D090A090C0B0D ##$$$$$. 0x090C0A090C0D0D0D $$$$$##. 0x0B0B0B0D0A0C0B0B $$$#$$$$ 0x090D0C0D090D0D0D $.$.$.#. 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0A0C0D0D0C .#.$$..$ 0x0D0D0D0B0D0D0D0D ...$.... 0x0D0D0A0D0B0B0D0D ..$.$$.. 0x0D0D0D0D0D0D0D0D ........
0x0D0B0E0E0E0E0E0E $$...... 0x0D07090A0C0D0E0E $$$$$$.. 0x0B0C0909090B0D0A $$$$$$$$ 0x0D0E0E0B0E0B0E0C $.#$.$.$ 0x0E0E0C0E0A0C0A0E ..$.$$$. 0x0A0B0E0E0E0E0E0E $$...... 0x0E0E0E0E0B0A0A0E .#..$$$# 0x0D0D090A090C0B0E $$$$$$$. 0x090C0A090C0D0D0E $$$$$$$# 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x090E0C0E090E0D0E $.$.$.$. 0x0E0E0E0E0E0E0E0E #....... 0x0E0D0E0A0C0E0E0C #$#$$##$ 0x0E0E0E0B0E0E0E0E #..$.... 0x0E0E0A0E0B0B0E0E #.$#$$.. 0x0E0E0E0E0E0E0E0E #.#..#..
0x0D0B0F0F0F0F0F0F $$...... 0x0D07090A0C0D0F0F $$$$$$#. 0x0B0C0909090B0D0A $$$$$$$$ 0x0D0F0E0B0F0B0F0C $.$$.$.$ 0x0F0F0C0F0A0C0A0F .#$.$$$. 0x0A0B0F0F0F0F0F0F $$...... 0x0F0E0F0F0B0A0A0E .$..$$$$ 0x0D0D090A090C0B0F $$$$$$$# 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x090F0C0F090F0D0F $.$.$.$. 0x0E0F0F0F0F0F0F0F $.##.... 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E0F0F0B0F0F0F0F $..$.... 0x0E0F0A0E0B0B0F0F $#$$$$## 0x0E0F0E0F0F0E0F0F $.$#.$..
0x0D0B101010101010 $$...... 0x0D07090A0C0D0F10 $$$$$$$. 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B100B100C $#$$.$.$ 0x100F0C100A0C0A10 .$$.$$$. 0x0A0B101010101010 $$...#.. 0x100E10100B0A0A0E .$#.$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09100C1009100D10 $.$.$#$# 0x0E100F0F10101010 $.$$.... 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B10101010 $##$.#.# 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E100E0F100E1010 $.$$.$..
0x0D0B111111111111 $$..##.. 0x0D07090A0C0D0F11 $$$$$$$# 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B110B110C $$$$.$.$ 0x110F0C110A0C0A11 #$$#$$$. 0x0A0B111111101111 $$#..$.. 0x110E10110B0A0A0E .$$#$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $#$#$$$$ 0x0E110F0F11111111 $#$$#... 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B11101110 $$$$.$#$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E110E0F110E1111 $.$$.$..
0x0D0B121211111212 $$..$$.. 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$#$#$ 0x110F0C110A0C0A12 $$$$$$$# 0x0A0B111212101212 $$$.#$.. 0x120E10110B0A0A0E .$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11121212 $$$$$... 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$#$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E120E0F120E1212 $.$$.$..
0x0D0B131311111313 $$##$$.. 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$#$$## 0x130E10110B0A0A0E .$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131313 $$$$$##. 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E130E0F130E1313 $.$$.$#.
0x0D0B131311111414 $$$$$$#. 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$$$$$$ 0x140E10110B0A0A0E #$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131314 $$$$$$$. 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E140E0F140E1314 $.$$.$$.
0x0D0B131311111415 $$$$$$$. 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$$$$$$ 0x140E10110B0A0A0E $$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131315 $$$$$$$# 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E150E0F150E1315 $#$$#$$.
0x0D0B131311111416 $$$$$$$# 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$$$$$$ 0x140E10110B0A0A0E $$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131315 $$$$$$$$ 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E150E0F150E1316 $$$$$$$.
0x0D0B131311111416 $$$$$$$$ 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$$$$$$ 0x140E10110B0A0A0E $$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131315 $$$$$$$$ 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E150E0F150E1317 $$$$$$$.
0x0D0B131311111416 $$$$$$$$ 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$$$$$$ 0x140E10110B0A0A0E $$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131315 $$$$$$$$ 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E150E0F150E1318 $$$$$$$.
0x0D0B131311111416 $$$$$$$$ 0x0D07090A0C0D0F11 $$$$$$$$ 0x0B0C0909090B0D0A $$$$$$$$ 0x0D100E0B120B120C $$$$$$$$ 0x110F0C110A0C0A12 $$$$$$$$ 0x0A0B111312101313 $$$$$$$$ 0x140E10110B0A0A0E $$$$$$$$ 0x0D0D090A090C0B0F $$$$$$$$ 0x090C0A090C0D0D0E $$$$$$$$ 0x0B0B0B0D0A0C0B0B $$$$$$$$ 0x09110C1109100D10 $$$$$$$$ 0x0E110F0F11131315 $$$$$$$$ 0x0E0D0E0A0C0E0E0C $$$$$$$$ 0x0E10100B12101110 $$$$$$$$ 0x0E0F0A0E0B0B0F0F $$$$$$$$ 0x0E150E0F150E1319 $$$$$$$#
Edges
Mc0.Ch0.B0: [ 0 12][ 0 10][ 1 18][ 1 18][ 0 16][ 0 16][ 3 19][ 3 21]
Mc0.Ch0.B1: [ 0 12][ 0 7][ 0 8][ 0 9][ 0 11][ 0 12][ 3 14][ 4 16]
Mc0.Ch1.B0: [ 3 10][ 2 11][ 2 8][ 4 8][ 5 8][ 7 10][ 3 12][ 3 9]
Mc0.Ch1.B1: [ 2 12][ 3 15][ 9 13][ 1 10][ 8 17][ 5 10][ 7 17][ 6 11]
Mc0.Ch2.B0: [ 6 16][ 6 14][ 1 11][ 6 16][ 1 9][ 7 11][ 1 9][ 8 17]
Mc0.Ch2.B1: [ 0 9][ 0 10][ 3 16][ 5 18][ 2 17][ 1 15][ 6 18][ 4 18]
Mc0.Ch3.B0: [ 0 19][ 0 13][ 0 15][ 0 16][ 6 10][ 1 9][ 0 9][ 1 13]
Mc0.Ch3.B1: [ 6 12][ 3 12][ 0 8][ 3 9][ 3 8][ 6 11][ 4 10][ 7 14]
Mc1.Ch0.B0: [ 1 8][ 2 11][ 1 9][ 3 8][ 5 11][ 9 12][ 8 12][ 7 13]
Mc1.Ch0.B1: [ 2 10][ 7 10][ 6 10][ 4 12][ 1 9][ 5 11][ 5 10][ 5 10]
Mc1.Ch1.B0: [ 0 8][ 4 16][ 2 11][ 7 16][ 0 8][ 7 15][ 1 12][ 7 15]
Mc1.Ch1.B1: [ 5 13][ 7 16][ 5 14][ 5 14][ 6 16][ 6 18][ 7 18][ 8 20]
Mc1.Ch2.B0: [ 3 13][ 3 12][ 6 13][ 0 9][ 1 11][ 6 13][ 7 13][ 0 11]
Mc1.Ch2.B1: [ 0 13][ 5 15][ 2 15][ 0 10][ 5 17][ 0 15][ 6 16][ 1 15]
Mc1.Ch3.B0: [ 1 13][ 2 14][ 1 9][ 2 13][ 0 10][ 0 10][ 3 14][ 6 14]
Mc1.Ch3.B1: [ 0 13][ 2 20][ 0 13][ 0 14][ 6 20][ 0 13][ 4 18][ 9 24]
Per Bit Offset
Mc0.Ch0.B0: -2 -3 2 2 0 0 3 4
Mc0.Ch0.B1: -2 -5 -4 -4 -3 -2 1 2
Mc0.Ch1.B0: -2 -2 -3 -2 -2 1 -1 -2
Mc0.Ch1.B1: -1 1 3 -3 5 -1 4 1
Mc0.Ch2.B0: 3 2 -2 3 -3 1 -3 5
Mc0.Ch2.B1: -4 -3 2 4 2 0 4 3
Mc0.Ch3.B0: 2 -2 -1 0 0 -3 -4 -1
Mc0.Ch3.B1: 1 -1 -4 -2 -3 1 -1 3
Mc1.Ch0.B0: -4 -2 -3 -3 0 3 2 2
Mc1.Ch0.B1: -2 1 0 0 -3 0 -1 -1
Mc1.Ch1.B0: -4 2 -2 4 -4 3 -2 3
Mc1.Ch1.B1: 1 4 2 2 3 4 5 6
Mc1.Ch2.B0: 0 -1 2 -4 -2 2 2 -3
Mc1.Ch2.B1: -2 2 1 -3 3 -1 3 0
Mc1.Ch3.B0: -1 0 -3 -1 -3 -3 1 2
Mc1.Ch3.B1: -2 3 -2 -1 5 -2 3 9
START_TxDqBitDelay
R Mc0.C0.R1.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S0.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S0.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S0.B3 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S0.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S0.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S0.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S1.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B1 TxDqBitDelay: 3
R Mc0.C0.R1.S1.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S1.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S1.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S1.B5 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B6 TxDqBitDelay: 9
R Mc0.C0.R1.S1.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S2.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S2.B6 TxDqBitDelay: 7
R Mc0.C0.R1.S2.B7 TxDqBitDelay: 6
R Mc0.C0.R1.S3.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S3.B1 TxDqBitDelay: 9
R Mc0.C0.R1.S3.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S3.B3 TxDqBitDelay: 5
R Mc0.C0.R1.S3.B4 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S3.B5 TxDqBitDelay: 7
R Mc0.C0.R1.S3.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S3.B7 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B0 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S4.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S4.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S4.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S4.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B6 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S5.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S5.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S5.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S5.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S6.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S6.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B2 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B3 TxDqBitDelay: 8
R Mc0.C0.R1.S6.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S6.B5 TxDqBitDelay: 5
R Mc0.C0.R1.S6.B6 TxDqBitDelay: 4
R Mc0.C0.R1.S6.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B0 TxDqBitDelay: 9
R Mc0.C0.R1.S7.B1 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S7.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S7.B6 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S0.B1 TxDqBitDelay: 6
R Mc1.C1.R1.S0.B2 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B4 TxDqBitDelay: 8
R Mc1.C1.R1.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S0.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S1.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B1 TxDqBitDelay: 9
R Mc1.C1.R1.S1.B2 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B3 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B4 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B5 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B6 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B7 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S2.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S2.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S2.B3 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S2.B4 TxDqBitDelay: 4
R Mc1.C1.R1.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B6 TxDqBitDelay: 6
R Mc1.C1.R1.S2.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B0 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S3.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B5 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S3.B6 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S3.B7 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R1.S4.B0 TxDqBitDelay: 8
R Mc1.C1.R1.S4.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S4.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B3 TxDqBitDelay: 4
R Mc1.C1.R1.S4.B4 TxDqBitDelay: 6
R Mc1.C1.R1.S4.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B7 TxDqBitDelay: 5
R Mc1.C1.R1.S5.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S5.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B2 TxDqBitDelay: 9
R Mc1.C1.R1.S5.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S5.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S5.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S5.B7 TxDqBitDelay: 8
R Mc1.C1.R1.S6.B0 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S6.B2 TxDqBitDelay: 5
R Mc1.C1.R1.S6.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B4 TxDqBitDelay: 5
R Mc1.C1.R1.S6.B5 TxDqBitDelay: 5
R Mc1.C1.R1.S6.B6 TxDqBitDelay: 9
R Mc1.C1.R1.S6.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S7.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S7.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S7.B4 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S7.B5 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S7.B7 TxDqBitDelay: 17 (0x11)
STOP_TxDqBitDelay
Calling with EnRxDutyCycle = 0, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 230 230 240 240 200 190 220 220 240 240 240 240 190 200 240 230 230 240 250 250 250 240 240 230 240 250 250 250 240 240 230 220 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 250 240 250 210 190 230 230 250 250 250 250 210 190 240 240 250 250 250 250 260 250 230 250 250 250 250 250 250 250 250 240
Vref = -10: 240 230 230 220 200 180 230 210 240 230 240 230 190 180 240 230 240 220 230 230 250 240 220 220 230 230 240 230 220 230 230 220
Vref = -20: 220 210 210 210 180 150 200 190 220 210 230 210 190 140 220 200 220 210 230 220 230 200 210 190 220 210 210 210 220 220 220 200
Vref = -30: 190 190 190 180 160 120 190 160 190 190 200 180 170 110 210 180 200 190 210 190 200 180 210 170 190 180 200 180 200 190 190 170
Vref = 10: 250 250 250 240 200 200 240 230 260 250 260 250 190 190 240 240 250 250 250 250 260 240 230 240 250 250 260 250 240 250 240 240
Vref = 20: 230 230 230 230 190 180 220 220 230 230 240 230 190 170 230 230 230 240 240 230 250 240 220 210 230 230 240 230 220 230 230 220
Vref = 30: 220 210 220 220 170 150 210 200 220 210 220 210 180 140 220 200 220 220 230 220 220 210 210 200 220 200 230 200 210 210 210 200
Weighted Center 0 0 -1 0 0 0 -1 0 0 0 -1 0 0 0 0 -1
Final Center 75 73 68 73 75 74 66 74 74 74 72 77 74 73 77 74
LstSavd Margins 230 220 230 230 200 200 230 230 240 240 240 230 200 190 240 240 250 250 260 250 240 240 230 240 240 240 240 240 250 240 230 220 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 250 240 250 240 190 200 240 230 260 260 250 250 200 200 250 250 260 250 260 250 250 250 230 240 250 240 250 250 250 250 240 230
Vref = -10: 230 220 220 220 190 180 220 220 230 240 240 230 190 180 230 230 240 230 240 240 240 230 230 230 240 230 250 230 230 240 240 220
Vref = -20: 220 200 210 210 180 160 210 190 220 210 220 210 180 150 220 210 230 200 230 210 230 210 220 190 220 200 220 210 230 210 220 190
Vref = -30: 190 170 200 170 160 120 200 160 200 190 210 170 170 120 210 190 220 180 220 180 210 180 190 170 200 180 200 190 200 190 210 170
Vref = 10: 250 240 260 240 200 210 240 240 260 260 260 250 200 200 240 240 250 250 260 250 250 250 240 240 240 250 260 250 250 240 250 230
Vref = 20: 230 220 240 220 190 190 230 230 240 240 240 240 180 180 230 230 240 230 250 230 240 230 230 230 240 230 230 240 230 230 230 220
Vref = 30: 220 210 220 210 180 160 200 200 210 220 220 210 170 150 220 210 230 200 220 210 210 200 210 200 220 210 220 220 220 210 210 200
Weighted Center -1 -1 0 0 0 0 -1 0 -1 -1 0 0 0 0 0 -1
Final Center 73 73 69 72 73 72 65 72 76 76 76 77 77 75 77 75
MRC task Write Timing Centering 2D Before Power Training -- SUCCEEDED, Status = 0h. Stack Depth: 160588
Post Code: DD7Dh
MRC task -- Rload Optimization -- Started.
Rload Optimization not needed
MRC task Rload Optimization -- SUCCEEDED, Status = 0h.
Post Code: DD39h
MRC task -- Read Timing Centering 2D Before Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 160 170 160 170 110 120 160 170 150 160 160 170 90 90 140 150 160 170 180 180 160 170 160 170 160 170 150 160 180 180 160 170 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 160 140 150 140 90 90 140 140 150 130 150 140 70 60 120 120 150 140 170 150 150 140 160 140 160 140 140 130 180 150 140 140
Weighted Center -1 -1 0 0 -1 -1 -1 0 -1 -1 -1 -1 -1 -1 -2 0
Final Center -13 -13 -7 -12 -12 -13 -5 -10 -13 -14 -13 -13 -13 -12 -15 -12
Edges we pass on to GetMarginBit are
150 150 140 150 90 90 140 140 140 140 140 150 60 70 120 120 140 150 160 160 140 150 150 150 150 150 130 140 160 170 140 140
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0404040404040404 .#...... 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ..#..... 0x0404040404040404 ........
0x0305030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ..#..... 0x0303030303030303 ....#... 0x0303030303030303 ##...... 0x0303030303030303 ........ 0x0303030303030303 ...#.... 0x0303050303030303 .....#.. 0x0303030303030303 ........
0x0205020202020202 #$...... 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 .....#.. 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 ......#. 0x0202020202020202 ....#... 0x0202020202020202 ........ 0x0202030202020202 ##$..... 0x0202020203020202 ....$... 0x0303020202020202 $$..#.#. 0x0202020202020202 ....#.## 0x0202020302020202 ...$...# 0x0202050202030202 ..$.#$.. 0x0202020202020202 ........
0x0205010101010101 $$...... 0x0101010101010101 ........ 0x0101010101010101 ....#.#. 0x0101010101020101 ....#$#. 0x0101010101010101 ..#.#.#. 0x0101010101010101 .#...... 0x0101010101010201 ......$. 0x0101010102010101 ....$... 0x0101010101010101 #.##.... 0x0202030101010101 $$$##.## 0x0101010103010101 ....$... 0x0303010102010201 $$..$.$. 0x0101010102010202 ....$.$$ 0x0101010301010102 ...$...$ 0x0101050102030101 #.$#$$.. 0x0101010101010101 ........
0x0205000000000000 $$...... 0x0000000000000000 #####... 0x0000000001000100 ....$.$. 0x0000000001020100 ....$$$. 0x0000010001000100 ..$.$.$. 0x0001000000000000 #$...#.. 0x0000000000000200 ......$# 0x0000000002000000 ....$... 0x0100010100000000 $.$$.... 0x0202030101000101 $$$$$.$$ 0x0000000003000000 #...$... 0x0303000002000200 $$.#$#$. 0x0000000002000202 ....$#$$ 0x0000000300000002 #.#$.##$ 0x0100050102030000 $#$$$$#. 0x0000000000000000 ..#..#..
+--MrcGetMarginBit, rsign = 1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........
0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........
0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........
0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........
0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........
0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........
0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........
0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........
0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........
0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........
0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........
0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........
0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........
0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........
0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........
0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........
0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........
0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ....#... 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........
0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1C1D1D1D ....$... 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........
0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1C1E1E1E ....$... 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........
0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1C1F1F1F ....$... 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........
0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x202020201C202020 ..#.$#.. 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........
0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x212120211C202121 ..$.$$.. 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........
0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x222220221C202222 ..$#$$.. 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........
0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x232320221C202323 .#$$$$## 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........
0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x242320221C202323 .$$$$$$$ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........
0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x252320221C202323 #$$$$$$$ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........
0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ....#... 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x252320221C202323 $$$$$$$$ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........
0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272726272727 ....$.#. 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x252320221C202323 $$$$$$$$ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........
0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282826282728 ....$.$# 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x252320221C202323 $$$$$$$$ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........
0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292926292728 ....$#$$ 0x2929292929292929 ........ 0x2929292929292929 ..#...#. 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x252320221C202323 $$$$$$$$ 0x2929292929292929 ..#..#.. 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ......##
0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A26292728 ....$$$$ 0x2A2A2A2A2A2A2A2A ...#...# 0x2A2A292A2A2A292A ..$#..$. 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A .....#.# 0x252320221C202323 $$$$$$$$ 0x2A2A292A2A292A2A #.$..$.. 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2929 .#....$$
0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B26292728 #...$$$$ 0x2B2B2B2A2B2B2B2A #..$#..$ 0x2B2B292A2B2B292B .#$$.#$# 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2A2B2A .....$.$ 0x252320221C202323 $$$$$$$$ 0x2A2B292B2B292B2B $#$..$.. 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2A2B2B2B2B2929 .$..#.$$
0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2B2C2C2C26292728 $#.#$$$$ 0x2B2C2C2A2B2C2C2A $..$$..$ 0x2C2B292A2C2B292B .$$$.$$$ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2A2C2A ...#.$.$ 0x252320221C202323 $$$$$$$$ 0x2A2B292C2C292C2C $$$.#$#. 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2A2C2C2B2C2929 .$..$.$$
0x2D2D2D2D2D2D2D2D .......# 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ....##.. 0x2B2C2D2C26292728 $$#$$$$$ 0x2B2D2D2A2B2D2D2A $.#$$#.$ 0x2D2B292A2D2B292B #$$$#$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2C2D2A2D2A .#.$.$.$ 0x252320221C202323 $$$$$$$$ 0x2A2B292D2C292C2D $$$.$$$. 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2A2D2D2B2D2929 .$..$.$$
0x2E2E2E2E2E2E2E2D ......#$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2D2D2E2E ....$$#. 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $#$$$$#$ 0x2D2B292A2D2B292B $$$$$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2D2E2C2E2A2E2A .$.$.$.$ 0x252320221C202323 $$$$$$$$ 0x2A2B292E2C292C2E $$$.$$$# 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E .......# 0x2E2A2E2E2B2E2929 .$..$#$$
0x2F2F2F2F2F2F2E2D ..#.#.$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2D2D2E2F .#..$$$# 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2D2F2C2F2A2F2A .$#$.$.$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$#$$$$ 0x2F2F2F2F2F2F2F2F .#...... 0x2F2F2F2F2F2F2F2E #......$ 0x2F2A2F2F2B2E2929 .$#.$$$$
0x30302F302F302E2D ..$.$.$$ 0x3030303030303030 ........ 0x302F30302D2D2E2F #$..$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 .....#.. 0x302D2F2C302A302A .$$$.$#$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x302F303030303030 .$..#... 0x2F3030303030302E $#..#..$ 0x302A2F302B2E2929 #$$#$$$$
0x31312F312F312E2D ..$#$#$$ 0x3131313131313131 ........ 0x302F31312D2D2E2F $$##$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313131303131 .#...$.. 0x312D2F2C312A302A #$$$#$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F313130313131 #$..$... 0x2F3031313031312E $$..$.#$ 0x302A2F302B2E2929 $$$$$$$$
0x32322F312F312E2D ..$$$$$$ 0x3232323232323232 ........ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3232323232323232 ....#... 0x3232323232323232 ........ 0x3232323232323232 ........ 0x3231323232303232 .$...$## 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F323230323232 $$..$#.. 0x2F3032323032312E $$.#$#$$ 0x302A2F302B2E2929 $$$$$$$$
0x33332F312F312E2D ..$$$$$$ 0x3333333333333333 ..#..#.# 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3333333332333333 ....$#.. 0x3333333333333333 .....#.# 0x3333333333333333 .....#.. 0x3331333333303232 #$.#.$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333330323333 $$#.$$.. 0x2F3033323032312E $$#$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x34342F312F312E2D .#$$$$$$ 0x3434333434333433 ..$..$#$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3434343432333434 ....$$.. 0x3434343434333433 .....$.$ 0x3434343434333434 ....#$.. 0x3331343334303232 $$#$#$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333430323434 $$$.$$#. 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D #$$$$$$$ 0x3535333535333433 ##$.#$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3535353532333535 ....$$.. 0x3535353535333533 #....$.$ 0x3535353534333535 ....$$#. 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333530323435 $$$.$$$. 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$#$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3636363632333636 ...#$$.. 0x3536363636333633 $..#.$#$ 0x3636363634333536 ....$$$. 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333630323436 $$$.$$$# 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$$$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3737373632333737 ...$$$.. 0x3537373637333633 $#.$.$$$ 0x3737373734333537 ....$$$# 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333730323436 $$$#$$$$ 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$$$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3838383632333838 #.#$$$.# 0x3537383638333633 $$.$#$$$ 0x3838383834333537 .#..$$$$ 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333730323436 $$$$$$$$ 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$$$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x3839383632333938 $.$$$$#$ 0x3537393638333633 $$#$$$$$ 0x3938393934333537 #$..$$$$ 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333730323436 $$$$$$$$ 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$$$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x383A383632333938 $.$$$$$$ 0x3537393638333633 $$$$$$$$ 0x39383A3A34333537 $$#.$$$$ 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333730323436 $$$$$$$$ 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$$$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x383B383632333938 $#$$$$$$ 0x3537393638333633 $$$$$$$$ 0x39383A3B34333537 $$$.$$$$ 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333730323436 $$$$$$$$ 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
0x35342F312F312E2D $$$$$$$$ 0x3535333635333433 $$$$$$$$ 0x302F31312D2D2E2F $$$$$$$$ 0x2B2C2D2C26292728 $$$$$$$$ 0x2B2E2D2A2B2D2E2A $$$$$$$$ 0x2D2B292A2D2B292B $$$$$$$$ 0x383B383632333938 $$$$$$$$ 0x3537393638333633 $$$$$$$$ 0x39383A3C34333537 $$$#$$$$ 0x3331343334303232 $$$$$$$$ 0x312D2F2C312A302A $$$$$$$$ 0x252320221C202323 $$$$$$$$ 0x2A2B292F2C292C2E $$$$$$$$ 0x312F333730323436 $$$$$$$$ 0x2F3033323032312E $$$$$$$$ 0x302A2F302B2E2929 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 3 52][ 5 51][ 0 46][ 0 48][ 0 46][ 0 48][ 0 45][ 0 44]
Mc0.Ch0.B1: [ 1 52][ 1 52][ 1 50][ 1 53][ 1 52][ 0 50][ 0 51][ 0 50]
Mc0.Ch1.B0: [ 0 47][ 0 46][ 0 48][ 0 48][ 2 44][ 0 44][ 2 45][ 0 46]
Mc0.Ch1.B1: [ 0 42][ 0 43][ 0 44][ 0 43][ 2 37][ 3 40][ 2 38][ 0 39]
Mc0.Ch2.B0: [ 0 42][ 0 45][ 2 44][ 0 41][ 2 42][ 0 44][ 2 45][ 0 41]
Mc0.Ch2.B1: [ 1 44][ 2 42][ 0 40][ 0 41][ 0 44][ 1 42][ 0 40][ 0 42]
Mc0.Ch3.B0: [ 0 55][ 0 58][ 0 55][ 0 53][ 0 49][ 0 50][ 3 56][ 1 55]
Mc0.Ch3.B1: [ 0 52][ 0 54][ 0 56][ 0 53][ 3 55][ 0 50][ 0 53][ 0 50]
Mc1.Ch0.B0: [ 2 56][ 0 55][ 2 57][ 2 59][ 0 51][ 0 50][ 0 52][ 0 54]
Mc1.Ch0.B1: [ 3 50][ 3 48][ 4 51][ 2 50][ 2 51][ 0 47][ 2 49][ 2 49]
Mc1.Ch1.B0: [ 1 48][ 0 44][ 0 46][ 0 43][ 4 48][ 0 41][ 0 47][ 0 41]
Mc1.Ch1.B1: [ 4 36][ 4 34][ 0 31][ 1 33][ 3 27][ 1 31][ 3 34][ 0 34]
Mc1.Ch2.B0: [ 0 41][ 0 42][ 0 40][ 0 46][ 3 43][ 1 40][ 3 43][ 3 45]
Mc1.Ch2.B1: [ 1 48][ 0 46][ 1 50][ 4 54][ 0 47][ 1 49][ 1 51][ 3 53]
Mc1.Ch3.B0: [ 2 46][ 1 47][ 5 50][ 2 49][ 3 47][ 4 49][ 1 48][ 0 45]
Mc1.Ch3.B1: [ 0 47][ 0 41][ 1 46][ 0 47][ 0 42][ 1 45][ 0 40][ 0 40]
Per Bit Offset
Mc0.Ch0.B0: 24 24 19 20 19 20 19 18
Mc0.Ch0.B1: 23 23 22 23 23 21 22 21
Mc0.Ch1.B0: 20 19 20 20 19 18 20 19
Mc0.Ch1.B1: 17 18 18 18 16 18 16 16
Mc0.Ch2.B0: 17 19 19 17 18 18 20 17
Mc0.Ch2.B1: 19 18 16 17 18 18 16 17
Mc0.Ch3.B0: 24 25 24 23 21 21 26 24
Mc0.Ch3.B1: 22 23 24 23 25 21 23 21
Mc1.Ch0.B0: 25 24 26 27 22 21 22 23
Mc1.Ch0.B1: 23 22 24 22 23 20 22 22
Mc1.Ch1.B0: 21 18 19 18 22 17 20 17
Mc1.Ch1.B1: 16 15 12 13 11 12 15 13
Mc1.Ch2.B0: 17 17 16 19 19 17 19 20
Mc1.Ch2.B1: 21 19 22 25 20 21 22 24
Mc1.Ch3.B0: 20 20 24 22 21 23 21 19
Mc1.Ch3.B1: 20 17 20 20 17 19 16 16
START_RxDqsBitDelay
R Mc0.C0.R0.S0.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S0.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S0.B2 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S0.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B4 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B6 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S0.B7 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S1.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B2 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S1.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B4 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B6 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S2.B0 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B4 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S2.B6 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S3.B0 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B2 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B3 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B4 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S3.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S3.B7 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S4.B0 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S4.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S4.B2 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S4.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S4.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S4.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S4.B6 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S4.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B0 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S5.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B2 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S5.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S5.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S6.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S6.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S6.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S6.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S6.B4 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S6.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S6.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S6.B7 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S7.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S7.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S7.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B7 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S0.B0 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S0.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S0.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S0.B3 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S0.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S0.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S0.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S0.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S1.B0 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S1.B1 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B2 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S1.B3 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S1.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S1.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S2.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S2.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S2.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S2.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S2.B6 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S2.B7 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S3.B0 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S3.B1 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B2 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R0.S3.B3 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S3.B4 RxDqsBitDelay: 15 (0xF)
R Mc1.C1.R0.S3.B5 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R0.S3.B6 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B7 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S4.B0 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S4.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S4.B2 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S4.B3 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S4.B4 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S4.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S4.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S4.B7 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S5.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S5.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S5.B2 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S5.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S5.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S5.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S5.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S5.B7 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S6.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S6.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S6.B2 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S6.B3 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S6.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B5 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S6.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B7 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S7.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S7.B2 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B4 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S7.B5 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S7.B6 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S7.B7 RxDqsBitDelay: 20 (0x14)
STOP_RxDqsBitDelay
LstSavd Margins 160 160 160 160 110 120 160 160 160 160 160 160 90 90 160 160 160 170 180 180 170 170 170 170 180 180 160 170 180 190 150 160 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 160 130 160 130 100 90 140 130 150 130 150 130 70 60 130 130 160 140 170 150 160 140 160 140 160 150 150 140 170 160 140 130
Weighted Center -2 -2 -1 -1 -1 -1 -1 0 -1 -1 -1 -1 -1 -1 -1 -1
Final Center -13 -13 -8 -12 -12 -12 -5 -11 -13 -14 -13 -13 -14 -13 -15 -12
Edges we pass on to GetMarginBit are
140 150 140 150 90 100 130 140 140 140 140 140 60 70 130 130 150 150 160 160 150 150 150 150 150 160 140 150 160 170 130 140
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0404040404040404 .#...... 0x0404040404040404 .###.... 0x0404040404040404 ....#... 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ..##.... 0x0404040404040404 ....#... 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0305030303030303 ........ 0x0305050503030303 #.##.##. 0x0303030305030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ......#. 0x0303030303030303 ........ 0x0303050503030303 ....#... 0x0303030305030303 ####..#. 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ...#.... 0x0303030303030303 ..#.#... 0x0303030303030303 ........
0x0205020202020202 .$...... 0x0305060602030302 $$###$$. 0x0202020205020202 ....$... 0x0202020202020202 .....#.. 0x0202020202020202 ....#... 0x0202020202020202 #....... 0x0202020202020302 ......$. 0x0202020202020202 ....#... 0x0202050503020202 ##$$$... 0x0303030305020302 $$$$$.$. 0x0202020202020202 #....... 0x0202020202020202 #....#.. 0x0202020202020202 ........ 0x0202020302020202 ...$.... 0x0202030203020202 ..$.$... 0x0202020202020202 .....##.
0x0105010101010101 .$...... 0x0305070702030301 $$..$$$. 0x0101010105010101 ..#.$##. 0x0101010101020101 .....$.. 0x0101010102010101 ....$.#. 0x0201010101010101 $....... 0x0101010101010301 ......$. 0x0101010102010101 ..#.$... 0x0202050503010101 $$$$$... 0x0303030305010301 $$$$$#$# 0x0201010101010101 $...#... 0x0201010101020101 $#..#$.. 0x0101010101010101 .....### 0x0101010301010101 ...$.#.. 0x0101030103010101 #.$.$#.# 0x0101010101020201 ..#..$$.
0x0005000000000000 .$...... 0x0305070702030300 $$$$$$$. 0x0000010005010100 ..$.$$$. 0x0000000000020000 .....$.. 0x0000000002000100 ....$.$. 0x0200000000000000 $#...... 0x0000000000000300 ......$. 0x0000010002000000 ..$.$##. 0x0202050503000000 $$$$$..# 0x0303030305010301 $$$$$$$$ 0x0200000001000000 $...$... 0x0201000001020000 $$..$$#. 0x0000000000010101 ....#$$$ 0x0000000300010000 #.#$.$## 0x0100030003010001 $.$#$$#$ 0x0000010000020200 ..$..$$.
+--MrcGetMarginBit, rsign = 1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........
0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........
0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........
0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........
0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........
0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........
0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........
0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........
0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........
0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........
0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........
0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........
0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........
0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........
0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........
0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........
0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........
0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........
0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ....#... 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........
0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1D1E1E1E ....$... 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........
0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1D1F1F1F ....$... 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........
0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x202020201D202020 ....$... 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........
0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x212121211D212121 ....$#.# 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........
0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x222222221D212221 ..#.$$.$ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........
0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x232322231D212321 ..$.$$#$ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........
0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x242422241D212321 .#$.$$$$ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........
0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x252422251D212321 #$$#$$$$ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........
0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x252422251D212321 $$$$$$$$ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........
0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x252422251D212321 $$$$$$$$ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........
0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ....#... 0x2828282828282828 .......# 0x2828282828282828 ..#...#. 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x252422251D212321 $$$$$$$$ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........
0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292928292929 ....$... 0x2929292929292928 .......$ 0x2929282929292829 ..$...$. 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x252422251D212321 $$$$$$$$ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........
0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A282A2A2A ..#.$.#. 0x2A2A2A2A2A2A2A28 #......$ 0x2A2A282A2A2A282A ..$#..$. 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A .....#.. 0x252422251D212321 $$$$$$$$ 0x2A2A2A2A2A2A2A2A .#...... 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........
0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2A2B282B2A2B ..$.$.$# 0x2A2B2B2B2B2B2B28 $....#.$ 0x2B2B282A2B2B282B ..$$..$# 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2A2B2B .....$.# 0x252422251D212321 $$$$$$$$ 0x2B2A2B2B2B2B2B2B .$...... 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........
0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2A2C282C2A2B ..$.$#$$ 0x2A2C2C2C2C2B2C28 $..##$#$ 0x2C2C282A2C2C282B .#$$##$$ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2A2C2B .....$.$ 0x252422251D212321 $$$$$$$$ 0x2C2A2C2C2C2C2C2C .$..##.. 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C .#....##
0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D .....#.. 0x2D2D2A2D282C2A2B ..$.$$$$ 0x2A2D2D2C2C2B2C28 $.#$$$$$ 0x2D2C282A2C2C282B .$$$$$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D .#...... 0x2D2D2D2D2D2A2D2B .#.#.$.$ 0x252422251D212321 $$$$$$$$ 0x2D2A2D2D2C2C2D2D #$..$$#. 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2C2D2D2D2D2C2C .$....$$
0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2D2E2E .....$.# 0x2E2E2A2E282C2A2B .#$#$$$$ 0x2A2E2D2C2C2B2C28 $.$$$$$$ 0x2E2C282A2C2C282B .$$$$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2D2E2E2E2E2E2E .$...... 0x2E2D2E2D2E2A2E2B .$#$.$.$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E2E2C2C2D2E $$#.$$$# 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2C2E2E2E2E2C2C .$..#.$$
0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2D2F2E ....#$.$ 0x2F2E2A2E282C2A2B .$$$$$$$ 0x2A2F2D2C2C2B2C28 $#$$$$$$ 0x2F2C282A2C2C282B #$$$$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ....#... 0x2F2D2F2F2F2F2F2F #$...#.. 0x2F2D2E2D2F2A2F2B .$$$.$.$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E2F2C2C2D2E $$$.$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F .......# 0x2F2C2F2F2E2F2C2C .$..$.$$
0x3030303030303030 ....#... 0x3030303030303030 ........ 0x303030302F2D302E ##..$$#$ 0x302E2A2E282C2A2B #$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x303030302F303030 ....$... 0x2F2D3030302F3030 $$##.$## 0x302D2E2D302A302B .$$$.$.$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E302C2C2D2E $$$.$$$$ 0x3030303030303030 ........ 0x303030303030302F .#..#..$ 0x302C30302E302C2C .$..$#$$
0x3131313130313131 ..#.$#.# 0x3131313131313131 ........ 0x303031312F2D302E $$..$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x313131312F313131 ....$#.. 0x2F2D3030312F3030 $$$$.$$$ 0x312D2E2D312A312B .$$$#$#$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$#$$$$ 0x3131313131313131 ....#... 0x313031313031312F #$..$.#$ 0x312C31312E302C2C #$##$$$$
0x3232313230313231 ..$.$$#$ 0x3232323232323232 ........ 0x303032322F2D302E $$..$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3232323232323232 ........ 0x3232323232323232 ........ 0x323232322F313232 ....$$#. 0x2F2D3030322F3030 $$$$#$$$ 0x322D2E2D312A312B .$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3232323231323232 .#..$... 0x313032323032312F $$.#$.$$ 0x312C31312E302C2C $$$$$$$$
0x3333313330313231 ..$.$$$$ 0x3333333333333333 .....#.# 0x303033332F2D302E $$#.$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3333333333333333 ........ 0x3333333333333333 ........ 0x333333332F313233 ....$$$# 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B #$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332333331333333 #$..$... 0x313033323033312F $$.$$.$$ 0x312C31312E302C2C $$$$$$$$
0x3434313430313231 ..$#$$$$ 0x3434343434333433 ##...$#$ 0x303033342F2D302E $$$#$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3434343434343434 ........ 0x3434343434343434 .....#.. 0x343434342F313233 .#..$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332343431343434 $$..$##. 0x313034323034312F $$#$$#$$ 0x312C31312E302C2C $$$$$$$$
0x3535313430313231 ..$$$$$$ 0x3434353535333433 $$...$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3535353535353535 ........ 0x3535353535343535 .....$.. 0x353435352F313233 .$..$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353531343435 $$#.$$$# 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 ##$$$$$$ 0x3434363636333433 $$...$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3636363636363636 ........ 0x3636363636343636 .....$.. 0x363436362F313233 .$..$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353631343435 $$$.$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373737333433 $$#.#$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3737373737373737 .....#.. 0x3737373737343737 ##..#$.# 0x373437372F313233 #$..$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353731343435 $$$.$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$#$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3838383838373838 ....#$.. 0x3737383837343837 $$.#$$#$ 0x373438382F313233 $$#.$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353831343435 $$$.$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3939393938373939 ....$$#. 0x3737393837343837 $$#$$$$$ 0x373438392F313233 $$$#$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$#$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3A3A3A3A3837393A ....$$$. 0x3737393837343837 $$$$$$$$ 0x373438392F313233 $$$$$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$$$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3B3B3B3B3837393B ..##$$$# 0x3737393837343837 $$$$$$$$ 0x373438392F313233 $$$$$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$$$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3C3C3B3B3837393B #.$$$$$$ 0x3737393837343837 $$$$$$$$ 0x373438392F313233 $$$$$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$$$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3C3D3B3B3837393B $.$$$$$$ 0x3737393837343837 $$$$$$$$ 0x373438392F313233 $$$$$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$$$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3C3E3B3B3837393B $.$$$$$$ 0x3737393837343837 $$$$$$$$ 0x373438392F313233 $$$$$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$$$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
0x3636313430313231 $$$$$$$$ 0x3434373837333433 $$$$$$$$ 0x303033342F2D302E $$$$$$$$ 0x302E2A2E282C2A2B $$$$$$$$ 0x2A2F2D2C2C2B2C28 $$$$$$$$ 0x2F2C282A2C2C282B $$$$$$$$ 0x3C3F3B3B3837393B $#$$$$$$ 0x3737393837343837 $$$$$$$$ 0x373438392F313233 $$$$$$$$ 0x2F2D3030322F3030 $$$$$$$$ 0x332D2E2D312A312B $$$$$$$$ 0x252422251D212321 $$$$$$$$ 0x2D2A2E312C2C2D2E $$$$$$$$ 0x3332353931343435 $$$$$$$$ 0x313034323034312F $$$$$$$$ 0x312C31312E302C2C $$$$$$$$
Edges
Mc0.Ch0.B0: [ 0 53][ 5 53][ 0 48][ 0 51][ 0 47][ 0 48][ 0 49][ 0 48]
Mc0.Ch0.B1: [ 4 51][ 5 51][ 7 54][ 7 55][ 3 54][ 4 50][ 4 51][ 0 50]
Mc0.Ch1.B0: [ 0 47][ 0 47][ 2 50][ 0 51][ 5 46][ 2 44][ 2 47][ 0 45]
Mc0.Ch1.B1: [ 0 47][ 0 45][ 0 41][ 0 45][ 0 39][ 3 43][ 0 41][ 0 42]
Mc0.Ch2.B0: [ 0 41][ 0 46][ 0 44][ 0 43][ 3 43][ 0 42][ 2 43][ 0 39]
Mc0.Ch2.B1: [ 3 46][ 1 43][ 0 39][ 0 41][ 0 43][ 0 43][ 0 39][ 0 42]
Mc0.Ch3.B0: [ 0 59][ 0 62][ 0 58][ 0 58][ 0 55][ 0 54][ 4 56][ 0 58]
Mc0.Ch3.B1: [ 0 54][ 0 54][ 2 56][ 0 55][ 3 54][ 1 51][ 1 55][ 0 54]
Mc1.Ch0.B0: [ 3 54][ 3 51][ 5 55][ 5 56][ 4 46][ 0 48][ 0 49][ 1 50]
Mc1.Ch0.B1: [ 4 46][ 4 44][ 4 47][ 4 47][ 5 49][ 2 46][ 4 47][ 2 47]
Mc1.Ch1.B0: [ 3 50][ 0 44][ 0 45][ 0 44][ 2 48][ 0 41][ 0 48][ 0 42]
Mc1.Ch1.B1: [ 3 36][ 2 35][ 0 33][ 0 36][ 2 28][ 3 32][ 1 34][ 0 32]
Mc1.Ch2.B0: [ 0 44][ 0 41][ 0 45][ 0 48][ 1 43][ 2 43][ 2 44][ 2 45]
Mc1.Ch2.B1: [ 1 50][ 0 49][ 1 52][ 4 56][ 0 48][ 2 51][ 1 51][ 1 52]
Mc1.Ch3.B0: [ 2 48][ 0 47][ 4 51][ 1 49][ 4 47][ 2 51][ 1 48][ 2 46]
Mc1.Ch3.B1: [ 0 48][ 0 43][ 2 48][ 0 48][ 0 45][ 3 47][ 3 43][ 0 43]
Per Bit Offset
Mc0.Ch0.B0: 23 25 20 22 20 20 21 20
Mc0.Ch0.B1: 24 24 27 27 25 23 24 21
Mc0.Ch1.B0: 20 20 22 22 22 19 21 19
Mc0.Ch1.B1: 20 19 17 19 16 19 17 17
Mc0.Ch2.B0: 17 19 18 18 19 17 19 16
Mc0.Ch2.B1: 21 18 16 17 18 18 16 17
Mc0.Ch3.B0: 26 27 25 25 24 23 26 25
Mc0.Ch3.B1: 23 23 25 24 25 22 24 23
Mc1.Ch0.B0: 25 23 26 27 21 20 21 22
Mc1.Ch0.B1: 21 20 22 22 23 20 22 21
Mc1.Ch1.B0: 23 18 19 18 21 17 20 17
Mc1.Ch1.B1: 16 15 13 14 11 14 14 12
Mc1.Ch2.B0: 18 17 19 20 18 19 19 20
Mc1.Ch2.B1: 22 21 23 26 20 23 22 23
Mc1.Ch3.B0: 21 20 24 21 22 23 21 20
Mc1.Ch3.B1: 20 18 21 20 19 21 19 18
START_RxDqsBitDelay
R Mc0.C0.R1.S0.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S0.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S0.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S0.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S0.B7 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S1.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S1.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S1.B2 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S1.B3 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S1.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S1.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S1.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B0 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B1 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B2 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B5 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S2.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B0 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S3.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B2 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S3.B3 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B4 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S3.B5 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B6 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S3.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B0 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B2 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B3 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B4 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B5 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B6 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B7 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B0 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S5.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S5.B2 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S5.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S5.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S5.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S6.B0 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S6.B1 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S6.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S6.B3 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S6.B4 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S6.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S6.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S7.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S7.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B5 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S7.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S0.B0 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S0.B1 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S0.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S0.B3 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S0.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S0.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S0.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S1.B2 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B3 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S1.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S1.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S2.B0 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S2.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S2.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S2.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S2.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S2.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S2.B6 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S2.B7 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S3.B0 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S3.B1 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R1.S3.B2 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R1.S3.B3 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R1.S3.B4 RxDqsBitDelay: 15 (0xF)
R Mc1.C1.R1.S3.B5 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R1.S3.B6 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R1.S3.B7 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R1.S4.B0 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S4.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S4.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S4.B4 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B5 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S4.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S4.B7 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S5.B1 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S5.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S5.B3 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S5.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B5 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S5.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S5.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S6.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S6.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S6.B2 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S6.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S6.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S6.B5 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S6.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S6.B7 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S7.B2 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S7.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B4 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S7.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S7.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S7.B7 RxDqsBitDelay: 22 (0x16)
STOP_RxDqsBitDelay
Calling with EnRxDutyCycle = 1, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 150 150 140 150 90 90 140 140 140 140 140 150 60 70 120 120 140 150 160 160 140 150 150 150 150 150 130 140 160 170 140 140 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 150 230 150 160 90 210 140 230 140 220 150 180 70 250 120 260 150 260 160 240 150 230 150 230 150 230 140 250 170 230 140
Vref = -11: 230 150 230 150 180 90 220 140 210 140 210 150 170 70 250 120 250 150 250 160 230 150 230 150 210 150 210 140 250 170 240 140
Vref = -22: 220 150 210 150 180 90 220 140 200 140 180 150 150 70 230 120 250 150 250 160 220 150 220 150 220 150 190 140 270 170 230 140
Vref = -33: 200 150 190 150 140 90 180 140 190 140 150 150 130 70 190 120 230 150 230 160 190 150 200 150 200 150 170 140 230 170 190 140
Vref = 11: 220 150 230 150 180 90 220 140 200 140 200 150 160 70 210 120 230 150 240 160 230 150 210 150 220 150 200 140 240 170 230 140
Vref = 22: 180 150 200 150 140 90 170 140 170 140 170 150 120 70 180 120 210 150 210 160 210 150 170 150 190 150 180 140 210 170 210 140
Vref = 33: 160 150 160 150 110 90 120 140 150 140 140 150 70 70 150 120 160 150 190 160 180 150 150 150 160 150 160 140 170 170 170 140
Weighted Center -3 -3 -4 -3 -3 -2 -4 -5 -4 -4 -4 -3 -3 -3 -3 -4
Final Center -13 -13 -7 -12 -12 -13 -5 -10 -13 -14 -13 -13 -13 -12 -15 -12
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 150 230 150 170 90 210 140 220 140 200 150 180 70 240 120 250 150 260 160 230 150 190 150 230 150 210 140 240 170 220 140
Vref = -11: 220 150 220 150 140 90 190 140 190 140 190 150 160 70 250 120 250 150 250 160 220 150 180 150 220 150 200 140 230 170 200 140
Vref = -22: 190 150 210 150 110 90 150 140 190 140 180 150 130 70 220 120 220 150 230 160 190 150 160 150 200 150 190 140 220 170 180 140
Vref = -33: 180 150 170 150 90 90 130 140 150 140 150 150 100 70 200 120 190 150 200 160 170 150 130 150 180 150 160 140 180 170 140 140
Vref = 11: 210 150 220 150 150 90 200 140 190 140 200 150 160 70 240 120 240 150 240 160 210 150 190 150 210 150 190 140 230 170 210 140
Vref = 22: 190 150 190 150 120 90 180 140 180 140 180 150 130 70 210 120 210 150 220 160 190 150 170 150 180 150 170 140 200 170 190 140
Vref = 33: 160 150 160 150 80 90 130 140 150 140 140 150 80 70 180 120 170 150 180 160 160 150 140 150 160 150 150 140 160 170 170 140
Weighted Center -3 -3 -3 -2 -3 -2 -4 -5 -4 -4 -3 -1 -3 -3 -3 -3
Final Center -16 -16 -10 -14 -15 -15 -9 -15 -17 -18 -16 -14 -16 -15 -18 -15
LstSavd Margins 140 150 140 150 90 100 130 140 140 140 140 140 60 70 130 130 150 150 160 160 150 150 150 150 150 160 140 150 160 170 130 140 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 150 220 150 190 100 210 140 230 140 230 140 170 70 240 130 250 150 250 160 250 150 220 150 230 160 240 150 250 170 230 140
Vref = -11: 260 150 240 150 170 100 210 140 220 140 240 140 180 70 250 130 250 150 250 160 240 150 230 150 240 160 240 150 250 170 240 140
Vref = -22: 240 150 230 150 170 100 220 140 230 140 220 140 170 70 250 130 260 150 240 160 230 150 230 150 220 160 220 150 270 170 230 140
Vref = -33: 220 150 210 150 140 100 170 140 210 140 190 140 140 70 230 130 230 150 220 160 200 150 210 150 210 160 190 150 230 170 190 140
Vref = 11: 240 150 230 150 160 100 190 140 210 140 230 140 160 70 230 130 230 150 230 160 250 150 210 150 240 160 220 150 240 170 240 140
Vref = 22: 220 150 210 150 120 100 170 140 180 140 220 140 130 70 200 130 210 150 210 160 230 150 200 150 220 160 190 150 210 170 210 140
Vref = 33: 190 150 170 150 100 100 130 140 150 140 170 140 70 70 160 130 180 150 180 160 210 150 160 150 190 160 160 150 170 170 170 140
Weighted Center -4 -3 -3 -3 -4 -4 -4 -5 -4 -4 -4 -3 -3 -3 -3 -4
Final Center -13 -13 -8 -12 -12 -12 -5 -11 -13 -14 -13 -13 -14 -13 -15 -12
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 150 230 150 170 100 210 140 200 140 210 140 170 70 240 130 250 150 250 160 240 150 190 150 230 160 230 150 240 170 220 140
Vref = -11: 210 150 210 150 150 100 190 140 200 140 200 140 150 70 230 130 230 150 240 160 220 150 180 150 210 160 220 150 240 170 190 140
Vref = -22: 190 150 190 150 130 100 170 140 190 140 180 140 120 70 200 130 210 150 220 160 190 150 170 150 200 160 190 150 220 170 180 140
Vref = -33: 180 150 170 150 100 100 130 140 150 140 170 140 90 70 170 130 180 150 180 160 170 150 140 150 170 160 170 150 180 170 140 140
Vref = 11: 210 150 210 150 150 100 190 140 190 140 200 140 160 70 210 130 220 150 230 160 230 150 190 150 210 160 210 150 230 170 210 140
Vref = 22: 170 150 170 150 120 100 170 140 180 140 170 140 110 70 190 130 190 150 200 160 210 150 170 150 180 160 180 150 200 170 190 140
Vref = 33: 160 150 160 150 90 100 130 140 140 140 150 140 90 70 170 130 160 150 170 160 180 150 150 150 160 160 140 150 170 170 160 140
Weighted Center -3 -3 -2 -2 -2 -3 -4 -4 -4 -3 -3 -1 -2 -3 -3 -3
Final Center -16 -16 -10 -14 -14 -15 -9 -15 -17 -17 -16 -14 -16 -16 -18 -15
MRC task Read Timing Centering 2D Before Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD49h
MRC task -- PowerSavingMeter Base Line Update -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MRC task PowerSavingMeter Base Line Update -- SUCCEEDED, Status = 0h.
Post Code: DD3Ah
MRC task -- Command Voltage Centering -- Started.
Cmd Vref Training with LC = 10
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . # # . . # # # # # # 0x63DE_0 0x0_0 0x0_0 0x5A03_0 0x0_0 0xFF1_0 0x7168_0 0x72_0
-36 # # . . . . # # . . . . # # . . 0x5B7C_0 0x0_0 0x0_0 0x1E04_0 0x0_0 0x0_0 0xF8D_0 0x0_0
-32 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3FD_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x76_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . # # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x71_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -24 40 64 8
B1: -24 40 64 8
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -20 40 60 10
B1: -20 40 60 10
Mc1.C2.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R0: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . . . . . # # # # . . 0x6512_0 0x0_0 0x0_0 0x0_0 0x0_0 0x5D0C_0 0x6F5D_0 0x0_0
-36 . . . . . . . . . . # # # # . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x6321_0 0x56EE_0 0x0_0
-32 . . . . . . . . . . # # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x74_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -28 40 68 6
B1: -28 40 68 6
Mc1.C2.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Cmd Vref Summary:
Low High Height Center
Mc0.C0: 32 40 72 4
Mc0.C1: 40 40 80 0
Mc0.C2: 40 40 80 0
Mc0.C3: 24 40 64 8
Mc1.C0: 40 40 80 0
Mc1.C1: 20 40 60 10
Mc1.C2: 32 40 72 4
Mc1.C3: 36 40 76 2
MRC task Command Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD3Eh
MRC task -- Late command training -- Started.
Mc0: C0: CmdGroup0 Pi Code: 128
Mc0: C1: CmdGroup0 Pi Code: 128
Mc0: C2: CmdGroup0 Pi Code: 128
Mc0: C3: CmdGroup0 Pi Code: 128
Mc1: C0: CmdGroup0 Pi Code: 128
Mc1: C1: CmdGroup0 Pi Code: 128
Mc1: C2: CmdGroup0 Pi Code: 128
Mc1: C3: CmdGroup0 Pi Code: 128
*** Center CMD Pi Timing
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
. . . . # . . .
32 32 32 32 96 32 32 32
# # # # . # # #
48 48 48 48 80 48 48 48
# # # # . # # #
56 56 56 56 72 56 56 56
# # # # . # # #
60 60 60 60 68 60 60 60
# # # # . # # #
62 62 62 62 66 62 62 62
# . # # . . . #
63 61 63 63 65 61 61 63
. # . . . # # .
Pi Delay
192 192 192 192 192 192 192 192
# # # # # # # #
160 160 160 160 160 160 160 160
. . . . . . . .
176 176 176 176 176 176 176 176
# # # # # # # #
168 168 168 168 168 168 168 168
# # . . . # . #
164 164 172 172 172 164 172 164
# # . # . # . #
162 162 174 170 174 162 174 162
. # # . # # # #
163 161 173 171 173 161 173 161
# . # # . . . #
Mc Ch Left Right Width Center
0 0 63 162 99 113
0 1 62 161 99 112
0 2 63 172 109 118
0 3 63 170 107 117
1 0 65 173 108 119
1 1 62 161 99 112
1 2 62 173 111 118
1 3 63 160 97 112
*** Center Control Timing
*** ECT results
Ctl0Ch0Rank0: CTL: 128
Ctl0Ch0Rank1: CTL: 128
Ctl0Ch1Rank0: CTL: 128
Ctl0Ch1Rank1: CTL: 128
Ctl0Ch2Rank0: CTL: 128
Ctl0Ch2Rank1: CTL: 128
Ctl0Ch3Rank0: CTL: 128
Ctl0Ch3Rank1: CTL: 128
Ctl1Ch0Rank0: CTL: 128
Ctl1Ch0Rank1: CTL: 128
Ctl1Ch1Rank0: CTL: 128
Ctl1Ch1Rank1: CTL: 128
Ctl1Ch2Rank0: CTL: 128
Ctl1Ch2Rank1: CTL: 128
Ctl1Ch3Rank0: CTL: 128
Ctl1Ch3Rank1: CTL: 128
Centering CTL on Ranks 0x3
Rank 0x0
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
# # # # # . # #
96 96 96 96 96 32 96 96
. . . . . # . .
80 80 80 80 80 48 80 80
. . . . . # . .
72 72 72 72 72 56 72 72
. . # . # # . .
68 68 76 68 76 60 68 68
# . . # . # # .
70 66 74 70 74 62 70 66
# # . . # . # .
71 67 73 69 75 61 71 65
# # . # . # . #
Pi Delay
192 192 192 192 192 192 192 192
. # . # . # # #
224 160 224 160 224 160 160 160
# . # . # . . .
208 176 208 176 208 176 176 176
# . # . # . . .
200 184 200 184 200 184 184 184
# . # . # # . .
196 188 196 188 196 180 188 188
# # # # # . . #
194 186 194 186 194 182 190 186
# . # # # # . #
193 187 193 185 193 181 191 185
# . . # . . . .
Mc Ch Left Right Width Center
0 0 72 192 120 132
0 1 68 187 119 128
0 2 73 193 120 133
0 3 70 184 114 127
1 0 75 193 118 134
1 1 62 181 119 122
1 2 71 191 120 131
1 3 66 185 119 126
Rank 0x1
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
# # # # # . # .
96 96 96 96 96 32 96 32
. . . . . # . #
80 80 80 80 80 48 80 48
. . . . . # . #
72 72 72 72 72 56 72 56
. . . . . # . #
68 68 68 68 68 60 68 60
# . # . # # . #
70 66 70 66 70 62 66 62
. # # . . . # .
69 67 71 65 69 61 67 61
. . . # . # . #
Pi Delay
192 192 192 192 192 192 192 192
# # # # # # # #
160 160 160 160 160 160 160 160
. . . . . . . .
176 176 176 176 176 176 176 176
. . . . . . . .
184 184 184 184 184 184 184 184
. . . . . # . #
188 188 188 188 188 180 188 180
. # . # . . . .
190 186 190 186 190 182 190 182
# . . . # # # .
189 187 191 187 189 181 189 183
. # # # # . # #
Mc Ch Left Right Width Center
0 0 69 189 120 129
0 1 67 186 119 127
0 2 71 190 119 131
0 3 66 186 120 126
1 0 69 188 119 129
1 1 62 181 119 122
1 2 67 188 121 128
1 3 62 182 120 122
MRC task Late command training -- SUCCEEDED, Status = 0h.
Post Code: DD3Ah
MRC task -- Command Voltage Centering -- Started.
Cmd Vref Training with LC = 10
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . # # . . . . # # . . 0x5413_0 0x0_0 0x0_0 0x616F_0 0x0_0 0x0_0 0x5456_0 0x0_0
-36 # # . . . . # # . . # # # # . . 0x2909_0 0x0_0 0x0_0 0x5AB5_0 0x0_0 0x6C_0 0x231_0 0x0_0
-32 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1AD9_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -28 40 68 6
B1: -28 40 68 6
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C2.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . . . . . # # # # . . 0x63E0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x5FD0_0 0x6DD2_0 0x0_0
-36 . . . . . . . . . . # # # # . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x18B6_0 0x5B06_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C2.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Cmd Vref Summary:
Low High Height Center
Mc0.C0: 32 40 72 4
Mc0.C1: 40 40 80 0
Mc0.C2: 40 40 80 0
Mc0.C3: 28 40 68 6
Mc1.C0: 40 40 80 0
Mc1.C1: 32 40 72 4
Mc1.C2: 32 40 72 4
Mc1.C3: 40 40 80 0
MRC task Command Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD41h
MRC task -- Comp Optimization Training -- Started.
***** Opt Param:SCompCmd *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 63
Comp Vref: 16
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:SCompCtl *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 52
Comp Vref: 0
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:SCompDq *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 0
Comp Vref: 0
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCmdUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 5
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 2, side effect = FALSE
Comp: 13
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCmdDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCtlUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 6
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCtlDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 6
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 16
Comp Vref: 106
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 24
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 2, side effect = TRUE
Comp: 9
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 24
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:RdOdtUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 9
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 1, side effect = FALSE
Comp: 9
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
Re-center Cmd/Ctl Timings
Centering CTL/CMD on Ranks 0x3
Mc Ch Left Right Width Center
0 0 500 520 102 1
Mc Ch Left Right Width Center
0 1 520 560 108 2
Mc Ch Left Right Width Center
0 2 540 580 112 2
Mc Ch Left Right Width Center
0 3 340 580 92 12
Mc Ch Left Right Width Center
1 0 560 560 112 0
Mc Ch Left Right Width Center
1 1 500 580 108 4
Mc Ch Left Right Width Center
1 2 560 580 114 1
Mc Ch Left Right Width Center
1 3 400 540 94 7
Re-center Cmd Vref
Re-center Write Timing
Re-center Read Timing
Re-center Write Vref
Re-center Read Vref
Re-center RcvEnable
MRC task Comp Optimization Training -- SUCCEEDED, Status = 0h.
Post Code: DD3Bh
MRC task -- Write Voltage Centering 2D -- Started.
Mc0.Ch0 TimScale is 12
Mc0.Ch1 TimScale is 12
Mc0.Ch2 TimScale is 12
Mc0.Ch3 TimScale is 12
Mc1.Ch0 TimScale is 12
Mc1.Ch1 TimScale is 12
Mc1.Ch2 TimScale is 12
Mc1.Ch3 TimScale is 12
Rank0
Mc0.Ch0: Mc0.Ch1: Mc0.Ch2: Mc0.Ch3: Mc1.Ch0: Mc1.Ch1: Mc1.Ch2: Mc1.Ch3:
WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center
-4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0
4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0
0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0
WtdCntr 1 1 1 1 1 1 1 1
MRC task Write Voltage Centering 2D -- SUCCEEDED, Status = 0h.
Post Code: DD3Ch
MRC task -- Read Voltage Centering 2D -- Started.
### Measure Eye Height, per BYTE, at ALL (2D) Timing Points RankMask = 0xF
Mc0.Ch0 Mc0.Ch1 Mc0.Ch2 Mc0.Ch3 Mc1.Ch0 Mc1.Ch1 Mc1.Ch2 Mc1.Ch3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TScale 12 12 11 12 12 12 11 12 12 12 12 12 12 12 12 12
RdTime 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Lo 410 430 400 450 453 400 370 420 497 480 370 445 370 480 470 460
High 380 410 404 430 450 430 350 447 450 470 390 420 350 451 473 430
Center -1 -1 0 -1 0 1 -1 1 -2 0 1 -1 -1 -1 0 -1
RdTime -8 -8 -7 -8 -8 -8 -7 -8 -8 -8 -8 -8 -8 -8 -8 -8
Lo 445 480 355 420 450 420 190 430 460 491 350 455 350 448 460 472
High 420 430 380 420 450 360 250 430 460 480 370 424 380 454 450 410
Center -1 -2 1 0 0 -3 3 0 0 0 1 -1 1 0 0 -3
RdTime 8 8 7 8 8 8 7 8 8 8 8 8 8 8 8 8
Lo 380 420 420 470 456 400 430 434 465 484 404 440 385 430 472 460
High 390 400 420 470 472 455 396 466 465 480 410 437 360 415 476 430
Center 0 -1 0 0 0 2 -1 1 0 0 0 0 -1 0 0 -1
RdTime -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63
Lo 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
High 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
Center
WtdCntr -1 -2 0 0 0 0 0 1 -1 0 1 -1 0 -1 0 -2
RdVref 78 77 79 80 79 76 79 78 81 80 80 79 79 79 80 77
### Measure Eye Height, per BYTE, at ALL (2D) Timing Points RankMask = 0xF
Mc0.Ch0 Mc0.Ch1 Mc0.Ch2 Mc0.Ch3 Mc1.Ch0 Mc1.Ch1 Mc1.Ch2 Mc1.Ch3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TScale 12 12 11 12 12 12 11 12 12 12 12 12 12 12 12 12
RdTime 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Lo 412 410 390 463 445 408 370 435 460 480 370 410 362 442 465 436
High 400 440 400 450 455 427 330 450 457 465 350 400 360 470 470 470
Center 0 1 0 0 0 0 -2 0 0 0 -1 0 0 1 0 1
RdTime -8 -8 -7 -8 -8 -8 -7 -8 -8 -8 -8 -8 -8 -8 -8 -8
Lo 435 440 320 410 450 410 240 450 450 482 375 432 374 430 460 410
High 430 410 380 430 464 380 320 430 470 470 340 400 370 410 473 460
Center 0 -1 3 1 0 -1 4 -1 1 0 -1 -1 0 -1 0 2
RdTime 8 8 7 8 8 8 7 8 8 8 8 8 8 8 8 8
Lo 370 370 430 463 454 400 436 440 460 500 430 433 395 410 474 440
High 390 380 420 470 470 450 370 455 472 475 406 442 370 415 480 470
Center 1 0 0 0 0 2 -3 0 0 -1 -1 0 -1 0 0 1
RdTime -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63
Lo 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
High 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
Center
WtdCntr 0 0 1 0 1 1 0 0 0 -1 -1 -1 -1 0 0 2
RdVref 78 77 80 80 80 77 79 78 81 79 79 78 78 79 80 79
MRC task Read Voltage Centering 2D -- SUCCEEDED, Status = 0h. Stack Depth: 163592
Post Code: DD38h
MRC task -- Write Timing Centering 2D After Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 260 260 260 260 210 210 230 230 260 260 260 260 210 210 250 250 250 250 270 270 240 240 250 250 250 250 260 260 240 240 240 240 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 260 230 260 200 210 230 230 260 250 250 260 180 200 250 240 250 240 240 250 260 270 240 240 260 240 250 260 250 250 240 240
Weighted Center 1 2 1 0 -1 1 1 -1 -1 1 1 0 -1 1 0 0
Final Center 75 74 69 73 74 74 67 73 74 75 73 77 74 73 78 75
Edges we pass on to GetMarginBit are
250 250 250 240 210 200 230 230 250 260 260 250 190 190 240 250 240 250 250 240 270 260 240 240 250 250 260 250 250 250 240 240
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x06040B0908080D0D ..#....# 0x060405050709090C ........ 0x07060706070B0C09 ........ 0x050606050B050A06 ........ 0x0A09060C0509050E ........ 0x0303090A08070C0B ........ 0x0B0A090C0909090B ........ 0x0707050604090709 ........ 0x050806060A0B0B0A ........ 0x0809070A05080806 ........ 0x050D0A0D050B080C ........ 0x04070606070A0809 ....#... 0x0B0B0B07090D0C07 ........ 0x050B08040A090A07 ........ 0x060804070606090A ........ 0x050A04060B060A0E ........
0x05030C0807070C0E #....#.. 0x050304040608080B ........ 0x06050605060A0B08 ........ 0x040505040A040905 ........ 0x0908050B0408040D .#...... 0x0202080907060B0A ........ 0x0A09080B0808080A ........ 0x0606040503080608 ....#.#. 0x04070505090A0A09 ........ 0x0708060904070705 ........ 0x040C090C040A070B ........ 0x0306050508090708 ..#..... 0x0A0A0A06080C0B06 ........ 0x040A070309080906 ........ 0x0507030605050809 ........ 0x040903050A05090D ........
0x05020C0706070B0E $.$##$#$ 0x040203030507070A ........ 0x0504050405090A07 ........ 0x0304040309030804 ........ 0x0808040A0307030C #$.#..#. 0x0101070806050A09 ........ 0x0908070A07070709 ........ 0x0505030403070607 ...#$#$# 0x0306040408090908 ........ 0x0607050803060604 ........ 0x030B080B0309060A .....#.. 0x0205050408080607 ..$.$.#. 0x09090905070B0A05 #....##. 0x0309060208070805 ........ 0x0406020504040708 ..#..... 0x030802040904080C ........
0x05010C0706070B0E $#$$$$$$ 0x0301020204060609 ...#.... 0x0403040304080906 .#...... 0x0203030208020703 ....#... 0x0808030A0206030B $$#$..$. 0x0000060705040908 ..#..... 0x0807060906060608 ....#... 0x0404020403070607 #.#$$$$$ 0x0205030307080807 .....#.. 0x0506040702050503 ........ 0x020A070A02090509 .....$#. 0x0104050308070606 ..$.$.$. 0x09080804060B0A04 $#...$$# 0x0208050107060704 ........ 0x0305020403030607 ..$..... 0x020701030803070B ..#.....
0x05010C0706070B0E $$$$$$$$ 0x0200010203050508 ...$.... 0x0303030203070805 .$...##. 0x0102020108010602 ..##$#.. 0x0808030A0105030A $$$$##$. 0x0000060604030807 $$$#.#.. 0x0706050806050507 ....$... 0x0403020403070607 $#$$$$$$ 0x0104020206080706 ..#.#$.# 0x0405030601040402 ........ 0x0109060901090508 .....$$# 0x0003050208060605 ..$.$#$# 0x09080703050B0A04 $$###$$$ 0x0107040006050603 .###.... 0x0204020302020506 .#$..... 0x010601020702060A ..$#....
0x05010C0706070B0E $$$$$$$$ 0x0100000202040407 .$#$.... 0x0203020102070804 .$.##$$. 0x0001020108010501 ..$$$$## 0x0808030A01050309 $$$$$$$. 0x0000060603030706 $$$$.$#. 0x0605040706040406 ....$.#. 0x0403020403070607 $$$$$$$$ 0x0003020106080606 .#$.$$#$ 0x0304020500030301 ........ 0x0008050800090508 ....#$$$ 0x0002050108060605 $.$.$$$$ 0x09080703050B0A04 $$$$$$$$ 0x0007040005040502 .$$$#... 0x0104020201010405 #$$..#.# 0x0005010206010509 #.$$#.#.
0x05010C0706070B0E $$$$$$$$ 0x0000000201030306 .$$$..#. 0x0103010102070803 .$.$$$$# 0x0000020108010501 $.$$$$$$ 0x0808030A01050308 $$$$$$$# 0x0000060602030705 $$$$.$$# 0x0504030606030405 ....$#$. 0x0403020403070607 $$$$$$$$ 0x0003020006080606 $$$.$$$$ 0x0203010400020200 ....$... 0x0007040700090508 $...$$$$ 0x0001050008060605 $#$#$$$$ 0x09080703050B0A04 $$$$$$$$ 0x0007040005030401 $$$$$... 0x0104020100010305 $$$##$.$ 0x0004010206000508 $.$$$#$#
0x05010C0706070B0E $$$$$$$$ 0x0000000200020305 $$$$##$# 0x0003000102070803 #$.$$$$$ 0x0000020108010501 $$$$$$$$ 0x0808030A01050308 $$$$$$$$ 0x0000060601030705 $$$$#$$$ 0x0403020506030404 ...#$$$# 0x0403020403070607 $$$$$$$$ 0x0003020006080606 $$$$$$$$ 0x0102000300010100 ..#.$..$ 0x0006030600090508 $##.$$$$ 0x0001050008060605 $$$$$$$$ 0x09080703050B0A04 $$$$$$$$ 0x0007040005020300 $$$$$### 0x0104020100010205 $$$$$$#$ 0x0003010206000508 $#$$$$$$
0x05010C0706070B0E $$$$$$$$ 0x0000000200020305 $$$$$$$$ 0x0003000102070803 $$$$$$$$ 0x0000020108010501 $$$$$$$$ 0x0808030A01050308 $$$$$$$$ 0x0000060601030705 $$$$$$$$ 0x0302010506030404 ...$$$$$ 0x0403020403070607 $$$$$$$$ 0x0003020006080606 $$$$$$$$ 0x0001000200000000 .#$.$#.$ 0x0006030500090508 $$$#$$$$ 0x0001050008060605 $$$$$$$$ 0x09080703050B0A04 $$$$$$$$ 0x0007040005020300 $$$$$$$$ 0x0104020100010205 $$$$$$$$ 0x0003010206000508 $$$$$$$$
0x05010C0706070B0E $$$$$$$$ 0x0000000200020305 $$$$$$$$ 0x0003000102070803 $$$$$$$$ 0x0000020108010501 $$$$$$$$ 0x0808030A01050308 $$$$$$$$ 0x0000060601030705 $$$$$$$$ 0x0201000506030404 #..$$$$$ 0x0403020403070607 $$$$$$$$ 0x0003020006080606 $$$$$$$$ 0x0001000100000000 $$$.$$$$ 0x0006030500090508 $$$$$$$$ 0x0001050008060605 $$$$$$$$ 0x09080703050B0A04 $$$$$$$$ 0x0007040005020300 $$$$$$$$ 0x0104020100010205 $$$$$$$$ 0x0003010206000508 $$$$$$$$
0x05010C0706070B0E $$$$$$$$ 0x0000000200020305 $$$$$$$$ 0x0003000102070803 $$$$$$$$ 0x0000020108010501 $$$$$$$$ 0x0808030A01050308 $$$$$$$$ 0x0000060601030705 $$$$$$$$ 0x0200000506030404 $.$$$$$$ 0x0403020403070607 $$$$$$$$ 0x0003020006080606 $$$$$$$$ 0x0001000000000000 $$$#$$$$ 0x0006030500090508 $$$$$$$$ 0x0001050008060605 $$$$$$$$ 0x09080703050B0A04 $$$$$$$$ 0x0007040005020300 $$$$$$$$ 0x0104020100010205 $$$$$$$$ 0x0003010206000508 $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x06040B0908080D0D ........ 0x060405050709090C .....#.. 0x07060706070B0C09 ........ 0x050606050B050A06 ........ 0x0A09060C0509050E ........ 0x0303090A08070C0B ........ 0x0B0A090C0909090B ........ 0x0707050604090709 ........ 0x050806060A0B0B0A ........ 0x0809070A05080806 ........ 0x050D0A0D050B080C ###..... 0x04070606070A0809 ........ 0x0B0B0B07090D0C07 ........ 0x050B08040A090A07 ........ 0x060804070606090A ........ 0x050A04060B060A0E ........
0x07050C0A09090E0E ......#. 0x0705060608080A0D .##...#. 0x08070807080C0D0A ....#... 0x060707060C060B07 .....#.. 0x0B0A070D060A060F ........ 0x04040A0B09080D0C ..#..... 0x0C0B0A0D0A0A0A0C ........ 0x08080607050A080A ........ 0x060907070B0C0C0B ........ 0x090A080B06090907 ####..#. 0x040C090E060C090D ....#..# 0x05080707080B090A ........ 0x0C0C0C080A0E0D08 ........ 0x060C09050B0A0B08 ........ 0x0709050807070A0B ...#..## 0x060B05070C070B0F ........
0x08060D0B0A0A0E0F ##....$# 0x0805060709080A0E .$$..$$. 0x09080908080D0E0B #...$... 0x070808070D060C08 .....$.. 0x0C0B080E070B0710 ........ 0x05050A0C0A090E0D #.$..... 0x0D0C0B0E0B0B0B0D ........ 0x09090708060B090B ........ 0x070A08080C0D0D0C ........ 0x090A080B070A0908 $$$$..$# 0x040C090F060D0A0D $$$#$##$ 0x06090808090C0A0B ######.# 0x0D0D0D090B0F0E09 .....##. 0x070D0A060C0B0C09 ........ 0x080A060808080A0B .##$..$$ 0x070C06080D080C10 ..#..#..
0x08060E0C0B0B0E0F $$###.$$ 0x090506080A080A0F #$$##$$# 0x09090A09080E0F0C $.##$### 0x080909080E060D09 .....$.. 0x0D0C090F080C0811 ........ 0x05060A0D0B0A0F0E $.$..... 0x0E0D0C0F0C0C0C0E ......#. 0x0A0A0809070C0A0C ........ 0x080B09090D0E0E0D ....##.. 0x090A080B080B0908 $$$$..$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0B0B $$$$$$.$ 0x0E0E0E0A0C0F0E0A .####$$. 0x080E0B070D0C0D0A ........ 0x090A060809090A0B #$$$#.$$ 0x080D06090E080D11 ##$##$##
0x08060E0C0B0C0E0F $$$$$#$$ 0x090506080A080A0F $$$$$$$$ 0x090A0A09080E0F0C $.$$$$$$ 0x090A0A090F060E0A #..##$## 0x0E0D0A10090D0912 ......#. 0x05070A0E0C0B100F $#$#.### 0x0F0E0D100D0D0C0F ......$. 0x0B0B090A080D0B0D ........ 0x090C0A0A0D0E0F0E .#..$$.. 0x090A080B090C0908 $$$$##$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$#$ 0x0F0E0E0A0C0F0E0B #$$$$$$. 0x090F0C080E0D0E0B .##..#.. 0x090A0608090A0A0B $$$$$#$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090B0A09080E0F0C $.$$$$$$ 0x090B0B090F060E0A $#.$$$$$ 0x0F0E0B110A0E0913 ......$. 0x05070A0E0D0B100F $$$$.$$$ 0x100F0E110E0E0C10 ....##$# 0x0C0C0A0B090E0C0E ........ 0x0A0C0B0B0D0E100F #$##$$#. 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0C $$$$$$$. 0x0A0F0C090F0D0F0C #$$#.$## 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090C0A09080E0F0C $#$$$$$$ 0x090B0C090F060E0A $$#$$$$$ 0x100F0C120B0F0914 ######$# 0x05070A0E0E0B100F $$$$#$$$ 0x11100F120E0E0C10 ....$$$$ 0x0D0D0B0C0A0F0D0F ..#..#.# 0x0A0C0B0B0D0E1010 $$$$$$$. 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0D $$$$$$$# 0x0A0F0C09100D0F0C $$$$#$$$ 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090C0A09080E0F0C $$$$$$$$ 0x090B0C090F060E0A $$$$$$$$ 0x100F0C120B0F0914 $$$$$$$$ 0x05070A0E0E0B100F $$$$$$$$ 0x121110130E0E0C10 ..##$$$$ 0x0E0E0B0D0B0F0E0F .#$#.$#$ 0x0A0C0B0B0D0E1011 $$$$$$$# 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0D $$$$$$$$ 0x0A0F0C09100D0F0C $$$$$$$$ 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090C0A09080E0F0C $$$$$$$$ 0x090B0C090F060E0A $$$$$$$$ 0x100F0C120B0F0914 $$$$$$$$ 0x05070A0E0E0B100F $$$$$$$$ 0x131210130E0E0C10 ..$$$$$$ 0x0F0E0B0D0C0F0E0F #$$$#$$$ 0x0A0C0B0B0D0E1011 $$$$$$$$ 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0D $$$$$$$$ 0x0A0F0C09100D0F0C $$$$$$$$ 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090C0A09080E0F0C $$$$$$$$ 0x090B0C090F060E0A $$$$$$$$ 0x100F0C120B0F0914 $$$$$$$$ 0x05070A0E0E0B100F $$$$$$$$ 0x141310130E0E0C10 ..$$$$$$ 0x0F0E0B0D0C0F0E0F $$$$$$$$ 0x0A0C0B0B0D0E1011 $$$$$$$$ 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0D $$$$$$$$ 0x0A0F0C09100D0F0C $$$$$$$$ 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090C0A09080E0F0C $$$$$$$$ 0x090B0C090F060E0A $$$$$$$$ 0x100F0C120B0F0914 $$$$$$$$ 0x05070A0E0E0B100F $$$$$$$$ 0x151410130E0E0C10 ..$$$$$$ 0x0F0E0B0D0C0F0E0F $$$$$$$$ 0x0A0C0B0B0D0E1011 $$$$$$$$ 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0D $$$$$$$$ 0x0A0F0C09100D0F0C $$$$$$$$ 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
0x08060E0C0B0C0E0F $$$$$$$$ 0x090506080A080A0F $$$$$$$$ 0x090C0A09080E0F0C $$$$$$$$ 0x090B0C090F060E0A $$$$$$$$ 0x100F0C120B0F0914 $$$$$$$$ 0x05070A0E0E0B100F $$$$$$$$ 0x161510130E0E0C10 ##$$$$$$ 0x0F0E0B0D0C0F0E0F $$$$$$$$ 0x0A0C0B0B0D0E1011 $$$$$$$$ 0x090A080B090C0908 $$$$$$$$ 0x040C090F060D0A0D $$$$$$$$ 0x06090808090C0C0B $$$$$$$$ 0x0F0E0E0A0C0F0E0D $$$$$$$$ 0x0A0F0C09100D0F0C $$$$$$$$ 0x090A0608090A0A0B $$$$$$$$ 0x080D06090E080D11 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 6 7][ 2 5][ 12 13][ 8 11][ 7 10][ 8 11][ 12 13][ 14 14]
Mc0.Ch0.B1: [ 0 8][ 0 4][ 1 5][ 3 7][ 1 9][ 3 8][ 4 9][ 6 14]
Mc0.Ch1.B0: [ 1 8][ 4 11][ 0 9][ 2 8][ 3 7][ 8 13][ 9 14][ 4 11]
Mc0.Ch1.B1: [ 0 8][ 0 10][ 3 11][ 2 8][ 9 14][ 2 5][ 6 13][ 2 9]
Mc0.Ch2.B0: [ 9 15][ 9 14][ 4 11][ 11 17][ 2 10][ 6 14][ 4 8][ 9 19]
Mc0.Ch2.B1: [ 0 4][ 0 6][ 7 9][ 7 13][ 2 13][ 4 10][ 8 15][ 6 14]
Mc0.Ch3.B0: [ 3 21][ 0 20][ 0 15][ 6 18][ 7 13][ 4 13][ 5 11][ 5 15]
Mc0.Ch3.B1: [ 5 14][ 4 13][ 3 10][ 5 12][ 4 11][ 8 14][ 7 13][ 8 14]
Mc1.Ch0.B0: [ 0 9][ 4 11][ 3 10][ 0 10][ 7 12][ 9 13][ 7 15][ 7 16]
Mc1.Ch0.B1: [ 0 8][ 2 9][ 1 7][ 1 10][ 0 8][ 1 11][ 0 8][ 0 7]
Mc1.Ch1.B0: [ 0 4][ 7 12][ 4 9][ 6 14][ 1 5][ 10 12][ 6 9][ 9 12]
Mc1.Ch1.B1: [ 0 5][ 2 8][ 6 7][ 1 7][ 8 8][ 7 11][ 7 11][ 6 10]
Mc1.Ch2.B0: [ 10 14][ 9 13][ 8 13][ 4 9][ 6 11][ 12 14][ 11 13][ 5 12]
Mc1.Ch2.B1: [ 0 9][ 8 14][ 5 11][ 1 8][ 6 15][ 3 12][ 4 14][ 1 11]
Mc1.Ch3.B0: [ 2 8][ 5 9][ 3 5][ 2 7][ 1 8][ 2 9][ 3 9][ 6 10]
Mc1.Ch3.B1: [ 1 7][ 4 12][ 2 5][ 3 8][ 7 13][ 1 7][ 6 12][ 9 16]
Per Bit Offset
Mc0.Ch0.B0: 1 -1 2 1 1 2 -1 1
Mc0.Ch0.B1: -2 -2 -2 0 -2 -4 -3 -2
Mc0.Ch1.B0: -3 2 -3 -1 -2 -1 -1 -2
Mc0.Ch1.B1: -1 -1 1 0 1 -2 -1 -1
Mc0.Ch2.B0: 2 3 2 2 1 1 1 0
Mc0.Ch2.B1: -1 0 -1 0 -1 0 -1 -1
Mc0.Ch3.B0: 1 0 -2 0 1 -1 -1 -1
Mc0.Ch3.B1: 3 2 2 3 4 2 3 2
Mc1.Ch0.B0: -1 -1 1 -1 -1 0 0 2
Mc1.Ch0.B1: -4 -4 -3 -5 -1 -2 -4 -3
Mc1.Ch1.B0: -3 -4 -4 -3 -2 0 -1 -2
Mc1.Ch1.B1: -2 -2 1 -2 1 -1 1 -1
Mc1.Ch2.B0: 1 0 -1 -1 -1 0 0 2
Mc1.Ch2.B1: -1 0 0 1 1 -2 -1 -1
Mc1.Ch3.B0: -1 -1 0 -3 -2 -1 -3 -2
Mc1.Ch3.B1: -1 -2 -1 -1 -1 -2 -1 -2
START_TxDqBitDelay
R Mc0.C0.R0.S0.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S0.B1 TxDqBitDelay: 3
R Mc0.C0.R0.S0.B2 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S0.B3 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S0.B4 TxDqBitDelay: 9
R Mc0.C0.R0.S0.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S0.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S0.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S1.B0 TxDqBitDelay: 4
R Mc0.C0.R0.S1.B1 TxDqBitDelay: 2
R Mc0.C0.R0.S1.B2 TxDqBitDelay: 3
R Mc0.C0.R0.S1.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B4 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B5 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S2.B0 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B1 TxDqBitDelay: 8
R Mc0.C0.R0.S2.B2 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B4 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S2.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S2.B7 TxDqBitDelay: 7
R Mc0.C0.R0.S3.B0 TxDqBitDelay: 4
R Mc0.C0.R0.S3.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B2 TxDqBitDelay: 7
R Mc0.C0.R0.S3.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S3.B4 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S3.B5 TxDqBitDelay: 3
R Mc0.C0.R0.S3.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S3.B7 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B0 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S4.B1 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S4.B2 TxDqBitDelay: 8
R Mc0.C0.R0.S4.B3 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S4.B4 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S4.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S5.B0 TxDqBitDelay: 2
R Mc0.C0.R0.S5.B1 TxDqBitDelay: 3
R Mc0.C0.R0.S5.B2 TxDqBitDelay: 8
R Mc0.C0.R0.S5.B3 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B4 TxDqBitDelay: 7
R Mc0.C0.R0.S5.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S5.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S5.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S6.B0 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S6.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S6.B2 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S6.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S6.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S6.B6 TxDqBitDelay: 8
R Mc0.C0.R0.S6.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S7.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S7.B1 TxDqBitDelay: 9
R Mc0.C0.R0.S7.B2 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B3 TxDqBitDelay: 9
R Mc0.C0.R0.S7.B4 TxDqBitDelay: 8
R Mc0.C0.R0.S7.B5 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S7.B6 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S7.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S0.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S0.B2 TxDqBitDelay: 7
R Mc1.C1.R0.S0.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S0.B4 TxDqBitDelay: 9
R Mc1.C1.R0.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S0.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S1.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B1 TxDqBitDelay: 5
R Mc1.C1.R0.S1.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S1.B4 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S1.B6 TxDqBitDelay: 4
R Mc1.C1.R0.S1.B7 TxDqBitDelay: 3
R Mc1.C1.R0.S2.B0 TxDqBitDelay: 2
R Mc1.C1.R0.S2.B1 TxDqBitDelay: 9
R Mc1.C1.R0.S2.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S2.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S2.B4 TxDqBitDelay: 3
R Mc1.C1.R0.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S2.B6 TxDqBitDelay: 7
R Mc1.C1.R0.S2.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S3.B0 TxDqBitDelay: 2
R Mc1.C1.R0.S3.B1 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B2 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S3.B4 TxDqBitDelay: 8
R Mc1.C1.R0.S3.B5 TxDqBitDelay: 9
R Mc1.C1.R0.S3.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S3.B7 TxDqBitDelay: 8
R Mc1.C1.R0.S4.B0 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S4.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S4.B3 TxDqBitDelay: 6
R Mc1.C1.R0.S4.B4 TxDqBitDelay: 8
R Mc1.C1.R0.S4.B5 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S4.B6 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S4.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S5.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S5.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S5.B2 TxDqBitDelay: 8
R Mc1.C1.R0.S5.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S5.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S5.B5 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S5.B7 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S6.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S6.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S6.B4 TxDqBitDelay: 4
R Mc1.C1.R0.S6.B5 TxDqBitDelay: 5
R Mc1.C1.R0.S6.B6 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B7 TxDqBitDelay: 8
R Mc1.C1.R0.S7.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S7.B1 TxDqBitDelay: 8
R Mc1.C1.R0.S7.B2 TxDqBitDelay: 3
R Mc1.C1.R0.S7.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S7.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B5 TxDqBitDelay: 4
R Mc1.C1.R0.S7.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S7.B7 TxDqBitDelay: 12 (0xC)
STOP_TxDqBitDelay
LstSavd Margins 270 270 260 260 210 210 250 250 270 270 260 260 210 210 250 250 250 250 270 270 250 250 240 240 250 250 270 270 260 260 240 240 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 250 260 240 200 200 210 260 260 250 250 260 210 190 240 250 230 260 250 260 240 250 220 250 260 240 260 250 240 250 230 250
Weighted Center 1 -1 0 3 -1 1 -1 1 2 1 1 2 -1 -1 1 1
Final Center 74 73 69 73 72 72 66 73 78 77 77 78 76 74 77 75
Edges we pass on to GetMarginBit are
240 240 250 250 200 200 240 230 250 260 260 250 200 200 250 240 250 240 260 250 250 240 240 230 250 250 250 260 250 240 240 240
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x06050A0A08080B0C ........ 0x060304040506090A ...#.#.# 0x0606050606090706 ....#... 0x07090B050D070C09 ........ 0x0B0A060B0509050D ........ 0x04050A0C0A080C0B ........ 0x0A06070808050407 ........ 0x090704060509070B ........ 0x04060505080B0A0A ........ 0x0609080805080707 ........ 0x040A060C040B060B ........ 0x090C0A0A0B0C0D0E ........ 0x08070A04060A0A05 .......# 0x060A09050B070B08 ........ 0x070805070505090A ........ 0x060B06070D060B11 ........
0x0504090907070A0B ......#. 0x050203050407080B #.#.#### 0x0505040507080605 ........ 0x06080A040C060B08 ........ 0x0A09050A0408040C ..#..... 0x0304090B09070B0A ........ 0x0905060707040306 ....#... 0x080603050408060A ........ 0x03050404070A0909 ........ 0x0508070704070606 ........ 0x0309050B030A050A ........ 0x080B09090A0B0C0D ........ 0x0706090305090906 .#..##.. 0x050908040A060A07 .....#.. 0x0607040604040809 ........ 0x050A05060C050A10 ..#.....
0x0403080806060A0A ......$. 0x050103050408080C $.$$$.$. 0x0404030407070504 ....$..# 0x050709030B050A07 ........ 0x090805090307030B ..$##..# 0x0203080A08060A09 ........ 0x0804050607030205 ....$#.. 0x0705020403070509 ........ 0x0204030306090808 ........ 0x0407060603060505 ........ 0x0208040A02090409 ........ 0x070A0808090A0B0C ........ 0x0606080205090806 #$##$$#$ 0x0408070309060906 .#.#.$.# 0x0506030503030708 ........ 0x040905050B04090F ..$##...
0x0302070705050A09 ......$. 0x050003050408080C $#$$$$$$ 0x0303020307060404 ..#.$##$ 0x040608020A040906 ........ 0x080705090306020B .#$$$..$ 0x0102070907050908 .#.#.#.. 0x0703040507030104 ....$$#. 0x0604010302060408 ........ 0x0103020205080707 ........ 0x0306050502050404 ...#.... 0x0107030901080308 ........ 0x0609070708090A0B ........ 0x0606080205090806 $$$$$$$$ 0x0308060308060806 #$.$.$#$ 0x0405020402020607 ..#..... 0x030805050B03080E .#$$$##.
0x0201060604040A08 .##...$# 0x050003050408080C $$$$$$$$ 0x0202020207060404 ..$.$$$$ 0x0305070109030805 ........ 0x070705090305010B #$$$$#.$ 0x0002060906050807 .$#$.$#. 0x0602030407030103 ....$$$. 0x0503000201050307 .......# 0x0002010104070606 ........ 0x0205040501040303 .#.$#... 0x0006020800070207 ........ 0x050806060708090A ........ 0x0606080205090806 $$$$$$$$ 0x0308050307060806 $$.$.$$$ 0x0304020301010506 ..$..... 0x020805050B03080D .$$$$$$.
0x0101060503030A08 #$$.##$$ 0x050003050408080C $$$$$$$$ 0x0101020107060404 .#$#$$$$ 0x0204060008020704 ...#..#. 0x070705090305000B $$$$$$#$ 0x0002060905050806 $$$$.$$. 0x0501020307030102 .#..$$$# 0x0402000100040207 ..$.#..$ 0x0001000003060505 $....... 0x0105030501030202 .$#$$..# 0x0005010700060106 $...$... 0x0407050506070809 ........ 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$#$#$$$ 0x0203020200000405 ..$.#... 0x010805050B03080C .$$$$$$.
0x0101060403030A08 $$$.$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 .$$$$$$$ 0x0103050007010703 ...$#.$. 0x070705090305000B $$$$$$$$ 0x0002060904050805 $$$$.$$# 0x0401010207030102 .$..$$$$ 0x0301000000030107 ..$#$#.$ 0x0000000002050404 $.$$.... 0x0005030501020102 #$$$$##$ 0x0004000600050005 $...$... 0x0306040405060708 ....#... 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0102020100000304 .#$.$$## 0x000805050B03080B #$$$$$$.
0x0101060303030A08 $$$#$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 $$$$$$$$ 0x0002040007000702 ...$$#$# 0x070705090305000B $$$$$$$$ 0x0002060903050805 $$$$#$$$ 0x0301000107030102 .$.#$$$$ 0x0200000000030007 ..$$$$#$ 0x0000000001040303 $$$$..#. 0x0005030501020102 $$$$$$$$ 0x0003000500040004 $.$.$.$# 0x0205030305050607 #.#.$..# 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0002020000000304 .$$#$$$$ 0x000805050B03080A $$$$$$$#
0x0101060303030A08 $$$$$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 $$$$$$$$ 0x0001030007000702 $.#$$$$$ 0x070705090305000B $$$$$$$$ 0x0002060903050805 $$$$$$$$ 0x0201000107030102 .$$$$$$$ 0x0100000000030007 .$$$$$$$ 0x0000000000030302 $$$$#.$. 0x0005030501020102 $$$$$$$$ 0x0002000400030004 $.$.$.$$ 0x0204030205040507 $.$#$..$ 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0002020000000304 $$$$$$$$ 0x000805050B03080A $$$$$$$$
0x0101060303030A08 $$$$$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 $$$$$$$$ 0x0000030007000702 $#$$$$$$ 0x070705090305000B $$$$$$$$ 0x0002060903050805 $$$$$$$$ 0x0101000107030102 .$$$$$$$ 0x0000000000030007 #$$$$$$$ 0x0000000000020301 $$$$$#$# 0x0005030501020102 $$$$$$$$ 0x0001000300020004 $#$.$.$$ 0x0203030205030407 $.$$$..$ 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0002020000000304 $$$$$$$$ 0x000805050B03080A $$$$$$$$
0x0101060303030A08 $$$$$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 $$$$$$$$ 0x0000030007000702 $$$$$$$$ 0x070705090305000B $$$$$$$$ 0x0002060903050805 $$$$$$$$ 0x0001000107030102 #$$$$$$$ 0x0000000000030007 $$$$$$$$ 0x0000000000020301 $$$$$$$$ 0x0005030501020102 $$$$$$$$ 0x0001000200010004 $$$.$#$$ 0x0202030205020307 $.$$$.#$ 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0002020000000304 $$$$$$$$ 0x000805050B03080A $$$$$$$$
0x0101060303030A08 $$$$$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 $$$$$$$$ 0x0000030007000702 $$$$$$$$ 0x070705090305000B $$$$$$$$ 0x0002060903050805 $$$$$$$$ 0x0001000107030102 $$$$$$$$ 0x0000000000030007 $$$$$$$$ 0x0000000000020301 $$$$$$$$ 0x0005030501020102 $$$$$$$$ 0x0001000100010004 $$$#$$$$ 0x0201030205010307 $#$$$.$$ 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0002020000000304 $$$$$$$$ 0x000805050B03080A $$$$$$$$
0x0101060303030A08 $$$$$$$$ 0x050003050408080C $$$$$$$$ 0x0001020107060404 $$$$$$$$ 0x0000030007000702 $$$$$$$$ 0x070705090305000B $$$$$$$$ 0x0002060903050805 $$$$$$$$ 0x0001000107030102 $$$$$$$$ 0x0000000000030007 $$$$$$$$ 0x0000000000020301 $$$$$$$$ 0x0005030501020102 $$$$$$$$ 0x0001000100010004 $$$$$$$$ 0x0201030205000307 $$$$$#$$ 0x0606080205090806 $$$$$$$$ 0x0308040306060806 $$$$$$$$ 0x0002020000000304 $$$$$$$$ 0x000805050B03080A $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x06050A0A08080B0C ........ 0x060304040506090A ........ 0x0606050606090706 ........ 0x07090B050D070C09 ........ 0x0B0A060B0509050D ........ 0x04050A0C0A080C0B ........ 0x0A06070808050407 ........ 0x090704060509070B ........ 0x04060505080B0A0A ........ 0x0609080805080707 ........ 0x040A060C040B060B ........ 0x090C0A0A0B0C0D0E ........ 0x08070A04060A0A05 ........ 0x060A09050B070B08 ........ 0x070805070505090A ........ 0x060B06070D060B11 ........
0x07060B0B09090C0D .#...... 0x0704050506070A0B ........ 0x07070607070A0807 ........ 0x080A0C060E080D0A ..#.##.# 0x0C0B070C060A060E ........ 0x05060B0D0B090D0C ........ 0x0B07080909060508 .....#.. 0x0A080507060A080C ....#..# 0x05070606090C0B0B .....#.. 0x070A090906090808 ........ 0x050B070D050C070C ........ 0x0A0D0B0B0C0D0E0F ##...... 0x09080B05070B0B06 ........ 0x070B0A060C080C09 ........ 0x0809060806060A0B ........ 0x070C07080E070C12 ........
0x08060C0C0A0A0D0E #$...... 0x0805060607080B0C ........ 0x08080708080B0908 ........ 0x090B0C070E080E0A ..$.$$.$ 0x0D0C080D070B070F ........ 0x06070C0E0C0A0E0D #.##.... 0x0C08090A0A060609 .....$#. 0x0B090608060B090C ...#$##$ 0x060807070A0C0C0C .....$.. 0x080B0A0A070A0909 ........ 0x060C080E060D080D .....#.. 0x0A0D0C0C0D0E0F10 $$.#.... 0x0A090C06080C0C07 ........ 0x080C0B070D090D0A ........ 0x090A070907070B0C ........ 0x080D08090F080D13 ........
0x08060D0D0B0B0E0F $$..#... 0x0906070708090C0D .###.##. 0x09090809090C0A09 ...##..# 0x0A0C0C080E080F0A ##$#$$#$ 0x0E0D090E080C0810 ........ 0x06080C0E0D0B0F0E $#$$.#.. 0x0D090A0B0B06060A ..###$$# 0x0C0A0708060B090C ###$$$$$ 0x070908080B0C0D0D .....$#. 0x090C0B0B080B0A0A .##..### 0x070D090F070D090E #...#$.# 0x0A0D0D0C0E0F1011 $$.$#... 0x0B0A0D07090D0D08 ........ 0x090D0C080E0A0E0B ........ 0x0A0B080A08080C0D ........ 0x090E090A10090E14 #.######
0x08060E0E0B0C0F10 $$..$.#. 0x0A06070709090C0E .$$$#$$. 0x0A0A0909090D0B09 ..#$$..$ 0x0A0C0C080E080F0A $$$$$$$$ 0x0F0E0A0F090D0911 .#...... 0x06080C0E0E0B100F $$$$#$#. 0x0E0A0A0B0B06060A ..$$$$$$ 0x0C0A0708060B090C $$$$$$$$ 0x080A09090C0C0D0E #..##$$. 0x0A0C0B0C090B0A0A .$$..$$$ 0x070E0A10070D0A0E $.##$$.$ 0x0A0D0E0C0E101112 $$.$$### 0x0C0B0E080A0E0E09 ..#..##. 0x0A0E0D090F0B0F0C ........ 0x0B0C090B09090D0E ..#..... 0x090F090A10090E14 $.$$$$$$
0x08060F0F0B0D0F11 $$.#$.$. 0x0B06070709090C0F #$$$$$$# 0x0B0B0909090E0C09 #.$$$..$ 0x0A0C0C080E080F0A $$$$$$$$ 0x100E0B100A0E0A12 #$...##. 0x06080C0E0E0B1010 $$$$$$$. 0x0F0B0A0B0B06060A #.$$$$$$ 0x0C0A0708060B090C $$$$$$$$ 0x080B0A090C0C0D0F $.#$$$$# 0x0B0C0B0D0A0B0A0A #$$.#$$$ 0x070F0A10070D0B0E $#$$$$#$ 0x0A0D0F0C0E101112 $$#$$$$$ 0x0D0C0E090B0E0E0A ..$.#$$. 0x0B0F0E0A100C100D ........ 0x0C0D090C0A0A0E0F ..$..... 0x0910090A10090E14 $.$$$$$$
0x0806100F0B0E0F12 $$#$$#$# 0x0B06070709090C0F $$$$$$$$ 0x0B0C0909090F0D09 $.$$$##$ 0x0A0C0C080E080F0A $$$$$$$$ 0x100E0C110B0E0A13 $$...$$. 0x06080C0E0E0B1011 $$$$$$$# 0x0F0C0A0B0B06060A $.$$$$$$ 0x0C0A0708060B090C $$$$$$$$ 0x080C0A090C0C0D0F $#$$$$$$ 0x0B0C0B0E0A0B0A0A $$$#$$$$ 0x070F0A10070D0B0E $$$$$$$$ 0x0A0D0F0C0E101112 $$$$$$$$ 0x0E0D0E0A0B0E0E0B #.$#$$$. 0x0C100F0B110D110E .##..... 0x0D0E090D0B0B0F10 ##$#..## 0x0911090A10090E14 $.$$$$$$
0x0806100F0B0E0F12 $$$$$$$$ 0x0B06070709090C0F $$$$$$$$ 0x0B0D0909090F0D09 $#$$$$$$ 0x0A0C0C080E080F0A $$$$$$$$ 0x100E0D120C0E0A14 $$###$$# 0x06080C0E0E0B1011 $$$$$$$$ 0x0F0D0A0B0B06060A $.$$$$$$ 0x0C0A0708060B090C $$$$$$$$ 0x080C0A090C0C0D0F $$$$$$$$ 0x0B0C0B0E0A0B0A0A $$$$$$$$ 0x070F0A10070D0B0E $$$$$$$$ 0x0A0D0F0C0E101112 $$$$$$$$ 0x0E0E0E0A0B0E0E0C $#$$$$$# 0x0D100F0C120E120F .$$.###. 0x0D0E090D0C0C0F10 $$$$#.$$ 0x0912090A10090E14 $#$$$$$$
0x0806100F0B0E0F12 $$$$$$$$ 0x0B06070709090C0F $$$$$$$$ 0x0B0D0909090F0D09 $$$$$$$$ 0x0A0C0C080E080F0A $$$$$$$$ 0x100E0D120C0E0A14 $$$$$$$$ 0x06080C0E0E0B1011 $$$$$$$$ 0x0F0E0A0B0B06060A $#$$$$$$ 0x0C0A0708060B090C $$$$$$$$ 0x080C0A090C0C0D0F $$$$$$$$ 0x0B0C0B0E0A0B0A0A $$$$$$$$ 0x070F0A10070D0B0E $$$$$$$$ 0x0A0D0F0C0E101112 $$$$$$$$ 0x0E0E0E0A0B0E0E0C $$$$$$$$ 0x0E100F0D120E1210 #$$#$$$# 0x0D0E090D0C0D0F10 $$$$$.$$ 0x0912090A10090E14 $$$$$$$$
0x0806100F0B0E0F12 $$$$$$$$ 0x0B06070709090C0F $$$$$$$$ 0x0B0D0909090F0D09 $$$$$$$$ 0x0A0C0C080E080F0A $$$$$$$$ 0x100E0D120C0E0A14 $$$$$$$$ 0x06080C0E0E0B1011 $$$$$$$$ 0x0F0E0A0B0B06060A $$$$$$$$ 0x0C0A0708060B090C $$$$$$$$ 0x080C0A090C0C0D0F $$$$$$$$ 0x0B0C0B0E0A0B0A0A $$$$$$$$ 0x070F0A10070D0B0E $$$$$$$$ 0x0A0D0F0C0E101112 $$$$$$$$ 0x0E0E0E0A0B0E0E0C $$$$$$$$ 0x0E100F0D120E1210 $$$$$$$$ 0x0D0E090D0C0E0F10 $$$$$#$$ 0x0912090A10090E14 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 2 7][ 2 5][ 7 15][ 4 14][ 4 10][ 4 13][ 11 14][ 9 17]
Mc0.Ch0.B1: [ 6 10][ 1 5][ 4 6][ 5 6][ 5 8][ 8 8][ 9 11][ 12 14]
Mc0.Ch1.B0: [ 0 10][ 2 12][ 3 8][ 2 8][ 7 8][ 7 14][ 5 12][ 5 8]
Mc0.Ch1.B1: [ 0 9][ 1 11][ 4 11][ 1 7][ 8 13][ 1 7][ 8 14][ 3 9]
Mc0.Ch2.B0: [ 8 15][ 8 13][ 6 12][ 10 17][ 4 11][ 6 13][ 1 9][ 12 19]
Mc0.Ch2.B1: [ 0 5][ 3 7][ 7 11][ 10 13][ 4 13][ 6 10][ 9 15][ 6 16]
Mc0.Ch3.B0: [ 1 14][ 2 13][ 0 9][ 2 10][ 8 10][ 4 5][ 2 5][ 3 9]
Mc0.Ch3.B1: [ 1 11][ 0 9][ 0 6][ 1 7][ 1 5][ 4 10][ 1 8][ 8 11]
Mc1.Ch0.B0: [ 0 7][ 0 11][ 0 9][ 0 8][ 1 11][ 3 11][ 4 12][ 2 14]
Mc1.Ch0.B1: [ 1 10][ 6 11][ 4 10][ 6 13][ 2 9][ 3 10][ 2 9][ 3 9]
Mc1.Ch1.B0: [ 0 6][ 2 14][ 0 9][ 2 15][ 0 6][ 2 12][ 0 10][ 5 13]
Mc1.Ch1.B1: [ 3 9][ 2 12][ 4 14][ 3 11][ 6 13][ 1 15][ 4 16][ 8 17]
Mc1.Ch2.B0: [ 7 13][ 7 13][ 9 13][ 3 9][ 6 10][ 10 13][ 9 13][ 6 11]
Mc1.Ch2.B1: [ 4 13][ 9 15][ 5 14][ 4 12][ 7 17][ 7 13][ 9 17][ 7 15]
Mc1.Ch3.B0: [ 0 12][ 3 13][ 3 8][ 1 12][ 1 11][ 0 13][ 4 14][ 5 15]
Mc1.Ch3.B1: [ 1 8][ 9 17][ 6 8][ 6 9][ 12 15][ 4 8][ 9 13][ 11 19]
Per Bit Offset
Mc0.Ch0.B0: -2 -2 1 -1 -1 1 2 1
Mc0.Ch0.B1: 2 0 1 2 2 2 1 3
Mc0.Ch1.B0: -1 1 1 -1 2 2 2 1
Mc0.Ch1.B1: -3 -3 -4 -1 -3 -3 -1 -3
Mc0.Ch2.B0: 1 1 3 3 3 1 0 3
Mc0.Ch2.B1: -2 0 -1 -1 -2 0 0 0
Mc0.Ch3.B0: -3 2 -3 -2 1 -1 -1 -1
Mc0.Ch3.B1: -3 -3 -1 -2 -2 -2 -3 -2
Mc1.Ch0.B0: -1 -1 -1 -1 -2 -4 -2 -2
Mc1.Ch0.B1: -1 -1 -1 2 1 -2 -2 -1
Mc1.Ch1.B0: -1 -2 -2 -4 -1 -4 -1 -2
Mc1.Ch1.B1: -3 -5 -1 -3 -2 -4 -3 -2
Mc1.Ch2.B0: 2 3 1 2 2 2 1 4
Mc1.Ch2.B1: 3 2 1 3 1 3 2 3
Mc1.Ch3.B0: -1 0 1 -1 1 2 0 0
Mc1.Ch3.B1: -2 2 1 1 1 0 0 -2
START_TxDqBitDelay
R Mc0.C0.R1.S0.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S0.B1 TxDqBitDelay: 3
R Mc0.C0.R1.S0.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S0.B3 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B4 TxDqBitDelay: 7
R Mc0.C0.R1.S0.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S0.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S1.B0 TxDqBitDelay: 8
R Mc0.C0.R1.S1.B1 TxDqBitDelay: 3
R Mc0.C0.R1.S1.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S1.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B4 TxDqBitDelay: 7
R Mc0.C0.R1.S1.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S1.B6 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S1.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S2.B0 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B1 TxDqBitDelay: 7
R Mc0.C0.R1.S2.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B3 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S2.B6 TxDqBitDelay: 9
R Mc0.C0.R1.S2.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S3.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S3.B2 TxDqBitDelay: 7
R Mc0.C0.R1.S3.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S3.B5 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S3.B7 TxDqBitDelay: 6
R Mc0.C0.R1.S4.B0 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S4.B1 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S4.B2 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B3 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R1.S4.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S4.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S4.B6 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B7 TxDqBitDelay: 16 (0x10)
R Mc0.C0.R1.S5.B0 TxDqBitDelay: 2
R Mc0.C0.R1.S5.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S5.B2 TxDqBitDelay: 9
R Mc0.C0.R1.S5.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S5.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B7 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S6.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B1 TxDqBitDelay: 8
R Mc0.C0.R1.S6.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S6.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B4 TxDqBitDelay: 9
R Mc0.C0.R1.S6.B5 TxDqBitDelay: 4
R Mc0.C0.R1.S6.B6 TxDqBitDelay: 3
R Mc0.C0.R1.S6.B7 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B1 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B2 TxDqBitDelay: 3
R Mc0.C0.R1.S7.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B4 TxDqBitDelay: 3
R Mc0.C0.R1.S7.B5 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B6 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B7 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B0 TxDqBitDelay: 3
R Mc1.C1.R1.S0.B1 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B2 TxDqBitDelay: 4
R Mc1.C1.R1.S0.B3 TxDqBitDelay: 4
R Mc1.C1.R1.S0.B4 TxDqBitDelay: 6
R Mc1.C1.R1.S0.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S0.B6 TxDqBitDelay: 8
R Mc1.C1.R1.S0.B7 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B0 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S1.B4 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B5 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B6 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B7 TxDqBitDelay: 6
R Mc1.C1.R1.S2.B0 TxDqBitDelay: 3
R Mc1.C1.R1.S2.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S2.B2 TxDqBitDelay: 4
R Mc1.C1.R1.S2.B3 TxDqBitDelay: 8
R Mc1.C1.R1.S2.B4 TxDqBitDelay: 3
R Mc1.C1.R1.S2.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B6 TxDqBitDelay: 5
R Mc1.C1.R1.S2.B7 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S3.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S3.B2 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S3.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B5 TxDqBitDelay: 8
R Mc1.C1.R1.S3.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B2 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S4.B4 TxDqBitDelay: 8
R Mc1.C1.R1.S4.B5 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S4.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B7 TxDqBitDelay: 9
R Mc1.C1.R1.S5.B0 TxDqBitDelay: 9
R Mc1.C1.R1.S5.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B3 TxDqBitDelay: 8
R Mc1.C1.R1.S5.B4 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B6 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S5.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S6.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S6.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B4 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B6 TxDqBitDelay: 9
R Mc1.C1.R1.S6.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S7.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S7.B1 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S7.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S7.B3 TxDqBitDelay: 8
R Mc1.C1.R1.S7.B4 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R1.S7.B5 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S7.B7 TxDqBitDelay: 15 (0xF)
STOP_TxDqBitDelay
Calling with EnRxDutyCycle = 0, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 250 250 240 210 200 230 230 250 260 260 250 190 190 240 250 240 250 250 240 270 260 240 240 250 250 260 250 250 250 240 240 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 240 240 240 210 200 230 230 250 250 250 250 200 200 230 240 230 260 250 260 260 270 220 240 250 250 250 260 250 250 230 240
Vref = -10: 230 230 220 230 180 180 220 220 240 230 240 230 190 170 230 220 220 220 240 230 230 250 220 220 230 230 240 240 230 220 230 220
Vref = -20: 220 200 210 210 170 160 210 190 230 210 220 210 180 150 230 200 220 210 210 220 220 220 210 190 220 200 220 220 210 210 210 200
Vref = -30: 200 180 190 180 160 130 190 160 190 190 210 180 180 110 200 170 210 190 210 200 200 190 190 170 200 180 190 180 210 180 200 170
Vref = 10: 250 250 260 250 200 220 230 240 250 260 250 260 200 200 250 240 250 260 250 250 260 250 230 240 250 250 260 260 240 240 250 240
Vref = 20: 240 220 230 230 190 180 220 220 240 240 240 220 190 170 230 220 230 230 240 230 240 240 220 210 250 240 240 240 230 220 230 220
Vref = 30: 230 210 220 210 180 170 210 200 220 220 230 210 180 150 230 200 220 220 230 220 220 220 220 200 220 210 230 220 220 210 210 200
Weighted Center 0 0 0 0 0 0 -1 0 0 0 0 0 0 0 0 0
Final Center 75 74 69 73 74 74 66 73 74 75 73 77 74 73 78 75
LstSavd Margins 240 240 250 250 200 200 240 230 250 260 260 250 200 200 250 240 250 240 260 250 250 240 240 230 250 250 250 260 250 240 240 240 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 260 250 240 250 200 200 230 240 250 250 250 250 200 200 240 250 250 250 250 250 250 240 240 230 240 250 260 250 250 240 240 240
Vref = -10: 230 230 220 230 190 180 230 220 240 240 240 230 190 180 230 230 240 240 240 230 230 220 230 220 230 230 240 240 230 230 210 230
Vref = -20: 220 210 210 220 180 160 210 200 220 220 230 210 170 160 220 210 230 210 220 220 230 210 220 200 220 210 220 210 220 200 200 210
Vref = -30: 200 180 200 180 170 120 200 160 190 190 220 170 160 110 210 190 220 180 210 190 200 180 200 170 200 180 200 180 210 190 190 180
Vref = 10: 260 250 250 250 210 200 240 250 250 260 260 250 200 200 250 240 260 240 250 250 250 230 240 240 250 250 260 250 250 250 230 240
Vref = 20: 240 230 230 230 190 180 220 220 230 240 250 240 190 180 230 230 250 240 240 230 230 220 230 230 240 240 250 250 240 240 230 230
Vref = 30: 220 220 210 210 180 160 210 200 220 220 230 210 180 150 210 210 230 210 220 220 230 210 220 200 230 210 240 220 220 210 200 210
Weighted Center 0 0 -1 0 0 -1 -1 0 -1 0 -1 -1 0 0 0 0
Final Center 74 73 68 73 72 71 65 73 77 77 76 77 76 74 77 75
MRC task Write Timing Centering 2D After Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD39h
MRC task -- Read Timing Centering 2D After Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 160 160 160 160 110 110 150 150 150 150 150 150 110 110 160 160 170 170 180 180 160 160 150 150 170 170 160 160 180 180 150 150 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 180 210 170 130 130 190 160 180 170 190 170 120 110 210 160 220 190 220 200 210 170 180 160 200 180 190 170 220 190 200 170
Weighted Center -2 -2 0 -2 -1 -1 -1 -3 -2 -1 -2 -1 -1 -1 -2 -2
Final Center -18 -17 -11 -16 -16 -16 -11 -19 -19 -19 -17 -15 -17 -16 -19 -17
Edges we pass on to GetMarginBit are
190 200 190 190 130 130 170 180 170 180 180 180 110 120 180 190 200 210 210 210 190 190 170 170 190 190 180 180 200 210 180 190
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x1C1C171817181716 ........ 0x1B1B1A1B1B191A19 ........ 0x1817181817161817 ........ 0x1516161614161414 .....#.# 0x1517171516161815 ........ 0x1716141516161415 ........ 0x1C1D1C1B19191E1C ....#.#. 0x1A1B1C1B1D191B19 ....##.# 0x1D1C1E1F1A191A1B ........ 0x1B1A1C1A1B181A1A ........ 0x191617161A151815 ........ 0x141310110F101311 ........ 0x1515141717151718 ........ 0x19171A1D18191A1C ........ 0x18181C1A191B1917 ........ 0x1815181815171414 ........
0x1B1B161716171615 .#..#... 0x1A1A191A1A181918 .###.#.. 0x1716171716151716 ....#... 0x1415151513171315 ........ 0x1416161415151714 ........ 0x1615131415151314 ........ 0x1B1C1B1A1A181F1B ........ 0x191A1B1A1E1A1A1A ........ 0x1C1B1D1E1918191A #....#.. 0x1A191B191A171919 .....#.# 0x1815161519141714 .....#.. 0x13120F100E0F1210 ........ 0x1414131616141617 ....#... 0x1816191C1718191B ........ 0x17171B19181A1816 ........ 0x1714171714161313 .....#..
0x1A1B151616161514 .$..$#.. 0x191A191A19181817 .$$$.$.. 0x1615161616141615 ....$... 0x1314141412171215 .....$.$ 0x1315151314141613 ........ 0x1514121314141213 ........ 0x1A1B1A191A171F1A ....$.$. 0x18191A191E1A191A ####$$.$ 0x1C1A1C1D18181819 $#..#$.. 0x19181A1819171819 ....#$.$ 0x1714151418141613 #...#$.. 0x12110E0F0D0E110F ....#... 0x1313121516131516 ....$#.# 0x1715181B1617181A ##.#.... 0x16161A1817191715 ........ 0x1613161613161212 #.#..$#.
0x191B141516161413 #$..$$.. 0x181A191A18181716 .$$$.$.. 0x1514151516131514 ....$#.. 0x1213131311171115 ....#$.$ 0x1214141213131512 ....#.#. 0x1413111213131112 .#...#.. 0x191A19181A161F19 ....$.$. 0x18191A191E1A181A $$$$$$.$ 0x1C1A1B1C18181718 $$##$$#. 0x1817191719171719 .#.#$$#$ 0x1713141318141512 $.#.$$## 0x11100D0E0D0D100E ....$... 0x1212111416131416 .#..$$.$ 0x1715171B15161719 $$#$###. 0x1515191716181614 ##...... 0x1612161512161211 $.$..$$.
0x191B131416161312 $$#.$$.# 0x171A191A17181615 #$$$#$.. 0x1413141416131413 #...$$## 0x1112121211171015 #.##$$#$ 0x1113131113121511 ....$#$. 0x1313101112131011 .$...$.# 0x181918171A151F18 ....$.$. 0x18191A191E1A171A $$$$$$#$ 0x1C1A1B1C18181717 $$$$$$$# 0x1717181719171719 #$#$$$$$ 0x1712141218141512 $.$.$$$$ 0x100F0C0D0D0C0F0D ....$... 0x1112101316131316 #$..$$#$ 0x1715171B15161718 $$$$$$$. 0x1515181615171513 $$...#.# 0x1611161411161210 $.$##$$.
0x191B131316161212 $$$.$$.$ 0x171A191A17181514 $$$$$$.. 0x1412131316131413 $...$$$$ 0x1111121211171015 $.$$$$$$ 0x1012121013121510 ..#.$$$. 0x12130F1011130F11 .$..#$#$ 0x171817161A141F17 ....$#$# 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x1711141118141512 $.$.$$$$ 0x0F0E0B0C0D0B0E0C ....$... 0x11120F1216131316 $$##$$$$ 0x1715171B15161717 $$$$$$$. 0x1515171514171413 $$.#.$.$ 0x161016141116120F $.$$$$$.
0x191B131216161112 $$$#$$#$ 0x171A191A17181413 $$$$$$#. 0x1411121216131413 $.#.$$$$ 0x1110121211171015 $.$$$$$$ 0x0F11120F1312150F .#$#$$$. 0x11130E0F11130F11 .$..$$$$ 0x161716151A141F17 ....$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x1710141018141512 $.$#$$$$ 0x0E0D0A0B0D0A0D0B ....$##. 0x11120F1216131316 $$$$$$$$ 0x1715171B15161716 $$$$$$$. 0x1515161513171313 $$#$#$#$ 0x160F16141116120E $#$$$$$.
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$# 0x1410121116131413 $.$.$$$$ 0x110F121211171015 $.$$$$$$ 0x0E11120F1312150E .$$$$$$. 0x10130D0E11130F11 #$#.$$$$ 0x151615141A141F17 ....$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $#$$$$$$ 0x0D0C090A0D0A0D0A ....$$$. 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$# 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$#
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$$ 0x140F121016131413 $#$.$$$$ 0x110E121211171015 $.$$$$$$ 0x0D11120F1312150D .$$$$$$. 0x10130D0D11130F11 $$$.$$$$ 0x141514131A141F17 ....$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $$$$$$$$ 0x0C0B08090D0A0D09 ##.#$$$. 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$$ 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$$
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$$ 0x140F120F16131413 $$$#$$$$ 0x110D121211171015 $#$$$$$$ 0x0C11120F1312150C #$$$$$$# 0x10130D0C11130F11 $$$.$$$$ 0x131413121A141F17 ....$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $$$$$$$$ 0x0C0B07090D0A0D08 $$#$$$$. 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$$ 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$$
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$$ 0x140F120F16131413 $$$$$$$$ 0x110D121211171015 $$$$$$$$ 0x0C11120F1312150C $$$$$$$$ 0x10130D0B11130F11 $$$.$$$$ 0x121312111A141F17 ..##$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $$$$$$$$ 0x0C0B07090D0A0D07 $$$$$$$# 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$$ 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$$
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$$ 0x140F120F16131413 $$$$$$$$ 0x110D121211171015 $$$$$$$$ 0x0C11120F1312150C $$$$$$$$ 0x10130D0A11130F11 $$$#$$$$ 0x111212111A141F17 ..$$$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $$$$$$$$ 0x0C0B07090D0A0D07 $$$$$$$$ 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$$ 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$$
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$$ 0x140F120F16131413 $$$$$$$$ 0x110D121211171015 $$$$$$$$ 0x0C11120F1312150C $$$$$$$$ 0x10130D0A11130F11 $$$$$$$$ 0x101112111A141F17 ..$$$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $$$$$$$$ 0x0C0B07090D0A0D07 $$$$$$$$ 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$$ 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$$
0x191B131216161112 $$$$$$$$ 0x171A191A17181412 $$$$$$$$ 0x140F120F16131413 $$$$$$$$ 0x110D121211171015 $$$$$$$$ 0x0C11120F1312150C $$$$$$$$ 0x10130D0A11130F11 $$$$$$$$ 0x0F1012111A141F17 ##$$$$$$ 0x18191A191E1A171A $$$$$$$$ 0x1C1A1B1C18181717 $$$$$$$$ 0x1717181719171719 $$$$$$$$ 0x170F141018141512 $$$$$$$$ 0x0C0B07090D0A0D07 $$$$$$$$ 0x11120F1216131316 $$$$$$$$ 0x1715171B15161715 $$$$$$$$ 0x1515161513171313 $$$$$$$$ 0x160F16141116120D $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x1C1C171817181716 ........ 0x1B1B1A1B1B191A19 ........ 0x1817181817161817 ........ 0x1516161614161414 ........ 0x1517171516161815 ........ 0x1716141516161415 ........ 0x1C1D1C1B19191E1C ........ 0x1A1B1C1B1D191B19 ........ 0x1D1C1E1F1A191A1B ........ 0x1B1A1C1A1B181A1A ........ 0x191617161A151815 ........ 0x141310110F101311 ........ 0x1515141717151718 ........ 0x19171A1D18191A1C ........ 0x18181C1A191B1917 ........ 0x1815181815171414 ........
0x1D1D181918191817 ........ 0x1C1C1B1C1C1A1B1A ........ 0x1918191918171918 ........ 0x1617171715171515 ........ 0x1618181617171916 ........ 0x1817151617171516 ........ 0x1D1E1D1C1A1A1F1D ........ 0x1B1C1D1C1E1A1C1A ........ 0x1E1D1F201B1A1B1C ........ 0x1C1B1D1B1C191B1B ........ 0x1A1718171B161916 ........ 0x1514111210111412 ........ 0x1616151818161819 ........ 0x1A181B1E191A1B1D ........ 0x19191D1B1A1C1A18 ........ 0x1916191916181515 ........
0x1E1E191A191A1918 ........ 0x1D1D1C1D1D1B1C1B ........ 0x1A191A1A19181A19 ........ 0x1718181816181616 ........ 0x1719191718181A17 ........ 0x1918161718181617 ........ 0x1E1F1E1D1B1B201E ........ 0x1C1D1E1D1F1B1D1B ........ 0x1F1E20211C1B1C1D ........ 0x1D1C1E1C1D1A1C1C ........ 0x1B1819181C171A17 ........ 0x1615121311121513 ........ 0x171716191917191A ........ 0x1B191C1F1A1B1C1E ........ 0x1A1A1E1C1B1D1B19 ........ 0x1A171A1A17191616 ........
0x1F1F1A1B1A1B1A19 ........ 0x1E1E1D1E1E1C1D1C ........ 0x1B1A1B1B1A191B1A ........ 0x1819191917191717 ........ 0x181A1A1819191B18 ........ 0x1A19171819191718 ........ 0x1F201F1E1C1C211F ........ 0x1D1E1F1E201C1E1C ........ 0x201F21221D1C1D1E ........ 0x1E1D1F1D1E1B1D1D ........ 0x1C191A191D181B18 ........ 0x1716131412131614 ........ 0x1818171A1A181A1B ........ 0x1C1A1D201B1C1D1F ........ 0x1B1B1F1D1C1E1C1A ........ 0x1B181B1B181A1717 ........
0x20201B1C1B1C1B1A ........ 0x1F1F1E1F1F1D1E1D ........ 0x1C1B1C1C1B1A1C1B ........ 0x191A1A1A181A1818 ........ 0x191B1B191A1A1C19 ........ 0x1B1A18191A1A1819 ........ 0x2021201F1D1D2220 ........ 0x1E1F201F211D1F1D ........ 0x212022231E1D1E1F ........ 0x1F1E201E1F1C1E1E ........ 0x1D1A1B1A1E191C19 ........ 0x1817141513141715 ........ 0x1919181B1B191B1C ........ 0x1D1B1E211C1D1E20 ........ 0x1C1C201E1D1F1D1B ........ 0x1C191C1C191B1818 ........
0x21211C1D1C1D1C1B ........ 0x20201F20201E1F1E ........ 0x1D1C1D1D1C1B1D1C ........ 0x1A1B1B1B191B1919 ........ 0x1A1C1C1A1B1B1D1A ........ 0x1C1B191A1B1B191A ........ 0x212221201E1E2321 ........ 0x1F202120221E201E ........ 0x222123241F1E1F20 ........ 0x201F211F201D1F1F ........ 0x1E1B1C1B1F1A1D1A ........ 0x1918151614151816 ........ 0x1A1A191C1C1A1C1D ........ 0x1E1C1F221D1E1F21 ........ 0x1D1D211F1E201E1C ........ 0x1D1A1D1D1A1C1919 ........
0x22221D1E1D1E1D1C ........ 0x21212021211F201F ........ 0x1E1D1E1E1D1C1E1D ........ 0x1B1C1C1C1A1C1A1A ........ 0x1B1D1D1B1C1C1E1B ........ 0x1D1C1A1B1C1C1A1B ........ 0x222322211F1F2422 ........ 0x20212221231F211F ........ 0x23222425201F2021 ........ 0x21202220211E2020 ........ 0x1F1C1D1C201B1E1B ........ 0x1A19161715161917 ........ 0x1B1B1A1D1D1B1D1E ........ 0x1F1D20231E1F2022 ........ 0x1E1E22201F211F1D ........ 0x1E1B1E1E1B1D1A1A ........
0x23231E1F1E1F1E1D ........ 0x2222212222202120 ........ 0x1F1E1F1F1E1D1F1E ........ 0x1C1D1D1D1B1D1B1B ........ 0x1C1E1E1C1D1D1F1C ........ 0x1E1D1B1C1D1D1B1C ........ 0x2324232220202523 ........ 0x2122232224202220 ........ 0x2423252621202122 ........ 0x22212321221F2121 ........ 0x201D1E1D211C1F1C ........ 0x1B1A171816171A18 ........ 0x1C1C1B1E1E1C1E1F ........ 0x201E21241F202123 ........ 0x1F1F23212022201E ........ 0x1F1C1F1F1C1E1B1B ........
0x24241F201F201F1E ........ 0x2323222323212221 ........ 0x201F20201F1E201F ........ 0x1D1E1E1E1C1E1C1C ........ 0x1D1F1F1D1E1E201D ........ 0x1F1E1C1D1E1E1C1D ........ 0x2425242321212624 ........ 0x2223242325212321 ........ 0x2524262722212223 ........ 0x2322242223202222 ........ 0x211E1F1E221D201D ........ 0x1C1B181917181B19 ........ 0x1D1D1C1F1F1D1F20 ........ 0x211F222520212224 ........ 0x202024222123211F ........ 0x201D20201D1F1C1C ........
0x252520212021201F ........ 0x2424232424222322 ........ 0x21202121201F2120 ........ 0x1E1F1F1F1D1F1D1D ........ 0x1E20201E1F1F211E ........ 0x201F1D1E1F1F1D1E ........ 0x2526252422222725 ........ 0x2324252426222422 ........ 0x2625272823222324 ........ 0x2423252324212323 ........ 0x221F201F231E211E ........ 0x1D1C191A18191C1A ........ 0x1E1E1D20201E2021 ....#... 0x2220232621222325 ........ 0x2121252322242220 ........ 0x211E21211E201D1D ........
0x2626212221222120 ........ 0x2525242525232423 ........ 0x2221222221202221 ........ 0x1F2020201E201E1E ........ 0x1F21211F2020221F ........ 0x21201E1F20201E1F ........ 0x2627262523232826 ........ 0x2425262527232523 ........ 0x2726282924232425 ........ 0x2524262425222424 ........ 0x23202120241F221F ........ 0x1E1D1A1B191A1D1B ........ 0x1F1F1E21201F2122 ....$#.. 0x2321242722232426 ........ 0x2222262423252321 ........ 0x221F22221F211E1E ........
0x2727222322232221 ........ 0x2626252626242524 ........ 0x2322232322212322 .....##. 0x202121211F211F1F ........ 0x2022222021212320 ........ 0x22211F2021211F20 ...#.... 0x2728272624242927 ........ 0x2526272628242624 ........ 0x2827292A25242526 ........ 0x2625272526232525 ........ 0x2421222125202320 ........ 0x1F1E1B1C1A1B1E1C ........ 0x20201F22201F2223 ....$$## 0x2422252823242527 ........ 0x2323272524262422 ........ 0x2320232320221F1F ........
0x2828232423242322 ........ 0x2727262727252625 ........ 0x2423242423212323 .#..#$$. 0x2122222220222020 ........ 0x2123232122222421 ........ 0x2322202022222021 ...$.... 0x2829282725252A28 ........ 0x2627282729252725 ........ 0x29282A2B26252627 ........ 0x2726282627242626 ........ 0x2522232226212421 ........ 0x201F1C1D1B1C1F1D ....#... 0x21212023201F2223 .#..$$$$ 0x2523262924252628 ........ 0x2424282625272523 ........ 0x2421242421232020 ........
0x2929242524252423 ........ 0x2828272828262726 ........ 0x2523252523212324 #$#.$$$. 0x2223232321232121 ........ 0x2224242223232522 ........ 0x2423212023232122 #..$.#.. 0x292A292826262B29 ........ 0x272829282A262826 ........ 0x2A292B2C27262728 ........ 0x2827292728252727 ..#..... 0x2623242327222522 ........ 0x21201D1E1B1D201E ....$##. 0x22212124201F2223 #$..$$$$ 0x2624272A25262729 .......# 0x2525292726282624 ........ 0x2522252522242121 ........
0x2A2A252625262524 ......#. 0x2929282929272827 ........ 0x2523252623212325 $$$#$$$# 0x2324242422242222 ........ 0x2325252324242623 ........ 0x2424222024232223 $#.$.$## 0x2A2B2A2927272C2A ........ 0x28292A292B272927 ........ 0x2B2A2C2D28272829 ........ 0x2928292829262828 .#$...## 0x2724252428232623 ........ 0x22211E1F1B1D201F ##..$$$# 0x22212225201F2223 $$.#$$$$ 0x2725282B26272829 ....#..$ 0x26262A2827292725 ........ 0x2623262623252222 ........
0x2B2B262726272525 ....#.$# 0x2A2A292A2A282928 ........ 0x2523252623212325 $$$$$$$$ 0x2425252523252323 ........ 0x2426262425252724 ##...### 0x2424232025232223 $$#$.$$$ 0x2B2C2B2A28282D2B ........ 0x292A2B2A2C282A28 ........ 0x2C2B2D2E2928292A ........ 0x2A2829292A272828 #$$...$$ 0x2825262529242724 ........ 0x22211F201B1D201F $$##$$$$ 0x22212325201F2223 $$#$$$$$ 0x2826292C26282929 ##..$#.$ 0x27272B29282A2826 ........ 0x2724272724262323 ........
0x2C2C272826282525 ##..$#$$ 0x2B2B2A2B2B292A29 ........ 0x2523252623212325 $$$$$$$$ 0x2526262624262424 ....#... 0x2426272526252724 $$###$$$ 0x2424232026232223 $$$$#$$$ 0x2C2D2C2B29292E2C ........ 0x2A2B2C2B2D292B29 ........ 0x2D2C2E2F2A292A2B ........ 0x2A28292A2B282828 $$$###$$ 0x292627262A252825 ........ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262A2D26282A29 $$..$$#$ 0x28282C2A292B2927 ........ 0x2825282825272424 ........
0x2C2C282926282525 $$#.$$$$ 0x2C2C2B2C2C2A2B2A ........ 0x2523252623212325 $$$$$$$$ 0x2627272724272525 ....$.#. 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2D2E2D2C2A2A2F2D ..#...#. 0x2B2C2D2C2E2A2C2A ........ 0x2E2D2F302B2A2B2C ........ 0x2A28292A2B282828 $$$$$$$$ 0x2A2728272B262926 ..#.##.. 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$##$$$$ 0x29292D2B2A2C2A28 ........ 0x2926292926282525 ........
0x2C2C282A26282525 $$$#$$$$ 0x2D2D2C2D2D2B2C2B ........ 0x2523252623212325 $$$$$$$$ 0x2728282824282526 ....$#$. 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E2F2D2D2B2B2F2E #.$..#$. 0x2C2D2E2D2F2B2D2B ........ 0x2F2E30312C2B2C2D ........ 0x2A28292A2B282828 $$$$$$$$ 0x2B2828282B262A27 ..$#$$#. 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2A2A2E2C2B2D2B29 ........ 0x2A272A2A27292626 ........
0x2C2C282A26282525 $$$$$$$$ 0x2E2E2D2E2E2C2D2C ........ 0x2523252623212325 $$$$$$$$ 0x2829292924282527 ##..$$$# 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E302D2E2C2B2F2F $.$.#$$. 0x2D2E2F2E302C2E2C ........ 0x302F31322D2C2D2E ........ 0x2A28292A2B282828 $$$$$$$$ 0x2C2928282B262A28 .#$$$$$# 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2B2B2F2D2C2E2C2A ........ 0x2B282B2B282A2727 ....#...
0x2C2C282A26282525 $$$$$$$$ 0x2F2F2E2F2F2D2E2D ....#... 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$##$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E312D2F2C2B2F30 $.$#$$$# 0x2E2F302F312D2F2D ......#. 0x313032332E2D2E2F ........ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 #$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2C302E2D2F2D2B #.#..... 0x2C292C2C282B2828 ..#.$...
0x2C2C282A26282525 $$$$$$$$ 0x30302F302F2E2F2E ....$... 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E322D2F2C2B2F30 $.$$$$$$ 0x2F303130322E2F2E ....#.$. 0x323133342F2E2F30 ........ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2D302F2E302E2C $.$#.#.# 0x2D2A2C2D282C2929 .#$.$.##
0x2C2C282A26282525 $$$$$$$$ 0x313130312F2F302F ##..$.## 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E332D2F2C2B2F30 $#$$$$$$ 0x30313231322F2F2F ..#.$.$. 0x33323435302F3031 ........ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2E302F2F302F2C $.$$#$#$ 0x2E2A2C2E282D2929 .$$#$.$$
0x2C2C282A26282525 $$$$$$$$ 0x313131322F30302F $$##$#$$ 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E332D2F2C2B2F30 $$$$$$$$ 0x3132323232302F30 .#$.$#$# 0x3433353631303132 .#..##.# 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2F302F2F302F2C $#$$$$$$ 0x2F2A2C2E282E2929 #$$$$#$$
0x2C2C282A26282525 $$$$$$$$ 0x313131322F30302F $$$$$$$$ 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E332D2F2C2B2F30 $$$$$$$$ 0x3232323332302F30 #$$#$$$$ 0x3533363731303232 .$#.$$#$ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2F302F2F302F2C $$$$$$$$ 0x2F2A2C2E282E2929 $$$$$$$$
0x2C2C282A26282525 $$$$$$$$ 0x313131322F30302F $$$$$$$$ 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E332D2F2C2B2F30 $$$$$$$$ 0x3232323332302F30 $$$$$$$$ 0x3633363831303232 .$$.$$$$ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2F302F2F302F2C $$$$$$$$ 0x2F2A2C2E282E2929 $$$$$$$$
0x2C2C282A26282525 $$$$$$$$ 0x313131322F30302F $$$$$$$$ 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E332D2F2C2B2F30 $$$$$$$$ 0x3232323332302F30 $$$$$$$$ 0x3733363931303232 .$$#$$$$ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2F302F2F302F2C $$$$$$$$ 0x2F2A2C2E282E2929 $$$$$$$$
0x2C2C282A26282525 $$$$$$$$ 0x313131322F30302F $$$$$$$$ 0x2523252623212325 $$$$$$$$ 0x28292A2A24282527 $$$$$$$$ 0x2426272526252724 $$$$$$$$ 0x2424232026232223 $$$$$$$$ 0x2E332D2F2C2B2F30 $$$$$$$$ 0x3232323332302F30 $$$$$$$$ 0x3833363931303232 #$$$$$$$ 0x2A28292A2B282828 $$$$$$$$ 0x2D2928282B262A28 $$$$$$$$ 0x22211F201B1D201F $$$$$$$$ 0x22212325201F2223 $$$$$$$$ 0x28262B2E26282A29 $$$$$$$$ 0x2C2F302F2F302F2C $$$$$$$$ 0x2F2A2C2E282E2929 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 26 43][ 28 43][ 20 39][ 19 41][ 23 37][ 23 39][ 18 36][ 19 36]
Mc0.Ch0.B1: [ 24 48][ 27 48][ 26 48][ 27 49][ 24 46][ 25 47][ 21 47][ 19 46]
Mc0.Ch1.B0: [ 21 36][ 16 34][ 19 36][ 16 37][ 23 34][ 20 32][ 21 34][ 20 36]
Mc0.Ch1.B1: [ 18 39][ 14 40][ 19 41][ 19 41][ 18 35][ 23 39][ 17 36][ 21 38]
Mc0.Ch2.B0: [ 13 35][ 18 37][ 19 38][ 16 36][ 20 37][ 19 36][ 22 38][ 13 35]
Mc0.Ch2.B1: [ 17 35][ 20 35][ 14 34][ 11 31][ 18 37][ 20 34][ 16 33][ 18 34]
Mc0.Ch3.B0: [ 16 45][ 17 50][ 19 44][ 18 46][ 26 43][ 21 42][ 31 46][ 24 47]
Mc0.Ch3.B1: [ 25 49][ 26 49][ 27 49][ 26 50][ 30 49][ 26 47][ 24 46][ 26 47]
Mc1.Ch0.B0: [ 29 55][ 27 50][ 28 53][ 29 56][ 25 48][ 25 47][ 24 49][ 24 49]
Mc1.Ch0.B1: [ 24 41][ 24 39][ 25 40][ 24 41][ 26 42][ 24 39][ 24 39][ 26 39]
Mc1.Ch1.B0: [ 24 44][ 16 40][ 21 39][ 17 39][ 25 42][ 21 37][ 22 41][ 19 39]
Mc1.Ch1.B1: [ 13 33][ 12 32][ 8 30][ 10 31][ 14 26][ 11 28][ 14 31][ 8 30]
Mc1.Ch2.B0: [ 18 33][ 19 32][ 16 34][ 19 36][ 23 31][ 20 30][ 20 33][ 23 34]
Mc1.Ch2.B1: [ 24 39][ 22 37][ 24 42][ 28 45][ 22 37][ 23 39][ 24 41][ 22 40]
Mc1.Ch3.B0: [ 22 43][ 22 46][ 23 47][ 22 46][ 20 46][ 24 47][ 20 46][ 20 43]
Mc1.Ch3.B1: [ 23 46][ 16 41][ 23 43][ 21 45][ 18 39][ 23 45][ 19 40][ 14 40]
Per Bit Offset
Mc0.Ch0.B0: 7 8 7 6 7 7 4 6
Mc0.Ch0.B1: 9 11 11 11 8 11 8 8
Mc0.Ch1.B0: 5 2 4 3 6 4 4 5
Mc0.Ch1.B1: 8 5 8 8 7 9 7 10
Mc0.Ch2.B0: 3 5 6 5 7 6 6 3
Mc0.Ch2.B1: 3 6 4 0 6 5 5 5
Mc0.Ch3.B0: 3 5 4 5 10 7 9 8
Mc0.Ch3.B1: 11 11 10 11 11 12 8 12
Mc1.Ch0.B0: 13 11 11 12 11 11 11 10
Mc1.Ch0.B1: 6 6 5 7 7 8 6 7
Mc1.Ch1.B0: 9 6 7 6 8 8 8 8
Mc1.Ch1.B1: 3 3 3 4 5 4 4 2
Mc1.Ch2.B0: 5 5 5 5 4 4 4 5
Mc1.Ch2.B1: 7 7 7 8 6 6 7 3
Mc1.Ch3.B0: 9 10 7 8 8 9 8 9
Mc1.Ch3.B1: 11 8 9 9 8 11 10 7
START_RxDqsBitDelay
R Mc0.C0.R0.S0.B0 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S0.B1 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S0.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S0.B3 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S0.B4 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S0.B5 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S0.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S0.B7 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S1.B0 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S1.B1 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S1.B2 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S1.B3 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S1.B4 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S1.B5 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S1.B6 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B7 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S2.B0 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S2.B1 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S2.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S2.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S2.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S2.B5 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S2.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S2.B7 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S3.B0 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S3.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S3.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S3.B3 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S3.B4 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S3.B5 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S3.B6 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S3.B7 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S4.B0 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S4.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S4.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S4.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S4.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S4.B5 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S4.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S4.B7 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S5.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S5.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S5.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S5.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B4 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S5.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S5.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S5.B7 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S6.B0 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S6.B1 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S6.B2 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S6.B3 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S6.B4 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S6.B5 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S6.B6 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R0.S6.B7 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S7.B0 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B1 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S7.B2 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S7.B3 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S7.B4 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R0.S7.B5 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B6 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S7.B7 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S0.B0 RxDqsBitDelay: 42 (0x2A)
R Mc1.C1.R0.S0.B1 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R0.S0.B2 RxDqsBitDelay: 41 (0x29)
R Mc1.C1.R0.S0.B3 RxDqsBitDelay: 43 (0x2B)
R Mc1.C1.R0.S0.B4 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S0.B5 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S0.B6 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S0.B7 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S1.B0 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S1.B1 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S1.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S1.B3 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S1.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S1.B5 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S1.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S1.B7 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S2.B0 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S2.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S2.B3 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S2.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S2.B5 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S2.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S2.B7 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S3.B0 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S3.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S3.B2 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B3 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S3.B4 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S3.B5 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S3.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S3.B7 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S4.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S4.B1 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S4.B2 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S4.B3 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S4.B4 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S4.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S4.B6 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S4.B7 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S5.B0 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S5.B1 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S5.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S5.B3 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S5.B4 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S5.B5 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S5.B6 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S5.B7 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S6.B0 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B1 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S6.B2 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S6.B3 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S6.B4 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B5 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S6.B6 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B7 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S7.B0 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S7.B1 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S7.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S7.B3 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S7.B4 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S7.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S7.B6 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B7 RxDqsBitDelay: 27 (0x1B)
STOP_RxDqsBitDelay
LstSavd Margins 160 160 160 160 110 110 150 150 150 150 150 150 110 110 160 160 170 170 180 180 170 170 160 160 170 170 160 160 190 190 150 150 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 170 200 170 150 120 190 160 180 160 190 160 130 120 200 170 210 180 220 190 210 180 180 170 210 180 220 170 220 200 200 160
Weighted Center -2 -2 -2 -2 -1 -2 -1 -2 -2 -2 -2 -1 -2 -3 -1 -2
Final Center -17 -17 -12 -16 -15 -16 -11 -17 -18 -19 -18 -16 -18 -18 -19 -16
Edges we pass on to GetMarginBit are
190 190 180 190 130 140 170 180 170 170 170 180 120 130 180 190 190 200 200 210 190 200 170 180 190 200 190 200 210 210 180 180
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x1B1D181A18181918 ........ 0x1C1C1F1F1D1B1C19 ........ 0x18181A1A1A171917 ........ 0x1817151714171515 ........ 0x1517161617151714 ........ 0x1916141516161415 .#...... 0x1E1F1D1D1C1B1E1D ........ 0x1B1B1D1C1D1A1C1B .....#.. 0x1D1B1E1F1918191A ........ 0x19181A1A1B181A19 ........ 0x1B16171619151815 ........ 0x141311120F121210 ....#... 0x1615171816171718 ........ 0x1A191B1E181B1A1B ........ 0x19181C191A1B1918 ........ 0x1816191817191716 ........
0x1A1C171917171817 .#...#.. 0x1B1B1E1E1C1A1B18 ........ 0x1717191919161816 .....#.# 0x1716141613161414 ........ 0x1416151516141613 ........ 0x1817131415151314 ........ 0x1D1E1C1C1B1A1D1C ....#.#. 0x1A1A1C1B1C1B1B1A ........ 0x1C1A1D1E18171819 ........ 0x181719191A171918 ........ 0x1A15161518141714 .....#.. 0x131210111011110F ........ 0x1514161715161617 ........ 0x19181A1D171A191A #....... 0x18171B18191A1817 .......# 0x1715181716181615 .....##.
0x191C161816171716 .$...$.. 0x1A1A1D1D1B191A17 ........ 0x1616181818161716 .....$#$ 0x1615131512151313 ....##.# 0x1315141415131512 ........ 0x1717121314141213 .$...... 0x1C1D1B1B1B191D1B ....$.$. 0x19191B1A1B1B1A19 .....$.. 0x1B191C1D17161718 ....##.. 0x1716181819161817 .....#.# 0x1914151417141613 ....#$.. 0x12110F101010100E ....$.#. 0x1413151614151516 .....#.. 0x1917191C16191819 $#.####. 0x17161A1718191717 ......#$ 0x1614171615181614 #.#..$$.
0x181C151715171615 .$..#$.. 0x19191C1C1A181916 ........ 0x1515171717161716 .....$$$ 0x1514121412151213 ....$$.$ 0x1214131314121411 ......#. 0x1617111213131112 #$...#.. 0x1B1C1A1A1B181D1A ....$#$# 0x18181A191A1B1918 #.###$.# 0x1A181B1C17161617 .#..$$.. 0x1615171718161717 ##..#$#$ 0x1813141317141512 ....$$.. 0x11100E0F100F100D ....$.$. 0x1312141513151415 ....#$.. 0x1917181C16191818 $$#$$$$. 0x1615191617181717 ######$$ 0x1613171514181613 $.$##$$.
0x171C141615171514 #$#.$$.. 0x18181B1B19171815 ........ 0x1414161616161716 ....#$$$ 0x1413111312151113 ..##$$#$ 0x1113121213111410 ....#.$. 0x1617101112131011 $$#..$.. 0x1A1B19191B181D1A ....$$$$ 0x18171A191A1B1818 $.$$$$#$ 0x19181A1B17161516 .$.#$$#. 0x1615161618161717 $$##$$$$ 0x1712131217141411 ....$$.. 0x100F0D0E100E100C ....$.$. 0x1211131413151314 ##..$$## 0x1917181C16191817 $$$$$$$# 0x1615191617181717 $$$$$$$$ 0x1612171514181612 $.$$$$$.
0x171C141515171413 $$$#$$.. 0x17171A1A18161714 .#...#.# 0x1313151516161716 ....$$$$ 0x1312111312151113 ..$$$$$$ 0x101211111310140F ....$.$. 0x1617101011130F10 $$$..$.. 0x191A18181B181D1A ....$$$$ 0x18161A191A1B1818 $.$$$$$$ 0x1818191B17161515 #$.$$$$. 0x1615161618161717 $$$$$$$$ 0x1611121117141310 #...$$## 0x0F0E0C0D100D100B ####$#$# 0x1211121313151314 $$##$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x1611171514181611 $.$$$$$.
0x171C141515171312 $$$$$$## 0x1617191917161614 .$...$.$ 0x1212141416161716 ....$$$$ 0x1211111312151113 #.$$$$$$ 0x0F111010130F140E ....$.$. 0x1617100F10130E0F $$$.#$#. 0x181917171B181D1A ....$$$$ 0x18151A191A1B1818 $#$$$$$$ 0x1818181B17161514 $$.$$$$. 0x1615161618161717 $$$$$$$$ 0x1610111017141310 $...$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x1610171514181610 $.$$$$$#
0x171C141515171312 $$$$$$$$ 0x1517181816161514 #$...$#$ 0x1111131316161716 ....$$$$ 0x1210111312151113 $.$$$$$$ 0x0E100F0F130E140D #.##$#$# 0x1617100E10130E0E $$$#$$$# 0x171816161B181D1A ....$$$$ 0x18151A191A1B1818 $$$$$$$$ 0x1818171B17161513 $$#$$$$# 0x1615161618161717 $$$$$$$$ 0x160F100F17141310 $.##$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x160F171514181610 $.$$$$$$
0x171C141515171312 $$$$$$$$ 0x1517171715161514 $$###$$$ 0x1010121216161716 ###.$$$$ 0x120F111312151113 $#$$$$$$ 0x0E0F0F0F130E140D $.$$$$$$ 0x1617100E10130E0E $$$$$$$$ 0x161715151B181D1A ..##$$$$ 0x18151A191A1B1818 $$$$$$$$ 0x1818171B17161513 $$$$$$$$ 0x1615161618161717 $$$$$$$$ 0x160E100F17141310 $#$$$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x160E171514181610 $#$$$$$$
0x171C141515171312 $$$$$$$$ 0x1517171715161514 $$$$$$$$ 0x1010121116161716 $$$.$$$$ 0x120F111312151113 $$$$$$$$ 0x0E0E0F0F130E140D $.$$$$$$ 0x1617100E10130E0E $$$$$$$$ 0x151615151B181D1A ..$$$$$$ 0x18151A191A1B1818 $$$$$$$$ 0x1818171B17161513 $$$$$$$$ 0x1615161618161717 $$$$$$$$ 0x160E100F17141310 $$$$$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x160E171514181610 $$$$$$$$
0x171C141515171312 $$$$$$$$ 0x1517171715161514 $$$$$$$$ 0x1010121016161716 $$$.$$$$ 0x120F111312151113 $$$$$$$$ 0x0E0D0F0F130E140D $#$$$$$$ 0x1617100E10130E0E $$$$$$$$ 0x141515151B181D1A ..$$$$$$ 0x18151A191A1B1818 $$$$$$$$ 0x1818171B17161513 $$$$$$$$ 0x1615161618161717 $$$$$$$$ 0x160E100F17141310 $$$$$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x160E171514181610 $$$$$$$$
0x171C141515171312 $$$$$$$$ 0x1517171715161514 $$$$$$$$ 0x1010120F16161716 $$$#$$$$ 0x120F111312151113 $$$$$$$$ 0x0E0D0F0F130E140D $$$$$$$$ 0x1617100E10130E0E $$$$$$$$ 0x131415151B181D1A .#$$$$$$ 0x18151A191A1B1818 $$$$$$$$ 0x1818171B17161513 $$$$$$$$ 0x1615161618161717 $$$$$$$$ 0x160E100F17141310 $$$$$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x160E171514181610 $$$$$$$$
0x171C141515171312 $$$$$$$$ 0x1517171715161514 $$$$$$$$ 0x1010120F16161716 $$$$$$$$ 0x120F111312151113 $$$$$$$$ 0x0E0D0F0F130E140D $$$$$$$$ 0x1617100E10130E0E $$$$$$$$ 0x121415151B181D1A #$$$$$$$ 0x18151A191A1B1818 $$$$$$$$ 0x1818171B17161513 $$$$$$$$ 0x1615161618161717 $$$$$$$$ 0x160E100F17141310 $$$$$$$$ 0x0F0E0C0D100D100B $$$$$$$$ 0x1211121313151314 $$$$$$$$ 0x1917181C16191817 $$$$$$$$ 0x1615191617181717 $$$$$$$$ 0x160E171514181610 $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x1B1D181A18181918 ........ 0x1C1C1F1F1D1B1C19 ........ 0x18181A1A1A171917 ........ 0x1817151714171515 ........ 0x1517161617151714 ........ 0x1916141516161415 ........ 0x1E1F1D1D1C1B1E1D ........ 0x1B1B1D1C1D1A1C1B ........ 0x1D1B1E1F1918191A ........ 0x19181A1A1B181A19 ........ 0x1B16171619151815 ........ 0x141311120F121210 ........ 0x1615171816171718 ........ 0x1A191B1E181B1A1B ........ 0x19181C191A1B1918 ........ 0x1816191817191716 ........
0x1C1E191B19191A19 ........ 0x1D1D20201E1C1D1A ........ 0x19191B1B1B181A18 ........ 0x1918161815181616 ........ 0x1618171718161815 ........ 0x1A17151617171516 ........ 0x1F201E1E1D1C1F1E ........ 0x1C1C1E1D1E1B1D1C ........ 0x1E1C1F201A191A1B ........ 0x1A191B1B1C191B1A ........ 0x1C1718171A161916 ........ 0x1514121310131311 ........ 0x1716181917181819 ........ 0x1B1A1C1F191C1B1C ........ 0x1A191D1A1B1C1A19 ........ 0x19171A19181A1817 ........
0x1D1F1A1C1A1A1B1A ........ 0x1E1E21211F1D1E1B ........ 0x1A1A1C1C1C191B19 ........ 0x1A19171916191717 ........ 0x1719181819171916 ........ 0x1B18161718181617 ........ 0x20211F1F1E1D201F ........ 0x1D1D1F1E1F1C1E1D ........ 0x1F1D20211B1A1B1C ........ 0x1B1A1C1C1D1A1C1B ........ 0x1D1819181B171A17 ........ 0x1615131411141412 ........ 0x1817191A1819191A ........ 0x1C1B1D201A1D1C1D ........ 0x1B1A1E1B1C1D1B1A ........ 0x1A181B1A191B1918 ........
0x1E201B1D1B1B1C1B ........ 0x1F1F2222201E1F1C ........ 0x1B1B1D1D1D1A1C1A ........ 0x1B1A181A171A1818 ........ 0x181A19191A181A17 ........ 0x1C19171819191718 ........ 0x212220201F1E2120 ........ 0x1E1E201F201D1F1E ........ 0x201E21221C1B1C1D ........ 0x1C1B1D1D1E1B1D1C ........ 0x1E191A191C181B18 ........ 0x1716141512151513 ........ 0x19181A1B191A1A1B ........ 0x1D1C1E211B1E1D1E ........ 0x1C1B1F1C1D1E1C1B ........ 0x1B191C1B1A1C1A19 ........
0x1F211C1E1C1C1D1C ........ 0x20202323211F201D ........ 0x1C1C1E1E1E1B1D1B ........ 0x1C1B191B181B1919 ........ 0x191B1A1A1B191B18 ........ 0x1D1A18191A1A1819 ........ 0x22232121201F2221 ........ 0x1F1F2120211E201F ........ 0x211F22231D1C1D1E ........ 0x1D1C1E1E1F1C1E1D ........ 0x1F1A1B1A1D191C19 ........ 0x1817151613161614 ........ 0x1A191B1C1A1B1B1C ........ 0x1E1D1F221C1F1E1F ........ 0x1D1C201D1E1F1D1C ........ 0x1C1A1D1C1B1D1B1A ........
0x20221D1F1D1D1E1D ........ 0x212124242220211E ........ 0x1D1D1F1F1F1C1E1C ........ 0x1D1C1A1C191C1A1A ........ 0x1A1C1B1B1C1A1C19 ........ 0x1E1B191A1B1B191A ........ 0x2324222221202322 ........ 0x20202221221F2120 ........ 0x222023241E1D1E1F ........ 0x1E1D1F1F201D1F1E ........ 0x201B1C1B1E1A1D1A ........ 0x1918161714171715 ........ 0x1B1A1C1D1B1C1C1D ........ 0x1F1E20231D201F20 ........ 0x1E1D211E1F201E1D ........ 0x1D1B1E1D1C1E1C1B ........
0x21231E201E1E1F1E ........ 0x222225252321221F ........ 0x1E1E2020201D1F1D ........ 0x1E1D1B1D1A1D1B1B ........ 0x1B1D1C1C1D1B1D1A ........ 0x1F1C1A1B1C1C1A1B ........ 0x2425232322212423 ........ 0x2121232223202221 ........ 0x232124251F1E1F20 ........ 0x1F1E2020211E201F ........ 0x211C1D1C1F1B1E1B ........ 0x1A19171815181816 ........ 0x1C1B1D1E1C1D1D1E ........ 0x201F21241E212021 ........ 0x1F1E221F20211F1E ........ 0x1E1C1F1E1D1F1D1C ........
0x22241F211F1F201F ........ 0x2323262624222320 ........ 0x1F1F2121211E201E ........ 0x1F1E1C1E1B1E1C1C ........ 0x1C1E1D1D1E1C1E1B ........ 0x201D1B1C1D1D1B1C ........ 0x2526242423222524 ........ 0x2222242324212322 ........ 0x24222526201F2021 ........ 0x201F2121221F2120 ........ 0x221D1E1D201C1F1C ........ 0x1B1A181916191917 ........ 0x1D1C1E1F1D1E1E1F ........ 0x212022251F222122 ........ 0x201F23202122201F ........ 0x1F1D201F1E201E1D ........
0x2325202220202120 ........ 0x2424272725232421 ........ 0x20202222221F211F ........ 0x201F1D1F1C1F1D1D ........ 0x1D1F1E1E1F1D1F1C ........ 0x211E1C1D1E1E1C1D ........ 0x2627252524232625 ........ 0x2323252425222423 ........ 0x2523262721202122 ........ 0x2120222223202221 ........ 0x231E1F1E211D201D ........ 0x1C1B191A171A1A18 ........ 0x1E1D1F201E1F1F20 ........ 0x2221232620232223 ........ 0x2120242122232120 ........ 0x201E21201F211F1E ........
0x2426212321212221 ........ 0x2525282826242522 ........ 0x2121232323202220 ........ 0x21201E201D201E1E ........ 0x1E201F1F201E201D ........ 0x221F1D1E1F1F1D1E ........ 0x2728262625242726 ........ 0x2424262526232524 ........ 0x2624272822212223 ........ 0x2221232324212322 ........ 0x241F201F221E211E ........ 0x1D1C1A1B181B1B19 ........ 0x1F1E20211F202021 ........ 0x2322242721242324 ........ 0x2221252223242221 ........ 0x211F22212022201F ........
0x2527222422222322 ........ 0x2626292927252623 ........ 0x2222242424212321 ........ 0x22211F211E211F1F ........ 0x1F212020211F211E ........ 0x23201E1F20201E1F ........ 0x2829272726252827 ........ 0x2525272627242625 ........ 0x2725282923222324 ........ 0x2322242425222423 ........ 0x25202120231F221F ........ 0x1E1D1B1C191C1C1A ........ 0x201F212220212122 ........ 0x2423252822252425 ........ 0x2322262324252322 ........ 0x2220232221232120 ........
0x2628232523232423 ........ 0x27272A2A28262724 ........ 0x2323252525222422 ........ 0x232220221F222020 ........ 0x202221212220221F ........ 0x24211F2021211F20 ........ 0x292A282827262928 ........ 0x2626282728252726 ........ 0x2826292A24232425 ........ 0x2423252526232524 ........ 0x2621222124202320 ........ 0x1F1E1C1D1A1D1D1B ........ 0x2120222321222223 ........ 0x2524262923262526 ........ 0x2423272425262423 ........ 0x2321242322242221 ........
0x2729242624242524 ........ 0x28282B2B29272825 ........ 0x2424262626232523 ........ 0x2423212320232121 ........ 0x2123222223212320 ........ 0x2522202122222021 ........ 0x2A2B292928272A29 ........ 0x2727292829262827 ........ 0x29272A2B25242526 ........ 0x2524262627242625 ........ 0x2722232225212421 ........ 0x201F1D1E1B1E1E1C ........ 0x2221232422232324 ........ 0x2625272A24272627 ........ 0x2524282526272524 ........ 0x2422252423252322 ........
0x282A252725252625 ........ 0x29292C2C2A282926 ........ 0x2525272727242624 ........ 0x2524222421242222 ........ 0x2224232324222421 ........ 0x2623212223232122 ........ 0x2B2C2A2A29282B2A ........ 0x28282A292A272928 ........ 0x2A282B2C26252627 ........ 0x2625272728252726 ........ 0x2823242326222522 ........ 0x21201E1F1C1F1F1D .....#.. 0x2322242523242425 ........ 0x2726282B25282728 ........ 0x2625292627282625 ........ 0x2523262524262423 ........
0x292B262826262726 ........ 0x2A2A2D2D2B292A27 ........ 0x2626282828252725 ........ 0x2625232522252323 ........ 0x2325242425232522 ........ 0x2724222324242223 ........ 0x2C2D2B2B2A292C2B ........ 0x29292B2A2B282A29 ........ 0x2B292C2D27262728 ........ 0x2726282829262827 ........ 0x2924252427232623 ........ 0x22211F201D1F201E ....#$.. 0x2423252624252526 ........ 0x2827292C26292829 ........ 0x27262A2728292726 ....#... 0x2624272625272524 ........
0x2A2C272927272827 ........ 0x2B2B2E2E2C2A2B28 ........ 0x2727292929262826 ........ 0x2726242623262424 .....#.. 0x2426252526242623 ........ 0x2825232425252324 ........ 0x2D2E2C2C2B2A2D2C ........ 0x2A2A2C2B2C292B2A ........ 0x2C2A2D2E28272829 ........ 0x282729292A272928 ........ 0x2A25262528242724 ........ 0x232220211D1F211F ....$$#. 0x2524262725262627 ........ 0x29282A2D272A292A ........ 0x28272B28282A2827 ##..$### 0x2725282726282625 ........
0x2B2D282A28282928 ........ 0x2C2C2F2F2D2B2C29 ........ 0x28282A2A2A272927 ....#... 0x2827252724262525 ....#$.. 0x2527262627252724 ........ 0x2926242526262425 ........ 0x2E2F2D2D2C2B2E2D ........ 0x2B2B2D2C2D2A2C2B ........ 0x2D2B2E2F2928292A ........ 0x29282A2A2B282A29 ........ 0x2B26272629252825 ........ 0x242321221D1F2120 ..#.$$$# 0x2625272826272728 ........ 0x2A292B2E282B2A2B ........ 0x28272C29282A2827 $$##$$$$ 0x2826292827292726 ........
0x2C2E292B29292A29 ........ 0x2D2D30302E2C2D2A ........ 0x29292B2B2A282A28 ....$... 0x2928262824262626 .#..$$#. 0x2628272728262825 ........ 0x2A27252627272526 ........ 0x2F302E2E2D2C2F2E ........ 0x2C2C2E2D2E2B2D2C ........ 0x2E2C2F302A292A2B ........ 0x2A292B2B2C292B2A ........ 0x2C2728272A262926 ........ 0x252421231D1F2120 ##$.$$$$ 0x2726282927282829 ........ 0x2B2A2C2F292C2B2C ........ 0x28272C29282A2827 $$$$$$$$ 0x29272A29282A2827 ........
0x2D2F2A2C2A2A2B2A ........ 0x2E2E31312F2D2E2B ........ 0x2A2A2C2C2A292B29 ....$... 0x2A28272924262627 .$#.$$$# 0x2729282829272926 .......# 0x2B28262728282627 ........ 0x30312F2F2E2D302F ....#... 0x2D2D2F2E2F2C2E2D ........ 0x2F2D30312B2A2B2C ........ 0x2B2A2C2C2D2A2C2B .#...... 0x2D2829282B272A27 ........ 0x252421241D1F2120 $$$#$$$$ 0x2827292A2829292A ........ 0x2C2B2D302A2D2C2D ........ 0x28272C29282A2827 $$$$$$$$ 0x2A282B2A292B2928 ......#.
0x2E302B2D2B2B2C2B ........ 0x2F2F3232302E2F2C ........ 0x2B2B2D2D2A2A2C2A .#..$##. 0x2B28272A24262627 #$$.$$$$ 0x282A29292A282A26 ##.##.#$ 0x2C29272829292728 ........ 0x313230302E2E3130 ..#.$.#. 0x2E2E302F302D2F2E ........ 0x302E31322C2B2C2D ........ 0x2C2A2D2D2E2B2D2C .$....#. 0x2E292A292C282B28 ........ 0x252421241D1F2120 $$$$$$$$ 0x29282A2B292A2A2B ....##.. 0x2D2C2E312B2E2D2E ........ 0x28272C29282A2827 $$$$$$$$ 0x2B292C2B2A2C2929 ....#.$#
0x2F312C2E2C2C2D2C ........ 0x30303333312F302D ........ 0x2C2B2E2E2A2A2C2B #$##$$$. 0x2B28272B24262627 $$$#$$$$ 0x282A2A292A292A26 $$#$$#$$ 0x2D2A28292A2A2829 ........ 0x323330312E2F3131 ..$#$#$. 0x2F2F3130312E302F ........ 0x312F32332D2C2D2E ........ 0x2D2A2E2E2F2C2D2D #$####$# 0x2F2A2B2A2D292C29 ..#..#.. 0x252421241D1F2120 $$$$$$$$ 0x2A292B2C292A2B2C .##.$$#. 0x2E2D2F322C2F2E2F ........ 0x28272C29282A2827 $$$$$$$$ 0x2C2A2D2C2A2D2929 .##.$.$$
0x30322D2F2D2D2E2D ......#. 0x313134343230312E ........ 0x2C2B2E2E2A2A2C2C $$$$$$$# 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x2E2B292A2B2B292A ........ 0x333430312E2F3132 ..$$$$$. 0x30303231322F3130 ........ 0x323033342E2D2E2F ........ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x302B2B2B2E292D2A ..$##$.. 0x252421241D1F2120 $$$$$$$$ 0x2B292B2D292A2B2D #$$.$$$# 0x2F2E30332D302F30 ........ 0x28272C29282A2827 $$$$$$$$ 0x2D2A2D2D2A2E2929 .$$.$.$$
0x31332E302E2E2E2E ......$. 0x323235353331322F ..#..... 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x2F2C2A2B2C2C2A2B ........ 0x343530312E2F3133 #.$$$$$# 0x3131333233303231 ........ 0x333134352F2E2F30 ........ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x312C2B2B2E292E2B .#$$$$.# 0x252421241D1F2120 $$$$$$$$ 0x2B292B2E292A2B2D $$$.$$$$ 0x302F31342E313031 .#..###. 0x28272C29282A2827 $$$$$$$$ 0x2E2A2D2E2A2F2929 .$$#$#$$
0x32342F312F2F2E2F .#....$# 0x3333353634323330 .#$..... 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x302D2B2C2D2D2B2C ........ 0x343630312E2F3133 $.$$$$$$ 0x3232343334313332 ........ 0x34323536302F3031 ....#... 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B #$$$$$#$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B2F292A2B2D $$$.$$$$ 0x312F32352E313032 #$..$$$. 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 #$$$$$$$
0x3334303230302E2F .$###.$$ 0x3433353735333431 .$$.#.#. 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x312E2C2D2E2E2C2D ...#..#. 0x343730312E2F3133 $#$$$$$$ 0x3333353435323433 ........ 0x3533363730303132 .#..$.## 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$#$$$$ 0x312F33362E313033 $$#.$$$# 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
0x3434303230312E2F .$$$$.$$ 0x3533353835343432 .$$#$#$. 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x322F2D2D2F2F2C2E ..#$.#$. 0x343730312E2F3133 $$$$$$$$ 0x3434363536333534 ........ 0x3633373830313132 #$#.$#$$ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$$$$$$ 0x312F33372E313033 $$$#$$$$ 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
0x3534303230322E2F #$$$$#$$ 0x3633353835343433 #$$$$$$# 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x33302D2D302F2C2F .#$$.$$# 0x343730312E2F3133 $$$$$$$$ 0x3535373637343635 .....#.. 0x3633373930313132 $$$#$$$$ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$$$$$$ 0x312F33372E313033 $$$$$$$$ 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
0x3534303230322E2F $$$$$$$$ 0x3633353835343433 $$$$$$$$ 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x34302D2D312F2C2F #$$$#$$$ 0x343730312E2F3133 $$$$$$$$ 0x3636383738343736 ..#.#$.# 0x3633373930313132 $$$$$$$$ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$$$$$$ 0x312F33372E313033 $$$$$$$$ 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
0x3534303230322E2F $$$$$$$$ 0x3633353835343433 $$$$$$$$ 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x34302D2D312F2C2F $$$$$$$$ 0x343730312E2F3133 $$$$$$$$ 0x3737383838343836 ..$#$$#$ 0x3633373930313132 $$$$$$$$ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$$$$$$ 0x312F33372E313033 $$$$$$$$ 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
0x3534303230322E2F $$$$$$$$ 0x3633353835343433 $$$$$$$$ 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x34302D2D312F2C2F $$$$$$$$ 0x343730312E2F3133 $$$$$$$$ 0x3838383838343836 .#$$$$$$ 0x3633373930313132 $$$$$$$$ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$$$$$$ 0x312F33372E313033 $$$$$$$$ 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
0x3534303230322E2F $$$$$$$$ 0x3633353835343433 $$$$$$$$ 0x2C2B2E2E2A2A2C2C $$$$$$$$ 0x2B28272B24262627 $$$$$$$$ 0x282A2A292A292A26 $$$$$$$$ 0x34302D2D312F2C2F $$$$$$$$ 0x343730312E2F3133 $$$$$$$$ 0x3938383838343836 #$$$$$$$ 0x3633373930313132 $$$$$$$$ 0x2D2A2E2E2F2C2D2D $$$$$$$$ 0x322C2B2B2E292F2B $$$$$$$$ 0x252421241D1F2120 $$$$$$$$ 0x2B292B30292A2B2D $$$$$$$$ 0x312F33372E313033 $$$$$$$$ 0x28272C29282A2827 $$$$$$$$ 0x2F2A2D2E2A2F2929 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 24 52][ 29 51][ 21 47][ 22 49][ 22 47][ 24 49][ 20 45][ 19 46]
Mc0.Ch0.B1: [ 22 53][ 24 50][ 24 52][ 24 55][ 22 52][ 23 51][ 22 51][ 21 50]
Mc0.Ch1.B0: [ 17 43][ 17 42][ 19 45][ 16 45][ 23 41][ 23 41][ 24 43][ 23 43]
Mc0.Ch1.B1: [ 19 42][ 16 39][ 18 38][ 20 42][ 19 35][ 22 37][ 18 37][ 20 38]
Mc0.Ch2.B0: [ 15 39][ 14 41][ 16 41][ 16 40][ 20 41][ 15 40][ 21 41][ 14 37]
Mc0.Ch2.B1: [ 23 51][ 23 47][ 17 44][ 15 44][ 17 48][ 20 46][ 15 43][ 15 46]
Mc0.Ch3.B0: [ 19 51][ 21 54][ 22 47][ 22 48][ 28 45][ 25 46][ 30 48][ 27 50]
Mc0.Ch3.B1: [ 25 56][ 22 55][ 27 55][ 26 55][ 27 55][ 27 51][ 25 55][ 25 53]
Mc1.Ch0.B0: [ 25 53][ 25 50][ 24 54][ 28 56][ 24 47][ 23 48][ 22 48][ 20 49]
Mc1.Ch0.B1: [ 23 44][ 22 41][ 23 45][ 23 45][ 25 46][ 23 43][ 24 44][ 24 44]
Mc1.Ch1.B0: [ 23 49][ 15 43][ 17 42][ 16 42][ 24 45][ 21 40][ 20 46][ 17 42]
Mc1.Ch1.B1: [ 16 36][ 15 35][ 13 32][ 14 35][ 16 28][ 14 30][ 17 32][ 12 31]
Mc1.Ch2.B0: [ 19 42][ 18 40][ 19 42][ 20 47][ 20 40][ 22 41][ 20 42][ 21 44]
Mc1.Ch2.B1: [ 26 48][ 24 46][ 25 50][ 29 54][ 23 45][ 26 48][ 25 47][ 24 50]
Mc1.Ch3.B0: [ 23 39][ 22 38][ 26 43][ 23 40][ 24 39][ 25 41][ 24 39][ 24 38]
Mc1.Ch3.B1: [ 23 46][ 15 41][ 24 44][ 22 45][ 21 41][ 25 46][ 23 40][ 17 40]
Per Bit Offset
Mc0.Ch0.B0: 11 11 10 10 11 13 8 9
Mc0.Ch0.B1: 10 9 7 9 8 10 9 11
Mc0.Ch1.B0: 6 6 6 5 6 9 9 10
Mc0.Ch1.B1: 7 5 7 8 7 7 7 8
Mc0.Ch2.B0: 6 5 7 6 8 7 8 6
Mc0.Ch2.B1: 12 13 11 9 11 11 9 10
Mc0.Ch3.B0: 5 7 6 6 9 9 9 10
Mc0.Ch3.B1: 14 12 12 13 12 13 12 12
Mc1.Ch0.B0: 10 11 9 11 11 12 10 9
Mc1.Ch0.B1: 9 8 8 8 9 9 8 9
Mc1.Ch1.B0: 9 7 7 7 10 10 9 9
Mc1.Ch1.B1: 6 6 6 7 7 4 7 6
Mc1.Ch2.B0: 9 8 8 10 8 9 8 9
Mc1.Ch2.B1: 11 10 11 12 10 10 10 10
Mc1.Ch3.B0: 6 6 7 7 6 6 7 7
Mc1.Ch3.B1: 11 6 9 10 8 11 9 7
START_RxDqsBitDelay
R Mc0.C0.R1.S0.B0 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S0.B1 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S0.B2 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R1.S0.B3 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S0.B4 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S0.B5 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S0.B6 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S0.B7 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S1.B0 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B1 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S1.B2 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B3 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S1.B4 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S1.B5 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S1.B6 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S1.B7 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S2.B0 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S2.B1 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S2.B2 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S2.B3 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S2.B4 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S2.B5 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S2.B6 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R1.S2.B7 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S3.B0 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S3.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S3.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S3.B3 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S3.B4 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S3.B5 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S3.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S3.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S4.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S4.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S4.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S4.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S4.B4 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S4.B5 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S4.B6 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S4.B7 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S5.B0 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S5.B1 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S5.B2 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S5.B3 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S5.B4 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S5.B5 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S5.B6 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S5.B7 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S6.B0 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S6.B1 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S6.B2 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S6.B3 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S6.B4 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S6.B5 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S6.B6 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S6.B7 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B0 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B1 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B2 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B3 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B4 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B5 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B6 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S7.B7 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B0 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B1 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S0.B2 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B3 RxDqsBitDelay: 42 (0x2A)
R Mc1.C1.R1.S0.B4 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S0.B5 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S0.B6 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S0.B7 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S1.B0 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B1 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S1.B2 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B3 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B4 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S1.B5 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S1.B6 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B7 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S2.B0 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S2.B1 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S2.B2 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S2.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S2.B4 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S2.B5 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S2.B6 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S2.B7 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S3.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S3.B1 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S3.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S3.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S3.B4 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S3.B5 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S3.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S3.B7 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S4.B1 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S4.B2 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S4.B3 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S4.B4 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S4.B5 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B6 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S4.B7 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S5.B0 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S5.B1 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S5.B2 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S5.B3 RxDqsBitDelay: 42 (0x2A)
R Mc1.C1.R1.S5.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S5.B5 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S5.B6 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S5.B7 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S6.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B1 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S6.B2 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S6.B3 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S6.B4 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S6.B5 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S6.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S6.B7 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S7.B0 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S7.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S7.B2 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S7.B3 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S7.B4 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S7.B5 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S7.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B7 RxDqsBitDelay: 29 (0x1D)
STOP_RxDqsBitDelay
Calling with EnRxDutyCycle = 1, EnPerBit = 0, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 190 200 190 190 130 130 170 180 170 180 180 180 110 120 180 190 200 210 210 210 190 190 170 170 190 190 180 180 200 210 180 190 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 200 230 190 150 130 210 180 210 180 210 180 150 120 210 190 240 210 250 210 250 190 230 170 210 190 220 180 250 210 220 190
Weighted Center -1 -2 -1 -2 -2 -2 -2 -1 -2 -2 -3 -3 -1 -2 -2 -2
Final Center -15 -17 -8 -15 -13 -14 -7 -14 -17 -16 -16 -14 -14 -14 -18 -16
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 200 230 190 150 130 210 180 200 180 200 180 140 120 210 190 240 210 240 210 220 190 190 170 200 190 210 180 250 210 220 190
Weighted Center -1 -2 -1 -2 -1 -1 -1 -1 -2 -2 -2 -1 -1 -2 -2 -2
Final Center -19 -19 -12 -18 -17 -17 -12 -20 -21 -21 -19 -16 -18 -18 -21 -19
LstSavd Margins 190 190 180 190 130 140 170 180 170 170 170 180 120 130 180 190 190 200 200 210 190 200 170 180 190 200 190 200 210 210 180 180 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 190 230 190 170 140 200 180 230 170 230 180 160 130 230 190 240 200 250 210 240 200 220 180 220 200 220 200 250 210 230 180
Weighted Center -2 -2 -2 -1 -3 -3 -2 -2 -2 -2 -2 -2 -1 -1 -2 -3
Final Center -17 -17 -10 -14 -14 -17 -8 -16 -17 -17 -17 -15 -17 -17 -17 -16
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 190 220 190 160 140 200 180 220 170 220 180 150 130 230 190 220 200 240 210 230 200 190 180 220 200 210 200 240 210 220 180
Weighted Center -2 -2 -1 -1 -3 -2 -1 -2 -1 -2 -2 -1 -1 -1 -2 -2
Final Center -19 -19 -13 -17 -18 -18 -12 -19 -19 -21 -20 -17 -19 -19 -21 -18
MRC task Read Timing Centering 2D After Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD47h
MRC task -- Receive Enable Timing Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
RcvEnDelay
-31 # # # # # # # # # # # # # # # # 0x56ABE_0 0x5D263_0 0x5CF51_0 0x7F0AC_0 0x7904B_0 0x5D3B7_0 0x5D560_0 0x5D378_0
-29 # # # # # # # # # # # # # # # # 0x508E5_0 0x73225_0 0x34FAA_0 0x7B676_0 0x71E4B_0 0x58EA3_0 0x5D552_0 0x61861_0
-27 # # # # . # . . . . # # # # # # 0x4EFBE_0 0xBE6C_0 0x4110_0 0x0_0 0x0_0 0x23D89_0 0x5D4C8_0 0x65D4_0
-25 # # # . . # . . . . # # # # . . 0x42ECA_0 0x1A_0 0x5E_0 0x0_0 0x0_0 0x270_0 0x5A9A3_0 0x0_0
-23 # # . . . . . . . . . . # # . . 0x2AC9E_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x4B1B5_0 0x0_0
-21 . # . . . . . . . . . . . # . . 0x19_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x443B0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 # # . . . . . . . . . . # # . . 0xFD9_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0xC0D_0 0x0_0
25 # # . # . # . . . . # . # # . . 0xAE419_0 0x3_0 0x20_0 0x0_0 0x0_0 0x261_0 0x65FD2_0 0x0_0
27 # # # # # # # . . . # # # # . # 0x1C99EA_0 0x1482_0 0x494F_0 0x8_0 0x0_0 0xA899_0 0x1CC7F0_0 0x1CA_0
29 # # # # # # # # # # # # # # # # 0x1A092F_0 0xE4B47_0 0x1887DD_0 0xFFD_0 0x289_0 0x183B00_0 0x1D70A0_0 0x3196A_0
31 # # # # # # # # # # # # # # # # 0x19C38D_0 0x1A683E_0 0x1AC11A_0 0x91AE_0 0x7A48_0 0x1C7C17_0 0x1A69E3_0 0x17B125_0
Mc0.C0.R0: Left Right Width Center
B0: -21 21 42 0
B1: -19 21 40 1
Mc0.C1.R0: Left Right Width Center
B0: -23 25 48 1
B1: -25 23 48 -1
Mc0.C2.R0: Left Right Width Center
B0: -27 25 52 -1
B1: -23 23 46 0
Mc0.C3.R0: Left Right Width Center
B0: -27 25 52 -1
B1: -27 27 54 0
Mc1.C0.R0: Left Right Width Center
B0: -27 27 54 0
B1: -27 27 54 0
Mc1.C1.R0: Left Right Width Center
B0: -23 23 46 0
B1: -23 25 48 1
Mc1.C2.R0: Left Right Width Center
B0: -21 21 42 0
B1: -19 21 40 1
Mc1.C3.R0: Left Right Width Center
B0: -25 27 52 1
B1: -25 25 50 0
MRC task Receive Enable Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD7Ah
MRC task -- Rank Margin Tool for Even Odd UI Errors -- Started.
Rank Margin Testing for EVEN UI errors: DQ LC = 17, Cmd LC = 17
START_RMT_EVEN
Params: RxDqsDelay TxDqDelay
Mc0.C0.R0: -21 21 -24 24
Mc0.C0.R1: -21 21 -24 25
Mc0.C1.R0: -15 14 -21 21
Mc0.C1.R1: -15 15 -19 21
Mc0.C2.R0: -20 19 -25 25
Mc0.C2.R1: -20 20 -24 25
Mc0.C3.R0: -15 14 -19 20
Mc0.C3.R1: -15 14 -19 21
Mc1.C0.R0: -22 23 -24 26
Mc1.C0.R1: -23 21 -24 25
Mc1.C1.R0: -20 18 -23 24
Mc1.C1.R1: -20 19 -23 24
Mc1.C2.R0: -20 20 -25 25
Mc1.C2.R1: -21 21 -25 25
Mc1.C3.R0: -20 21 -24 24
Mc1.C3.R1: -20 20 -24 24
STOP_RMT
Rank Margin Testing for ODD UI errors: DQ LC = 17, Cmd LC = 17
START_RMT_ODD
Params: RxDqsDelay TxDqDelay
Mc0.C0.R0: -20 21 -24 24
Mc0.C0.R1: -20 21 -24 25
Mc0.C1.R0: -14 14 -20 21
Mc0.C1.R1: -15 15 -19 20
Mc0.C2.R0: -19 19 -25 25
Mc0.C2.R1: -19 20 -24 25
Mc0.C3.R0: -13 14 -18 21
Mc0.C3.R1: -14 14 -18 21
Mc1.C0.R0: -21 23 -24 25
Mc1.C0.R1: -22 21 -23 25
Mc1.C1.R0: -19 18 -22 25
Mc1.C1.R1: -19 19 -22 25
Mc1.C2.R0: -19 20 -24 25
Mc1.C2.R1: -21 21 -25 25
Mc1.C3.R0: -20 21 -24 24
Mc1.C3.R1: -20 20 -23 24
STOP_RMT
MRC task Rank Margin Tool for Even Odd UI Errors -- SUCCEEDED, Status = 0h.
Post Code: DD44h
MRC task -- Rank Margin Tool -- Started.
Rank Margin Testing for Composite UI errors: DQ LC = 17, Cmd LC = 17
START_RMT
Params: RecEnDelay TxDqsDelay RxDqsDelay TxDqDelay RxVref TxVref ClkGrpPi CmdVref
Mc0.C0.R0: -80 76 -31 31 -20 21 -23 24 -40 41 -40 40 -50 49 -35 36
Mc0.C0.R1: -80 76 -31 31 -20 21 -24 25 -38 42 -40 40 -49 49 -37 36
Mc0.C1.R0: -104 96 -31 31 -14 14 -19 20 -41 36 -40 40 -50 49 -40 40
Mc0.C1.R1: -100 100 -31 31 -15 15 -19 20 -41 37 -40 40 -51 49 -40 40
Mc0.C2.R0: -92 96 -31 31 -19 19 -24 25 -41 42 -40 40 -56 52 -40 40
Mc0.C2.R1: -96 96 -31 31 -19 20 -24 25 -43 38 -40 40 -57 52 -40 40
Mc0.C3.R0: -100 108 -31 31 -14 14 -19 21 -36 27 -40 40 -34 41 -28 33
Mc0.C3.R1: -100 108 -31 31 -13 14 -19 20 -37 35 -40 40 -63 41 -40 33
Mc1.C0.R0: -112 108 -31 31 -22 23 -24 24 -45 45 -40 40 -55 54 -40 40
Mc1.C0.R1: -108 112 -31 31 -22 21 -24 25 -46 46 -40 40 -54 55 -40 40
Mc1.C1.R0: -96 92 -31 31 -19 18 -23 23 -36 36 -40 40 -27 47 -35 37
Mc1.C1.R1: -96 92 -31 31 -18 19 -22 24 -36 36 -40 40 -53 45 -35 37
Mc1.C2.R0: -80 80 -31 31 -20 20 -24 25 -33 34 -40 40 -56 53 -37 36
Mc1.C2.R1: -80 80 -31 31 -20 21 -25 25 -35 39 -40 40 -55 53 -36 36
Mc1.C3.R0: -96 104 -31 31 -20 21 -23 24 -45 43 -40 40 -25 42 -40 40
Mc1.C3.R1: -96 100 -31 31 -20 20 -22 24 -45 43 -40 40 -27 41 -40 40
STOP_RMT
MRC task Rank Margin Tool -- SUCCEEDED, Status = 0h.
Post Code: DD49h
MRC task -- PowerSavingMeter update -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MRC task PowerSavingMeter update -- SUCCEEDED, Status = 0h.
Post Code: DD48h
MRC task -- SAGV Finalization -- Started.
Mc0.C0.R0.MR[3] = 0x0030
Mc0.C0.R0.MR[11] = 0x0045
Mc0.C0.R0.MR[12] = 0x004E
Mc0.C0.R0.MR[14] = 0x004A
Mc0.C0.R0.MR[1] = 0x004D
Mc0.C0.R0.MR[2] = 0x0064
Mc0.C0.R0.MR[22] = 0x0013
Mc0.C0.R0.MR[23] = 0x0004
Mc0.C0.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9D2E
Mc0.C0: LPDDR_MR_CONTENT = 0x0413F84E4530644D
Mc0.C0.R1.MR[3] = 0x0030
Mc0.C0.R1.MR[11] = 0x0045
Mc0.C0.R1.MR[12] = 0x004E
Mc0.C0.R1.MR[14] = 0x004A
Mc0.C0.R1.MR[1] = 0x004D
Mc0.C0.R1.MR[2] = 0x0064
Mc0.C0.R1.MR[22] = 0x0033
Mc0.C0.R1.MR[23] = 0x0004
Mc0.C0.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9D2E
Mc0.C1.R0.MR[3] = 0x0030
Mc0.C1.R0.MR[11] = 0x0045
Mc0.C1.R0.MR[12] = 0x004A
Mc0.C1.R0.MR[14] = 0x004A
Mc0.C1.R0.MR[1] = 0x004D
Mc0.C1.R0.MR[2] = 0x0064
Mc0.C1.R0.MR[22] = 0x0013
Mc0.C1.R0.MR[23] = 0x0004
Mc0.C1.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc0.C1.R1.MR[3] = 0x0030
Mc0.C1.R1.MR[11] = 0x0045
Mc0.C1.R1.MR[12] = 0x004A
Mc0.C1.R1.MR[14] = 0x004A
Mc0.C1.R1.MR[1] = 0x004D
Mc0.C1.R1.MR[2] = 0x0064
Mc0.C1.R1.MR[22] = 0x0033
Mc0.C1.R1.MR[23] = 0x0004
Mc0.C1.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc0.C2.R0.MR[3] = 0x0030
Mc0.C2.R0.MR[11] = 0x0045
Mc0.C2.R0.MR[12] = 0x004A
Mc0.C2.R0.MR[14] = 0x004A
Mc0.C2.R0.MR[1] = 0x004D
Mc0.C2.R0.MR[2] = 0x0064
Mc0.C2.R0.MR[22] = 0x0013
Mc0.C2.R0.MR[23] = 0x0004
Mc0.C2.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc0.C2: LPDDR_MR_CONTENT = 0x0413F84A4530644D
Mc0.C2.R1.MR[3] = 0x0030
Mc0.C2.R1.MR[11] = 0x0045
Mc0.C2.R1.MR[12] = 0x004A
Mc0.C2.R1.MR[14] = 0x004A
Mc0.C2.R1.MR[1] = 0x004D
Mc0.C2.R1.MR[2] = 0x0064
Mc0.C2.R1.MR[22] = 0x0033
Mc0.C2.R1.MR[23] = 0x0004
Mc0.C2.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc0.C3.R0.MR[3] = 0x0030
Mc0.C3.R0.MR[11] = 0x0045
Mc0.C3.R0.MR[12] = 0x0051
Mc0.C3.R0.MR[14] = 0x004A
Mc0.C3.R0.MR[1] = 0x004D
Mc0.C3.R0.MR[2] = 0x0064
Mc0.C3.R0.MR[22] = 0x0013
Mc0.C3.R0.MR[23] = 0x0004
Mc0.C3.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CAA32E
Mc0.C3.R1.MR[3] = 0x0030
Mc0.C3.R1.MR[11] = 0x0045
Mc0.C3.R1.MR[12] = 0x0051
Mc0.C3.R1.MR[14] = 0x004A
Mc0.C3.R1.MR[1] = 0x004D
Mc0.C3.R1.MR[2] = 0x0064
Mc0.C3.R1.MR[22] = 0x0033
Mc0.C3.R1.MR[23] = 0x0004
Mc0.C3.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CAA32E
Mc1.C0.R0.MR[3] = 0x0030
Mc1.C0.R0.MR[11] = 0x0045
Mc1.C0.R0.MR[12] = 0x004A
Mc1.C0.R0.MR[14] = 0x004A
Mc1.C0.R0.MR[1] = 0x004D
Mc1.C0.R0.MR[2] = 0x0064
Mc1.C0.R0.MR[22] = 0x0013
Mc1.C0.R0.MR[23] = 0x0004
Mc1.C0.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc1.C0: LPDDR_MR_CONTENT = 0x0413F84A4530644D
Mc1.C0.R1.MR[3] = 0x0030
Mc1.C0.R1.MR[11] = 0x0045
Mc1.C0.R1.MR[12] = 0x004A
Mc1.C0.R1.MR[14] = 0x004A
Mc1.C0.R1.MR[1] = 0x004D
Mc1.C0.R1.MR[2] = 0x0064
Mc1.C0.R1.MR[22] = 0x0033
Mc1.C0.R1.MR[23] = 0x0004
Mc1.C0.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc1.C1.R0.MR[3] = 0x0030
Mc1.C1.R0.MR[11] = 0x0045
Mc1.C1.R0.MR[12] = 0x004D
Mc1.C1.R0.MR[14] = 0x004A
Mc1.C1.R0.MR[1] = 0x004D
Mc1.C1.R0.MR[2] = 0x0064
Mc1.C1.R0.MR[22] = 0x0013
Mc1.C1.R0.MR[23] = 0x0004
Mc1.C1.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9B2E
Mc1.C1.R1.MR[3] = 0x0030
Mc1.C1.R1.MR[11] = 0x0045
Mc1.C1.R1.MR[12] = 0x004D
Mc1.C1.R1.MR[14] = 0x004A
Mc1.C1.R1.MR[1] = 0x004D
Mc1.C1.R1.MR[2] = 0x0064
Mc1.C1.R1.MR[22] = 0x0033
Mc1.C1.R1.MR[23] = 0x0004
Mc1.C1.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9B2E
Mc1.C2.R0.MR[3] = 0x0030
Mc1.C2.R0.MR[11] = 0x0045
Mc1.C2.R0.MR[12] = 0x004E
Mc1.C2.R0.MR[14] = 0x004A
Mc1.C2.R0.MR[1] = 0x004D
Mc1.C2.R0.MR[2] = 0x0064
Mc1.C2.R0.MR[22] = 0x0013
Mc1.C2.R0.MR[23] = 0x0004
Mc1.C2.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9D2E
Mc1.C2: LPDDR_MR_CONTENT = 0x0413F84E4530644D
Mc1.C2.R1.MR[3] = 0x0030
Mc1.C2.R1.MR[11] = 0x0045
Mc1.C2.R1.MR[12] = 0x004E
Mc1.C2.R1.MR[14] = 0x004A
Mc1.C2.R1.MR[1] = 0x004D
Mc1.C2.R1.MR[2] = 0x0064
Mc1.C2.R1.MR[22] = 0x0033
Mc1.C2.R1.MR[23] = 0x0004
Mc1.C2.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9D2E
Mc1.C3.R0.MR[3] = 0x0030
Mc1.C3.R0.MR[11] = 0x0045
Mc1.C3.R0.MR[12] = 0x004A
Mc1.C3.R0.MR[14] = 0x004A
Mc1.C3.R0.MR[1] = 0x004D
Mc1.C3.R0.MR[2] = 0x0064
Mc1.C3.R0.MR[22] = 0x0013
Mc1.C3.R0.MR[23] = 0x0004
Mc1.C3.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc1.C3.R1.MR[3] = 0x0030
Mc1.C3.R1.MR[11] = 0x0045
Mc1.C3.R1.MR[12] = 0x004A
Mc1.C3.R1.MR[14] = 0x004A
Mc1.C3.R1.MR[1] = 0x004D
Mc1.C3.R1.MR[2] = 0x0064
Mc1.C3.R1.MR[22] = 0x0033
Mc1.C3.R1.MR[23] = 0x0004
Mc1.C3.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
MRC task SAGV Finalization -- SUCCEEDED, Status = 0h.
Post Code: DD51h
MRC task -- Row Hammer Prevention -- Started.
MRC task Row Hammer Prevention -- SUCCEEDED, Status = 0h.
Post Code: DD50h
MRC task -- MRC activate -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MC0_PM_PDWN_CONFIG: 0x1000400h
MC1_PM_PDWN_CONFIG: 0x1000400h
MrcIssueMrr on mc 0 ch 0 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 0 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 0 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 0 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 1 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 1 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 1 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 1 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 2 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 2 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 2 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 2 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 3 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 3 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 3 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 3 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 0 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 0 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 0 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 0 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 1 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 1 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 1 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 1 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 2 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 2 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 2 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 2 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 3 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 3 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 3 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 3 rank 1: MR8
Device[0]= 0x18 - x32
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch3
UpdateSampOdtTiming: GuardBand = 10
W Mc0.C0.S0 McOdtDelay: 0
Warning:Mc0.C0.S0 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S0 McOdtDuration: 15 (0xF)
W Mc0.C0.S0 DqsOdtDelay: 0
Warning:Mc0.C0.S0 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S0 DqsOdtDuration: 7
W Mc0.C0.S0 SenseAmpDelay: 0
Warning:Mc0.C0.S0 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S0 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S1 McOdtDelay: 0
Warning:Mc0.C0.S1 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S1 McOdtDuration: 15 (0xF)
W Mc0.C0.S1 DqsOdtDelay: 0
Warning:Mc0.C0.S1 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S1 DqsOdtDuration: 7
W Mc0.C0.S1 SenseAmpDelay: 0
Warning:Mc0.C0.S1 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S1 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S2 McOdtDelay: 0
Warning:Mc0.C0.S2 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S2 McOdtDuration: 15 (0xF)
W Mc0.C0.S2 DqsOdtDelay: 0
Warning:Mc0.C0.S2 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S2 DqsOdtDuration: 7
W Mc0.C0.S2 SenseAmpDelay: 0
Warning:Mc0.C0.S2 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S2 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S3 McOdtDelay: 0
Warning:Mc0.C0.S3 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S3 McOdtDuration: 15 (0xF)
W Mc0.C0.S3 DqsOdtDelay: 0
Warning:Mc0.C0.S3 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S3 DqsOdtDuration: 7
W Mc0.C0.S3 SenseAmpDelay: 0
Warning:Mc0.C0.S3 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S3 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S4 McOdtDelay: 0
Warning:Mc0.C0.S4 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S4 McOdtDuration: 15 (0xF)
W Mc0.C0.S4 DqsOdtDelay: 0
Warning:Mc0.C0.S4 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S4 DqsOdtDuration: 7
W Mc0.C0.S4 SenseAmpDelay: 0
Warning:Mc0.C0.S4 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S4 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S5 McOdtDelay: 0
Warning:Mc0.C0.S5 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S5 McOdtDuration: 15 (0xF)
W Mc0.C0.S5 DqsOdtDelay: 0
Warning:Mc0.C0.S5 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S5 DqsOdtDuration: 7
W Mc0.C0.S5 SenseAmpDelay: 0
Warning:Mc0.C0.S5 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S5 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S6 McOdtDelay: 0
Warning:Mc0.C0.S6 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S6 McOdtDuration: 15 (0xF)
W Mc0.C0.S6 DqsOdtDelay: 0
Warning:Mc0.C0.S6 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S6 DqsOdtDuration: 7
W Mc0.C0.S6 SenseAmpDelay: 0
Warning:Mc0.C0.S6 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S6 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S7 McOdtDelay: 0
Warning:Mc0.C0.S7 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S7 McOdtDuration: 15 (0xF)
W Mc0.C0.S7 DqsOdtDelay: 0
Warning:Mc0.C0.S7 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S7 DqsOdtDuration: 7
W Mc0.C0.S7 SenseAmpDelay: 0
Warning:Mc0.C0.S7 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S7 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S0 McOdtDelay: 0
Warning:Mc1.C1.S0 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S0 McOdtDuration: 15 (0xF)
W Mc1.C1.S0 DqsOdtDelay: 0
Warning:Mc1.C1.S0 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S0 DqsOdtDuration: 7
W Mc1.C1.S0 SenseAmpDelay: 0
Warning:Mc1.C1.S0 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S0 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S1 McOdtDelay: 0
Warning:Mc1.C1.S1 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S1 McOdtDuration: 15 (0xF)
W Mc1.C1.S1 DqsOdtDelay: 0
Warning:Mc1.C1.S1 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S1 DqsOdtDuration: 7
W Mc1.C1.S1 SenseAmpDelay: 0
Warning:Mc1.C1.S1 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S1 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S2 McOdtDelay: 0
Warning:Mc1.C1.S2 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S2 McOdtDuration: 15 (0xF)
W Mc1.C1.S2 DqsOdtDelay: 0
Warning:Mc1.C1.S2 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S2 DqsOdtDuration: 7
W Mc1.C1.S2 SenseAmpDelay: 0
Warning:Mc1.C1.S2 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S2 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S3 McOdtDelay: 0
Warning:Mc1.C1.S3 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S3 McOdtDuration: 15 (0xF)
W Mc1.C1.S3 DqsOdtDelay: 0
Warning:Mc1.C1.S3 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S3 DqsOdtDuration: 7
W Mc1.C1.S3 SenseAmpDelay: 0
Warning:Mc1.C1.S3 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S3 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S4 McOdtDelay: 0
Warning:Mc1.C1.S4 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S4 McOdtDuration: 15 (0xF)
W Mc1.C1.S4 DqsOdtDelay: 0
Warning:Mc1.C1.S4 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S4 DqsOdtDuration: 7
W Mc1.C1.S4 SenseAmpDelay: 0
Warning:Mc1.C1.S4 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S4 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S5 McOdtDelay: 0
Warning:Mc1.C1.S5 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S5 McOdtDuration: 15 (0xF)
W Mc1.C1.S5 DqsOdtDelay: 0
Warning:Mc1.C1.S5 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S5 DqsOdtDuration: 7
W Mc1.C1.S5 SenseAmpDelay: 0
Warning:Mc1.C1.S5 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S5 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S6 McOdtDelay: 0
Warning:Mc1.C1.S6 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S6 McOdtDuration: 15 (0xF)
W Mc1.C1.S6 DqsOdtDelay: 0
Warning:Mc1.C1.S6 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S6 DqsOdtDuration: 7
W Mc1.C1.S6 SenseAmpDelay: 0
Warning:Mc1.C1.S6 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S6 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S7 McOdtDelay: 0
Warning:Mc1.C1.S7 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S7 McOdtDuration: 15 (0xF)
W Mc1.C1.S7 DqsOdtDelay: 0
Warning:Mc1.C1.S7 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S7 DqsOdtDuration: 7
W Mc1.C1.S7 SenseAmpDelay: 0
Warning:Mc1.C1.S7 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S7 SenseAmpDuration: 15 (0xF)
VccDll Bypass!
MRC task MRC activate -- SUCCEEDED, Status = 0h.
Post Code: DD77h
MRC task -- MRC In-band ECC -- Started.
MRC task MRC In-band ECC -- SUCCEEDED, Status = 0h.
Post Code: DD5Ch
MRC task -- MRC Memory Scrubbing -- Started.
MRC task MRC Memory Scrubbing -- SUCCEEDED, Status = 0h.
Post Code: DD42h
MRC task -- Save MC Values -- Started.
SaveDataCommon RegCnt : 0036, TotalRegCnt : 0036,
Controller : 0
SaveDataCommonPerMc RegCnt : 0025, TotalRegCnt : 0061
SaveDataCommonPerCh RegCnt : 0096, TotalRegCnt : 0157
SaveDataCommonPerByte RegCnt : 0008, TotalRegCnt : 0165
Controller : 1
SaveDataCommonPerMc RegCnt : 0025, TotalRegCnt : 0190
SaveDataCommonPerCh RegCnt : 0096, TotalRegCnt : 0286
SaveDataCommonPerByte RegCnt : 0008, TotalRegCnt : 0294
SaveMCValues: Common section: saved 1308 bytes
SaveDataSaGv RegCnt : 0207, TotalRegCnt : 0207
Controller : 0
SaveDataSaGvMc RegCnt : 0182, TotalRegCnt : 0389
Controller : 1
SaveDataSaGvMc RegCnt : 0182, TotalRegCnt : 0571
SaveDataSaGvPerByte RegCnt : 0584, TotalRegCnt : 1155
SaveDataSaGvPerByte RegCnt : 0584, TotalRegCnt : 1739
SaveDataSaGvCcc RegCnt : 0160, TotalRegCnt : 1899
SAGV section: saved 8092 bytes
Saved data CRC = 9A66C127h
MRC task Save MC Values -- SUCCEEDED, Status = 0h.
Post Code: DD71h
MRC task -- Normal Operation -- Started.
CPGC Mode Unlocked
MRC task Normal Operation -- SUCCEEDED, Status = 0h.
Post Code: DD72h
MRC task -- Configure Thermal values -- Started.
Configuring Thermal Controls
PM_SREF_CONFIG 5060h: 10200h
PM_SREF_CONFIG 15060h: 10200h
DDR_PTM_CTL 5880h: 40h
MRC task Configure Thermal values -- SUCCEEDED, Status = 0h.
Post Code: DD61h
MRC task -- MRC Energy Performance Gain -- Started.
MRC task MRC Energy Performance Gain -- SUCCEEDED, Status = 0h.
Post Code: DD5Ah
MRC task -- MRC SA GV Switch -- Started.
Waiting for SAGV 3 point save acknowledge
MRC task MRC SA GV Switch -- SUCCEEDED, Status = 0h.
Post Code: DD60h
MRC task -- TXT Memory alias check -- Started.
TXTPEI::New Alias Check Begin
TXTPEI::New Alias Check End
MRC task TXT Memory alias check -- SUCCEEDED, Status = 0h.
Post Code: DD5Dh
MRC task -- MRC done -- Started.
MrcSetLockPrmrr: 0xFFE3C511
PRMRR size is zero, only Locking PRMRR MASK MSR
MrcTmeInit: 0xFFE37302
Total Memory Encryption (TME) Initialization
TME supports AES-XTS encryption policy
TME is disabled. Skipping TME activation.
TME: Initialize MSR_TME_ACTIVATE
TmeEnable = 0x0
KeySelect = 0x0
SaveKey = 0x0
TmePolicy = 0x0
MSR_TME_ACTIVATE was initialized and locked: 0000000000000001
SetIaGtImrExclusionLock Enter
SetIaGtImrExclusionLock End
Memory map registers are locked
Waiting for mc_init_done Acknowledge
MRC task MRC done -- SUCCEEDED, Status = 0h.
Lowest StackAddr: 0xFEF16888 Top StackAddr: 0xFEF3E790 Depth: 163592
Returned From MrcStartMemoryConfiguration(). MrcStatus = 00000000h
Normal mode memory test started.
Normal mode memory test passed.
ME UMA Size requested: 64 MB
Calling MeConfigDidReg
POSTCODE=<0000DE01> - ME-BIOS: DID Entry.
ME status: 0x80000015
Entered ME DRAM Init Done procedure.
ME Data HOB installed
[HECI1] MeMode 0 (Hfsts1: 80000015)
InitStat: 0
Install PPI: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
Notify: PPI Guid: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87, Peim notify entry point: FFE35F70
PchTraceHubDisable() disable Trace Hub device via PSF
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000008, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
POSTCODE=<0000DB50>
PchTraceHubDisable() Power gate Trace Hub device via PMC
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
PchTraceHubDisable() Locking HSWPGCR1
Sending DID as MKHI message
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80140007
00: F0 01 00 00 00 00 00 77 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI1] Got msg Success: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
HeciSend DRAM Init Done successful. Response:
Pci2Priv Base Low = 0x00000000
Pci2Priv Base High = 0x00000000
Flags = 0x00
BIOS Action = 0x04
ME DRAM Init Done ACK received.
HFS read after DID ACK: 80000015
BiosAction = 4
BIOS continues to POST.
POSTCODE=<0000DE21> - ME-BIOS: DID Exit - Success.
CSE IMR Base Low = 0x77000000
CSE IMR Base High = 0x00000000
MeDramInitDone Complete.
BuildMemoryS3DataHob.
MemoryS3DataHob Base : FEF1E3E4
MemoryS3DataHob Size : FAA7
BuildMemoryInfoDataHob.
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
BuildMemoryPlatformDataHob.
Install EFI memory.
2LM TwoLmPreMemConfig is not found
Required memory size = 0x3B0000 bytes
Found 00000000000A0000h bytes at 0000000000000000h
Found 0000000000060000h bytes at 00000000000A0000h
Found 0000000076F00000h bytes at 0000000000100000h
Found 0000000004000000h bytes at 0000000077000000h
Found 0000000000800000h bytes at 000000007B000000h
Found 0000000000800000h bytes at 000000007B800000h
Found 0000000003C00000h bytes at 000000007C000000h
Found 0000000000060000h bytes at 00000000FED20000h
Base memory test started.
PeiInstallPeiMemory MemoryBegin 0x76C50000, MemoryLength 0x3B0000
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 76C50000h, PeiMemoryLength = 3B0000h
FSP_RESERVED_MEMORY_RESOURCE_HOB
FspReservedMemoryResource Base : 76C50000
FspReservedMemoryResource Size : 3B0000
Base memory test started.
Base memory test started.
TSeg base is 7B000000h
TSeg SMRAM size is 800000h
Found 0x0000000780400000 bytes at 0x0000000100000000
Providing I/O space resource from 0x2000 to 0xE000
Providing PCI space from 0x7FC00000 to 0xBFFFFFFF
BuildHobUsageDataHob.
MemoryInit Complete.
Post Code: 0055h
Install PPI: 0FF07255-67C2-456D-9A95-C9162C23868D
Installed gMrcMemoryInitDonePpi
SiInitPreMemOnPolicy() - End
Temp Stack : BaseAddress=0xFEF3EFD0 Length=0x0
Temp Heap : BaseAddress=0xFEF4FF00 Length=0x50000
Total temporary memory: 327680 bytes.
temporary memory stack ever used: 0 bytes.
temporary memory heap used for HobList: 92496 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x0000000B 0xFC800000 - 0xFE7FFFFF
Memory Allocation 0x0000000B 0xFED00000 - 0xFED00FFF
Memory Allocation 0x0000000B 0xFB000000 - 0xFBFFFFFF
Old Stack size 0, New stack size 262144
Stack Hob: BaseAddress=0x76C50000 Length=0x40000
Heap Offset = 0x882BFF00 Stack Offset = 0x882AEFD0
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x00076FED188 EntryPoint=0x00076FED406 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: FFEE289C
Memory Discovered Notify invoked ...
Migrate FSP-M UPD from FEF3F000 to 76FEC000
FspMemoryInitApi() - End
POSTCODE=<0000D87F>
Success
Loader global data @ 0x76C0FD50
Memory Tolum @ 0x7FC00000
Memory Touum @ 0x880400000
Memory Tom @ 0x800000000
Switch to memory stack @ 0x76C4FF00
Stage1 stack: 0x40000 (0x2A948 used)
Stage1 heap: 0x10000 (0x4360 used, 0x5274 max used)
Call FspTempRamExit ... POSTCODE=<0000B800>
McBank End Index 0x13
MicrocodeRegionBase : 0xFFC15000
MicrocodeRegionSize : 0x00038000
CodeRegionBase : 0xFFD00000
CodeRegionSize : 0x00300000
Memory Length (Below 4GB) = 7B000000.
Memory Length (Above 4GB) = 780400000.
MTRR programming:
MSR_IA32_MTRR_FIX64K_00000 Msr 250 = 0606060606060606
MSR_IA32_MTRR_FIX16K_80000 Msr 258 = 0606060606060606
MSR_IA32_MTRR_FIX16K_A0000 Msr 259 = 0000000000000000
MSR_IA32_MTRR_FIX4K_C0000 Msr 268 = 0505050505050505
MSR_IA32_MTRR_FIX4K_C8000 Msr 269 = 0505050505050505
MSR_IA32_MTRR_FIX4K_D0000 Msr 26A = 0505050505050505
MSR_IA32_MTRR_FIX4K_D8000 Msr 26B = 0505050505050505
MSR_IA32_MTRR_FIX4K_E0000 Msr 26C = 0505050505050505
MSR_IA32_MTRR_FIX4K_E8000 Msr 26D = 0505050505050505
MSR_IA32_MTRR_FIX4K_F0000 Msr 26E = 0505050505050505
MSR_IA32_MTRR_FIX4K_F8000 Msr 26F = 0505050505050505
MSR_IA32_MTRR_PHYSBASE0 Msr 200 = 00000000FF000005
MSR_IA32_MTRR_PHYSMASK0 Msr 201 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE1 Msr 202 = 0000000000000006
MSR_IA32_MTRR_PHYSMASK1 Msr 203 = 0000007F80000800
MSR_IA32_MTRR_PHYSBASE2 Msr 204 = 000000007B000000
MSR_IA32_MTRR_PHYSMASK2 Msr 205 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE3 Msr 206 = 000000007C000000
MSR_IA32_MTRR_PHYSMASK3 Msr 207 = 0000007FFC000800
MSR_IA32_MTRR_PHYSBASE4 Msr 208 = 0000000100000006
MSR_IA32_MTRR_PHYSMASK4 Msr 209 = 0000007F00000800
MSR_IA32_MTRR_PHYSBASE5 Msr 20A = 0000000200000006
MSR_IA32_MTRR_PHYSMASK5 Msr 20B = 0000007E00000800
MSR_IA32_MTRR_PHYSBASE6 Msr 20C = 0000000400000006
MSR_IA32_MTRR_PHYSMASK6 Msr 20D = 0000007C00000800
MSR_IA32_MTRR_PHYSBASE7 Msr 20E = 0000000800000006
MSR_IA32_MTRR_PHYSMASK7 Msr 20F = 0000007800000800
MSR_IA32_MTRR_PHYSBASE8 Msr 210 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK8 Msr 211 = 0000000000000000
MSR_IA32_MTRR_PHYSBASE9 Msr 212 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK9 Msr 213 = 0000000000000000
TempRamExitApi() - End
POSTCODE=<0000B87F>
Success
Memory FSP @ 0x76C50000
Memory TOP @ 0x76750000
Loading Component FLMP:SG02
HASH verification for usage (0x00000002) with Hash Alg (0x2): Success
Loaded STAGE2 @ 0x76A03000
============= Intel Slim Bootloader STAGE2 =============
PCH gen (0x5), series (0x2), stepping (0x10)
LPC DeviceId (0xA088)
Boot-time Pch Dts: 0x168
GPIO PAD: 0x0902000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0900000B DATA: 0x0150A383 0x00002001
GPIO PAD: 0x0900000C DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0900000D DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000016 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x090B0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0006 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0007 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0011 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0908000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0000 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000E DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0001 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0003 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070006 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070011 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x09070012 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09030000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030001 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030002 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09030003 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020000 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020001 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020002 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020003 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020004 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020005 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020006 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000A DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000E DATA: 0x03302385 0x00002001
GPIO PAD: 0x09020010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020012 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020013 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000009 DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000A DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000E DATA: 0x0350A285 0x00002001
GPIO PAD: 0x0900000F DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000010 DATA: 0x0550A281 0x00002019
GPIO PAD: 0x09000011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000012 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09000013 DATA: 0x033002E1 0x00002001
GPIO PAD: 0x09000014 DATA: 0x033022E1 0x00002001
GPIO PAD: 0x09000015 DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000017 DATA: 0x0350A287 0x00002001
GPIO PAD: 0x090B0002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0005 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0008 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B0009 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000A DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000B DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0013 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0016 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0017 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09080000 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080001 DATA: 0x0550A381 0x00002019
GPIO PAD: 0x09080002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080003 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080009 DATA: 0x03302385 0x0000201F
GPIO PAD: 0x0908000A DATA: 0x03302285 0x0000201F
GPIO PAD: 0x0908000B DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x0908000C DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09080010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080011 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x09080012 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090E0001 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0002 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0006 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090E0007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0009 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000A DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000B DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000C DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000D DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000F DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0010 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x090E0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0012 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0013 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0014 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0015 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0016 DATA: 0x0350A385 0x00002009
GPIO PAD: 0x090E0017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x090C0007 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C000A DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0013 DATA: 0x03306581 0x00002001
GPIO PAD: 0x090C0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070000 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070001 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070005 DATA: 0x0550A583 0x00002001
GPIO PAD: 0x0907000A DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09060000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060004 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060006 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060007 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09050000 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050001 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050002 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050003 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050004 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050005 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050006 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050007 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050008 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x09050009 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x0905000A DATA: 0x0150A283 0x00002001
GPIO PAD: 0x0905000B DATA: 0x0150A283 0x00002001
Variable region: 0xFF60E000:0x2000
SaveNvsData Length=0xFAA8
bios range (0x1530000 : 0xAD0000)
MRC data successfully saved to 0x120000
Save MRC Training Data (0x76C96120 0x00FAA8) ... Success
Silicon Init
PchLp is detected
BIOS SPI region will be protected
IAS SPI region will be protected
Load Silicon Cfg Data
Call FspSiliconInit ...
POSTCODE=<00009800>
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFDF8A7B
The 1th FV start address is 0x00076B78000, size is 0x0008B000, handle is 0x76B78000
Memory Discovered Notify completed ...
DiscoverPeimsAndOrderWithApriori(): Found 0xC PEI FFS files in the 1th FV
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x00076FE7198 EntryPoint=0x00076FE74A6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
Loading PEIM 299D6F8B-2EC9-4E40-9EC6-DDAA7EBF5FD9
Loading PEIM at 0x00076F01000 EntryPoint=0x00076F014D4 SiInitFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
Register PPI Notify: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Install PPI: F69ABF86-4048-44EF-A8EF-6C7F204AC8DA
Loading PEIM 131B73AC-C033-4DE1-8794-6DAB08E731CF
Loading PEIM at 0x00076EC7000 EntryPoint=0x00076EC7659 FspInit.efi
Dumping FSPS_UPD - Size: 0x00000EE0
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x53 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000030: 0x1C 0xB9 0xA5 0x76 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000050: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01
0x00000060: 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000070: 0x50 0x66 0xA2 0x76 0x34 0x0B 0x0A 0x0B 0x0B 0x0B 0x0B 0x0B 0x0B 0x0E 0x09 0x09
0x00000080: 0x00 0x06 0x00 0x00 0x50 0x20 0xA0 0x76 0x00 0x01 0x00 0x00 0x01 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000000A0: 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000000B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000000C0: 0x00 0x00 0x00 0x04 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xC2 0x01 0x00
0x000000D0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00
0x000000E0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x08
0x000000F0: 0x08 0x08 0x08 0x08 0x08 0x08 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x02 0x02 0x02
0x00000100: 0x02 0x02 0x02 0x02 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00 0x01 0x01
0x00000110: 0x00 0x00 0x00 0x00 0x0A 0x22 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000120: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x0B 0x32 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x02 0x0B 0x19
0x00000150: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x12 0x0B 0x19 0x00 0x00 0x00 0x00
0x00000170: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00
0x00000190: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000260: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x00 0x00 0x00 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06
0x000002A0: 0x06 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03
0x000002C0: 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000300: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000310: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000320: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x03
0x00000330: 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x03
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000360: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000370: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000380: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000390: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000003A0: 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x000003B0: 0xA4 0x01 0x64 0x00 0x00 0x00 0xA4 0x01 0xC8 0x00 0xA4 0x01 0xC8 0x0C 0x36 0x2B
0x000003C0: 0x96 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003D0: 0x00 0x00 0x00 0x00 0x01 0x01 0xF4 0x01 0xF4 0x01 0xF4 0x01 0x01 0x00 0x00 0x00
0x000003E0: 0x00 0x00 0x00 0xF8 0xFF 0xFF 0xFF 0xF9 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x000003F0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000400: 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000410: 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000420: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000430: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000440: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000450: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00
0x00000460: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000470: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000480: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x01
0x00000490: 0xFF 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x03 0xFF 0xFF 0xFF 0xFF 0x01 0x01 0x00 0x0A
0x000004C0: 0x00 0x32 0x0A 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004D0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x0F 0x01 0x01 0x01 0x01 0xF4 0x01 0x88 0x13
0x000004E0: 0x01 0x00 0xFF 0x97 0xFF 0x97 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x000004F0: 0x01 0x01 0x01 0x02 0x02 0x02 0x02 0x00 0xC8 0x00 0xC8 0x00 0x3C 0x00 0xC8 0x00
0x00000500: 0x01 0x01 0x01 0x01 0x02 0x02 0x02 0x02 0xC8 0x00 0xC8 0x00 0xC8 0x00 0xC8 0x00
0x00000510: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000520: 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000530: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00
0x00000540: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000550: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000560: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000570: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x50 0x00 0x50 0x00 0x50 0x00 0x50 0x00
0x00000580: 0x50 0x00 0x14 0x00 0x14 0x00 0x14 0x00 0x14 0x00 0x14 0x00 0x04 0x00 0x04 0x00
0x00000590: 0x04 0x00 0x04 0x00 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00
0x000005B0: 0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005C0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005F0: 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0F 0x16 0xFF 0x1F
0x00000600: 0x00 0x00 0x00 0x00 0x00 0x00 0x30 0x15 0x50 0x16 0x00 0x00 0x00 0x00 0x00 0x00
0x00000610: 0x00 0x02 0x00 0x00 0x00 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000620: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00
0x00000630: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000640: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000650: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00
0x00000660: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000670: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000680: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000690: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000700: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000710: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000720: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000730: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000740: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000750: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000760: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x08 0x00
0x00000770: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000780: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x02 0x03
0x00000790: 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13
0x000007A0: 0x14 0x15 0x16 0x17 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04
0x000007D0: 0x04 0x04 0x04 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x02
0x000007E0: 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x01 0x01 0x01 0x01
0x000007F0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000800: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000810: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000820: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000830: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000840: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x00 0x01
0x00000850: 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x03 0x01 0x04 0x04 0x00 0x00 0x01 0x00 0x00
0x00000860: 0x00 0x01 0x01 0x00 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000870: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000880: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000890: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x000008C0: 0x01 0x00 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x64 0x64 0x64 0x00
0x000008D0: 0x00 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008E0: 0x00 0x00 0x00 0x01 0x01 0x00 0x01 0x03 0x02 0x01 0x00 0x01 0x02 0x03 0x00 0x01
0x000008F0: 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000900: 0x73 0x00 0x00 0xFF 0xFF 0x00 0x00 0x03 0x03 0x00 0x03 0x03 0x05 0x05 0x06 0x06
0x00000910: 0x07 0x07 0x00 0x00 0xFF 0xFF 0x02 0x02 0x03 0x03 0x04 0x04 0x00 0x00 0x00 0x00
0x00000920: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000930: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000940: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000950: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00
0x00000960: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
0x00000970: 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x27 0x8F 0xA4 0x5F 0x8D 0xFD 0x3D 0x55
0x00000980: 0xC1 0xFD 0x4B 0xBE 0xB9 0x67 0x67 0xD7 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000990: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000009A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x04 0x01 0x01 0x01 0x00 0x06
0x000009B0: 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06
0x000009C0: 0x06 0x06 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02
0x000009D0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x000009E0: 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000009F0: 0x04 0x07 0x09 0x00 0x01 0x05 0x08 0x00 0x00 0x00 0x04 0x07 0x09 0x00 0x01 0x05
0x00000A00: 0x08 0x00 0x00 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A10: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A20: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A30: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A40: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A50: 0x07 0x07 0x07 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000A60: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000A70: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x01 0x01 0x01 0x00 0x01
0x00000A80: 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000A90: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000AA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000AB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000AC0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000AD0: 0x01 0x01 0x01 0x01 0x00 0x01 0x02 0x03 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000AE0: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00
0x00000AF0: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000B00: 0x00 0x00 0x00 0x00 0x00 0x00 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C
0x00000B10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C
0x00000B20: 0x4C 0x4C 0x4C 0x4C 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x4C 0x4C
0x00000B30: 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000B40: 0x00 0x00 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x00 0x02 0x01 0x01
0x00000B50: 0x00 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000B60: 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x01 0x00 0x00 0x00 0x00
0x00000B70: 0x00 0x0A 0x01 0x00 0x00 0x00 0x14 0x00 0x00 0x14 0x00 0x00 0x14 0x00 0x00 0x00
0x00000B80: 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x02 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01
0x00000B90: 0x01 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x08 0x02 0x02 0x02
0x00000BA0: 0x02 0x02 0x02 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BD0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BE0: 0xAC 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BF0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C00: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C20: 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x01
0x00000C30: 0x00 0x01 0x01 0x00 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C50: 0x00 0x00 0x00 0x00 0x02 0x00 0x01 0x01 0x00 0x00 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C60: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C70: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C90: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000CA0: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000CB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CC0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CD0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CE0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000CF0: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D00: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D10: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D20: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D30: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D40: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D50: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D60: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D70: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D90: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0xFF 0x00 0x00 0x03 0x10 0x0F 0x10 0x0F 0x10
0x00000DD0: 0x0F 0x10 0x03 0x10 0x0F 0x10 0x0F 0x10 0x0F 0x10 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DE0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DF0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000E00: 0x07 0x07 0x08 0x08 0x08 0x08 0x09 0x09 0x09 0x09 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E20: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E30: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E50: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E60: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E70: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E80: 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000E90: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0xA0 0x00 0x00 0x00 0xA2 0x00 0x00 0x00 0xA4
0x00000EA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EB0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000ED0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Updating UPDs consumed in FspSiliconInitApi...
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x504
TotalBlockSize after adding Block[0x2]= 0x530
TotalBlockSize after adding Block[0x3]= 0x55C
TotalBlockSize after adding Block[0x4]= 0x588
TotalBlockSize after adding Block[0x5]= 0x5CC
TotalBlockSize after adding Block[0x6]= 0x5EC
TotalBlockSize after adding Block[0x7]= 0x610
TotalBlockSize after adding Block[0x8]= 0x638
TotalBlockSize after adding Block[0x9]= 0x678
TotalBlockSize after adding Block[0x0]= 0x24
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x0]= 0x1C
TotalBlockSize after adding Block[0x0]= 0x30
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xCC
TotalBlockSize after adding Block[0x3]= 0x144
TotalBlockSize after adding Block[0x4]= 0x16C
TotalBlockSize after adding Block[0x5]= 0x19C
TotalBlockSize after adding Block[0x6]= 0x220
TotalBlockSize after adding Block[0x7]= 0x274
TotalBlockSize after adding Block[0x0]= 0x38
TotalBlockSize after adding Block[0x0]= 0x224
TotalBlockSize after adding Block[0x1]= 0x248
TotalBlockSize after adding Block[0x0]= 0x4C
TotalBlockSize after adding Block[0x0]= 0x98
TotalBlockSize after adding Block[0x1]= 0xF4
TotalBlockSize after adding Block[0x2]= 0x1D8
TotalBlockSize = 0x1998
gSiConfigGuid = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Header.HobLength = 0x34
PCH AddConfigBlocks
PchGeneralConfig->Header.GuidHob.Name = 6ED94C8C-25F7-4686-B246-CA4DE2954B5D
PchGeneralConfig->Header.GuidHob.Header.HobLength = 0x20
PchPcieConfig->Header.GuidHob.Name = 0A53B507-988B-475C-BF76-33DE106D9484
PchPcieConfig->Header.GuidHob.Header.HobLength = 0x4E4
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
FlashProtectionConfig->Header.GuidHob.Name = D0F71512-9E32-4CC9-A5A3-AD679A0667B8
FlashProtectionConfig->Header.GuidHob.Header.HobLength = 0x44
LockDownConfig->Header.GuidHob.Name = 8A838E0A-A639-46F0-A9CE-70C485FBA80D
LockDownConfig->Header.GuidHob.Header.HobLength = 0x20
HsioConfig->Header.GuidHob.Name = E53EBEE7-103D-4A71-9B6A-74EE5F4C8DF5
HsioConfig->Header.GuidHob.Header.HobLength = 0x24
AdrConfig->Header.GuidHob.Name = 5B36A07C-3BBF-4D53-8A2D-E1CF97390C65
AdrConfig->Header.GuidHob.Header.HobLength = 0x28
FivrConfig->Header.GuidHob.Name = 68EE8BD4-05F2-4656-AEE4-AD10C722C34F
FivrConfig->Header.GuidHob.Header.HobLength = 0x40
AMT AddConfigBlocks
ME AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x1
MiscPeiConfig->Header.GuidHob.Name = 01DEF8E6-E998-4E27-8998-9CFAB292BC50
MiscPeiConfig->Header.GuidHob.Header.HobLength = 0x1C
CPU Post-Mem Entry
POSTCODE=<00009C00>
CpuConfig->Header.GuidHob.Name = 48C3AAC9-D66C-42E4-9B1D-39045F465341
CpuConfig->Header.GuidHob.Header.HobLength = 0x30
BiosGuardConfig->Header.GuidHob.Name = 762F9DDB-1C89-4612-846B-EEDC8F622545
BiosGuardConfig->Header.GuidHob.Header.HobLength = 0x58
CpuPowerMgmtBasicConfig->Header.GuidHob.Name = A021E31D-7C14-47DA-B5EC-CABB4D76EDC8
CpuPowerMgmtBasicConfig->Header.GuidHob.Header.HobLength = 0x44
CpuPowerMgmtCustomConfig->Header.GuidHob.Name = 562FA1C8-55EE-4E2F-91CA-8D8450032F0E
CpuPowerMgmtCustomConfig->Header.GuidHob.Header.HobLength = 0x78
CpuPowerMgmtPsysConfig->Header.GuidHob.Name = 04E7F850-19B5-47BA-9D28-B1E75E1F4853
CpuPowerMgmtPsysConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTestConfig->Header.GuidHob.Name = D4DBA957-0D9C-4AF2-9D40-35A844E493AD
CpuTestConfig->Header.GuidHob.Header.HobLength = 0x30
CpuPidTestConfig->Header.GuidHob.Name = 2511095F-D49E-4537-A660-887131D153DA
CpuPidTestConfig->Header.GuidHob.Header.HobLength = 0x84
CpuPowerMgmtTestConfig->Header.GuidHob.Name = 5161ED3D-90BF-436F-B833-D71789B348C1
CpuPowerMgmtTestConfig->Header.GuidHob.Header.HobLength = 0x54
FuSA supported sku detected
CpuAddConfigBlocks Done
POSTCODE=<00009C09>
TBT AddConfigBlocks. TotalBlockCount = 0x1
ITbtPeiConfig->Header.GuidHob.Name = D7E7E1E6-CBEC-4F5F-AED3-FDC0A8B07E25
ITbtPeiConfig->Header.GuidHob.Header.HobLength = 0x38
RtcConfig->Header.GuidHob.Name = 0E9259B8-3DDE-40C7-AA5F-94829A868FAF
RtcConfig->Header.GuidHob.Header.HobLength = 0x20
ThermalConfig->Header.GuidHob.Name = 4416506D-1197-4722-A5B4-4611F9239EAE
ThermalConfig->Header.GuidHob.Header.HobLength = 0x40
CnviConfig->Header.GuidHob.Name = E53EBEF7-103D-4A70-9B6A-73EE5F4C8DF5
CnviConfig->Header.GuidHob.Header.HobLength = 0x28
EspiConfig->Header.GuidHob.Name = 60FBF3B8-96D4-4187-849E-AAF75C4BE1E3
EspiConfig->Header.GuidHob.Header.HobLength = 0x20
GbeConfig->Header.GuidHob.Name = 4B2DE99E-7517-4D04-8C02-F11A592B142F
GbeConfig->Header.GuidHob.Header.HobLength = 0x20
TsnConfig->Header.GuidHob.Name = 9E9A93CB-0F4E-4E56-902D-6C76DE90F771
TsnConfig->Header.GuidHob.Header.HobLength = 0x30
HdaConfig->Header.GuidHob.Name = 7EB3CE7E-82E0-4CD7-BDE5-B2BF4E91C34C
HdaConfig->Header.GuidHob.Header.HobLength = 0x28
IehConfig->Header.GuidHob.Name = 42C4D7F3-981D-4475-A2AE-ADCDD5CE871E
IehConfig->Header.GuidHob.Header.HobLength = 0x20
IshConfig->Header.GuidHob.Name = 433AE2AA-C5A6-46ED-9419-1E5DB81C5740
IshConfig->Header.GuidHob.Header.HobLength = 0x128
InterruptConfig->Header.GuidHob.Name = 09A2B815-BE29-45EF-BFBF-58EAAC5E2978
InterruptConfig->Header.GuidHob.Header.HobLength = 0x224
IoApicConfig->Header.GuidHob.Name = 2873D0F1-00F6-40AB-AC36-9A68BA873E6C
IoApicConfig->Header.GuidHob.Header.HobLength = 0x24
P2sbConfig->Header.GuidHob.Name = 2474DCB8-4BB4-49DA-8783-7CD3D385FF07
P2sbConfig->Header.GuidHob.Header.HobLength = 0x20
PchDmiConfig->Header.GuidHob.Name = B3A61210-1CD3-4797-8EE6-D3429C4F17BD
PchDmiConfig->Header.GuidHob.Header.HobLength = 0x20
PmConfig->Header.GuidHob.Name = 93826157-DC85-4E34-AED9-6EA10DF9E3A7
PmConfig->Header.GuidHob.Header.HobLength = 0x44
SataConfig->Header.GuidHob.Name = F5F87B4F-CC3C-408D-89E3-61C59C5407C4
SataConfig->Header.GuidHob.Header.HobLength = 0x4C
UsbConfig->Header.GuidHob.Name = B2DA9CCD-6A8C-4BB6-B3E6-CDFBB7668BDE
UsbConfig->Header.GuidHob.Header.HobLength = 0x98
Usb2PhyConfig->Header.GuidHob.Name = 576C1134-2E0C-CB7D-CD3F-AC682DAED3F2
Usb2PhyConfig->Header.GuidHob.Header.HobLength = 0x5C
Usb3HsioConfig->Header.GuidHob.Name = F8AFC238-F176-12CE-BEF4-69F9B1AC40D5
Usb3HsioConfig->Header.GuidHob.Header.HobLength = 0xE4
ThcConfig->Header.GuidHob.Name = 1B318AD1-AA0D-4764-99FD-BB2BF47F7ED6
ThcConfig->Header.GuidHob.Header.HobLength = 0x2C
PsfConfig->Header.GuidHob.Name = 49B12CF6-0A56-4B9F-A84C-F57D21238C77
PsfConfig->Header.GuidHob.Header.HobLength = 0x20
FusaConfig->Header.GuidHob.Name = F9225896-A9C8-4543-BA9E-5332D7BF8C2B
FusaConfig->Header.GuidHob.Header.HobLength = 0x20
GtConfig->Header.GuidHob.Name = 04249AC0-0088-439F-A74E-A7042A062F5D
GtConfig->Header.GuidHob.Header.HobLength = 0x48
TcssConfig->Header.GuidHob.Name = FB631590-79C9-4F0D-A996-EEE29866FAFD
TcssConfig->Header.GuidHob.Header.HobLength = 0x178
GnaConfig->Header.GuidHob.Name = 53E0EF18-B8A8-4795-A66D-E4772CC3AE82
GnaConfig->Header.GuidHob.Header.HobLength = 0x20
VmdConfig->Header.GuidHob.Name = 79B52C74-B9BA-4F36-A240-F2410D20848A
VmdConfig->Header.GuidHob.Header.HobLength = 0xB8
CpuPcieRpConfig->Header.GuidHob.Name = 9749A5FB-9130-44F0-8F61-DBFF8EF2CAC7
CpuPcieRpConfig->Header.GuidHob.Header.HobLength = 0x260
TelemetryConfig->Header.GuidHob.Name = 8EBF9FEE-7496-42B4-A6F6-CF2B339930D6
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
SerialIoConfig->Header.GuidHob.Name = 6CC06EBF-0D34-4340-BC16-DA09E5783ADB
SerialIoConfig->Header.GuidHob.Header.HobLength = 0x17C
CpuPowerMgmtVrConfig->Header.GuidHob.Name = 254766C9-929D-4EAC-9EEC-DFA20244B5EA
CpuPowerMgmtVrConfig->Header.GuidHob.Header.HobLength = 0xDC
HybridStorage AddConfigBlocks
HybridStorageConfig->Header.GuidHob.Name = 265CE069-D8CF-48BE-AE12-024C2512FAF8
HybridStorageConfig->Header.GuidHob.Header.HobLength = 0x20
HostBridgePeiConfig->Header.GuidHob.Name = 3B6D998E-8B6E-4F53-BE41-074195538AAF
HostBridgePeiConfig->Header.GuidHob.Header.HobLength = 0x20
TccConfig->Header.GuidHob.Name = AE3E7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x44
SpiConfig->Header.GuidHob.Name = 150360EF-99BE-4E43-94BB-BD4026CA3457
SpiConfig->Header.GuidHob.Header.HobLength = 0x28
Install PPI: AEBFFA01-7EDC-49FF-8D88-CB848C5E8670
FSP UpdatePeiPchPolicy
Searching for microcode updates in region passed in TempRamInit API MicrocodeRegionBase = 0xFFC15000, MicrocodeRegionSize = 0x38000.
Microcode update found at 0xFFC15000
FuSA supported sku detected
FSP UpdatePeiMePolicy
FSP UpdatePeiSaPolicy
GtConfig->GraphicsConfigPtr from FSP UpdatePeiSaPolicy: 0x76A5B91C
GtConfig->LogoPtr: 0x0
GtConfig->LogoSize: 0x0
GtConfig->LogoPixelHeight: 0x0
GtConfig->LogoPixelWidth: 0x0
FSP UpdatePeiAmtPolicy
FSP FspUpdatePeiTbtPolicy
MaxLogicProcessors = 8
Install PPI: 1A266768-FD43-4E18-A88A-35C794C3910E
Register PPI Notify: EE16160A-E8BE-47A6-820A-C6900DB0250A
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Mono Status Code PEIM Loaded
SI PEI Policy Initialization Done in Post-Memory
PROGRESS CODE: V03020003 I0
Loading PEIM EDADEB9D-DDBA-48BD-9D22-C1C169C8C5C6
Loading PEIM at 0x00076EA5000 EntryPoint=0x00076EA5D26 CpuMpPei.efi
PROGRESS CODE: V03020002 I0
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: 76EA61CC
AP Loop Mode is 2
WakeupBufferStart = 9F000, WakeupBufferSize = 0
CpuMpPei: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
ShadowMicrocodePatchByPcd: 0x1 microcode patches will be loaded into memory, with size 0x1B400.
ShadowMicrocodePatchWorker: Required microcode patches have been loaded at 0x76E48000, with size 0x1B400.
Register PPI Notify: 8F9D4825-797D-48FC-8471-845025792EF6
Does not find any stored CPU BIST information from PPI!
APICID - 0x00000000, BIST - 0x00000000
APICID - 0x00000001, BIST - 0x00000000
APICID - 0x00000002, BIST - 0x00000000
APICID - 0x00000003, BIST - 0x00000000
APICID - 0x00000004, BIST - 0x00000000
APICID - 0x00000005, BIST - 0x00000000
APICID - 0x00000006, BIST - 0x00000000
APICID - 0x00000007, BIST - 0x00000000
Install PPI: 9E9F374B-8F16-4230-9824-5846EE766A97
Install PPI: 5CB9CB3D-31A4-480C-9498-29D269BACFBA
Install PPI: EE16160A-E8BE-47A6-820A-C6900DB0250A
PROGRESS CODE: V03020003 I0
Notify: PPI Guid: EE16160A-E8BE-47A6-820A-C6900DB0250A, Peim notify entry point: 76EC7963
Dump Silicon Policy updated by Platform...
------------------------ Silicon Print Policy Start ------------------------
CsmFlag= 0
SkipSsidProgramming= 0
CustomizedSvid= 0
CustomizedSsid= 0
SsidTablePtr= 0
NumberOfSsidTableEntry= 0
TraceHubMemBase = 0x00000000
SkipBiosDoneWhenFwUpdate= 0
------------------------ Silicon Print Policy End --------------------------
------------------------ PCH Print Policy Start ------------------------
Revision= 1
------------------ PCH General Config ------------------
Crid= 0
LegacyIoLowLatency = 0
------------------ PCH PCIE Config ------------------
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ClkReqDetect= 1
RootPort[0] MrlSensorPresent = 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] PcieSpeed= 0
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 0
RootPort[0] L1Substates= 0
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] SlotPowerLimitScale= 0
RootPort[0] SlotPowerLimitValue= 0
RootPort[0] EnableCpm= 1
RootPort[0] FormFactor = 0
RootPort[1] HotPlug= 0
RootPort[1] PmSci= 1
RootPort[1] ClkReqDetect= 1
RootPort[1] MrlSensorPresent = 0
RootPort[1] UnsupportedRequestReport= 0
RootPort[1] FatalErrorReport= 0
RootPort[1] NoFatalErrorReport= 0
RootPort[1] CorrectableErrorReport= 0
RootPort[1] SystemErrorOnFatalError= 0
RootPort[1] SystemErrorOnNonFatalError= 0
RootPort[1] SystemErrorOnCorrectableError= 0
RootPort[1] MaxPayload= 1
RootPort[1] SlotImplemented= 1
RootPort[1] AcsEnabled= 1
RootPort[1] PtmEnabled= 1
RootPort[1] AdvancedErrorReporting= 1
RootPort[1] TransmitterHalfSwing= 0
RootPort[1] PcieSpeed= 0
RootPort[1] PhysicalSlotNumber= 1
RootPort[1] CompletionTimeout= 0
RootPort[1] Aspm= 0
RootPort[1] L1Substates= 0
RootPort[1] LtrEnable= 1
RootPort[1] LtrConfigLock= 0
RootPort[1] LtrMaxSnoopLatency= 1003
RootPort[1] LtrMaxNoSnoopLatency= 1003
RootPort[1] SnoopLatencyOverrideMode= 2
RootPort[1] SnoopLatencyOverrideMultiplier= 2
RootPort[1] SnoopLatencyOverrideValue= 3C
RootPort[1] NonSnoopLatencyOverrideMode= 2
RootPort[1] NonSnoopLatencyOverrideMultiplier= 2
RootPort[1] NonSnoopLatencyOverrideValue= 3C
RootPort[1] ForceLtrOverride= 0
RootPort[1] DetectTimeoutMs= 0
RootPort[1] SlotPowerLimitScale= 0
RootPort[1] SlotPowerLimitValue= 0
RootPort[1] EnableCpm= 1
RootPort[1] FormFactor = 0
RootPort[2] HotPlug= 0
RootPort[2] PmSci= 1
RootPort[2] ClkReqDetect= 1
RootPort[2] MrlSensorPresent = 0
RootPort[2] UnsupportedRequestReport= 0
RootPort[2] FatalErrorReport= 0
RootPort[2] NoFatalErrorReport= 0
RootPort[2] CorrectableErrorReport= 0
RootPort[2] SystemErrorOnFatalError= 0
RootPort[2] SystemErrorOnNonFatalError= 0
RootPort[2] SystemErrorOnCorrectableError= 0
RootPort[2] MaxPayload= 1
RootPort[2] SlotImplemented= 1
RootPort[2] AcsEnabled= 1
RootPort[2] PtmEnabled= 1
RootPort[2] AdvancedErrorReporting= 1
RootPort[2] TransmitterHalfSwing= 0
RootPort[2] PcieSpeed= 0
RootPort[2] PhysicalSlotNumber= 2
RootPort[2] CompletionTimeout= 0
RootPort[2] Aspm= 0
RootPort[2] L1Substates= 0
RootPort[2] LtrEnable= 1
RootPort[2] LtrConfigLock= 0
RootPort[2] LtrMaxSnoopLatency= 1003
RootPort[2] LtrMaxNoSnoopLatency= 1003
RootPort[2] SnoopLatencyOverrideMode= 2
RootPort[2] SnoopLatencyOverrideMultiplier= 2
RootPort[2] SnoopLatencyOverrideValue= 3C
RootPort[2] NonSnoopLatencyOverrideMode= 2
RootPort[2] NonSnoopLatencyOverrideMultiplier= 2
RootPort[2] NonSnoopLatencyOverrideValue= 3C
RootPort[2] ForceLtrOverride= 0
RootPort[2] DetectTimeoutMs= 0
RootPort[2] SlotPowerLimitScale= 0
RootPort[2] SlotPowerLimitValue= 0
RootPort[2] EnableCpm= 1
RootPort[2] FormFactor = 0
RootPort[3] HotPlug= 0
RootPort[3] PmSci= 1
RootPort[3] ClkReqDetect= 1
RootPort[3] MrlSensorPresent = 0
RootPort[3] UnsupportedRequestReport= 0
RootPort[3] FatalErrorReport= 0
RootPort[3] NoFatalErrorReport= 0
RootPort[3] CorrectableErrorReport= 0
RootPort[3] SystemErrorOnFatalError= 0
RootPort[3] SystemErrorOnNonFatalError= 0
RootPort[3] SystemErrorOnCorrectableError= 0
RootPort[3] MaxPayload= 1
RootPort[3] SlotImplemented= 1
RootPort[3] AcsEnabled= 1
RootPort[3] PtmEnabled= 1
RootPort[3] AdvancedErrorReporting= 1
RootPort[3] TransmitterHalfSwing= 0
RootPort[3] PcieSpeed= 0
RootPort[3] PhysicalSlotNumber= 3
RootPort[3] CompletionTimeout= 0
RootPort[3] Aspm= 0
RootPort[3] L1Substates= 0
RootPort[3] LtrEnable= 1
RootPort[3] LtrConfigLock= 0
RootPort[3] LtrMaxSnoopLatency= 1003
RootPort[3] LtrMaxNoSnoopLatency= 1003
RootPort[3] SnoopLatencyOverrideMode= 2
RootPort[3] SnoopLatencyOverrideMultiplier= 2
RootPort[3] SnoopLatencyOverrideValue= 3C
RootPort[3] NonSnoopLatencyOverrideMode= 2
RootPort[3] NonSnoopLatencyOverrideMultiplier= 2
RootPort[3] NonSnoopLatencyOverrideValue= 3C
RootPort[3] ForceLtrOverride= 0
RootPort[3] DetectTimeoutMs= 0
RootPort[3] SlotPowerLimitScale= 0
RootPort[3] SlotPowerLimitValue= 0
RootPort[3] EnableCpm= 1
RootPort[3] FormFactor = 0
RootPort[4] HotPlug= 0
RootPort[4] PmSci= 1
RootPort[4] ClkReqDetect= 1
RootPort[4] MrlSensorPresent = 0
RootPort[4] UnsupportedRequestReport= 0
RootPort[4] FatalErrorReport= 0
RootPort[4] NoFatalErrorReport= 0
RootPort[4] CorrectableErrorReport= 0
RootPort[4] SystemErrorOnFatalError= 0
RootPort[4] SystemErrorOnNonFatalError= 0
RootPort[4] SystemErrorOnCorrectableError= 0
RootPort[4] MaxPayload= 1
RootPort[4] SlotImplemented= 1
RootPort[4] AcsEnabled= 1
RootPort[4] PtmEnabled= 1
RootPort[4] AdvancedErrorReporting= 1
RootPort[4] TransmitterHalfSwing= 0
RootPort[4] PcieSpeed= 0
RootPort[4] PhysicalSlotNumber= 4
RootPort[4] CompletionTimeout= 0
RootPort[4] Aspm= 0
RootPort[4] L1Substates= 0
RootPort[4] LtrEnable= 1
RootPort[4] LtrConfigLock= 0
RootPort[4] LtrMaxSnoopLatency= 1003
RootPort[4] LtrMaxNoSnoopLatency= 1003
RootPort[4] SnoopLatencyOverrideMode= 2
RootPort[4] SnoopLatencyOverrideMultiplier= 2
RootPort[4] SnoopLatencyOverrideValue= 3C
RootPort[4] NonSnoopLatencyOverrideMode= 2
RootPort[4] NonSnoopLatencyOverrideMultiplier= 2
RootPort[4] NonSnoopLatencyOverrideValue= 3C
RootPort[4] ForceLtrOverride= 0
RootPort[4] DetectTimeoutMs= 0
RootPort[4] SlotPowerLimitScale= 0
RootPort[4] SlotPowerLimitValue= 0
RootPort[4] EnableCpm= 1
RootPort[4] FormFactor = 0
RootPort[5] HotPlug= 0
RootPort[5] PmSci= 1
RootPort[5] ClkReqDetect= 1
RootPort[5] MrlSensorPresent = 0
RootPort[5] UnsupportedRequestReport= 0
RootPort[5] FatalErrorReport= 0
RootPort[5] NoFatalErrorReport= 0
RootPort[5] CorrectableErrorReport= 0
RootPort[5] SystemErrorOnFatalError= 0
RootPort[5] SystemErrorOnNonFatalError= 0
RootPort[5] SystemErrorOnCorrectableError= 0
RootPort[5] MaxPayload= 1
RootPort[5] SlotImplemented= 1
RootPort[5] AcsEnabled= 1
RootPort[5] PtmEnabled= 1
RootPort[5] AdvancedErrorReporting= 1
RootPort[5] TransmitterHalfSwing= 0
RootPort[5] PcieSpeed= 0
RootPort[5] PhysicalSlotNumber= 5
RootPort[5] CompletionTimeout= 0
RootPort[5] Aspm= 0
RootPort[5] L1Substates= 0
RootPort[5] LtrEnable= 1
RootPort[5] LtrConfigLock= 0
RootPort[5] LtrMaxSnoopLatency= 1003
RootPort[5] LtrMaxNoSnoopLatency= 1003
RootPort[5] SnoopLatencyOverrideMode= 2
RootPort[5] SnoopLatencyOverrideMultiplier= 2
RootPort[5] SnoopLatencyOverrideValue= 3C
RootPort[5] NonSnoopLatencyOverrideMode= 2
RootPort[5] NonSnoopLatencyOverrideMultiplier= 2
RootPort[5] NonSnoopLatencyOverrideValue= 3C
RootPort[5] ForceLtrOverride= 0
RootPort[5] DetectTimeoutMs= 0
RootPort[5] SlotPowerLimitScale= 0
RootPort[5] SlotPowerLimitValue= 0
RootPort[5] EnableCpm= 1
RootPort[5] FormFactor = 0
RootPort[6] HotPlug= 0
RootPort[6] PmSci= 1
RootPort[6] ClkReqDetect= 1
RootPort[6] MrlSensorPresent = 0
RootPort[6] UnsupportedRequestReport= 0
RootPort[6] FatalErrorReport= 0
RootPort[6] NoFatalErrorReport= 0
RootPort[6] CorrectableErrorReport= 0
RootPort[6] SystemErrorOnFatalError= 0
RootPort[6] SystemErrorOnNonFatalError= 0
RootPort[6] SystemErrorOnCorrectableError= 0
RootPort[6] MaxPayload= 1
RootPort[6] SlotImplemented= 1
RootPort[6] AcsEnabled= 1
RootPort[6] PtmEnabled= 1
RootPort[6] AdvancedErrorReporting= 1
RootPort[6] TransmitterHalfSwing= 0
RootPort[6] PcieSpeed= 0
RootPort[6] PhysicalSlotNumber= 6
RootPort[6] CompletionTimeout= 0
RootPort[6] Aspm= 0
RootPort[6] L1Substates= 0
RootPort[6] LtrEnable= 1
RootPort[6] LtrConfigLock= 0
RootPort[6] LtrMaxSnoopLatency= 1003
RootPort[6] LtrMaxNoSnoopLatency= 1003
RootPort[6] SnoopLatencyOverrideMode= 2
RootPort[6] SnoopLatencyOverrideMultiplier= 2
RootPort[6] SnoopLatencyOverrideValue= 3C
RootPort[6] NonSnoopLatencyOverrideMode= 2
RootPort[6] NonSnoopLatencyOverrideMultiplier= 2
RootPort[6] NonSnoopLatencyOverrideValue= 3C
RootPort[6] ForceLtrOverride= 0
RootPort[6] DetectTimeoutMs= 0
RootPort[6] SlotPowerLimitScale= 0
RootPort[6] SlotPowerLimitValue= 0
RootPort[6] EnableCpm= 1
RootPort[6] FormFactor = 0
RootPort[7] HotPlug= 0
RootPort[7] PmSci= 1
RootPort[7] ClkReqDetect= 1
RootPort[7] MrlSensorPresent = 0
RootPort[7] UnsupportedRequestReport= 0
RootPort[7] FatalErrorReport= 0
RootPort[7] NoFatalErrorReport= 0
RootPort[7] CorrectableErrorReport= 0
RootPort[7] SystemErrorOnFatalError= 0
RootPort[7] SystemErrorOnNonFatalError= 0
RootPort[7] SystemErrorOnCorrectableError= 0
RootPort[7] MaxPayload= 1
RootPort[7] SlotImplemented= 1
RootPort[7] AcsEnabled= 1
RootPort[7] PtmEnabled= 1
RootPort[7] AdvancedErrorReporting= 1
RootPort[7] TransmitterHalfSwing= 0
RootPort[7] PcieSpeed= 0
RootPort[7] PhysicalSlotNumber= 7
RootPort[7] CompletionTimeout= 0
RootPort[7] Aspm= 0
RootPort[7] L1Substates= 0
RootPort[7] LtrEnable= 1
RootPort[7] LtrConfigLock= 0
RootPort[7] LtrMaxSnoopLatency= 1003
RootPort[7] LtrMaxNoSnoopLatency= 1003
RootPort[7] SnoopLatencyOverrideMode= 2
RootPort[7] SnoopLatencyOverrideMultiplier= 2
RootPort[7] SnoopLatencyOverrideValue= 3C
RootPort[7] NonSnoopLatencyOverrideMode= 2
RootPort[7] NonSnoopLatencyOverrideMultiplier= 2
RootPort[7] NonSnoopLatencyOverrideValue= 3C
RootPort[7] ForceLtrOverride= 0
RootPort[7] DetectTimeoutMs= 0
RootPort[7] SlotPowerLimitScale= 0
RootPort[7] SlotPowerLimitValue= 0
RootPort[7] EnableCpm= 1
RootPort[7] FormFactor = 0
RootPort[8] HotPlug= 0
RootPort[8] PmSci= 1
RootPort[8] ClkReqDetect= 1
RootPort[8] MrlSensorPresent = 0
RootPort[8] UnsupportedRequestReport= 0
RootPort[8] FatalErrorReport= 0
RootPort[8] NoFatalErrorReport= 0
RootPort[8] CorrectableErrorReport= 0
RootPort[8] SystemErrorOnFatalError= 0
RootPort[8] SystemErrorOnNonFatalError= 0
RootPort[8] SystemErrorOnCorrectableError= 0
RootPort[8] MaxPayload= 1
RootPort[8] SlotImplemented= 1
RootPort[8] AcsEnabled= 1
RootPort[8] PtmEnabled= 1
RootPort[8] AdvancedErrorReporting= 1
RootPort[8] TransmitterHalfSwing= 0
RootPort[8] PcieSpeed= 0
RootPort[8] PhysicalSlotNumber= 8
RootPort[8] CompletionTimeout= 0
RootPort[8] Aspm= 0
RootPort[8] L1Substates= 0
RootPort[8] LtrEnable= 1
RootPort[8] LtrConfigLock= 0
RootPort[8] LtrMaxSnoopLatency= 1003
RootPort[8] LtrMaxNoSnoopLatency= 1003
RootPort[8] SnoopLatencyOverrideMode= 2
RootPort[8] SnoopLatencyOverrideMultiplier= 2
RootPort[8] SnoopLatencyOverrideValue= 3C
RootPort[8] NonSnoopLatencyOverrideMode= 2
RootPort[8] NonSnoopLatencyOverrideMultiplier= 2
RootPort[8] NonSnoopLatencyOverrideValue= 3C
RootPort[8] ForceLtrOverride= 0
RootPort[8] DetectTimeoutMs= 0
RootPort[8] SlotPowerLimitScale= 0
RootPort[8] SlotPowerLimitValue= 0
RootPort[8] EnableCpm= 1
RootPort[8] FormFactor = 0
RootPort[9] HotPlug= 0
RootPort[9] PmSci= 1
RootPort[9] ClkReqDetect= 1
RootPort[9] MrlSensorPresent = 0
RootPort[9] UnsupportedRequestReport= 0
RootPort[9] FatalErrorReport= 0
RootPort[9] NoFatalErrorReport= 0
RootPort[9] CorrectableErrorReport= 0
RootPort[9] SystemErrorOnFatalError= 0
RootPort[9] SystemErrorOnNonFatalError= 0
RootPort[9] SystemErrorOnCorrectableError= 0
RootPort[9] MaxPayload= 1
RootPort[9] SlotImplemented= 1
RootPort[9] AcsEnabled= 1
RootPort[9] PtmEnabled= 1
RootPort[9] AdvancedErrorReporting= 1
RootPort[9] TransmitterHalfSwing= 0
RootPort[9] PcieSpeed= 0
RootPort[9] PhysicalSlotNumber= 9
RootPort[9] CompletionTimeout= 0
RootPort[9] Aspm= 0
RootPort[9] L1Substates= 0
RootPort[9] LtrEnable= 1
RootPort[9] LtrConfigLock= 0
RootPort[9] LtrMaxSnoopLatency= 1003
RootPort[9] LtrMaxNoSnoopLatency= 1003
RootPort[9] SnoopLatencyOverrideMode= 2
RootPort[9] SnoopLatencyOverrideMultiplier= 2
RootPort[9] SnoopLatencyOverrideValue= 3C
RootPort[9] NonSnoopLatencyOverrideMode= 2
RootPort[9] NonSnoopLatencyOverrideMultiplier= 2
RootPort[9] NonSnoopLatencyOverrideValue= 3C
RootPort[9] ForceLtrOverride= 0
RootPort[9] DetectTimeoutMs= 0
RootPort[9] SlotPowerLimitScale= 0
RootPort[9] SlotPowerLimitValue= 0
RootPort[9] EnableCpm= 1
RootPort[9] FormFactor = 0
RootPort[10] HotPlug= 0
RootPort[10] PmSci= 1
RootPort[10] ClkReqDetect= 1
RootPort[10] MrlSensorPresent = 0
RootPort[10] UnsupportedRequestReport= 0
RootPort[10] FatalErrorReport= 0
RootPort[10] NoFatalErrorReport= 0
RootPort[10] CorrectableErrorReport= 0
RootPort[10] SystemErrorOnFatalError= 0
RootPort[10] SystemErrorOnNonFatalError= 0
RootPort[10] SystemErrorOnCorrectableError= 0
RootPort[10] MaxPayload= 1
RootPort[10] SlotImplemented= 1
RootPort[10] AcsEnabled= 1
RootPort[10] PtmEnabled= 1
RootPort[10] AdvancedErrorReporting= 1
RootPort[10] TransmitterHalfSwing= 0
RootPort[10] PcieSpeed= 0
RootPort[10] PhysicalSlotNumber= A
RootPort[10] CompletionTimeout= 0
RootPort[10] Aspm= 4
RootPort[10] L1Substates= 2
RootPort[10] LtrEnable= 1
RootPort[10] LtrConfigLock= 0
RootPort[10] LtrMaxSnoopLatency= 1003
RootPort[10] LtrMaxNoSnoopLatency= 1003
RootPort[10] SnoopLatencyOverrideMode= 2
RootPort[10] SnoopLatencyOverrideMultiplier= 2
RootPort[10] SnoopLatencyOverrideValue= 3C
RootPort[10] NonSnoopLatencyOverrideMode= 2
RootPort[10] NonSnoopLatencyOverrideMultiplier= 2
RootPort[10] NonSnoopLatencyOverrideValue= 3C
RootPort[10] ForceLtrOverride= 0
RootPort[10] DetectTimeoutMs= 0
RootPort[10] SlotPowerLimitScale= 0
RootPort[10] SlotPowerLimitValue= 0
RootPort[10] EnableCpm= 1
RootPort[10] FormFactor = 0
RootPort[11] HotPlug= 0
RootPort[11] PmSci= 1
RootPort[11] ClkReqDetect= 1
RootPort[11] MrlSensorPresent = 0
RootPort[11] UnsupportedRequestReport= 0
RootPort[11] FatalErrorReport= 0
RootPort[11] NoFatalErrorReport= 0
RootPort[11] CorrectableErrorReport= 0
RootPort[11] SystemErrorOnFatalError= 0
RootPort[11] SystemErrorOnNonFatalError= 0
RootPort[11] SystemErrorOnCorrectableError= 0
RootPort[11] MaxPayload= 1
RootPort[11] SlotImplemented= 1
RootPort[11] AcsEnabled= 1
RootPort[11] PtmEnabled= 1
RootPort[11] AdvancedErrorReporting= 1
RootPort[11] TransmitterHalfSwing= 0
RootPort[11] PcieSpeed= 0
RootPort[11] PhysicalSlotNumber= B
RootPort[11] CompletionTimeout= 0
RootPort[11] Aspm= 4
RootPort[11] L1Substates= 2
RootPort[11] LtrEnable= 1
RootPort[11] LtrConfigLock= 0
RootPort[11] LtrMaxSnoopLatency= 1003
RootPort[11] LtrMaxNoSnoopLatency= 1003
RootPort[11] SnoopLatencyOverrideMode= 2
RootPort[11] SnoopLatencyOverrideMultiplier= 2
RootPort[11] SnoopLatencyOverrideValue= 3C
RootPort[11] NonSnoopLatencyOverrideMode= 2
RootPort[11] NonSnoopLatencyOverrideMultiplier= 2
RootPort[11] NonSnoopLatencyOverrideValue= 3C
RootPort[11] ForceLtrOverride= 0
RootPort[11] DetectTimeoutMs= 0
RootPort[11] SlotPowerLimitScale= 0
RootPort[11] SlotPowerLimitValue= 0
RootPort[11] EnableCpm= 1
RootPort[11] FormFactor = 0
OverrideEqualizationDefaults: 0
PcieLinkEqMethod: 0
PcieLinkEqMode: 0
Ph1DownstreamPortTransmitterPreset: 0
Ph1UpstreamPortTransmitterPreset: 0
Ph3NumberOfPresetsOrCoefficients: 0
Phase 3 Coefficient 0, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 1, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 2, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 3, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 4, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 5, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 6, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 7, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 8, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 9, pre-cursor = 0, post-cursor = 0
Phase 3 Preset 0 = 0
Phase 3 Preset 1 = 0
Phase 3 Preset 2 = 0
Phase 3 Preset 3 = 0
Phase 3 Preset 4 = 0
Phase 3 Preset 5 = 0
Phase 3 Preset 6 = 0
Phase 3 Preset 7 = 0
Phase 3 Preset 8 = 0
Phase 3 Preset 9 = 0
Phase 3 Preset 10 = 0
LocalTransmitterOverrideEnable = 0
Ph2LocalTransmitterOverridePreset = 0
EnablePort8xhDecode= 0
PchPciePort8xhDecodePortIndex= 0
EnablePeerMemoryWrite= 0
ComplianceTestMode= 0
RpFunctionSwap= 1
--------------------- RST Config ------------------------
Raid0= 1
Raid1= 1
Raid10= 1
Raid5= 1
Irrt= 1
OromUiBanner= 1
OromUiDelay= 0
HddUnlock= 1
LedLocate= 1
IrrtOnly= 1
SmartStorage= 1
LegacyOrom= 0
OptaneMemory= 1
CpuAttachedStorage= 1
RstPcieStorageRemap[0].Enable = 0
RstPcieStorageRemap[0].RstPcieStoragePort = 0
RstPcieStorageRemap[0].DeviceResetDelay = 64
RstPcieStorageRemap[1].Enable = 0
RstPcieStorageRemap[1].RstPcieStoragePort = 0
RstPcieStorageRemap[1].DeviceResetDelay = 64
RstPcieStorageRemap[2].Enable = 0
RstPcieStorageRemap[2].RstPcieStoragePort = 0
RstPcieStorageRemap[2].DeviceResetDelay = 64
------------------ PCH Lock Down Config ------------------
GlobalSmi= 1
BiosInterface= 1
BiosLock= 0
UnlockGpioPads= 0
------------------ PCH Flash Protection Config ------------------
WriteProtectionEnable[0] = 1
ReadProtectionEnable[0] = 0
ProtectedRangeLimit[0] = 160F
ProtectedRangeBase[0] = 1530
WriteProtectionEnable[1] = 1
ReadProtectionEnable[1] = 0
ProtectedRangeLimit[1] = 1FFF
ProtectedRangeBase[1] = 1650
WriteProtectionEnable[2] = 0
ReadProtectionEnable[2] = 0
ProtectedRangeLimit[2] = 0
ProtectedRangeBase[2] = 0
WriteProtectionEnable[3] = 0
ReadProtectionEnable[3] = 0
ProtectedRangeLimit[3] = 0
ProtectedRangeBase[3] = 0
WriteProtectionEnable[4] = 0
ReadProtectionEnable[4] = 0
ProtectedRangeLimit[4] = 0
ProtectedRangeBase[4] = 0
------------------ PCH HSIO Config ------------------
ChipsetInit Binary Pointer = 0
ChipsetInit Binary Length = 0
------------------ PCH FIVR Config ------------------
ExtV1p05Rail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = 64
ExtVnnRail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = C8
ExtVnnRailSx:
EnabledStates = 0
Voltage = 1A4
IccMax = C8
VccinAux:
LowToHighCurModeVolTranTime = C
RetToHighCurModeVolTranTime = 36
RetToLowCurModeVolTranTime = 2B
OffToHighCurModeVolTranTime = 96
FivrDynPm = 1
------------------------ PCH Print Platform Protocol End --------------------------
------------------ Rtc Config ------------------
BiosInterfaceLock = 1
MemoryLock = 1
------------------ PCH Thermal Config ------------------
TTLevels T0Level 0 centigrade degree
TTLevels T1Level 0 centigrade degree
TTLevels T2Level 0 centigrade degree
TTLevels TTEnable 0
TTLevels TTState13Enable 0
TTLevels TTLock 0
TTLevels SuggestedSetting 1
TTLevels PchCrossThrottling 1
DmiHaAWC DmiTsawEn 0
DmiHaAWC TS0TW 3
DmiHaAWC TS1TW 2
DmiHaAWC TS2TW 1
DmiHaAWC TS3TW 0
DmiHaAWC SuggestedSetting 1
MemoryThrottling Enable= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
PchHotEnable = 0
PchHotLevel = 73
------------------ CNVi Config ------------------
CNVi Mode = 1
BT Core = 1
BT Audio Offload = 0
Pin Muxing:
RF_RESET# = No muxing
CLKREQ = No muxing
------------------ eSPI Config ------------------
LGMR Enable 1
Host C10 Report Enable 0
BME for Master and Slave Enabled 1
Lock Link Configuration 1
Espi Pm HAE 1
------------------ GBE Config ------------------
Enable= 1
LtrEnable= 1
------------------ Tsn Config ------------------
TSN 0 Enable= 0
Tsn0MacAddressHigh = 0
Tsn0MacAddressLow = 0
TsnMultiVcEnable = 0
TsnLinkSpeed= 3
------------------ HDA Config ------------------
Pme = 0
Codec Sx Wake Capability = 0
HD-A Link Frequency = 2
VerbTableEntryNum = 6
VerbTablePtr = 76A02050
------------------ Ieh Config ------------------------
Mode: 0x1
------------------ ISH Config ------------------
SPI0 Enable = 0
SPI0 Cs#0 Enable = 0
Pin muxing:
Mosi = No muxing
Miso = No muxing
Clk = No muxing
Cs#0 = No muxing
Pad termination:
Mosi = GpioTermDefault
Miso = GpioTermDefault
Clk = GpioTermDefault
Cs#0 = GpioTermDefault
UART0 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
UART1 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
I2C0 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C1 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C2 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
GP_0 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_1 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_2 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_3 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_4 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_5 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_6 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_7 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
------------------ Interrupt Config ------------------
Interrupt assignment:
Dxx:Fx INTx IRQ
D31:F3 1 016
D31:F4 1 016
D31:F7 1 016
D30:F0 1 016
D30:F1 2 017
D30:F2 3 036
D30:F3 4 037
D28:F0 1 016
D28:F1 2 017
D28:F2 3 018
D28:F3 4 019
D25:F2 3 033
D23:F0 1 016
D22:F0 1 016
D22:F1 2 017
D22:F4 1 016
D22:F5 4 019
D21:F0 1 027
D21:F1 2 040
D21:F2 3 029
D21:F3 4 030
D20:F0 1 016
D20:F1 2 017
D20:F3 1 016
D19:F0 1 043
D18:F0 1 016
D18:F6 2 034
D17:F0 1 035
D17:F1 2 020
D17:F2 3 021
D17:F3 4 042
D16:F0 3 018
D16:F1 4 019
D16:F6 1 023
D16:F7 2 022
D31:F6 1 016
D30:F4 1 016
D29:F0 1 016
D29:F1 2 017
D29:F2 3 018
D29:F3 4 019
D28:F4 1 016
D28:F5 2 017
D28:F6 3 018
D28:F7 4 019
D25:F0 1 031
D25:F1 2 032
D22:F2 3 018
D22:F3 4 019
D19:F1 2 024
D19:F2 3 025
D19:F3 4 038
Other interrupt configuration:
GpioIrqRoute= 14
SciIrqSelect= 9
TcoIrqEnable= 0
TcoIrqSelect= 9
------------------ IOAPIC Config ------------------
IoApicEntry24_119= 1
Enable8254ClockGating= 1
Enable8254ClockGatingOnS3= 1
IoApicId= 2
------------------ P2SB Config ------------------
SbAccessUnlock= 0
------------------ DMI Config ------------------
PwrOptEnable= 0
DmiAspmCtrl = 4
CwbEnable= 1
DmiPowerReduction= 1
OpioRecenter= 1
------------------ PCH PM Config ------------------
WakeConfig PmeB0S5Dis = 0
WakeConfig WolEnableOverride = 1
WakeConfig LanWakeFromDeepSx = 1
WakeConfig PcieWakeFromDeepSx = 0
WakeConfig WoWlanEnable = 0
WakeConfig WoWlanDeepSxEnable = 0
PchDeepSxPol = 0
PchSlpS3MinAssert = 3
PchSlpS4MinAssert = 1
PchSlpSusMinAssert = 4
PchSlpAMinAssert = 4
SlpStrchSusUp = 0
SlpLanLowDc = 1
PwrBtnOverridePeriod = 0
DisableEnergyReport = 0
DisableDsxAcPresentPulldown = 0
PchPwrCycDur = 0
PciePllSsc = FF
DisableNativePowerButton = 0
MeWakeSts = 1
WolOvrWkSts = 1
EnableTcoTimer = 1
VrAlert = 0
PowerButtonDebounce = 0
PsOnEnable = 0
CpuC10GatePinEnable = 1
PmcDbgMsgEn = 0
ModPhySusPgEnable = 1
Usb2PhySusPgEnable = 1
OsIdleEnable = 1
V1p05PhyExtFetControlEn = 0
V1p05IsExtFetControlEn = 0
LpmS0ixSubStateEnable = FF
S0ixAutoDemotion = 1
LatchEventsC10Exit = 0
EnableTimedGpio0 = 0
EnableTimedGpio1 = 0
GlobalResetMasksOverride = 0
GlobalResetTriggerMask = 0
GlobalResetEventMask = 0
--------------- SATA Config for controller 0 -----------
Enable= 1
SataMode= 0
PortSettings[0] Enabled= 1
PortSettings[0] HotPlug= 0
PortSettings[0] InterlockSw= 0
PortSettings[0] External= 0
PortSettings[0] SpinUp= 0
PortSettings[0] SolidStateDrive= 0
PortSettings[0] DevSlp= 0
PortSettings[0] DevSlpResetConfig= 1
PortSettings[0] EnableDitoConfig= 0
PortSettings[0] DmVal= 0
PortSettings[0] DitoVal= 0
PortSettings[0] ZpOdd= 0
PortSettings[1] Enabled= 1
PortSettings[1] HotPlug= 0
PortSettings[1] InterlockSw= 0
PortSettings[1] External= 0
PortSettings[1] SpinUp= 0
PortSettings[1] SolidStateDrive= 0
PortSettings[1] DevSlp= 0
PortSettings[1] DevSlpResetConfig= 1
PortSettings[1] EnableDitoConfig= 0
PortSettings[1] DmVal= 0
PortSettings[1] DitoVal= 0
PortSettings[1] ZpOdd= 0
SpeedSupport= 0
EsataSpeedLimit= 0
LedEnable= 0
TestMode= 0
SalpSupport= 1
PwrOptEnable= 0
RaidDeviceId= 0
SataRstInterrupt = 0
ThermalThrottling P0T1M 1
ThermalThrottling P0T2M 2
ThermalThrottling P0T3M 3
ThermalThrottling P0TDisp 0
ThermalThrottling P0Tinact 0
ThermalThrottling P0TDispFinit 0
ThermalThrottling P1T1M 1
ThermalThrottling P1T2M 2
ThermalThrottling P1T3M 3
ThermalThrottling P1TDisp 0
ThermalThrottling P1Tinact 0
ThermalThrottling P1TDispFinit 0
ThermalThrottling SuggestedSetting 1
------------------ USB Config ------------------
PdoProgramming = 1
OverCurrentEnable = 1
XhciOcLock = 1
LtrModeEnable = 1
HsiiEnable = 0
PortUsb20[0].Enabled = 1
PortUsb20[0].OverCurrentPin = OC0
PortUsb20[0].PortResetMessageEnable = 0
PortUsb20[1].Enabled = 1
PortUsb20[1].OverCurrentPin = OC255
PortUsb20[1].PortResetMessageEnable = 0
PortUsb20[2].Enabled = 1
PortUsb20[2].OverCurrentPin = OC255
PortUsb20[2].PortResetMessageEnable = 0
PortUsb20[3].Enabled = 1
PortUsb20[3].OverCurrentPin = OC0
PortUsb20[3].PortResetMessageEnable = 0
PortUsb20[4].Enabled = 1
PortUsb20[4].OverCurrentPin = OC0
PortUsb20[4].PortResetMessageEnable = 0
PortUsb20[5].Enabled = 1
PortUsb20[5].OverCurrentPin = OC3
PortUsb20[5].PortResetMessageEnable = 0
PortUsb20[6].Enabled = 1
PortUsb20[6].OverCurrentPin = OC3
PortUsb20[6].PortResetMessageEnable = 0
PortUsb20[7].Enabled = 1
PortUsb20[7].OverCurrentPin = OC0
PortUsb20[7].PortResetMessageEnable = 0
PortUsb20[8].Enabled = 0
PortUsb20[8].OverCurrentPin = OC3
PortUsb20[8].PortResetMessageEnable = 0
PortUsb20[9].Enabled = 1
PortUsb20[9].OverCurrentPin = OC3
PortUsb20[9].PortResetMessageEnable = 0
PortUsb30[0] Enabled = 1
PortUsb30[0].OverCurrentPin = OC0
PortUsb30[1] Enabled = 1
PortUsb30[1].OverCurrentPin = OC0
PortUsb30[2] Enabled = 1
PortUsb30[2].OverCurrentPin = OC255
PortUsb30[3] Enabled = 1
PortUsb30[3].OverCurrentPin = OC255
LtrOverrideEnable = 0
XdciConfig.Enable= 1
USB3LinkSpeed = 0
------------------ USB2 PHY Config ------------------
Port[0].Petxiset = 6
Port[0].Txiset = 0
Port[0].Predeemp = 3
Port[0].Pehalfbit = 0
Port[1].Petxiset = 6
Port[1].Txiset = 0
Port[1].Predeemp = 3
Port[1].Pehalfbit = 0
Port[2].Petxiset = 6
Port[2].Txiset = 0
Port[2].Predeemp = 3
Port[2].Pehalfbit = 0
Port[3].Petxiset = 6
Port[3].Txiset = 0
Port[3].Predeemp = 3
Port[3].Pehalfbit = 0
Port[4].Petxiset = 6
Port[4].Txiset = 0
Port[4].Predeemp = 3
Port[4].Pehalfbit = 0
Port[5].Petxiset = 6
Port[5].Txiset = 0
Port[5].Predeemp = 3
Port[5].Pehalfbit = 0
Port[6].Petxiset = 6
Port[6].Txiset = 0
Port[6].Predeemp = 3
Port[6].Pehalfbit = 0
Port[7].Petxiset = 6
Port[7].Txiset = 0
Port[7].Predeemp = 3
Port[7].Pehalfbit = 0
Port[8].Petxiset = 6
Port[8].Txiset = 0
Port[8].Predeemp = 3
Port[8].Pehalfbit = 0
Port[9].Petxiset = 6
Port[9].Txiset = 0
Port[9].Predeemp = 3
Port[9].Pehalfbit = 0
------------------ USB3 HSIO Config ------------------
Port[0].HsioTxDeEmphEnable = 0
Port[0].HsioTxDeEmph = 0
Port[0].HsioTxDownscaleAmpEnable = 0
Port[0].HsioTxDownscaleAmp = 0
Port[0].HsioCtrlAdaptOffsetCfgEnable = 0
Port[0].HsioCtrlAdaptOffsetCfg = 0
Port[0].HsioFilterSelNEnable = 0
Port[0].HsioFilterSelN = 0
Port[0].HsioFilterSelPEnable = 0
Port[0].HsioFilterSelP = 0
Port[0].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[0].HsioOlfpsCfgPullUpDwnRes = 3
Port[0].HsioTxRate0UniqTranEnable = 0
Port[0].HsioTxRate0UniqTran = 4C
Port[0].HsioTxRate1UniqTranEnable = 0
Port[0].HsioTxRate1UniqTran = 4C
Port[0].HsioTxRate2UniqTranEnable = 0
Port[0].HsioTxRate2UniqTran = 4C
Port[0].HsioTxRate3UniqTranEnable = 0
Port[0].HsioTxRate3UniqTran = 4C
Port[1].HsioTxDeEmphEnable = 0
Port[1].HsioTxDeEmph = 0
Port[1].HsioTxDownscaleAmpEnable = 0
Port[1].HsioTxDownscaleAmp = 0
Port[1].HsioCtrlAdaptOffsetCfgEnable = 0
Port[1].HsioCtrlAdaptOffsetCfg = 0
Port[1].HsioFilterSelNEnable = 0
Port[1].HsioFilterSelN = 0
Port[1].HsioFilterSelPEnable = 0
Port[1].HsioFilterSelP = 0
Port[1].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[1].HsioOlfpsCfgPullUpDwnRes = 3
Port[1].HsioTxRate0UniqTranEnable = 0
Port[1].HsioTxRate0UniqTran = 4C
Port[1].HsioTxRate1UniqTranEnable = 0
Port[1].HsioTxRate1UniqTran = 4C
Port[1].HsioTxRate2UniqTranEnable = 0
Port[1].HsioTxRate2UniqTran = 4C
Port[1].HsioTxRate3UniqTranEnable = 0
Port[1].HsioTxRate3UniqTran = 4C
Port[2].HsioTxDeEmphEnable = 0
Port[2].HsioTxDeEmph = 0
Port[2].HsioTxDownscaleAmpEnable = 0
Port[2].HsioTxDownscaleAmp = 0
Port[2].HsioCtrlAdaptOffsetCfgEnable = 0
Port[2].HsioCtrlAdaptOffsetCfg = 0
Port[2].HsioFilterSelNEnable = 0
Port[2].HsioFilterSelN = 0
Port[2].HsioFilterSelPEnable = 0
Port[2].HsioFilterSelP = 0
Port[2].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[2].HsioOlfpsCfgPullUpDwnRes = 3
Port[2].HsioTxRate0UniqTranEnable = 0
Port[2].HsioTxRate0UniqTran = 4C
Port[2].HsioTxRate1UniqTranEnable = 0
Port[2].HsioTxRate1UniqTran = 4C
Port[2].HsioTxRate2UniqTranEnable = 0
Port[2].HsioTxRate2UniqTran = 4C
Port[2].HsioTxRate3UniqTranEnable = 0
Port[2].HsioTxRate3UniqTran = 4C
Port[3].HsioTxDeEmphEnable = 0
Port[3].HsioTxDeEmph = 0
Port[3].HsioTxDownscaleAmpEnable = 0
Port[3].HsioTxDownscaleAmp = 0
Port[3].HsioCtrlAdaptOffsetCfgEnable = 0
Port[3].HsioCtrlAdaptOffsetCfg = 0
Port[3].HsioFilterSelNEnable = 0
Port[3].HsioFilterSelN = 0
Port[3].HsioFilterSelPEnable = 0
Port[3].HsioFilterSelP = 0
Port[3].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[3].HsioOlfpsCfgPullUpDwnRes = 3
Port[3].HsioTxRate0UniqTranEnable = 0
Port[3].HsioTxRate0UniqTran = 4C
Port[3].HsioTxRate1UniqTranEnable = 0
Port[3].HsioTxRate1UniqTran = 4C
Port[3].HsioTxRate2UniqTranEnable = 0
Port[3].HsioTxRate2UniqTran = 4C
Port[3].HsioTxRate3UniqTranEnable = 0
Port[3].HsioTxRate3UniqTran = 4C
------------------ PCH Thc Config ------------------------
THC ports:
PORT0 Assignment: 0x0
PORT0 Interrupt Pin Muxing: No muxing
PORT1 Assignment: 0x0
PORT1 Interrupt Pin Muxing: No muxing
------------------ Psf Config ------------------------
TccEnable: 0x0
------------------ Fusa Config ------------------------
DisplayFusaConfigEnable: 0x1
GraphicFusaConfigEnable: 0x1
OpioFusaConfigEnable: 0x1
PsfFusaConfigEnable: 0x1
------------------ Hybrid Storage Config ------------------
Hybrid Storage Mode = 0
------------------ TCC Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Crl Bin - Base Address = 0x0
Crl Bin - Size = 0x0
Ifu Enabled = 0
------------------ SPI Config ------------------------
ExtendedBiosDecodeRangeEnable: 0x0
ExtendedBiosDecodeRangeBase: 0x0
ExtendedBiosDecodeRangeLimit: 0xFFFF
---------------------- AmtPolicyPpi Print Begin -----------------
Revision : 0x1
------------------------ AMT_PEI_CONFIG -----------------
Revision : 0x1
AmtEnabled : 0x1
WatchDogEnabled : 0x0
FwProgress : 0x0
WatchDogTimerOs : 0x0
WatchDogTimerBios : 0x0
ManageabilityMode : 0x0
AmtSolEnabled : 0x0
RemoteAssistance : 0x0
AmtKvmEnabled : 0x0
ForcMebxSyncUp : 0x0
---------------------- AmtPolicyPpi Print End -------------------
---------------------- Me Config Block Print Begin -----------------
------------------------ ME_PEI_CONFIG -----------------
Revision : 0x3
MctpBroadcastCycle : 0x0
EndOfPostMessage : 0x2
DisableD0I3SettingForHeci : 0x0
EnforceEDebugMode : 0x0
MeUnconfigOnRtcClear : 0x1
---------------------- Me Config Block Print End -------------------
------------------------ SA Policy (PEI) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_CONFIG ------------------------
Revision : 1
------------------------ GRAPHICS_PEI_CONFIG -----------------
Revision : 7
RenderStandby : 0x1
PmSupport : 0x1
PavpEnable : 0x1
CdClock : 0xFF
SkipCdClockInit : 0x0
PeiGraphicsPeimInit : 0x1
LogoPtr : 0x0
LogoSize : 0x0
BltBufferAdress : 0x0
BltBufferSize : 0x0
GraphicsConfigPtr : 0x76A5B91C
CdynmaxClampEnable : 0x0
GtFreqMax : 0xFF
DisableTurboGt : 0x0
------------------------ GRAPHICS_PEI_CONFIG Print END -----------------
------------------------ GNA_CONFIG -----------------
Revision : 1
------------------------ GNA_CONFIG Print END -----------------
----------------------- VMD_PEI_CONFIG -----------------
Revision : 4
VMD Enable : 0
VMD Global Mapping : 0
VMD VmdCfgBarSize : 0
VMD VmdMemBarSize1 : 0
VMD VmdMemBarSize2 : 0
VMD VmdCfgBarAttr : 0
VMD VmdMemBar1Attr : 0
VMD VmdMemBar2Attr : 0
VMD VmdCfgBarBase : 0xA0000000
VMD VmdMemBar1Base : 0xA2000000
VMD VmdMemBar2Base : 0xA4000000
Vmd OS Variable details
VMD Request Entry Count is 26
Storage device B/D/F or RpIndex/D/F is 90/26/2
Storage device B/D/F or RpIndex/D/F is 4/5/0
Storage device B/D/F or RpIndex/D/F is 6/7/0
Storage device B/D/F or RpIndex/D/F is 8/9/0
Storage device B/D/F or RpIndex/D/F is 10/11/0
Storage device B/D/F or RpIndex/D/F is 12/13/0
Storage device B/D/F or RpIndex/D/F is 14/15/0
Storage device B/D/F or RpIndex/D/F is 16/17/0
Storage device B/D/F or RpIndex/D/F is 18/19/0
Storage device B/D/F or RpIndex/D/F is 20/21/0
Storage device B/D/F or RpIndex/D/F is 22/23/0
Storage device B/D/F or RpIndex/D/F is 24/25/0
Storage device B/D/F or RpIndex/D/F is 26/27/0
Storage device B/D/F or RpIndex/D/F is 28/29/0
Storage device B/D/F or RpIndex/D/F is 30/31/0
Storage device B/D/F or RpIndex/D/F is 32/1/1
Storage device B/D/F or RpIndex/D/F is 34/3/1
Storage device B/D/F or RpIndex/D/F is 36/5/1
Storage device B/D/F or RpIndex/D/F is 38/7/1
Storage device B/D/F or RpIndex/D/F is 40/9/1
Storage device B/D/F or RpIndex/D/F is 42/11/1
Storage device B/D/F or RpIndex/D/F is 44/13/1
Storage device B/D/F or RpIndex/D/F is 46/15/1
Storage device B/D/F or RpIndex/D/F is 48/17/1
Storage device B/D/F or RpIndex/D/F is 50/19/1
Storage device B/D/F or RpIndex/D/F is 52/21/1
-------------------- VMD_CONFIG Print END -----------------
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge Pei Config ------------------
Revision : 1
Device4Enable : 0x0
SkipPamLock : 0x0
EdramTestMode : 0x2
------------------ Serial IO Config ------------------
SPI[0].Mode = 0
SPI[0].DefaultCsOutput = 0
SPI[0].CsMode = 0
SPI[0].CsState = 0
SPI[0].CsEnable[0] = 1
SPI[0].CsPolarity[0] = 1
SPI[0].CsEnable[1] = 0
SPI[0].CsPolarity[1] = 1
SPI[1].Mode = 1
SPI[1].DefaultCsOutput = 0
SPI[1].CsMode = 0
SPI[1].CsState = 0
SPI[1].CsEnable[0] = 1
SPI[1].CsPolarity[0] = 1
SPI[1].CsEnable[1] = 0
SPI[1].CsPolarity[1] = 1
SPI[2].Mode = 0
SPI[2].DefaultCsOutput = 0
SPI[2].CsMode = 0
SPI[2].CsState = 0
SPI[2].CsEnable[0] = 1
SPI[2].CsPolarity[0] = 1
SPI[2].CsEnable[1] = 0
SPI[2].CsPolarity[1] = 1
SPI[3].Mode = 0
SPI[3].DefaultCsOutput = 0
SPI[3].CsMode = 0
SPI[3].CsState = 0
SPI[3].CsEnable[0] = 1
SPI[3].CsPolarity[0] = 1
SPI[3].CsEnable[1] = 0
SPI[3].CsPolarity[1] = 1
SPI[4].Mode = 0
SPI[4].DefaultCsOutput = 0
SPI[4].CsMode = 0
SPI[4].CsState = 0
SPI[4].CsEnable[0] = 1
SPI[4].CsPolarity[0] = 1
SPI[4].CsEnable[1] = 0
SPI[4].CsPolarity[1] = 1
SPI[5].Mode = 0
SPI[5].DefaultCsOutput = 0
SPI[5].CsMode = 0
SPI[5].CsState = 0
SPI[5].CsEnable[0] = 1
SPI[5].CsPolarity[0] = 1
SPI[5].CsEnable[1] = 0
SPI[5].CsPolarity[1] = 1
SPI[6].Mode = 0
SPI[6].DefaultCsOutput = 0
SPI[6].CsMode = 0
SPI[6].CsState = 0
SPI[6].CsEnable[0] = 1
SPI[6].CsPolarity[0] = 1
SPI[6].CsEnable[1] = 0
SPI[6].CsPolarity[1] = 1
UART[0].Mode = 4
UART[0].Attributes.BaudRate = 115200
UART[0].Attributes.Parity = 1
UART[0].Attributes.DataBits = 8
UART[0].Attributes.StopBits = 1
UART[0].Attributes.AutoFlow = 1
UART[0].PinMux.Rx = 0x190B0208
UART[0].PinMux.Tx = 0x190B1209
UART[0].PinMux.Rts = 0x190B220A
UART[0].PinMux.Cts = 0x190B320B
UART[0].DBG2 = 0
UART[0].PowerGating = 2
UART[0].DmaEnable = 1
UART[1].Mode = 0
UART[1].Attributes.BaudRate = 115200
UART[1].Attributes.Parity = 1
UART[1].Attributes.DataBits = 8
UART[1].Attributes.StopBits = 1
UART[1].Attributes.AutoFlow = 1
UART[1].PinMux.Rx = 0x0
UART[1].PinMux.Tx = 0x0
UART[1].PinMux.Rts = 0x0
UART[1].PinMux.Cts = 0x0
UART[1].DBG2 = 0
UART[1].PowerGating = 2
UART[1].DmaEnable = 1
UART[2].Mode = 2
UART[2].Attributes.BaudRate = 115200
UART[2].Attributes.Parity = 1
UART[2].Attributes.DataBits = 8
UART[2].Attributes.StopBits = 1
UART[2].Attributes.AutoFlow = 0
UART[2].PinMux.Rx = 0x0
UART[2].PinMux.Tx = 0x0
UART[2].PinMux.Rts = 0x0
UART[2].PinMux.Cts = 0x0
UART[2].DBG2 = 0
UART[2].PowerGating = 2
UART[2].DmaEnable = 0
UART[3].Mode = 0
UART[3].Attributes.BaudRate = 115200
UART[3].Attributes.Parity = 1
UART[3].Attributes.DataBits = 8
UART[3].Attributes.StopBits = 1
UART[3].Attributes.AutoFlow = 1
UART[3].PinMux.Rx = 0x0
UART[3].PinMux.Tx = 0x0
UART[3].PinMux.Rts = 0x0
UART[3].PinMux.Cts = 0x0
UART[3].DBG2 = 0
UART[3].PowerGating = 2
UART[3].DmaEnable = 1
UART[4].Mode = 0
UART[4].Attributes.BaudRate = 115200
UART[4].Attributes.Parity = 1
UART[4].Attributes.DataBits = 8
UART[4].Attributes.StopBits = 1
UART[4].Attributes.AutoFlow = 1
UART[4].PinMux.Rx = 0x0
UART[4].PinMux.Tx = 0x0
UART[4].PinMux.Rts = 0x0
UART[4].PinMux.Cts = 0x0
UART[4].DBG2 = 0
UART[4].PowerGating = 2
UART[4].DmaEnable = 1
UART[5].Mode = 0
UART[5].Attributes.BaudRate = 115200
UART[5].Attributes.Parity = 1
UART[5].Attributes.DataBits = 8
UART[5].Attributes.StopBits = 1
UART[5].Attributes.AutoFlow = 0
UART[5].PinMux.Rx = 0x0
UART[5].PinMux.Tx = 0x0
UART[5].PinMux.Rts = 0x0
UART[5].PinMux.Cts = 0x0
UART[5].DBG2 = 0
UART[5].PowerGating = 2
UART[5].DmaEnable = 0
UART[6].Mode = 0
UART[6].Attributes.BaudRate = 115200
UART[6].Attributes.Parity = 1
UART[6].Attributes.DataBits = 8
UART[6].Attributes.StopBits = 1
UART[6].Attributes.AutoFlow = 0
UART[6].PinMux.Rx = 0x0
UART[6].PinMux.Tx = 0x0
UART[6].PinMux.Rts = 0x0
UART[6].PinMux.Cts = 0x0
UART[6].DBG2 = 0
UART[6].PowerGating = 2
UART[6].DmaEnable = 0
I2C[0].Mode = 1
I2C[0].PinMux.Sda = 0x0
I2C[0].PinMux.Scl = 0x0
I2C[0].PadTermination = 0
I2C[1].Mode = 1
I2C[1].PinMux.Sda = 0x0
I2C[1].PinMux.Scl = 0x0
I2C[1].PadTermination = 0
I2C[2].Mode = 0
I2C[2].PinMux.Sda = 0x0
I2C[2].PinMux.Scl = 0x0
I2C[2].PadTermination = 0
I2C[3].Mode = 0
I2C[3].PinMux.Sda = 0x0
I2C[3].PinMux.Scl = 0x0
I2C[3].PadTermination = 0
I2C[4].Mode = 0
I2C[4].PinMux.Sda = 0x0
I2C[4].PinMux.Scl = 0x0
I2C[4].PadTermination = 0
I2C[5].Mode = 0
I2C[5].PinMux.Sda = 0x0
I2C[5].PinMux.Scl = 0x0
I2C[5].PadTermination = 0
I2C[6].Mode = 0
I2C[6].PinMux.Sda = 0x0
I2C[6].PinMux.Scl = 0x0
I2C[6].PadTermination = 0
I2C[7].Mode = 0
I2C[7].PinMux.Sda = 0x0
I2C[7].PinMux.Scl = 0x0
I2C[7].PadTermination = 0
------------------------ SiCpuPolicy Print Begin in PostMem-----------------
Revision= 1
------------------ CPU Config ------------------
CPU_CONFIG : AesEnable : 0x1
CPU_CONFIG : TxtEnable : 0x0
CPU_CONFIG : MicrocodePatchAddress : 0xFFC15000
CPU_CONFIG : PpinSupport : 0x0
CPU_CONFIG : AvxDisable : 0x0
CPU_CONFIG : Avx3Disable : 0x0
CPU_CONFIG : RaceConditionResponse : 0x0
CPU_CONFIG : AcSplitLock : 0x0
CPU_CONFIG : SmbiosType4MaxSpeedOverride : 0
------------------ CPU BIOS Guard Config ------------------
BIOS_GUARD_CONFIG:: EcCmdProvisionEav : 0xFF
BIOS_GUARD_CONFIG:: EcCmdLock : 0xFF
BIOS_GUARD_CONFIG:: BiosGuardModulePtr : 0xFFFFFFFFFFFFFFFF
BIOS_GUARD_CONFIG:: Platform attributes : 0xFFFFFFFF
BIOS_GUARD_CONFIG:: SendEcCmd : 0xFFFFFFFF
------------------ CPU Power Mgmt Basic Config ------------------
CPU_POWER_MGMT_BASIC_CONFIG : OneCoreRatioLimit : 0x0 , TwoCoreRatioLimit = 0x0 , ThreeCoreRatioLimit = 0x0 , FourCoreRatioLimit = 0x0, FiveCoreRatioLimit = 0x0, SixCoreRatioLimit = 0x0, SevenCoreRatioLimit = 0x0, EightCoreRatioLimit = 0x0
CPU_POWER_MGMT_BASIC_CONFIG: Hwp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: SkipSetBootPState : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HdcControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: (Intel Turbo Boost Max Technology 3.0)EnableItbm : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2 : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TurboPowerLimitLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3DutyCycle : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetClamp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TurboMode : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccActivationOffset : 0xA
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2Power : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetTimeWindowForRatl : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HwpInterruptControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnablePerCorePState : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoPerCorePstate : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoEppGrouping : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableEpbPeciOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: EnableFastMsrHwpReq : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: MinRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: MaxRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: ApplyConfigTdp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionMs : 0x1E
------------------ CPU Power Mgmt Custom Config ------------------
CustomRatioTable...
CPU_POWER_MGMT_CUSTOM_CONFIG: VidNumber : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: VidCpuid : 0x6C1
CPU_POWER_MGMT_CUSTOM_CONFIG: VidMaxRatio : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[16] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[17] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[18] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[19] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[20] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[21] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[22] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[23] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[24] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[25] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[26] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[27] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[28] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[29] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[30] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[31] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[32] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[33] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[34] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[35] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[36] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[37] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[38] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[39] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpLock : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpBios : 0x0
------------------ CPU Power Mgmt Psys Config ------------------
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPmax : 0xAC
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1 : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Time : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2 : 0x0
------------------ CPU Test Config ------------------
CPU_TEST_CONFIG: MlcStreamerPrefetcher : 0x1
CPU_TEST_CONFIG: MlcSpatialPrefetcher : 0x1
CPU_TEST_CONFIG: MonitorMwaitEnable : 0x1
CPU_TEST_CONFIG: MachineCheckEnable : 0x1
CPU_TEST_CONFIG: ProcessorTraceOutputScheme : 0x0
CPU_TEST_CONFIG: ProcessorTraceEnable : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemBase : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemLength : 0x0
CPU_TEST_CONFIG: ThreeStrikeCounterDisable : 0x0
CPU_TEST_CONFIG: PcdCpuApLoopMode: 0x2
------------------ CPU PID Test Config ------------------
CPU_PID_TEST_CONFIG : PidTuning : 0x0
------------------ CPU Power Mgmt Test Config ------------------
CPU_POWER_MGMT_TEST_CONFIG: Eist : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientPState : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientTurbo : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TStates : 0x1
CPU_POWER_MGMT_TEST_CONFIG: BiProcHot : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableProcHotOut : 0x1
CPU_POWER_MGMT_TEST_CONFIG: ProcHotResponse : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableVrThermalAlert : 0x0
CPU_POWER_MGMT_TEST_CONFIG: EnableAllThermalFunctions : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ThermalMonitor : 0x1
CPU_POWER_MGMT_TEST_CONFIG: Cx : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PmgCstCfgCtrlLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1e : 0x0
CPU_POWER_MGMT_TEST_CONFIG: C1Autodemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1Undemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCState Demotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCstateUndemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CStatePreWake : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TimedMwait : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstCfgCtrIoMwaitRedirection : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ProcHotLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: RaceToHalt : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: PkgCStateLimit : 0x8
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CustomPowerUnit : 0x1
PpmIrmSetting : 0x0
------------------------ SiCpuPolicy Print End in PostMem -----------------
------------------------ TCSS_PEI_CONFIG -----------------
Revision : 3
TcssPeiConfig->IomAuxPortPad[0].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[0].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullP 0x00000000
TcssPeiConfig->UsbConfig.PortUsb30[0].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[1].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[2].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[3].Enable 0x00000001
TcssPeiConfig->IomConfig.IomOverrides.AuxOri 0x0000
TcssPeiConfig->IomConfig.IomOverrides.HslOri 0x0000
TcssPeiConfig->IomConfig.IomInterface.VccSt 1
TcssPeiConfig->IomConfig.IomInterface.UsbOverride 0
TcssPeiConfig->IomConfig.IomInterface.D3HotEnable 0
TcssPeiConfig->IomConfig.IomInterface.D3ColdEnable 1
TcssPeiConfig->IomConfig.TcStateLimit 10
TcssPeiConfig->IomConfig.DisableTccoldOnUsbConnected 0
TcssPeiConfig->MiscConfig.IomStayInTCColdeSeconds 50
TcssPeiConfig->MiscConfig.IomBeforeEnteringTCCodeSeconds 10
TcssPeiConfig->IomConfig.PmcInterface.PmcPdEnable 1
------------------------ SA_PEI_PCIE_COMMON_CONFIG -----------------
Itbt Root Port 0 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 1 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 2 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 60
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 3 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
[TBT] TbtPrintPolicyConfig Start
------------------------ ITBT Policy (PEI) Print BEGIN -----------------
Revision : 0x1
Revision : 2
PeiITbtConfig->ITbtGenericConfig.ITbtForcePowerOnTimeoutInMs = 1F4
PeiITbtConfig->ITbtGenericConfig.ITbtConnectTopologyTimeoutInMs = 1388
PeiITbtConfig->ITbtGenericConfig.ITbtPcieTunnelingForUsb4 = 1
PeiITbtConfig->ITbtRootPortConfig[0].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[1].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[2].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[3].ITbtPcieRootPortEn = 0
------------------------ ITBT Policy (PEI) Print END -----------------
------------------------ CPU_PCIE_Config -----------------
FiaProgramming = 1
ClockGating= 1
PowerGating= 1
SlotSelection= 1
Serl : 0x1
ComplianceTestMode= 0
RpFunctionSwap= 1
EnablePeerMemoryWrite= 0
PcieDeviceOverrideTablePtr= 0
RootPort[0] PcieGen3PresetCoeffSelection= 1
RootPort[0] PcieGen4PresetCoeffSelection= 1
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ExtSync= 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] DpcEnabled= 1
RootPort[0] RpDpcExtensionsEnabled= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] VcEnabled= 1
RootPort[0] MultiVcEnabled= 0
RootPort[0] PeerToPeer= 0
RootPort[0] FOMS Control Policy= 0
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] Gen3EqPh3Method= 1
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 2
RootPort[0] L1Substates= 2
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] Gen3Uptp= 7
RootPort[0] Gen3Dptp= 7
RootPort[0] Gen4Uptp= 8
RootPort[0] gen4Dptp= 9
RootPort[0] Gen5Uptp= 7
RootPort[0] gen5Dptp= 7
RootPort[0] EnableCpm= 1
RootPort[0] HwEqGen3Coeff0ListCm= 3
RootPort[0] HwEqGen3Coeff1ListCm= 3
RootPort[0] HwEqGen3Coeff2ListCm= 0
RootPort[0] HwEqGen3Coeff3ListCm= 0
RootPort[0] HwEqGen3Coeff4ListCm= 0
RootPort[0] HwEqGen3Coeff0ListCp= 4
RootPort[0] HwEqGen3Coeff1ListCp= 4
RootPort[0] HwEqGen3Coeff2ListCp= 0
RootPort[0] HwEqGen3Coeff3ListCp= 0
RootPort[0] HwEqGen3Coeff4ListCp= 0
RootPort[0] HwEqGen4Coeff0ListCm= 6
RootPort[0] HwEqGen4Coeff1ListCm= 6
RootPort[0] HwEqGen4Coeff2ListCm= 0
RootPort[0] HwEqGen4Coeff3ListCm= 0
RootPort[0] HwEqGen4Coeff4ListCm= 0
RootPort[0] HwEqGen4Coeff0ListCp= A
RootPort[0] HwEqGen4Coeff1ListCp= A
RootPort[0] HwEqGen4Coeff2ListCp= 0
RootPort[0] HwEqGen4Coeff3ListCp= 0
RootPort[0] HwEqGen4Coeff4ListCp= 0
------------------------ CPU_PCIE_Config Print END -----------------
------------------ CPU Power Mgmt VR Config ------------------
CPU_POWER_MGMT_VR_CONFIG : VrConfigEnable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcCurrentLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : DcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Psi1Threshold[0] : 0x50
CPU_POWER_MGMT_VR_CONFIG : Psi2Threshold[0] : 0x14
CPU_POWER_MGMT_VR_CONFIG : Psi3Threshold[0] : 0x4
CPU_POWER_MGMT_VR_CONFIG : Psi3Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : Psi4Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : ImonSlope[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : ImonOffset[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : IccMax[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : VrVoltageLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcEnable[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcTimeWindow[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcLock[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Irms[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG:: FastPkgCRampDisable for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SlowSlewRate for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysSlope : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysOffset : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcousticNoiseMitigation : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SendVrMbxCmd : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrRfiFrequency : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrSpectrumEnable : 0x1
CPU_POWER_MGMT_VR_CONFIG : FivrSpreadSpectrum : 0x8
CPU_POWER_MGMT_VR_CONFIG : EnableMinVoltageOverride : 0x0
CPU_POWER_MGMT_VR_CONFIG : PreWake : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampUp : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampDown : 0x0
CPU_POWER_MGMT_VR_CONFIG : RfiMitigation : 0x0
Install PPI: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Notify: PPI Guid: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779, Peim notify entry point: 76F019C7
SiInit () - Start
FuSA supported sku detected
FusaInit() Start
Disable C1e in fusa mode
IOP FUSA override Function
OPIO FUSA override Fuction
Enable Fusa on Opio
Enable Fusa on Graphics
Enable Fusa on Display
PSF CPU FUSA override Function
Read Default PSF Config = 0360
Read Default PSF Config = 0360
Enable Fusa on PSF
Read After PSF Config = 0F60
Read After PSF Config = 0F60
Lock FUSA Display Lock Bit 0x3000301
Lock FUSA Graphics Lock Bit 0x41
FusaInit() End
FuSA supported sku detected
ConfigurePsmi () - Start
ConfigurePsmi () - PSMI disabled
PeiSiPolicyOverride ()
SubsystemID programming on Internal Devices
MePostMemInit () - Start
POSTCODE=<00009E02> - ME-BIOS: MBP Entry.
PrepareMeBiosPayload () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80080007
00: F0 02 00 00 00 00 00 00
[HECI1] Got msg Success: 80CC0007
00: F0 82 00 00 32 0D 00 00 - 01 01 03 02 0F 00 00 00
10: 23 00 9F 07 01 04 09 03 - FD 52 A0 98 F8 47 6B 93
20: DB C5 E9 CD 0C A8 D5 C4 - 10 42 C7 54 24 A7 FD C0
30: 87 5B 22 68 98 FF 7C 3D - 01 07 04 02 00 00 00 00
40: 00 00 00 00 9B 01 00 00 - 01 0F 02 02 00 00 00 00
50: 05 01 02 02 01 00 01 00 - 05 03 04 02 0D 71 FF FF
60: FF FF 08 06 10 00 08 00 - 08 02 0A 03 B2 DC 7A F5
70: EB A0 A9 38 F3 2F 07 75 - E2 8C 09 FA F0 D5 4D 5B
80: 5E FE 99 BB 96 F0 7C A2 - 04 3C D8 52 58 8B 4C 26
90: 01 08 02 00 00 00 00 00 - 01 05 02 00 91 03 00 42
A0: 01 02 02 00 00 92 31 31 - 01 09 02 00 07 50 F6 21
B0: 01 0E 02 02 01 01 04 00 - 01 0D 05 02 01 00 00 00
C0: 32 01 0E 02 1A 00 0D 00 - 00 00 00 00
ReadMsg returned Success
MsgGetMbpAck->MkhiHeader.Fields.Command = 2
MsgGetMbpAck->MkhiHeader.Fields.IsResponse = 1
MsgGetMbpAck->MkhiHeader.Fields.Result = 0
No. of Mbp Entries: 13
MBP Item 0 header: 02030101
00: 0F 00 00 00 23 00 9F 07
MBP Item 1 header: 03090401
00: FD 52 A0 98 F8 47 6B 93 - DB C5 E9 CD 0C A8 D5 C4
10: 10 42 C7 54 24 A7 FD C0 - 87 5B 22 68 98 FF 7C 3D
Unknown MBP Item 2 header: 02040701
MBP Item 3 header: 02020F01
00: 00 00 00 00
Unknown MBP Item 4 header: 02020105
MBP Item 5 header: 02040305
00: 0D 71 FF FF FF FF 08 06 - 10 00 08 00
Unknown MBP Item 6 header: 030A0208
MBP Item 7 header: 00020801
00: 00 00 00 00
MBP Item 8 header: 00020501
00: 91 03 00 42
MBP Item 9 header: 00020201
00: 00 92 31 31
MBP Item 10 header: 00020901
00: 07 50 F6 21
MBP Item 11 header: 02020E01
00: 01 01 04 00
Unknown MBP Item 12 header: 02050D01
HECI reset: clearing buffer from MBP Sensitive data.
[HECI1] Resetting interface
[HECI1] - Step1 Enable Host Reset : H_CSR = 0x800E0E08
[HECI1] - Step2 Wait for reset started: H_CSR = 0x800E0E1C
[HECI1] - Step3 Wait for ME reset: ME_CSR_HA = 0x80000008
Install PPI: ED7C9CE9-5912-4807-EC90-2218BC7BFC6C
------------------------ MeBiosPayload Data Protocol Print Begin -----------------
Revision : 0x1
MeBiosPayload FwVersionName ---
ME FW MajorVersion : 15
ME FW MinorVersion : 0
ME FW HotfixVersion : 35
ME FW BuildVersion : 1951
MeBiosPayload FwCapabilities ---
FullMng : 0x0
StdMng : 0x0
Amt : 0x0
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x0
KVM : 0x0
DAL : 0x1
TLS : 0x1
WLAN : 0x0
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload FwFeaturesState ---
FullMng : 0x1
StdMng : 0x1
Amt : 0x1
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x1
KVM : 0x1
DAL : 0x1
TLS : 0x1
WLAN : 0x1
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload ME Platform Type ---
PlatformTargetUsageType : 0x1
SuperSku : 0x0
IntelMeFwImageType : 0x3
PlatformBrand : 0x0
MeBiosPayload UnconfigOnRtcClearState ---
UnconfigOnRtcClearData : 0x0
MeBiosPayload ArbSvnState ---
Flags : 0x1
MinCseArbSvn : 0x1
CurrCseArbSvn : 0x4
MeBiosPayload MeasuredBootSupport ---
MeasuredBoot : 0x0
Sensitive Data Revision : 0x1
MeBiosPayload Platform Key ---
Key[0x0] : 0x98A052FD
Key[0x1] : 0x936B47F8
Key[0x2] : 0xCDE9C5DB
Key[0x3] : 0xC4D5A80C
Key[0x4] : 0x54C74210
Key[0x5] : 0xC0FDA724
Key[0x6] : 0x68225B87
Key[0x7] : 0x3D7CFF98
------------------------ MeBiosPayload Data Protocol Print End -------------------
POSTCODE=<00009E22> - ME-BIOS: MBP Exit - Success.
MeDeviceConfigure () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
Current MeBiosBootPath - 0
ME FW HOB installed
ME FW HOB data updated
Current ME FW HOB data printed -
00: 04 00 A8 00 00 00 00 00 - 62 5E 88 52 4D 4C 46 95
10: 2D BA 2A 84 89 EE A8 A3 - 01 04 00 00 00 00 00 00
20: 55 02 00 90 16 01 10 80 - 20 00 00 00 00 40 00 00
30: 00 00 00 00 00 00 40 00 - 01 00 00 00 FF FF FF FF
40: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
50: FF FF FF FF 04 00 00 00 - 00 00 00 80 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 05 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00
[HECI2] Setting D0I3 bit
[HECI2] Function is disabled, can't set D0I3 bit!
Disabling CSME device 0:22:1
[HECI3] Setting D0I3 bit
[HECI3] D0I3C register = 00000015
Disabling CSME device 0:22:4
Disabling CSME device 0:22:3
Disabling CSME device 0:22:2
MeDeviceInit [HECI4] H: 00000000, L: FE600000
POSTCODE=<00009004> - ME Device Init
Program HECI MMIO address
[HECI4] Setting D0I3 bit
[HECI4] D0I3C register = 00000015
Disabling CSME device 0:22:5
MeDeviceConfigureInterrupts () for MeDev = 0
MeDeviceConfigureInterrupts () for MeDev = 1
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 2
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 3
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 4
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 5
MeDeviceConfigureInterrupts () exit (Device disabled)
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
MePostMemInit () - End
POSTCODE=<00009B00>
PchInit - Start
PchHsioMiscBiosProg() Start
Installing HSIO ChipsetInit SUS Table Data PPI
Install PPI: 97ED4E5D-01A5-4A3C-B7E9-1A4EA3DD23CE
PchHsioMiscBiosProg() End
ConfigureSata() Started (SATA controler index: 0)
EarlyConfigureSata() Started (SATA controller reg base: 0x000B8000)
EarlyConfigureSata() Ended (SATA controller reg base: 0x000B8000)
ConfigureSataAhci() Started (SATA controler index: 0)
ConfigureSataAhci() Ended (SATA controler index: 0)
ConfigureSata() Ended (SATA controler index: 0)
HybridStorageCheckAndConfigureClkreq Entry
HybridStorageCheckAndConfigureClkreq Exit
GbeInit() Start
GbePmcEnabled: 0
No FIA lanes assigned as GbE
GbeLaneNum: No lanes assigned
GbeRegionValid: 1
GbePresent: 0
LAN disabled
GbeInit() End
PchSpiExtendedBiosDecodeRangeInit - Extended BIOS decode range is disabled. Skipping initialization.
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
CridSupport = 0 20 20
PcieRpInit() Start
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 3 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 4 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 5 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 9 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 10 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 12 has a device attached.
PcieConfigureControllerBasePowerManagement(1)
PchPcieConfigureBasePowerManagement(1) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(2) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(3) Start
PchPcieConfigureBasePowerManagement(4) Start
PcieConfigureControllerBasePowerManagement(5)
PchPcieConfigureBasePowerManagement(5) Start
PchPcieConfigureBasePowerManagement(6) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(7) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(8) Start
Setting DLSULPPGE+DLSULDLSD.
PcieConfigureControllerBasePowerManagement(9)
PchPcieConfigureBasePowerManagement(9) Start
PchPcieConfigureBasePowerManagement(10) Start
PchPcieConfigureBasePowerManagement(11) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(12) Start
WaitForLinkActive, RP mask to wait for = 0x00000B1C
WaitForLinkActive, all RPs done, lost 0ms waiting
DisablePcieRootPort(1) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(2) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (3) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:2
RecursiveBusAssignmentE 0:1C:2 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:2 -> 0,2,2
RecursiveMpsCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:2
RecursiveCccConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (4) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:3
RecursiveBusAssignmentE 0:1C:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:3 -> 0,2,2
RecursiveMpsCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:3
RecursiveCccConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (5) Start
VID: 11F8 DID: 4036 MLS: 4
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
Starting Equalization with following settings:
EQCFG1: 0x00001100
EQCFG2: 0x00042002
HAEQ: 0x00000E00
HW EQ finished, results:
EQCFG1: 0x00001100
LSTS2: 0x001F
Training time = 17170us
5.0 FOM Scoreboard:
0:021 1:017 2:022
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
5.1 FOM Scoreboard:
0:026 1:027 2:024
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
5.2 FOM Scoreboard:
0:016 1:016 2:019
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
5.3 FOM Scoreboard:
0:024 1:024 2:019
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:4
RecursiveBusAssignmentE 0:1C:4 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentE 2:0:0 -> 2,3,A
IsPcieDevice 03:00:00 - yes
RecursiveBusAssignmentE 3:0:0 -> 3,4,A
RecursiveBusAssignmentL 3:0:0 -> 3,4,4
IsPcieDevice 03:01:00 - yes
RecursiveBusAssignmentE 3:1:0 -> 3,5,A
RecursiveBusAssignmentL 3:1:0 -> 3,5,5
IsPcieDevice 03:02:00 - yes
RecursiveBusAssignmentE 3:2:0 -> 3,6,A
RecursiveBusAssignmentL 3:2:0 -> 3,6,6
IsPcieDevice 03:03:00 - yes
RecursiveBusAssignmentE 3:3:0 -> 3,7,A
RecursiveBusAssignmentL 3:3:0 -> 3,7,7
IsPcieDevice 03:04:00 - yes
RecursiveBusAssignmentE 3:4:0 -> 3,8,A
IsPcieDevice 08:00:00 - yes
RecursiveBusAssignmentL 3:4:0 -> 3,8,8
RecursiveBusAssignmentL 2:0:0 -> 2,3,8
RecursiveBusAssignmentL 0:1C:4 -> 0,2,8
RecursiveMpsCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsCheck 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsCheck 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsCheck 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsCheck 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsCheck 8:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsConfiguration 8:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveIoApicCheck 3:0:0
HasChildBus03:00:00: yes, 4
IoApic status 0 @0:3:0:0
IsPcieDevice 03:01:00 - yes
RecursiveIoApicCheck 3:1:0
HasChildBus03:01:00: yes, 5
IoApic status 0 @0:3:1:0
IsPcieDevice 03:02:00 - yes
RecursiveIoApicCheck 3:2:0
HasChildBus03:02:00: yes, 6
IoApic status 0 @0:3:2:0
IsPcieDevice 03:03:00 - yes
RecursiveIoApicCheck 3:3:0
HasChildBus03:03:00: yes, 7
IoApic status 0 @0:3:3:0
IsPcieDevice 03:04:00 - yes
RecursiveIoApicCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveIoApicCheck 8:0:0
HasChildBus : : : no
IoApic status 0 @0:8:0:0
IoApic status 0 @0:3:4:0
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:4
RecursiveCccConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCccConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveCccConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveCccConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveCccConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveCccConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveCccConfiguration 8:0:0
HasChildBus : : : no
IsPcieDevice 08:00:00 - yes
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
DisablePcieRootPort(6) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(7) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(8) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (9) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:0
RecursiveBusAssignmentE 0:1D:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:0 -> 0,2,2
RecursiveMpsCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:0
RecursiveCccConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (10) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:1
RecursiveBusAssignmentE 0:1D:1 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:1 -> 0,2,2
RecursiveMpsCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:1
RecursiveCccConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
DisablePcieRootPort(11) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (12) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:3
RecursiveBusAssignmentE 0:1D:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:3 -> 0,2,2
RecursiveMpsCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:3
RecursiveCccConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
PcieRpInit() End
POSTCODE=<00009B04>
[Usb2PhyProgramming] Start
USB2 PHY is accesible
Programming USB2 PHY register 0x4001 to 0x2F3DB806
Warning! Data mismatch after write. Read 2E3DB806
Programming USB2 PHY register 0x402B to 0x006A4005
Programming USB2 PHY register 0x402C to 0x09A25380
Programming USB2 PHY register 0x7F04 to 0x0000C680
Programming USB2 PHY register 0x702C to 0x0088C200
[Usb2PhyClockDependentProgramming] Programming USB2 PHY parameters based on freq enum: 0
Programming USB2 PHY register 0x7000 to 0x64641E08
Programming USB2 PHY register 0x702C to 0x0088C200
Programming USB2 PHY register 0x7008 to 0x222B5A20
Programming USB2 PHY register 0x7014 to 0x59E94D18
Programming USB2 PHY register 0x7024 to 0x3001E800
### PpLane 1
Programming USB2 PHY register 0x4100 to 0xFC05B091
Programming USB2 PHY register 0x4126 to 0x4382924B
Programming USB2 PHY register 0x4108 to 0x0000DAD0
### PpLane 2
Programming USB2 PHY register 0x4200 to 0xFC05B091
Programming USB2 PHY register 0x4226 to 0x4382924B
Programming USB2 PHY register 0x4208 to 0x0000DAD0
### PpLane 3
Programming USB2 PHY register 0x4300 to 0xFC05B091
Programming USB2 PHY register 0x4326 to 0x4382924B
Programming USB2 PHY register 0x4308 to 0x0000DAD0
### PpLane 4
Programming USB2 PHY register 0x4400 to 0xFC05B091
Programming USB2 PHY register 0x4426 to 0x4382924B
Programming USB2 PHY register 0x4408 to 0x0000DAD0
### PpLane 5
Programming USB2 PHY register 0x4500 to 0xFC05B091
Programming USB2 PHY register 0x4526 to 0x4382924B
Programming USB2 PHY register 0x4508 to 0x0000DAD0
### PpLane 6
Programming USB2 PHY register 0x4600 to 0xFC05B091
Programming USB2 PHY register 0x4626 to 0x4382924B
Programming USB2 PHY register 0x4608 to 0x0000DAD0
### PpLane 7
Programming USB2 PHY register 0x4700 to 0xFC05B091
Programming USB2 PHY register 0x4726 to 0x4382924B
Programming USB2 PHY register 0x4708 to 0x0000DAD0
### PpLane 8
Programming USB2 PHY register 0x4800 to 0xFC05B091
Programming USB2 PHY register 0x4826 to 0x4382924B
Programming USB2 PHY register 0x4808 to 0x0000DAD0
### PpLane 9
Programming USB2 PHY register 0x4900 to 0xFC05B091
Programming USB2 PHY register 0x4926 to 0x4382924B
Programming USB2 PHY register 0x4908 to 0x0000DAD0
### PpLane 10
Programming USB2 PHY register 0x4A00 to 0xFC05B091
Programming USB2 PHY register 0x4A26 to 0x4382924B
Programming USB2 PHY register 0x4A08 to 0x0000DAD0
POSTCODE=<00009B05>
POSTCODE=<00009B06>
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0xA0ED
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
xHCI: PEI phase PDO programming
xHCI: Usb2DisabledPorts = 0x100
xHCI: Usb3DisabledPorts = 0x0
HsPortCount 12, SsPortCount 4
XhciUsb2PdoMask 0x00000FFF, XhciUsb3PdoMask 0x0000000F
XhciUsb2Pdo 0x00000100, XhciUsb3Pdo 0x00000000
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 12
Test for XHCI_MEM_DAP_ESS_PORT
XhciConfigure() - End
POSTCODE=<00009B08>
xDCI Controller DID: 0xA0EE
xDCI: Device enabled
POSTCODE=<00009B0A>
Dmi14 R_PCH_OPDMI14_PCR_LPMC = 7E201500
Dmi14 R_PCH_OPDMI14_PCR_LCTL = 8
POSTCODE=<00009B0B>
POSTCODE=<00009B0C>
POSTCODE=<00009B0D>
------------------ IRQ Usage ------------------
IRQxxx USED
IRQ000 0
IRQ001 0
IRQ002 0
IRQ003 0
IRQ004 0
IRQ005 0
IRQ006 0
IRQ007 0
IRQ008 0
IRQ009 0
IRQ010 0
IRQ011 0
IRQ012 0
IRQ013 0
IRQ014 0
IRQ015 0
IRQ016 1
IRQ017 1
IRQ018 1
IRQ019 1
IRQ020 1
IRQ021 1
IRQ022 1
IRQ023 1
IRQ024 1
IRQ025 1
IRQ026 0
IRQ027 1
IRQ028 0
IRQ029 1
IRQ030 1
IRQ031 1
IRQ032 1
IRQ033 1
IRQ034 1
IRQ035 1
IRQ036 1
IRQ037 1
IRQ038 1
IRQ039 0
IRQ040 1
IRQ041 0
IRQ042 1
IRQ043 1
IRQ044 0
IRQ045 0
IRQ046 0
IRQ047 0
IRQ048 0
IRQ049 0
IRQ050 0
IRQ051 0
IRQ052 0
IRQ053 0
IRQ054 0
IRQ055 0
IRQ056 0
IRQ057 0
IRQ058 0
IRQ059 0
IRQ060 0
IRQ061 0
IRQ062 0
IRQ063 0
IRQ064 0
IRQ065 0
IRQ066 0
IRQ067 0
IRQ068 0
IRQ069 0
IRQ070 0
IRQ071 0
IRQ072 0
IRQ073 0
IRQ074 0
IRQ075 0
IRQ076 0
IRQ077 0
IRQ078 0
IRQ079 0
IRQ080 0
IRQ081 0
IRQ082 0
IRQ083 0
IRQ084 0
IRQ085 0
IRQ086 0
IRQ087 0
IRQ088 0
IRQ089 0
IRQ090 0
IRQ091 0
IRQ092 0
IRQ093 0
IRQ094 0
IRQ095 0
IRQ096 0
IRQ097 0
IRQ098 0
IRQ099 0
IRQ100 0
IRQ101 0
IRQ102 0
IRQ103 0
IRQ104 0
IRQ105 0
IRQ106 0
IRQ107 0
IRQ108 0
IRQ109 0
IRQ110 0
IRQ111 0
IRQ112 0
IRQ113 0
IRQ114 0
IRQ115 0
IRQ116 0
IRQ117 0
IRQ118 0
IRQ119 0
IRQ120 0
IRQ121 0
IRQ122 0
IRQ123 0
IRQ124 0
IRQ125 0
IRQ126 0
CnviInit() - Start
CNVi has been fused out
ThcInit() Start
ThcInit() End
POSTCODE=<00009B14>
IshInit() Start
POSTCODE=<00009B15>
Retention is not supported on this stepping overriding the Retention transition times to 0 in VCCIN_AUX_CFG1
SerialIoInit() Start
SerialIoSpiInit() Start
SerialIoSpiInit() End
SerialIoI2cInit() Start
SerialIoI2cInit() End
SerialIoUartInit() Start
SerialIoUartInit() End
SerialIoInit() End
InstallI2cMasterPpi End
Install PPI: B3BFAB9B-9F9C-4E8B-AD37-7F8C51FC6280
[ConfigureEspi] Entry.[ConfigureEspi] eSPI is disabled through strapIEH: Workaround to mask global error registers and clear error status
HybridStorageDynamicDetectionAndConfig() Start
HybridStorage Policy not enabled
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
PsfConfigurePcieGrantCounts() Start
SPA[0] - DGCR12 = 1
SPA[0] - PG1_TGT0 = 1
SPA[1] - DGCR13 = 1
SPA[1] - PG1_TGT1 = 1
SPA[2] - DGCR14 = 1
SPA[2] - PG1_TGT2 = 1
SPA[3] - DGCR15 = 1
SPA[3] - PG1_TGT3 = 1
SPB[0] - DGCR16 = 4
SPB[0] - PG1_TGT5 = 4
SPC[0] - DGCR20 = 1
SPC[0] - PG1_TGT10 = 1
SPC[1] - DGCR21 = 1
SPC[1] - PG1_TGT11 = 1
SPC[2] - DGCR22 = 1
SPC[2] - PG1_TGT12 = 1
SPC[3] - DGCR23 = 1
SPC[3] - PG1_TGT13 = 1
PsfConfigurePcieGrantCounts() End
ChipsetInitSync() Start
Get CSME ChipsetInit Version Data from MBP
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0xFFFF
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 0
//Base CRC Valid: 1
BIOS Computed SUS Table CRC: 7D0C
[HECI1] MeMode 0 (Hfsts1: 90000255)
Read ChipsetInit Binary from CSME
PeiHeciReadChipsetInitMsg(): Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80240008
00: 00 00 05 00 0A 00 00 00 - 00 00 00 00 10 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 20 00 00
[HECI1] Got msg Success: 01FC0008
00: 00 00 05 00 0A 00 00 00 - 00 00 00 00 10 14 00 00
10: 00 00 00 00 00 00 00 00 - FC 13 00 00 00 00 00 00
20: FC 13 00 00 00 00 00 00 - 0D 71 FF FF FF FF 08 06
30: 10 00 08 00 00 00 44 44 - 45 A5 00 0F 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 28 AB 07 00 - 01 00 04 80 60 00 00 20
60: 28 AB 07 00 01 00 30 80 - 01 04 30 00 28 AB 07 00
70: 01 00 3C 80 06 00 00 00 - 28 AB 07 00 04 00 E8 80
80: 80 08 0C 3C 28 AB 07 00 - 0F 00 80 81 19 00 00 00
90: 28 AB 07 00 07 00 88 81 - 00 00 00 00 28 AB 07 00
A0: 0F 00 90 81 02 07 01 0C - 28 AB 07 00 04 00 98 81
B0: 00 00 02 00 28 AB 07 00 - 05 00 9C 81 03 00 1C 00
C0: 28 AB 07 00 07 00 A0 81 - 00 00 00 00 28 AB 07 00
D0: 05 00 A8 81 06 00 1F 00 - 28 AB 07 00 03 00 AC 81
E0: 0B 03 00 00 28 AB 07 00 - 0A 00 B0 81 00 3C 00 78
F0: 28 AB 07 00 01 00 C8 81 - 01 00 00 00 28 AB 07 00
00: 01 00 CC 81 01 00 00 00 - 0F 00 00 00 28 AB 07 00
10: 08 00 E8 86 00 48 17 1A - 28 AB 07 00 02 00 1C 84
20: 00 C0 00 60 28 AB 07 00 - 02 00 40 84 F0 A0 02 FF
30: 28 AB 07 00 08 00 60 86 - 08 00 08 F3 28 AB 07 00
40: 02 00 C0 86 00 10 88 1B - 28 AB 07 00 02 00 8C 85
50: 00 08 1F 20 28 AB 07 00 - 0F 00 F0 86 20 28 28 28
60: 28 AB 07 00 02 00 30 86 - 50 C0 00 BE 28 AB 07 00
70: 08 00 58 86 09 A0 32 81 - 28 AB 07 00 08 00 20 87
80: 04 02 12 08 28 AB 07 00 - 07 00 44 86 4E DE 05 01
90: 28 AB 07 00 06 00 54 87 - 80 50 06 00 28 AB 07 00
A0: 02 00 3C 84 02 9F 00 00 - 28 AB 07 00 02 00 20 86
B0: 00 44 00 00 28 AB 07 00 - 04 00 D4 86 C0 80 82 00
C0: 28 AB 07 00 08 00 9C 85 - 00 0C 49 22 28 AB 07 00
D0: 08 00 10 86 FF 01 C8 1E - 28 AB 07 00 04 00 14 86
E0: 9F 63 0C 03 28 AB 07 00 - 01 00 3C 86 F0 00 00 00
F0: 28 AB 07 00 07 00 2C 86 - 5A 10 08 00
[HECI1] Got msg Success: 01FC0008
00: 28 AB 07 00 0F 00 08 86 - 50 FF FF 3F 28 AB 07 00
10: 08 00 28 87 00 00 04 FC - 28 AB 07 00 07 00 4C 86
20: 07 C9 05 01 28 AB 07 00 - 01 00 20 84 25 16 07 0D
30: 28 AB 07 00 07 00 8C 86 - 58 40 04 00 28 AB 07 00
40: 03 00 4C 87 FF 08 01 00 - 28 AB 07 00 07 00 64 86
50: 00 A4 00 00 28 AB 07 00 - 01 00 50 87 6E 80 10 10
60: 28 AB 07 00 04 00 78 86 - 60 40 83 40 28 AB 07 00
70: 0F 00 80 86 60 17 A0 01 - 28 AB 07 00 0C 00 A0 86
80: EC 70 C0 28 28 AB 07 00 - 0F 00 C4 86 D1 EC 21 E4
90: 28 AB 07 00 01 00 28 84 - E0 01 02 01 28 AB 07 00
A0: 05 00 0C 86 FF 9B 92 00 - 28 AB 07 00 08 00 50 86
B0: 3F 3F 3F 05 28 AB 07 00 - 01 00 AC 86 EC 60 00 00
C0: 28 AB 07 00 0C 00 24 87 - 22 22 26 10 28 AB 07 00
D0: 01 00 54 86 02 00 C0 88 - 28 AB 07 00 01 00 54 85
E0: 06 2A 29 28 28 AB 07 00 - 04 00 C8 86 50 88 8D 3F
F0: 28 AB 07 00 04 00 9C 86 - 00 00 2C 00 28 AB 07 00
00: 02 00 18 86 BF 00 00 00 - 28 AB 07 00 0F 00 EC 86
10: 04 80 00 00 28 AB 07 00 - 0E 00 08 87 45 F4 DF CC
20: 28 AB 07 00 07 00 A4 86 - 28 28 28 00 28 AB 07 00
30: 01 00 70 86 5E 25 40 40 - 28 AB 07 00 0B 00 88 86
40: 20 70 74 E4 28 AB 07 00 - 04 00 48 87 88 0A 8D D7
50: 28 AB 07 00 06 00 40 87 - 0A 00 E2 16 28 AB 07 00
60: 04 00 00 84 00 01 89 80 - 28 AB 07 00 08 00 1C 86
70: 08 10 3B 68 28 AB 07 00 - 01 00 1C 87 03 7F 1B 1B
80: 28 AB 07 00 0F 00 E4 86 - 50 45 0B 1C 28 AB 07 00
90: 01 00 5C 86 2E 08 3B 00 - 28 AB 07 00 07 00 04 84
A0: 64 C0 11 00 28 AB 07 00 - 08 00 24 84 10 0A 0B A4
B0: 28 AB 07 00 05 00 40 86 - 58 CF 05 01 28 AB 07 00
C0: 0A 00 00 86 70 A8 52 0B - 28 AB 07 00 01 00 18 84
D0: 7C 00 89 02 28 AB 07 00 - 02 00 58 85 20 1E 1F 15
E0: 28 AB 07 00 08 00 84 85 - 08 0A 00 08 28 AB 07 00
F0: 05 00 04 86 09 09 0F 00 - 28 AB 07 00
[HECI1] Got msg Success: 01FC0008
00: 06 00 10 84 00 00 BF 72 - 28 AB 07 00 0F 00 18 87
10: 00 0C 00 01 28 AB 07 00 - 05 00 68 86 2A 82 10 B8
20: 28 AB 07 00 01 00 64 86 - 08 A4 00 00 0F 00 00 00
30: 28 AB 07 00 0C 00 48 93 - 88 0A 8A D3 28 AB 07 00
40: 0F 00 5C 93 33 33 24 20 - 28 AB 07 00 02 00 64 91
50: 4C 60 4C 4C 28 AB 07 00 - 07 00 A4 92 1E 1E 1E 00
60: 28 AB 07 00 03 00 14 90 - 1D C5 00 11 28 AB 07 00
70: 0F 00 C4 92 D1 EC 01 E6 - 28 AB 07 00 0C 00 1C 93
80: 03 7F 21 21 28 AB 07 00 - 02 00 E4 92 40 A5 0B 4B
90: 28 AB 07 00 0F 00 18 93 - 01 00 00 4A 28 AB 07 00
A0: 02 00 54 93 80 54 02 00 - 28 AB 07 00 0F 00 24 90
B0: 0F 0C 0C A4 28 AB 07 00 - 01 00 28 90 E0 01 02 01
C0: 28 AB 07 00 0C 00 E8 92 - 00 48 26 1A 28 AB 07 00
D0: 01 00 20 90 26 16 07 0D - 28 AB 07 00 09 00 1C 92
E0: F8 10 3B 00 28 AB 07 00 - 0C 00 C8 92 50 88 8D 0D
F0: 28 AB 07 00 01 00 E0 92 - 32 60 00 08 28 AB 07 00
00: 04 00 AC 92 F6 60 00 00 - 28 AB 07 00 06 00 14 92
10: 9F 61 38 03 28 AB 07 00 - 0F 00 14 93 08 1C 05 0F
20: 28 AB 07 00 0F 00 24 93 - 36 38 B2 1F 28 AB 07 00
30: 0A 00 00 92 70 94 52 0B - 28 AB 07 00 07 00 44 93
40: 2B 1C 18 00 28 AB 07 00 - 07 00 4C 92 49 CD 05 01
50: 28 AB 07 00 03 00 4C 93 - DC 4F 01 00 28 AB 07 00
60: 0C 00 28 93 00 00 1A FF - 28 AB 07 00 08 00 60 92
70: 08 00 08 33 28 AB 07 00 - 03 00 58 93 A4 9C 8C 31
80: 28 AB 07 00 06 00 64 92 - 00 54 02 00 28 AB 07 00
90: 05 00 54 91 06 2A 2D 28 - 28 AB 07 00 05 00 68 92
A0: 06 82 10 B8 28 AB 07 00 - 03 00 44 90 97 48 09 64
B0: 28 AB 07 00 0F 00 80 92 - 40 17 04 04 28 AB 07 00
C0: 08 00 A0 92 EC 70 80 1E - 28 AB 07 00 01 00 10 93
D0: 68 00 40 00 28 AB 07 00 - 08 00 84 91 08 0A 00 08
E0: 28 AB 07 00 0F 00 88 92 - 10 30 77 64 28 AB 07 00
F0: 04 00 78 92 60 40 83 40 - 28 AB 07 00
[HECI1] Got msg Success: 01FC0008
00: 07 00 2C 92 0C 00 0B 00 - 28 AB 07 00 07 00 04 92
10: 09 0B 0F 00 28 AB 07 00 - 0D 00 40 92 4E CF 18 03
20: 28 AB 07 00 08 00 6C 92 - 00 24 04 5C 28 AB 07 00
30: 0F 00 20 93 04 21 03 0D - 28 AB 07 00 0F 00 0C 93
40: 1F E0 21 21 28 AB 07 00 - 01 00 3C 92 F0 00 00 00
50: 28 AB 07 00 01 00 0C 92 - E6 9B 52 00 28 AB 07 00
60: 02 00 18 92 BF 00 00 00 - 28 AB 07 00 01 00 5C 90
70: 96 BC 1F 3F 28 AB 07 00 - 04 00 00 90 00 01 89 80
80: 28 AB 07 00 0C 00 08 93 - 45 34 48 D0 28 AB 07 00
90: 01 00 50 93 6E 80 10 10 - 28 AB 07 00 04 00 04 93
A0: 80 AA 11 C0 28 AB 07 00 - 02 00 8C 91 00 08 1F 20
B0: 28 AB 07 00 0F 00 08 92 - 50 D1 EC 01 28 AB 07 00
C0: 04 00 7C 92 18 18 26 40 - 28 AB 07 00 09 00 CC 92
D0: 25 17 17 5B 28 AB 07 00 - 08 00 B4 92 40 40 81 08
E0: 28 AB 07 00 01 00 60 93 - 72 00 00 00 28 AB 07 00
F0: 07 00 8C 92 20 48 82 00 - 28 AB 07 00 0E 00 40 93
00: 0A 00 EB 1F 28 AB 07 00 - 03 00 70 92 58 26 40 40
10: 28 AB 07 00 09 00 10 92 - FB 01 C8 0A 28 AB 07 00
20: 04 00 04 90 44 00 21 00 - 0F 00 00 00 28 AA 07 00
30: 04 00 E8 80 80 08 0C 3C - 0F 00 00 00 28 AA 07 00
40: 04 00 14 86 1F 63 20 03 - 28 AA 07 00 02 00 40 84
50: 00 A0 02 FF 28 AA 07 00 - 0D 00 68 86 2A 82 00 B8
60: 28 AA 07 00 04 00 78 86 - 60 40 83 40 28 AA 07 00
70: 08 00 C0 86 00 00 88 5B - 28 AA 07 00 04 00 10 84
80: 00 00 BF 72 28 AA 07 00 - 05 00 40 86 58 CF 05 01
90: 28 AA 07 00 04 00 C8 86 - 50 88 8D 60 28 AA 07 00
A0: 07 00 2C 86 0A 10 0A 00 - 28 AA 07 00 0E 00 80 86
B0: 60 0F A0 E8 28 AA 07 00 - 07 00 8C 86 58 40 04 00
C0: 28 AA 07 00 02 00 E0 86 - 00 04 00 08 28 AA 07 00
D0: 04 00 C4 86 FF FF 3F FF - 28 AA 07 00 0F 00 64 84
E0: 00 02 1B E0 28 AA 07 00 - 01 00 38 84 7F 00 00 00
F0: 28 AA 07 00 05 00 0C 86 - FF 9B 12 00
[HECI1] Got msg Success: 01FC0008
00: 28 AA 07 00 08 00 24 84 - 10 0A 0B A4 28 AA 07 00
10: 01 00 18 84 7C 00 09 02 - 28 AA 07 00 04 00 BC 86
20: 80 00 10 00 28 AA 07 00 - 06 00 D4 86 C0 80 82 00
30: 28 AA 07 00 02 00 F4 86 - 00 0E 00 00 28 AA 07 00
40: 01 00 5C 86 2A 08 60 00 - 28 AA 07 00 03 00 88 86
50: 20 00 74 24 28 AA 07 00 - 08 00 B4 86 40 40 81 2C
60: 28 AA 07 00 08 00 A0 86 - EC 00 00 1C 28 AA 07 00
70: 03 00 64 86 00 54 00 00 - 28 AA 07 00 04 00 9C 86
80: 00 00 4C 00 28 AA 07 00 - 03 00 4C 86 07 C9 02 01
90: 28 AA 07 00 0A 00 74 86 - 49 FF 80 8D 28 AA 07 00
A0: 01 00 3C 86 F0 00 00 00 - 28 AA 07 00 0D 00 E4 86
B0: 50 05 0B 9C 28 AA 07 00 - 0F 00 F0 86 20 28 28 28
C0: 28 AA 07 00 01 00 28 84 - E0 01 02 01 28 AA 07 00
D0: 01 00 10 86 5F 01 C0 00 - 28 AA 07 00 07 00 A4 86
E0: 1C 1C 1C 00 28 AA 07 00 - 0F 00 EC 86 C4 00 00 00
F0: 28 AA 07 00 01 00 54 85 - 06 2A 29 28 28 AA 07 00
00: 09 00 54 86 02 00 C0 08 - 28 AA 07 00 04 00 00 84
10: 00 01 09 80 28 AA 07 00 - 07 00 04 84 64 C1 24 00
20: 28 AA 07 00 01 00 20 84 - 25 16 07 0D 28 AA 07 00
30: 02 00 3C 84 02 9F 00 00 - 28 AA 07 00 08 00 9C 85
40: 00 0C 49 22 28 AA 07 00 - 03 00 70 86 5A E5 40 40
50: 28 AA 07 00 01 00 90 86 - 48 30 50 75 28 AA 07 00
60: 08 00 84 85 08 0A 00 08 - 28 AA 07 00 03 00 24 86
70: FC 60 33 AA 28 AA 07 00 - 07 00 44 86 4E DE 05 01
80: 28 AA 07 00 08 00 50 86 - 3F 3F 3F 05 28 AA 07 00
90: 01 00 04 86 39 09 05 00 - 28 AA 07 00 02 00 20 86
A0: 00 4C 00 00 28 AA 07 00 - 0F 00 64 84 05 00 33 E0
B0: 28 AA 07 00 02 00 30 86 - 50 C0 00 BE 28 AA 07 00
C0: 0A 00 58 86 09 A0 31 81 - 28 AA 07 00 02 00 8C 85
D0: 00 08 1F 20 28 AA 07 00 - 0A 00 00 86 00 A8 52 00
E0: 28 AA 07 00 0F 00 08 86 - 50 FF FF 3F 28 AA 07 00
F0: 03 00 AC 86 EC 60 00 00 - 28 AA 07 00
[HECI1] Got msg Success: 01FC0008
00: 08 00 60 86 00 00 00 FF - 28 AA 07 00 02 00 1C 84
10: 00 C0 00 60 28 AA 07 00 - 09 00 1C 86 A8 00 3B 6E
20: 28 AA 07 00 01 00 64 86 - 08 54 00 00 0F 00 00 00
30: 28 AA 07 00 0F 00 64 8C - 00 00 33 E0 28 AA 07 00
40: 06 00 04 8C 44 01 24 00 - 28 AA 07 00 08 00 24 8C
50: 10 0A 0B A4 28 AA 07 00 - 01 00 1C 8E A8 00 3B 00
60: 28 AA 07 00 04 00 10 8C - 00 00 BF 72 28 AA 07 00
70: 0F 00 64 8C 00 02 1B E0 - 28 AA 07 00 02 00 00 8E
80: 00 69 52 09 28 AA 07 00 - 07 00 48 8E 4C 19 05 01
90: 28 AA 07 00 02 00 74 8E - 49 FF 80 8E 28 AA 07 00
A0: 0A 00 54 8E 00 01 C0 00 - 28 AA 07 00 01 00 04 8E
B0: 09 09 05 00 28 AA 07 00 - 08 00 B4 8E 40 40 81 2C
C0: 28 AA 07 00 02 00 20 8E - 00 48 00 00 28 AA 07 00
D0: 09 00 08 8E 50 18 E0 21 - 28 AA 07 00 04 00 78 8E
E0: 60 40 83 40 28 AA 07 00 - 06 00 8C 8E 7C 80 08 00
F0: 28 AA 07 00 04 00 00 8C - 00 01 09 80 28 AA 07 00
00: 01 00 28 8C E0 01 02 01 - 0F 00 00 00 28 A9 07 00
10: 01 00 04 80 60 00 00 20 - 28 A9 07 00 01 00 30 80
20: 01 04 30 00 28 A9 07 00 - 01 00 3C 80 06 00 00 00
30: 28 A9 07 00 04 00 E8 80 - 80 08 0C 3C 28 A9 07 00
40: 08 00 38 81 C4 C4 00 00 - 28 A9 07 00 0A 00 B0 81
50: 00 3C 00 78 28 A9 07 00 - 01 00 C8 81 01 00 00 00
60: 28 A9 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
70: 28 A9 07 00 07 00 44 86 - 4E DE 05 01 28 A9 07 00
80: 07 00 2C 86 0A 10 0A 00 - 28 A9 07 00 02 00 30 86
90: 50 C0 00 BE 28 A9 07 00 - 01 00 5C 86 2A 08 60 00
A0: 28 A9 07 00 02 00 3C 84 - 02 9F 00 00 28 A9 07 00
B0: 02 00 E0 86 00 04 00 08 - 28 A9 07 00 01 00 28 84
C0: E0 01 02 01 28 A9 07 00 - 08 00 50 86 3F 3F 3F 05
D0: 28 A9 07 00 01 00 3C 86 - F0 00 00 00 28 A9 07 00
E0: 03 00 AC 86 EC 60 00 00 - 28 A9 07 00 01 00 18 84
F0: 7C 00 09 02 28 A9 07 00 - 04 00 00 84
[HECI1] Got msg Success: 01FC0008
00: 00 01 09 80 28 A9 07 00 - 04 00 9C 86 00 00 4C 00
10: 28 A9 07 00 01 00 04 86 - 39 09 05 00 28 A9 07 00
20: 07 00 A4 86 1C 1C 1C 00 - 28 A9 07 00 04 00 BC 86
30: 80 00 10 00 28 A9 07 00 - 0F 00 F0 86 20 28 28 28
40: 28 A9 07 00 08 00 9C 85 - 00 0C 49 22 28 A9 07 00
50: 01 00 20 84 25 16 07 0D - 28 A9 07 00 0A 00 00 86
60: 00 A8 52 00 28 A9 07 00 - 04 00 78 86 60 40 83 40
70: 28 A9 07 00 0F 00 64 84 - 00 02 1B E0 28 A9 07 00
80: 02 00 1C 84 00 C0 00 60 - 28 A9 07 00 05 00 0C 86
90: FF 9B 12 00 28 A9 07 00 - 04 00 C8 86 50 88 8D 60
A0: 28 A9 07 00 03 00 88 86 - 20 00 74 24 28 A9 07 00
B0: 08 00 C0 86 00 00 88 5B - 28 A9 07 00 03 00 24 86
C0: FC 60 33 AA 28 A9 07 00 - 02 00 40 84 00 A0 02 FF
D0: 28 A9 07 00 07 00 04 84 - 64 C1 24 00 28 A9 07 00
E0: 01 00 90 86 48 30 50 75 - 28 A9 07 00 04 00 14 86
F0: 1F 63 20 03 28 A9 07 00 - 09 00 1C 86 A8 00 3B 6E
00: 28 A9 07 00 02 00 8C 85 - 00 08 1F 20 28 A9 07 00
10: 08 00 24 84 10 0A 0B A4 - 28 A9 07 00 05 00 40 86
20: 58 CF 05 01 28 A9 07 00 - 02 00 20 86 00 4C 00 00
30: 28 A9 07 00 0F 00 08 86 - 50 FF FF 3F 28 A9 07 00
40: 03 00 4C 86 07 C9 02 01 - 28 A9 07 00 0D 00 68 86
50: 2A 82 00 B8 28 A9 07 00 - 0F 00 64 84 05 00 33 E0
60: 28 A9 07 00 03 00 64 86 - 00 54 00 00 28 A9 07 00
70: 04 00 10 84 00 00 BF 72 - 28 A9 07 00 01 00 10 86
80: 5F 01 C0 00 28 A9 07 00 - 0E 00 80 86 60 0F A0 E8
90: 28 A9 07 00 0A 00 58 86 - 09 A0 31 81 28 A9 07 00
A0: 08 00 84 85 08 0A 00 08 - 28 A9 07 00 07 00 8C 86
B0: 58 40 04 00 28 A9 07 00 - 08 00 A0 86 EC 00 00 1C
C0: 28 A9 07 00 0D 00 E4 86 - 50 05 0B 9C 28 A9 07 00
D0: 08 00 B4 86 40 40 81 2C - 28 A9 07 00 0A 00 74 86
E0: 49 FF 80 8D 28 A9 07 00 - 01 00 54 85 06 2A 29 28
F0: 28 A9 07 00 09 00 54 86 - 02 00 C0 08
[HECI1] Got msg Success: 01FC0008
00: 28 A9 07 00 03 00 70 86 - 5A E5 40 40 28 A9 07 00
10: 04 00 C4 86 FF FF 3F FF - 28 A9 07 00 0F 00 EC 86
20: C4 00 00 00 28 A9 07 00 - 08 00 60 86 00 00 00 FF
30: 28 A9 07 00 06 00 D4 86 - C0 80 82 00 28 A9 07 00
40: 01 00 38 84 7F 00 00 00 - 28 A9 07 00 02 00 F4 86
50: 00 0E 00 00 28 A9 07 00 - 01 00 64 86 08 54 00 00
60: 0F 00 00 00 28 A9 07 00 - 08 00 B4 8E 40 40 81 2C
70: 28 A9 07 00 09 00 08 8E - 50 18 E0 21 28 A9 07 00
80: 04 00 78 8E 60 40 83 40 - 28 A9 07 00 06 00 8C 8E
90: 7C 80 08 00 28 A9 07 00 - 06 00 04 8C 44 01 24 00
A0: 28 A9 07 00 07 00 48 8E - 4C 19 05 01 28 A9 07 00
B0: 0A 00 54 8E 00 01 C0 00 - 28 A9 07 00 04 00 10 8C
C0: 00 00 BF 72 28 A9 07 00 - 0F 00 64 8C 00 02 1B E0
D0: 28 A9 07 00 0F 00 64 8C - 00 00 33 E0 28 A9 07 00
E0: 02 00 00 8E 00 69 52 09 - 28 A9 07 00 02 00 74 8E
F0: 49 FF 80 8E 28 A9 07 00 - 08 00 24 8C 10 0A 0B A4
00: 28 A9 07 00 01 00 28 8C - E0 01 02 01 28 A9 07 00
10: 01 00 1C 8E A8 00 3B 00 - 28 A9 07 00 04 00 00 8C
20: 00 01 09 80 28 A9 07 00 - 02 00 20 8E 00 48 00 00
30: 28 A9 07 00 01 00 04 8E - 09 09 05 00 0F 00 00 00
40: 28 A9 07 00 02 00 74 96 - 49 FF 80 8E 28 A9 07 00
50: 02 00 18 96 BF 00 00 00 - 28 A9 07 00 04 00 5C 96
60: 2A 08 30 00 28 A9 07 00 - 09 00 1C 96 58 00 3B 01
70: 28 A9 07 00 04 00 18 94 - 7C 00 39 02 28 A9 07 00
80: 0C 00 58 96 09 A0 33 01 - 28 A9 07 00 02 00 00 96
90: 00 29 52 09 28 A9 07 00 - 0F 00 04 94 45 01 24 04
A0: 28 A9 07 00 07 00 48 96 - 4C 15 05 01 28 A9 07 00
B0: 08 00 E8 96 00 48 17 2C - 28 A9 07 00 03 00 04 96
C0: 09 00 05 00 28 A9 07 00 - 03 00 58 95 00 28 1F 15
D0: 28 A9 07 00 01 00 6C 96 - 28 24 04 48 28 A9 07 00
E0: 01 00 28 94 E0 01 02 01 - 28 A9 07 00 0F 00 64 94
F0: 00 02 1B E0 28 A9 07 00 - 0F 00 54 95
[HECI1] Got msg Success: 01FC0008
00: 06 2D 2D 28 28 A9 07 00 - 04 00 00 94 00 01 09 80
10: 28 A9 07 00 08 00 88 96 - 00 30 74 64 28 A9 07 00
20: 08 00 A0 96 EC 00 00 2B - 28 A9 07 00 02 00 2C 96
30: 0A 50 0A 00 28 A9 07 00 - 02 00 F4 96 00 18 00 00
40: 28 A9 07 00 07 00 8C 96 - 70 20 08 00 28 A9 07 00
50: 08 00 24 94 10 0A 0B A4 - 28 A9 07 00 04 00 10 94
60: 00 00 BF 72 28 A9 07 00 - 0F 00 64 94 00 00 33 E0
70: 28 A9 07 00 04 00 9C 96 - 00 00 20 00 28 A9 07 00
80: 07 00 A4 96 2B 2B 2B 00 - 28 A9 07 00 0B 00 54 96
90: 02 01 C0 00 28 A9 07 00 - 05 00 40 96 5E CF 18 01
A0: 28 A9 07 00 08 00 B4 96 - 40 40 81 2C 28 A9 07 00
B0: 04 00 78 96 60 40 83 40 - 28 A9 07 00 08 00 50 96
C0: 3F 3F 3F 01 28 A9 07 00 - 09 00 68 96 1E 82 00 BA
D0: 28 A9 07 00 09 00 08 96 - 50 18 E0 21 28 A9 07 00
E0: 02 00 20 96 00 48 00 00 - 28 A9 07 00 04 00 C8 96
F0: 50 88 4F 60 28 A9 07 00 - 07 00 44 96 48 15 05 01
00: 0F 00 00 00 28 A8 07 00 - 01 00 04 80 60 00 00 20
10: 28 A8 07 00 01 00 30 80 - 01 04 30 00 28 A8 07 00
20: 01 00 3C 80 06 00 00 00 - 28 A8 07 00 04 00 E8 80
30: 80 08 0C 3C 28 A8 07 00 - 08 00 38 81 AC D4 00 00
40: 28 A8 07 00 0B 00 90 81 - 02 06 01 0C 28 A8 07 00
50: 05 00 A8 81 06 00 1F 00 - 28 A8 07 00 0A 00 B0 81
60: 00 3C 00 78 28 A8 07 00 - 01 00 C8 81 01 00 00 00
70: 28 A8 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
80: 0F 00 00 00 29 AC 07 00 - 04 00 1C 01 01 30 00 80
90: 29 AC 07 00 06 00 0C B1 - 40 00 07 00 29 AC 07 00
A0: 02 00 6C 03 0B 03 00 00 - 29 AC 07 00 0A 00 70 03
B0: 00 3C 00 78 29 AC 07 00 - 01 00 88 03 01 00 00 00
C0: 29 AC 07 00 01 00 14 B1 - E9 D4 25 48 29 AC 07 00
D0: 04 00 50 03 03 09 02 0C - 0F 00 00 00 28 6A 07 00
E0: 07 00 6C 04 00 00 03 00 - 28 6A 07 00 07 00 EC 03
F0: 00 00 03 00 28 6A 07 00 - 07 00 8C 04
[HECI1] Got msg Success: 01FC0008
00: 00 00 03 00 28 6A 07 00 - 07 00 0C 04 00 00 03 00
10: 28 6E 07 00 07 00 2C 04 - 00 00 00 00 28 6E 07 00
20: 07 00 4C 04 00 00 00 00 - 28 6E 07 00 07 00 6C 04
30: 00 00 00 00 28 6E 07 00 - 07 00 8C 04 00 00 00 00
40: 28 69 07 00 02 00 10 03 - 00 30 00 06 28 69 07 00
50: 03 00 04 03 18 18 00 C0 - 28 69 07 00 07 00 0C 03
60: 18 18 03 00 28 69 07 00 - 02 00 30 03 00 30 00 07
70: 28 69 07 00 03 00 24 03 - 18 18 00 C0 28 69 07 00
80: 07 00 2C 03 18 18 03 00 - 28 6E 07 00 02 00 70 03
90: 04 30 00 06 28 6E 07 00 - 03 00 64 03 00 00 00 C0
A0: 28 6E 07 00 07 00 6C 03 - 00 00 03 00 28 6E 07 00
B0: 02 00 90 03 04 30 00 07 - 28 6E 07 00 03 00 84 03
C0: 00 00 00 C0 28 6E 07 00 - 07 00 8C 03 00 00 03 00
D0: 28 6D 07 00 02 00 D0 03 - 04 30 20 07 28 6D 07 00
E0: 03 00 C4 03 00 00 00 C0 - 28 6D 07 00 07 00 CC 03
F0: 00 00 03 00 28 6D 07 00 - 07 00 AC 03 00 00 03 00
00: 28 6D 07 00 07 00 2C 03 - 00 00 03 00 28 6D 07 00
10: 07 00 EC 03 00 00 03 00 - 28 6D 07 00 0C 00 04 07
20: 6C 00 80 01 28 6D 07 00 - 08 00 08 07 00 00 00 00
30: 28 6D 07 00 0C 00 14 07 - 6D 00 80 01 28 6D 07 00
40: 08 00 18 07 00 00 00 00 - 28 6D 07 00 0C 00 24 07
50: 6E 00 80 01 28 6D 07 00 - 08 00 28 07 00 00 00 00
60: 28 6D 07 00 0C 00 34 07 - 6F 00 80 01 28 6D 07 00
70: 08 00 38 07 00 00 00 00 - 28 6D 07 00 0C 00 44 07
80: 70 00 80 01 28 6D 07 00 - 08 00 48 07 00 00 00 00
90: 28 6D 07 00 0C 00 54 07 - 71 00 80 01 28 6D 07 00
A0: 08 00 58 07 00 00 00 00 - 28 6D 07 00 0C 00 64 07
B0: 72 00 80 01 28 6D 07 00 - 08 00 68 07 00 00 00 00
C0: 28 6D 07 00 0C 00 74 07 - 73 00 80 01 28 6D 07 00
D0: 08 00 78 07 00 00 00 00 - 28 6D 07 00 08 00 10 03
E0: 00 20 20 02 28 6A 07 00 - 02 00 B0 04 00 00 20 07
F0: 28 6A 07 00 03 00 A4 04 - 00 00 00 C0
[HECI1] Got msg Success: 804C0008
00: 28 6A 07 00 02 00 D0 04 - 00 00 20 07 28 6A 07 00
10: 03 00 C4 04 00 00 00 C0 - 28 6A 07 00 02 00 70 03
20: 04 20 00 07 28 6A 07 00 - 03 00 64 03 00 00 00 C0
30: 28 6A 07 00 07 00 6C 03 - 00 00 02 00 28 6D 07 00
40: 07 00 8C 03 00 00 02 00 - 0F 00 00 00
PeiHeciReadChipsetInitMsg(): End
//*****************ChipsetInitTable BIOS Table Start*****************
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0x7D0C
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 1
//Base CRC Valid: 1
// Phy Data Group Table (Fixed table with 16 Entries)
//Id: 0x0, RecordOffset: 0x0
//Id: 0x4, RecordOffset: 0x444
//Id: 0x5, RecordOffset: 0x45A
//Id: 0xA, RecordOffset: 0x4F4
//Id: 0x9, RecordOffset: 0x56D
//Id: 0xF, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
// HSIO Command Table
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x81, 0x19, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8180, Value: 0x19
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x88, 0x81, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8188, Value: 0x0
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x90, 0x81, 0x02, 0x07, 0x01, 0x0C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8190, Value: 0xC010702
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x98, 0x81, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8198, Value: 0x20000
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x9C, 0x81, 0x03, 0x00, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x819C, Value: 0x1C0003
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA0, 0x81, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x81A0, Value: 0x0
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0xA8, 0x81, 0x06, 0x00, 0x1F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x81A8, Value: 0x1F0006
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x81, 0x0B, 0x03, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x81AC, Value: 0x30B
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xE8, 0x86, 0x00, 0x48, 0x17, 0x1A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86E8, Value: 0x1A174800
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0xF0, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A0F0
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x08, 0x00, 0x08, 0xF3, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xF3080008
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0xC0, 0x86, 0x00, 0x10, 0x88, 0x1B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86C0, Value: 0x1B881000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x32, 0x81, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8658, Value: 0x8132A009
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x20, 0x87, 0x04, 0x02, 0x12, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8720, Value: 0x8120204
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x54, 0x87, 0x80, 0x50, 0x06, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8754, Value: 0x65080
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x44, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4400
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x10, 0x86, 0xFF, 0x01, 0xC8, 0x1E, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8610, Value: 0x1EC801FF
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x9F, 0x63, 0x0C, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x30C639F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x5A, 0x10, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0x8105A
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x28, 0x87, 0x00, 0x00, 0x04, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8728, Value: 0xFC040000
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x864C, Value: 0x105C907
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x87, 0xFF, 0x08, 0x01, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x874C, Value: 0x108FF
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x64, 0x86, 0x00, 0xA4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8664, Value: 0xA400
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x50, 0x87, 0x6E, 0x80, 0x10, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8750, Value: 0x1010806E
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x86, 0x60, 0x17, 0xA0, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8680, Value: 0x1A01760
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xA0, 0x86, 0xEC, 0x70, 0xC0, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x86A0, Value: 0x28C070EC
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xC4, 0x86, 0xD1, 0xEC, 0x21, 0xE4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86C4, Value: 0xE421ECD1
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x92, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x929BFF
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x24, 0x87, 0x22, 0x22, 0x26, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x8724, Value: 0x10262222
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x88, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8654, Value: 0x88C00002
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x3F8D8850
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x2C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x2C0000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x18, 0x86, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8618, Value: 0xBF
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0x04, 0x80, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0x8004
0x28, 0xAB, 0x07, 0x00, 0x0E, 0x00, 0x08, 0x87, 0x45, 0xF4, 0xDF, 0xCC, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8708, Value: 0xCCDFF445
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x28, 0x28, 0x28, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x282828
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x70, 0x86, 0x5E, 0x25, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8670, Value: 0x4040255E
0x28, 0xAB, 0x07, 0x00, 0x0B, 0x00, 0x88, 0x86, 0x20, 0x70, 0x74, 0xE4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x8688, Value: 0xE4747020
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x48, 0x87, 0x88, 0x0A, 0x8D, 0xD7, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8748, Value: 0xD78D0A88
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x40, 0x87, 0x0A, 0x00, 0xE2, 0x16, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8740, Value: 0x16E2000A
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x89, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80890100
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x1C, 0x86, 0x08, 0x10, 0x3B, 0x68, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x861C, Value: 0x683B1008
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x87, 0x03, 0x7F, 0x1B, 0x1B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x871C, Value: 0x1B1B7F03
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xE4, 0x86, 0x50, 0x45, 0x0B, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86E4, Value: 0x1C0B4550
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2E, 0x08, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x3B082E
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC0, 0x11, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x11C064
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x70, 0xA8, 0x52, 0x0B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0xB52A870
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x89, 0x02, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x289007C
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x58, 0x85, 0x20, 0x1E, 0x1F, 0x15, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8558, Value: 0x151F1E20
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x04, 0x86, 0x09, 0x09, 0x0F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8604, Value: 0xF0909
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x18, 0x87, 0x00, 0x0C, 0x00, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8718, Value: 0x1000C00
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x10, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8668, Value: 0xB810822A
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0xA4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0xA408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x48, 0x93, 0x88, 0x0A, 0x8A, 0xD3, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9348, Value: 0xD38A0A88
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x5C, 0x93, 0x33, 0x33, 0x24, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x935C, Value: 0x20243333
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x64, 0x91, 0x4C, 0x60, 0x4C, 0x4C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9164, Value: 0x4C4C604C
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x92, 0x1E, 0x1E, 0x1E, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x92A4, Value: 0x1E1E1E
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x14, 0x90, 0x1D, 0xC5, 0x00, 0x11, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9014, Value: 0x1100C51D
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xC4, 0x92, 0xD1, 0xEC, 0x01, 0xE6, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x92C4, Value: 0xE601ECD1
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x1C, 0x93, 0x03, 0x7F, 0x21, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x931C, Value: 0x21217F03
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0xE4, 0x92, 0x40, 0xA5, 0x0B, 0x4B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x92E4, Value: 0x4B0BA540
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x18, 0x93, 0x01, 0x00, 0x00, 0x4A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9318, Value: 0x4A000001
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x54, 0x93, 0x80, 0x54, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9354, Value: 0x25480
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x90, 0x0F, 0x0C, 0x0C, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9024, Value: 0xA40C0C0F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x28, 0x90, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9028, Value: 0x10201E0
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xE8, 0x92, 0x00, 0x48, 0x26, 0x1A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x92E8, Value: 0x1A264800
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x20, 0x90, 0x26, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9020, Value: 0xD071626
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x92, 0xF8, 0x10, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x921C, Value: 0x3B10F8
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xC8, 0x92, 0x50, 0x88, 0x8D, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x92C8, Value: 0xD8D8850
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xE0, 0x92, 0x32, 0x60, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x92E0, Value: 0x8006032
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xAC, 0x92, 0xF6, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x92AC, Value: 0x60F6
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x14, 0x92, 0x9F, 0x61, 0x38, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x9214, Value: 0x338619F
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x14, 0x93, 0x08, 0x1C, 0x05, 0x0F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9314, Value: 0xF051C08
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x93, 0x36, 0x38, 0xB2, 0x1F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9324, Value: 0x1FB23836
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x92, 0x70, 0x94, 0x52, 0x0B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x9200, Value: 0xB529470
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x44, 0x93, 0x2B, 0x1C, 0x18, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9344, Value: 0x181C2B
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x92, 0x49, 0xCD, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x924C, Value: 0x105CD49
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x93, 0xDC, 0x4F, 0x01, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x934C, Value: 0x14FDC
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x28, 0x93, 0x00, 0x00, 0x1A, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9328, Value: 0xFF1A0000
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x60, 0x92, 0x08, 0x00, 0x08, 0x33, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9260, Value: 0x33080008
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x58, 0x93, 0xA4, 0x9C, 0x8C, 0x31, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9358, Value: 0x318C9CA4
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x64, 0x92, 0x00, 0x54, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x9264, Value: 0x25400
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x54, 0x91, 0x06, 0x2A, 0x2D, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9154, Value: 0x282D2A06
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x68, 0x92, 0x06, 0x82, 0x10, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9268, Value: 0xB8108206
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x44, 0x90, 0x97, 0x48, 0x09, 0x64, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9044, Value: 0x64094897
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x92, 0x40, 0x17, 0x04, 0x04, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9280, Value: 0x4041740
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x92, 0xEC, 0x70, 0x80, 0x1E, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x92A0, Value: 0x1E8070EC
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x10, 0x93, 0x68, 0x00, 0x40, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9310, Value: 0x400068
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x84, 0x91, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9184, Value: 0x8000A08
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x88, 0x92, 0x10, 0x30, 0x77, 0x64, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9288, Value: 0x64773010
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x78, 0x92, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9278, Value: 0x40834060
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x92, 0x0C, 0x00, 0x0B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x922C, Value: 0xB000C
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x04, 0x92, 0x09, 0x0B, 0x0F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9204, Value: 0xF0B09
0x28, 0xAB, 0x07, 0x00, 0x0D, 0x00, 0x40, 0x92, 0x4E, 0xCF, 0x18, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x9240, Value: 0x318CF4E
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x6C, 0x92, 0x00, 0x24, 0x04, 0x5C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x926C, Value: 0x5C042400
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x20, 0x93, 0x04, 0x21, 0x03, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9320, Value: 0xD032104
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x0C, 0x93, 0x1F, 0xE0, 0x21, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x930C, Value: 0x2121E01F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x92, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x923C, Value: 0xF0
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x0C, 0x92, 0xE6, 0x9B, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x920C, Value: 0x529BE6
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x18, 0x92, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9218, Value: 0xBF
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x90, 0x96, 0xBC, 0x1F, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x905C, Value: 0x3F1FBC96
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x00, 0x90, 0x00, 0x01, 0x89, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9000, Value: 0x80890100
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x08, 0x93, 0x45, 0x34, 0x48, 0xD0, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9308, Value: 0xD0483445
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x50, 0x93, 0x6E, 0x80, 0x10, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9350, Value: 0x1010806E
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x04, 0x93, 0x80, 0xAA, 0x11, 0xC0, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9304, Value: 0xC011AA80
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x91, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x918C, Value: 0x201F0800
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x92, 0x50, 0xD1, 0xEC, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9208, Value: 0x1ECD150
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x7C, 0x92, 0x18, 0x18, 0x26, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x927C, Value: 0x40261818
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0xCC, 0x92, 0x25, 0x17, 0x17, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x92CC, Value: 0x5B171725
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x92, 0x40, 0x40, 0x81, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x92B4, Value: 0x8814040
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x60, 0x93, 0x72, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9360, Value: 0x72
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x92, 0x20, 0x48, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x928C, Value: 0x824820
0x28, 0xAB, 0x07, 0x00, 0x0E, 0x00, 0x40, 0x93, 0x0A, 0x00, 0xEB, 0x1F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x9340, Value: 0x1FEB000A
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x70, 0x92, 0x58, 0x26, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9270, Value: 0x40402658
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0x10, 0x92, 0xFB, 0x01, 0xC8, 0x0A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9210, Value: 0xAC801FB
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x04, 0x90, 0x44, 0x00, 0x21, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9004, Value: 0x210044
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x1F, 0x63, 0x20, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x320631F
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0x00, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A000
0x28, 0xAA, 0x07, 0x00, 0x0D, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x00, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x8668, Value: 0xB800822A
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xC0, 0x86, 0x00, 0x00, 0x88, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86C0, Value: 0x5B880000
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xAA, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x608D8850
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x0A, 0x10, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0xA100A
0x28, 0xAA, 0x07, 0x00, 0x0E, 0x00, 0x80, 0x86, 0x60, 0x0F, 0xA0, 0xE8, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8680, Value: 0xE8A00F60
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0xE0, 0x86, 0x00, 0x04, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86E0, Value: 0x8000400
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xC4, 0x86, 0xFF, 0xFF, 0x3F, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C4, Value: 0xFF3FFFFF
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE01B0200
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x38, 0x84, 0x7F, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8438, Value: 0x7F
0x28, 0xAA, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x12, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x129BFF
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x09, 0x02, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x209007C
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xBC, 0x86, 0x80, 0x00, 0x10, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86BC, Value: 0x100080
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x86, 0x00, 0x0E, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86F4, Value: 0xE00
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2A, 0x08, 0x60, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x60082A
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x88, 0x86, 0x20, 0x00, 0x74, 0x24, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8688, Value: 0x24740020
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x86, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86B4, Value: 0x2C814040
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x86, 0xEC, 0x00, 0x00, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86A0, Value: 0x1C0000EC
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x64, 0x86, 0x00, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8664, Value: 0x5400
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x4C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x4C0000
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x864C, Value: 0x102C907
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x74, 0x86, 0x49, 0xFF, 0x80, 0x8D, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8674, Value: 0x8D80FF49
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xAA, 0x07, 0x00, 0x0D, 0x00, 0xE4, 0x86, 0x50, 0x05, 0x0B, 0x9C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x86E4, Value: 0x9C0B0550
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x10, 0x86, 0x5F, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8610, Value: 0xC0015F
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x1C, 0x1C, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x1C1C1C
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0xC4, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0xC4
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8654, Value: 0x8C00002
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80090100
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC1, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x24C164
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x70, 0x86, 0x5A, 0xE5, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8670, Value: 0x4040E55A
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x90, 0x86, 0x48, 0x30, 0x50, 0x75, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8690, Value: 0x75503048
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x24, 0x86, 0xFC, 0x60, 0x33, 0xAA, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8624, Value: 0xAA3360FC
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x04, 0x86, 0x39, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8604, Value: 0x50939
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x4C, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4C00
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x05, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE0330005
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x31, 0x81, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8658, Value: 0x8131A009
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x00, 0xA8, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0x52A800
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x00, 0x00, 0x00, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xFF000000
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x86, 0xA8, 0x00, 0x3B, 0x6E, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x861C, Value: 0x6E3B00A8
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0x5408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE0330000
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0x04, 0x8C, 0x44, 0x01, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8C04, Value: 0x240144
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x24, 0x8C, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8C24, Value: 0xA40B0A10
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x8E, 0xA8, 0x00, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E1C, Value: 0x3B00A8
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x10, 0x8C, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C10, Value: 0x72BF0000
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE01B0200
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x00, 0x8E, 0x00, 0x69, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E00, Value: 0x9526900
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x48, 0x8E, 0x4C, 0x19, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8E48, Value: 0x105194C
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x74, 0x8E, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E74, Value: 0x8E80FF49
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x54, 0x8E, 0x00, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8E54, Value: 0xC00100
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x04, 0x8E, 0x09, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E04, Value: 0x50909
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x8E, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8EB4, Value: 0x2C814040
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x20, 0x8E, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E20, Value: 0x4800
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x08, 0x8E, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8E08, Value: 0x21E01850
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x78, 0x8E, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8E78, Value: 0x40834060
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0x8C, 0x8E, 0x7C, 0x80, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8E8C, Value: 0x8807C
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x00, 0x8C, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C00, Value: 0x80090100
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x28, 0x8C, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8C28, Value: 0x10201E0
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x38, 0x81, 0xC4, 0xC4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8138, Value: 0xC4C4
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x10, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1001
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x0A, 0x10, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0xA100A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2A, 0x08, 0x60, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x60082A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xE0, 0x86, 0x00, 0x04, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86E0, Value: 0x8000400
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x09, 0x02, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x209007C
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x4C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x4C0000
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x86, 0x39, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8604, Value: 0x50939
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x1C, 0x1C, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x1C1C1C
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xBC, 0x86, 0x80, 0x00, 0x10, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86BC, Value: 0x100080
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x00, 0xA8, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0x52A800
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x12, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x129BFF
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x608D8850
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x88, 0x86, 0x20, 0x00, 0x74, 0x24, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8688, Value: 0x24740020
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xC0, 0x86, 0x00, 0x00, 0x88, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86C0, Value: 0x5B880000
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x24, 0x86, 0xFC, 0x60, 0x33, 0xAA, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8624, Value: 0xAA3360FC
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0x00, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A000
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC1, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x24C164
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x90, 0x86, 0x48, 0x30, 0x50, 0x75, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8690, Value: 0x75503048
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x1F, 0x63, 0x20, 0x03, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x320631F
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x86, 0xA8, 0x00, 0x3B, 0x6E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x861C, Value: 0x6E3B00A8
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x4C, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4C00
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x864C, Value: 0x102C907
0x28, 0xA9, 0x07, 0x00, 0x0D, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x00, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x8668, Value: 0xB800822A
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x05, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE0330005
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x64, 0x86, 0x00, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8664, Value: 0x5400
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x10, 0x86, 0x5F, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8610, Value: 0xC0015F
0x28, 0xA9, 0x07, 0x00, 0x0E, 0x00, 0x80, 0x86, 0x60, 0x0F, 0xA0, 0xE8, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8680, Value: 0xE8A00F60
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x31, 0x81, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8658, Value: 0x8131A009
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x86, 0xEC, 0x00, 0x00, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86A0, Value: 0x1C0000EC
0x28, 0xA9, 0x07, 0x00, 0x0D, 0x00, 0xE4, 0x86, 0x50, 0x05, 0x0B, 0x9C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x86E4, Value: 0x9C0B0550
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x86, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86B4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x74, 0x86, 0x49, 0xFF, 0x80, 0x8D, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8674, Value: 0x8D80FF49
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8654, Value: 0x8C00002
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x70, 0x86, 0x5A, 0xE5, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8670, Value: 0x4040E55A
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC4, 0x86, 0xFF, 0xFF, 0x3F, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C4, Value: 0xFF3FFFFF
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0xC4, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0xC4
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x00, 0x00, 0x00, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xFF000000
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x38, 0x84, 0x7F, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8438, Value: 0x7F
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x86, 0x00, 0x0E, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86F4, Value: 0xE00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0x5408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x8E, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8EB4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x08, 0x8E, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8E08, Value: 0x21E01850
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x8E, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8E78, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0x8C, 0x8E, 0x7C, 0x80, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8E8C, Value: 0x8807C
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0x04, 0x8C, 0x44, 0x01, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8C04, Value: 0x240144
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x48, 0x8E, 0x4C, 0x19, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8E48, Value: 0x105194C
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x54, 0x8E, 0x00, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8E54, Value: 0xC00100
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x8C, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C10, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE0330000
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x00, 0x8E, 0x00, 0x69, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E00, Value: 0x9526900
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x74, 0x8E, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E74, Value: 0x8E80FF49
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x8C, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8C24, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x8C, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8C28, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x8E, 0xA8, 0x00, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E1C, Value: 0x3B00A8
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x8C, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C00, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x8E, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E20, Value: 0x4800
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x8E, 0x09, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E04, Value: 0x50909
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x74, 0x96, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9674, Value: 0x8E80FF49
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x18, 0x96, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9618, Value: 0xBF
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x5C, 0x96, 0x2A, 0x08, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x965C, Value: 0x30082A
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x96, 0x58, 0x00, 0x3B, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x961C, Value: 0x13B0058
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x18, 0x94, 0x7C, 0x00, 0x39, 0x02, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9418, Value: 0x239007C
0x28, 0xA9, 0x07, 0x00, 0x0C, 0x00, 0x58, 0x96, 0x09, 0xA0, 0x33, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9658, Value: 0x133A009
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x00, 0x96, 0x00, 0x29, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9600, Value: 0x9522900
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x94, 0x45, 0x01, 0x24, 0x04, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9404, Value: 0x4240145
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x48, 0x96, 0x4C, 0x15, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9648, Value: 0x105154C
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xE8, 0x96, 0x00, 0x48, 0x17, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96E8, Value: 0x2C174800
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x04, 0x96, 0x09, 0x00, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9604, Value: 0x50009
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x58, 0x95, 0x00, 0x28, 0x1F, 0x15, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9558, Value: 0x151F2800
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x6C, 0x96, 0x28, 0x24, 0x04, 0x48, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x966C, Value: 0x48042428
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x94, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9428, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x94, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9464, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x54, 0x95, 0x06, 0x2D, 0x2D, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9554, Value: 0x282D2D06
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x94, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9400, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x88, 0x96, 0x00, 0x30, 0x74, 0x64, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9688, Value: 0x64743000
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x96, 0xEC, 0x00, 0x00, 0x2B, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96A0, Value: 0x2B0000EC
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x2C, 0x96, 0x0A, 0x50, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x962C, Value: 0xA500A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x96, 0x00, 0x18, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x96F4, Value: 0x1800
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x96, 0x70, 0x20, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x968C, Value: 0x82070
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x94, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9424, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x94, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9410, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x94, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9464, Value: 0xE0330000
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x96, 0x00, 0x00, 0x20, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x969C, Value: 0x200000
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x96, 0x2B, 0x2B, 0x2B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x96A4, Value: 0x2B2B2B
0x28, 0xA9, 0x07, 0x00, 0x0B, 0x00, 0x54, 0x96, 0x02, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x9654, Value: 0xC00102
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x40, 0x96, 0x5E, 0xCF, 0x18, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9640, Value: 0x118CF5E
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x96, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96B4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x96, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9678, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x50, 0x96, 0x3F, 0x3F, 0x3F, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9650, Value: 0x13F3F3F
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x68, 0x96, 0x1E, 0x82, 0x00, 0xBA, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9668, Value: 0xBA00821E
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x08, 0x96, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9608, Value: 0x21E01850
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x96, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9620, Value: 0x4800
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x96, 0x50, 0x88, 0x4F, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x96C8, Value: 0x604F8850
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x44, 0x96, 0x48, 0x15, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9644, Value: 0x1051548
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xA8, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xA8, 0x07, 0x00, 0x08, 0x00, 0x38, 0x81, 0xAC, 0xD4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8138, Value: 0xD4AC
0x28, 0xA8, 0x07, 0x00, 0x0B, 0x00, 0x90, 0x81, 0x02, 0x06, 0x01, 0x0C, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x8190, Value: 0xC010602
0x28, 0xA8, 0x07, 0x00, 0x05, 0x00, 0xA8, 0x81, 0x06, 0x00, 0x1F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x81A8, Value: 0x1F0006
0x28, 0xA8, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x10, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1001
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x29, 0xAC, 0x07, 0x00, 0x04, 0x00, 0x1C, 0x01, 0x01, 0x30, 0x00, 0x80, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x11C, Value: 0x80003001
0x29, 0xAC, 0x07, 0x00, 0x06, 0x00, 0x0C, 0xB1, 0x40, 0x00, 0x07, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0xB10C, Value: 0x70040
0x29, 0xAC, 0x07, 0x00, 0x02, 0x00, 0x6C, 0x03, 0x0B, 0x03, 0x00, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x36C, Value: 0x30B
0x29, 0xAC, 0x07, 0x00, 0x0A, 0x00, 0x70, 0x03, 0x00, 0x3C, 0x00, 0x78, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x370, Value: 0x78003C00
0x29, 0xAC, 0x07, 0x00, 0x01, 0x00, 0x88, 0x03, 0x01, 0x00, 0x00, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x388, Value: 0x1
0x29, 0xAC, 0x07, 0x00, 0x01, 0x00, 0x14, 0xB1, 0xE9, 0xD4, 0x25, 0x48, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0xB114, Value: 0x4825D4E9
0x29, 0xAC, 0x07, 0x00, 0x04, 0x00, 0x50, 0x03, 0x03, 0x09, 0x02, 0x0C, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x350, Value: 0xC020903
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x46C, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0xEC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3EC, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x48C, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x0C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x40C, Value: 0x30000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x42C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x44C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x46C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x48C, Value: 0x0
0x28, 0x69, 0x07, 0x00, 0x02, 0x00, 0x10, 0x03, 0x00, 0x30, 0x00, 0x06, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x310, Value: 0x6003000
0x28, 0x69, 0x07, 0x00, 0x03, 0x00, 0x04, 0x03, 0x18, 0x18, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x304, Value: 0xC0001818
0x28, 0x69, 0x07, 0x00, 0x07, 0x00, 0x0C, 0x03, 0x18, 0x18, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x30C, Value: 0x31818
0x28, 0x69, 0x07, 0x00, 0x02, 0x00, 0x30, 0x03, 0x00, 0x30, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x330, Value: 0x7003000
0x28, 0x69, 0x07, 0x00, 0x03, 0x00, 0x24, 0x03, 0x18, 0x18, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x324, Value: 0xC0001818
0x28, 0x69, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x03, 0x18, 0x18, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x32C, Value: 0x31818
0x28, 0x6E, 0x07, 0x00, 0x02, 0x00, 0x70, 0x03, 0x04, 0x30, 0x00, 0x06, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x370, Value: 0x6003004
0x28, 0x6E, 0x07, 0x00, 0x03, 0x00, 0x64, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x364, Value: 0xC0000000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x36C, Value: 0x30000
0x28, 0x6E, 0x07, 0x00, 0x02, 0x00, 0x90, 0x03, 0x04, 0x30, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x390, Value: 0x7003004
0x28, 0x6E, 0x07, 0x00, 0x03, 0x00, 0x84, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x384, Value: 0xC0000000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x38C, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x02, 0x00, 0xD0, 0x03, 0x04, 0x30, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x3D0, Value: 0x7203004
0x28, 0x6D, 0x07, 0x00, 0x03, 0x00, 0xC4, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x3C4, Value: 0xC0000000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xCC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3CC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xAC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3AC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x32C, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xEC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3EC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x04, 0x07, 0x6C, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x704, Value: 0x180006C
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x708, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x14, 0x07, 0x6D, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x714, Value: 0x180006D
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x18, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x718, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x24, 0x07, 0x6E, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x724, Value: 0x180006E
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x28, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x728, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x34, 0x07, 0x6F, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x734, Value: 0x180006F
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x38, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x738, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x44, 0x07, 0x70, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x744, Value: 0x1800070
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x48, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x748, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x54, 0x07, 0x71, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x754, Value: 0x1800071
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x58, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x758, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x64, 0x07, 0x72, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x764, Value: 0x1800072
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x68, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x768, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x74, 0x07, 0x73, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x774, Value: 0x1800073
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x78, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x778, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x10, 0x03, 0x00, 0x20, 0x20, 0x02, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x310, Value: 0x2202000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0xB0, 0x04, 0x00, 0x00, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x4B0, Value: 0x7200000
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0xA4, 0x04, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x4A4, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0xD0, 0x04, 0x00, 0x00, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x4D0, Value: 0x7200000
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0xC4, 0x04, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x4C4, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0x70, 0x03, 0x04, 0x20, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x370, Value: 0x7002004
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0x64, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x364, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x03, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x36C, Value: 0x20000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x03, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x38C, Value: 0x20000
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x01, 0x40, 0x06, 0xB8, 0x3D, 0x2F, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4001, Value: 0x2F3DB806
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2B, 0x40, 0x05, 0x40, 0x6A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x402B, Value: 0x6A4005
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x40, 0x80, 0x53, 0xA2, 0x09, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x402C, Value: 0x9A25380
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x7F, 0x80, 0xC6, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7F04, Value: 0xC680
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x70, 0x00, 0xC2, 0x88, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x702C, Value: 0x88C200
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x70, 0x08, 0x1E, 0x64, 0x64, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7000, Value: 0x64641E08
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x70, 0x00, 0xC2, 0x88, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x702C, Value: 0x88C200
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x70, 0x20, 0x5A, 0x2B, 0x22, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7008, Value: 0x222B5A20
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x14, 0x70, 0x18, 0x4D, 0xE9, 0x59, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7014, Value: 0x59E94D18
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x70, 0x00, 0xE8, 0x01, 0x30, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7024, Value: 0x3001E800
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x41, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4100, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x41, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4126, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x41, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4108, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x42, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4200, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x42, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4226, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x42, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4208, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x43, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4300, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x43, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4326, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x43, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4308, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x44, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4400, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x44, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4426, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x44, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4408, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x45, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4500, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x45, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4526, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x45, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4508, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x46, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4600, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x46, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4626, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x46, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4608, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x47, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4700, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x47, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4726, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x47, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4708, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x48, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4800, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x48, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4826, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x48, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4808, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x49, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4900, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x49, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4926, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x49, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4908, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x4A, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A00, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x4A, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A26, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x4A, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A08, Value: 0xDAD0
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x3C, 0x80, 0x07, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x803C, Value: 0x7
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x0F, 0x00, 0x00, 0x00, //End Table Marker
//*****************ChipsetInitTable BIOS Table End*****************
Push Updated ChipsetInit table with CSME
PeiHeciWriteChipsetInitMsg(): Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 01FC0008
00: 00 00 05 00 19 00 00 00 - 00 00 00 00 0C 16 00 00
10: 00 00 00 00 00 00 00 00 - 0D 71 0C 7D FF FF 08 06
20: 10 00 0C 00 00 00 44 44 - 45 A5 4F 4A 56 D9 00 0F
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 28 AB 07 00 - 01 00 04 80 60 00 00 20
50: 28 AB 07 00 01 00 30 80 - 01 04 30 00 28 AB 07 00
60: 01 00 3C 80 06 00 00 00 - 28 AB 07 00 04 00 E8 80
70: 80 08 0C 3C 28 AB 07 00 - 0F 00 80 81 19 00 00 00
80: 28 AB 07 00 07 00 88 81 - 00 00 00 00 28 AB 07 00
90: 0F 00 90 81 02 07 01 0C - 28 AB 07 00 04 00 98 81
A0: 00 00 02 00 28 AB 07 00 - 05 00 9C 81 03 00 1C 00
B0: 28 AB 07 00 07 00 A0 81 - 00 00 00 00 28 AB 07 00
C0: 05 00 A8 81 06 00 1F 00 - 28 AB 07 00 03 00 AC 81
D0: 0B 03 00 00 28 AB 07 00 - 0A 00 B0 81 00 3C 00 78
E0: 28 AB 07 00 01 00 C8 81 - 01 00 00 00 28 AB 07 00
F0: 01 00 CC 81 01 00 00 00 - 0F 00 00 00 28 AB 07 00
00: 08 00 E8 86 00 48 17 1A - 28 AB 07 00 02 00 1C 84
10: 00 C0 00 60 28 AB 07 00 - 02 00 40 84 F0 A0 02 FF
20: 28 AB 07 00 08 00 60 86 - 08 00 08 F3 28 AB 07 00
30: 02 00 C0 86 00 10 88 1B - 28 AB 07 00 02 00 8C 85
40: 00 08 1F 20 28 AB 07 00 - 0F 00 F0 86 20 28 28 28
50: 28 AB 07 00 02 00 30 86 - 50 C0 00 BE 28 AB 07 00
60: 08 00 58 86 09 A0 32 81 - 28 AB 07 00 08 00 20 87
70: 04 02 12 08 28 AB 07 00 - 07 00 44 86 4E DE 05 01
80: 28 AB 07 00 06 00 54 87 - 80 50 06 00 28 AB 07 00
90: 02 00 3C 84 02 9F 00 00 - 28 AB 07 00 02 00 20 86
A0: 00 44 00 00 28 AB 07 00 - 04 00 D4 86 C0 80 82 00
B0: 28 AB 07 00 08 00 9C 85 - 00 0C 49 22 28 AB 07 00
C0: 08 00 10 86 FF 01 C8 1E - 28 AB 07 00 04 00 14 86
D0: 9F 63 0C 03 28 AB 07 00 - 01 00 3C 86 F0 00 00 00
E0: 28 AB 07 00 07 00 2C 86 - 5A 10 08 00 28 AB 07 00
F0: 0F 00 08 86 50 FF FF 3F - 28 AB 07 00
[HECI1] Send msg: 01FC0008
00: 08 00 28 87 00 00 04 FC - 28 AB 07 00 07 00 4C 86
10: 07 C9 05 01 28 AB 07 00 - 01 00 20 84 25 16 07 0D
20: 28 AB 07 00 07 00 8C 86 - 58 40 04 00 28 AB 07 00
30: 03 00 4C 87 FF 08 01 00 - 28 AB 07 00 07 00 64 86
40: 00 A4 00 00 28 AB 07 00 - 01 00 50 87 6E 80 10 10
50: 28 AB 07 00 04 00 78 86 - 60 40 83 40 28 AB 07 00
60: 0F 00 80 86 60 17 A0 01 - 28 AB 07 00 0C 00 A0 86
70: EC 70 C0 28 28 AB 07 00 - 0F 00 C4 86 D1 EC 21 E4
80: 28 AB 07 00 01 00 28 84 - E0 01 02 01 28 AB 07 00
90: 05 00 0C 86 FF 9B 92 00 - 28 AB 07 00 08 00 50 86
A0: 3F 3F 3F 05 28 AB 07 00 - 01 00 AC 86 EC 60 00 00
B0: 28 AB 07 00 0C 00 24 87 - 22 22 26 10 28 AB 07 00
C0: 01 00 54 86 02 00 C0 88 - 28 AB 07 00 01 00 54 85
D0: 06 2A 29 28 28 AB 07 00 - 04 00 C8 86 50 88 8D 3F
E0: 28 AB 07 00 04 00 9C 86 - 00 00 2C 00 28 AB 07 00
F0: 02 00 18 86 BF 00 00 00 - 28 AB 07 00 0F 00 EC 86
00: 04 80 00 00 28 AB 07 00 - 0E 00 08 87 45 F4 DF CC
10: 28 AB 07 00 07 00 A4 86 - 28 28 28 00 28 AB 07 00
20: 01 00 70 86 5E 25 40 40 - 28 AB 07 00 0B 00 88 86
30: 20 70 74 E4 28 AB 07 00 - 04 00 48 87 88 0A 8D D7
40: 28 AB 07 00 06 00 40 87 - 0A 00 E2 16 28 AB 07 00
50: 04 00 00 84 00 01 89 80 - 28 AB 07 00 08 00 1C 86
60: 08 10 3B 68 28 AB 07 00 - 01 00 1C 87 03 7F 1B 1B
70: 28 AB 07 00 0F 00 E4 86 - 50 45 0B 1C 28 AB 07 00
80: 01 00 5C 86 2E 08 3B 00 - 28 AB 07 00 07 00 04 84
90: 64 C0 11 00 28 AB 07 00 - 08 00 24 84 10 0A 0B A4
A0: 28 AB 07 00 05 00 40 86 - 58 CF 05 01 28 AB 07 00
B0: 0A 00 00 86 70 A8 52 0B - 28 AB 07 00 01 00 18 84
C0: 7C 00 89 02 28 AB 07 00 - 02 00 58 85 20 1E 1F 15
D0: 28 AB 07 00 08 00 84 85 - 08 0A 00 08 28 AB 07 00
E0: 05 00 04 86 09 09 0F 00 - 28 AB 07 00 06 00 10 84
F0: 00 00 BF 72 28 AB 07 00 - 0F 00 18 87
[HECI1] Send msg: 01FC0008
00: 00 0C 00 01 28 AB 07 00 - 05 00 68 86 2A 82 10 B8
10: 28 AB 07 00 01 00 64 86 - 08 A4 00 00 0F 00 00 00
20: 28 AB 07 00 0C 00 48 93 - 88 0A 8A D3 28 AB 07 00
30: 0F 00 5C 93 33 33 24 20 - 28 AB 07 00 02 00 64 91
40: 4C 60 4C 4C 28 AB 07 00 - 07 00 A4 92 1E 1E 1E 00
50: 28 AB 07 00 03 00 14 90 - 1D C5 00 11 28 AB 07 00
60: 0F 00 C4 92 D1 EC 01 E6 - 28 AB 07 00 0C 00 1C 93
70: 03 7F 21 21 28 AB 07 00 - 02 00 E4 92 40 A5 0B 4B
80: 28 AB 07 00 0F 00 18 93 - 01 00 00 4A 28 AB 07 00
90: 02 00 54 93 80 54 02 00 - 28 AB 07 00 0F 00 24 90
A0: 0F 0C 0C A4 28 AB 07 00 - 01 00 28 90 E0 01 02 01
B0: 28 AB 07 00 0C 00 E8 92 - 00 48 26 1A 28 AB 07 00
C0: 01 00 20 90 26 16 07 0D - 28 AB 07 00 09 00 1C 92
D0: F8 10 3B 00 28 AB 07 00 - 0C 00 C8 92 50 88 8D 0D
E0: 28 AB 07 00 01 00 E0 92 - 32 60 00 08 28 AB 07 00
F0: 04 00 AC 92 F6 60 00 00 - 28 AB 07 00 06 00 14 92
00: 9F 61 38 03 28 AB 07 00 - 0F 00 14 93 08 1C 05 0F
10: 28 AB 07 00 0F 00 24 93 - 36 38 B2 1F 28 AB 07 00
20: 0A 00 00 92 70 94 52 0B - 28 AB 07 00 07 00 44 93
30: 2B 1C 18 00 28 AB 07 00 - 07 00 4C 92 49 CD 05 01
40: 28 AB 07 00 03 00 4C 93 - DC 4F 01 00 28 AB 07 00
50: 0C 00 28 93 00 00 1A FF - 28 AB 07 00 08 00 60 92
60: 08 00 08 33 28 AB 07 00 - 03 00 58 93 A4 9C 8C 31
70: 28 AB 07 00 06 00 64 92 - 00 54 02 00 28 AB 07 00
80: 05 00 54 91 06 2A 2D 28 - 28 AB 07 00 05 00 68 92
90: 06 82 10 B8 28 AB 07 00 - 03 00 44 90 97 48 09 64
A0: 28 AB 07 00 0F 00 80 92 - 40 17 04 04 28 AB 07 00
B0: 08 00 A0 92 EC 70 80 1E - 28 AB 07 00 01 00 10 93
C0: 68 00 40 00 28 AB 07 00 - 08 00 84 91 08 0A 00 08
D0: 28 AB 07 00 0F 00 88 92 - 10 30 77 64 28 AB 07 00
E0: 04 00 78 92 60 40 83 40 - 28 AB 07 00 07 00 2C 92
F0: 0C 00 0B 00 28 AB 07 00 - 07 00 04 92
[HECI1] Send msg: 01FC0008
00: 09 0B 0F 00 28 AB 07 00 - 0D 00 40 92 4E CF 18 03
10: 28 AB 07 00 08 00 6C 92 - 00 24 04 5C 28 AB 07 00
20: 0F 00 20 93 04 21 03 0D - 28 AB 07 00 0F 00 0C 93
30: 1F E0 21 21 28 AB 07 00 - 01 00 3C 92 F0 00 00 00
40: 28 AB 07 00 01 00 0C 92 - E6 9B 52 00 28 AB 07 00
50: 02 00 18 92 BF 00 00 00 - 28 AB 07 00 01 00 5C 90
60: 96 BC 1F 3F 28 AB 07 00 - 04 00 00 90 00 01 89 80
70: 28 AB 07 00 0C 00 08 93 - 45 34 48 D0 28 AB 07 00
80: 01 00 50 93 6E 80 10 10 - 28 AB 07 00 04 00 04 93
90: 80 AA 11 C0 28 AB 07 00 - 02 00 8C 91 00 08 1F 20
A0: 28 AB 07 00 0F 00 08 92 - 50 D1 EC 01 28 AB 07 00
B0: 04 00 7C 92 18 18 26 40 - 28 AB 07 00 09 00 CC 92
C0: 25 17 17 5B 28 AB 07 00 - 08 00 B4 92 40 40 81 08
D0: 28 AB 07 00 01 00 60 93 - 72 00 00 00 28 AB 07 00
E0: 07 00 8C 92 20 48 82 00 - 28 AB 07 00 0E 00 40 93
F0: 0A 00 EB 1F 28 AB 07 00 - 03 00 70 92 58 26 40 40
00: 28 AB 07 00 09 00 10 92 - FB 01 C8 0A 28 AB 07 00
10: 04 00 04 90 44 00 21 00 - 0F 00 00 00 28 AA 07 00
20: 04 00 E8 80 80 08 0C 3C - 0F 00 00 00 28 AA 07 00
30: 04 00 14 86 1F 63 20 03 - 28 AA 07 00 02 00 40 84
40: 00 A0 02 FF 28 AA 07 00 - 0D 00 68 86 2A 82 00 B8
50: 28 AA 07 00 04 00 78 86 - 60 40 83 40 28 AA 07 00
60: 08 00 C0 86 00 00 88 5B - 28 AA 07 00 04 00 10 84
70: 00 00 BF 72 28 AA 07 00 - 05 00 40 86 58 CF 05 01
80: 28 AA 07 00 04 00 C8 86 - 50 88 8D 60 28 AA 07 00
90: 07 00 2C 86 0A 10 0A 00 - 28 AA 07 00 0E 00 80 86
A0: 60 0F A0 E8 28 AA 07 00 - 07 00 8C 86 58 40 04 00
B0: 28 AA 07 00 02 00 E0 86 - 00 04 00 08 28 AA 07 00
C0: 04 00 C4 86 FF FF 3F FF - 28 AA 07 00 0F 00 64 84
D0: 00 02 1B E0 28 AA 07 00 - 01 00 38 84 7F 00 00 00
E0: 28 AA 07 00 05 00 0C 86 - FF 9B 12 00 28 AA 07 00
F0: 08 00 24 84 10 0A 0B A4 - 28 AA 07 00
[HECI1] Send msg: 01FC0008
00: 01 00 18 84 7C 00 09 02 - 28 AA 07 00 04 00 BC 86
10: 80 00 10 00 28 AA 07 00 - 06 00 D4 86 C0 80 82 00
20: 28 AA 07 00 02 00 F4 86 - 00 0E 00 00 28 AA 07 00
30: 01 00 5C 86 2A 08 60 00 - 28 AA 07 00 03 00 88 86
40: 20 00 74 24 28 AA 07 00 - 08 00 B4 86 40 40 81 2C
50: 28 AA 07 00 08 00 A0 86 - EC 00 00 1C 28 AA 07 00
60: 03 00 64 86 00 54 00 00 - 28 AA 07 00 04 00 9C 86
70: 00 00 4C 00 28 AA 07 00 - 03 00 4C 86 07 C9 02 01
80: 28 AA 07 00 0A 00 74 86 - 49 FF 80 8D 28 AA 07 00
90: 01 00 3C 86 F0 00 00 00 - 28 AA 07 00 0D 00 E4 86
A0: 50 05 0B 9C 28 AA 07 00 - 0F 00 F0 86 20 28 28 28
B0: 28 AA 07 00 01 00 28 84 - E0 01 02 01 28 AA 07 00
C0: 01 00 10 86 5F 01 C0 00 - 28 AA 07 00 07 00 A4 86
D0: 1C 1C 1C 00 28 AA 07 00 - 0F 00 EC 86 C4 00 00 00
E0: 28 AA 07 00 01 00 54 85 - 06 2A 29 28 28 AA 07 00
F0: 09 00 54 86 02 00 C0 08 - 28 AA 07 00 04 00 00 84
00: 00 01 09 80 28 AA 07 00 - 07 00 04 84 64 C1 24 00
10: 28 AA 07 00 01 00 20 84 - 25 16 07 0D 28 AA 07 00
20: 02 00 3C 84 02 9F 00 00 - 28 AA 07 00 08 00 9C 85
30: 00 0C 49 22 28 AA 07 00 - 03 00 70 86 5A E5 40 40
40: 28 AA 07 00 01 00 90 86 - 48 30 50 75 28 AA 07 00
50: 08 00 84 85 08 0A 00 08 - 28 AA 07 00 03 00 24 86
60: FC 60 33 AA 28 AA 07 00 - 07 00 44 86 4E DE 05 01
70: 28 AA 07 00 08 00 50 86 - 3F 3F 3F 05 28 AA 07 00
80: 01 00 04 86 39 09 05 00 - 28 AA 07 00 02 00 20 86
90: 00 4C 00 00 28 AA 07 00 - 0F 00 64 84 05 00 33 E0
A0: 28 AA 07 00 02 00 30 86 - 50 C0 00 BE 28 AA 07 00
B0: 0A 00 58 86 09 A0 31 81 - 28 AA 07 00 02 00 8C 85
C0: 00 08 1F 20 28 AA 07 00 - 0A 00 00 86 00 A8 52 00
D0: 28 AA 07 00 0F 00 08 86 - 50 FF FF 3F 28 AA 07 00
E0: 03 00 AC 86 EC 60 00 00 - 28 AA 07 00 08 00 60 86
F0: 00 00 00 FF 28 AA 07 00 - 02 00 1C 84
[HECI1] Send msg: 01FC0008
00: 00 C0 00 60 28 AA 07 00 - 09 00 1C 86 A8 00 3B 6E
10: 28 AA 07 00 01 00 64 86 - 08 54 00 00 0F 00 00 00
20: 28 AA 07 00 0F 00 64 8C - 00 00 33 E0 28 AA 07 00
30: 06 00 04 8C 44 01 24 00 - 28 AA 07 00 08 00 24 8C
40: 10 0A 0B A4 28 AA 07 00 - 01 00 1C 8E A8 00 3B 00
50: 28 AA 07 00 04 00 10 8C - 00 00 BF 72 28 AA 07 00
60: 0F 00 64 8C 00 02 1B E0 - 28 AA 07 00 02 00 00 8E
70: 00 69 52 09 28 AA 07 00 - 07 00 48 8E 4C 19 05 01
80: 28 AA 07 00 02 00 74 8E - 49 FF 80 8E 28 AA 07 00
90: 0A 00 54 8E 00 01 C0 00 - 28 AA 07 00 01 00 04 8E
A0: 09 09 05 00 28 AA 07 00 - 08 00 B4 8E 40 40 81 2C
B0: 28 AA 07 00 02 00 20 8E - 00 48 00 00 28 AA 07 00
C0: 09 00 08 8E 50 18 E0 21 - 28 AA 07 00 04 00 78 8E
D0: 60 40 83 40 28 AA 07 00 - 06 00 8C 8E 7C 80 08 00
E0: 28 AA 07 00 04 00 00 8C - 00 01 09 80 28 AA 07 00
F0: 01 00 28 8C E0 01 02 01 - 0F 00 00 00 28 A9 07 00
00: 01 00 04 80 60 00 00 20 - 28 A9 07 00 01 00 30 80
10: 01 04 30 00 28 A9 07 00 - 01 00 3C 80 06 00 00 00
20: 28 A9 07 00 04 00 E8 80 - 80 08 0C 3C 28 A9 07 00
30: 08 00 38 81 C4 C4 00 00 - 28 A9 07 00 0A 00 B0 81
40: 00 3C 00 78 28 A9 07 00 - 01 00 C8 81 01 00 00 00
50: 28 A9 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
60: 28 A9 07 00 07 00 44 86 - 4E DE 05 01 28 A9 07 00
70: 07 00 2C 86 0A 10 0A 00 - 28 A9 07 00 02 00 30 86
80: 50 C0 00 BE 28 A9 07 00 - 01 00 5C 86 2A 08 60 00
90: 28 A9 07 00 02 00 3C 84 - 02 9F 00 00 28 A9 07 00
A0: 02 00 E0 86 00 04 00 08 - 28 A9 07 00 01 00 28 84
B0: E0 01 02 01 28 A9 07 00 - 08 00 50 86 3F 3F 3F 05
C0: 28 A9 07 00 01 00 3C 86 - F0 00 00 00 28 A9 07 00
D0: 03 00 AC 86 EC 60 00 00 - 28 A9 07 00 01 00 18 84
E0: 7C 00 09 02 28 A9 07 00 - 04 00 00 84 00 01 09 80
F0: 28 A9 07 00 04 00 9C 86 - 00 00 4C 00
[HECI1] Send msg: 01FC0008
00: 28 A9 07 00 01 00 04 86 - 39 09 05 00 28 A9 07 00
10: 07 00 A4 86 1C 1C 1C 00 - 28 A9 07 00 04 00 BC 86
20: 80 00 10 00 28 A9 07 00 - 0F 00 F0 86 20 28 28 28
30: 28 A9 07 00 08 00 9C 85 - 00 0C 49 22 28 A9 07 00
40: 01 00 20 84 25 16 07 0D - 28 A9 07 00 0A 00 00 86
50: 00 A8 52 00 28 A9 07 00 - 04 00 78 86 60 40 83 40
60: 28 A9 07 00 0F 00 64 84 - 00 02 1B E0 28 A9 07 00
70: 02 00 1C 84 00 C0 00 60 - 28 A9 07 00 05 00 0C 86
80: FF 9B 12 00 28 A9 07 00 - 04 00 C8 86 50 88 8D 60
90: 28 A9 07 00 03 00 88 86 - 20 00 74 24 28 A9 07 00
A0: 08 00 C0 86 00 00 88 5B - 28 A9 07 00 03 00 24 86
B0: FC 60 33 AA 28 A9 07 00 - 02 00 40 84 00 A0 02 FF
C0: 28 A9 07 00 07 00 04 84 - 64 C1 24 00 28 A9 07 00
D0: 01 00 90 86 48 30 50 75 - 28 A9 07 00 04 00 14 86
E0: 1F 63 20 03 28 A9 07 00 - 09 00 1C 86 A8 00 3B 6E
F0: 28 A9 07 00 02 00 8C 85 - 00 08 1F 20 28 A9 07 00
00: 08 00 24 84 10 0A 0B A4 - 28 A9 07 00 05 00 40 86
10: 58 CF 05 01 28 A9 07 00 - 02 00 20 86 00 4C 00 00
20: 28 A9 07 00 0F 00 08 86 - 50 FF FF 3F 28 A9 07 00
30: 03 00 4C 86 07 C9 02 01 - 28 A9 07 00 0D 00 68 86
40: 2A 82 00 B8 28 A9 07 00 - 0F 00 64 84 05 00 33 E0
50: 28 A9 07 00 03 00 64 86 - 00 54 00 00 28 A9 07 00
60: 04 00 10 84 00 00 BF 72 - 28 A9 07 00 01 00 10 86
70: 5F 01 C0 00 28 A9 07 00 - 0E 00 80 86 60 0F A0 E8
80: 28 A9 07 00 0A 00 58 86 - 09 A0 31 81 28 A9 07 00
90: 08 00 84 85 08 0A 00 08 - 28 A9 07 00 07 00 8C 86
A0: 58 40 04 00 28 A9 07 00 - 08 00 A0 86 EC 00 00 1C
B0: 28 A9 07 00 0D 00 E4 86 - 50 05 0B 9C 28 A9 07 00
C0: 08 00 B4 86 40 40 81 2C - 28 A9 07 00 0A 00 74 86
D0: 49 FF 80 8D 28 A9 07 00 - 01 00 54 85 06 2A 29 28
E0: 28 A9 07 00 09 00 54 86 - 02 00 C0 08 28 A9 07 00
F0: 03 00 70 86 5A E5 40 40 - 28 A9 07 00
[HECI1] Send msg: 01FC0008
00: 04 00 C4 86 FF FF 3F FF - 28 A9 07 00 0F 00 EC 86
10: C4 00 00 00 28 A9 07 00 - 08 00 60 86 00 00 00 FF
20: 28 A9 07 00 06 00 D4 86 - C0 80 82 00 28 A9 07 00
30: 01 00 38 84 7F 00 00 00 - 28 A9 07 00 02 00 F4 86
40: 00 0E 00 00 28 A9 07 00 - 01 00 64 86 08 54 00 00
50: 0F 00 00 00 28 A9 07 00 - 08 00 B4 8E 40 40 81 2C
60: 28 A9 07 00 09 00 08 8E - 50 18 E0 21 28 A9 07 00
70: 04 00 78 8E 60 40 83 40 - 28 A9 07 00 06 00 8C 8E
80: 7C 80 08 00 28 A9 07 00 - 06 00 04 8C 44 01 24 00
90: 28 A9 07 00 07 00 48 8E - 4C 19 05 01 28 A9 07 00
A0: 0A 00 54 8E 00 01 C0 00 - 28 A9 07 00 04 00 10 8C
B0: 00 00 BF 72 28 A9 07 00 - 0F 00 64 8C 00 02 1B E0
C0: 28 A9 07 00 0F 00 64 8C - 00 00 33 E0 28 A9 07 00
D0: 02 00 00 8E 00 69 52 09 - 28 A9 07 00 02 00 74 8E
E0: 49 FF 80 8E 28 A9 07 00 - 08 00 24 8C 10 0A 0B A4
F0: 28 A9 07 00 01 00 28 8C - E0 01 02 01 28 A9 07 00
00: 01 00 1C 8E A8 00 3B 00 - 28 A9 07 00 04 00 00 8C
10: 00 01 09 80 28 A9 07 00 - 02 00 20 8E 00 48 00 00
20: 28 A9 07 00 01 00 04 8E - 09 09 05 00 0F 00 00 00
30: 28 A9 07 00 02 00 74 96 - 49 FF 80 8E 28 A9 07 00
40: 02 00 18 96 BF 00 00 00 - 28 A9 07 00 04 00 5C 96
50: 2A 08 30 00 28 A9 07 00 - 09 00 1C 96 58 00 3B 01
60: 28 A9 07 00 04 00 18 94 - 7C 00 39 02 28 A9 07 00
70: 0C 00 58 96 09 A0 33 01 - 28 A9 07 00 02 00 00 96
80: 00 29 52 09 28 A9 07 00 - 0F 00 04 94 45 01 24 04
90: 28 A9 07 00 07 00 48 96 - 4C 15 05 01 28 A9 07 00
A0: 08 00 E8 96 00 48 17 2C - 28 A9 07 00 03 00 04 96
B0: 09 00 05 00 28 A9 07 00 - 03 00 58 95 00 28 1F 15
C0: 28 A9 07 00 01 00 6C 96 - 28 24 04 48 28 A9 07 00
D0: 01 00 28 94 E0 01 02 01 - 28 A9 07 00 0F 00 64 94
E0: 00 02 1B E0 28 A9 07 00 - 0F 00 54 95 06 2D 2D 28
F0: 28 A9 07 00 04 00 00 94 - 00 01 09 80
[HECI1] Send msg: 01FC0008
00: 28 A9 07 00 08 00 88 96 - 00 30 74 64 28 A9 07 00
10: 08 00 A0 96 EC 00 00 2B - 28 A9 07 00 02 00 2C 96
20: 0A 50 0A 00 28 A9 07 00 - 02 00 F4 96 00 18 00 00
30: 28 A9 07 00 07 00 8C 96 - 70 20 08 00 28 A9 07 00
40: 08 00 24 94 10 0A 0B A4 - 28 A9 07 00 04 00 10 94
50: 00 00 BF 72 28 A9 07 00 - 0F 00 64 94 00 00 33 E0
60: 28 A9 07 00 04 00 9C 96 - 00 00 20 00 28 A9 07 00
70: 07 00 A4 96 2B 2B 2B 00 - 28 A9 07 00 0B 00 54 96
80: 02 01 C0 00 28 A9 07 00 - 05 00 40 96 5E CF 18 01
90: 28 A9 07 00 08 00 B4 96 - 40 40 81 2C 28 A9 07 00
A0: 04 00 78 96 60 40 83 40 - 28 A9 07 00 08 00 50 96
B0: 3F 3F 3F 01 28 A9 07 00 - 09 00 68 96 1E 82 00 BA
C0: 28 A9 07 00 09 00 08 96 - 50 18 E0 21 28 A9 07 00
D0: 02 00 20 96 00 48 00 00 - 28 A9 07 00 04 00 C8 96
E0: 50 88 4F 60 28 A9 07 00 - 07 00 44 96 48 15 05 01
F0: 0F 00 00 00 28 A8 07 00 - 01 00 04 80 60 00 00 20
00: 28 A8 07 00 01 00 30 80 - 01 04 30 00 28 A8 07 00
10: 01 00 3C 80 06 00 00 00 - 28 A8 07 00 04 00 E8 80
20: 80 08 0C 3C 28 A8 07 00 - 08 00 38 81 AC D4 00 00
30: 28 A8 07 00 0B 00 90 81 - 02 06 01 0C 28 A8 07 00
40: 05 00 A8 81 06 00 1F 00 - 28 A8 07 00 0A 00 B0 81
50: 00 3C 00 78 28 A8 07 00 - 01 00 C8 81 01 00 00 00
60: 28 A8 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
70: 0F 00 00 00 29 AC 07 00 - 04 00 1C 01 01 30 00 80
80: 29 AC 07 00 06 00 0C B1 - 40 00 07 00 29 AC 07 00
90: 02 00 6C 03 0B 03 00 00 - 29 AC 07 00 0A 00 70 03
A0: 00 3C 00 78 29 AC 07 00 - 01 00 88 03 01 00 00 00
B0: 29 AC 07 00 01 00 14 B1 - E9 D4 25 48 29 AC 07 00
C0: 04 00 50 03 03 09 02 0C - 0F 00 00 00 28 6A 07 00
D0: 07 00 6C 04 00 00 03 00 - 28 6A 07 00 07 00 EC 03
E0: 00 00 03 00 28 6A 07 00 - 07 00 8C 04 00 00 03 00
F0: 28 6A 07 00 07 00 0C 04 - 00 00 03 00
[HECI1] Send msg: 01FC0008
00: 28 6E 07 00 07 00 2C 04 - 00 00 00 00 28 6E 07 00
10: 07 00 4C 04 00 00 00 00 - 28 6E 07 00 07 00 6C 04
20: 00 00 00 00 28 6E 07 00 - 07 00 8C 04 00 00 00 00
30: 28 69 07 00 02 00 10 03 - 00 30 00 06 28 69 07 00
40: 03 00 04 03 18 18 00 C0 - 28 69 07 00 07 00 0C 03
50: 18 18 03 00 28 69 07 00 - 02 00 30 03 00 30 00 07
60: 28 69 07 00 03 00 24 03 - 18 18 00 C0 28 69 07 00
70: 07 00 2C 03 18 18 03 00 - 28 6E 07 00 02 00 70 03
80: 04 30 00 06 28 6E 07 00 - 03 00 64 03 00 00 00 C0
90: 28 6E 07 00 07 00 6C 03 - 00 00 03 00 28 6E 07 00
A0: 02 00 90 03 04 30 00 07 - 28 6E 07 00 03 00 84 03
B0: 00 00 00 C0 28 6E 07 00 - 07 00 8C 03 00 00 03 00
C0: 28 6D 07 00 02 00 D0 03 - 04 30 20 07 28 6D 07 00
D0: 03 00 C4 03 00 00 00 C0 - 28 6D 07 00 07 00 CC 03
E0: 00 00 03 00 28 6D 07 00 - 07 00 AC 03 00 00 03 00
F0: 28 6D 07 00 07 00 2C 03 - 00 00 03 00 28 6D 07 00
00: 07 00 EC 03 00 00 03 00 - 28 6D 07 00 0C 00 04 07
10: 6C 00 80 01 28 6D 07 00 - 08 00 08 07 00 00 00 00
20: 28 6D 07 00 0C 00 14 07 - 6D 00 80 01 28 6D 07 00
30: 08 00 18 07 00 00 00 00 - 28 6D 07 00 0C 00 24 07
40: 6E 00 80 01 28 6D 07 00 - 08 00 28 07 00 00 00 00
50: 28 6D 07 00 0C 00 34 07 - 6F 00 80 01 28 6D 07 00
60: 08 00 38 07 00 00 00 00 - 28 6D 07 00 0C 00 44 07
70: 70 00 80 01 28 6D 07 00 - 08 00 48 07 00 00 00 00
80: 28 6D 07 00 0C 00 54 07 - 71 00 80 01 28 6D 07 00
90: 08 00 58 07 00 00 00 00 - 28 6D 07 00 0C 00 64 07
A0: 72 00 80 01 28 6D 07 00 - 08 00 68 07 00 00 00 00
B0: 28 6D 07 00 0C 00 74 07 - 73 00 80 01 28 6D 07 00
C0: 08 00 78 07 00 00 00 00 - 28 6D 07 00 08 00 10 03
D0: 00 20 20 02 28 6A 07 00 - 02 00 B0 04 00 00 20 07
E0: 28 6A 07 00 03 00 A4 04 - 00 00 00 C0 28 6A 07 00
F0: 02 00 D0 04 00 00 20 07 - 28 6A 07 00
[HECI1] Send msg: 01FC0008
00: 03 00 C4 04 00 00 00 C0 - 28 6A 07 00 02 00 70 03
10: 04 20 00 07 28 6A 07 00 - 03 00 64 03 00 00 00 C0
20: 28 6A 07 00 07 00 6C 03 - 00 00 02 00 28 6D 07 00
30: 07 00 8C 03 00 00 02 00 - 0F 00 00 00 28 CA 07 00
40: 0F 00 01 40 06 B8 3D 2F - 28 CA 07 00 0F 00 2B 40
50: 05 40 6A 00 28 CA 07 00 - 0F 00 2C 40 80 53 A2 09
60: 28 CA 07 00 0F 00 04 7F - 80 C6 00 00 28 CA 07 00
70: 0F 00 2C 70 00 C2 88 00 - 28 CA 07 00 0F 00 00 70
80: 08 1E 64 64 28 CA 07 00 - 0F 00 2C 70 00 C2 88 00
90: 28 CA 07 00 0F 00 08 70 - 20 5A 2B 22 28 CA 07 00
A0: 0F 00 14 70 18 4D E9 59 - 28 CA 07 00 0F 00 24 70
B0: 00 E8 01 30 28 CA 07 00 - 0F 00 00 41 91 B0 05 FC
C0: 28 CA 07 00 0F 00 26 41 - 4B 92 82 43 28 CA 07 00
D0: 0F 00 08 41 D0 DA 00 00 - 28 CA 07 00 0F 00 00 42
E0: 91 B0 05 FC 28 CA 07 00 - 0F 00 26 42 4B 92 82 43
F0: 28 CA 07 00 0F 00 08 42 - D0 DA 00 00 28 CA 07 00
00: 0F 00 00 43 91 B0 05 FC - 28 CA 07 00 0F 00 26 43
10: 4B 92 82 43 28 CA 07 00 - 0F 00 08 43 D0 DA 00 00
20: 28 CA 07 00 0F 00 00 44 - 91 B0 05 FC 28 CA 07 00
30: 0F 00 26 44 4B 92 82 43 - 28 CA 07 00 0F 00 08 44
40: D0 DA 00 00 28 CA 07 00 - 0F 00 00 45 91 B0 05 FC
50: 28 CA 07 00 0F 00 26 45 - 4B 92 82 43 28 CA 07 00
60: 0F 00 08 45 D0 DA 00 00 - 28 CA 07 00 0F 00 00 46
70: 91 B0 05 FC 28 CA 07 00 - 0F 00 26 46 4B 92 82 43
80: 28 CA 07 00 0F 00 08 46 - D0 DA 00 00 28 CA 07 00
90: 0F 00 00 47 91 B0 05 FC - 28 CA 07 00 0F 00 26 47
A0: 4B 92 82 43 28 CA 07 00 - 0F 00 08 47 D0 DA 00 00
B0: 28 CA 07 00 0F 00 00 48 - 91 B0 05 FC 28 CA 07 00
C0: 0F 00 26 48 4B 92 82 43 - 28 CA 07 00 0F 00 08 48
D0: D0 DA 00 00 28 CA 07 00 - 0F 00 00 49 91 B0 05 FC
E0: 28 CA 07 00 0F 00 26 49 - 4B 92 82 43 28 CA 07 00
F0: 0F 00 08 49 D0 DA 00 00 - 28 CA 07 00
[HECI1] Send msg: 804C0008
00: 0F 00 00 4A 91 B0 05 FC - 28 CA 07 00 0F 00 26 4A
10: 4B 92 82 43 28 CA 07 00 - 0F 00 08 4A D0 DA 00 00
20: 0F 00 00 00 28 AA 07 00 - 0F 00 30 80 01 04 30 00
30: 28 AA 07 00 0F 00 3C 80 - 07 00 00 00 28 AA 07 00
40: 0F 00 04 80 60 00 00 20 - 0F 00 00 00
[HECI1] Got msg Success: 80140008
00: 00 00 05 00 19 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
PeiHeciWriteChipsetInitMsg(): End
No global reset required
ChipsetInitSync() End
One of the modphy lanes assigned to usb skipping setting MPLSPDDGE and MLSPDDGE
DCI Debug Disabled
PmcSendCommand(): IPC_COMMAND=0xA1, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x10000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
CnviConfigureBt() - Start
CNVi has been fused out
POSTCODE=<00009B7F>
PchInit - End
PostMem SaInit Entry
POSTCODE=<00009A00>
PostMemCheckAndForceVddOn start
PostMemCheckAndForceVddOn end status - 0x0
DeviceConfigure Start
POSTCODE=<00009A01>
Sa Register Mirror Start
Programming GGC
Programming TOUUD
Programming TOLUD
Programming BDSM
Programming BDSM 0x7C000001
Programming BGSM
Programming BGSM 0x7B800001
Programming TSEG
Install PPI: 8E3BB474-0545-4902-86B0-6CB5E264B4A5
Initializing SA GNA device
POSTCODE=<00009A16>
CpuDmi16SpeedChange Start
CpuDmi16SpeedChange not supportedInitializing ConfigureCpuTraceHub
POSTCODE=<00009A22>
ConfigureCpuTraceHub () - Start
TraceHubDataHob->EfiHobGuidType.Name: F1187E54-995F-49D9-ACEE-C534F45A18C7
TraceHubDataHob @ 76CB0298
TraceHubDataHobSize - HobHeader: 8
TraceHubDataHobSize: 20
Program MTB/SW/RTIT BAR
Enable MSE
Clearing LPP_CTL_LPME
LPP_CTL = 113, SCRPD0 = 0 EnableMode 0
CPU Intel Trace Hub is in Low Power Mode or not connected and is disabled by SETUP menu . Stop the initialization.
Initializing TCSS
POSTCODE=<00009A31>
[TCSS] TcssInit() - Start
[TCSS] IomReadyCheck - Start
IOMReady bit = 1
IomReady bit updated to TCSS HOB
IOM version: 0x11001600; Engr version: 0x00000000
TCSS HOB updated
[TCSS] IomReadyCheck - End
[TCSS] TcssRtd3Update - Start
TCSS RTD3: 0x1
[TCSS] TcssRtd3Update - End
[TCSS] TcssCstatelimit() - Start
IOM mailbox data = 0x0000000A
IOM mailbox command = 0x80000007
Override MailBoxData from 8 to 10
[TCSS] System Supported TC State = 0x0000000A
[TCSS] TcssCstatelimit() - End - Status Success
[TCSS] SaXdciIrq - Start
IOM mailbox data = 0x01000100
IOM mailbox command = 0x00000102
SA xDCI Int pin: 0x01
SA xDCI Irq: 0x10
[TCSS] SaXdciIrq - End - Status
[TCSS] IomSetTcColdPowerSavingFactor - Start
IOM mailbox data = 0x00000A32
IOM mailbox command = 0x00000009
IomSetTcColdPowerSavingFactor - End - Status Success
[TCSS] TcssInitAuxHslOri() - Start
Origional AuxOriReg: 0x00000000
IomConfig->IomOverrides.AuxOri: 0x00000000
Update AuxOri: 0x80000000
Origional HslOriReg: 0x00000000
IomConfig->IomOverrides.HslOri: 0x00000000
Update HslOri: 0x80000000
[TCSS] TcssInitAuxHslOri() - End
[TCSS] ConfigureTbtPcieSegFuncMap() - Start
TcssHob->TcssData.PcieMultipleSegmentEnabled = 0
R_SA_PCIESEGMAP = 0, R_SA_PCIEFUNCMAP = 688
[TCSS] ConfigureTbtPcieSegFuncMap() - End
SaPcieInit
SaPcieInit End
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0x9A13
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 1
Test for XHCI_MEM_DAP_ESS_PORT
HDCI Debug Disabled
XhciConfigure() - End
xDCI Controller DID: 0x9A15
xDCI: Device enabled
[TCSS]PmcTcssBiosInitDone: Sending TCSS BIOS Init Done message to PMC 0x01
PmcSendCommand(): IPC_COMMAND=0xA5, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000003, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
[TCSS] TcssIomVccStInfoUpdate - Start
TCSS IOM VccSt: 0x1
[TCSS] TcssIomVccStInfoUpdate - End
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Install PPI: 5AD291B8-ACE4-416A-B750-076359FCC15B
[TCSS] TcssInit() - End
PciExpress PostMem Initialization
POSTCODE=<00009A20>
CPU PcieRpInit() Start
---- RpIndex mapping ----
---- RpIndex = 0 ; PortId = 1 => PEG060 ----
MaxCpuPciePortNum = 1
**** RpIndex = 0 ****
Slot implemented bit is set!
Port 1 has a device attached.
CLKREQ is not assigned, disabling power management for RP 0.
CLKREQ is not connected, clear RpClkreqMask!
Configure power management applicable to all port including disabled ports!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Clock gating is enabled!
Setting PTOCGE
Power gating is enabled!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Root port Clock gating is enabled!
RpIndex 0
Offset[E0] 917400
Offset[E0] 917700
Root port Power gating is enabled!
Load Fia Programming - FIA programming Enabled!
CpuFiaFinalizeConfigurationAndLock - SB_PORTID_PCIE_FIA0
Offset 0x00[CC] = 0x18000
Offset 0x20[PLLCTL] = 0x40000000
Offset 0x40[PMC] = 0x100008
Offset 0x48[PGCUC] = 0x0
CpuPcieWaitForLinkActive, RP mask to wait for = 0x00000001
CpuPcieWaitForLinkActive, all RPs done, lost 0ms waiting
CpuPcieSip16PtmInit for RpBase 30000
PTMCAPR before write in sip16 = 410
PTMCAPR after write in sip16 = 416
PTMCTLR before write RS and PTME = 0
PTMCTLR after write RS and PTME = 3
FomsCp from policy : 0, RpIndex : 0
FomsCpValue : 0
FomsCp after read : 0
Call InitCpuPcieSingleRootPort for Portid 1
InitCpuPcieSingleRootPort (1) Start
Target Link Speed = 1
Set the Completion Retry Status Replay Enable, Dxx:Fn + 320h[22]
CpuPcieGetDeviceInfo Start
VID: 1987 DID: 5013 MLS: 3
CpuPcieGetDeviceInfo End
End point detected with Gen3 capability!!!
Root port is Gen3/4 capable!!!
CpuPcieMaxPayloadMax = 3
Upstream Non-Posted Request Delay set to 00b which puts delay of 0 clocks
Set R_PCIE_DCAP[B_PCIE_DCAP_MPS] = 1
Coalescing Start
COCTL = 1F40F
R_PCIE_ACRG3 = 200008
Coalescing End
R_PCIE_DCAP2 after programming Atomics and 10-Bit Requester Supported = 10BF7
R_PCIE_DCTL2 after write = 400
R_PCIE_PCIERTP1 after write = B7E5BB
R_PCIE_PCIERTP2 after write = C97
R_PCIE_ACGR3S2 after setting SRT = 2ECF4
R_PCIE_PWRCTL after write = 28004
R_PCIE_PCIECFG2 after write = 63D960DB
R_PCIE_PCIEDBG after write = 8004020
R_PCIE_PCIEPMECTL2 after write = 59F0
Set LCAP APMS according to platform policy 2
Completion timeout = 0
CpuPcieSip16InitCapabilityList start
CpuPcieSip16InitCapabilityList end
Perform equalization for Gen3/Gen4 capable ports
CpuPcieLinkEqualization Start!
Link Speed = 1
CpuPcieDoGen3HardwareEq
CpuPcieDoGen3HardwareEq Start!
LSTS2: 0x0001
Gen3 Preset/Coefficient Mode Selection 1
TxOverride Disabled
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGen3InitializePresets Start!
Port 0 list 0: (3,4)
Port 0 list 1: (3,4)
Port 0 list 2: (0,0)
Port 0 list 3: (0,0)
Port 0 list 4: (0,0)
RTPCL0 = 0x80103103
RTPCL1 = 0x00000000
RTPCL2 = 0x00000000
RTPCL3 = 0x00000000
CpuPcieGen3InitializePresets End!
Gen3 TS Lock Timer = 3
Gen3 PCET timeout = 8 ms
Number Of Preset/Coefficient List = 2
CpuPcieDoGen3HardwareEq End!
CpuPcieLinkEqualization End!
Root PCI-E Powermanagement SCI Enable
Initialize downstream devices
RootportDownstreamConfiguration 6:0
RecursiveBusAssignmentE 0:6:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:6:0 -> 0,2,2
RecursiveMpsCheck 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveCccConfiguration 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
R_PCIE_RXMC1 before write : 0
R_PCIE_RXMC1 after write : 7FF02810
RXMC2 : D651CA
Program TLS to 3
Retrain the link if device is present!
CpuPcieWaitForHwEqDone Begin:
mDoGen3HwEqRpMask = 1
mDoGen4HwEqRpMask = 0
mDoGen5HwEqRpMask = 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
EQCFG1: 0x00801100
LSTS2: 0x001F
Training time = 0us
Controller : 0
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.0 FOM Scoreboard0:107 1:113 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E0000000
MM.MSS value: 0x00757500
Lane 0 Best Coeffiecient: (0xFF, 0xFF)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.1 FOM Scoreboard0:108 1:108 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E1000000
MM.MSS value: 0x00002040
Lane 1 Best Coeffiecient: (0x74, 0xAB)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.2 FOM Scoreboard0:108 1:111 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E2000000
MM.MSS value: 0x00000000
Lane 2 Best Coeffiecient: (0x0, 0x0)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.3 FOM Scoreboard0:106 1:108 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E3000000
MM.MSS value: 0x00000000
Lane 3 Best Coeffiecient: (0x0, 0x0)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
DekelFwVersion 64140E1B
Dekel FW version : 11.225
Lock the registers
CpuPcieRpSetSecuredRegisterLock () Start!
R_PCIE_LPCR before write = 0
Serl from policy: 1
R_PCIE_LPCR after write = 1000100
CpuPcieRpSetSecuredRegisterLock () End!
CPU PcieRpInit() End
UpdateSaHobPostMem Start
POSTCODE=<00009A02>
PostMem CPU PCIE HOB updated
PostMem SA Data HOB updated
Initializing VMD
POSTCODE=<00009A33>
-----------------VmdInit Start ----------------
VmdInfoHob->EfiHobGuidType.Name: CCD0306E-7FA1-4DF5-9999-C1F89A1D1BA9
VmdInfoHob @ 76CB02B8
&(VmdInfoHob->VmdPortInfo) @ 76CB02D0
VmdHobSize - HobHeaderSize: 174
VmdInfoSize: 174
VMD: VmdDetectPcieStorageDevices Start
VMD: Checking device connection on PEG ports
Read DEVEN register
PegDevenReg = 2000
VMD: Storage device found on Bus/device/Func 0/6/0 DevId 0x5013 Rp Index 1
VMD: Checking device on PCH PCIe ports
VMD: Checking the availability of SATA controller(0/23/0) for sata devices
VMD: Sata device found DevId 0xA0D3
Dumping port info
RpDev 6 RpFunc 0 DevId 0x5013 RpIndex 1
RpDev 23 RpFunc 0 DevId 0xA0D3 RpIndex 0
VMD Device has been disabled
Initializing Pavp
POSTCODE=<00009A32>
Initializing PAVP
CpuPcieRpConfigureRpfnMapping () Start!
Initializing IPU device
POSTCODE=<00009A14>
IpuInit Begins
IPU Fused off
IPU is not supported
Clear IPU bit at DEVEN regiser
[TCC] TccInit() - Start
TCC Tune system
TCC CacheCfg subregion is not valid
L2CatEntries:0x4,
CacheId:0x0, Mask[0]: 0xFFFFF,
CacheId:0x1, Mask[0]: 0xFFFFF,
CacheId:0x2, Mask[0]: 0xFFFFF,
CacheId:0x3, Mask[0]: 0xFFFFF,
L3CatEntries:0x1,
CacheId:0x0, Mask[0]: 0xFFF,
MaxIaL2Cos: 8
TCC RTCT hob data @0x76CB05D8 with size 0x1BC
Cache Prefetecher Tuning:
IfuTrainEnable: 0
ConvertItomToRfo: 0
[TCC] TccInit() - End
CpuInit Start
POSTCODE=<00009C15>
Cpu Initialization in PostMem start
CollectProcessorFeature Start
POSTCODE=<00009C17>
ProgramProcessorFeature Start
POSTCODE=<00009C18>
PmcIsPchPmTimerEnabled () = 1
TraceHubAcpiBaseAddress = 0
Initialize Processor Trace
Initialize Hardware Duty Cycle
Initialize Protected Processor Inventory Number (PPIN)
Program xAPIC
Initialize Monitor Wait register
Initialize Machine check registers
Initialize miscellaneous processor functions
(MAILBOX) Mailbox Write Command = 1Dh
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 1Ch
(MAILBOX) Mailbox Status = 00h
Initialize AVX Instructions
ProgramProcessorFeature Done
POSTCODE=<00009C19>
CpuInitPreResetCpl Start
POSTCODE=<00009C20>
ProcessorsPrefetcherInitialization Start
POSTCODE=<00009C21>
InitRatl Start
POSTCODE=<00009C22>
TCC activation programmable = 1
ConfigurePidSettings Start
POSTCODE=<00009C24>
SetBootFrequency Start
POSTCODE=<00009C25>
BiosGuardInit Start
POSTCODE=<00009C28>
BIOS Guard Module is Disabled
CpuInitPreResetCpl Done
POSTCODE=<00009C3F>
InitializeCpuDataHob Start
POSTCODE=<00009C43>
InitializeCpuDataHob Done
POSTCODE=<00009C44>
Cpu Initialize performance and power management features before RESET_CPL Done
CpuInit Done
POSTCODE=<00009C4F>
ConfigureSvidVrs Start
POSTCODE=<00009C23>
VR: Configure SVID Vr's
(MAILBOX) Mailbox Write Command = WRITE_PSYS_PMAX_CMD
(MAILBOX) PsysPmax = 172 (1/8 Watt)
(MAILBOX) Mailbox Write Data = 1376
(MAILBOX) Mailbox Write Command = 80000B18h
(MAILBOX) Mailbox Write Data = 560h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = READ_VR_STRAP_CONFIG_CMD
(MAILBOX) Mailbox Read Command = 80000018h
(MAILBOX) Mailbox Status = 00h
VR: VrTopology data = 0x9
VR Type 0 = SVID, VR Type 1 = non-SVID
VCCIN VR Address = 0x0
VCCIN VR Type = 0x0
VR: Update VR overrides
VR: SelectedCtdpLevel = 0
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
VR: Cpu Identifier = 25
VR Address for Vr Index 0 = 0x0
VR SvidEnabled for Vr Index 0 = 0x1
Override IccMax[0] = 104
Override TdcCurrentLimit[0] = 158
Override TdcEnable[0] = 1
Override AcLoadline[0] = 1B8
Override DcLoadline[0] = C8
(MAILBOX) Mailbox Write Command = WRITE_ACDC_LOADLINE_CMD
(MAILBOX) AcLoadline = 440 (1/100 mOhms)
(MAILBOX) DcLoadline = 200 (1/100 mOhms)
(MAILBOX) Mailbox Write Data = 137433606
(MAILBOX) Mailbox Write Command = 80000218h
(MAILBOX) Mailbox Write Data = 8311206h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_PSI_CUTOFF_CMD
(MAILBOX) Psi1Threshold = 80 (1/4 Amp)
(MAILBOX) Psi2Threshold = 20 (1/4 Amp)
(MAILBOX) Psi3Threshold = 4 (1/4 Amp)
(MAILBOX) Psi3Enable = 1, Psi4Enable = 1
(MAILBOX) Mailbox Write Data = 4214864
(MAILBOX) Mailbox Write Command = 80000318h
(MAILBOX) Mailbox Write Data = 405050h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_IMON_CONFIG_CMD
(MAILBOX) ImonOffset = 0 (1/1000)
(MAILBOX) ImonSlope = 0 (1/100)
(MAILBOX) Mailbox Write Data = 0
(MAILBOX) Mailbox Write Command = 80000418h
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) PCODE Mailbox Write Command = WRITE_VR_ICC_MAX_CMD
(MAILBOX) IccMax = 260 (1/4 A)
(MAILBOX) Mailbox Write Command = 80000618h
(MAILBOX) Mailbox Write Data = 104h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_VR_TDC_CONFIG_CMD
(MAILBOX) TdcPowerLimit = 344 (1/8A)
(MAILBOX) Mailbox Write Command = 8000001Ah
(MAILBOX) Mailbox Write Data = 828158h
(MAILBOX) Mailbox Status = 00h
VR SvidEnabled = 0x1
VR: VR Topology data = 0x76C8F100
VR Type 0 = SVID, VR Type 1 = non-SVID
EncodedSpectrum - 8
AmtPostMemInit() - Start
IntelMeFwImageType = 3
AmtPostMemInit() - End
Initializing VtdLateInit
POSTCODE=<00009A37>
VtdLateInit
Processor does not support Boot Guard.
Touud.Data = 0x0000000880400000
SaSecurityLock Start
POSTCODE=<00009A50>
SaSecurityLock End
POSTCODE=<00009A5F>
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
SiInit () - End
Loading PEIM 4E22BF36-C59D-47C4-9FD1-25A603D75958
Loading PEIM at 0x00076E3F000 EntryPoint=0x00076E3F3C5 SaInitFsp.efi
PROGRESS CODE: V03020002 I0
SaInitFsp Start
SaInitEntryPointFspCommon() Start
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Register for FspEventEndOfFirmware callback to set PAM lock before OS handoff
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
SaInitEntryPointFspCommon() End
SaInitFsp End
PROGRESS CODE: V03020003 I0
Loading PEIM 54D7CC18-492A-4B43-AD9E-A461D81F82B5
Loading PEIM at 0x00076E2D000 EntryPoint=0x00076E2D3C5 PchInitFspTgl.efi
PROGRESS CODE: V03020002 I0
PchInitEntryPointFsp() Start
PchInitEntryPointCommon() Start
PchInitEntryPointCommon() End
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
PchInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM EEE8D8EC-40C2-159B-71C7-8796EEEF3FBC
Loading PEIM at 0x00076E1B000 EntryPoint=0x00076E1B3C6 HeciInit.efi
PROGRESS CODE: V03020002 I0
Fsp MeInitEntryPointFsp() Start
Register PPI Notify: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
Fsp MeInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM 29CBB005-C972-49F3-960F-292E2202CECD
Loading PEIM at 0x00076E13000 EntryPoint=0x00076E133C9 FspNotifyPhasePeim.efi
PROGRESS CODE: V03020002 I0
The entry of FspNotificationPeim
Reinstall PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
PROGRESS CODE: V03020003 I0
Loading PEIM 4F1F379F-2A62-48BB-AC34-D3F135C6E2B7
Loading PEIM at 0x00076E0B000 EntryPoint=0x00076E0B346 PcatSingleSegmentPciCfg2Pei.efi
PROGRESS CODE: V03020002 I0
Install PPI: 057A449A-1FDC-4C06-BFC9-F53F6A99BB92
PROGRESS CODE: V03020003 I0
Loading PEIM 76ED893A-B2F9-4C7D-A05F-1EA170ECF6CD
Loading PEIM at 0x00076D7F000 EntryPoint=0x00076D7F4A9 IntelGraphicsPeim.efi
PROGRESS CODE: V03020002 I0
[INFO]:[PeiGraphicsEntryPoint()]:[PEI Module Name: Intel(R) Graphics Pei Module [17.0.1077] [DEBUG]]
[INFO]:[PeiGraphicsEntryPoint()]:[The value of DMI SIM Register[7:0] is 0]
[INFO]:[PeiGraphicsEntryPoint()]:[Simulation mode is disabled. Environment:HW]
Install PPI: 4EABCD09-43D3-4B4D-B73D-43C8D9899905
Install PPI: 776B0413-92BE-4EB3-BA42-4E75AB1934D9
Install PPI: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
PROGRESS CODE: V03020003 I0
DXE IPL Entry
FSP HOB is located at 0x76C90000
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: FFE09F2D
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F1F1D7
MeOnEndOfPei() enter
SendOptionalHeciCommand ()
HobSize for MePeiPreMemConfig: 2C
HobSize for MePeiConfig: 20
HobSize for AmtPeiConfig: 24
MeOnEndOfPei() done.
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F05165
[TCSS] TcssInitEndOfPei Entry
[TCSS] UpdateMgImrStatus Entry
R_IOM_CSME_IMR_MG_STATUS: 0xC00007F9
MG FW version: 0x07F9
Load MG FW success
[TCSS] UpdateMgImrStatus End
R_IOM_CSME_IMR_TBT_STATUS: 0x00000000
TBT FW version: 0x0000
TBT FW has not yet downloaded to IMR
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F01625
SiInitOnEndOfPei - Start
POSTCODE=<00009B40>
PchOnEndOfPei after memory PEI module - Start
PcieRpConfigureRpfnMapping () Start
SPA = 0x00033210
SPB = 0x000E7654
SPC = 0x00043210
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
POSTCODE=<00009B41>
PchThermalInit () Start
POSTCODE=<00009B42>
(WDT) WdtDisableBeforeS3Resume
HD Audio Class Code: 4.3.0.
HDA: Audio DSP Disabled
HDA: Power Gating and Clock Gating enabled
HDA: Configuration Lockdown
POSTCODE=<00009B47>
PchOnEndOfPei after memory PEI module - End
ConfigureMscForCpuAndPchTraceHub() Start
Trace Hub Memory is not allocated, skip configure MSC!!
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
ConfigureMscForCpuAndPchTraceHub() End
Removing PSF access: EPMASK offset 14, BIT26, endpoint: BA
Removing PSF access: EPMASK offset 14, BIT27, endpoint: BB
Removing PSF access: EPMASK offset 14, BIT28, endpoint: BC
Removing PSF access: EPMASK offset 14, BIT29, endpoint: BD
SetBiosDone Start
ReloadMicrocodePatch Start
POSTCODE=<00009C80>
Info: Skipping RaceConditionResponse per Policy
ReloadMicrocodePatch: second patch load started
LoadMicrocode: Before load, revision = 0xAC
LoadMicrocode: After load, revision = 0xAC
ReloadMicrocodePatch: Second patch load success.
ReloadMicrocodePatch Done
POSTCODE=<00009C81>
ApSafePostMicrocodePatchInit Start
POSTCODE=<00009C82>
ApSafePostMicrocodePatchInit Done
POSTCODE=<00009C83>
Set BIOS_RESET_CPL to indicate all configurations complete
POSTCODE=<00009A61>
GraphicsPmInit Start
POSTCODE=<00009A63>
iGfx Initialization start.
Initializing GT PowerManagement
----- GT PMInit() Begin------
Starting Register programming for GT PM.
Poll to verify Force Wake Acknowledge Bit, Result = 1
Enabled DOP clock gating
DSS Enable Read 0x3F Ssid 0x0
Entered RC6 state in idle mode
GT PM Init Done. Exiting.
ProgramCdClkReg: CdClock 0XFF CDCLK_CTL 0XB80518
iGfx Initialization end.
Initializing Pei Display
POSTCODE=<00009A03>
PeiDisplayInit: Begin
Register PPI Notify: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
Notify: PPI Guid: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B, Peim notify entry point: 76F05E37
PeiGraphicsNotifyCallback Entry
POSTCODE=<00009A04>
CallPpiAndFillFrameBuffer
POSTCODE=<00009A05>
CallPpiAndFillFrameBuffer: Begin
GraphicsPpiInit Start
POSTCODE=<00009A06>
[INFO]:[IsGraphicsDeviceSupported()]:[Supported Graphics Device ID Found]
[INFO]:[InitializeVbtManager()]:[VBT Base Address: 0x76A5B91C]
[INFO]:[InitializeVbtBlockPtrTable()]:[Vbt Version = 250]
[INFO]:[InitializePlatformParams()]:[Initializing Pei Platform Parameters.]
[INFO]:[InitializePlatformParams()]:[LID status from PEI platform policy unsupported.]
[INFO]:[InitializeGfxMmioBase()]:[GfxMmio Base address: 0xAF000000]
[INFO]:[InitializeGpuObject()]:[GfxDeviceId = 0x9A49 and GfxSteppingId = 0x1]
[INFO]:[InitializePchObject()]:[PCH Device Id = 0xA088 and Stepping value: 0x20]
[INFO]:[InitializePchObject()]:[PCH Type is TGL-LP.]
[INFO]:[InitializeGfxFrameBufferBase()]:[GFX FrameBuffer Base Address: 0xB0000000]
[INFO]:[InitializeDsmSizeVariable()]:[Amount of main memory pre-allocated by BIOS for GTT:8 MB]
[INFO]:[InitializeDsmSizeVariable()]:[GsmTableIndex as per BIOS is: 254 and GsmTableSize 60MB]
[INFO]:[InitializeVideoMemory()]:[BDSM value from MMIO offset 0x1080C0: 0x7C000000]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[CDCLK_CTL_REG[46000h] = 0xB80518.]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[Maximum supported Cdclk: 0x28C. SWF06: 0xB80518]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 150]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[InitializeCdClockFrequency()]:[Value of CD Freq Select: 0x0. Value of CD Freq Decimal: 0x518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[EnableCdClockPll()]:[Cdclk Enable register: 0xC0000022]
[INFO]:[InitializeCdClockFrequency()]:[Configuring the CD clock control register with the value: 0x380518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x33333300]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x706B4633]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 80]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0xB]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 70]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values from SAGV data0 : 0xB]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 1 : 33333300]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 2 : 706B4633]
[INFO]:[WatermarkInit()]:[Watermark Init is done]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP only.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 2/ Actual PchDdcNumber = 2]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 3/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-B]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[TglCheckComboPortLiveStatus()]:[Live State is set for Combo Port]
[INFO]:[ReadLttprCapabilities()]:[Reading LTTPR Caps for DdiType=1/AuxChannelNumber=16]
[INFO]:[DpInitializePort()]:[DPCD revision is 0x12]
[INFO]:[DpInitializePort()]:[Enable down spread for panel]
[INFO]:[DpLibInitializeDscCaps()]:[DSC is not supported for DPCD revision less than 1.4]
[INFO]:[CalculatePortMaxLinkRateDpcd()]:[Maximum port link rate DPCD : 0x14]
[INFO]:[DpInitializePort()]:[Panel Lane Count for DP is 4]
[INFO]:[DpInitializePort()]:[Maximum Link Rate for DP is 0xA]
[INFO]:[DpInitializePort()]:[Updated Panel Lane Count for DP is 4]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability Data type = EDID.]
[INFO]:[ReadEDID()]:[EDID size = 256]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability EDID Data size = 256 Bytes.]
==================== RAW EDID ==========================
00 FF FF FF FF FF FF 00 1E 6D CA 5B 01 01 01 01
01 1F 01 04 A5 3C 22 78 FA 7B 45 A4 55 4A A2 27
0B 50 54 A5 4B 00 71 4F 81 C0 81 00 81 80 95 00
90 40 A9 C0 B3 00 2A 44 80 A0 70 38 27 40 30 20
35 00 E0 0E 11 00 00 1E 02 3A 80 18 71 38 2D 40
58 2C 45 00 FE 22 11 00 00 1E 00 00 00 FD 00 38
4B 1E 55 12 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 46 48 44 0A 20 20 20 20 20 20 01 ED
02 03 1C F1 49 90 04 03 01 10 12 10 1F 13 23 09
07 07 83 01 00 00 65 03 0C 00 10 00 02 3A 80 18
71 38 2D 40 58 2C 45 00 FE 22 11 00 00 1E 01 1D
00 72 51 D0 1E 20 6E 28 55 00 FE 22 11 00 00 1E
8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 FE 22 11 00
00 18 00 00 00 FF 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E3
========================================================
[INFO]:[ParseDisplayIdTiledTopologyBlock()]:[Couldn't find Tiled Display Info Block.]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[DpDetectDisplayDevice()]:[DP Detection successful for port: Ddi-B]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 3]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 5]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetTimingFromDisplayIDExtention()]:[Finding extension block. Block size: 256]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetNativeModeFromEDID()]:[DTD 1 pixel clock is 174500KHz with multiplier 1]
[INFO]:[GetNativeModeFromEDID()]:[EDID Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[GetNativeModeFromEDID()]:[A supported DTD is found with pixel clock = 174500KHz]
[INFO]:[GetAspectRatioFromEdid()]:[Aspect ratio of Device type 3 is 78 ]
[INFO]:[GetNativeModeFromEDID()]:[Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[BuildSupportedModesTable()]:[GetNativeMode Status for dev 1 = Success. Resolution = 1920x1080 Mode Type = 1]
[INFO]:[SetMode()]:[FrameBufferBase = 0xB0000000]
[INFO]:[GetMaxFrameBufferSizeInBytes()]:[Frame Buffer Size in Bytes: 62914560]
[INFO]:[GalSetMode()]:[Mode set called for mode number: 1920x1080 with 4 bytes per pixel.]
[INFO]:[GalSetMode()]:[Current mode Type = 0 and modeType to set = 1]
[INFO]:[GalSetMode()]:[IsDynamicCdClockSupportEnabled = 0]
[INFO]: [GalSetMode()]:[IsHotPlugEventInProgress():0.]
[INFO]: [GalSetMode()]:[Clearing the frame buffer]
[INFO]:[ClearVideoMemory()]:[Starting clear memory from address 0xB0000000]
[INFO]:[ClearVideoMemory()]:[Video Memory size is 0x7E9000]
[INFO]:[GalAllocateGfxResources()]:[Allocating Plane1A PipeA and TranscoderA ]
[INFO]:[GalAllocateGfxResources()]:[Calling PllSelect.]
[INFO]:[PortPllSelect()]:[Display Type DP. Pll Selected DPLL0.]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPipeline=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPlane=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayTranscoder=0]
[INFO]:[CalculateWatermarkValues()]:[The memory latency value from mailbox is: 0x3]
[INFO]:[CalculateWatermarkValues()]:[HTotal Value 2080]
[INFO]:[CalculateWatermarkValues()]:[Adjusted Pixel Rate is 174500]
[INFO]:[CalculateWatermarkValues()]:[Calculated Pipe Line Time is 96]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 1 is 21]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 2 is 32]
[INFO]:[CalculateWatermarkValues()]:[Final Watermark Value is 32]
[INFO]:[CalculateWatermarkValues()]:[Calculated Blocks = 33]
[INFO]:[CalculateWatermarkValues()]:[Calculated Lines = 2]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence started for port: Ddi-B]
[INFO]:[DpEnableDisplayDevice()]:[Type C Port State: 0]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetPanelSupportedBpc()]:[Supported bpc: 2]
[INFO]:[DpEnableDisplayDevice()]:[Original Lane Count = 4,OriginalLinkRateInUseDpcd = 0A]
[INFO]:[DpEnableDisplayDevice()]:[LinkRate = 2700000]
[INFO]:[DpEnableDisplayDevice()]:[Dp Pixel Clock(in KHz) = 174500]
[INFO]:[CalculateMaxPixelClockValue()]:[Calculated MaxPixelClock value is 360000]
[INFO]:[DpLibGetPanelColorDepth()]:[Panel Color Depth Used: 24 Bpp]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[ConfigureComboPhyPortPll ()]:[DP mode index for ref: 38400 Khz and Clock :270000 Khz: 17]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
=========== Dumping DPLL0 registers ===============
PORT_PLL_CFG_CR0_REG [0x00164284]: 0x00E001A5
PORT_PLL_CFG_CR1_REG [0x00164288]: 0x00000088
DPCLKA_CFCR0_REG [0x00164280]: 0x01E17400
============= End of dumping ====================
[INFO]:[DpEnableDisplayDevice()]:[DP Pll configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[Enabled transport control and Buffer control]
[INFO]:[DpLibTrainLink()]:[Start Full Link Training]
[INFO]:[DpLibTrainLink()]:[DpcdRevision = 0x12]
[INFO]:[DpLibTrainLink()]:[Programmed 0xA to DPCD_LNK_BW_SET_REG(0x0100) for DP with Status = Success]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x1111]
[INFO]:[TrainPattern1()]:[Clock Recovery Done]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Lane Alignment Status = 0x1]
[INFO]:[TrainPattern2()]:[Channel Equalization Successful]
[INFO]:[TrainPattern2()]:[Channel Equalization Done and Vswing and PreEmphLevel are 0 and 0]
[INFO]:[DpEnableDisplayDevice()]:[Link training is completed successfully]
[INFO]:[GetWatermarkLineTime()]:[Returning line time value 60]
[INFO]:[DpEnableDisplayDevice()]:[DP pipe scalar is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP MNTu calculation is done]
[INFO]:[TranscoderSetTimings()]:[HActive = 1919/HTotal=2079, VActive = 1079/VTotal=1118]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[DP Main stream attributes are set]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder DDI function control is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder is enabled]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning blocks value 33]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning lines value 2]
[INFO]:[DpEnableDisplayDevice()]:[DP Plane is enabled]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence is completed for port: Ddi-B]
[INFO]:[GalFullSetModeEnableDevice()]:[FullSetMode completed.]
GraphicsPpiGetMode Start
POSTCODE=<00009A07>
[INFO]:[IntelPeiGraphicsGetMode()]:[Current Mode HRes = 1920 VRes = 1080]
MaxMode:0x1
Mode:0x0
SizeOfInfo:0x24
FrameBufferBase:0xB0000000
FrameBufferSize:0x7E9000
Version:0x0
HorizontalResolution:0x780
VerticalResolution:0x438
PixelFormat:0x1
PixelsPerScanLine:0x780
Install PPI: 590AD868-B0B1-4D20-91FF-C2A9D6888194
CallPpiAndFillFrameBuffer: End
PeiGraphicsNotifyCallback Exit
POSTCODE=<00009A0F>
Initializing CD Clock
POSTCODE=<00009A65>
SaPciPrint Start
POSTCODE=<00009A64>
Printing PCI space for device 0
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 14 9A 06 00 90 20 01 00 00 06 00 00 00 00
10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30 00 00 00 00 E0 00 00 00 00 00 00 00 00 00 00 00
40 01 10 DA FE 00 00 00 00 01 00 DC FE 00 00 00 00
50 C1 FE 00 00 11 A0 02 00 C7 00 A0 7F 01 00 00 7B
60 01 00 00 C0 00 00 00 00 01 00 DA FE 00 00 00 00
70 08 02 00 01 00 04 00 00 00 00 00 00 88 06 00 00
80 30 33 33 33 33 33 00 00 00 00 00 00 00 00 00 00
90 08 02 00 01 00 04 00 00 1A 02 00 01 00 04 00 00
A0 01 00 00 00 08 00 00 00 01 00 40 80 08 00 00 00
B0 01 00 00 7C 01 00 80 7B 01 00 00 7B 01 00 C0 7F
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 1A 02 00 01 00 04 00 00 00 00 00 00 00 00 00 00
E0 09 00 14 01 10 64 00 F0 08 00 24 90 0A 82 61 06
F0 00 80 1F 00 1D 0F 01 00 00 00 00 00 00 00 00 00
Printing PCI space for device 2
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 49 9A 07 00 10 00 01 00 00 03 00 00 00 00
10 04 00 00 AF 00 00 00 00 0C 00 00 B0 00 00 00 00
20 01 00 00 00 00 00 00 00 00 00 00 00 86 80 12 22
30 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
40 09 70 0C 01 0C 00 FF FF 00 00 00 00 00 00 00 00
50 C1 FE 00 00 11 20 00 00 00 00 00 00 00 00 00 00
60 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
70 10 AC 92 00 00 80 00 10 07 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 05 D0 00 01
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 01 00 00 7C 00 00 00 00 01 00 D9 FE 00 00 00 00
D0 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 C7 00 A0 7F 00 00 00 00 00 00 00 00 00 00 00 00
ConfigureHdAudioCodec() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
POSTCODE=<00009B0F>
DetectAndInitializeCodec() Start
SDI#0 has HD-Audio device.
SDI#0: Detected HD-Audio Codec 0x111D76E0 rev 0x03
ConfigureLinkFrequency() Start [SDI:0]
HDA: HDAudio-Link frequency configuration
SDI#0 Verb F00h ParamtererId = 16h response = 0x00000000
HDA: Codec Static Frequency Switching not supported!
ConfigureLinkFrequency() Exit, Status = Unsupported
Found verb table for vendor 0x111D devId 0x76E0 rev 0xFF (SDI:FF, size: 40 dwords)
SDI#1 has no HD-Audio device.
SDI#2 has HD-Audio device.
SDI#2: Detected HD-Audio Codec 0x80862812 rev 0x00
ConfigureLinkFrequency() Start [SDI:2]
HDA: iDisplay-Link frequency configuration
HDA: iDisplay-Link Static BCLK Frequency Switch ID = 4 - 96MHz
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00000004
ConfigureLinkFrequency() End
ConfigureLinkFrequency() Exit, Status = Success
Found verb table for vendor 0x8086 devId 0x2812 rev 0xFF (SDI:FF, size: 18 dwords)
DetectAndInitializeCodec() End, Status = Success
ConfigureHdAudioCodec() End, Status = Success
CpuPowerMgmtInit Start
POSTCODE=<00009C6A>
PeimInitializePowerMgmt Entry
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
EIST capable
HWP capable
Itbm: Intel Turbo Boost Max Technology 3.0 supported
InitPpm
POSTCODE=<00009C71>
PPM:: ConfigTDP Supported Levels=2
PPM:: ConfigTDP Nominal Ratio=28 Tdp=224
PPM:: ConfigTDP Level1 Ratio=12 Tdp=96
PPM:: ConfigTDP Level2 Ratio=18 Tdp=120
OverClocking Lock Bit is set. Disable the Lock and reset the system
(MAILBOX) Mailbox Read Command = 5h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 22Bh
(MAILBOX) Mailbox Status = 00h
Itbm: InitializeItbm()
Itbm: Itbm support is present in Silicon, but reference code policy is disabled
Itbm: Num of Processors = 0x8
Itbm: Highest performance of slowest core LowestMaxPerf = 0x0
MSR(1FC) before configuring C1E: 0x00240059
MSR(1FC) after configuring C1E: 0x00240059
Programming the C6/C7/C8/C9/C10 (MSR 0x60B, 0x60C ,0x633, 0x634, 0x635 IRTL if not auto.
TAR Ratio Replace at 6 with 14
CTDP Ratio Replace at 5 with 15
PROCHOT# OUT is disabled
PROCHOT# Response is enabled
PPM:: ConfigTDP MSR_CONFIG_TDP_CONTROL=0
PPM:: ConfigTDP MSR_TURBO_ACTIVATION_RATIO=14
PL3 MSR 615 Before Writing 0
PL3 MSR 615 After Writing 0
PL4 MSR 601 Before Writing 0
PL4 MSR 601 After Writing 3C8
DDR Power Limit 1 = 0
DDR Power Limit 2 = 0
New Platform Power Limit 1 0 watt (0 in CPU power unit)
Platform Power Limit 2 Power = 0 Watts (0 in CPU power unit)
CPU Post-Mem Exit
POSTCODE=<00009C7F>
EndOfPeiCheckAndForceVddOn start
EndOfPeiCheckAndForceVddOn end status - 0x0
[SA] BootMode = 0
Clear Temp Gfx BARs at End Of PEI.
BuildFviInfoHob(): Build Smbios FVI Data Hob
IomFwVersion = 11001600
MgFwVersion = 07F9
TbtFwVersion = 0000
InitializeSmbiosCacheInfoHobs() - Start
InitializeSmbiosCacheInfoHobs() - End
InitializeSmbiosProcessorInfoHob() - Start
(MAILBOX) Mailbox Read Command = 105h
(MAILBOX) Mailbox Status = 1Fh
(SMBIOS) BCLK frequency message 0, Status = Success
(SMBIOS) Setting to default BCLK frequency.
(MAILBOX) Mailbox Read Command = 1h
(MAILBOX) Mailbox Status = 1Fh
Turbo MaxSpeed 4400 MHz
InitializeSmbiosProcessorInfoHob() - End
SiInitOnEndOfPei - End
FSP is waiting for NOTIFY
FspSiliconInitApi() - [Status: 0x00000000] - End
PROGRESS CODE: V0000087F I0
Success
FspGfxHob->FrameBufferBase = 0xB0000000
Boot-time Cpu DTS: 0x1AE
Graphics Info: 1920 x 1080 x 32 @ 0xB0000000
MEM: 0000000000000000 00000000000A0000 00 1
MEM: 00000000000A0000 0000000000060000 00 2
MEM: 0000000000100000 00000000760B8000 00 1
MEM: 00000000761B8000 0000000000500000 01 2
MEM: 00000000766B8000 0000000000090000 00 3
MEM: 0000000076748000 0000000000008000 00 4
MEM: 0000000076750000 0000000000500000 00 2
MEM: 0000000076C50000 00000000003B0000 00 2
MEM: 0000000077000000 0000000004000000 00 2
MEM: 000000007B000000 0000000000800000 00 2
MEM: 000000007B800000 0000000000800000 00 2
MEM: 000000007C000000 0000000003C00000 00 2
MEM: 00000000FED20000 0000000000060000 00 2
MEM: 00000000FF530000 0000000000AD0000 00 2
MEM: 0000000100000000 0000000780400000 00 1
MP Init (Wakeup)
SMRR Base: 0x7B000006 Mask: 0xFF800000
MP Init (Run)
Detected 8 CPU threads
CPU 0 APIC ID: 0
CPU 1 APIC ID: 4
CPU 2 APIC ID: 2
CPU 3 APIC ID: 6
CPU 4 APIC ID: 1
CPU 5 APIC ID: 3
CPU 6 APIC ID: 5
CPU 7 APIC ID: 7
PCI Enum
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
PciBus: Discovered PPB @ [00|06|00]
PciBus: Discovered PCI @ [01|00|00]
PciBus: Discovered PCI @ [00|08|00]
PciBus: Discovered PCI @ [00|0A|00]
PciBus: Discovered PCI @ [00|0D|00]
PciBus: Discovered PCI @ [00|0D|01]
PciBus: Discovered PCI @ [00|10|00]
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
PciBus: Discovered PCI @ [00|14|01]
PciBus: Discovered PCI @ [00|14|02]
PciBus: Discovered PCI @ [00|15|00]
PciBus: Discovered PCI @ [00|15|01]
PciBus: Discovered PCI @ [00|16|00]
PciBus: Discovered PCI @ [00|17|00]
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [02|00|00]
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [03|00|00]
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [05|00|00]
PciBus: Discovered PPB @ [05|01|00]
PciBus: Discovered PPB @ [05|02|00]
PciBus: Discovered PPB @ [05|03|00]
PciBus: Discovered PPB @ [05|04|00]
PciBus: Discovered PCI @ [0A|00|00]
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0B|00|00]
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0C|00|00]
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0D|00|00]
PciBus: Discovered PCI @ [00|1E|00]
PciBus: Discovered PCI @ [00|1E|03]
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
PciBus: Discovered PCI @ [00|1F|04]
PciBus: Discovered PCI @ [00|1F|05]
DumpPciResAllocTable: NumOfEntries 1
Bus : 0 - FF
Io : 2000 - FFFF
Mem32: 80000000 - FFFFFFFF
Mem64: 1000000000 - 1800000000
PCI(00,00,00)
PCI(00,02,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000080000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[1].TYP = 4
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000090000000 BAR[1].LEN = 0000000010000000 BAR[1].ALN = 000000000FFFFFFF
BAR[2].TYP = 1
BAR[2].OFF = 0x20
BAR[2].BAS = 0000000000002000 BAR[2].LEN = 0000000000000040 BAR[2].ALN = 000000000000003F
PCI(00,06,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081F00000 BAR[2].LEN = 0000000000100000 BAR[2].ALN = 00000000000FFFFF
PCI(01,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F00000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
PCI(00,08,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082040000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,0A,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082020000 BAR[0].LEN = 0000000000008000 BAR[0].ALN = 0000000000007FFF
PCI(00,0D,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082010000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,0D,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081200000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203F000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,10,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203E000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,10,05)
PCI(00,14,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082000000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,14,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081000000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203D000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,14,02)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008202C000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203C000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,15,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203B000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,15,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203A000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,16,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082039000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,17,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082030000 BAR[0].LEN = 0000000000002000 BAR[0].ALN = 0000000000001FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x14
BAR[1].BAS = 0000000082038000 BAR[1].LEN = 0000000000000100 BAR[1].ALN = 0000000000000FFF
BAR[2].TYP = 1
BAR[2].OFF = 0x18
BAR[2].BAS = 0000000000002080 BAR[2].LEN = 0000000000000008 BAR[2].ALN = 0000000000000007
BAR[3].TYP = 1
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000000002088 BAR[3].LEN = 0000000000000004 BAR[3].ALN = 0000000000000003
BAR[4].TYP = 1
BAR[4].OFF = 0x20
BAR[4].BAS = 0000000000002060 BAR[4].LEN = 0000000000000020 BAR[4].ALN = 000000000000001F
BAR[5].TYP = 3
BAR[5].OFF = 0x24
BAR[5].BAS = 0000000082037000 BAR[5].LEN = 0000000000000800 BAR[5].ALN = 0000000000000FFF
PCI(00,1C,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081D00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(02,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081D00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081E00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081B00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(03,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081B00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081C00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,04)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(04,00,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(05,00,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,01,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,02,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,03,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,04,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(0A,00,00)
BAR[0].TYP = 4
BAR[0].OFF = 0x10
BAR[0].BAS = 00000000A0000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[2].TYP = 4
BAR[2].OFF = 0x1C
BAR[2].BAS = 00000000A1000000 BAR[2].LEN = 0000000000008000 BAR[2].ALN = 0000000000007FFF
PCI(00,1D,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081900000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0B,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081900000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081A00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,01)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081700000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0C,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081700000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081800000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081500000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0D,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081500000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081600000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1E,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082036000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000082035000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,1E,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082034000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,1F,00)
PCI(00,1F,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082028000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[3].TYP = 3
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000081400000 BAR[3].LEN = 0000000000100000 BAR[3].ALN = 00000000000FFFFF
PCI(00,1F,04)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082033000 BAR[0].LEN = 0000000000000100 BAR[0].ALN = 0000000000000FFF
BAR[3].TYP = 1
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000000002040 BAR[3].LEN = 0000000000000020 BAR[3].ALN = 000000000000001F
PCI(00,1F,05)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082032000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI HOST: Bus(0x00-0D)
BAR[0].TYP = 1
BAR[0].OFF = 0x100
BAR[0].BAS = 0000000000002000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000080000000 BAR[2].LEN = 0000000002100000 BAR[2].ALN = 0000000000FFFFFF
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 0000000090000000 BAR[3].LEN = 0000000011100000 BAR[3].ALN = 000000000FFFFFFF
PciRootBridgeInfoHob: Rev 0x1, Count 0x1
Bus(0x00-0D)
BarType-1: Base 0x0000000000002000 Length 0x0000000000001000
BarType-3: Base 0x0000000080000000 Length 0x0000000002100000
BarType-4: Base 0x0000000090000000 Length 0x0000000011100000
MEM Pool Used: 0x000075BC
RootportDownstreamPmConfiguration 6:0
RecursiveBusAssignmentP 0:6:0 -> 0,2,1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 1:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrOverrideCheck 1:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=1
ConfigureRpLtrOverride 30000 Val 0 En 0
ConfigureRpLtrOverride 6:0
RecursiveCpmConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveCpmConfiguration 1:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveL1ssConfiguration 1:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:6:0
GetAspmCaps 00:06:00 L0s- 4:x L1+ 16:x
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveAspmConfiguration 1:0:0
GetAspmCaps 01:00:00 L0s- 7:7 L1- 255:255
CombineAspm FF:FF -> FF
SetAspm on 00:06:00 to 0
IsPcieDevice 01:00:00 - yes
SetAspm on 01:00:00 to 0
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1C:3
RecursiveBusAssignmentP 0:1C:3 -> 0,4,3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 3:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrOverrideCheck 3:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E3000 Val 0 En 0
ConfigureRpLtrOverride 1C:3
RecursiveCpmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCpmConfiguration 3:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveL1ssConfiguration 3:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:3
GetAspmCaps 00:1C:03 L0s- 4:x L1- 16:x
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveAspmConfiguration 3:0:0
GetAspmCaps 03:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:03 to 0
IsPcieDevice 03:00:00 - yes
SetAspm on 03:00:00 to 0
RootportDownstreamPmConfiguration 1C:4
RecursiveBusAssignmentP 0:1C:4 -> 0,5,A
IsPcieDevice 04:00:00 - yes
RecursiveBusAssignmentP 4:0:0 -> 4,6,A
IsPcieDevice 05:00:00 - yes
RecursiveBusAssignmentP 5:0:0 -> 5,7,6
IsPcieDevice 05:01:00 - yes
RecursiveBusAssignmentP 5:1:0 -> 5,8,7
IsPcieDevice 05:02:00 - yes
RecursiveBusAssignmentP 5:2:0 -> 5,9,8
IsPcieDevice 05:03:00 - yes
RecursiveBusAssignmentP 5:3:0 -> 5,A,9
IsPcieDevice 05:04:00 - yes
RecursiveBusAssignmentP 5:4:0 -> 5,B,A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveLtrConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveLtrConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveLtrConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveLtrConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveLtrConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration A:0:0
Not LtrCapable 0A:00:00
RecursiveLtrOverrideCheck 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrOverrideCheck 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveLtrOverrideCheck 5:0:0
HasChildBus05:00:00: yes, 6
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:01:00 - yes
RecursiveLtrOverrideCheck 5:1:0
HasChildBus05:01:00: yes, 7
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:02:00 - yes
RecursiveLtrOverrideCheck 5:2:0
HasChildBus05:02:00: yes, 8
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:03:00 - yes
RecursiveLtrOverrideCheck 5:3:0
HasChildBus05:03:00: yes, 9
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:04:00 - yes
RecursiveLtrOverrideCheck 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrOverrideCheck A:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E4000 Val 0 En 0
ConfigureRpLtrOverride 1C:4
RecursiveCpmConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveCpmConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveCpmConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveCpmConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveCpmConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveCpmConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveCpmConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveCpmConfiguration A:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveL1ssConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveL1ssConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveL1ssConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveL1ssConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveL1ssConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveL1ssConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveL1ssConfiguration A:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:4
GetAspmCaps 00:1C:04 L0s- 4:x L1- 16:x
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveAspmConfiguration 4:0:0
GetAspmCaps 04:00:00 L0s- 0:x L1+ 1:x
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveAspmConfiguration 5:0:0
GetAspmCaps 05:00:00 L0s- 0:x L1+ 1:x
HasChildBus05:00:00: yes, 6
SetAspm on 05:00:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:01:00 - yes
RecursiveAspmConfiguration 5:1:0
GetAspmCaps 05:01:00 L0s- 0:x L1+ 1:x
HasChildBus05:01:00: yes, 7
SetAspm on 05:01:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:02:00 - yes
RecursiveAspmConfiguration 5:2:0
GetAspmCaps 05:02:00 L0s- 0:x L1+ 1:x
HasChildBus05:02:00: yes, 8
SetAspm on 05:02:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:03:00 - yes
RecursiveAspmConfiguration 5:3:0
GetAspmCaps 05:03:00 L0s- 0:x L1+ 1:x
HasChildBus05:03:00: yes, 9
SetAspm on 05:03:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:04:00 - yes
RecursiveAspmConfiguration 5:4:0
GetAspmCaps 05:04:00 L0s- 0:x L1+ 1:x
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveAspmConfiguration A:0:0
GetAspmCaps 0A:00:00 L0s+ 5:3 L1+ 16:64
CombineAspm FF:3F -> 3F
SetAspm on 05:04:00 to 2
IsPcieDevice 0A:00:00 - yes
SetAspm on 0A:00:00 to 2
CombineAspm FF:3F -> 3F
CombineAspm FF:3F -> 3F
SetAspm on 00:1C:04 to 0
IsPcieDevice 04:00:00 - yes
SetAspm on 04:00:00 to 0
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1D:0
RecursiveBusAssignmentP 0:1D:0 -> 0,C,B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration B:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrOverrideCheck B:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E8000 Val 0 En 0
ConfigureRpLtrOverride 1D:0
RecursiveCpmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveCpmConfiguration B:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveL1ssConfiguration B:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:0
GetAspmCaps 00:1D:00 L0s- 4:x L1- 16:x
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveAspmConfiguration B:0:0
GetAspmCaps 0B:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:00 to 0
IsPcieDevice 0B:00:00 - yes
SetAspm on 0B:00:00 to 0
RootportDownstreamPmConfiguration 1D:1
RecursiveBusAssignmentP 0:1D:1 -> 0,D,C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration C:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrOverrideCheck C:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E9000 Val 0 En 0
ConfigureRpLtrOverride 1D:1
RecursiveCpmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveCpmConfiguration C:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveL1ssConfiguration C:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:1
GetAspmCaps 00:1D:01 L0s- 4:x L1- 16:x
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveAspmConfiguration C:0:0
GetAspmCaps 0C:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:01 to 0
IsPcieDevice 0C:00:00 - yes
SetAspm on 0C:00:00 to 0
RootportDownstreamPmConfiguration 1D:3
RecursiveBusAssignmentP 0:1D:3 -> 0,E,D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrConfiguration D:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrOverrideCheck D:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride EB000 Val 0 En 0
ConfigureRpLtrOverride 1D:3
RecursiveCpmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveCpmConfiguration D:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveL1ssConfiguration D:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:3
GetAspmCaps 00:1D:03 L0s+ 4:x L1+ 16:x
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveAspmConfiguration D:0:0
GetAspmCaps 0D:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:03 to 2
IsPcieDevice 0D:00:00 - yes
SetAspm on 0D:00:00 to 2
GFX framebuffer WC is enabled @ 0x90000000:0x10000000
Call FspNotifyPhase(20) ... PROGRESS CODE: V00006800 I0
NotifyPhaseApi() - Begin [Phase: 00000020]
FSP Post PCI Enumeration ...
Install PPI: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E3F517
Enable MSE of Telemetry
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E2D472
PchOnPciEnumCompleteFsp() Start
PchOnPciEnumCompleteCommon() Start
Protected range 0: 0x960F1530
Protected range 1: 0x9FFF1650
GpioCheckConflict Start..
[GPIO Conflict Check] No GPIO HOB found.
PchOnPciEnumCompleteCommon() End
PchOnPciEnumCompleteFsp() End
NotifyPhaseApi() - End [Status: 0x00000000]
PROGRESS CODE: V0000687F I0
Success
ACPI NVS, LowPowerS0IdleConstraint(Micro-pep constraints) = 0x0000000069CA07F7
Update Cpu Nvs Done
Revision 0x1, PpmFlags 0x027A7FB3
Initialize VT-d
VTd enabled
ACPI Init
Creating BDAT Table...
No BDAT data exists, exiting without creating table
Updated BDAT Table in AcpiTable Entries
Publish ACPI table: BDAT @ 0x766B8210
Updated DMAR Table in AcpiTable Entries
Update Dmar ACPI Table
McD0BaseAddress 0x00000000, IgdMode 0x0000
GttMode 0x0003, GttMmAdr 0x80000000, GttMemSize 0x00800000
RMRR Base address IGD 000000007B800000
RMRR Limit address IGD 000000007FBFFFFF
RMRR Base address USB 0000000000000000
RMRR Limit address USB 0000000000000000
WARNING: RmrrUsb.RmrrHeader.ReservedMemoryRegionBaseAddress is 0.
RMRR Base address TCSS DMA0 0000000000000000
RMRR Limit Address TCSS DMA0 0000000000000000
RMRR Base address TCSS DMA1 0000000000000000
RMRR Limit Address TCSS DMA1 0000000000000000
VTD base address 1 = FED90000
VTD base address 2 = 0
VTD base address 4 = 0
VTD base address 5 = 0
VTD base address 6 = 0
VTD base address 7 = 0
VTD base address 3 = FED91000
Removing Ibt DRHD engine 0
Removing Ibt DRHD engine 1
Removing Ibt DRHD engine 2
Removing Ibt DRHD engine 3
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Publish ACPI table: DMAR @ 0x766B8240
Not adding ACPI table
Publish ACPI table: FACP @ 0x766B8310
Publish ACPI table: FWST @ 0x766B8430
Publish ACPI table: HPET @ 0x766B8560
Publish ACPI table: LPIT @ 0x766B85A0
Publish ACPI table: APIC @ 0x766B8670
Publish ACPI table: MCFG @ 0x766B8760
Publish ACPI table: FPDT @ 0x766B87A0
Publish ACPI table: TPM2 @ 0x766B8840
Updated Psd Table in AcpiTable Entries
Publish ACPI table: PSDS @ 0x766B8890
Publish ACPI table: SSDT @ 0x766B88F0
Publish ACPI table: SSDT @ 0x766B8D80
Publish ACPI table: SSDT @ 0x766B9210
Publish ACPI table: SSDT @ 0x766B9B00
Publish ACPI table: SSDT @ 0x766B9FE0
Publish ACPI table: SSDT @ 0x766BAB20
Publish ACPI table: SSDT @ 0x766BAEC0
Publish ACPI table: SSDT @ 0x766BB000
Publish ACPI table: SSDT @ 0x766BB820
Publish ACPI table: SSDT @ 0x766BB9F0
CPU PNVS Base Old=0xFFFF0000 New=0x76748D8D
CPU PNVS Size Old=0xAA55 New=0x0065
Publish ACPI table: SSDT @ 0x766BBDD0
Publish ACPI table: SSDT @ 0x766BE240
PNVS Old=0xFFFF0000 New=0x76748AB5
PNVL Old=0x0000AA55 New=0x000002D8
Publish ACPI table: SSDT @ 0x766DFE70
SANV Base Old=0xFFFF0000 New=0x76748DF2
SANV Size Old=0xAA55 New=0x01BC
Publish ACPI table: SSDT @ 0x766E0240
Publish ACPI table: SSDT @ 0x766E6440
Publish ACPI table: SSDT @ 0x766E72C0
Publish ACPI table: BGRT @ 0x766EAF20
Find RTCT table
Not adding ACPI table
ACPI Ret: Success
AppendSmbiosFwSts () Start
Current ME FW HOB data printed -
00: 01 04 00 00 00 00 00 00 - 55 02 00 90 16 01 10 80
10: 20 00 00 00 00 40 00 00 - 00 00 00 00 00 00 40 00
20: 01 00 00 00 FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - FF FF FF FF 04 00 00 00
40: 00 00 00 80 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 05 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
FWSTS SMBIOS table OEM type 0xDB data printed -
00: DB 6A 00 00 01 04 01 55 - 02 00 90 16 01 85 30 20
10: 00 00 00 00 40 00 00 00 - 00 00 00 00 00 40 00 02
20: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - 03 00 00 00 80 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 04 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00
VbtAddress =0x76A5B91C
Extended VBT supported
VBT data found '$VBT TIGERLAKE '
Updating GOP VBT fields using GOP Configuration Lib.
Update VBT for TGL-U (CNT) LPDDR4
VBT Updated.
IgdOpRegion ended
HeciInitialize () - Start
InitializeHeci () - H_RDY is already initialized
HeciInitLib init Status: Success
CSME MeasuredBoot state: 0
Loading Payload ID UEFI
Loading Component EPLD:UEFI
Registering container EPLD
HASH verification for usage (0x00001000) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00001000): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Load Payload ID 0x49464555 @ 0x00B00000
FV Format Payload
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
MP Init (Done)
HOB @ 0x76C10000
Created 3 OS boot options (Current: 0)
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
HECI1 MeFirmwareStatus = 400000
Stage2: HwState 0x4 TpmType 0x1
TPM Lib Private Data not found
Unable to get log area for TCG 2.0 format events !!
Stage2 stack: 0x40000 (stack used 0xA40, HOB used 0x16E0, 0x3DEE0 free)
Stage2 heap: 0x4C0000 (0x2C9C50 used, 0x1F63B0 free, 0x438CD7 max used)
Payload entry: 0x00800320
Jump to payload
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x00000800000, size is 0x00030000, handle is 0x800000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x5 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x0000080D080 EntryPoint=0x0000080D395 PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM A3610442-E69F-4DF3-82CA-2360C4031A23
Loading PEIM at 0x00000812720 EntryPoint=0x00000812A35 ReportStatusCodeRouterPei.efi
Install PPI: 0065D394-9951-4144-82A3-0AFC8579C251
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Loading PEIM 9D225237-FA01-464C-A949-BAABC02D31D0
Loading PEIM at 0x000008157C0 EntryPoint=0x00000815AD5 StatusCodeHandlerPei.efi
Loading PEIM 352C6AF8-315B-4BD6-B04F-31D4ED1EBE57
Loading PEIM at 0x000008186A0 EntryPoint=0x00000818A88 BlSupportPeim.efi
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
MemInfoCallback: Base=0x 0, Size=0x A0000, Type=0x0 (0x1)
MemInfoCallback: Base=0x A0000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0x 100000, Size=0x760B8000, Type=0x0 (0x1)
MemInfoCallback: Base=0x761B8000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x766B8000, Size=0x 90000, Type=0x5 (0x3)
MemInfoCallback: Base=0x76748000, Size=0x 8000, Type=0x5 (0x4)
MemInfoCallback: Base=0x76750000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x76C50000, Size=0x 3B0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x77000000, Size=0x 4000000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B000000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B800000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7C000000, Size=0x 3C00000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFED20000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFF530000, Size=0x AD0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x100000000, Size=0x780400000, Type=0x0 (0x1)
Low memory 0x761B8000
SystemLowMemTop 0x80000000
PeiMemBase: 0x721B0000.
PeiMemSize: 0x4000000.
PeiInstallPeiMemory MemoryBegin 0x721B0000, MemoryLength 0x4000000
ERROR - Invalid Firmware Volume Header Checksum, change 0xE699 to 0x57FE
Found one valid fv : 0x5D000000830000.
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: 801CEA
The 1th FV start address is 0x00000830000, size is 0x005D0000, handle is 0x830000
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Created graphics info hob
Created graphics device info hob
Detected Acpi Table at 0x766B8000, length 0x32F58
Detected Smbios Table at 0x769E8000, length 0x1000
Rsdp at 0x766B8000
Rsdt at 0x766B8030, Xsdt at 0x766B80E0
Found Fadt in Rsdt
Found MM config address in Rsdt
PmCtrl Reg 0x1804
PmTimer Reg 0x1808
Reset Reg 0xCF9
Reset Value 0x6
PmEvt Reg 0x1800
PmGpeEn Reg 0x1870
PcieBaseAddr 0xC0000000
Create acpi board info guid hob
VerifiedBoot 0x0
MeasuredBoot 0x0
Get FSP hob success. FspsBase = 0x76B78000
Get FSP hob success. FspHobList = 0x76C90000
Get SMM info. smm_base = 0x7B000000
smm_size = 0x800000
Base = 0xFF610000, Size=0x40000 Status=0xSuccess
GuidHob = 0x80E90
DeviceTable = 0x76C10E08
found it = 0x1F05
DeviceBase = 0x1F05
2DeviceBase = 0xFD000
SpiPciBase = 0xC00FD000
SpiFlashInfo->Flags = 0x1
SPI flash base at 0xC00FD000
VarStoreBase=0xFF610000, length=0x40000
TpmType - TPM_TYPE_NONE
Temp Stack : BaseAddress=0x88000 Length=0x8000
Temp Heap : BaseAddress=0x80000 Length=0x8000
Total temporary memory: 65536 bytes.
temporary memory stack ever used: 32768 bytes.
temporary memory heap used for HobList: 4192 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Old Stack size 32768, New stack size 131072
Stack Hob: BaseAddress=0x721B0000 Length=0x20000
Heap Offset = 0x72150000 Stack Offset = 0x72140000
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x000761A3000 EntryPoint=0x000761A3355 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x0007619C000 EntryPoint=0x0007619C3F6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
DiscoverPeimsAndOrderWithApriori(): Found 0x0 PEI FFS files in the 1th FV
DXE IPL Entry
Loading PEIM D6A2CB7F-6A18-4E2F-B43B-9920A733700A
Loading PEIM at 0x00076174000 EntryPoint=0x00076174B94 DxeCore.efi
Loading DXE CORE at 0x00076174000 EntryPoint=0x00076174B94
AddressBits=39 5LevelPaging=0 1GPage=1
Pml5=1 Pml4=1 Pdp=512 TotalPage=2
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 80D5FA
HandOffToDxeCore() Stack Base: 0x76154000, Stack Size: 0x20000
HOBLIST address in DXE = 0x758A2018
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000003 0x761A3000 - 0x761AFFFF
Memory Allocation 0x00000003 0x7619C000 - 0x761A2FFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000004 0x75E00000 - 0x75FFFFFF
Memory Allocation 0x00000007 0x76000000 - 0x76153FFF
Memory Allocation 0x00000004 0x721B0000 - 0x721CFFFF
Memory Allocation 0x00000004 0x75DFF000 - 0x75DFFFFF
FV Hob 0x830000 - 0xDFFFFF
InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 761973E0
InstallProtocolInterface: 8F644FA9-E850-4DB1-9CE2-0B44698E8DA4 7589ED30
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7589E098
InstallProtocolInterface: 220E73B6-6BDB-4413-8405-B974B108619A 7589E630
InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 76198070
Loading driver 80CF7257-87AB-47F9-A3FE-D50B76D89541
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754D91C0
Loading driver at 0x000754BA000 EntryPoint=0x000754BA374 PcdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754D9518
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
InstallProtocolInterface: 11B34006-D85B-4D0A-A290-D5A571310EF7 754C12C0
InstallProtocolInterface: 13A3F0F6-264A-3EF0-F2E0-DEC512342F34 754C1220
InstallProtocolInterface: 5BE40F57-FA68-4610-BBBF-E9C5FCDAD365 754C13D0
InstallProtocolInterface: FD0F4478-0EFD-461D-BA2D-E58C45FD5F5E 754C12B0
Loading driver D93CE3D8-A7EB-4730-8C8E-CC466A9ECC3C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C8B40
Loading driver at 0x000759CC000 EntryPoint=0x000759CD0F4 ReportStatusCodeRouterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C9118
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
InstallProtocolInterface: 86212936-0E76-41C8-A03A-2AF2FC1C39E2 759D20D0
InstallProtocolInterface: D2B2B828-0826-48A7-B3DF-983C006024F0 759D20C8
Loading driver F80697E9-7FD6-4665-8646-88E33EF71DFC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C81C0
Loading driver at 0x000753A0000 EntryPoint=0x000753A0418 SecurityStubDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C8498
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
InstallProtocolInterface: 94AB2F58-1438-4EF1-9152-18941A3A0E68 754232B0
InstallProtocolInterface: A46423E3-4617-49F1-B9FF-D1BFA9115839 754232A8
InstallProtocolInterface: 15853D7C-3DDF-43E0-A1CB-EBF85B8F872C 754232B8
Loading driver 1A1E4886-9517-440E-9FDE-3BE44CEE2136
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C7240
Loading driver at 0x00075494000 EntryPoint=0x000754950F4 CpuDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C7598
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
Paging: added 512 pages to page table pool
CurrentPagingContext:
MachineType - 0x8664
PageTableBase - 0x75E01000
Attributes - 0xC0000006
InstallProtocolInterface: 26BACCB1-6F42-11D4-BCE7-0080C73C8881 754A5B50
MemoryProtectionCpuArchProtocolNotify:
ProtectUefiImageCommon - 0x76197D18
- 0x0000000076174000 - 0x0000000000028000
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x0000000000001000 (0x0000000000004000)
SetUefiImageMemoryAttributes - 0x00000000759CD000 - 0x0000000000003000 (0x0000000000020000)
SetUefiImageMemoryAttributes - 0x00000000759D0000 - 0x0000000000006000 (0x0000000000004000)
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
ConvertPages: failed to find range 0 - 9FFFF
ConvertPages: failed to find range A0000 - BFFFF
ConvertPages: failed to find range C0000 - FFFFF
ConvertPages: failed to find range 761B8000 - 766B7FFF
ConvertPages: failed to find range 76750000 - 7AFFFFFF
ConvertPages: failed to find range 7B000000 - 7FBFFFFF
ConvertPages: failed to find range FEC80000 - FECFFFFF
ConvertPages: failed to find range FED20000 - FED7FFFF
ConvertPages: failed to find range FF530000 - FFFFFFFF
ConvertPages: failed to find range 100000000 - 8803FFFFF
AP Loop Mode is 1
WakeupBufferStart = 85000, WakeupBufferSize = 23C0
CpuDxe: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
CpuDxe: 5-Level Paging = 0
Detect CPU count: 8
Does not find any HOB stored CPU BIST information!
InstallProtocolInterface: 3FDDA605-A76E-4F46-AD29-12F4531B3D08 754A5C40
Loading driver C8339973-A563-4561-B858-D8476F9DEFC4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C21C0
Loading driver at 0x000754AA000 EntryPoint=0x000754AA384 Metronome.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C2498
ProtectUefiImageCommon - 0x754C21C0
- 0x00000000754AA000 - 0x0000000000003960
InstallProtocolInterface: 26BACCB2-6F42-11D4-BCE7-0080C73C8881 754AD6B8
Loading driver B601F8C4-43B7-4784-95B1-F4226CB40CEE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B30C0
Loading driver at 0x000759C2000 EntryPoint=0x000759C3118 RuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B3498
ProtectUefiImageCommon - 0x754B30C0
- 0x00000000759C2000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759C3000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759C6000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: B7DFB4E1-052F-449F-87BE-9818FC91B733 759C80A0
Loading driver 4B28E4C7-FF36-4E10-93CF-A82159E777C5
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B37C0
Loading driver at 0x000759B8000 EntryPoint=0x000759B90B4 ResetSystemRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1B18
ProtectUefiImageCommon - 0x754B37C0
- 0x00000000759B8000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759B9000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759BC000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: 27CFAC88-46CC-11D4-9A38-0090273FC14D 0
InstallProtocolInterface: 9DA34AE0-EAF9-4BBF-8EC3-FD60226C44BE 759BE120
InstallProtocolInterface: 695D7835-8D47-4C11-AB22-FA8ACCE7AE7A 759BE0F8
InstallProtocolInterface: 2DF6BA0B-7092-440D-BD04-FB091EC3F3C1 759BE0D0
Loading driver C3099578-F815-4A96-84A3-FC593760181D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B1240
Loading driver at 0x000759AE000 EntryPoint=0x000759AF0B4 SmmControlDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1698
ProtectUefiImageCommon - 0x754B1240
- 0x00000000759AE000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759AF000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759B2000 - 0x0000000000006000 (0x0000000000004008)
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
InstallProtocolInterface: 843DC720-AB1E-42CB-9357-8A0078F3561B 759B40A8
Loading driver A19B1FE7-C1BC-49F8-875F-54A5D542443F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B07C0
Loading driver at 0x0007548A000 EntryPoint=0x0007548A3C4 CpuIo2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0118
ProtectUefiImageCommon - 0x754B07C0
- 0x000000007548A000 - 0x00000000000040C0
InstallProtocolInterface: AD61F191-AE5F-4C0E-B9FA-E869D288C64F 7548DD68
Loading driver 9B680FCE-AD6B-4F3A-B60B-F59899003443
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF040
Loading driver at 0x0007546E000 EntryPoint=0x0007546E374 DevicePathDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0418
ProtectUefiImageCommon - 0x754AF040
- 0x000000007546E000 - 0x000000000000DF60
InstallProtocolInterface: 0379BE4E-D706-437D-B037-EDB82FB772A4 75477230
InstallProtocolInterface: 8B843E20-8132-4852-90CC-551A4E4A7F1C 75477220
InstallProtocolInterface: 05C99A21-C70F-4AD2-8A5F-35DF3343F51E 75477270
Loading driver 96B5C032-DF4C-4B6E-8232-438DCF448D0E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF340
Loading driver at 0x00075486000 EntryPoint=0x00075486374 NullMemoryTestDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AF898
ProtectUefiImageCommon - 0x754AF340
- 0x0000000075486000 - 0x0000000000003C40
InstallProtocolInterface: 309DE7F1-7F5E-4ACE-B49C-531BE5AA95EF 75489938
Loading driver 245CB4DA-8E15-4A1B-87E3-9878FFA07520
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AEB40
Loading driver at 0x00075482000 EntryPoint=0x00075482374 Legacy8259.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AEE98
ProtectUefiImageCommon - 0x754AEB40
- 0x0000000075482000 - 0x0000000000003A80
InstallProtocolInterface: 38321DBA-4FE0-4E17-8AEC-413055EAEDC1 75485780
Loading driver 348C4D62-BFBD-4882-9ECE-C80BB1C4783B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AE1C0
Loading driver at 0x0007537D000 EntryPoint=0x0007537D394 HiiDatabase.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AE498
ProtectUefiImageCommon - 0x754AE1C0
- 0x000000007537D000 - 0x0000000000022F60
InstallProtocolInterface: E9CA4775-8657-47FC-97E7-7ED65A084324 7539E7D8
InstallProtocolInterface: 0FD96974-23AA-4CDC-B9CB-98D17750322A 7539E850
InstallProtocolInterface: EF9FC172-A1B2-4693-B327-6D32FC416042 7539E878
InstallProtocolInterface: 587E72D7-CC50-4F79-8209-CA291FC1A10F 7539E8D0
InstallProtocolInterface: 0A8BADD5-03B8-4D19-B128-7B8F0EDAA596 7539E900
InstallProtocolInterface: 31A6406A-6BDF-4E46-B2A2-EBAA89C40920 7539E7F8
InstallProtocolInterface: 1A1241E6-8F19-41A9-BC0E-E8EF39E06546 7539E820
Loading driver C68DAA4E-7AB5-41E8-A91D-5954421053F3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A9340
Loading driver at 0x0007547E000 EntryPoint=0x0007547E334 BlSupportDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A9698
ProtectUefiImageCommon - 0x754A9340
- 0x000000007547E000 - 0x0000000000003F80
Install Acpi Table at 0x766B8000, length 0x32F58
Install Smbios Table at 0x769E8000, length 0x1000
Loading driver F9D88642-0737-49BC-81B5-6889CD57D9EA
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8840
Loading driver at 0x00075462000 EntryPoint=0x00075462334 SmbiosDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8018
ProtectUefiImageCommon - 0x754A8840
- 0x0000000075462000 - 0x0000000000005D80
InstallProtocolInterface: 03583FF6-CB36-4940-947E-B9B39F4AFAF7 754679B0
Loading driver 9A5163E7-5C29-453F-825C-837A46A81E15
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8340
Loading driver at 0x0007546A000 EntryPoint=0x0007546A374 SerialDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8618
ProtectUefiImageCommon - 0x754A8340
- 0x000000007546A000 - 0x0000000000003EA0
InstallProtocolInterface: BB25CF6F-F1D4-11D2-9A0C-0090273FC1FD 7546DB20
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7546DB68
Loading driver AD61999A-507E-47E6-BA28-79CC609FA1A4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A70C0
Loading driver at 0x00075456000 EntryPoint=0x00075456514 FspWrapperNotifyDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7A18
ProtectUefiImageCommon - 0x754A70C0
- 0x0000000075456000 - 0x0000000000005FA0
Loading driver C9602B47-9569-47C2-9D1E-FD1DF67A72E4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548F040
Loading driver at 0x0007545E000 EntryPoint=0x0007545E334 PowerButtonHandler.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7598
ProtectUefiImageCommon - 0x7548F040
- 0x000000007545E000 - 0x00000000000039E0
Successfully registered power button periodic timer event!
Loading driver 55E76644-78A5-4A82-A900-7126A5798892
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548FA40
Loading driver at 0x0007544A000 EntryPoint=0x0007544A344 HeciInitDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7548F398
ProtectUefiImageCommon - 0x7548FA40
- 0x000000007544A000 - 0x0000000000005DE0
InstallProtocolInterface: 3C7BC880-41F8-4869-AEFC-870A3ED28299 7548F5B8
Loading driver 6C2004EF-4E0E-4BE4-B14C-340EB4AA5891
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493040
Loading driver at 0x000759A5000 EntryPoint=0x000759A60B4 StatusCodeHandlerRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493D98
ProtectUefiImageCommon - 0x75493040
- 0x00000000759A5000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759A6000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759A9000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040003 I0
Loading driver 6D33944A-EC75-4855-A54D-809C75241F6C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493440
Loading driver at 0x0007533F000 EntryPoint=0x0007533F3CC BdsDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493718
ProtectUefiImageCommon - 0x75493440
- 0x000000007533F000 - 0x000000000001EE80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF6-46CC-11D4-9A38-0090273FC14D 7535B798
PROGRESS CODE: V03040003 I0
Loading driver 6CE6B0DE-781C-4F6C-B42D-98346C614BEC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75492CC0
Loading driver at 0x00075444000 EntryPoint=0x00075444414 HpetTimerDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492B98
ProtectUefiImageCommon - 0x75492CC0
- 0x0000000075444000 - 0x00000000000055A0
PROGRESS CODE: V03040002 I0
Init HPET Timer Driver
HPET Base Address = 0xFED00000
HPET_GENERAL_CAPABILITIES_ID = 0x031ABA858086A701
HPET_GENERAL_CONFIGURATION = 0x0000000000000000
HPET_GENERAL_INTERRUPT_STATUS = 0x0000000000000000
HPET_MAIN_COUNTER = 0x00000000A52261D0
HPET Main Counter Period = 52083333 (fs)
HPET_TIMER0_CONFIGURATION = 0x00F0000000008030
HPET_TIMER0_COMPARATOR = 0x0000000000000000
HPET_TIMER0_MSI_ROUTE = 0x0000000000000000
HPET_TIMER1_CONFIGURATION = 0x00F0000000008000
HPET_TIMER1_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER1_MSI_ROUTE = 0x0000000000000000
HPET_TIMER2_CONFIGURATION = 0x00F0080000008000
HPET_TIMER2_COMPARATOR = 0x0000000076C8FE20
HPET_TIMER2_MSI_ROUTE = 0x0000000000000000
HPET_TIMER3_CONFIGURATION = 0x00F0100000008000
HPET_TIMER3_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER3_MSI_ROUTE = 0x0000000000000000
HPET_TIMER4_CONFIGURATION = 0x000000000000C000
HPET_TIMER4_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER4_MSI_ROUTE = 0x0000000000000000
HPET_TIMER5_CONFIGURATION = 0x000000000000C000
HPET_TIMER5_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER5_MSI_ROUTE = 0x0000000000000000
HPET_TIMER6_CONFIGURATION = 0x000000000000C000
HPET_TIMER6_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER6_MSI_ROUTE = 0x0000000000000000
HPET_TIMER7_CONFIGURATION = 0x000000000000C000
HPET_TIMER7_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER7_MSI_ROUTE = 0x0000000000000000
Choose 64-bit HPET timer.
HPET Interrupt Mode MSI
HPET Interrupt Vector = 0x40
HPET Counter Mask = 0xFFFFFFFFFFFFFFFF
HPET Timer Period = 100000
HPET Timer Count = 0x000000000002EE00
HPET_TIMER0_CONFIGURATION = 0x00F000000000C034
HPET_TIMER0_COMPARATOR = 0x00000000A52B2BD1
HPET_TIMER0_MSI_ROUTE = 0xFEE0000000000140
InstallProtocolInterface: 26BACCB3-6F42-11D4-BCE7-0080C73C8881 75449190
PROGRESS CODE: V03040003 I0
Loading driver 47579CF5-1E4F-4B41-99BB-A5C334846D3B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754923C0
Loading driver at 0x00075440000 EntryPoint=0x00075440334 SmmAccessDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492218
ProtectUefiImageCommon - 0x754923C0
- 0x0000000075440000 - 0x0000000000003E60
PROGRESS CODE: V03040002 I0
SmmAccess: SmmBase = 0x7B000000, SmmSize = 0x800000
SmmAccess: Flags = 0x1, SmmCommSize=0x1000
InstallProtocolInterface: C2702B74-800C-4131-8746-8FB5B89CE4AC 75443BB0
PROGRESS CODE: V03040003 I0
Loading driver FDFF263D-5F68-4591-87BA-B768F445A9AF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x0007536B000 EntryPoint=0x0007536B3D4 Tcg2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491A98
ProtectUefiImageCommon - 0x754910C0
- 0x000000007536B000 - 0x0000000000011940
PROGRESS CODE: V03040002 I0
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
Check the tpm information from the bootloader.
Measure boot is not enabled in bootloader.
TPM is disabled in bootloader.
Error: Image at 0007536B000 start failed: Unsupported
PROGRESS CODE: V03040003 I0
Loading driver EBF342FE-B1D3-4EF8-957C-8048606FF671
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x00075323000 EntryPoint=0x00075323394 SetupBrowser.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491D18
ProtectUefiImageCommon - 0x754910C0
- 0x0000000075323000 - 0x000000000001BDA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: B9D4C360-BCFB-4F9B-9298-53C136982258 7533D8D0
InstallProtocolInterface: A770C357-B693-4E6D-A6CF-D21C728E550B 7533D900
InstallProtocolInterface: 1F73B18D-4630-43C1-A1DE-6F80855D7DA4 7533D8E0
PROGRESS CODE: V03040003 I0
Loading driver 00160F8D-2B35-4DF2-BBE0-B272A8D631F0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490CC0
Loading driver at 0x0007543C000 EntryPoint=0x0007543C344 FirmwarePerformanceDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490B18
ProtectUefiImageCommon - 0x75490CC0
- 0x000000007543C000 - 0x0000000000003D40
PROGRESS CODE: V03040002 I0
Found Fpdt in Rsdt
PROGRESS CODE: V03040003 I0
Loading driver 128FB770-5E79-4176-9E51-9BB268A17DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490340
Loading driver at 0x0007536E000 EntryPoint=0x0007536E3A4 PciHostBridgeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490198
ProtectUefiImageCommon - 0x75490340
- 0x000000007536E000 - 0x000000000000E9A0
PROGRESS CODE: V03040002 I0
InitRootBridge: populated root bus 0, with room for 13 subordinate bus(es)
RootBridge: PciRoot(0x0)
Support/Attr: 7001F / 7001F
DmaAbove4G: No
NoExtConfSpace: No
AllocAttr: 0 ()
Bus: 0 - D Translation=0
Io: 2000 - 2FFF Translation=0
Mem: 80000000 - FE0FFFFF Translation=0
MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7547DE18
InstallProtocolInterface: 2F707EBB-4A1A-11D4-9A38-0090273FC14D 7547D270
PROGRESS CODE: V03040003 I0
Loading driver A487A478-51EF-48AA-8794-7BEE2A0562F1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547CD40
Loading driver at 0x00075361000 EntryPoint=0x00075361480 tftpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7547C618
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7536C3C0
ProtectUefiImageCommon - 0x7547CD40
- 0x0000000075361000 - 0x000000000000CEE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7536BA38
PROGRESS CODE: V03040003 I0
Loading driver 0253F9FA-129A-4A8D-B12E-7DC2B6376302
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547C840
Loading driver at 0x000752FD000 EntryPoint=0x000752FD480 dpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D018
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7530D2E0
ProtectUefiImageCommon - 0x7547C840
- 0x00000000752FD000 - 0x00000000000127A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7530C478
PROGRESS CODE: V03040003 I0
Loading driver F099D67F-71AE-4C36-B2A3-DCEB0EB2B7D8
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545D1C0
Loading driver at 0x00075434000 EntryPoint=0x00075434374 WatchdogTimer.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D998
ProtectUefiImageCommon - 0x7545D1C0
- 0x0000000075434000 - 0x0000000000003920
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF5-46CC-11D4-9A38-0090273FC14D 75437670
PROGRESS CODE: V03040003 I0
Loading driver 2FA2A6DA-11D5-4DC3-999A-749648B03C56
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545CB40
Loading driver at 0x00075999000 EntryPoint=0x0007599A118 PiSmmIpl.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C098
ProtectUefiImageCommon - 0x7545CB40
- 0x0000000075999000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007599A000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007599F000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
SmmAccess: SMRAM Map Buffer too small
SmmAccess: Open SMRAM Region
SMM IPL opened SMRAM window
SMM IPL found SMRAM window 7B001000 - 7B7FFFFF
SMM IPL failed to set SMRAM window to EFI_MEMORY_WB
SMRAM attributes: 0000000000000001
SMM IPL loading SMM Core at SMRAM address 7B7EA000
SMM IPL calling SMM Core at SMRAM address 7B7EB138
PiSmmCoreImageBase - 0x000000007B7EA000
PiSmmCoreImageSize - 0x0000000000015000
SmmAddMemoryRegion
MemBase - 0x7B001000
MemLength - 0x7E9000
Type - 0x7
Attributes - 0xA
SmmAddMemoryRegion
MemBase - 0x7B000000
MemLength - 0x1000
Type - 0x6
Attributes - 0x1A
SmmAddMemoryRegion
MemBase - 0x7B7EA000
MemLength - 0x16000
Type - 0x6
Attributes - 0x1A
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545C298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E82C0
InstallProtocolInterface: F4CCBFB7-F6E0-47FD-9DD4-10A8F150C191 759A1420
InstallProtocolInterface: C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332 759A11F8
InstallProtocolInterface: 378DAEDC-F06B-4446-8314-40AB933C87A3 759A1200
PROGRESS CODE: V03040003 I0
Loading driver E660EA85-058E-4B55-A54B-F02F83A24707
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75451040
Loading driver at 0x000752CF000 EntryPoint=0x000752CF3D8 DisplayEngine.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C818
ProtectUefiImageCommon - 0x75451040
- 0x00000000752CF000 - 0x00000000000168C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 9BBE29E9-FDA1-41EC-AD52-452213742D2E 752E41B8
InstallProtocolInterface: 4311EDC0-6054-46D4-9E40-893EA952FCCC 752E41D0
PROGRESS CODE: V03040003 I0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360B18
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7CC0
Loading SMM driver at 0x0007B7D9000 EntryPoint=0x0007B7DA234 CpuIo2Smm.efi
SmmAccess: SMRAM Map Buffer too small
SmmInstallProtocolInterface: 3242A9D8-CE70-4AA0-955D-5E7B140DE4D2 7B7DF0B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360C98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7AC0
Loading SMM driver at 0x0007B7BC000 EntryPoint=0x0007B7BE124 PiSmmCpuDxeSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMRR Base: 0x7B000000, SMRR Size: 0x800000
PcdCpuSmmCodeAccessCheckEnable = 1
mAddressEncMask = 0x0
PcdControlFlowEnforcementPropertyMask = 0
SMRAM TileSize = 0x00002000 (0x00001000, 0x00001000)
SMRAM SaveState Buffer (0x7B7A6000, 0x00016000)
CPU[000] APIC ID=0000 SMBASE=7B79E000 SaveState=7B7ADC00 Size=00000400
CPU[001] APIC ID=0001 SMBASE=7B7A0000 SaveState=7B7AFC00 Size=00000400
CPU[002] APIC ID=0002 SMBASE=7B7A2000 SaveState=7B7B1C00 Size=00000400
CPU[003] APIC ID=0003 SMBASE=7B7A4000 SaveState=7B7B3C00 Size=00000400
CPU[004] APIC ID=0004 SMBASE=7B7A6000 SaveState=7B7B5C00 Size=00000400
CPU[005] APIC ID=0005 SMBASE=7B7A8000 SaveState=7B7B7C00 Size=00000400
CPU[006] APIC ID=0006 SMBASE=7B7AA000 SaveState=7B7B9C00 Size=00000400
CPU[007] APIC ID=0007 SMBASE=7B7AC000 SaveState=7B7BBC00 Size=00000400
Stacks - 0x7B776000
mSmmStackSize - 0x6000
PcdCpuSmmStackGuard - 0x1
mXdSupported - 0x1
One Semaphore Size = 0x40
Total Semaphores Size = 0x940
PhysicalAddressBits = 39, 5LPageTable = 0.
5LevelPaging Needed - 0
1GPageTable Support - 1
PcdCpuSmmRestrictedMemoryAccess - 1
PhysicalAddressBits - 39
InstallProtocolInterface: 26EEB3DE-B689-492E-80F0-BE8BD7DA4BA7 7B7D3380
SMM IPL registered SMM Entry Point address 7B7EBD44
SmmInstallProtocolInterface: EB346B97-975F-4A9F-8B22-F8E92BB3D569 7B7D33B0
SmmInstallProtocolInterface: 69B792EA-39CE-402D-A2A6-F721DE351DFE 7B7D32A8
CpuSmm: SpinLock Size = 0x40, PcdCpuSmmMpTokenCountPerChunk = 0x40
SmmInstallProtocolInterface: 5D5450D7-990C-4180-A803-8E63F0608307 7B7D3450
SmmInstallProtocolInterface: 1D202CAB-C8AB-4D5C-94F7-3CFCC0D3D335 7B7D3420
SMM CPU Module exit from SMRAM with EFI_SUCCESS
SmmAccess: Prepare to close the SMRAM
SmmAccess:Close SMRAM Region, success!
SMM IPL closed SMRAM window
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360898
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E74C0
Loading SMM driver at 0x0007B759000 EntryPoint=0x0007B75A2C4 FvbSmm.efi
SmmAccess: SMRAM Map Buffer too small
SpiInstance = 7B76A998
PchSpiBase at 0xC00FD000
variable address is set to 0xFF610000
--FileSystemGuid not match: FFFFFFFF-FFFF-FFFF-FFFF-FFFFFFFFFFFF
Fvb: FV header @ 0xFF610000 invalid
FvLength: 0x40000
HeaderLength: 0x48
Header Checksum: 0xF8F7
FvBlockMap[0].NumBlocks: 0x40
FvBlockMap[0].BlockLength: 0x1000
FwBlockService.c: Writing back healthy FV header
Verified boot is not enabled in bootloader.
ImageData=0x75209060, ImageSize=0x3FB8
SmmInstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
SmmInstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7B76A818
InstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E70C0
Loading SMM driver at 0x0007B6BF000 EntryPoint=0x0007B6C031C VariableSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD308 Success
VarCheckLibRegisterEndOfDxeCallback - 0x7B6CEDB8 Success
VarCheckLibRegisterAddressPointer - 0x7B74D920 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD93C Success
[VarCheckPcd] No VarCheckPcdBin found at the first RAW section
VarCheckLibRegisterAddressPointer - 0x7B74D940 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CF7E0 Success
Variable driver common space: 0x1DF9C 0x1DF9C 0x1DF9C
Variable driver will work with auth variable format!
SmmInstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 7B74C318
SmmInstallProtocolInterface: B0D8F3C1-B7DE-4C11-BC89-2FB562C8C411 7B74C300
InstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535FC98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7EC0
Loading SMM driver at 0x0007B661000 EntryPoint=0x0007B662234 BlSmmSupport.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMMBASE_INFO = 7B000000
CPU0 ID:00 Base: 7B79E000
CPU1 ID:01 Base: 7B7A0000
CPU2 ID:02 Base: 7B7A2000
CPU3 ID:03 Base: 7B7A4000
CPU4 ID:04 Base: 7B7A6000
CPU5 ID:05 Base: 7B7A8000
CPU6 ID:06 Base: 7B7AA000
CPU7 ID:07 Base: 7B7AC000
SmmInstallProtocolInterface: 18A3C6DC-5EEA-48C8-A1C1-B53389F98999 7B6670E0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F818
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E72C0
Loading SMM driver at 0x0007B652000 EntryPoint=0x0007B6532A0 SmmFaultTolerantWriteDxe.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
Ftw: FtwWorkSpaceLba - 0x1E, WorkBlockSize - 0x1000, FtwWorkSpaceBase - 0x0
Ftw: FtwSpareLba - 0x20, SpareBlockSize - 0x1000
Ftw: NumberOfWorkBlock - 0x2, FtwWorkBlockLba - 0x1E
Ftw: WorkSpaceLbaInSpare - 0x0, WorkSpaceBaseInSpare - 0x0
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Remaining work space size - 1FE0
Ftw: Work block header check mismatch
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Work block header check mismatch
Ftw: Both working and spare blocks are invalid, init workspace
Ftw: start to reclaim work space
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64B018
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64C018
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62A018
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62B018
FvbProtocolRead: Lba: 0x22 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62C018
FvbProtocolRead: Lba: 0x23 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62D018
FvbProtocolRead: Lba: 0x24 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62E018
FvbProtocolRead: Lba: 0x25 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62F018
FvbProtocolRead: Lba: 0x26 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B630018
FvbProtocolRead: Lba: 0x27 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B631018
FvbProtocolRead: Lba: 0x28 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B632018
FvbProtocolRead: Lba: 0x29 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B633018
FvbProtocolRead: Lba: 0x2A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B634018
FvbProtocolRead: Lba: 0x2B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B635018
FvbProtocolRead: Lba: 0x2C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B636018
FvbProtocolRead: Lba: 0x2D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B637018
FvbProtocolRead: Lba: 0x2E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B638018
FvbProtocolRead: Lba: 0x2F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B639018
FvbProtocolRead: Lba: 0x30 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63A018
FvbProtocolRead: Lba: 0x31 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63B018
FvbProtocolRead: Lba: 0x32 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63C018
FvbProtocolRead: Lba: 0x33 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63D018
FvbProtocolRead: Lba: 0x34 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63E018
FvbProtocolRead: Lba: 0x35 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63F018
FvbProtocolRead: Lba: 0x36 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B640018
FvbProtocolRead: Lba: 0x37 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B641018
FvbProtocolRead: Lba: 0x38 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B642018
FvbProtocolRead: Lba: 0x39 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B643018
FvbProtocolRead: Lba: 0x3A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B644018
FvbProtocolRead: Lba: 0x3B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B645018
FvbProtocolRead: Lba: 0x3C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B646018
FvbProtocolRead: Lba: 0x3D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B647018
FvbProtocolRead: Lba: 0x3E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B648018
FvbProtocolRead: Lba: 0x3F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B649018
FvbProtocolEraseBlocks:
FvbProtocolRead: Lba: 0x20 Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B7E0
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B7E0
FvbProtocolRead: Lba: 0x20 Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B609018
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60A018
FvbProtocolRead: Lba: 0x22 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60B018
FvbProtocolRead: Lba: 0x23 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60C018
FvbProtocolRead: Lba: 0x24 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60D018
FvbProtocolRead: Lba: 0x25 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60E018
FvbProtocolRead: Lba: 0x26 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60F018
FvbProtocolRead: Lba: 0x27 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B610018
FvbProtocolRead: Lba: 0x28 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B611018
FvbProtocolRead: Lba: 0x29 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B612018
FvbProtocolRead: Lba: 0x2A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B613018
FvbProtocolRead: Lba: 0x2B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B614018
FvbProtocolRead: Lba: 0x2C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B615018
FvbProtocolRead: Lba: 0x2D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B616018
FvbProtocolRead: Lba: 0x2E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B617018
FvbProtocolRead: Lba: 0x2F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B618018
FvbProtocolRead: Lba: 0x30 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B619018
FvbProtocolRead: Lba: 0x31 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61A018
FvbProtocolRead: Lba: 0x32 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61B018
FvbProtocolRead: Lba: 0x33 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61C018
FvbProtocolRead: Lba: 0x34 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61D018
FvbProtocolRead: Lba: 0x35 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61E018
FvbProtocolRead: Lba: 0x36 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61F018
FvbProtocolRead: Lba: 0x37 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B620018
FvbProtocolRead: Lba: 0x38 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B621018
FvbProtocolRead: Lba: 0x39 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B622018
FvbProtocolRead: Lba: 0x3A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B623018
FvbProtocolRead: Lba: 0x3B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B624018
FvbProtocolRead: Lba: 0x3C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B625018
FvbProtocolRead: Lba: 0x3D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B626018
FvbProtocolRead: Lba: 0x3E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B627018
FvbProtocolRead: Lba: 0x3F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B628018
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolEraseBlocks:
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolEraseBlocks:
Ftw: reclaim work space successfully
SmmInstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 7B64F028
Variable PK exists.
Variable SetupMode is 0
Variable SecureBoot is 0
Variable SecureBootEnable is 0
Variable CustomMode is 0
Variable VendorKeys is 1
Variable driver will work with auth variable support!
InstallProtocolInterface: 93BA1826-DFFB-45DD-82A7-E7DCAA3BBDF3 0
InstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F218
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E76C0
Loading SMM driver at 0x0007B634000 EntryPoint=0x0007B635234 BlSwSmiHandler.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
Loading driver 9F7DCADE-11EA-448A-A46F-76E003657DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535EB40
Loading driver at 0x0007598D000 EntryPoint=0x0007598E0D4 VariableSmmRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7535E098
ProtectUefiImageCommon - 0x7535EB40
- 0x000000007598D000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007598E000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075993000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
Variable driver runtime cache is enabled.
InstallProtocolInterface: 1E5668E2-8481-11D4-BCF1-0080C73C8881 0
InstallProtocolInterface: CD3D0A05-9E24-437C-A891-1EE053DB7638 759952D0
InstallProtocolInterface: AF23B340-97B4-4685-8D4F-A3F28169B21D 759952A0
InstallProtocolInterface: 6441F818-6362-4E44-B570-7DBA31DD2453 0
PROGRESS CODE: V03040003 I0
Loading driver 42857F0A-13F2-4B21-8A23-53D3F714B840
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310CC0
Loading driver at 0x00075984000 EntryPoint=0x00075985114 CapsuleRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75310A98
ProtectUefiImageCommon - 0x75310CC0
- 0x0000000075984000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075985000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075988000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 5053697E-2CBC-4819-90D9-0580DEEE5754 0
PROGRESS CODE: V03040003 I0
Loading driver AD608272-D07F-4964-801E-7BD3B7888652
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310340
Loading driver at 0x0007597B000 EntryPoint=0x0007597C0B4 MonotonicCounterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9F18
ProtectUefiImageCommon - 0x75310340
- 0x000000007597B000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007597C000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007597F000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1DA97072-BDDC-4B30-99F1-72A0B56FFF2A 0
PROGRESS CODE: V03040003 I0
Loading driver 378D7B65-8DA9-4773-B6E4-A47826A833E1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E91C0
Loading driver at 0x00075971000 EntryPoint=0x000759720C4 PcRtc.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9418
ProtectUefiImageCommon - 0x752E91C0
- 0x0000000075971000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075972000 - 0x0000000000004000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075976000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 27CFAC87-46CC-11D4-9A38-0090273FC14D 0
PROGRESS CODE: V03040003 I0
Loading driver F0E6A44F-7195-41C3-AC64-54F202CD0A21
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E8140
Loading driver at 0x00074D0B000 EntryPoint=0x00074D0B4FC SecureBootConfigDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E8D98
ProtectUefiImageCommon - 0x752E8140
- 0x0000000074D0B000 - 0x0000000000076EE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 752E8998
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 74D7A388
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D79928
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 752E6FA0
InstallProtocolInterface: F0E6A44F-7195-41C3-AC64-54F202CD0A21 752E6F98
PROGRESS CODE: V03040003 I0
Loading driver 93B80004-9FB3-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752082C0
Loading driver at 0x00074DCD000 EntryPoint=0x00074DCD394 PciBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75208C98
ProtectUefiImageCommon - 0x752082C0
- 0x0000000074DCD000 - 0x00000000000154A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DE0FF8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DE1040
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DE1058
InstallProtocolInterface: 19CB87AB-2CB9-4665-8360-DDCF6054F79D 74DE1028
PROGRESS CODE: V03040003 I0
Loading driver 51CCF399-4FDF-4E55-A45B-E123F84D456A
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75207B40
Loading driver at 0x00074DEB000 EntryPoint=0x00074DEB394 ConPlatformDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75207E98
ProtectUefiImageCommon - 0x75207B40
- 0x0000000074DEB000 - 0x0000000000006960
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DF13E0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DF1428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DF1410
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DF13B0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DF1428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DF1410
PROGRESS CODE: V03040003 I0
Loading driver 408EDCEC-CF6D-477C-A5A8-B4844E3DE281
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75207240
Loading driver at 0x00074DB9000 EntryPoint=0x00074DB9374 ConSplitterDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75207518
ProtectUefiImageCommon - 0x75207240
- 0x0000000074DB9000 - 0x0000000000009C00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1E28
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21E8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2158
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1FD0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21B8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2170
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1FA0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC2128
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2188
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1C70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21A0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2140
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1E58
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2110
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74DC1CB0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74DC1CE0
InstallProtocolInterface: 31878C87-0B75-11D5-9A4F-0090273FC14D 74DC1D50
InstallProtocolInterface: 8D59D32B-C655-4AE9-9B15-F25904992A43 74DC1DA8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DC1EA0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DC2010
PROGRESS CODE: V03040003 I0
Loading driver CCCB0C28-4B24-11D5-9A5A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752012C0
Loading driver at 0x00074DC5000 EntryPoint=0x00074DC5394 GraphicsConsoleDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75201C98
ProtectUefiImageCommon - 0x752012C0
- 0x0000000074DC5000 - 0x0000000000007D40
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DCB180
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DCC7A8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DCC790
PROGRESS CODE: V03040003 I0
Loading driver 9E863906-A40F-4875-977F-5B93FF237FC6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF8B40
Loading driver at 0x00074DA3000 EntryPoint=0x00074DA3394 TerminalDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8E98
ProtectUefiImageCommon - 0x74DF8B40
- 0x0000000074DA3000 - 0x000000000000A540
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DACB38
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DACCC8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DACCB0
PROGRESS CODE: V03040003 I0
Loading driver 6B38F7B4-AD98-40E9-9093-ACA2B5A253C4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF81C0
Loading driver at 0x00074DB2000 EntryPoint=0x00074DB2374 DiskIoDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8498
ProtectUefiImageCommon - 0x74DF81C0
- 0x0000000074DB2000 - 0x0000000000006800
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DB81A8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DB8268
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DB8280
PROGRESS CODE: V03040003 I0
Loading driver 1FA1F39E-FEFF-4AAE-BD7B-38A070A3B609
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF7CC0
Loading driver at 0x00074D91000 EntryPoint=0x00074D91394 PartitionDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7B18
ProtectUefiImageCommon - 0x74DF7CC0
- 0x0000000074D91000 - 0x0000000000008A60
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D992C0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D99320
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D99308
PROGRESS CODE: V03040003 I0
Loading driver CD3BAFB6-50FB-4FE8-8E4E-AB74D2C1A600
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF72C0
Loading driver at 0x00074DE3000 EntryPoint=0x00074DE3374 EnglishDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7A18
ProtectUefiImageCommon - 0x74DF72C0
- 0x0000000074DE3000 - 0x0000000000003E00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1D85CD7F-F43D-11D2-9A0C-0090273FC14D 74DE67B8
InstallProtocolInterface: A4C751FC-23AE-4C3E-92E9-4964CF63F349 74DE67F0
PROGRESS CODE: V03040003 I0
Loading driver 820C59BB-274C-43B2-83EA-DAC673035A59
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF68C0
Loading driver at 0x00074D8B000 EntryPoint=0x00074D8B374 SataController.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF6B98
ProtectUefiImageCommon - 0x74DF68C0
- 0x0000000074D8B000 - 0x0000000000005120
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D8FC88
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D8FCB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D8FCD0
PROGRESS CODE: V03040003 I0
Loading driver 19DF145A-B1D4-453F-8507-38816676D7F6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF6440
Loading driver at 0x00074D82000 EntryPoint=0x00074D82384 AtaBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF5F98
ProtectUefiImageCommon - 0x74DF6440
- 0x0000000074D82000 - 0x0000000000008460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D89B20
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D89D48
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D89D30
PROGRESS CODE: V03040003 I0
Loading driver 5E523CB4-D397-4986-87BD-A6DD8B22F455
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF5140
Loading driver at 0x00074CEF000 EntryPoint=0x00074CEF3A4 AtaAtapiPassThruDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF5398
ProtectUefiImageCommon - 0x74DF5140
- 0x0000000074CEF000 - 0x000000000000D2E0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CFB6F8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CFB728
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CFB740
PROGRESS CODE: V03040003 I0
Loading driver 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF5540
Loading driver at 0x00074D05000 EntryPoint=0x00074D05374 ScsiBus.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2B18
ProtectUefiImageCommon - 0x74DF5540
- 0x0000000074D05000 - 0x0000000000005BA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D0A660
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D0A690
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D0A6A8
PROGRESS CODE: V03040003 I0
Loading driver 0A66E322-3740-4CCE-AD62-BD172CECCA35
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF27C0
Loading driver at 0x00074CD3000 EntryPoint=0x00074CD3374 ScsiDisk.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2D18
ProtectUefiImageCommon - 0x74DF27C0
- 0x0000000074CD3000 - 0x000000000000D520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CDFB60
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CDFBD8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CDFBC0
PROGRESS CODE: V03040003 I0
Loading driver 961578FE-B6B7-44C3-AF35-6BC705CD2B1F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEA040
Loading driver at 0x00074CC5000 EntryPoint=0x00074CC539C Fat.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEAD18
ProtectUefiImageCommon - 0x74DEA040
- 0x0000000074CC5000 - 0x000000000000D0C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CD1300
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CD1348
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CD1330
PROGRESS CODE: V03040003 I0
Loading driver 8E325979-3FE1-4927-AAE2-8F5C4BD2AF0D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEA9C0
Loading driver at 0x00074CB7000 EntryPoint=0x00074CB7374 SdMmcPciHcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEA898
ProtectUefiImageCommon - 0x74DEA9C0
- 0x0000000074CB7000 - 0x000000000000D460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CC3750
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CC3998
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CC39B0
PROGRESS CODE: V03040003 I0
Loading driver 2145F72F-E6F1-4440-A828-59DC9AAB5F89
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE9040
Loading driver at 0x00074CAC000 EntryPoint=0x00074CAC374 EmmcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEA598
ProtectUefiImageCommon - 0x74DE9040
- 0x0000000074CAC000 - 0x000000000000A900
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CB5F70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CB60D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CB60B8
PROGRESS CODE: V03040003 I0
Loading driver 430AC2F7-EEC6-4093-94F7-9F825A7C1C40
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE9440
Loading driver at 0x00074CE6000 EntryPoint=0x00074CE6374 SdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE9698
ProtectUefiImageCommon - 0x74DE9440
- 0x0000000074CE6000 - 0x00000000000084C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CEDC00
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CEDDB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CEDDA0
PROGRESS CODE: V03040003 I0
Loading driver 5BE3BDF4-53CF-46A3-A6A9-73C34A6E5EE3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE8B40
Loading driver at 0x00074C92000 EntryPoint=0x00074C924C8 NvmExpressDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE9898
ProtectUefiImageCommon - 0x74DE8B40
- 0x0000000074C92000 - 0x000000000000C700
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C9DCE8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C9DD78
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C9DD60
InstallProtocolInterface: 5C198761-16A8-4E69-972C-89D67954F81D 74C9DD28
PROGRESS CODE: V03040003 I0
Loading driver 2FB92EFA-2EE0-4BAE-9EB6-7464125E1EF7
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE8240
Loading driver at 0x00074D9A000 EntryPoint=0x00074D9A374 UhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE8598
ProtectUefiImageCommon - 0x74DE8240
- 0x0000000074D9A000 - 0x0000000000008FE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DA27E8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DA2830
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DA2818
PROGRESS CODE: V03040003 I0
Loading driver BDFE430E-8F2A-4DB0-9991-6F856594777E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE7CC0
Loading driver at 0x00074C87000 EntryPoint=0x00074C87374 EhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE7918
ProtectUefiImageCommon - 0x74DE7CC0
- 0x0000000074C87000 - 0x000000000000AC00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C91388
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C91408
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C913F0
PROGRESS CODE: V03040003 I0
Loading driver B7F50E91-A759-412C-ADE4-DCD03E7F7C28
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE7340
Loading driver at 0x00074C67000 EntryPoint=0x00074C67374 XhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE7B18
ProtectUefiImageCommon - 0x74DE7340
- 0x0000000074C67000 - 0x000000000000F520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C759D8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C75B38
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C75B20
PROGRESS CODE: V03040003 I0
Loading driver 240612B7-A063-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC4140
Loading driver at 0x00074C7B000 EntryPoint=0x00074C7B394 UsbBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC4B18
ProtectUefiImageCommon - 0x74DC4140
- 0x0000000074C7B000 - 0x000000000000BD20
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C86268
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C862B0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C86298
PROGRESS CODE: V03040003 I0
Loading driver 2D2E62CF-9ECF-43B7-8219-94E7FC713DFE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC4540
Loading driver at 0x00074C5E000 EntryPoint=0x00074C5E394 UsbKbDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC3018
ProtectUefiImageCommon - 0x74DC4540
- 0x0000000074C5E000 - 0x0000000000008220
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C65450
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C65B80
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C65B68
PROGRESS CODE: V03040003 I0
Loading driver 9FB4B4A7-42C0-4BCD-8540-9BCC6711F83E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC3140
Loading driver at 0x00074C55000 EntryPoint=0x00074C55374 UsbMassStorageDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC3B18
ProtectUefiImageCommon - 0x74DC3140
- 0x0000000074C55000 - 0x0000000000008080
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C5C828
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C5C900
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C5C8E8
PROGRESS CODE: V03040003 I0
Loading driver 0B04B2ED-861C-42CD-A22F-C3AAFACCB896
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC3540
Loading driver at 0x00074CA5000 EntryPoint=0x00074CA5394 GraphicsOutputDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DB1F98
ProtectUefiImageCommon - 0x74DC3540
- 0x0000000074CA5000 - 0x0000000000006B80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CAB5C8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CAB608
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CAB620
PROGRESS CODE: V03040003 I0
Driver 4D9CBEF0-15A0-4D0C-83DB-5213E710C23F was discovered but not loaded!!
Driver 5CAB08D5-AD8F-4D8B-B828-D17A8D9FE977 was discovered but not loaded!!
PROGRESS CODE: V03041001 I0
[Bds] Entry...
[BdsDxe] Locate Variable Lock protocol - Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformLangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:LangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOptionSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:HwErrRecSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:OsIndicationsSupported Success
Variable Driver Auto Update Lang, Lang:eng, PlatformLang:en Status: Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformRecovery0000 Success
PROGRESS CODE: V03051005 I0
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
SR-IOV: SupportedPageSize = 0x553; SystemPageSize = 0x1; FirstVFOffset = 0x1;
InitialVFs = 0x7; ReservedBusNum = 0x1; CapOffset = 0x320
BAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[1]: Type = PMem64; Alignment = 0xFFFFFFF; Length = 0x10000000; Offset = 0x18
BAR[2]: Type = Io16; Alignment = 0x3F; Length = 0x40; Offset = 0x20
VFBAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x7000000; Offset = 0x344
VFBAR[1]: Type = PMem64; Alignment = 0x1FFFFFFF; Length = 0xE0000000; Offset = 0x34C
PciBus: Discovered PPB @ [00|06|00]
PciBus: Discovered PCI @ [01|00|00]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
PciBus: Discovered PCI @ [00|08|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|0A|00]
BAR[0]: Type = Mem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|10|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|14|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|14|02]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|15|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|15|01]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|16|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|17|00]
BAR[0]: Type = Mem32; Alignment = 0x1FFF; Length = 0x2000; Offset = 0x10
BAR[1]: Type = Mem32; Alignment = 0xFFF; Length = 0x100; Offset = 0x14
BAR[2]: Type = Io16; Alignment = 0x7; Length = 0x8; Offset = 0x18
BAR[3]: Type = Io16; Alignment = 0x3; Length = 0x4; Offset = 0x1C
BAR[4]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
BAR[5]: Type = Mem32; Alignment = 0xFFF; Length = 0x800; Offset = 0x24
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [02|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [03|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [05|00|00]
PciBus: Discovered PPB @ [05|01|00]
PciBus: Discovered PPB @ [05|02|00]
PciBus: Discovered PPB @ [05|03|00]
PciBus: Discovered PPB @ [05|04|00]
PciBus: Discovered PCI @ [0A|00|00]
ARI: forwarding enabled for PPB[05:04:00]
ARI: CapOffset = 0x150
BAR[0]: Type = PMem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[2]: Type = PMem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0B|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0C|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0D|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PCI @ [00|1E|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|1E|03]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[3]: Type = Mem64; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|04]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x100; Offset = 0x10
BAR[3]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|05]
BAR[0]: Type = Mem32; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DB0F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DB0428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DB0F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DB0828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3828
Found PCI VGA device
Found LPC Bridge device
[EnumUsbKeyboard] USB keyboard path exists
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x5000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74C03000
XhcInitSched: Created CMD ring [74C03240~74C04240) EVENT ring [74C04240~74C06240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74C13038
XhcDriverBindingStart: XHCI started for controller @ 74CFFD18
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74BE4020
XhcGetCapability: 5 ports, 64 bit 1
UsbRootHubInit: root hub 74BE4C98 - max speed 3, 5 ports
UsbBusStart: usb bus started on 74CFFD18, root hub 74BE4C98
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x10000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74BBF000
XhcInitSched: Created CMD ring [74BBF240~74BC0240) EVENT ring [74BC0240~74BC2240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74BCF038
XhcDriverBindingStart: XHCI started for controller @ 74D03C98
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74B9A020
XhcGetCapability: 16 ports, 64 bit 1
UsbRootHubInit: root hub 74B9AC98 - max speed 3, 16 ports
XhcClearRootHubPortFeature: status Success
UsbEnumeratePort: port 0 state - 01, change - 01 on 74B9AC98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 0
XhcUsbPortReset!
XhcSetRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
Enable Slot Successfully, The Slot ID = 0x1
Address 1 assigned successfully
UsbEnumerateNewDev: hub port 0 is reset
UsbEnumerateNewDev: device is of 2 speed
UsbEnumerateNewDev: device uses translator (0, 0)
UsbEnumerateNewDev: device is now ADDRESSED at 1
UsbEnumerateNewDev: max packet size for EP 0 is 64
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 25
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BC3AC0~74BC4AC0)
Configure Endpoint
UsbEnumerateNewDev: device 1 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 1
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B99D98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B99F40
UsbConnectDriver: found a hub device
Configure Hub Slot Context
UsbHubInit: hub 1 has 4 ports
UsbHubInit: hub 1 initialized
UsbBusStart: usb bus started on 74D03C98, root hub 74B9AC98
[Variable] Lock: AEB9C5C1-94F1-4D02-BFD9-4602DB2D3C54:Tcg2PhysicalPresenceFlags Success
[TPM2] Initial physical presence flags value is 0x700E2
[TPM2] Flags=700E2, PPRequest=0 (LastPPRequest=0UsbEnumeratePort: port 2 state - 201, change - 01 on 74B99F18
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 2
Enable Slot Successfully, The Slot ID = 0x2
Address 2 assigned successfully
UsbEnumerateNewDev: hub port 2 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 3)
UsbEnumerateNewDev: device is now ADDRESSED at 2
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 59
UsbParseConfigDesc: config 1 has 2 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
UsbParseInterfaceDesc: interface 1(setting 0) has 1 endpoints
XhcCheckUrbResult: STALL_ERROR! Completecode = 6
Recovery Halted Slot = 2,Dci = 1
XhcResetEndpoint: Slot = 0x2, Dci = 0x1
XhcSetTrDequeuePointer: Slot = 0x2, Dci = 0x1, Urb = 0x74B98918
XhcControlTransfer: error - Device Error, transfer - 2
UsbBuildDescTable: get language ID table Unsupported
Endpoint[81]: Created INT ring [74BC6300~74BC7300)
Endpoint[82]: Created INT ring [74BC7300~74BC8300)
Configure Endpoint
UsbEnumerateNewDev: device 2 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 2
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B96A98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B98940
UsbConnectDriver: TPL before connect is 8, 74B96B98
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74B98238
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74B98250
InstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
UsbConnectDriver: TPL after connect is 8
UsbSelectSetting: setting 0 selected for interface 1
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B92718
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B928C0
UsbEnumeratePort: port 3 state - 201, change - 01 on 74B99F18
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 3
Enable Slot Successfully, The Slot ID = 0x3
Address 3 assigned successfully
UsbEnumerateNewDev: hub port 3 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 4)
UsbEnumerateNewDev: device is now ADDRESSED at 3
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 34
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BC9B40~74BCAB40)
Configure Endpoint
UsbEnumerateNewDev: device 3 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 3
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B91B98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B91AC0
)
[TPM2] PPResponse = 0 (LastPPRequest=0, Flags=700E2)
InstallReadyToLock entering......
SmmEndOfDxeHandler
SmmInstallProtocolInterface: 24E70042-D5C5-4260-8C39-0AD3AA32E93D 0
SMM MemoryProtectionAttribute - 0x0000000000000001
MemoryMapSize - 0xBD0
MemoryMap - 0x7B631018
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
[Variable]SMM_END_OF_DXE is signaled
[Variable] Lock: E20939BE-32D4-41BE-A150-897F85D49829:MemoryOverwriteRequestControl Success
[Variable] Lock: BB983CCF-151D-40E1-A07B-4A17BE168292:MemoryOverwriteRequestControlLock Success
VarCheckHiiGenDxeFromHii - HII Database exported at 0x74B86000, size = 0x9B34
VarCheckHiiGenDxeFromFv
VarCheckHiiBin - size = 0x0
[VarCheckHii] This driver could be removed from *.dsc and *.fdf
Initialize variable error flag (FF)
All EndOfDxe callbacks have returned successfully
InstallProtocolInterface: 60FF8964-E906-41D0-AFED-F241E974E08E 0
SMI LOCK is set.
SmmAccess: Prepare to lock SMRAM Region
SmmAccess: Locked SMM success!
SmmInstallProtocolInterface: 47B7FA8C-F4BD-4AF6-8200-333086F0D2C8 0
GetUefiMemoryMap
SMM Driver 44A20657-10B8-4049-A148-ACD8812AF257 was discovered but not loaded!!
Patch page table start ...
Patch page table done!
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
PatchSmmSaveStateMap:
PatchGdtIdtMap - GDT:
PatchGdtIdtMap - IDT:
SetUefiMemMapAttributes
UefiMemory protection: 0x0 - 0xA0000 Success
UefiMemory protection: 0x100000 - 0x758A6000 Success
UefiMemory protection: 0x75DEC000 - 0x761B8000 Success
UefiMemory protection: 0x766B8000 - 0x76748000 Success
UefiMemory protection: 0x100000000 - 0x880400000 Success
UefiMemoryAttribute protection: 0x75972000 - 0x75976000 Success
UefiMemoryAttribute protection: 0x7597C000 - 0x7597F000 Success
UefiMemoryAttribute protection: 0x75985000 - 0x75988000 Success
UefiMemoryAttribute protection: 0x7598E000 - 0x75993000 Success
UefiMemoryAttribute protection: 0x7599A000 - 0x7599F000 Success
UefiMemoryAttribute protection: 0x759A6000 - 0x759A9000 Success
UefiMemoryAttribute protection: 0x759AF000 - 0x759B2000 Success
UefiMemoryAttribute protection: 0x759B9000 - 0x759BC000 Success
UefiMemoryAttribute protection: 0x759C3000 - 0x759C6000 Success
UefiMemoryAttribute protection: 0x759CD000 - 0x759D0000 Success
SetPageTableAttributes
Start...
SMM IPL locked SMRAM window
InstallReadyToLock end
[GraphicsOutputDxe]: GraphicsDeviceInfo HOB:
VendorId = 8086, DeviceId = 9A49,
RevisionId = FF, BarIndex = 1,
SubsystemVendorId = FFFF, SubsystemId = FFFF
[GraphicsOutputDxe]: BAR[1]: Base = 90000000, Length = 10000000
[GraphicsOutputDxe]: ... matched!
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 754521A8
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 75452998
[Bds]RegisterKeyNotify: 000C/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0002/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0000/000D 80000000/00 Success
Terminal - Mode 0, Column = 80, Row = 25
Terminal - Mode 1, Column = 80, Row = 50
Terminal - Mode 2, Column = 100, Row = 31
^[[2J^[[01;01H^[[=3h^[[2J^[[01;01HInstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74B8D5C0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74B8D6A8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74B8D5D8
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B8D818
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: D3B36F2D-D551-11D4-9A46-0090273FC14D 0
^[[0m^[[35m^[[40mInstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
GraphicsConsole video resolution 1920 x 1080
Graphics - Mode 0, Column = 80, Row = 25
Graphics - Mode 1, Column = 80, Row = 50
Graphics - Mode 2, Column = 100, Row = 31
Graphics - Mode 3, Column = 240, Row = 56
Graphics Console Started, Mode: 0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74B8B5B0
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 74DC1F30
^[[0m^[[37m^[[40mUsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
NvmExpressDriverBindingStart: start
Cc.En: 0
Cc.Css: 0
Cc.Mps: 0
Cc.Ams: 0
Cc.Shn: 0
Cc.Iosqes: 0
Cc.Iocqes: 0
NVMe controller is disabled with status [Success].
Private->Buffer = [0000000074B7F000]
Admin Submission Queue size (Aqa.Asqs) = [00000001]
Admin Completion Queue size (Aqa.Acqs) = [00000001]
Admin Submission Queue (SqBuffer[0]) = [0000000074B7F000]
Admin Completion Queue (CqBuffer[0]) = [0000000074B80000]
Sync I/O Submission Queue (SqBuffer[1]) = [0000000074B81000]
Sync I/O Completion Queue (CqBuffer[1]) = [0000000074B82000]
Async I/O Submission Queue (SqBuffer[2]) = [0000000074B83000]
Async I/O Completion Queue (CqBuffer[2]) = [0000000074B84000]
Aqa.Asqs: 1
Aqa.Acqs: 1
Asq: 74B7F000
Acq: 74B80000h
Cc.En: 1
Cc.Css: 0
Cc.Mps: 0
Cc.Ams: 0
Cc.Shn: 0
Cc.Iosqes: 6
Cc.Iocqes: 4
NVMe controller is enabled with status [Success].
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x1987
PCI SSVID : 0x1987
SN : AO2221221251000008
MN : SQF-C4MV4-1TDEDC
FR : 0x4D464445
RAB : 0x1
IEEE : 0x6479A7
AERL : 0x3
SQES : 0x66
CQES : 0x44
NN : 0x1
InstallProtocolInterface: 52C78312-8EDC-4233-98F2-1A1AA5E388A5 74B8C6E0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B85D98
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74B79088
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74B790B8
InstallProtocolInterface: D432A67F-14DC-484B-B3BB-3F0291849327 74B790E0
InstallProtocolInterface: C88B0B6D-0DFC-49A7-9CB4-49074B4C3A78 74B79110
== NVME IDENTIFY NAMESPACE [1] DATA ==
NSZE : 0x773BD2B0
NCAP : 0x773BD2B0
NUSE : 0x773BD2B0
LBAF0.LBADS : 0x9
NvmExpressDriverBindingStart: end successfully
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74B78C20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74B78C38
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B78718
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74B7CD30
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74B7CD60
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74B7CDE8
InstallProtocolInterface: C12A7328-F81F-11D2-BA4B-00A0C93EC93B 0
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B7C798
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74B7C530
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74B7C560
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74B7C5E8
InstallProtocolInterface: 0FC63DAF-8483-4772-8E79-3D69D8477DE4 0
Index : 2
Start LBA : 32C800
End LBA : 52C7FF
Partition size: 200000
Start : 65900000 End : A58FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B7BF98
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74B7BB30
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74B7BB60
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74B7BBE8
InstallProtocolInterface: 0FC63DAF-8483-4772-8E79-3D69D8477DE4 0
Index : 3
Start LBA : 52C800
End LBA : 773BCFFF
Partition size: 76E90800
Start : A5900000 End : EE779FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B7B118
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74B7B330
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74B7B360
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74B7B3E8
InstallProtocolInterface: E6D6D379-F507-44C2-A23C-238F2A3DF928 0
Prepare to Free Pool
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74B7B6A0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74B7B6B8
BlockSize : 512
LastBlock : 12BFFF
InstallProtocolInterface: 964E5B22-6459-11D2-8E39-00A0C969723B 74B66030
Installed Fat filesystem on 74B78598
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74B7C020
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74B7C038
BlockSize : 512
LastBlock : 1FFFFF
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74B673A0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74B673B8
BlockSize : 512
LastBlock : 1FFFFF
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 746D4C20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 746D4C38
BlockSize : 512
LastBlock : 76E907FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
Original PCI Attributes = 0x4700
Supported PCI Attributes = 0xE700
Enabled PCI Attributes = 0x700
Ports Implemented(PI) = 0x1
HBA Capabilities(CAP) = 0xE534FF00
InstallProtocolInterface: A1E37052-80D9-4E65-A317-3E9A55C43EC9 746CBC20
SataControllerStart end with Success
==AtaAtapiPassThru Start== Controller = 74CE2F98
IDENTIFY DEVICE: [0] = 000000000000427A, [2] = 000000000000C837, [83] = 0000000000007408, [86] = 000000000000BC08
port [0] port multitplier [0] has a [harddisk]
Enabled S.M.A.R.T feature at port [0] PortMultiplier [0]!
CalculateBestPioMode: AdvancedPioMode = 3
IdeInitCalculateMode: PioMode = 4
CalculateBestUdmaMode: DeviceUDmaMode = 407F
IdeInitCalculateMode: UdmaMode = 5
InstallProtocolInterface: 1D3DE7F0-0807-424F-AA69-11A54E19A46F 746CB4C0
InstallProtocolInterface: 143B7632-B81B-4CB7-ABD3-B625A5B9BFFE 746CB510
InstallProtocolInterface: 19DF145A-B1D4-453F-8507-38816676D7F6 745C7D98
AtaBus - Identify Device: Port 0 PortMultiplierPort FFFF
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 745C7C98
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745C79A8
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745C79D8
InstallProtocolInterface: D432A67F-14DC-484B-B3BB-3F0291849327 745C7A30
InstallProtocolInterface: 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B 745C74A0
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745C4BA0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745C4BB8
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 745C4698
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745B6D30
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745B6D60
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 745B6DE8
InstallProtocolInterface: C12A7328-F81F-11D2-BA4B-00A0C93EC93B 0
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 745B6B18
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745B62B0
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745B62E0
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 745B6368
InstallProtocolInterface: 0FC63DAF-8483-4772-8E79-3D69D8477DE4 0
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 745B6798
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745B5030
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745B5060
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 745B50E8
InstallProtocolInterface: E6D6D379-F507-44C2-A23C-238F2A3DF928 0
Prepare to Free Pool
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745C43A0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745C43B8
BlockSize : 512
LastBlock : 12BFFF
InstallProtocolInterface: 964E5B22-6459-11D2-8E39-00A0C969723B 745BB030
Installed Fat filesystem on 745C4718
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745B60A0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745B60B8
BlockSize : 512
LastBlock : 1FFFFF
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745B5A20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745B5A38
BlockSize : 512
LastBlock : EB4F7FF
NvmExpressDriverBindingStart: start
NvmExpressDriverBindingStart: end successfully
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : 52C7FF
Partition size: 200000
Start : 65900000 End : A58FFE00
Index : 3
Start LBA : 52C800
End LBA : 773BCFFF
Partition size: 76E90800
Start : A5900000 End : EE779FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 76E907FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
SataControllerStart error. return status = Already started
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
F2 or Down to enter Boot Manager Menu.
ENTER to boot directly.
[Bds]OsIndication: 0000000000000000
[Bds]=============Begin Load Options Dumping ...=============
Driver Options:
SysPrep Options:
Boot Options:
Boot0000: UiApp 0x0109
Boot0001: UEFI SQF-C4MV4-1TDEDC AO2221221251000008 1 0x0001
Boot0002: UEFI 128GB NANDrive 00000000001R11M7MMXF 0x0001
Boot0003: UEFI Shell 0x0001
PlatformRecovery Options:
PlatformRecovery0000: Default PlatformRecovery 0x0001
[Bds]=============End Load Options Dumping=============
[Bds]BdsWait ...Zzzzzzzzzzzz...
[Bds]BdsWait(3)..Zzzz...
[Bds]BdsWait(2)..Zzzz...
[Bds]BdsWait(1)..Zzzz...
[Bds]Exit the waiting!
PROGRESS CODE: V03051007 I0
[Bds]Stop Hotkey Service!
[Bds]UnregisterKeyNotify: 000C/0000 Success
[Bds]UnregisterKeyNotify: 0002/0000 Success
[Bds]UnregisterKeyNotify: 0000/000D Success
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
Install PPI: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
FSP NotifyPhase ReadyToBoot Success.
PROGRESS CODE: V03051001 I0
Memory Previous Current Next
Type Pages Pages Pages
====== ======== ======== ========
09 00000008 00000000 00000008
0A 0000000A 00000000 0000000A
00 00000016 00000002 00000016
06 00000400 0000004F 00000400
05 00000130 00000065 00000130
[Bds]Booting UEFI SQF-C4MV4-1TDEDC AO2221221251000008 1
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : 52C7FF
Partition size: 200000
Start : 65900000 End : A58FFE00
Index : 3
Start LBA : 52C800
End LBA : 773BCFFF
Partition size: 76E90800
Start : A5900000 End : EE779FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 76E907FF
FSOpen: Open '\EFI\BOOT\BOOTX64.EFI' Success
[Bds] Expand PciRoot(0x0)/Pci(0x6,0x0)/Pci(0x0,0x0)/NVMe(0x1,89-18-30-FA-71-A7-79-64) -> PciRoot(0x0)/Pci(0x6,0x0)/Pci(0x0,0x0)/NVMe(0x1,89-18-30-FA-71-A7-79-64)/HD(1,GPT,1CE6CF3B-848B-4925-9EAC-7150CCF8B3EF,0x800,0x12C000)/\EFI\BOOT\BOOTX64.EFI
PROGRESS CODE: V03058000 I0
[Security] 3rd party image[0] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x6,0x0)/Pci(0x0,0x0)/NVMe(0x1,89-18-30-FA-71-A7-79-64)/HD(1,GPT,1CE6CF3B-848B-4925-9EAC-7150CCF8B3EF,0x800,0x12C000)/\EFI\BOOT\BOOTX64.EFI.
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 741114C0
Loading driver at 0x00073F52000 EntryPoint=0x00073F75000
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A9218
ProtectUefiImageCommon - 0x741114C0
- 0x0000000073F52000 - 0x00000000000D2000
PROGRESS CODE: V03058001 I0
InstallProtocolInterface: 605DAB50-E046-4300-ABB6-3DD810DD8B23 740036E0
FSOpen: Open '\EFI\BOOT\fbx64.efi' Success
FSOpen: Open '\EFI\BOOT\fbx64.efi' Success
FSOpen: Open 'EFI' Success
FSOpen: Open 'redhat' Success
FSOpen: Open 'BOOTX64.CSV' Success
FSOpen: Open '\EFI\redhat\BOOTX64.CSV' Success
FSOpen: Open '\EFI\redhat\shimx64.efi' Success
[Security] 3rd party image[0] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x6,0x0)/Pci(0x0,0x0)/NVMe(0x1,89-18-30-FA-71-A7-79-64)/HD(1,GPT,1CE6CF3B-848B-4925-9EAC-7150CCF8B3EF,0x800,0x12C000)/\EFI\redhat\shimx64.efi.
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7410B040
Loading driver at 0x00073D98000 EntryPoint=0x00073DBB000
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7410BE98
ProtectUefiImageCommon - 0x7410B040
- 0x0000000073D98000 - 0x00000000000D2000
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListXRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:SbatLevelRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListTrustedRT
InstallProtocolInterface: 605DAB50-E046-4300-ABB6-3DD810DD8B23 73E496E0
FSOpen: Open '\EFI\redhat\grubx64.efi' Success
ConvertPages: Incompatible memory types, the pages to allocate have been allocated
XhcClearBiosOwnership: called to clear BIOS ownership
XhcClearBiosOwnership: called to clear BIOS ownership
FPDT: -ResetEnd = 21000000
FPDT: -OsLoaderLoadImageStart = 166441000000
FPDT: -OsLoaderStartImageStart = 166493000000
FPDT: -ExitBootServicesEntry = 168411000000
Install PPI: BD44F629-EAE7-4198-87F1-39FAB0FD717E
FSP NotifyPhase EndOfFirmware Success.
gAddPerfRecordProtocolGuid - Locate protocol failed
SmmInstallProtocolInterface: 296EB418-C4C8-4E05-AB59-39E8AF56F00A 0
CpuDxe: 5-Level Paging = 0
MpInitChangeApLoopCallback() done!
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x000000000000C000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x000000000000C000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x000000000000A000 (0x0000000000000008)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #4: Test_08Jan25_2_payloaddebug_withtranscendnvme.log --]
[-- Type: text/x-log; name="Test_08Jan25_2_payloaddebug_withtranscendnvme.log", Size: 530859 bytes --]
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2025.01.08 15:15:21 =~=~=~=~=~=~=~=~=~=~=~=
\0
============= Intel Slim Bootloader STAGE1A =============
Serial Port Base: 00000000FE032000
PcdPciExpressBaseAddress: 00000000C0000000
mUartMmPciOffset[DebugPort]: 00000000000F0000
PciAddress: 00000000C00F0000
SBID: CTIPL_TGL
ISVN: 001
IVER: 001.000.001.008.00012
SVER: 0000000000000000
FDBG: BLD(D IA32) FSP(D)
FSPV: ID(TGLI-FSP) REV(0A007E70)
CPUV: ID(806C1) UCODE(AC)
Loader global data @ 0xFEF3FC10
Run STAGE1A @ 0xFFFEA000
Load STAGE1B @ 0xFFD80000
============= Intel Slim Bootloader STAGE1B =============
[Boot Guard] AcmStatus : 0x00000000
[Boot Guard] BootStatus: 0x00000000
[Boot Guard] Boot Guard Failed or is Disabled!
SpiInstance = FEF4C3D0
PchSpiBase at 0x00001F05
ScSpiBar0 at 0xF0000000
Loading Component KEYH:_HS_
Registering container KEYH
HASH verification for usage (0x00000100) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000100): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Append public key hash into store: Success
Load EXT CFG Data @ 0xFEF4CB54:0x1034 ... Success
HASH verification for usage (0x00000200) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000200): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Processor does not support Boot Guard.
Boot Guard Support status: 0
GetPlatformDataPtr is copied 0xFEF4CB34
BOOT: BP0
MODE: 0
PlatformName: INDi11
Memory Init
FSPM CfgData assignment
Load Memory Cfg Data
SkipMbpHob = 0x0
Load Graphics Cfg Data
Call FspMemoryInit ...
============= FSP Spec v2.2 Header Revision v5 (TGLI-FSP vA.0.7E.70) =============
Fsp BootFirmwareVolumeBase - 0xFFDEE000
Fsp BootFirmwareVolumeSize - 0x112000
Fsp TemporaryRamBase - 0xFEF4FF00
Fsp TemporaryRamSize - 0x50000
Fsp PeiTemporaryRamBase - 0xFEF4FF00
Fsp PeiTemporaryRamSize - 0x50000
Fsp StackBase - 0xFEF3EFD0
Fsp StackSize - 0x0
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x000FFDEE000, size is 0x00112000, handle is 0xFFDEE000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: A1EEAB87-C859-479D-89B5-1461F4061A3E
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x7 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x000FFE09C98 EntryPoint=0x000FFE09DCD PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM 6141E486-7543-4F1A-A579-FF532ED78E75
Loading PEIM at 0x000FFE0B59C EntryPoint=0x000FFE0B7DD ResetSystemPei.efi
Install PPI: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: 8C9F4DE3-7B90-47EF-9308-287CECD66DE8
Install PPI: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Install PPI: 75CF14AE-3441-49DC-AA10-BB35A7BA8BAB
Loading PEIM BAEB5BEE-5B33-480A-8AB7-B29C85E7CEAB
Loading PEIM at 0x000FFE0CBCC EntryPoint=0x000FFE0CE2D FspGlobalDataInitPei.efi
FspData: Signature - 0x44505346
FspData: Version - 0x0
FspData: PerfIdx - 0x3
FspData: PerfSig - 0x46524550
FspData: FspMode - API
FspData: FspInfoHeader - 0xFFDEE094
FspData: TempRamInitUpdPtr - 0x0
Loading PEIM 1B04374D-FA9C-420F-AC62-FEE6D45E8443
Loading PEIM at 0x000FFE15BDC EntryPoint=0x000FFE15E1D FspDebugServicePei.efi
=====================================
FSP Version : 0A.00.7E.70
RC Version : 0A.E0.7E.70
Build Date : 202403221131
=====================================
Install PPI: 835F3942-1545-414B-9459-BF072FA9A289
Loading PEIM 88C17E54-EBFE-4531-A992-581029F58126
Loading PEIM at 0x000FFE1F554 EntryPoint=0x000FFE1F70A FspPcdInit.efi
FspPcdInitEntryPoint() - Updating PcdPciExpressRegionLength to 0x10000000 & PcdPciExpressBaseAddress to 0xC0000000
Loading PEIM A8499E65-A6F6-48B0-96DB-45C266030D83
Loading PEIM at 0x000FFE20054 EntryPoint=0x000FFE20725 SiInitPreMemFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
SiInitPrePolicy() Start
PCH Series : TGL PCH-LP
PCH Stepping : B0
PCH SKU : LP IOT SKU
GBLRST_CAUSE0: 0x0
GBLRST_CAUSE1: 0x0
HPR_CAUSE0 : 0x0
FIA LOS0 = 0x00000011
FIA LOS1 = 0x00000200
POSTCODE=<00000B00>
PchInitPrePolicy() - Start
PCH PWRM Base needs to be programmed before here
(WDT) Readback = 0x00002000
Register PPI Notify: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Notify: PPI Guid: E09F355D-DAE8-4910-B14A-92780FDCF7CB, Peim notify entry point: FFE3F544
Install PPI: F38D1338-AF7A-4FB6-91DB-1A9C2183570D
SpiServiceInit() Start
Flash Region read Permission : FF
Flash Region write Permission : FF
Component 0 SFDP VSCC value : B1D82084
Component 1 SFDP VSCC value : 2000
Component Number : 1
Total Flash Size : 2000000
PchStrapBaseAddr : 100
PchStrapSize : 118
Mdtba : C00
CpuStrapBaseAddr : C68
CpuStrapSize : 44
SPI PPI Installed
Install PPI: DADE7CE3-6971-4B75-825E-0EE0EB17722D
SpiServiceInit() End
POSTCODE=<00000B02>
LpcOnEarlyPeiConfigure()
PchEarlyDisabledDeviceHandling() - Start
SPA Controller PCD Value = 3210
SPB Controller PCD Value = 7654
SPC Controller PCD Value = 3210
Multilane check for PCIE Controller 0: PCIe SPA is 4x1
No ports disabled
Multilane check for PCIE Controller 1: PCIe SPB is 1x4
Disabling RP 6/7/8
Multilane check for PCIE Controller 2: PCIe SPC is 4x1
No ports disabled
SCS UFS[0] Fuse disabled - performing PSF disable
SCS UFS[1] Fuse disabled - performing PSF disable
ISH Supported and Fuse disabled - performing PSF disable
GBE Supported and Fuse disabled - performing PSF disable
CNVi WiFi function Fuse disabled - performing PSF disable
PchEarlyDisabledDeviceHandling() - End
POSTCODE=<00000B7F>
PchInitPrePolicy() - End
Register PPI Notify: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Install PPI: BC1CFBDB-7E50-42BE-B487-22E0A90CB052
Install PPI: FEC36242-F8D8-4B43-8794-4F1F9F638DDC
SiInitPrePolicy() - End
Loading PEIM 9E1CC850-6731-4848-8752-6673C7005EEE
Loading PEIM at 0x000FFEE2268 EntryPoint=0x000FFEE2595 FspInitPreMem.efi
FspInitPreMemEntryPoint
POSTCODE=<0000D800>
Register PPI Notify: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: EF398D58-9DFD-4103-BF94-78C6F4FE712F
Installing StallPpi
Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56
Dumping FSPM_UPD - Size: 0x00000978
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x4D 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x01 0x00 0x00 0x00 0x00 0x00 0x65 0xFF 0x00 0xFF 0xF4 0xFE 0x00 0x00 0x05 0x00
0x00000030: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x00 0x60 0x97 0x05 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x01 0xB4 0xE5 0xF4 0xFE
0x00000050: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000060: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000070: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000080: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00
0x000000A0: 0x01 0x00 0x00 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x06 0x07 0x03 0x02 0x05 0x04
0x000000B0: 0x0F 0x08 0x09 0x0E 0x0C 0x0B 0x0A 0x0D 0x0B 0x0C 0x08 0x0F 0x09 0x0E 0x0A 0x0D
0x000000C0: 0x03 0x04 0x07 0x00 0x06 0x01 0x05 0x02 0x04 0x05 0x03 0x02 0x07 0x01 0x00 0x06
0x000000D0: 0x0B 0x0A 0x0C 0x0D 0x08 0x09 0x0E 0x0F 0x0C 0x0B 0x08 0x0D 0x0E 0x0F 0x09 0x0A
0x000000E0: 0x04 0x07 0x03 0x02 0x01 0x06 0x00 0x05 0x0B 0x0A 0x09 0x08 0x0C 0x0D 0x0F 0x0E
0x000000F0: 0x04 0x05 0x06 0x07 0x03 0x02 0x00 0x01 0x00 0x07 0x01 0x06 0x03 0x05 0x02 0x04
0x00000100: 0x09 0x08 0x0A 0x0B 0x0E 0x0F 0x0D 0x0C 0x04 0x05 0x06 0x01 0x03 0x02 0x07 0x00
0x00000110: 0x0A 0x0D 0x0C 0x0B 0x0E 0x09 0x0F 0x08 0x0A 0x0C 0x09 0x0F 0x08 0x0B 0x0D 0x0E
0x00000120: 0x03 0x04 0x01 0x02 0x06 0x00 0x05 0x07 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x00
0x00000150: 0x02 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000160: 0x00 0x00 0xD9 0xFE 0x00 0x20 0xD9 0xFE 0x00 0x10 0xD9 0xFE 0x00 0x40 0xD8 0xFE
0x00000170: 0x00 0x50 0xD8 0xFE 0x00 0x60 0xD8 0xFE 0x00 0x70 0xD8 0xFE 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0xFE 0x01 0x01 0x05 0x00 0x00 0x00
0x00000190: 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x20 0xDA 0xFE 0x00 0x30 0xDA 0xFE
0x000001D0: 0x00 0x40 0xDA 0xFE 0x2C 0x01 0x64 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0xAF 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01 0x01
0x00000260: 0x01 0x00 0x00 0x00 0xFF 0xFF 0xFF 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x02 0x02 0x04 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00
0x000002A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x02 0x00 0x01 0x01 0x08
0x00000300: 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02
0x00000310: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000320: 0x00 0x00 0x00 0x01 0x00 0x00 0x02 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000330: 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000360: 0x00 0x00 0x00 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x6C 0xFF 0x00 0x00 0x00 0x00
0x00000370: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000380: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000390: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000400: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000410: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000420: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000430: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000440: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000450: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000460: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000470: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000480: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000490: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000500: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000510: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000520: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000530: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000540: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000550: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000560: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000570: 0x00 0x00 0x04 0x00 0xA0 0xEF 0x00 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0xFF 0xFF
0x00000580: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08
0x00000590: 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 0xF0 0xD9 0xF4 0xFE 0xFF 0xFF 0xFF 0x00
0x000005A0: 0x10 0x00 0x00 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x08 0x00 0x00 0x60 0x03 0xFE
0x000005B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x07 0x00
0x000005C0: 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01
0x000005D0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01
0x000005E0: 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x3F 0xFF 0x3F
0x00000600: 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0x01 0x01 0x01 0x01
0x00000610: 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x01 0x00 0x01 0x01
0x00000620: 0x01 0x01 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0xCC 0x30
0x00000630: 0x00 0xE1 0xF5 0x05 0x1A 0x00 0x0B 0x00 0x0B 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A
0x00000640: 0x0A 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC
0x00000650: 0xAC 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD
0x00000660: 0xDD 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x03 0x00
0x00000670: 0x00 0x01 0x00 0x01 0x0F 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000680: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000690: 0x00 0x03 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006B0: 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006C0: 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000006D0: 0x00 0x00 0x40 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x000006E0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x01 0x01 0x01 0x01 0x01 0x01
0x000006F0: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x00000700: 0x01 0x01 0x01 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02 0x01 0x01 0x01 0x00
0x00000710: 0x02 0x00 0x00 0x00 0xE8 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000720: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000730: 0x00 0x00 0x00 0x00 0x00 0x28 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000740: 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000750: 0x06 0x0C 0x46 0x29 0x04 0x0E 0x46 0x29 0x02 0x14 0x46 0x29 0x03 0x16 0x46 0x29
0x00000760: 0x00 0x00 0x00 0x00 0x07 0x04 0x46 0x29 0x05 0x06 0x46 0x29 0x00 0x00 0x00 0x00
0x00000770: 0x00 0x00 0x01 0x01 0x00 0x00 0x04 0x03 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01
0x00000780: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000790: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000800: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000810: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000820: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000830: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000840: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000850: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000860: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000870: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000880: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000890: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008A0: 0x01 0x02 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x00 0x00
0x000008C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000900: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x07 0x00 0x00
0x00000910: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000920: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x64 0x00
0x00000930: 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000940: 0x07 0x07 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000950: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x00 0x00 0x00
0x00000960: 0x00 0x01 0x00 0x00 0x02 0x00 0x60 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000970: 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Install PPI: 824D5A3A-AF92-4C0C-9F19-19526DCA4ABB
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x40
TotalBlockSize after adding Block[0x2]= 0x11C
TotalBlockSize after adding Block[0x3]= 0x198
TotalBlockSize after adding Block[0x4]= 0x200
TotalBlockSize after adding Block[0x0]= 0x2C
TotalBlockSize after adding Block[0x0]= 0x68
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0x168
TotalBlockSize after adding Block[0x3]= 0x270
TotalBlockSize after adding Block[0x0]= 0x28
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xB4
TotalBlockSize = 0xB40
gSiPreMemConfigGuid = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemBlock->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCIe AddConfigBlocks
PciePreMemConfig->Header.GuidHob.Name = D0F9C2A9-7332-4733-8DB1-98792760DAE6
PciePreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCH AddPreMemConfigBlocks
PchGeneralPreMemConfig->Header.GuidHob.Name = C65F62FA-52B9-4837-86EB-1AFBD4ADBB3E
PchGeneralPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
LpcPreMemConfig->Header.GuidHob.Name = A6E6032F-1E58-407E-9AB8-C630C6C4118E
LpcPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HsioPciePreMemConfig->Header.GuidHob.Name = E8FB0C12-0DA1-4A20-B336-FB75938CE014
HsioPciePreMemConfig->Header.GuidHob.Header.HobLength = 0xDC
HsioSataPreMemConfig->Header.GuidHob.Name = 732260D0-A5C1-4119-AA0C-93DCAC670A31
HsioSataPreMemConfig->Header.GuidHob.Header.HobLength = 0x7C
PcieRpPreMemConfig->Header.GuidHob.Name = 8377AB38-F8B0-476A-9CA1-68EA7857D82A
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
GetClkReqForClkSrc 0->0, register 06543210
GetClkReqForClkSrc 1->1, register 06543210
GetClkReqForClkSrc 2->2, register 06543210
GetClkReqForClkSrc 3->3, register 06543210
GetClkReqForClkSrc 4->4, register 06543210
GetClkReqForClkSrc 5->5, register 06543210
GetClkReqForClkSrc 6->6, register 06543210
Me AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x4
MiscPeiPreMemConfig->Header.GuidHob.Name = 4A525577-3469-4F11-99CF-FBCD5EF184E4
MiscPeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
PramPreMemConfig->Header.GuidHob.Name = CF0B9B31-A1A6-46D9-8D14-E3AC690F523A
PramPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
MemConfig->Header.GuidHob.Name = 26CF084C-C9DB-41BB-92C6-D197B8A1E4BF
MemConfig->Header.GuidHob.Header.HobLength = 0xE0
MemConfigNoCrc->Header.GuidHob.Name = C56C73D0-1CDB-4C0C-A957-EA62A9E6F50C
MemConfigNoCrc->Header.GuidHob.Header.HobLength = 0x108
Applying Sample policy defaults for LPDDR4
CPU Pre-Mem Entry
POSTCODE=<0000DC00>
CpuSecurityPreMemConfig->Header.GuidHob.Name = 0FD5C346-8260-4067-9469-CF9168A34290
CpuSecurityPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTxtPreMemConfig->Header.GuidHob.Name = 20B4DB03-D160-4F83-A401-9A8AA8886814
CpuTxtPreMemConfig->Header.GuidHob.Header.HobLength = 0x60
CpuConfigLibPreMemConfig->Header.GuidHob.Name = FC1C0EC2-C6B4-4F05-BB85-C8008D5B4AB7
CpuConfigLibPreMemConfig->Header.GuidHob.Header.HobLength = 0x2C
CpuAddPreMemConfigBlocks Done
POSTCODE=<0000DC0F>
IpuPreMemPolicy->Header.GuidHob.Name = 830A222B-3FF5-432E-9DD5-4EE3FCA2AAA2
IpuPreMemPolicy->Header.GuidHob.Header.HobLength = 0x34
DciPreMemConfig->Header.GuidHob.Name = AB4AF366-2250-40C3-92DB-3661C6713C5A
DciPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
CpuTraceHubPreMemConfig->Header.GuidHob.Name = F2E17477-93F3-430D-9E08-3CCC6E2F6C4B
CpuTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
PchTraceHubPreMemConfig->Header.GuidHob.Name = 08456C11-DB85-4914-8D1A-E5AC6437E896
PchTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HdaPreMemConfig->Header.GuidHob.Name = D38F1E2B-21B3-43D1-9FA8-A5E178731E88
HdaPreMemConfig->Header.GuidHob.Header.HobLength = 0x74
PcieRpPreMemConfig->Header.GuidHob.Name = 7C24E649-C1F0-4CF9-8796-E7A0EE3443F8
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
SmbusPreMemConfig->Header.GuidHob.Name = 77A6E62C-716B-4386-9E9C-23A02E137B3A
SmbusPreMemConfig->Header.GuidHob.Header.HobLength = 0xA4
WdtPreMemConfig->Header.GuidHob.Name = FBCE08CC-60F2-4BDF-B788-09BB8165522B
WdtPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
OverClockingPreMemConfig->Header.GuidHob.Name = AD151BBC-D5A0-481E-9D19-F67B79E98F68
OverClockingPreMemConfig->Header.GuidHob.Header.HobLength = 0x94
GtPreMemConfig->Header.GuidHob.Name = 0319C56B-C43A-42F1-80BE-CA5BD1D5C928
GtPreMemConfig->Header.GuidHob.Header.HobLength = 0x50
TcssPreMemConfig->Header.GuidHob.Name = 514ED829-B2BB-46BE-A978-6D0C91C1EBE4
TcssPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
Vtd->Header.GuidHob.Name = 03E5CF63-BEBB-4041-B7E7-BF546120F1C5
Vtd->Header.GuidHob.Header.HobLength = 0x44
boot mode : 0x0
CpuPcieRpPreMemConfig->Header.GuidHob.Name = 41AEF892-C800-4AC0-A930-84AC47CACA7E
CpuPcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x38
PciePeiPreMemConfig->Header.GuidHob.Name = 81BAF3C9-F295-4572-8B21-793FA31BA5DB
PciePeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x44
CpuDmiPreMemConfig->Header.GuidHob.Name = 30D12AD5-A3C6-49C7-A2FD-355CCB61CBCF
CpuDmiPreMemConfig->Header.GuidHob.Header.HobLength = 0xA8
HostBridgePreMemConfig->Header.GuidHob.Name = BDEF6805-2080-44AD-932E-0004F52CB7A1
HostBridgePreMemConfig->Header.GuidHob.Header.HobLength = 0x40
TelemetryConfig->Header.GuidHob.Name = 422DE269-B2EF-4829-9336-0BE498B553B2
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
HgConfig->Header.GuidHob.Name = C7956998-C065-46C4-8E2F-582B67EBBE2F
HgConfig->Header.GuidHob.Header.HobLength = 0x88
DpInPreMemConfig->Header.GuidHob.Name = 080C14BA-CC84-4746-BF6B-D1F18EAAE835
DpInPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
TccConfig->Header.GuidHob.Name = AFFE7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x38
Install PPI: C133FE57-17C7-4B09-8B3C-97C189D0AB8D
FspUpdatePeiMePolicyPreMem
FSP UpdatePeiSaPolicyPreMem
MemConfig->SaGv = 0
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
---------------------- Si Pre-Mem Config Block Print Begin -----------------
PlatformDebugConsent = 0
SkipOverrideBootModeWhenFwUpdate = 0
---------------------- Si Pre-Mem Config Block Print End -------------------
---------------------- PCIe Pre-Mem Config Block Print Begin -----------------
PcieImrEnabled = 0
PcieImrRpLocation = 0
PcieImrSize = 0
PcieImrRpSelection = 0
---------------------- PCIe Pre-Mem Config Block Print End -------------------
------------------------ PCH Print PreMemPolicy Start ------------------------
Revision= 1
------------------ PCH General PreMem Config ------------------
Port80Route= 0
PcieRefPllSsc= FF
GpioOverride= 0
------------------ PCH LPC PreMem Config ------------------
EnhancePort8xhDecoding= 1
------------------ HSIO PCIE PreMem Config ------------------
RootPort[0] HsioRxSetCtleEnable= 0
RootPort[0] HsioRxSetCtle= 0
RootPort[0] HsioTxGen1DownscaleAmpEnable= 0
RootPort[0] HsioTxGen1DownscaleAmp= 0
RootPort[0] HsioTxGen2DownscaleAmpEnable= 0
RootPort[0] HsioTxGen2DownscaleAmp= 0
RootPort[0] HsioTxGen3DownscaleAmpEnable= 0
RootPort[0] HsioTxGen3DownscaleAmp= 0
RootPort[0] HsioTxGen1DeEmphEnable= 0
RootPort[0] HsioTxGen1DeEmph= 0
RootPort[0] HsioTxGen2DeEmph3p5Enable= 0
RootPort[0] HsioTxGen2DeEmph3p5= 0
RootPort[0] HsioTxGen2DeEmph6p0Enable= 0
RootPort[0] HsioTxGen2DeEmph6p0= 0
RootPort[1] HsioRxSetCtleEnable= 0
RootPort[1] HsioRxSetCtle= 0
RootPort[1] HsioTxGen1DownscaleAmpEnable= 0
RootPort[1] HsioTxGen1DownscaleAmp= 0
RootPort[1] HsioTxGen2DownscaleAmpEnable= 0
RootPort[1] HsioTxGen2DownscaleAmp= 0
RootPort[1] HsioTxGen3DownscaleAmpEnable= 0
RootPort[1] HsioTxGen3DownscaleAmp= 0
RootPort[1] HsioTxGen1DeEmphEnable= 0
RootPort[1] HsioTxGen1DeEmph= 0
RootPort[1] HsioTxGen2DeEmph3p5Enable= 0
RootPort[1] HsioTxGen2DeEmph3p5= 0
RootPort[1] HsioTxGen2DeEmph6p0Enable= 0
RootPort[1] HsioTxGen2DeEmph6p0= 0
RootPort[2] HsioRxSetCtleEnable= 0
RootPort[2] HsioRxSetCtle= 0
RootPort[2] HsioTxGen1DownscaleAmpEnable= 0
RootPort[2] HsioTxGen1DownscaleAmp= 0
RootPort[2] HsioTxGen2DownscaleAmpEnable= 0
RootPort[2] HsioTxGen2DownscaleAmp= 0
RootPort[2] HsioTxGen3DownscaleAmpEnable= 0
RootPort[2] HsioTxGen3DownscaleAmp= 0
RootPort[2] HsioTxGen1DeEmphEnable= 0
RootPort[2] HsioTxGen1DeEmph= 0
RootPort[2] HsioTxGen2DeEmph3p5Enable= 0
RootPort[2] HsioTxGen2DeEmph3p5= 0
RootPort[2] HsioTxGen2DeEmph6p0Enable= 0
RootPort[2] HsioTxGen2DeEmph6p0= 0
RootPort[3] HsioRxSetCtleEnable= 0
RootPort[3] HsioRxSetCtle= 0
RootPort[3] HsioTxGen1DownscaleAmpEnable= 0
RootPort[3] HsioTxGen1DownscaleAmp= 0
RootPort[3] HsioTxGen2DownscaleAmpEnable= 0
RootPort[3] HsioTxGen2DownscaleAmp= 0
RootPort[3] HsioTxGen3DownscaleAmpEnable= 0
RootPort[3] HsioTxGen3DownscaleAmp= 0
RootPort[3] HsioTxGen1DeEmphEnable= 0
RootPort[3] HsioTxGen1DeEmph= 0
RootPort[3] HsioTxGen2DeEmph3p5Enable= 0
RootPort[3] HsioTxGen2DeEmph3p5= 0
RootPort[3] HsioTxGen2DeEmph6p0Enable= 0
RootPort[3] HsioTxGen2DeEmph6p0= 0
RootPort[4] HsioRxSetCtleEnable= 0
RootPort[4] HsioRxSetCtle= 0
RootPort[4] HsioTxGen1DownscaleAmpEnable= 0
RootPort[4] HsioTxGen1DownscaleAmp= 0
RootPort[4] HsioTxGen2DownscaleAmpEnable= 0
RootPort[4] HsioTxGen2DownscaleAmp= 0
RootPort[4] HsioTxGen3DownscaleAmpEnable= 0
RootPort[4] HsioTxGen3DownscaleAmp= 0
RootPort[4] HsioTxGen1DeEmphEnable= 0
RootPort[4] HsioTxGen1DeEmph= 0
RootPort[4] HsioTxGen2DeEmph3p5Enable= 0
RootPort[4] HsioTxGen2DeEmph3p5= 0
RootPort[4] HsioTxGen2DeEmph6p0Enable= 0
RootPort[4] HsioTxGen2DeEmph6p0= 0
RootPort[5] HsioRxSetCtleEnable= 0
RootPort[5] HsioRxSetCtle= 0
RootPort[5] HsioTxGen1DownscaleAmpEnable= 0
RootPort[5] HsioTxGen1DownscaleAmp= 0
RootPort[5] HsioTxGen2DownscaleAmpEnable= 0
RootPort[5] HsioTxGen2DownscaleAmp= 0
RootPort[5] HsioTxGen3DownscaleAmpEnable= 0
RootPort[5] HsioTxGen3DownscaleAmp= 0
RootPort[5] HsioTxGen1DeEmphEnable= 0
RootPort[5] HsioTxGen1DeEmph= 0
RootPort[5] HsioTxGen2DeEmph3p5Enable= 0
RootPort[5] HsioTxGen2DeEmph3p5= 0
RootPort[5] HsioTxGen2DeEmph6p0Enable= 0
RootPort[5] HsioTxGen2DeEmph6p0= 0
RootPort[6] HsioRxSetCtleEnable= 0
RootPort[6] HsioRxSetCtle= 0
RootPort[6] HsioTxGen1DownscaleAmpEnable= 0
RootPort[6] HsioTxGen1DownscaleAmp= 0
RootPort[6] HsioTxGen2DownscaleAmpEnable= 0
RootPort[6] HsioTxGen2DownscaleAmp= 0
RootPort[6] HsioTxGen3DownscaleAmpEnable= 0
RootPort[6] HsioTxGen3DownscaleAmp= 0
RootPort[6] HsioTxGen1DeEmphEnable= 0
RootPort[6] HsioTxGen1DeEmph= 0
RootPort[6] HsioTxGen2DeEmph3p5Enable= 0
RootPort[6] HsioTxGen2DeEmph3p5= 0
RootPort[6] HsioTxGen2DeEmph6p0Enable= 0
RootPort[6] HsioTxGen2DeEmph6p0= 0
RootPort[7] HsioRxSetCtleEnable= 0
RootPort[7] HsioRxSetCtle= 0
RootPort[7] HsioTxGen1DownscaleAmpEnable= 0
RootPort[7] HsioTxGen1DownscaleAmp= 0
RootPort[7] HsioTxGen2DownscaleAmpEnable= 0
RootPort[7] HsioTxGen2DownscaleAmp= 0
RootPort[7] HsioTxGen3DownscaleAmpEnable= 0
RootPort[7] HsioTxGen3DownscaleAmp= 0
RootPort[7] HsioTxGen1DeEmphEnable= 0
RootPort[7] HsioTxGen1DeEmph= 0
RootPort[7] HsioTxGen2DeEmph3p5Enable= 0
RootPort[7] HsioTxGen2DeEmph3p5= 0
RootPort[7] HsioTxGen2DeEmph6p0Enable= 0
RootPort[7] HsioTxGen2DeEmph6p0= 0
RootPort[8] HsioRxSetCtleEnable= 0
RootPort[8] HsioRxSetCtle= 0
RootPort[8] HsioTxGen1DownscaleAmpEnable= 0
RootPort[8] HsioTxGen1DownscaleAmp= 0
RootPort[8] HsioTxGen2DownscaleAmpEnable= 0
RootPort[8] HsioTxGen2DownscaleAmp= 0
RootPort[8] HsioTxGen3DownscaleAmpEnable= 0
RootPort[8] HsioTxGen3DownscaleAmp= 0
RootPort[8] HsioTxGen1DeEmphEnable= 0
RootPort[8] HsioTxGen1DeEmph= 0
RootPort[8] HsioTxGen2DeEmph3p5Enable= 0
RootPort[8] HsioTxGen2DeEmph3p5= 0
RootPort[8] HsioTxGen2DeEmph6p0Enable= 0
RootPort[8] HsioTxGen2DeEmph6p0= 0
RootPort[9] HsioRxSetCtleEnable= 0
RootPort[9] HsioRxSetCtle= 0
RootPort[9] HsioTxGen1DownscaleAmpEnable= 0
RootPort[9] HsioTxGen1DownscaleAmp= 0
RootPort[9] HsioTxGen2DownscaleAmpEnable= 0
RootPort[9] HsioTxGen2DownscaleAmp= 0
RootPort[9] HsioTxGen3DownscaleAmpEnable= 0
RootPort[9] HsioTxGen3DownscaleAmp= 0
RootPort[9] HsioTxGen1DeEmphEnable= 0
RootPort[9] HsioTxGen1DeEmph= 0
RootPort[9] HsioTxGen2DeEmph3p5Enable= 0
RootPort[9] HsioTxGen2DeEmph3p5= 0
RootPort[9] HsioTxGen2DeEmph6p0Enable= 0
RootPort[9] HsioTxGen2DeEmph6p0= 0
RootPort[10] HsioRxSetCtleEnable= 0
RootPort[10] HsioRxSetCtle= 0
RootPort[10] HsioTxGen1DownscaleAmpEnable= 0
RootPort[10] HsioTxGen1DownscaleAmp= 0
RootPort[10] HsioTxGen2DownscaleAmpEnable= 0
RootPort[10] HsioTxGen2DownscaleAmp= 0
RootPort[10] HsioTxGen3DownscaleAmpEnable= 0
RootPort[10] HsioTxGen3DownscaleAmp= 0
RootPort[10] HsioTxGen1DeEmphEnable= 0
RootPort[10] HsioTxGen1DeEmph= 0
RootPort[10] HsioTxGen2DeEmph3p5Enable= 0
RootPort[10] HsioTxGen2DeEmph3p5= 0
RootPort[10] HsioTxGen2DeEmph6p0Enable= 0
RootPort[10] HsioTxGen2DeEmph6p0= 0
RootPort[11] HsioRxSetCtleEnable= 0
RootPort[11] HsioRxSetCtle= 0
RootPort[11] HsioTxGen1DownscaleAmpEnable= 0
RootPort[11] HsioTxGen1DownscaleAmp= 0
RootPort[11] HsioTxGen2DownscaleAmpEnable= 0
RootPort[11] HsioTxGen2DownscaleAmp= 0
RootPort[11] HsioTxGen3DownscaleAmpEnable= 0
RootPort[11] HsioTxGen3DownscaleAmp= 0
RootPort[11] HsioTxGen1DeEmphEnable= 0
RootPort[11] HsioTxGen1DeEmph= 0
RootPort[11] HsioTxGen2DeEmph3p5Enable= 0
RootPort[11] HsioTxGen2DeEmph3p5= 0
RootPort[11] HsioTxGen2DeEmph6p0Enable= 0
RootPort[11] HsioTxGen2DeEmph6p0= 0
---------------- HSIO SATA PreMem Config for controller 0 ----------------
PortSettings[0] HsioRxGen1EqBoostMagEnable= 0
PortSettings[0] HsioRxGen1EqBoostMag= 0
PortSettings[0] HsioRxGen2EqBoostMagEnable= 0
PortSettings[0] HsioRxGen2EqBoostMag= 0
PortSettings[0] HsioRxGen3EqBoostMagEnable= 0
PortSettings[0] HsioRxGen3EqBoostMag= 0
PortSettings[0] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen1DownscaleAmp= 0
PortSettings[0] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen2DownscaleAmp= 0
PortSettings[0] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen3DownscaleAmp= 0
PortSettings[0] HsioTxGen1DeEmphEnable= 0
PortSettings[0] HsioTxGen1DeEmph= 0
PortSettings[0] HsioTxGen2DeEmphEnable= 0
PortSettings[0] HsioTxGen2DeEmph= 0
PortSettings[0] HsioTxGen3DeEmphEnable= 0
PortSettings[0] HsioTxGen3DeEmph= 0
PortSettings[1] HsioRxGen1EqBoostMagEnable= 0
PortSettings[1] HsioRxGen1EqBoostMag= 0
PortSettings[1] HsioRxGen2EqBoostMagEnable= 0
PortSettings[1] HsioRxGen2EqBoostMag= 0
PortSettings[1] HsioRxGen3EqBoostMagEnable= 0
PortSettings[1] HsioRxGen3EqBoostMag= 0
PortSettings[1] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen1DownscaleAmp= 0
PortSettings[1] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen2DownscaleAmp= 0
PortSettings[1] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen3DownscaleAmp= 0
PortSettings[1] HsioTxGen1DeEmphEnable= 0
PortSettings[1] HsioTxGen1DeEmph= 0
PortSettings[1] HsioTxGen2DeEmphEnable= 0
PortSettings[1] HsioTxGen2DeEmph= 0
PortSettings[1] HsioTxGen3DeEmphEnable= 0
PortSettings[1] HsioTxGen3DeEmph= 0
------------------ PCH PCIe RP PreMem Config ------------------
Port[0] RpEnabled= 1
Port[1] RpEnabled= 1
Port[2] RpEnabled= 1
Port[3] RpEnabled= 1
Port[4] RpEnabled= 1
Port[5] RpEnabled= 1
Port[6] RpEnabled= 1
Port[7] RpEnabled= 1
Port[8] RpEnabled= 1
Port[9] RpEnabled= 1
Port[10] RpEnabled= 1
Port[11] RpEnabled= 1
Clock[0] Usage= 80
Clock[0] ClkReq= 0
Clock[1] Usage= 80
Clock[1] ClkReq= 1
Clock[2] Usage= 80
Clock[2] ClkReq= 2
Clock[3] Usage= 80
Clock[3] ClkReq= 3
Clock[4] Usage= 80
Clock[4] ClkReq= 4
Clock[5] Usage= 80
Clock[5] ClkReq= 5
Clock[6] Usage= 80
Clock[6] ClkReq= 6
------------------------ PCH Print PreMemPolicy End --------------------------
---------------------- Me Config Block Pre-Mem Print Begin -----------------
------------------------ ME_PEI_PREMEM_CONFIG -----------------
Revision : 0x2
HeciTimeouts : 0x1
DidInitStat : 0x0
DisableCpuReplacedPolling : 0x0
SendDidMsg (deprecated) : 0x0
DisableMessageCheck : 0x0
SkipMbpHob : 0x0
HeciCommunication2 : 0x0
KtDeviceEnable : 0x1
SkipCpuReplacementCheck : 0x1
Heci1BarAddress : 0xFEDA2000
Heci2BarAddress : 0xFEDA3000
Heci3BarAddress : 0xFEDA4000
---------------------- Me Config Block Pre-Mem Print End -------------------
------------------------ SA Policy (PEI PreMem) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_PREMEM_CONFIG ------------------------
Revision : 2
SpdAddressTable[16] : 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
SmbusBar: 0xEFA0
TsegSize: 0x800000
UserBd: 0x5
SkipExtGfxScan: 1
S3DataPtr: 0xFF650000
WrcFeatureEnable : 0x0
VcRtMappingPegEn : 0x0
TxtImplemented: 0
BdatEnable: 0
BdatTestType: 0
ScanExtGfxForLegacyOpRom: 0
CridEnable: 0
AcpiReservedMemoryBase: 0x0
AcpiReservedMemorySize: 0x0
SystemMemoryLength: 0x0
OpRomScanTempMmioBar: 0x80000000
OpRomScanTempMmioLimit: 0xC0000000
------------------------ MEMORY_CONFIG_NO_CRC ------------------------
CleanMemory: 0
MemTestOnWarmBoot: 1
SerialDebugLevel: 3
PlatformMemorySize: 0x5976000
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DMI PreMem Config ------------------
DmiMaxLinkSpeed : 0x3
DmiAspm : 0x2
DmiHWEQ : 0x1
DmiGen3EqPh2Enable : 0x2
DmiGen3EqPh3Method : 0x0
DmiGen3ProgramStaticEq : 0x1
DmiGen3RootPortPreset[8] : 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8
DmiGen3EndPointPreset[8] : 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7
DmiGen3EndPointHint[8] : 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2
DmiGen3RxCtlePeaking[4] : 0x0 0x0 0x0 0x0 DmiDeEmphasis : 0x1
------------------------ GRAPHICS_PEI_PREMEM_CONFIG -----------------
Revision : 3
PanelPowerEnable : 0x1
GttSize : 8 MB
IgdDvmt50PreAlloc : 0xFE
InternalGraphics : 0x1
PrimaryDisplay : 0x0
ApertureSize : 0x1
GtPsmiSupport : 0x0
PsmiRegionSize : 0x0
DismSize : 0x0
GttMmAdr : 0xAF000000
GmAdr64 : 0xB0000000
DfdRestoreEnable : 0x0
DdiPortAConfig : 0x0
DdiPortBConfig : 0x0
DdiPortAHpd : 0x0
DdiPortBHpd : 0x0
DdiPortCHpd : 0x0
DdiPort1Hpd : 0x0
DdiPort2Hpd : 0x0
DdiPort3Hpd : 0x0
DdiPort4Hpd : 0x0
DdiPortADdc : 0x0
DdiPortBDdc : 0x0
DdiPortCDdc : 0x0
DdiPort1Ddc : 0x0
DdiPort2Ddc : 0x0
DdiPort3Ddc : 0x0
DdiPort4Ddc : 0x0
------------------------ GRAPHICS_PEI_PREMEM_CONFIG Print END -----------------
----------------------- TCSS_PEI_PREMEM_CONFIG -----------------
Revision : 1
TCSS Port Enabled Bitmap : F
TcssPeiPreMemConfig->MiscConfig.PcieMultipleSegmentEnabled : 0x0
TCSS ITBT PCIE 0-3 Enable : 1 1 1 1
TCSS xHCI Enable : 1
TCSS xDCI Enable : 1
TCSS ITBT DMA 0-1 Enable : 1 1
------------------------ VTD_CONFIG -----------------
Revision : 1
VtdDisable : 0x0
X2ApicOptOut : 0x0
DmaControlGuarantee : 0x1
VtdIgdEnable : 0x1
VtdIpuEnable : 0x1
VtdIopEnable : 0x1
VtdItbtEnable : 0x1
VtdBaseAddress[0] : 0xFED90000
VtdBaseAddress[1] : 0xFED92000
VtdBaseAddress[2] : 0xFED91000
VtdBaseAddress[3] : 0xFED84000
VtdBaseAddress[4] : 0xFED85000
VtdBaseAddress[5] : 0xFED86000
VtdBaseAddress[6] : 0xFED87000
PreBootDmaMask : 0x0
DmaBufferSize : 0x400000
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge PreMem Config ------------------
Revision : 1
MchBar : 0xFEDC0000
DmiBar : 0xFEDA0000
EpBar : 0xFEDA1000
EdramBar : 0xFED80000
RegBar : 0xFB000000
EnableAbove4GBMmio : 0x1
------------------------ CPU - SiPreMemPolicyPpi Print Begin in PreMem -----------------
Revision= 1
------------------ CPU Security PreMem Config ------------------
CPU_SECURITY_PREMEM_CONFIG : PrmrrSize = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosSize = 0x2800
CPU_SECURITY_PREMEM_CONFIG : BiosGuard = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosGuardToolsInterface = 0x0
CPU_SECURITY_PREMEM_CONFIG : Txt = 0x0
CPU_SECURITY_PREMEM_CONFIG : SkipStopPbet = 0x0
CPU_SECURITY_PREMEM_CONFIG : EnableC6Dram = 0x0
CPU_SECURITY_PREMEM_CONFIG : ResetAux = 0x0
CPU_SECURITY_PREMEM_CONFIG : TxtAcheckRequest = 0x0
------------------ CPU TXT PreMem Config ------------------
CPU_TXT_PREMEM_CONFIG : SinitMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtHeapMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TgaSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemoryBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemorySize = 0x400000
CPU_TXT_PREMEM_CONFIG : BiosAcmSize = 0x0
CPU_TXT_PREMEM_CONFIG : BiosAcmBase = 0xFF6C0000
CPU_TXT_PREMEM_CONFIG : ApStartupBase = 0x0
------------------ CPU Config Lib PreMem Config ------------------
CPU_CONFIG_LIB_PREMEM_CONFIG : HyperThreading = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : BootFrequency = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : ActiveCoreCount1 = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : JtagC10PowerGateDisable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BistOnReset = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : VmxEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceEnable = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceLockEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : TmeEnable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : CpuRatio = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : ConfigTdpLevel = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BclkSource = 0x0
------------------------ CPU - SiPreMemPolicyPpi Print End -----------------
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DCI PreMem Config ------------------
DciEn = 0
DciDbcMode = 4
DciModphyPg = 0
DciUsb3TypecUfpDbg = 2
------------------ HD Audio PreMem Config ------------------
Enable = 1
DSP Enable = 0
DSP UAA Compliance = 0
Audio Link: HDA Link = 1
Audio Link: DMIC#0 = 0
DMIC#0 Clock Select = 0
Audio Link: DMIC#1 = 0
DMIC#1 Clock Select = 0
Audio Link: SSP#0 = 0
Audio Link: SSP#1 = 0
Audio Link: SSP#2 = 0
Audio Link: SSP#3 = 0
Audio Link: SSP#4 = 0
Audio Link: SSP#5 = 0
Audio Link: SoundWire#1 = 1
Audio Link: SoundWire#2 = 1
Audio Link: SoundWire#3 = 0
Audio Link: SoundWire#4 = 0
VC Type = 0
iDisp Codec Disconnect = 0
iDisp Link Frequency = 4
iDisp Link T-Mode = 3
ResetWaitTimer = 258
Hda Sdi0 Enable = 1
Hda Sdi1 Enable = 0
------------------ ISH PreMem Config ------------------
Enable= 1
------------------ CPU Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x0
------------------ PCH Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x1
------------------ SMBUS PreMem Config ------------------
Enable= 1
ArpEnable= 0
DynamicPowerGating= 1
SpdWriteDisable= 1
SmbAlertEnable= 0
SmbusIoBase= EFA0
NumRsvdSmbusAddresses= 4
RsvdSmbusAddressTable= { A2h A0h A2h A0h }
------------------ WDT PreMem Config ------------------
DisableAndLock= 0
------------------ OverClocking PreMem Config ------------------
OVERCLOCKING_PREMEM_CONFIG:: OcSupport : 0x0
OVERCLOCKING_PREMEM_CONFIG:: OcLock : 0x1
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingDownBin : 0x1
OVERCLOCKING_PREMEM_CONFIG:: Avx2RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: Avx3RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: BclkAdaptiveVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CorePllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: McPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: TjMaxOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrFaults : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrEfficiency : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RealtimeMemoryTiming : 0x0
OVERCLOCKING_PREMEM_CONFIG:: DynamicMemoryChange : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingCcfAutoGvDisable : 0x1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG -----------------
Revision : 4
RpEnabledMask : 0xFFFFFF
Link Down GPIOs : 0x0
ClockReq Messaging Enable : 0x1
RootPort[0] PcieSpeed : 0
RootPort[0] CdrRelock : 1
RootPort[0] Xl1el : 0
RootPort[0] NewFomDisable : 1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG Print END -----------------
------------------------ PCIE_PEI_PREMEM_CONFIG -----------------
Revision : 1
------------------------ PCIE_PEI_PREMEM_CONFIG Print END -----------------
------------------------ HYBRID_GRAPHICS_CONFIG -----------------
Revision : 2
HgConfig->CpuPcie0Rtd3Gpio.GpioSupport : 0x0
HgMode : 0
HgSlot : 0
------------------------ HG_DELAY_OPTIMIZATION_DATA -----------------
SaRtd3.HgDelayAfterHoldReset : 0x64
SaRtd3.HgDelayAfterPwrEn : 0x12C
------------------------ HYBRID_GRAPHICS_CONFIG print END -----------------
----------------------- DPIN_PREMEM_CONFIG -----------------
Revision : 2
DPIN DPin External Connection Policy : 0
DPIN NumberOfDpInPort : 0x0
DPIN DpInPortConnectMap : 0x0
DPIN DPinDynamicSwitch : 0x0
DPIN DPinDynamicSwitchDelay0 : 0x0
DPIN DPinDynamicSwitchDelay1 : 0x3E8
------------------ TCC PreMem Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Install PPI: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
FspInitPreMemEntryPoint done
Notify: PPI Guid: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8, Peim notify entry point: FFEE2689
Notify: PPI Guid: 85270BEF-6984-4375-A6EA-B5AA906EDD4A, Peim notify entry point: FFE207C3
SiInitPreMemOnPolicy() Start
PsmiInit () - Start
Install PSMI DATA HOB
PsmiDataHob->EfiHobGuidType.Name: 0A9652BD-6ACD-47E5-803A-09537BD2A848
PsmiDataHob @ FEF555B8
PsmiDataHobSize - HobHeader: 6A
PsmiDataHobSize: 82
PSMI HOB installed
PSMI SCRPD1 = 0x0
No PSMI Reservation Request
PsmiInit () - End
ME-BIOS: HECI PPI Entry.
POSTCODE=<0000DE03>
Install PPI: D14319E2-407A-9580-8DE5-51A8FFC6D7D7
ME-BIOS: HECI PPI Exit - Success.
POSTCODE=<0000DE23>
MeDeviceInit [HECI1] H: 00000000, L: FEDA2000
POSTCODE=<0000D001> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI2] H: 00000000, L: FEDA3000
POSTCODE=<0000D002> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI3] H: 00000000, L: FEDA4000
POSTCODE=<0000D003> - ME Device Init
Program HECI MMIO address
HeciEnable
[HECI1] Clearing D0I3 bit
[HECI1] D0I3C register = 00000010
Enabling CSME device 0:22:0
HeciInitialize () - Start
[HECI1] HfSts1 = 0x80000015
InitializeHeci () - Set H_RDY
Heci2Disable
[HECI2] Setting D0I3 bit
[HECI2] D0I3C register = 00000015
Disabling CSME device 0:22:1
Heci3Enable
[HECI3] Clearing D0I3 bit
[HECI3] D0I3C register = 00000010
Enabling CSME device 0:22:4
SolEnable
Enabling CSME device 0:22:3
PeiSiPolicyOverridePreMem ()
SiPreMemConfig->PlatformDebugConsent = 0
DciPreMemConfig->DciEn = 0
DciPreMemConfig->DciModphyPg = 1
DciPreMemConfig->DciDbcMode = 4
CpuTraceHubPreMemConfig->TraceHub.EnableMode = 0
CpuTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
CpuTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
PchTraceHubPreMemConfig->TraceHub.EnableMode = 0
PchTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
PchTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
POSTCODE=<0000DB48>
PchOnPolicyInstalled() - Start
ConfigureHdAudio() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
SetHdaControllerReset() - De-assert Reset
ConfigureAudioLinks() Start
HDA: HD Audio Link pins configuration
HDA: SoundWire#0 interface pins configuration, Status = Success
HDA: SoundWire#1 interface pins configuration, Status = Success
ConfigureAudioLinks() End
InitializeDisplayAudio() Start
EnablePowerWell Started !
EnablePowerWell Successfull
InitializeDisplayAudio() End
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00810004
HDA: SRAM retention mode idle wait - 64 XTAL oscillator clocks
ConfigureHdAudio() End - Status = Success
POSTCODE=<0000DB49>
PchHsioBiosProgPreMem() Start
PchHsioBiosProgPreMem() End
POSTCODE=<0000DB4A>
ECTRL Old = 0x0000B860
ECTRL New = 0x0000B861
DCI Debug Disabled
POSTCODE=<0000DB4D>
TraceHubInitialize() - Start
Early Trace is Enabled
Disable early trace complete
SCRPD0 = 0x00000000
TraceHubInitialize() - End. STT disconnected and Trace Hub requested to be disable
Register PPI Notify: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
SetPcieRefPllSsc()
POSTCODE=<0000DB15>
InitializePchSmbus() Start
Install PPI: 9CA93627-B65B-4324-A202-C0B461764543
InitializePchSmbus() End
POSTCODE=<0000DB52>
LpcOnPolicyConfigure()
POSTCODE=<0000DB53>
DCI Debug Disabled
Configure PCH SBU pins
POSTCODE=<0000DB55>
PchOnPolicyInstalled() - End
CpuOnPolicyInstalled Start
POSTCODE=<0000DC20>
XmmInit Start
POSTCODE=<0000DC2F>
Fit Entry Type: Startup ACM Entry
Fit Error Code: Startup ACM not supported by CPU
Microcode Update: 0x000000AC
TxtInit Start
POSTCODE=<0000DC3F>
Install PPI: 38CDD10B-767D-4F6E-A744-67EE1DFE2FA5
TXTPEI: TxtInfoHob passed from platform as:
TXTPEI: ChipsetIsTxtCapable = 1
TXTPEI: ProcessorIsTxtCapable = 1
TXTPEI: TxtMode = 0
TXTPEI: TxtAcheckRequest = 0
TXTPEI: ResetAux = 0
TXTPEI: AcpiBase = 1800
TXTPEI: SinitMemorySize = 0
TXTPEI: TxtHeapMemorySize = 0
TXTPEI: TxtDprMemoryBase = 0
TXTPEI: TxtDprMemorySize = 400000
TXTPEI: BiosAcmBase = FF6C0000
TXTPEI: BiosAcmSize = 0
TXTPEI: SinitAcmBase = 0
TXTPEI: SinitAcmSize = 0
TXTPEI: TgaSize = 0
TXTPEI: TxtLcpPdBase = 0
TXTPEI: TxtLcpPdSize = 0
TXTPEI: Flags = 0
TXTPEI: ApStartupBase = 0
TXTPEI: BIOS ACM is not matched to chipset!! Force TxtMode=0 and unloaded!!
TXTPEI::PEI Lib initialization failure
TXTPEI::Processor, PCH & Platform is TXT capable
TXTPEI::Unlock memory
TXTPEI::TXT failed reported by S-ACM
Install PPI: 9ECAFD30-29E2-42F6-BAF3-8B7DB8FE1F22
Processor does not support Boot Guard.
Boot Guard is not supported.
POSTCODE=<0000DC4F>
SetCpuStrapAndEarlyPowerOnConfig Start
POSTCODE=<0000DC0A>
SetCpuStrapAndEarlyPowerOnConfig: BootMode = 0
Set CPU Soft Straps Entry Point
Current CPU Strap Data = 0x1000
HT is supported
Number of Total Cores = 0x4. Number of Active Cores / Threads = 0x4 / 0x8
Ratio from Policy is 0x0
Current Flex Ratio from MSR is 0x0
Current Flex Ratio from CPU Strap: 0x0
No need to set Flex Ratio.
SetCpuStrapAndEarlyPowerOnConfig Done
POSTCODE=<0000DC14>
POSTCODE=<0000DC5F>
CpuOcInitPreMem Start
POSTCODE=<0000DC26>
(OC) Overclocking is disabled. Bypassing CPU core overclocking flow.
Invoking LockEnableDisableCpuDebug
CPU Pre-Mem Exit
POSTCODE=<0000DC6F>
MeOnPolicyInstalled() - Start
PWRM_PMCON_A = 0xD0801038
MePmInit () - Force an S5 exit path.
MeOnPolicyInstalled() - End
Programming Host Bridge Bars
POSTCODE=<0000DA06>
HostBridgeDataHob->EfiHobGuidType.Name: 3B682D57-D402-40A6-B134-A0C4F6311D09
HostBridgeDataHob @ FEF55988
HostBridgeDataHob Size - HobHeaderSize: 4
HostBridgeDataHobSize: 1C
HostBridgeDataHob->EnableAbove4GBMmio: 1
Host Bridge Data HOB installed
Enable VLW
Install SA HOBs
POSTCODE=<0000DA08>
SaDataHob->EfiHobGuidType.Name: E07D0BDA-BF90-46A9-B00E-B2C44A0ED6D0
SaConfigHob->EfiHobGuidType.Name: 762FA2E6-EA3B-41C8-8C52-63766D7039E0
SaDataHob @ FEF559A8
SaDataHobSize - HobHeader: 3
SaDataHobSize: 1B
SA HOBs installed
Reporting CPU PCIe code version
POSTCODE=<0000DA0A>
***************** System Agent PCIe code version *****************
** Major version number is: 10 **
** Minor version number is: 224 **
** Rev version number is: 126 **
** Build number is: 112 **
******************************************************************
Initializing DMI/OPI Max PayLoad Size
POSTCODE=<0000DA1F>
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
Initializing HybridGraphics
POSTCODE=<0000DA20>
HG:: HybridGraphics PEI initialization Starting
HgInfoHob->EfiHobGuidType.Name: 46CBED07-717A-4A75-85B3-F4B6C4E23A75
HgInfoHob @ FEF559F0
HgInfoHobSize - HobHeader: 4E
HgInfoHobSize: 66
Install HG Info HOB
HG:: HybridGraphics PEI initialization Ends
Initializing CPU PCIe
POSTCODE=<0000DA30>
CpuPcieHob Created
CpuPcieHob->EfiHobGuidType.Name: 440AB2E5-A3EA-466F-8496-DFB13B752995
CpuPcieHob @ FEF55A58
CpuPcieHob - HobHeader: DB
Initialize CPU PciExpress controllers in Premem : PciExpressInit Start
MaxCpuPciePortNum = 1
RpEnabledMask from Policy = FFFFFF
Read DEVEN register
DevEnable = 2F091
RpEnabledMask formed from DEVEN = 1
CpuPcieHob->RpEnabledMask formed after reading DID/setup and controllerconfig = 1
Call DEKEL init function to configure the PHY registers
GetCpuPcieCdrValue = 15
Default Case
GetCpuPcieCdrValue = 15
Default Case
CdrRelock is Enabled for PEG60
CdrRelock is Disabled for PEG10
ClockReq Messaging Enable
CPU PCIE Clock Req configuration Start
Keeping L1SubStates enable by default for RpIndex 0
CpuPcieEnableClkReqMsg Start
Configure CLKREQ# GPIO
Program the registers in CPU Root port
CpuPcieProgramClkReqMsgProtocolReg Start
CpuPcieProgramClkReqMsgProtocolReg End
PchEnableCpuPciePortClkReqMapping Entry
PchFiaEnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Exit
PchFiaEnableCpuPciePortClkReq Exit
PchEnableCpuPciePortClkReqMapping Exit
CpuPcieEnableClkReqMsg End
CPU PCIE Clock Req configuration End
Before PchFiaSetClockOutputDelay!!!
**** BDF = 060 ****
Set Slot Implemented Bit
Set TLS to gen1
Set speed capability in rootport 0
PcieSpeed from policy = 0
ElasticBufferProgramming StartElasticBufferProgramming EndRetrain link by clearing BLKDQDASD
PdsEnabledMask= 1
Target link speed = 1
Current link speed = 1
Negotiated link Width = 4
Program the CLKREQ ASSERT pin
CpuPcieSetAssertClkReq Start
CpuPcieSetAssertClkReq End
ClkReqAssertedMask = 0
CpuPciePollClkReqMsgSts StatusBit = 0
CpuPciePollClkReqMsgSts failed, so Disable CLKREQ# messaging
CpuPcieDisableClkReqMsg Start
Disable the CLKREQ# Messaging based on the polling
L1SubStates should not be enabled if CLKREQ# messaging is not enabled
Disable CLKREQ# messaging in Cpu Pcie RP
CpuPcieDisableClkReqMessaging Start
CpuPcieDisableClkReqMessaging End
CpuPcieDisableClkReqMsg End
**** Premem PciExpressInit End ****
Initializing DMI Tc/Vc mapping
POSTCODE=<0000DA40>
DmiBar + R_PCIE_PVCCR1 = 0
TC:0 VC:0!
TC:1 VC:1!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:7 VC:2!
VC:0 VCID:0 Enable:1!
VC:1 VCID:1 Enable:1!
VC:2 VCID:7 Enable:1!
Create Graphics Data Hob
GfxDataHob->EfiHobGuidType.Name: 48E6E20A-9110-4332-8C9F-5F7CAE76FCF3
GfxDataHob @ FEF55B50
GfxDataHobSize - HobHeader: 10
GfxDataHobSize: 28
GfxDataHob->PrimaryDisplayDetection: 0
GfxDataHob->ExternalGfxScanEnable: 0
Gfx HOBs installed
Graphics detection
Initializing Graphics
POSTCODE=<0000DA45>
iGFX initialization start
GTBaseAddress 0XAF000000:
IGD enabled.
Update CONFIG0 Address D00 : 10
Configuring iTouch Source Registers Doorbell and GSA_Touch
iGFX initialization end
Initializing Pre-Memory Display
POSTCODE=<0000DA0B>
DisplayNativeGpioInit: Begin
DisplayNativeGpioInit: End
ProgramDisplayWorkaround: Begin
POSTCODE=<0000DA48>
Initializing DpIn PreMem Config.
[DpIn] DpInPreMemInit() - Start
Dp-In External Gfx Card Support = 0 From DpIn PreMemConfigBlock
Initializing CPU specific PreMem Pei Config in Pre-Mem
GetDpInPrivateCpuData - Dp-In not Supported by Silicon. Max DP-In Port Support = 0x0
Initializing Dp-In Config Policy
[DPIN] DpInPostGfxInit() - Start
[DPIN] DpInPostGfxInit() - End
POSTCODE=<0000DA49>
[TCSS] TcssPreMemInit() - Start
Install TCSS DATA HOB
TcssHob->EfiHobGuidType.Name: 455702CE-4ADB-45D9-8B27-F7B0D9798AE0
TcssHob @ FEF55B78
&(TcssHob->TcssData) @ FEF55B90
TcssHob - HobHeader: 6E
TcssData: 32
Install TCSS SSID DATA HOB
TcssSsidHob->EfiHobGuidType.Name: 8903D47A-8F82-4063-A840-31689C9E7820
TcssSsidHob @ FEF55C00
&(TcssHob->TcssSsidTable) @ FEF55C18
TcssSsidHob->NumberOfTcssSsidTable: 8
[TCSS] TcssDevEnInitPreMem - Start
TCSS DEVEN = 0x00000300
IOM mailbox data = 0x00000300
IOM mailbox command = 0x00000001
[TCSS] Updated TCSS_DEVEN to TCSS HOB
[TCSS] TcssDevEnInitPreMem - End
[TCSS] TcssPreMemInit() - End
POSTCODE=<0000DA50>
[TCSS] UpdateDpinToHob Entry
[TCSS] UpdateDpinToHob End
Initializing Vtd
POSTCODE=<0000DA51>
Install VTD DATA HOB
VtdDataHob->EfiHobGuidType.Name: 1D60DCE8-503A-44A8-B32D-56B388F34C55
VtdDataHob @ FEF55C20
VtdDataHobSize - HobHeader: 24
VtdDataHobSize: 3C
VTd enabled
IgdIommuOverride start
Before Override: EcapReg=69E2FF0505E
After Override: EcapReg=29A00F0505E
Initializing System Agent Overclocking
POSTCODE=<0000DA52>
SaOcInit Start
(OC) Overclocking is disabled. Bypassing SA overclocking flow.
Configuring Telemetry CPU CrashLog Device with DEVEN 0x2F091
TotalMmioLength: 0x00000000 bytes
[InstallMrcCallback] MRC Entry...
[InstallMrcCallback] Register PeiMasterBootModePpi Notify Status = Success
Register PPI Notify: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Notify: PPI Guid: 7408D748-FC8C-4EE6-9288-C4BEC092A410, Peim notify entry point: FFE483A5
[PrememoryInitCallBack]
[PeimMemoryInit]
Post Code: DD00h
Processor supports TXT
Platform / PCH supports TXT
TigerLake ULT: Stepping B0
Microcode Update: 0x000000AC
System boot mode: 0h - BOOT_WITH_FULL_CONFIGURATION
Restore data of size 64167 from 0xFF650000
Global data of size 132013 is at 0xFEF1A134
MiscPeiPreMemConfig->S3DataPtr: FF650000 check completed, SysBootMode: 0
Calc. crc = 0x9A66C127, Header crc = 0x9A66C127
Saved memory configuration data is valid
Calling CpuReplacementCheck
Skip CPU replacement check by policy
ForceFullTraining 0
<mc>5D10 R 0</mc>
Fast boot is possible, so forcing it
(MAILBOX) Mailbox Read Command = 341h
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BIOS_CMD_MRC_CONFIG scesfie. MailboxStatus = 0h, MailboxData = 17Ch
TXTPEI: TXT.E2STS=4
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Spd Address for Mc 0 Channel 0 Dimm 0: 0
Spd Address for Mc 0 Channel 0 Dimm 1: 0
Spd Address for Mc 0 Channel 1 Dimm 0: 0
Spd Address for Mc 0 Channel 1 Dimm 1: 0
Spd Address for Mc 0 Channel 2 Dimm 0: 0
Spd Address for Mc 0 Channel 2 Dimm 1: 0
Spd Address for Mc 0 Channel 3 Dimm 0: 0
Spd Address for Mc 0 Channel 3 Dimm 1: 0
Spd Address for Mc 1 Channel 0 Dimm 0: 0
Spd Address for Mc 1 Channel 0 Dimm 1: 0
Spd Address for Mc 1 Channel 1 Dimm 0: 0
Spd Address for Mc 1 Channel 1 Dimm 1: 0
Spd Address for Mc 1 Channel 2 Dimm 0: 0
Spd Address for Mc 1 Channel 2 Dimm 1: 0
Spd Address for Mc 1 Channel 3 Dimm 0: 0
Spd Address for Mc 1 Channel 3 Dimm 1: 0
IMR Configuration start
ME status: 0x80000015
IPU Fused off
BiosImrDisableMask0 = FFFFBBDF
PCIe IMR Size = 0
Heci Get IMR Size Msg
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80100007
00: F0 0C 00 00 DF BB FF FF - FF FF FF FF 00 00 00 00
[HECI1] Got msg Success: 80100007
00: F0 8C 00 00 00 00 0C 02 - 00 00 00 01 00 00 00 00
Heci Get IMR Size Msg successful. Response:
IMR Size = 0x020C0000
Largest IMR Size = 0x01000000
Flags = 0x00000000
POSTCODE=<0000D000> - Heci Get IMR Size Msg
Requested CSE IMR size = 34340864 Bytes
Largest CSE IMR size = 16777216 Bytes
Requested CSE IMR size (rounded up) = 64 MB
Largest CSE IMR size = 16 MB
MRC Start Memory Configuration
@@@@ Inputs->MemoryProfile:0
*********************************************************************
** Copyright (c) 2011- 2020 Intel Corporation. All rights reserved. **
** Tigerlake memory detection and initialization code. **
** Major version number is: 2 **
** Minor version number is: 0 **
** Rev version number is: 2 **
** Build number is: 10 **
*********************************************************************
BootMode == bmFast
SAGV: Disabled, running at point 3
Post Code: DD03h
MRC task -- MRC Early Overrides -- Started.
MRC task MRC Early Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD02h
MRC task -- Safe Mode Override -- Started.
MRC task Safe Mode Override -- SUCCEEDED, Status = 0h.
Post Code: DD1Bh
MRC task -- Fast boot permitted -- Started.
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 0 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 1 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 2 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 3 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 0 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 1 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 2 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
Channel 3 Dimm 0 DimmCrc C97Eh, DimmSave->Crc C97Eh
MRC task Fast boot permitted -- SUCCEEDED, Status = 0h. Stack Depth: 149744
Post Code: DD1Ch
MRC task -- Restore non-training values -- Started.
SAGV point 3: Frequency=2667, tCK=750000fs, Ratio=20, Gear1, Inputs->BClkFrequency=5F5E100,Outputs->RefClk=0
MRC task Restore non-training values -- SUCCEEDED, Status = 0h. Stack Depth: 149756
Post Code: DD1Dh
MRC task -- Print input parameters -- Started.
Debug.Stream: FEF3E99Ch
Debug.Level: 3h
FreqMax: 0
GearRatio: 0
Ratio: 0
RefClk: 133MHz
BClk: 100000000Hz
MemoryProfile: 0
RealtimeMemoryOC: 0
OcSupport: disabled
OverrideDowngradeForMixedMemory: disabled
BoardType: 5
CmdRanksTerminated: 1h
DqPinsInterleaved: 0
SeparateCkeDelayDdr4: 1
CpuModel: 806C0h
CpuStepping: 1h
GraphicsStolenSize: 3Ch
GraphicsGttSize: 8h
Iteration: 0h
VddVoltage: 0 mV
BootMode: 3h
TxtFlag: 0h
SimicsFlag: 0h
MobilePlatform: 1h
EccSupport: 1h
CleanMemory: 0x0
Ibecc: 0h
IbeccOperationMode: 0x2
IbeccParity: 0x1
McParity: 1h
GfxIsVersatileAcceleration: 0h
ScramblerSupport: 0h
LpFreqSwitch: 1h
MemSSFusa: 0h
RemapEnable: 1h
PowerDownMode: 0h
PwdwnIdleCounter: 0h
DisPgCloseIdleTimeout: 0h
RankInterleave: 1h
EnhancedInterleave: 1h
WeaklockEn: 0h
EnCmdRate: 7h
BaseAddresses
PciE: C0000000h
MchBar: FEDC0000h
Smbus: EFA0h
MeStolenSize: 40h
MmioSize: 800h
TsegSize: 8h
DprSize: 0h
PrmrrSize: 0h
TccMemAddress: 40080000h
TccMemSize: 0h
VddSettleWaitTime: 0h
VccIomV: 950
RmtPerTask: 0
TrainTrace: 0
MarginLimitCheck: 0
MarginLimitL2: 100
AutoSelfRefreshSupport: 1
ExtTemperatureSupport: 1
RhPrevention: 0
RhSolution: 0
RhRefreshSolution: 2
RefreshWm: 1h
RefreshPanicWm: 8h
RefreshHpWm: 7h
LctCmdEyeWidth: 96
RetrainOnFastFail: 1
LpDdrDqDqsReTraining (LpDqsOscEn) : 0h
NewFeatureEnable1: 0
NewFeatureEnable2: 0
MrcSafeConfig: 1h
SafeMode: 1h
VddqVoltageOverride(# of 1mV): 0
ChHashOverride: 0h
ChHashEnable: 1h
ChHashMask: 30CCh
ChHashInterleaveBit: 2h
ExtendedBankHashing: 1h
PerBankRefresh: 1h
ProbelessTrace: 0
Force1Dpc: 0
ForceSingleRank: 0
VttCompForVsshi: 1
Lp5CccConfig: 0x0
CmdMirror: 0x0
Ddr4OneDpc: 0
RxMode: 255
PowerTrainingMode: margin optimization
BdatEnable: 0
BdatTestType: 0
Lp5CccConfig: 0h
*************************************
***** MRC TRAINING STEPS *****
*************************************
TrainingSteps: 0x24FC073B TrainingSteps2: 0xC002
TrainingEnables.SOT: 1
TrainingEnables.ERDMPRTC2D: 0
TrainingEnables.ECT: 1
TrainingEnables.PDA: 1
TrainingEnables.RCVET: 1
TrainingEnables.RDMPRT: 1
TrainingEnables.JWRL: 1
TrainingEnables.EWRTC2D: 0
TrainingEnables.ERDTC2D: 0
TrainingEnables.WRTC1D: 1
TrainingEnables.WRVC1D: 1
TrainingEnables.RDTC1D: 1
DDR4MAP: 0
TrainingEnables2.DIMMODTCAT: 0
TrainingEnables.DIMMODTT: 0
TrainingEnables.DIMMRONT: 0
TrainingEnables.WRDSEQT: 0
TrainingEnables.WRDSUDT: 0
TrainingEnables.WRSRT: 0
TrainingEnables.RDODTT: 0
TrainingEnables.RDEQT: 0
TrainingEnables.RDAPT: 0
TrainingEnables.CMDVC: 1
TrainingEnables.WRTC2D: 1
TrainingEnables.RDTC2D: 1
TrainingEnables.WRVC2D: 1
TrainingEnables.RDVC2D: 1
TrainingEnables.LCT: 1
TrainingEnables.RTL: 0
TrainingEnables.TAT: 0
TrainingEnables.RMT: 1
TrainingEnables.MEMTST: 0
TrainingEnables.ALIASCHK: 0
TrainingEnables.RCVENC1D: 1
TrainingEnables.RMC: 0
TrainingEnables2.DCC: 0
TrainingEnables2.RDVC1D: 1
TrainingEnables2.TXTCO: 0
TrainingEnables2.CLKTCO: 0
TrainingEnables2.CMDSR: 0
TrainingEnables2.CMDDSEQ: 0
TrainingEnables2.DIMMODTCA: 0
TrainingEnables2.TXTCODQS: 0
TrainingEnables2.CMDDRUD: 0
TrainingEnables2.VCCDLLBP: 0
TrainingEnables2.PVTTDNLP: 0
TrainingEnables2.RDVREFDC: 0
TrainingEnables2.VDDQT: 0
TrainingEnables2.RMTBIT: 0
TrainingEnables2.WRITE0: 1
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
*************************************
***** MRC TIMING DATA *****
*************************************
Controller[0] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 0/0/0 Status: 0h
Controller, Channel, Dimm 0/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/0/1 Status: 0h
Controller, Channel, Dimm 0/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 0/1/0 Status: 0h
Controller, Channel, Dimm 0/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/1/1 Status: 0h
Controller, Channel, Dimm 0/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 0/2/0 Status: 0h
Controller, Channel, Dimm 0/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/2/1 Status: 0h
Controller, Channel, Dimm 0/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 0/3/0 Status: 0h
Controller, Channel, Dimm 0/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/3/1 Status: 0h
Controller, Channel, Dimm 0/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller[1] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 1/0/0 Status: 0h
Controller, Channel, Dimm 1/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/0/1 Status: 0h
Controller, Channel, Dimm 1/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 1/1/0 Status: 0h
Controller, Channel, Dimm 1/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/1/1 Status: 0h
Controller, Channel, Dimm 1/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 1/2/0 Status: 0h
Controller, Channel, Dimm 1/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/2/1 Status: 0h
Controller, Channel, Dimm 1/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 1/3/0 Status: 0h
Controller, Channel, Dimm 1/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 2C 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .,...U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/3/1 Status: 0h
Controller, Channel, Dimm 1/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
*************************************
***** THERMAL OVERWRITE *******
*************************************
ThermalEnables.EnablePwrDn : 1h
ThermalEnables.EnablePwrDnLpddr: 1h
ThermalEnables.Refresh2X : 0h
SrefCfgEna : 1h
SrefCfgIdleTmr : 200h
ThrtCkeMinDefeat: 1h
ThrtCkeMinTmr : 0h
ThrtCkeMinDefeatLpddr: 1h
ThrtCkeMinTmrLpddr : 0h
*************************************
***** DQDQS SWIZZLING *******
*************************************
Mc0.Ch0: 0 1 DqMapCpu2Dram: 0 1 6 7 3 2 5 4 15 8 9 14 12 11 10 13
Mc0.Ch1: 1 0 DqMapCpu2Dram: 11 12 8 15 9 14 10 13 3 4 7 0 6 1 5 2
Mc0.Ch2: 0 1 DqMapCpu2Dram: 4 5 3 2 7 1 0 6 11 10 12 13 8 9 14 15
Mc0.Ch3: 1 0 DqMapCpu2Dram: 12 11 8 13 14 15 9 10 4 7 3 2 1 6 0 5
Mc1.Ch0: 1 0 DqMapCpu2Dram: 11 10 9 8 12 13 15 14 4 5 6 7 3 2 0 1
Mc1.Ch1: 0 1 DqMapCpu2Dram: 0 7 1 6 3 5 2 4 9 8 10 11 14 15 13 12
Mc1.Ch2: 0 1 DqMapCpu2Dram: 4 5 6 1 3 2 7 0 10 13 12 11 14 9 15 8
Mc1.Ch3: 1 0 DqMapCpu2Dram: 10 12 9 15 8 11 13 14 3 4 1 2 6 0 5 7
RcompResistor: 0
RcompTarget[RdOdt]: 0
RcompTarget[WrDS]: 0
RcompTarget[WrDSCmd]: 0
RcompTarget[WrDSCtl]: 0
RcompTarget[WrDSClk]: 0
MRC task Print input parameters -- SUCCEEDED, Status = 0h. Stack Depth: 149824
Post Code: DD21h
MRC task -- MRC Auto Updates and Overrides -- Started.
LPDDR Low Frequency: 1067
RxMode: Unmatched w/ Rload DQS
LowFrequency: 1067
Updating Rcomp Resistors: 100
Updating Rcomp Targets:
RcompTarget[RdOdt]: 80
RcompTarget[WrDS]: 40
RcompTarget[WrDSCmd]: 40
RcompTarget[WrDSCtl]: 40
RcompTarget[WrDSClk]: 30
DDRIO ODT Mode: Vss
MRC task MRC Auto Updates and Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD22h
MRC task -- MC Capabilities -- Started.
Memory allocated for IGD = 60MB and for GTT = 8MB.
Maximum size of memory allowed on a channel = 65536MB.
Number of channels supported = 4
Number of DIMMs per channel supported = 1
Controller, Channel, Dimm 0/0/0 NMode = 1
Controller, Channel, Dimm 0/1/0 NMode = 1
Controller, Channel, Dimm 0/2/0 NMode = 1
Controller, Channel, Dimm 0/3/0 NMode = 1
Controller, Channel, Dimm 1/0/0 NMode = 1
Controller, Channel, Dimm 1/1/0 NMode = 1
Controller, Channel, Dimm 1/2/0 NMode = 1
Controller, Channel, Dimm 1/3/0 NMode = 1
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
MRC task MC Capabilities -- SUCCEEDED, Status = 0h.
Post Code: DD11h
MRC task -- MC Frequency Lock -- Started.
(MAILBOX) Mailbox Read Command = 33Fh
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BCLK_CONFIG_GET_SSC_CONTROL_SUBCOMMAND success. MailboxStatus = 0h
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
W GsmIocScramLpMode: 1
MRC task MC Frequency Lock -- SUCCEEDED, Status = 0h. Stack Depth: 150088
Post Code: DD15h
MRC task -- Memory SubSystem Config -- Started.
W .B0 GsmCmiLsbMaskBit: 8336 (0x2090)
W .B0 GsmCmiHashMode: 2
Controller HASH Enabled
W .B0 EndOfCmiMarker: 0
W .B0 EndOfCmiMarker: 0
Interleaved Memory between controllers 32768 Megabytes
Updating the registers for CMF0
W .B0 GsmCmiStackedMode: 1
W .B0 GsmCmiStackMsMap: 0
W .B0 GsmCmiLMadSliceMap: 0
W .B0 GsmCmiSliceDisable: 0
W .B0 GsmCmiStackedMsHash: 32 (0x20)
W .B0 GsmCmiSMadSliceSize: 0
MRC task Memory SubSystem Config -- SUCCEEDED, Status = 0h. Stack Depth: 150416
Post Code: DD09h
MRC task -- DDRIO Config - Pre DCC -- Started.
W GsmIocScramDdr4Mode: 1
W GsmIocScramLp5Mode: 1
W GsmIocDisIosfSbClkGate: 0
MRC task DDRIO Config - Pre DCC -- SUCCEEDED, Status = 0h.
Post Code: DD6Bh
MRC task -- Memory Subsystem FUSA Configuration -- Started.
Disable CMI Parity
CmiParity PARITY_EN: 1
CmiParity ADDR_PARITY_CHK_MASK: 255
Disable MC0 Parity
Mc0Parity PARITY_EN: 1
Mc0Parity RDATA_PARITY_EN: 1
Mc0Parity WDATA_PARITY_EN: 0
Mc0Parity WBE_PARITY_EN: 0
Mc0Parity ADDR_PARITY_EN: 1
Disable MC1 Parity
Mc1Parity PARITY_EN: 1
Mc1Parity RDATA_PARITY_EN: 1
Mc1Parity WDATA_PARITY_EN: 0
Mc1Parity WBE_PARITY_EN: 0
Mc1Parity ADDR_PARITY_EN: 1
CmiParity PARITY_EN: 1
Mc0Parity PARITY_EN: 1
Ibecc0Parity PARITY_EN: 1
Mc1Parity PARITY_EN: 1
Ibecc1Parity PARITY_EN: 1
MRC task Memory Subsystem FUSA Configuration -- SUCCEEDED, Status = 0h.
Post Code: DD7Bh
MRC task -- MRC Check-The-Checker -- Started.
MRC task MRC Check-The-Checker -- SUCCEEDED, Status = 0h.
Post Code: DD24h
MRC task -- MC MEMORY MAP -- Started.
PrmrrSize adjusted to = 0 MB
TOM (Total physical memory size) = 32768 MB
GGC value = FEC0h
Unaligned TSEG base = 7B4h
Unaligned GTT base = 7BCh
Unaligned BDSM base = 7C4h
Unaligned TOLUD base = 800h
TSEG base = 7B0h
GTT base = 7B8h
BDSM base = 7C0h
TOLUD base = 7FCh
Reclaim Enable
Remap Base 8000h
Remap Limit 8803h
TOUUD Base 8804h
ME stolen base 770h
ME stolen size 40h
TotalMemorySize = 8000
ToludBase = 7FC
TouudBase = 8804
TsegBase = 7B0
BdsmBase = 7C0
BgsmBase = 7B8
GraphicsControlRegister = FEC0
SetIaGtImrExclusion Enter
SetIaGtImrExclusion End
Set Gfx Memory Map
GMSSize: 60MB
GMSBase read from R_SA_BDSM: 0x7C000000
Rc6CtxBaseLow: 0x7FBF7000
DoorbellCtxBaseLow: 0x7FBFF000
RC6 Context Base: 0x7FBF7001
RC6 Context Base Programming done
MRC task MC MEMORY MAP -- SUCCEEDED, Status = 0h.
Post Code: DD27h
MRC task -- Pre-Training -- Started.
CPGC Mode locked
MRC task Pre-Training -- SUCCEEDED, Status = 0h.
Post Code: DD25h
MRC task -- Print DDR MRs -- Started.
MRC task Print DDR MRs -- SUCCEEDED, Status = 0h.
Post Code: DD77h
MRC task -- MRC In-band ECC -- Started.
MRC task MRC In-band ECC -- SUCCEEDED, Status = 0h.
Post Code: DD78h
MRC task -- Update MC Values in Fast flow -- Started.
Saved data CRC = 9A66C127h
MRC task Update MC Values in Fast flow -- SUCCEEDED, Status = 0h.
Post Code: DD43h
MRC task -- Restore Training Values -- Started.
SAGV section: Restored 8092 bytes
Common section: Restored 1308 bytes
MRC task Restore Training Values -- SUCCEEDED, Status = 0h.
Post Code: DD26h
MRC task -- JEDEC RESET on Fast flow -- Started.
Attempting value = 0xB9B80008 - Pll busy wait - done
Requested/actual ratio 8/8, Frequency=1067, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=1874999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 0: MR12, Opcode=0x4E
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 0 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 1: MR12, Opcode=0x4E
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 0 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 0: MR12, Opcode=0x4A
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 1 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 1: MR12, Opcode=0x4A
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 1 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 0: MR12, Opcode=0x4A
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 2 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 1: MR12, Opcode=0x4A
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 2 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 0: MR12, Opcode=0x51
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 3 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 1: MR12, Opcode=0x51
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 0 ch 3 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 0 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 0: MR12, Opcode=0x4A
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 0 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 1: MR12, Opcode=0x4A
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 0 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 0: MR12, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 1 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 1: MR12, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 1 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 0: MR12, Opcode=0x4E
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 2 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 1: MR12, Opcode=0x4E
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 2 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 0: MR12, Opcode=0x4A
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 3 rank 0: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 1: MR12, Opcode=0x4A
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x70
MrcIssueMrw on mc 1 ch 3 rank 1: MR14, Opcode=0x4A
MrcIssueMrw on mc 1 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 1: MR23, Opcode=0x04
Issue ZQ CAL on all channels / ranks
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0xF0
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0xF0
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task JEDEC RESET on Fast flow -- SUCCEEDED, Status = 0h.
Post Code: DD5Ch
MRC task -- MRC Memory Scrubbing -- Started.
MRC task MRC Memory Scrubbing -- SUCCEEDED, Status = 0h.
Post Code: DD71h
MRC task -- Normal Operation For Fast flow -- Started.
CPGC Mode Unlocked
MRC task Normal Operation For Fast flow -- SUCCEEDED, Status = 0h.
Post Code: DD72h
MRC task -- Configure Thermal values -- Started.
Configuring Thermal Controls
PM_SREF_CONFIG 5060h: 10200h
PM_SREF_CONFIG 15060h: 10200h
DDR_PTM_CTL 5880h: 40h
MRC task Configure Thermal values -- SUCCEEDED, Status = 0h.
Post Code: DD61h
MRC task -- MRC Energy Performance Gain -- Started.
MRC task MRC Energy Performance Gain -- SUCCEEDED, Status = 0h.
Post Code: DD5Ah
MRC task -- MRC SA GV Switch -- Started.
Waiting for SAGV 3 point save acknowledge
MRC task MRC SA GV Switch -- SUCCEEDED, Status = 0h.
Post Code: DD60h
MRC task -- TXT Memory alias check -- Started.
TXTPEI::New Alias Check Begin
TXTPEI::New Alias Check End
MRC task TXT Memory alias check -- SUCCEEDED, Status = 0h.
Post Code: DD5Dh
MRC task -- MRC done -- Started.
MrcSetLockPrmrr: 0xFFE3C511
PRMRR size is zero, only Locking PRMRR MASK MSR
MrcTmeInit: 0xFFE37302
Total Memory Encryption (TME) Initialization
TME supports AES-XTS encryption policy
TME is disabled. Skipping TME activation.
TME: Initialize MSR_TME_ACTIVATE
TmeEnable = 0x0
KeySelect = 0x0
SaveKey = 0x0
TmePolicy = 0x0
MSR_TME_ACTIVATE was initialized and locked: 0000000000000001
SetIaGtImrExclusionLock Enter
SetIaGtImrExclusionLock End
Memory map registers are locked
Waiting for mc_init_done Acknowledge
MRC task MRC done -- SUCCEEDED, Status = 0h.
Lowest StackAddr: 0xFEF19C00 Top StackAddr: 0xFEF3E790 Depth: 150416
Returned From MrcStartMemoryConfiguration(). MrcStatus = 00000000h
Normal mode memory test started.
Normal mode memory test passed.
ME UMA Size requested: 64 MB
Calling MeConfigDidReg
POSTCODE=<0000DE01> - ME-BIOS: DID Entry.
ME status: 0x80000015
Entered ME DRAM Init Done procedure.
ME Data HOB installed
[HECI1] MeMode 0 (Hfsts1: 80000015)
InitStat: 0
Install PPI: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
Notify: PPI Guid: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87, Peim notify entry point: FFE35F70
PchTraceHubDisable() disable Trace Hub device via PSF
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000008, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
POSTCODE=<0000DB50>
PchTraceHubDisable() Power gate Trace Hub device via PMC
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
PchTraceHubDisable() Locking HSWPGCR1
Sending DID as MKHI message
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80140007
00: F0 01 00 00 00 00 00 77 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI1] Got msg Success: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
HeciSend DRAM Init Done successful. Response:
Pci2Priv Base Low = 0x00000000
Pci2Priv Base High = 0x00000000
Flags = 0x00
BIOS Action = 0x04
ME DRAM Init Done ACK received.
HFS read after DID ACK: 80000015
BiosAction = 4
BIOS continues to POST.
POSTCODE=<0000DE21> - ME-BIOS: DID Exit - Success.
CSE IMR Base Low = 0x77000000
CSE IMR Base High = 0x00000000
MeDramInitDone Complete.
BuildMemoryS3DataHob.
MemoryS3DataHob Base : FEF1E3E4
MemoryS3DataHob Size : FAA7
BuildMemoryInfoDataHob.
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
BuildMemoryPlatformDataHob.
Install EFI memory.
2LM TwoLmPreMemConfig is not found
Required memory size = 0x3B0000 bytes
Found 00000000000A0000h bytes at 0000000000000000h
Found 0000000000060000h bytes at 00000000000A0000h
Found 0000000076F00000h bytes at 0000000000100000h
Found 0000000004000000h bytes at 0000000077000000h
Found 0000000000800000h bytes at 000000007B000000h
Found 0000000000800000h bytes at 000000007B800000h
Found 0000000003C00000h bytes at 000000007C000000h
Found 0000000000060000h bytes at 00000000FED20000h
Base memory test started.
PeiInstallPeiMemory MemoryBegin 0x76C50000, MemoryLength 0x3B0000
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 76C50000h, PeiMemoryLength = 3B0000h
FSP_RESERVED_MEMORY_RESOURCE_HOB
FspReservedMemoryResource Base : 76C50000
FspReservedMemoryResource Size : 3B0000
Base memory test started.
Base memory test started.
TSeg base is 7B000000h
TSeg SMRAM size is 800000h
Found 0x0000000780400000 bytes at 0x0000000100000000
Providing I/O space resource from 0x2000 to 0xE000
Providing PCI space from 0x7FC00000 to 0xBFFFFFFF
BuildHobUsageDataHob.
MemoryInit Complete.
Post Code: 0055h
Install PPI: 0FF07255-67C2-456D-9A95-C9162C23868D
Installed gMrcMemoryInitDonePpi
SiInitPreMemOnPolicy() - End
Temp Stack : BaseAddress=0xFEF3EFD0 Length=0x0
Temp Heap : BaseAddress=0xFEF4FF00 Length=0x50000
Total temporary memory: 327680 bytes.
temporary memory stack ever used: 0 bytes.
temporary memory heap used for HobList: 92496 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x0000000B 0xFC800000 - 0xFE7FFFFF
Memory Allocation 0x0000000B 0xFED00000 - 0xFED00FFF
Memory Allocation 0x0000000B 0xFB000000 - 0xFBFFFFFF
Old Stack size 0, New stack size 262144
Stack Hob: BaseAddress=0x76C50000 Length=0x40000
Heap Offset = 0x882BFF00 Stack Offset = 0x882AEFD0
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x00076FED188 EntryPoint=0x00076FED406 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: FFEE289C
Memory Discovered Notify invoked ...
Migrate FSP-M UPD from FEF3F000 to 76FEC000
FspMemoryInitApi() - End
POSTCODE=<0000D87F>
Success
Loader global data @ 0x76C0FD50
Memory Tolum @ 0x7FC00000
Memory Touum @ 0x880400000
Memory Tom @ 0x800000000
Switch to memory stack @ 0x76C4FF00
Stage1 stack: 0x40000 (0x26884 used)
Stage1 heap: 0x10000 (0x4360 used, 0x5274 max used)
Call FspTempRamExit ... POSTCODE=<0000B800>
McBank End Index 0x13
MicrocodeRegionBase : 0xFFC15000
MicrocodeRegionSize : 0x00038000
CodeRegionBase : 0xFFD00000
CodeRegionSize : 0x00300000
Memory Length (Below 4GB) = 7B000000.
Memory Length (Above 4GB) = 780400000.
MTRR programming:
MSR_IA32_MTRR_FIX64K_00000 Msr 250 = 0606060606060606
MSR_IA32_MTRR_FIX16K_80000 Msr 258 = 0606060606060606
MSR_IA32_MTRR_FIX16K_A0000 Msr 259 = 0000000000000000
MSR_IA32_MTRR_FIX4K_C0000 Msr 268 = 0505050505050505
MSR_IA32_MTRR_FIX4K_C8000 Msr 269 = 0505050505050505
MSR_IA32_MTRR_FIX4K_D0000 Msr 26A = 0505050505050505
MSR_IA32_MTRR_FIX4K_D8000 Msr 26B = 0505050505050505
MSR_IA32_MTRR_FIX4K_E0000 Msr 26C = 0505050505050505
MSR_IA32_MTRR_FIX4K_E8000 Msr 26D = 0505050505050505
MSR_IA32_MTRR_FIX4K_F0000 Msr 26E = 0505050505050505
MSR_IA32_MTRR_FIX4K_F8000 Msr 26F = 0505050505050505
MSR_IA32_MTRR_PHYSBASE0 Msr 200 = 00000000FF000005
MSR_IA32_MTRR_PHYSMASK0 Msr 201 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE1 Msr 202 = 0000000000000006
MSR_IA32_MTRR_PHYSMASK1 Msr 203 = 0000007F80000800
MSR_IA32_MTRR_PHYSBASE2 Msr 204 = 000000007B000000
MSR_IA32_MTRR_PHYSMASK2 Msr 205 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE3 Msr 206 = 000000007C000000
MSR_IA32_MTRR_PHYSMASK3 Msr 207 = 0000007FFC000800
MSR_IA32_MTRR_PHYSBASE4 Msr 208 = 0000000100000006
MSR_IA32_MTRR_PHYSMASK4 Msr 209 = 0000007F00000800
MSR_IA32_MTRR_PHYSBASE5 Msr 20A = 0000000200000006
MSR_IA32_MTRR_PHYSMASK5 Msr 20B = 0000007E00000800
MSR_IA32_MTRR_PHYSBASE6 Msr 20C = 0000000400000006
MSR_IA32_MTRR_PHYSMASK6 Msr 20D = 0000007C00000800
MSR_IA32_MTRR_PHYSBASE7 Msr 20E = 0000000800000006
MSR_IA32_MTRR_PHYSMASK7 Msr 20F = 0000007800000800
MSR_IA32_MTRR_PHYSBASE8 Msr 210 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK8 Msr 211 = 0000000000000000
MSR_IA32_MTRR_PHYSBASE9 Msr 212 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK9 Msr 213 = 0000000000000000
TempRamExitApi() - End
POSTCODE=<0000B87F>
Success
Memory FSP @ 0x76C50000
Memory TOP @ 0x76750000
Loading Component FLMP:SG02
HASH verification for usage (0x00000002) with Hash Alg (0x2): Success
Loaded STAGE2 @ 0x76A03000
============= Intel Slim Bootloader STAGE2 =============
PCH gen (0x5), series (0x2), stepping (0x10)
LPC DeviceId (0xA088)
Boot-time Pch Dts: 0x168
GPIO PAD: 0x0902000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0900000B DATA: 0x0150A383 0x00002001
GPIO PAD: 0x0900000C DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0900000D DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000016 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x090B0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0006 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0007 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0011 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0908000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0000 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000E DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0001 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0003 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070006 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070011 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x09070012 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09030000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030001 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030002 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09030003 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020000 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020001 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020002 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020003 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020004 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020005 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020006 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000A DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000E DATA: 0x03302385 0x00002001
GPIO PAD: 0x09020010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020012 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020013 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000009 DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000A DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000E DATA: 0x0350A285 0x00002001
GPIO PAD: 0x0900000F DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000010 DATA: 0x0550A281 0x00002019
GPIO PAD: 0x09000011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000012 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09000013 DATA: 0x033002E1 0x00002001
GPIO PAD: 0x09000014 DATA: 0x033022E1 0x00002001
GPIO PAD: 0x09000015 DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000017 DATA: 0x0350A287 0x00002001
GPIO PAD: 0x090B0002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0005 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0008 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B0009 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000A DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000B DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0013 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0016 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0017 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09080000 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080001 DATA: 0x0550A381 0x00002019
GPIO PAD: 0x09080002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080003 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080009 DATA: 0x03302385 0x0000201F
GPIO PAD: 0x0908000A DATA: 0x03302285 0x0000201F
GPIO PAD: 0x0908000B DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x0908000C DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09080010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080011 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x09080012 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090E0001 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0002 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0006 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090E0007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0009 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000A DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000B DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000C DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000D DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000F DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0010 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x090E0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0012 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0013 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0014 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0015 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0016 DATA: 0x0350A385 0x00002009
GPIO PAD: 0x090E0017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x090C0007 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C000A DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0013 DATA: 0x03306581 0x00002001
GPIO PAD: 0x090C0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070000 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070001 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070005 DATA: 0x0550A583 0x00002001
GPIO PAD: 0x0907000A DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09060000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060004 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060006 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060007 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09050000 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050001 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050002 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050003 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050004 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050005 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050006 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050007 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050008 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x09050009 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x0905000A DATA: 0x0150A283 0x00002001
GPIO PAD: 0x0905000B DATA: 0x0150A283 0x00002001
Variable region: 0xFF60E000:0x2000
SaveNvsData Length=0xFAA8
Matched with saved NVS data
Save MRC Training Data (0x76C96120 0x00FAA8) ... Already started
Silicon Init
PchLp is detected
BIOS SPI region will be protected
IAS SPI region will be protected
Load Silicon Cfg Data
Call FspSiliconInit ...
POSTCODE=<00009800>
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFDF8A7B
The 1th FV start address is 0x00076B78000, size is 0x0008B000, handle is 0x76B78000
Memory Discovered Notify completed ...
DiscoverPeimsAndOrderWithApriori(): Found 0xC PEI FFS files in the 1th FV
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x00076FE7198 EntryPoint=0x00076FE74A6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
Loading PEIM 299D6F8B-2EC9-4E40-9EC6-DDAA7EBF5FD9
Loading PEIM at 0x00076F01000 EntryPoint=0x00076F014D4 SiInitFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
Register PPI Notify: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Install PPI: F69ABF86-4048-44EF-A8EF-6C7F204AC8DA
Loading PEIM 131B73AC-C033-4DE1-8794-6DAB08E731CF
Loading PEIM at 0x00076EC7000 EntryPoint=0x00076EC7659 FspInit.efi
Dumping FSPS_UPD - Size: 0x00000EE0
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x53 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000030: 0x1C 0xB9 0xA5 0x76 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000050: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01
0x00000060: 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000070: 0x50 0x66 0xA2 0x76 0x34 0x0B 0x0A 0x0B 0x0B 0x0B 0x0B 0x0B 0x0B 0x0E 0x09 0x09
0x00000080: 0x00 0x06 0x00 0x00 0x50 0x20 0xA0 0x76 0x00 0x01 0x00 0x00 0x01 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000000A0: 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000000B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000000C0: 0x00 0x00 0x00 0x04 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xC2 0x01 0x00
0x000000D0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00
0x000000E0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x08
0x000000F0: 0x08 0x08 0x08 0x08 0x08 0x08 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x02 0x02 0x02
0x00000100: 0x02 0x02 0x02 0x02 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00 0x01 0x01
0x00000110: 0x00 0x00 0x00 0x00 0x0A 0x22 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000120: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x0B 0x32 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x02 0x0B 0x19
0x00000150: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x12 0x0B 0x19 0x00 0x00 0x00 0x00
0x00000170: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00
0x00000190: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000260: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x00 0x00 0x00 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06
0x000002A0: 0x06 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03
0x000002C0: 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000300: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000310: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000320: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x03
0x00000330: 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x03
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000360: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000370: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000380: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000390: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000003A0: 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x000003B0: 0xA4 0x01 0x64 0x00 0x00 0x00 0xA4 0x01 0xC8 0x00 0xA4 0x01 0xC8 0x0C 0x36 0x2B
0x000003C0: 0x96 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003D0: 0x00 0x00 0x00 0x00 0x01 0x01 0xF4 0x01 0xF4 0x01 0xF4 0x01 0x01 0x00 0x00 0x00
0x000003E0: 0x00 0x00 0x00 0xF8 0xFF 0xFF 0xFF 0xF9 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x000003F0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000400: 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000410: 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000420: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000430: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000440: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000450: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00
0x00000460: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000470: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000480: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x01
0x00000490: 0xFF 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x03 0xFF 0xFF 0xFF 0xFF 0x01 0x01 0x00 0x0A
0x000004C0: 0x00 0x32 0x0A 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004D0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x0F 0x01 0x01 0x01 0x01 0xF4 0x01 0x88 0x13
0x000004E0: 0x01 0x00 0xFF 0x97 0xFF 0x97 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x000004F0: 0x01 0x01 0x01 0x02 0x02 0x02 0x02 0x00 0xC8 0x00 0xC8 0x00 0x3C 0x00 0xC8 0x00
0x00000500: 0x01 0x01 0x01 0x01 0x02 0x02 0x02 0x02 0xC8 0x00 0xC8 0x00 0xC8 0x00 0xC8 0x00
0x00000510: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000520: 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000530: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00
0x00000540: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000550: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000560: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000570: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x50 0x00 0x50 0x00 0x50 0x00 0x50 0x00
0x00000580: 0x50 0x00 0x14 0x00 0x14 0x00 0x14 0x00 0x14 0x00 0x14 0x00 0x04 0x00 0x04 0x00
0x00000590: 0x04 0x00 0x04 0x00 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00
0x000005B0: 0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005C0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005F0: 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0F 0x16 0xFF 0x1F
0x00000600: 0x00 0x00 0x00 0x00 0x00 0x00 0x30 0x15 0x50 0x16 0x00 0x00 0x00 0x00 0x00 0x00
0x00000610: 0x00 0x02 0x00 0x00 0x00 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000620: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00
0x00000630: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000640: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000650: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00
0x00000660: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000670: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000680: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000690: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000700: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000710: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000720: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000730: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000740: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000750: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000760: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x08 0x00
0x00000770: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000780: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x02 0x03
0x00000790: 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13
0x000007A0: 0x14 0x15 0x16 0x17 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04
0x000007D0: 0x04 0x04 0x04 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x02
0x000007E0: 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x01 0x01 0x01 0x01
0x000007F0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000800: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000810: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000820: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000830: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000840: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x00 0x01
0x00000850: 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x03 0x01 0x04 0x04 0x00 0x00 0x01 0x00 0x00
0x00000860: 0x00 0x01 0x01 0x00 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000870: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000880: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000890: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x000008C0: 0x01 0x00 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x64 0x64 0x64 0x00
0x000008D0: 0x00 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008E0: 0x00 0x00 0x00 0x01 0x01 0x00 0x01 0x03 0x02 0x01 0x00 0x01 0x02 0x03 0x00 0x01
0x000008F0: 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000900: 0x73 0x00 0x00 0xFF 0xFF 0x00 0x00 0x03 0x03 0x00 0x03 0x03 0x05 0x05 0x06 0x06
0x00000910: 0x07 0x07 0x00 0x00 0xFF 0xFF 0x02 0x02 0x03 0x03 0x04 0x04 0x00 0x00 0x00 0x00
0x00000920: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000930: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000940: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000950: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0xFF 0x00 0x00 0x00 0x00
0x00000960: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
0x00000970: 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x27 0x8F 0xA4 0x5F 0x8D 0xFD 0x3D 0x55
0x00000980: 0xC1 0xFD 0x4B 0xBE 0xB9 0x67 0x67 0xD7 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000990: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000009A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x04 0x01 0x01 0x01 0x00 0x06
0x000009B0: 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06
0x000009C0: 0x06 0x06 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02
0x000009D0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x000009E0: 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000009F0: 0x04 0x07 0x09 0x00 0x01 0x05 0x08 0x00 0x00 0x00 0x04 0x07 0x09 0x00 0x01 0x05
0x00000A00: 0x08 0x00 0x00 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A10: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A20: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A30: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A40: 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07
0x00000A50: 0x07 0x07 0x07 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000A60: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000A70: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x01 0x01 0x01 0x00 0x01
0x00000A80: 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000A90: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000AA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000AB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000AC0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000AD0: 0x01 0x01 0x01 0x01 0x00 0x01 0x02 0x03 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000AE0: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00
0x00000AF0: 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000B00: 0x00 0x00 0x00 0x00 0x00 0x00 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C
0x00000B10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C
0x00000B20: 0x4C 0x4C 0x4C 0x4C 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x4C 0x4C
0x00000B30: 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000B40: 0x00 0x00 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x4C 0x00 0x02 0x01 0x01
0x00000B50: 0x00 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000B60: 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x01 0x00 0x00 0x00 0x00
0x00000B70: 0x00 0x0A 0x01 0x00 0x00 0x00 0x14 0x00 0x00 0x14 0x00 0x00 0x14 0x00 0x00 0x00
0x00000B80: 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x02 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01
0x00000B90: 0x01 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x08 0x02 0x02 0x02
0x00000BA0: 0x02 0x02 0x02 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BD0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BE0: 0xAC 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000BF0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C00: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C20: 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x01
0x00000C30: 0x00 0x01 0x01 0x00 0x1E 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C50: 0x00 0x00 0x00 0x00 0x02 0x00 0x01 0x01 0x00 0x00 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C60: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C70: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000C80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x10 0x03 0x10 0x03 0x10
0x00000C90: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000CA0: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000CB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CC0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CD0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CE0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000CF0: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D00: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D10: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D20: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D30: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D40: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D50: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D60: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D70: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D90: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0xFF 0x00 0x00 0x03 0x10 0x0F 0x10 0x0F 0x10
0x00000DD0: 0x0F 0x10 0x03 0x10 0x0F 0x10 0x0F 0x10 0x0F 0x10 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DE0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DF0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000E00: 0x07 0x07 0x08 0x08 0x08 0x08 0x09 0x09 0x09 0x09 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E20: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E30: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E50: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E60: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E70: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E80: 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000E90: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0xA0 0x00 0x00 0x00 0xA2 0x00 0x00 0x00 0xA4
0x00000EA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EB0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000ED0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Updating UPDs consumed in FspSiliconInitApi...
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x504
TotalBlockSize after adding Block[0x2]= 0x530
TotalBlockSize after adding Block[0x3]= 0x55C
TotalBlockSize after adding Block[0x4]= 0x588
TotalBlockSize after adding Block[0x5]= 0x5CC
TotalBlockSize after adding Block[0x6]= 0x5EC
TotalBlockSize after adding Block[0x7]= 0x610
TotalBlockSize after adding Block[0x8]= 0x638
TotalBlockSize after adding Block[0x9]= 0x678
TotalBlockSize after adding Block[0x0]= 0x24
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x0]= 0x1C
TotalBlockSize after adding Block[0x0]= 0x30
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xCC
TotalBlockSize after adding Block[0x3]= 0x144
TotalBlockSize after adding Block[0x4]= 0x16C
TotalBlockSize after adding Block[0x5]= 0x19C
TotalBlockSize after adding Block[0x6]= 0x220
TotalBlockSize after adding Block[0x7]= 0x274
TotalBlockSize after adding Block[0x0]= 0x38
TotalBlockSize after adding Block[0x0]= 0x224
TotalBlockSize after adding Block[0x1]= 0x248
TotalBlockSize after adding Block[0x0]= 0x4C
TotalBlockSize after adding Block[0x0]= 0x98
TotalBlockSize after adding Block[0x1]= 0xF4
TotalBlockSize after adding Block[0x2]= 0x1D8
TotalBlockSize = 0x1998
gSiConfigGuid = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Header.HobLength = 0x34
PCH AddConfigBlocks
PchGeneralConfig->Header.GuidHob.Name = 6ED94C8C-25F7-4686-B246-CA4DE2954B5D
PchGeneralConfig->Header.GuidHob.Header.HobLength = 0x20
PchPcieConfig->Header.GuidHob.Name = 0A53B507-988B-475C-BF76-33DE106D9484
PchPcieConfig->Header.GuidHob.Header.HobLength = 0x4E4
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
FlashProtectionConfig->Header.GuidHob.Name = D0F71512-9E32-4CC9-A5A3-AD679A0667B8
FlashProtectionConfig->Header.GuidHob.Header.HobLength = 0x44
LockDownConfig->Header.GuidHob.Name = 8A838E0A-A639-46F0-A9CE-70C485FBA80D
LockDownConfig->Header.GuidHob.Header.HobLength = 0x20
HsioConfig->Header.GuidHob.Name = E53EBEE7-103D-4A71-9B6A-74EE5F4C8DF5
HsioConfig->Header.GuidHob.Header.HobLength = 0x24
AdrConfig->Header.GuidHob.Name = 5B36A07C-3BBF-4D53-8A2D-E1CF97390C65
AdrConfig->Header.GuidHob.Header.HobLength = 0x28
FivrConfig->Header.GuidHob.Name = 68EE8BD4-05F2-4656-AEE4-AD10C722C34F
FivrConfig->Header.GuidHob.Header.HobLength = 0x40
AMT AddConfigBlocks
ME AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x1
MiscPeiConfig->Header.GuidHob.Name = 01DEF8E6-E998-4E27-8998-9CFAB292BC50
MiscPeiConfig->Header.GuidHob.Header.HobLength = 0x1C
CPU Post-Mem Entry
POSTCODE=<00009C00>
CpuConfig->Header.GuidHob.Name = 48C3AAC9-D66C-42E4-9B1D-39045F465341
CpuConfig->Header.GuidHob.Header.HobLength = 0x30
BiosGuardConfig->Header.GuidHob.Name = 762F9DDB-1C89-4612-846B-EEDC8F622545
BiosGuardConfig->Header.GuidHob.Header.HobLength = 0x58
CpuPowerMgmtBasicConfig->Header.GuidHob.Name = A021E31D-7C14-47DA-B5EC-CABB4D76EDC8
CpuPowerMgmtBasicConfig->Header.GuidHob.Header.HobLength = 0x44
CpuPowerMgmtCustomConfig->Header.GuidHob.Name = 562FA1C8-55EE-4E2F-91CA-8D8450032F0E
CpuPowerMgmtCustomConfig->Header.GuidHob.Header.HobLength = 0x78
CpuPowerMgmtPsysConfig->Header.GuidHob.Name = 04E7F850-19B5-47BA-9D28-B1E75E1F4853
CpuPowerMgmtPsysConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTestConfig->Header.GuidHob.Name = D4DBA957-0D9C-4AF2-9D40-35A844E493AD
CpuTestConfig->Header.GuidHob.Header.HobLength = 0x30
CpuPidTestConfig->Header.GuidHob.Name = 2511095F-D49E-4537-A660-887131D153DA
CpuPidTestConfig->Header.GuidHob.Header.HobLength = 0x84
CpuPowerMgmtTestConfig->Header.GuidHob.Name = 5161ED3D-90BF-436F-B833-D71789B348C1
CpuPowerMgmtTestConfig->Header.GuidHob.Header.HobLength = 0x54
FuSA supported sku detected
CpuAddConfigBlocks Done
POSTCODE=<00009C09>
TBT AddConfigBlocks. TotalBlockCount = 0x1
ITbtPeiConfig->Header.GuidHob.Name = D7E7E1E6-CBEC-4F5F-AED3-FDC0A8B07E25
ITbtPeiConfig->Header.GuidHob.Header.HobLength = 0x38
RtcConfig->Header.GuidHob.Name = 0E9259B8-3DDE-40C7-AA5F-94829A868FAF
RtcConfig->Header.GuidHob.Header.HobLength = 0x20
ThermalConfig->Header.GuidHob.Name = 4416506D-1197-4722-A5B4-4611F9239EAE
ThermalConfig->Header.GuidHob.Header.HobLength = 0x40
CnviConfig->Header.GuidHob.Name = E53EBEF7-103D-4A70-9B6A-73EE5F4C8DF5
CnviConfig->Header.GuidHob.Header.HobLength = 0x28
EspiConfig->Header.GuidHob.Name = 60FBF3B8-96D4-4187-849E-AAF75C4BE1E3
EspiConfig->Header.GuidHob.Header.HobLength = 0x20
GbeConfig->Header.GuidHob.Name = 4B2DE99E-7517-4D04-8C02-F11A592B142F
GbeConfig->Header.GuidHob.Header.HobLength = 0x20
TsnConfig->Header.GuidHob.Name = 9E9A93CB-0F4E-4E56-902D-6C76DE90F771
TsnConfig->Header.GuidHob.Header.HobLength = 0x30
HdaConfig->Header.GuidHob.Name = 7EB3CE7E-82E0-4CD7-BDE5-B2BF4E91C34C
HdaConfig->Header.GuidHob.Header.HobLength = 0x28
IehConfig->Header.GuidHob.Name = 42C4D7F3-981D-4475-A2AE-ADCDD5CE871E
IehConfig->Header.GuidHob.Header.HobLength = 0x20
IshConfig->Header.GuidHob.Name = 433AE2AA-C5A6-46ED-9419-1E5DB81C5740
IshConfig->Header.GuidHob.Header.HobLength = 0x128
InterruptConfig->Header.GuidHob.Name = 09A2B815-BE29-45EF-BFBF-58EAAC5E2978
InterruptConfig->Header.GuidHob.Header.HobLength = 0x224
IoApicConfig->Header.GuidHob.Name = 2873D0F1-00F6-40AB-AC36-9A68BA873E6C
IoApicConfig->Header.GuidHob.Header.HobLength = 0x24
P2sbConfig->Header.GuidHob.Name = 2474DCB8-4BB4-49DA-8783-7CD3D385FF07
P2sbConfig->Header.GuidHob.Header.HobLength = 0x20
PchDmiConfig->Header.GuidHob.Name = B3A61210-1CD3-4797-8EE6-D3429C4F17BD
PchDmiConfig->Header.GuidHob.Header.HobLength = 0x20
PmConfig->Header.GuidHob.Name = 93826157-DC85-4E34-AED9-6EA10DF9E3A7
PmConfig->Header.GuidHob.Header.HobLength = 0x44
SataConfig->Header.GuidHob.Name = F5F87B4F-CC3C-408D-89E3-61C59C5407C4
SataConfig->Header.GuidHob.Header.HobLength = 0x4C
UsbConfig->Header.GuidHob.Name = B2DA9CCD-6A8C-4BB6-B3E6-CDFBB7668BDE
UsbConfig->Header.GuidHob.Header.HobLength = 0x98
Usb2PhyConfig->Header.GuidHob.Name = 576C1134-2E0C-CB7D-CD3F-AC682DAED3F2
Usb2PhyConfig->Header.GuidHob.Header.HobLength = 0x5C
Usb3HsioConfig->Header.GuidHob.Name = F8AFC238-F176-12CE-BEF4-69F9B1AC40D5
Usb3HsioConfig->Header.GuidHob.Header.HobLength = 0xE4
ThcConfig->Header.GuidHob.Name = 1B318AD1-AA0D-4764-99FD-BB2BF47F7ED6
ThcConfig->Header.GuidHob.Header.HobLength = 0x2C
PsfConfig->Header.GuidHob.Name = 49B12CF6-0A56-4B9F-A84C-F57D21238C77
PsfConfig->Header.GuidHob.Header.HobLength = 0x20
FusaConfig->Header.GuidHob.Name = F9225896-A9C8-4543-BA9E-5332D7BF8C2B
FusaConfig->Header.GuidHob.Header.HobLength = 0x20
GtConfig->Header.GuidHob.Name = 04249AC0-0088-439F-A74E-A7042A062F5D
GtConfig->Header.GuidHob.Header.HobLength = 0x48
TcssConfig->Header.GuidHob.Name = FB631590-79C9-4F0D-A996-EEE29866FAFD
TcssConfig->Header.GuidHob.Header.HobLength = 0x178
GnaConfig->Header.GuidHob.Name = 53E0EF18-B8A8-4795-A66D-E4772CC3AE82
GnaConfig->Header.GuidHob.Header.HobLength = 0x20
VmdConfig->Header.GuidHob.Name = 79B52C74-B9BA-4F36-A240-F2410D20848A
VmdConfig->Header.GuidHob.Header.HobLength = 0xB8
CpuPcieRpConfig->Header.GuidHob.Name = 9749A5FB-9130-44F0-8F61-DBFF8EF2CAC7
CpuPcieRpConfig->Header.GuidHob.Header.HobLength = 0x260
TelemetryConfig->Header.GuidHob.Name = 8EBF9FEE-7496-42B4-A6F6-CF2B339930D6
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
SerialIoConfig->Header.GuidHob.Name = 6CC06EBF-0D34-4340-BC16-DA09E5783ADB
SerialIoConfig->Header.GuidHob.Header.HobLength = 0x17C
CpuPowerMgmtVrConfig->Header.GuidHob.Name = 254766C9-929D-4EAC-9EEC-DFA20244B5EA
CpuPowerMgmtVrConfig->Header.GuidHob.Header.HobLength = 0xDC
HybridStorage AddConfigBlocks
HybridStorageConfig->Header.GuidHob.Name = 265CE069-D8CF-48BE-AE12-024C2512FAF8
HybridStorageConfig->Header.GuidHob.Header.HobLength = 0x20
HostBridgePeiConfig->Header.GuidHob.Name = 3B6D998E-8B6E-4F53-BE41-074195538AAF
HostBridgePeiConfig->Header.GuidHob.Header.HobLength = 0x20
TccConfig->Header.GuidHob.Name = AE3E7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x44
SpiConfig->Header.GuidHob.Name = 150360EF-99BE-4E43-94BB-BD4026CA3457
SpiConfig->Header.GuidHob.Header.HobLength = 0x28
Install PPI: AEBFFA01-7EDC-49FF-8D88-CB848C5E8670
FSP UpdatePeiPchPolicy
Searching for microcode updates in region passed in TempRamInit API MicrocodeRegionBase = 0xFFC15000, MicrocodeRegionSize = 0x38000.
Microcode update found at 0xFFC15000
FuSA supported sku detected
FSP UpdatePeiMePolicy
FSP UpdatePeiSaPolicy
GtConfig->GraphicsConfigPtr from FSP UpdatePeiSaPolicy: 0x76A5B91C
GtConfig->LogoPtr: 0x0
GtConfig->LogoSize: 0x0
GtConfig->LogoPixelHeight: 0x0
GtConfig->LogoPixelWidth: 0x0
FSP UpdatePeiAmtPolicy
FSP FspUpdatePeiTbtPolicy
MaxLogicProcessors = 8
Install PPI: 1A266768-FD43-4E18-A88A-35C794C3910E
Register PPI Notify: EE16160A-E8BE-47A6-820A-C6900DB0250A
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Mono Status Code PEIM Loaded
SI PEI Policy Initialization Done in Post-Memory
PROGRESS CODE: V03020003 I0
Loading PEIM EDADEB9D-DDBA-48BD-9D22-C1C169C8C5C6
Loading PEIM at 0x00076EA5000 EntryPoint=0x00076EA5D26 CpuMpPei.efi
PROGRESS CODE: V03020002 I0
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: 76EA61CC
AP Loop Mode is 2
WakeupBufferStart = 9F000, WakeupBufferSize = 0
CpuMpPei: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
ShadowMicrocodePatchByPcd: 0x1 microcode patches will be loaded into memory, with size 0x1B400.
ShadowMicrocodePatchWorker: Required microcode patches have been loaded at 0x76E48000, with size 0x1B400.
Register PPI Notify: 8F9D4825-797D-48FC-8471-845025792EF6
Does not find any stored CPU BIST information from PPI!
APICID - 0x00000000, BIST - 0x00000000
APICID - 0x00000001, BIST - 0x00000000
APICID - 0x00000002, BIST - 0x00000000
APICID - 0x00000003, BIST - 0x00000000
APICID - 0x00000004, BIST - 0x00000000
APICID - 0x00000005, BIST - 0x00000000
APICID - 0x00000006, BIST - 0x00000000
APICID - 0x00000007, BIST - 0x00000000
Install PPI: 9E9F374B-8F16-4230-9824-5846EE766A97
Install PPI: 5CB9CB3D-31A4-480C-9498-29D269BACFBA
Install PPI: EE16160A-E8BE-47A6-820A-C6900DB0250A
PROGRESS CODE: V03020003 I0
Notify: PPI Guid: EE16160A-E8BE-47A6-820A-C6900DB0250A, Peim notify entry point: 76EC7963
Dump Silicon Policy updated by Platform...
------------------------ Silicon Print Policy Start ------------------------
CsmFlag= 0
SkipSsidProgramming= 0
CustomizedSvid= 0
CustomizedSsid= 0
SsidTablePtr= 0
NumberOfSsidTableEntry= 0
TraceHubMemBase = 0x00000000
SkipBiosDoneWhenFwUpdate= 0
------------------------ Silicon Print Policy End --------------------------
------------------------ PCH Print Policy Start ------------------------
Revision= 1
------------------ PCH General Config ------------------
Crid= 0
LegacyIoLowLatency = 0
------------------ PCH PCIE Config ------------------
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ClkReqDetect= 1
RootPort[0] MrlSensorPresent = 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] PcieSpeed= 0
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 0
RootPort[0] L1Substates= 0
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] SlotPowerLimitScale= 0
RootPort[0] SlotPowerLimitValue= 0
RootPort[0] EnableCpm= 1
RootPort[0] FormFactor = 0
RootPort[1] HotPlug= 0
RootPort[1] PmSci= 1
RootPort[1] ClkReqDetect= 1
RootPort[1] MrlSensorPresent = 0
RootPort[1] UnsupportedRequestReport= 0
RootPort[1] FatalErrorReport= 0
RootPort[1] NoFatalErrorReport= 0
RootPort[1] CorrectableErrorReport= 0
RootPort[1] SystemErrorOnFatalError= 0
RootPort[1] SystemErrorOnNonFatalError= 0
RootPort[1] SystemErrorOnCorrectableError= 0
RootPort[1] MaxPayload= 1
RootPort[1] SlotImplemented= 1
RootPort[1] AcsEnabled= 1
RootPort[1] PtmEnabled= 1
RootPort[1] AdvancedErrorReporting= 1
RootPort[1] TransmitterHalfSwing= 0
RootPort[1] PcieSpeed= 0
RootPort[1] PhysicalSlotNumber= 1
RootPort[1] CompletionTimeout= 0
RootPort[1] Aspm= 0
RootPort[1] L1Substates= 0
RootPort[1] LtrEnable= 1
RootPort[1] LtrConfigLock= 0
RootPort[1] LtrMaxSnoopLatency= 1003
RootPort[1] LtrMaxNoSnoopLatency= 1003
RootPort[1] SnoopLatencyOverrideMode= 2
RootPort[1] SnoopLatencyOverrideMultiplier= 2
RootPort[1] SnoopLatencyOverrideValue= 3C
RootPort[1] NonSnoopLatencyOverrideMode= 2
RootPort[1] NonSnoopLatencyOverrideMultiplier= 2
RootPort[1] NonSnoopLatencyOverrideValue= 3C
RootPort[1] ForceLtrOverride= 0
RootPort[1] DetectTimeoutMs= 0
RootPort[1] SlotPowerLimitScale= 0
RootPort[1] SlotPowerLimitValue= 0
RootPort[1] EnableCpm= 1
RootPort[1] FormFactor = 0
RootPort[2] HotPlug= 0
RootPort[2] PmSci= 1
RootPort[2] ClkReqDetect= 1
RootPort[2] MrlSensorPresent = 0
RootPort[2] UnsupportedRequestReport= 0
RootPort[2] FatalErrorReport= 0
RootPort[2] NoFatalErrorReport= 0
RootPort[2] CorrectableErrorReport= 0
RootPort[2] SystemErrorOnFatalError= 0
RootPort[2] SystemErrorOnNonFatalError= 0
RootPort[2] SystemErrorOnCorrectableError= 0
RootPort[2] MaxPayload= 1
RootPort[2] SlotImplemented= 1
RootPort[2] AcsEnabled= 1
RootPort[2] PtmEnabled= 1
RootPort[2] AdvancedErrorReporting= 1
RootPort[2] TransmitterHalfSwing= 0
RootPort[2] PcieSpeed= 0
RootPort[2] PhysicalSlotNumber= 2
RootPort[2] CompletionTimeout= 0
RootPort[2] Aspm= 0
RootPort[2] L1Substates= 0
RootPort[2] LtrEnable= 1
RootPort[2] LtrConfigLock= 0
RootPort[2] LtrMaxSnoopLatency= 1003
RootPort[2] LtrMaxNoSnoopLatency= 1003
RootPort[2] SnoopLatencyOverrideMode= 2
RootPort[2] SnoopLatencyOverrideMultiplier= 2
RootPort[2] SnoopLatencyOverrideValue= 3C
RootPort[2] NonSnoopLatencyOverrideMode= 2
RootPort[2] NonSnoopLatencyOverrideMultiplier= 2
RootPort[2] NonSnoopLatencyOverrideValue= 3C
RootPort[2] ForceLtrOverride= 0
RootPort[2] DetectTimeoutMs= 0
RootPort[2] SlotPowerLimitScale= 0
RootPort[2] SlotPowerLimitValue= 0
RootPort[2] EnableCpm= 1
RootPort[2] FormFactor = 0
RootPort[3] HotPlug= 0
RootPort[3] PmSci= 1
RootPort[3] ClkReqDetect= 1
RootPort[3] MrlSensorPresent = 0
RootPort[3] UnsupportedRequestReport= 0
RootPort[3] FatalErrorReport= 0
RootPort[3] NoFatalErrorReport= 0
RootPort[3] CorrectableErrorReport= 0
RootPort[3] SystemErrorOnFatalError= 0
RootPort[3] SystemErrorOnNonFatalError= 0
RootPort[3] SystemErrorOnCorrectableError= 0
RootPort[3] MaxPayload= 1
RootPort[3] SlotImplemented= 1
RootPort[3] AcsEnabled= 1
RootPort[3] PtmEnabled= 1
RootPort[3] AdvancedErrorReporting= 1
RootPort[3] TransmitterHalfSwing= 0
RootPort[3] PcieSpeed= 0
RootPort[3] PhysicalSlotNumber= 3
RootPort[3] CompletionTimeout= 0
RootPort[3] Aspm= 0
RootPort[3] L1Substates= 0
RootPort[3] LtrEnable= 1
RootPort[3] LtrConfigLock= 0
RootPort[3] LtrMaxSnoopLatency= 1003
RootPort[3] LtrMaxNoSnoopLatency= 1003
RootPort[3] SnoopLatencyOverrideMode= 2
RootPort[3] SnoopLatencyOverrideMultiplier= 2
RootPort[3] SnoopLatencyOverrideValue= 3C
RootPort[3] NonSnoopLatencyOverrideMode= 2
RootPort[3] NonSnoopLatencyOverrideMultiplier= 2
RootPort[3] NonSnoopLatencyOverrideValue= 3C
RootPort[3] ForceLtrOverride= 0
RootPort[3] DetectTimeoutMs= 0
RootPort[3] SlotPowerLimitScale= 0
RootPort[3] SlotPowerLimitValue= 0
RootPort[3] EnableCpm= 1
RootPort[3] FormFactor = 0
RootPort[4] HotPlug= 0
RootPort[4] PmSci= 1
RootPort[4] ClkReqDetect= 1
RootPort[4] MrlSensorPresent = 0
RootPort[4] UnsupportedRequestReport= 0
RootPort[4] FatalErrorReport= 0
RootPort[4] NoFatalErrorReport= 0
RootPort[4] CorrectableErrorReport= 0
RootPort[4] SystemErrorOnFatalError= 0
RootPort[4] SystemErrorOnNonFatalError= 0
RootPort[4] SystemErrorOnCorrectableError= 0
RootPort[4] MaxPayload= 1
RootPort[4] SlotImplemented= 1
RootPort[4] AcsEnabled= 1
RootPort[4] PtmEnabled= 1
RootPort[4] AdvancedErrorReporting= 1
RootPort[4] TransmitterHalfSwing= 0
RootPort[4] PcieSpeed= 0
RootPort[4] PhysicalSlotNumber= 4
RootPort[4] CompletionTimeout= 0
RootPort[4] Aspm= 0
RootPort[4] L1Substates= 0
RootPort[4] LtrEnable= 1
RootPort[4] LtrConfigLock= 0
RootPort[4] LtrMaxSnoopLatency= 1003
RootPort[4] LtrMaxNoSnoopLatency= 1003
RootPort[4] SnoopLatencyOverrideMode= 2
RootPort[4] SnoopLatencyOverrideMultiplier= 2
RootPort[4] SnoopLatencyOverrideValue= 3C
RootPort[4] NonSnoopLatencyOverrideMode= 2
RootPort[4] NonSnoopLatencyOverrideMultiplier= 2
RootPort[4] NonSnoopLatencyOverrideValue= 3C
RootPort[4] ForceLtrOverride= 0
RootPort[4] DetectTimeoutMs= 0
RootPort[4] SlotPowerLimitScale= 0
RootPort[4] SlotPowerLimitValue= 0
RootPort[4] EnableCpm= 1
RootPort[4] FormFactor = 0
RootPort[5] HotPlug= 0
RootPort[5] PmSci= 1
RootPort[5] ClkReqDetect= 1
RootPort[5] MrlSensorPresent = 0
RootPort[5] UnsupportedRequestReport= 0
RootPort[5] FatalErrorReport= 0
RootPort[5] NoFatalErrorReport= 0
RootPort[5] CorrectableErrorReport= 0
RootPort[5] SystemErrorOnFatalError= 0
RootPort[5] SystemErrorOnNonFatalError= 0
RootPort[5] SystemErrorOnCorrectableError= 0
RootPort[5] MaxPayload= 1
RootPort[5] SlotImplemented= 1
RootPort[5] AcsEnabled= 1
RootPort[5] PtmEnabled= 1
RootPort[5] AdvancedErrorReporting= 1
RootPort[5] TransmitterHalfSwing= 0
RootPort[5] PcieSpeed= 0
RootPort[5] PhysicalSlotNumber= 5
RootPort[5] CompletionTimeout= 0
RootPort[5] Aspm= 0
RootPort[5] L1Substates= 0
RootPort[5] LtrEnable= 1
RootPort[5] LtrConfigLock= 0
RootPort[5] LtrMaxSnoopLatency= 1003
RootPort[5] LtrMaxNoSnoopLatency= 1003
RootPort[5] SnoopLatencyOverrideMode= 2
RootPort[5] SnoopLatencyOverrideMultiplier= 2
RootPort[5] SnoopLatencyOverrideValue= 3C
RootPort[5] NonSnoopLatencyOverrideMode= 2
RootPort[5] NonSnoopLatencyOverrideMultiplier= 2
RootPort[5] NonSnoopLatencyOverrideValue= 3C
RootPort[5] ForceLtrOverride= 0
RootPort[5] DetectTimeoutMs= 0
RootPort[5] SlotPowerLimitScale= 0
RootPort[5] SlotPowerLimitValue= 0
RootPort[5] EnableCpm= 1
RootPort[5] FormFactor = 0
RootPort[6] HotPlug= 0
RootPort[6] PmSci= 1
RootPort[6] ClkReqDetect= 1
RootPort[6] MrlSensorPresent = 0
RootPort[6] UnsupportedRequestReport= 0
RootPort[6] FatalErrorReport= 0
RootPort[6] NoFatalErrorReport= 0
RootPort[6] CorrectableErrorReport= 0
RootPort[6] SystemErrorOnFatalError= 0
RootPort[6] SystemErrorOnNonFatalError= 0
RootPort[6] SystemErrorOnCorrectableError= 0
RootPort[6] MaxPayload= 1
RootPort[6] SlotImplemented= 1
RootPort[6] AcsEnabled= 1
RootPort[6] PtmEnabled= 1
RootPort[6] AdvancedErrorReporting= 1
RootPort[6] TransmitterHalfSwing= 0
RootPort[6] PcieSpeed= 0
RootPort[6] PhysicalSlotNumber= 6
RootPort[6] CompletionTimeout= 0
RootPort[6] Aspm= 0
RootPort[6] L1Substates= 0
RootPort[6] LtrEnable= 1
RootPort[6] LtrConfigLock= 0
RootPort[6] LtrMaxSnoopLatency= 1003
RootPort[6] LtrMaxNoSnoopLatency= 1003
RootPort[6] SnoopLatencyOverrideMode= 2
RootPort[6] SnoopLatencyOverrideMultiplier= 2
RootPort[6] SnoopLatencyOverrideValue= 3C
RootPort[6] NonSnoopLatencyOverrideMode= 2
RootPort[6] NonSnoopLatencyOverrideMultiplier= 2
RootPort[6] NonSnoopLatencyOverrideValue= 3C
RootPort[6] ForceLtrOverride= 0
RootPort[6] DetectTimeoutMs= 0
RootPort[6] SlotPowerLimitScale= 0
RootPort[6] SlotPowerLimitValue= 0
RootPort[6] EnableCpm= 1
RootPort[6] FormFactor = 0
RootPort[7] HotPlug= 0
RootPort[7] PmSci= 1
RootPort[7] ClkReqDetect= 1
RootPort[7] MrlSensorPresent = 0
RootPort[7] UnsupportedRequestReport= 0
RootPort[7] FatalErrorReport= 0
RootPort[7] NoFatalErrorReport= 0
RootPort[7] CorrectableErrorReport= 0
RootPort[7] SystemErrorOnFatalError= 0
RootPort[7] SystemErrorOnNonFatalError= 0
RootPort[7] SystemErrorOnCorrectableError= 0
RootPort[7] MaxPayload= 1
RootPort[7] SlotImplemented= 1
RootPort[7] AcsEnabled= 1
RootPort[7] PtmEnabled= 1
RootPort[7] AdvancedErrorReporting= 1
RootPort[7] TransmitterHalfSwing= 0
RootPort[7] PcieSpeed= 0
RootPort[7] PhysicalSlotNumber= 7
RootPort[7] CompletionTimeout= 0
RootPort[7] Aspm= 0
RootPort[7] L1Substates= 0
RootPort[7] LtrEnable= 1
RootPort[7] LtrConfigLock= 0
RootPort[7] LtrMaxSnoopLatency= 1003
RootPort[7] LtrMaxNoSnoopLatency= 1003
RootPort[7] SnoopLatencyOverrideMode= 2
RootPort[7] SnoopLatencyOverrideMultiplier= 2
RootPort[7] SnoopLatencyOverrideValue= 3C
RootPort[7] NonSnoopLatencyOverrideMode= 2
RootPort[7] NonSnoopLatencyOverrideMultiplier= 2
RootPort[7] NonSnoopLatencyOverrideValue= 3C
RootPort[7] ForceLtrOverride= 0
RootPort[7] DetectTimeoutMs= 0
RootPort[7] SlotPowerLimitScale= 0
RootPort[7] SlotPowerLimitValue= 0
RootPort[7] EnableCpm= 1
RootPort[7] FormFactor = 0
RootPort[8] HotPlug= 0
RootPort[8] PmSci= 1
RootPort[8] ClkReqDetect= 1
RootPort[8] MrlSensorPresent = 0
RootPort[8] UnsupportedRequestReport= 0
RootPort[8] FatalErrorReport= 0
RootPort[8] NoFatalErrorReport= 0
RootPort[8] CorrectableErrorReport= 0
RootPort[8] SystemErrorOnFatalError= 0
RootPort[8] SystemErrorOnNonFatalError= 0
RootPort[8] SystemErrorOnCorrectableError= 0
RootPort[8] MaxPayload= 1
RootPort[8] SlotImplemented= 1
RootPort[8] AcsEnabled= 1
RootPort[8] PtmEnabled= 1
RootPort[8] AdvancedErrorReporting= 1
RootPort[8] TransmitterHalfSwing= 0
RootPort[8] PcieSpeed= 0
RootPort[8] PhysicalSlotNumber= 8
RootPort[8] CompletionTimeout= 0
RootPort[8] Aspm= 0
RootPort[8] L1Substates= 0
RootPort[8] LtrEnable= 1
RootPort[8] LtrConfigLock= 0
RootPort[8] LtrMaxSnoopLatency= 1003
RootPort[8] LtrMaxNoSnoopLatency= 1003
RootPort[8] SnoopLatencyOverrideMode= 2
RootPort[8] SnoopLatencyOverrideMultiplier= 2
RootPort[8] SnoopLatencyOverrideValue= 3C
RootPort[8] NonSnoopLatencyOverrideMode= 2
RootPort[8] NonSnoopLatencyOverrideMultiplier= 2
RootPort[8] NonSnoopLatencyOverrideValue= 3C
RootPort[8] ForceLtrOverride= 0
RootPort[8] DetectTimeoutMs= 0
RootPort[8] SlotPowerLimitScale= 0
RootPort[8] SlotPowerLimitValue= 0
RootPort[8] EnableCpm= 1
RootPort[8] FormFactor = 0
RootPort[9] HotPlug= 0
RootPort[9] PmSci= 1
RootPort[9] ClkReqDetect= 1
RootPort[9] MrlSensorPresent = 0
RootPort[9] UnsupportedRequestReport= 0
RootPort[9] FatalErrorReport= 0
RootPort[9] NoFatalErrorReport= 0
RootPort[9] CorrectableErrorReport= 0
RootPort[9] SystemErrorOnFatalError= 0
RootPort[9] SystemErrorOnNonFatalError= 0
RootPort[9] SystemErrorOnCorrectableError= 0
RootPort[9] MaxPayload= 1
RootPort[9] SlotImplemented= 1
RootPort[9] AcsEnabled= 1
RootPort[9] PtmEnabled= 1
RootPort[9] AdvancedErrorReporting= 1
RootPort[9] TransmitterHalfSwing= 0
RootPort[9] PcieSpeed= 0
RootPort[9] PhysicalSlotNumber= 9
RootPort[9] CompletionTimeout= 0
RootPort[9] Aspm= 0
RootPort[9] L1Substates= 0
RootPort[9] LtrEnable= 1
RootPort[9] LtrConfigLock= 0
RootPort[9] LtrMaxSnoopLatency= 1003
RootPort[9] LtrMaxNoSnoopLatency= 1003
RootPort[9] SnoopLatencyOverrideMode= 2
RootPort[9] SnoopLatencyOverrideMultiplier= 2
RootPort[9] SnoopLatencyOverrideValue= 3C
RootPort[9] NonSnoopLatencyOverrideMode= 2
RootPort[9] NonSnoopLatencyOverrideMultiplier= 2
RootPort[9] NonSnoopLatencyOverrideValue= 3C
RootPort[9] ForceLtrOverride= 0
RootPort[9] DetectTimeoutMs= 0
RootPort[9] SlotPowerLimitScale= 0
RootPort[9] SlotPowerLimitValue= 0
RootPort[9] EnableCpm= 1
RootPort[9] FormFactor = 0
RootPort[10] HotPlug= 0
RootPort[10] PmSci= 1
RootPort[10] ClkReqDetect= 1
RootPort[10] MrlSensorPresent = 0
RootPort[10] UnsupportedRequestReport= 0
RootPort[10] FatalErrorReport= 0
RootPort[10] NoFatalErrorReport= 0
RootPort[10] CorrectableErrorReport= 0
RootPort[10] SystemErrorOnFatalError= 0
RootPort[10] SystemErrorOnNonFatalError= 0
RootPort[10] SystemErrorOnCorrectableError= 0
RootPort[10] MaxPayload= 1
RootPort[10] SlotImplemented= 1
RootPort[10] AcsEnabled= 1
RootPort[10] PtmEnabled= 1
RootPort[10] AdvancedErrorReporting= 1
RootPort[10] TransmitterHalfSwing= 0
RootPort[10] PcieSpeed= 0
RootPort[10] PhysicalSlotNumber= A
RootPort[10] CompletionTimeout= 0
RootPort[10] Aspm= 4
RootPort[10] L1Substates= 2
RootPort[10] LtrEnable= 1
RootPort[10] LtrConfigLock= 0
RootPort[10] LtrMaxSnoopLatency= 1003
RootPort[10] LtrMaxNoSnoopLatency= 1003
RootPort[10] SnoopLatencyOverrideMode= 2
RootPort[10] SnoopLatencyOverrideMultiplier= 2
RootPort[10] SnoopLatencyOverrideValue= 3C
RootPort[10] NonSnoopLatencyOverrideMode= 2
RootPort[10] NonSnoopLatencyOverrideMultiplier= 2
RootPort[10] NonSnoopLatencyOverrideValue= 3C
RootPort[10] ForceLtrOverride= 0
RootPort[10] DetectTimeoutMs= 0
RootPort[10] SlotPowerLimitScale= 0
RootPort[10] SlotPowerLimitValue= 0
RootPort[10] EnableCpm= 1
RootPort[10] FormFactor = 0
RootPort[11] HotPlug= 0
RootPort[11] PmSci= 1
RootPort[11] ClkReqDetect= 1
RootPort[11] MrlSensorPresent = 0
RootPort[11] UnsupportedRequestReport= 0
RootPort[11] FatalErrorReport= 0
RootPort[11] NoFatalErrorReport= 0
RootPort[11] CorrectableErrorReport= 0
RootPort[11] SystemErrorOnFatalError= 0
RootPort[11] SystemErrorOnNonFatalError= 0
RootPort[11] SystemErrorOnCorrectableError= 0
RootPort[11] MaxPayload= 1
RootPort[11] SlotImplemented= 1
RootPort[11] AcsEnabled= 1
RootPort[11] PtmEnabled= 1
RootPort[11] AdvancedErrorReporting= 1
RootPort[11] TransmitterHalfSwing= 0
RootPort[11] PcieSpeed= 0
RootPort[11] PhysicalSlotNumber= B
RootPort[11] CompletionTimeout= 0
RootPort[11] Aspm= 4
RootPort[11] L1Substates= 2
RootPort[11] LtrEnable= 1
RootPort[11] LtrConfigLock= 0
RootPort[11] LtrMaxSnoopLatency= 1003
RootPort[11] LtrMaxNoSnoopLatency= 1003
RootPort[11] SnoopLatencyOverrideMode= 2
RootPort[11] SnoopLatencyOverrideMultiplier= 2
RootPort[11] SnoopLatencyOverrideValue= 3C
RootPort[11] NonSnoopLatencyOverrideMode= 2
RootPort[11] NonSnoopLatencyOverrideMultiplier= 2
RootPort[11] NonSnoopLatencyOverrideValue= 3C
RootPort[11] ForceLtrOverride= 0
RootPort[11] DetectTimeoutMs= 0
RootPort[11] SlotPowerLimitScale= 0
RootPort[11] SlotPowerLimitValue= 0
RootPort[11] EnableCpm= 1
RootPort[11] FormFactor = 0
OverrideEqualizationDefaults: 0
PcieLinkEqMethod: 0
PcieLinkEqMode: 0
Ph1DownstreamPortTransmitterPreset: 0
Ph1UpstreamPortTransmitterPreset: 0
Ph3NumberOfPresetsOrCoefficients: 0
Phase 3 Coefficient 0, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 1, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 2, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 3, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 4, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 5, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 6, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 7, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 8, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 9, pre-cursor = 0, post-cursor = 0
Phase 3 Preset 0 = 0
Phase 3 Preset 1 = 0
Phase 3 Preset 2 = 0
Phase 3 Preset 3 = 0
Phase 3 Preset 4 = 0
Phase 3 Preset 5 = 0
Phase 3 Preset 6 = 0
Phase 3 Preset 7 = 0
Phase 3 Preset 8 = 0
Phase 3 Preset 9 = 0
Phase 3 Preset 10 = 0
LocalTransmitterOverrideEnable = 0
Ph2LocalTransmitterOverridePreset = 0
EnablePort8xhDecode= 0
PchPciePort8xhDecodePortIndex= 0
EnablePeerMemoryWrite= 0
ComplianceTestMode= 0
RpFunctionSwap= 1
--------------------- RST Config ------------------------
Raid0= 1
Raid1= 1
Raid10= 1
Raid5= 1
Irrt= 1
OromUiBanner= 1
OromUiDelay= 0
HddUnlock= 1
LedLocate= 1
IrrtOnly= 1
SmartStorage= 1
LegacyOrom= 0
OptaneMemory= 1
CpuAttachedStorage= 1
RstPcieStorageRemap[0].Enable = 0
RstPcieStorageRemap[0].RstPcieStoragePort = 0
RstPcieStorageRemap[0].DeviceResetDelay = 64
RstPcieStorageRemap[1].Enable = 0
RstPcieStorageRemap[1].RstPcieStoragePort = 0
RstPcieStorageRemap[1].DeviceResetDelay = 64
RstPcieStorageRemap[2].Enable = 0
RstPcieStorageRemap[2].RstPcieStoragePort = 0
RstPcieStorageRemap[2].DeviceResetDelay = 64
------------------ PCH Lock Down Config ------------------
GlobalSmi= 1
BiosInterface= 1
BiosLock= 0
UnlockGpioPads= 0
------------------ PCH Flash Protection Config ------------------
WriteProtectionEnable[0] = 1
ReadProtectionEnable[0] = 0
ProtectedRangeLimit[0] = 160F
ProtectedRangeBase[0] = 1530
WriteProtectionEnable[1] = 1
ReadProtectionEnable[1] = 0
ProtectedRangeLimit[1] = 1FFF
ProtectedRangeBase[1] = 1650
WriteProtectionEnable[2] = 0
ReadProtectionEnable[2] = 0
ProtectedRangeLimit[2] = 0
ProtectedRangeBase[2] = 0
WriteProtectionEnable[3] = 0
ReadProtectionEnable[3] = 0
ProtectedRangeLimit[3] = 0
ProtectedRangeBase[3] = 0
WriteProtectionEnable[4] = 0
ReadProtectionEnable[4] = 0
ProtectedRangeLimit[4] = 0
ProtectedRangeBase[4] = 0
------------------ PCH HSIO Config ------------------
ChipsetInit Binary Pointer = 0
ChipsetInit Binary Length = 0
------------------ PCH FIVR Config ------------------
ExtV1p05Rail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = 64
ExtVnnRail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = C8
ExtVnnRailSx:
EnabledStates = 0
Voltage = 1A4
IccMax = C8
VccinAux:
LowToHighCurModeVolTranTime = C
RetToHighCurModeVolTranTime = 36
RetToLowCurModeVolTranTime = 2B
OffToHighCurModeVolTranTime = 96
FivrDynPm = 1
------------------------ PCH Print Platform Protocol End --------------------------
------------------ Rtc Config ------------------
BiosInterfaceLock = 1
MemoryLock = 1
------------------ PCH Thermal Config ------------------
TTLevels T0Level 0 centigrade degree
TTLevels T1Level 0 centigrade degree
TTLevels T2Level 0 centigrade degree
TTLevels TTEnable 0
TTLevels TTState13Enable 0
TTLevels TTLock 0
TTLevels SuggestedSetting 1
TTLevels PchCrossThrottling 1
DmiHaAWC DmiTsawEn 0
DmiHaAWC TS0TW 3
DmiHaAWC TS1TW 2
DmiHaAWC TS2TW 1
DmiHaAWC TS3TW 0
DmiHaAWC SuggestedSetting 1
MemoryThrottling Enable= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
PchHotEnable = 0
PchHotLevel = 73
------------------ CNVi Config ------------------
CNVi Mode = 1
BT Core = 1
BT Audio Offload = 0
Pin Muxing:
RF_RESET# = No muxing
CLKREQ = No muxing
------------------ eSPI Config ------------------
LGMR Enable 1
Host C10 Report Enable 0
BME for Master and Slave Enabled 1
Lock Link Configuration 1
Espi Pm HAE 1
------------------ GBE Config ------------------
Enable= 1
LtrEnable= 1
------------------ Tsn Config ------------------
TSN 0 Enable= 0
Tsn0MacAddressHigh = 0
Tsn0MacAddressLow = 0
TsnMultiVcEnable = 0
TsnLinkSpeed= 3
------------------ HDA Config ------------------
Pme = 0
Codec Sx Wake Capability = 0
HD-A Link Frequency = 2
VerbTableEntryNum = 6
VerbTablePtr = 76A02050
------------------ Ieh Config ------------------------
Mode: 0x1
------------------ ISH Config ------------------
SPI0 Enable = 0
SPI0 Cs#0 Enable = 0
Pin muxing:
Mosi = No muxing
Miso = No muxing
Clk = No muxing
Cs#0 = No muxing
Pad termination:
Mosi = GpioTermDefault
Miso = GpioTermDefault
Clk = GpioTermDefault
Cs#0 = GpioTermDefault
UART0 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
UART1 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
I2C0 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C1 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C2 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
GP_0 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_1 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_2 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_3 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_4 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_5 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_6 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_7 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
------------------ Interrupt Config ------------------
Interrupt assignment:
Dxx:Fx INTx IRQ
D31:F3 1 016
D31:F4 1 016
D31:F7 1 016
D30:F0 1 016
D30:F1 2 017
D30:F2 3 036
D30:F3 4 037
D28:F0 1 016
D28:F1 2 017
D28:F2 3 018
D28:F3 4 019
D25:F2 3 033
D23:F0 1 016
D22:F0 1 016
D22:F1 2 017
D22:F4 1 016
D22:F5 4 019
D21:F0 1 027
D21:F1 2 040
D21:F2 3 029
D21:F3 4 030
D20:F0 1 016
D20:F1 2 017
D20:F3 1 016
D19:F0 1 043
D18:F0 1 016
D18:F6 2 034
D17:F0 1 035
D17:F1 2 020
D17:F2 3 021
D17:F3 4 042
D16:F0 3 018
D16:F1 4 019
D16:F6 1 023
D16:F7 2 022
D31:F6 1 016
D30:F4 1 016
D29:F0 1 016
D29:F1 2 017
D29:F2 3 018
D29:F3 4 019
D28:F4 1 016
D28:F5 2 017
D28:F6 3 018
D28:F7 4 019
D25:F0 1 031
D25:F1 2 032
D22:F2 3 018
D22:F3 4 019
D19:F1 2 024
D19:F2 3 025
D19:F3 4 038
Other interrupt configuration:
GpioIrqRoute= 14
SciIrqSelect= 9
TcoIrqEnable= 0
TcoIrqSelect= 9
------------------ IOAPIC Config ------------------
IoApicEntry24_119= 1
Enable8254ClockGating= 1
Enable8254ClockGatingOnS3= 1
IoApicId= 2
------------------ P2SB Config ------------------
SbAccessUnlock= 0
------------------ DMI Config ------------------
PwrOptEnable= 0
DmiAspmCtrl = 4
CwbEnable= 1
DmiPowerReduction= 1
OpioRecenter= 1
------------------ PCH PM Config ------------------
WakeConfig PmeB0S5Dis = 0
WakeConfig WolEnableOverride = 1
WakeConfig LanWakeFromDeepSx = 1
WakeConfig PcieWakeFromDeepSx = 0
WakeConfig WoWlanEnable = 0
WakeConfig WoWlanDeepSxEnable = 0
PchDeepSxPol = 0
PchSlpS3MinAssert = 3
PchSlpS4MinAssert = 1
PchSlpSusMinAssert = 4
PchSlpAMinAssert = 4
SlpStrchSusUp = 0
SlpLanLowDc = 1
PwrBtnOverridePeriod = 0
DisableEnergyReport = 0
DisableDsxAcPresentPulldown = 0
PchPwrCycDur = 0
PciePllSsc = FF
DisableNativePowerButton = 0
MeWakeSts = 1
WolOvrWkSts = 1
EnableTcoTimer = 1
VrAlert = 0
PowerButtonDebounce = 0
PsOnEnable = 0
CpuC10GatePinEnable = 1
PmcDbgMsgEn = 0
ModPhySusPgEnable = 1
Usb2PhySusPgEnable = 1
OsIdleEnable = 1
V1p05PhyExtFetControlEn = 0
V1p05IsExtFetControlEn = 0
LpmS0ixSubStateEnable = FF
S0ixAutoDemotion = 1
LatchEventsC10Exit = 0
EnableTimedGpio0 = 0
EnableTimedGpio1 = 0
GlobalResetMasksOverride = 0
GlobalResetTriggerMask = 0
GlobalResetEventMask = 0
--------------- SATA Config for controller 0 -----------
Enable= 1
SataMode= 0
PortSettings[0] Enabled= 1
PortSettings[0] HotPlug= 0
PortSettings[0] InterlockSw= 0
PortSettings[0] External= 0
PortSettings[0] SpinUp= 0
PortSettings[0] SolidStateDrive= 0
PortSettings[0] DevSlp= 0
PortSettings[0] DevSlpResetConfig= 1
PortSettings[0] EnableDitoConfig= 0
PortSettings[0] DmVal= 0
PortSettings[0] DitoVal= 0
PortSettings[0] ZpOdd= 0
PortSettings[1] Enabled= 1
PortSettings[1] HotPlug= 0
PortSettings[1] InterlockSw= 0
PortSettings[1] External= 0
PortSettings[1] SpinUp= 0
PortSettings[1] SolidStateDrive= 0
PortSettings[1] DevSlp= 0
PortSettings[1] DevSlpResetConfig= 1
PortSettings[1] EnableDitoConfig= 0
PortSettings[1] DmVal= 0
PortSettings[1] DitoVal= 0
PortSettings[1] ZpOdd= 0
SpeedSupport= 0
EsataSpeedLimit= 0
LedEnable= 0
TestMode= 0
SalpSupport= 1
PwrOptEnable= 0
RaidDeviceId= 0
SataRstInterrupt = 0
ThermalThrottling P0T1M 1
ThermalThrottling P0T2M 2
ThermalThrottling P0T3M 3
ThermalThrottling P0TDisp 0
ThermalThrottling P0Tinact 0
ThermalThrottling P0TDispFinit 0
ThermalThrottling P1T1M 1
ThermalThrottling P1T2M 2
ThermalThrottling P1T3M 3
ThermalThrottling P1TDisp 0
ThermalThrottling P1Tinact 0
ThermalThrottling P1TDispFinit 0
ThermalThrottling SuggestedSetting 1
------------------ USB Config ------------------
PdoProgramming = 1
OverCurrentEnable = 1
XhciOcLock = 1
LtrModeEnable = 1
HsiiEnable = 0
PortUsb20[0].Enabled = 1
PortUsb20[0].OverCurrentPin = OC0
PortUsb20[0].PortResetMessageEnable = 0
PortUsb20[1].Enabled = 1
PortUsb20[1].OverCurrentPin = OC255
PortUsb20[1].PortResetMessageEnable = 0
PortUsb20[2].Enabled = 1
PortUsb20[2].OverCurrentPin = OC255
PortUsb20[2].PortResetMessageEnable = 0
PortUsb20[3].Enabled = 1
PortUsb20[3].OverCurrentPin = OC0
PortUsb20[3].PortResetMessageEnable = 0
PortUsb20[4].Enabled = 1
PortUsb20[4].OverCurrentPin = OC0
PortUsb20[4].PortResetMessageEnable = 0
PortUsb20[5].Enabled = 1
PortUsb20[5].OverCurrentPin = OC3
PortUsb20[5].PortResetMessageEnable = 0
PortUsb20[6].Enabled = 1
PortUsb20[6].OverCurrentPin = OC3
PortUsb20[6].PortResetMessageEnable = 0
PortUsb20[7].Enabled = 1
PortUsb20[7].OverCurrentPin = OC0
PortUsb20[7].PortResetMessageEnable = 0
PortUsb20[8].Enabled = 0
PortUsb20[8].OverCurrentPin = OC3
PortUsb20[8].PortResetMessageEnable = 0
PortUsb20[9].Enabled = 1
PortUsb20[9].OverCurrentPin = OC3
PortUsb20[9].PortResetMessageEnable = 0
PortUsb30[0] Enabled = 1
PortUsb30[0].OverCurrentPin = OC0
PortUsb30[1] Enabled = 1
PortUsb30[1].OverCurrentPin = OC0
PortUsb30[2] Enabled = 1
PortUsb30[2].OverCurrentPin = OC255
PortUsb30[3] Enabled = 1
PortUsb30[3].OverCurrentPin = OC255
LtrOverrideEnable = 0
XdciConfig.Enable= 1
USB3LinkSpeed = 0
------------------ USB2 PHY Config ------------------
Port[0].Petxiset = 6
Port[0].Txiset = 0
Port[0].Predeemp = 3
Port[0].Pehalfbit = 0
Port[1].Petxiset = 6
Port[1].Txiset = 0
Port[1].Predeemp = 3
Port[1].Pehalfbit = 0
Port[2].Petxiset = 6
Port[2].Txiset = 0
Port[2].Predeemp = 3
Port[2].Pehalfbit = 0
Port[3].Petxiset = 6
Port[3].Txiset = 0
Port[3].Predeemp = 3
Port[3].Pehalfbit = 0
Port[4].Petxiset = 6
Port[4].Txiset = 0
Port[4].Predeemp = 3
Port[4].Pehalfbit = 0
Port[5].Petxiset = 6
Port[5].Txiset = 0
Port[5].Predeemp = 3
Port[5].Pehalfbit = 0
Port[6].Petxiset = 6
Port[6].Txiset = 0
Port[6].Predeemp = 3
Port[6].Pehalfbit = 0
Port[7].Petxiset = 6
Port[7].Txiset = 0
Port[7].Predeemp = 3
Port[7].Pehalfbit = 0
Port[8].Petxiset = 6
Port[8].Txiset = 0
Port[8].Predeemp = 3
Port[8].Pehalfbit = 0
Port[9].Petxiset = 6
Port[9].Txiset = 0
Port[9].Predeemp = 3
Port[9].Pehalfbit = 0
------------------ USB3 HSIO Config ------------------
Port[0].HsioTxDeEmphEnable = 0
Port[0].HsioTxDeEmph = 0
Port[0].HsioTxDownscaleAmpEnable = 0
Port[0].HsioTxDownscaleAmp = 0
Port[0].HsioCtrlAdaptOffsetCfgEnable = 0
Port[0].HsioCtrlAdaptOffsetCfg = 0
Port[0].HsioFilterSelNEnable = 0
Port[0].HsioFilterSelN = 0
Port[0].HsioFilterSelPEnable = 0
Port[0].HsioFilterSelP = 0
Port[0].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[0].HsioOlfpsCfgPullUpDwnRes = 3
Port[0].HsioTxRate0UniqTranEnable = 0
Port[0].HsioTxRate0UniqTran = 4C
Port[0].HsioTxRate1UniqTranEnable = 0
Port[0].HsioTxRate1UniqTran = 4C
Port[0].HsioTxRate2UniqTranEnable = 0
Port[0].HsioTxRate2UniqTran = 4C
Port[0].HsioTxRate3UniqTranEnable = 0
Port[0].HsioTxRate3UniqTran = 4C
Port[1].HsioTxDeEmphEnable = 0
Port[1].HsioTxDeEmph = 0
Port[1].HsioTxDownscaleAmpEnable = 0
Port[1].HsioTxDownscaleAmp = 0
Port[1].HsioCtrlAdaptOffsetCfgEnable = 0
Port[1].HsioCtrlAdaptOffsetCfg = 0
Port[1].HsioFilterSelNEnable = 0
Port[1].HsioFilterSelN = 0
Port[1].HsioFilterSelPEnable = 0
Port[1].HsioFilterSelP = 0
Port[1].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[1].HsioOlfpsCfgPullUpDwnRes = 3
Port[1].HsioTxRate0UniqTranEnable = 0
Port[1].HsioTxRate0UniqTran = 4C
Port[1].HsioTxRate1UniqTranEnable = 0
Port[1].HsioTxRate1UniqTran = 4C
Port[1].HsioTxRate2UniqTranEnable = 0
Port[1].HsioTxRate2UniqTran = 4C
Port[1].HsioTxRate3UniqTranEnable = 0
Port[1].HsioTxRate3UniqTran = 4C
Port[2].HsioTxDeEmphEnable = 0
Port[2].HsioTxDeEmph = 0
Port[2].HsioTxDownscaleAmpEnable = 0
Port[2].HsioTxDownscaleAmp = 0
Port[2].HsioCtrlAdaptOffsetCfgEnable = 0
Port[2].HsioCtrlAdaptOffsetCfg = 0
Port[2].HsioFilterSelNEnable = 0
Port[2].HsioFilterSelN = 0
Port[2].HsioFilterSelPEnable = 0
Port[2].HsioFilterSelP = 0
Port[2].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[2].HsioOlfpsCfgPullUpDwnRes = 3
Port[2].HsioTxRate0UniqTranEnable = 0
Port[2].HsioTxRate0UniqTran = 4C
Port[2].HsioTxRate1UniqTranEnable = 0
Port[2].HsioTxRate1UniqTran = 4C
Port[2].HsioTxRate2UniqTranEnable = 0
Port[2].HsioTxRate2UniqTran = 4C
Port[2].HsioTxRate3UniqTranEnable = 0
Port[2].HsioTxRate3UniqTran = 4C
Port[3].HsioTxDeEmphEnable = 0
Port[3].HsioTxDeEmph = 0
Port[3].HsioTxDownscaleAmpEnable = 0
Port[3].HsioTxDownscaleAmp = 0
Port[3].HsioCtrlAdaptOffsetCfgEnable = 0
Port[3].HsioCtrlAdaptOffsetCfg = 0
Port[3].HsioFilterSelNEnable = 0
Port[3].HsioFilterSelN = 0
Port[3].HsioFilterSelPEnable = 0
Port[3].HsioFilterSelP = 0
Port[3].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[3].HsioOlfpsCfgPullUpDwnRes = 3
Port[3].HsioTxRate0UniqTranEnable = 0
Port[3].HsioTxRate0UniqTran = 4C
Port[3].HsioTxRate1UniqTranEnable = 0
Port[3].HsioTxRate1UniqTran = 4C
Port[3].HsioTxRate2UniqTranEnable = 0
Port[3].HsioTxRate2UniqTran = 4C
Port[3].HsioTxRate3UniqTranEnable = 0
Port[3].HsioTxRate3UniqTran = 4C
------------------ PCH Thc Config ------------------------
THC ports:
PORT0 Assignment: 0x0
PORT0 Interrupt Pin Muxing: No muxing
PORT1 Assignment: 0x0
PORT1 Interrupt Pin Muxing: No muxing
------------------ Psf Config ------------------------
TccEnable: 0x0
------------------ Fusa Config ------------------------
DisplayFusaConfigEnable: 0x1
GraphicFusaConfigEnable: 0x1
OpioFusaConfigEnable: 0x1
PsfFusaConfigEnable: 0x1
------------------ Hybrid Storage Config ------------------
Hybrid Storage Mode = 0
------------------ TCC Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Crl Bin - Base Address = 0x0
Crl Bin - Size = 0x0
Ifu Enabled = 0
------------------ SPI Config ------------------------
ExtendedBiosDecodeRangeEnable: 0x0
ExtendedBiosDecodeRangeBase: 0x0
ExtendedBiosDecodeRangeLimit: 0xFFFF
---------------------- AmtPolicyPpi Print Begin -----------------
Revision : 0x1
------------------------ AMT_PEI_CONFIG -----------------
Revision : 0x1
AmtEnabled : 0x1
WatchDogEnabled : 0x0
FwProgress : 0x0
WatchDogTimerOs : 0x0
WatchDogTimerBios : 0x0
ManageabilityMode : 0x0
AmtSolEnabled : 0x0
RemoteAssistance : 0x0
AmtKvmEnabled : 0x0
ForcMebxSyncUp : 0x0
---------------------- AmtPolicyPpi Print End -------------------
---------------------- Me Config Block Print Begin -----------------
------------------------ ME_PEI_CONFIG -----------------
Revision : 0x3
MctpBroadcastCycle : 0x0
EndOfPostMessage : 0x2
DisableD0I3SettingForHeci : 0x0
EnforceEDebugMode : 0x0
MeUnconfigOnRtcClear : 0x1
---------------------- Me Config Block Print End -------------------
------------------------ SA Policy (PEI) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_CONFIG ------------------------
Revision : 1
------------------------ GRAPHICS_PEI_CONFIG -----------------
Revision : 7
RenderStandby : 0x1
PmSupport : 0x1
PavpEnable : 0x1
CdClock : 0xFF
SkipCdClockInit : 0x0
PeiGraphicsPeimInit : 0x1
LogoPtr : 0x0
LogoSize : 0x0
BltBufferAdress : 0x0
BltBufferSize : 0x0
GraphicsConfigPtr : 0x76A5B91C
CdynmaxClampEnable : 0x0
GtFreqMax : 0xFF
DisableTurboGt : 0x0
------------------------ GRAPHICS_PEI_CONFIG Print END -----------------
------------------------ GNA_CONFIG -----------------
Revision : 1
------------------------ GNA_CONFIG Print END -----------------
----------------------- VMD_PEI_CONFIG -----------------
Revision : 4
VMD Enable : 0
VMD Global Mapping : 0
VMD VmdCfgBarSize : 0
VMD VmdMemBarSize1 : 0
VMD VmdMemBarSize2 : 0
VMD VmdCfgBarAttr : 0
VMD VmdMemBar1Attr : 0
VMD VmdMemBar2Attr : 0
VMD VmdCfgBarBase : 0xA0000000
VMD VmdMemBar1Base : 0xA2000000
VMD VmdMemBar2Base : 0xA4000000
Vmd OS Variable details
VMD Request Entry Count is 26
Storage device B/D/F or RpIndex/D/F is 90/26/2
Storage device B/D/F or RpIndex/D/F is 4/5/0
Storage device B/D/F or RpIndex/D/F is 6/7/0
Storage device B/D/F or RpIndex/D/F is 8/9/0
Storage device B/D/F or RpIndex/D/F is 10/11/0
Storage device B/D/F or RpIndex/D/F is 12/13/0
Storage device B/D/F or RpIndex/D/F is 14/15/0
Storage device B/D/F or RpIndex/D/F is 16/17/0
Storage device B/D/F or RpIndex/D/F is 18/19/0
Storage device B/D/F or RpIndex/D/F is 20/21/0
Storage device B/D/F or RpIndex/D/F is 22/23/0
Storage device B/D/F or RpIndex/D/F is 24/25/0
Storage device B/D/F or RpIndex/D/F is 26/27/0
Storage device B/D/F or RpIndex/D/F is 28/29/0
Storage device B/D/F or RpIndex/D/F is 30/31/0
Storage device B/D/F or RpIndex/D/F is 32/1/1
Storage device B/D/F or RpIndex/D/F is 34/3/1
Storage device B/D/F or RpIndex/D/F is 36/5/1
Storage device B/D/F or RpIndex/D/F is 38/7/1
Storage device B/D/F or RpIndex/D/F is 40/9/1
Storage device B/D/F or RpIndex/D/F is 42/11/1
Storage device B/D/F or RpIndex/D/F is 44/13/1
Storage device B/D/F or RpIndex/D/F is 46/15/1
Storage device B/D/F or RpIndex/D/F is 48/17/1
Storage device B/D/F or RpIndex/D/F is 50/19/1
Storage device B/D/F or RpIndex/D/F is 52/21/1
-------------------- VMD_CONFIG Print END -----------------
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge Pei Config ------------------
Revision : 1
Device4Enable : 0x0
SkipPamLock : 0x0
EdramTestMode : 0x2
------------------ Serial IO Config ------------------
SPI[0].Mode = 0
SPI[0].DefaultCsOutput = 0
SPI[0].CsMode = 0
SPI[0].CsState = 0
SPI[0].CsEnable[0] = 1
SPI[0].CsPolarity[0] = 1
SPI[0].CsEnable[1] = 0
SPI[0].CsPolarity[1] = 1
SPI[1].Mode = 1
SPI[1].DefaultCsOutput = 0
SPI[1].CsMode = 0
SPI[1].CsState = 0
SPI[1].CsEnable[0] = 1
SPI[1].CsPolarity[0] = 1
SPI[1].CsEnable[1] = 0
SPI[1].CsPolarity[1] = 1
SPI[2].Mode = 0
SPI[2].DefaultCsOutput = 0
SPI[2].CsMode = 0
SPI[2].CsState = 0
SPI[2].CsEnable[0] = 1
SPI[2].CsPolarity[0] = 1
SPI[2].CsEnable[1] = 0
SPI[2].CsPolarity[1] = 1
SPI[3].Mode = 0
SPI[3].DefaultCsOutput = 0
SPI[3].CsMode = 0
SPI[3].CsState = 0
SPI[3].CsEnable[0] = 1
SPI[3].CsPolarity[0] = 1
SPI[3].CsEnable[1] = 0
SPI[3].CsPolarity[1] = 1
SPI[4].Mode = 0
SPI[4].DefaultCsOutput = 0
SPI[4].CsMode = 0
SPI[4].CsState = 0
SPI[4].CsEnable[0] = 1
SPI[4].CsPolarity[0] = 1
SPI[4].CsEnable[1] = 0
SPI[4].CsPolarity[1] = 1
SPI[5].Mode = 0
SPI[5].DefaultCsOutput = 0
SPI[5].CsMode = 0
SPI[5].CsState = 0
SPI[5].CsEnable[0] = 1
SPI[5].CsPolarity[0] = 1
SPI[5].CsEnable[1] = 0
SPI[5].CsPolarity[1] = 1
SPI[6].Mode = 0
SPI[6].DefaultCsOutput = 0
SPI[6].CsMode = 0
SPI[6].CsState = 0
SPI[6].CsEnable[0] = 1
SPI[6].CsPolarity[0] = 1
SPI[6].CsEnable[1] = 0
SPI[6].CsPolarity[1] = 1
UART[0].Mode = 4
UART[0].Attributes.BaudRate = 115200
UART[0].Attributes.Parity = 1
UART[0].Attributes.DataBits = 8
UART[0].Attributes.StopBits = 1
UART[0].Attributes.AutoFlow = 1
UART[0].PinMux.Rx = 0x190B0208
UART[0].PinMux.Tx = 0x190B1209
UART[0].PinMux.Rts = 0x190B220A
UART[0].PinMux.Cts = 0x190B320B
UART[0].DBG2 = 0
UART[0].PowerGating = 2
UART[0].DmaEnable = 1
UART[1].Mode = 0
UART[1].Attributes.BaudRate = 115200
UART[1].Attributes.Parity = 1
UART[1].Attributes.DataBits = 8
UART[1].Attributes.StopBits = 1
UART[1].Attributes.AutoFlow = 1
UART[1].PinMux.Rx = 0x0
UART[1].PinMux.Tx = 0x0
UART[1].PinMux.Rts = 0x0
UART[1].PinMux.Cts = 0x0
UART[1].DBG2 = 0
UART[1].PowerGating = 2
UART[1].DmaEnable = 1
UART[2].Mode = 2
UART[2].Attributes.BaudRate = 115200
UART[2].Attributes.Parity = 1
UART[2].Attributes.DataBits = 8
UART[2].Attributes.StopBits = 1
UART[2].Attributes.AutoFlow = 0
UART[2].PinMux.Rx = 0x0
UART[2].PinMux.Tx = 0x0
UART[2].PinMux.Rts = 0x0
UART[2].PinMux.Cts = 0x0
UART[2].DBG2 = 0
UART[2].PowerGating = 2
UART[2].DmaEnable = 0
UART[3].Mode = 0
UART[3].Attributes.BaudRate = 115200
UART[3].Attributes.Parity = 1
UART[3].Attributes.DataBits = 8
UART[3].Attributes.StopBits = 1
UART[3].Attributes.AutoFlow = 1
UART[3].PinMux.Rx = 0x0
UART[3].PinMux.Tx = 0x0
UART[3].PinMux.Rts = 0x0
UART[3].PinMux.Cts = 0x0
UART[3].DBG2 = 0
UART[3].PowerGating = 2
UART[3].DmaEnable = 1
UART[4].Mode = 0
UART[4].Attributes.BaudRate = 115200
UART[4].Attributes.Parity = 1
UART[4].Attributes.DataBits = 8
UART[4].Attributes.StopBits = 1
UART[4].Attributes.AutoFlow = 1
UART[4].PinMux.Rx = 0x0
UART[4].PinMux.Tx = 0x0
UART[4].PinMux.Rts = 0x0
UART[4].PinMux.Cts = 0x0
UART[4].DBG2 = 0
UART[4].PowerGating = 2
UART[4].DmaEnable = 1
UART[5].Mode = 0
UART[5].Attributes.BaudRate = 115200
UART[5].Attributes.Parity = 1
UART[5].Attributes.DataBits = 8
UART[5].Attributes.StopBits = 1
UART[5].Attributes.AutoFlow = 0
UART[5].PinMux.Rx = 0x0
UART[5].PinMux.Tx = 0x0
UART[5].PinMux.Rts = 0x0
UART[5].PinMux.Cts = 0x0
UART[5].DBG2 = 0
UART[5].PowerGating = 2
UART[5].DmaEnable = 0
UART[6].Mode = 0
UART[6].Attributes.BaudRate = 115200
UART[6].Attributes.Parity = 1
UART[6].Attributes.DataBits = 8
UART[6].Attributes.StopBits = 1
UART[6].Attributes.AutoFlow = 0
UART[6].PinMux.Rx = 0x0
UART[6].PinMux.Tx = 0x0
UART[6].PinMux.Rts = 0x0
UART[6].PinMux.Cts = 0x0
UART[6].DBG2 = 0
UART[6].PowerGating = 2
UART[6].DmaEnable = 0
I2C[0].Mode = 1
I2C[0].PinMux.Sda = 0x0
I2C[0].PinMux.Scl = 0x0
I2C[0].PadTermination = 0
I2C[1].Mode = 1
I2C[1].PinMux.Sda = 0x0
I2C[1].PinMux.Scl = 0x0
I2C[1].PadTermination = 0
I2C[2].Mode = 0
I2C[2].PinMux.Sda = 0x0
I2C[2].PinMux.Scl = 0x0
I2C[2].PadTermination = 0
I2C[3].Mode = 0
I2C[3].PinMux.Sda = 0x0
I2C[3].PinMux.Scl = 0x0
I2C[3].PadTermination = 0
I2C[4].Mode = 0
I2C[4].PinMux.Sda = 0x0
I2C[4].PinMux.Scl = 0x0
I2C[4].PadTermination = 0
I2C[5].Mode = 0
I2C[5].PinMux.Sda = 0x0
I2C[5].PinMux.Scl = 0x0
I2C[5].PadTermination = 0
I2C[6].Mode = 0
I2C[6].PinMux.Sda = 0x0
I2C[6].PinMux.Scl = 0x0
I2C[6].PadTermination = 0
I2C[7].Mode = 0
I2C[7].PinMux.Sda = 0x0
I2C[7].PinMux.Scl = 0x0
I2C[7].PadTermination = 0
------------------------ SiCpuPolicy Print Begin in PostMem-----------------
Revision= 1
------------------ CPU Config ------------------
CPU_CONFIG : AesEnable : 0x1
CPU_CONFIG : TxtEnable : 0x0
CPU_CONFIG : MicrocodePatchAddress : 0xFFC15000
CPU_CONFIG : PpinSupport : 0x0
CPU_CONFIG : AvxDisable : 0x0
CPU_CONFIG : Avx3Disable : 0x0
CPU_CONFIG : RaceConditionResponse : 0x0
CPU_CONFIG : AcSplitLock : 0x0
CPU_CONFIG : SmbiosType4MaxSpeedOverride : 0
------------------ CPU BIOS Guard Config ------------------
BIOS_GUARD_CONFIG:: EcCmdProvisionEav : 0xFF
BIOS_GUARD_CONFIG:: EcCmdLock : 0xFF
BIOS_GUARD_CONFIG:: BiosGuardModulePtr : 0xFFFFFFFFFFFFFFFF
BIOS_GUARD_CONFIG:: Platform attributes : 0xFFFFFFFF
BIOS_GUARD_CONFIG:: SendEcCmd : 0xFFFFFFFF
------------------ CPU Power Mgmt Basic Config ------------------
CPU_POWER_MGMT_BASIC_CONFIG : OneCoreRatioLimit : 0x0 , TwoCoreRatioLimit = 0x0 , ThreeCoreRatioLimit = 0x0 , FourCoreRatioLimit = 0x0, FiveCoreRatioLimit = 0x0, SixCoreRatioLimit = 0x0, SevenCoreRatioLimit = 0x0, EightCoreRatioLimit = 0x0
CPU_POWER_MGMT_BASIC_CONFIG: Hwp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: SkipSetBootPState : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HdcControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: (Intel Turbo Boost Max Technology 3.0)EnableItbm : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2 : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TurboPowerLimitLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3DutyCycle : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetClamp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TurboMode : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccActivationOffset : 0xA
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2Power : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetTimeWindowForRatl : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HwpInterruptControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnablePerCorePState : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoPerCorePstate : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoEppGrouping : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableEpbPeciOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: EnableFastMsrHwpReq : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: MinRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: MaxRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: ApplyConfigTdp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionMs : 0x1E
------------------ CPU Power Mgmt Custom Config ------------------
CustomRatioTable...
CPU_POWER_MGMT_CUSTOM_CONFIG: VidNumber : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: VidCpuid : 0x6C1
CPU_POWER_MGMT_CUSTOM_CONFIG: VidMaxRatio : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[16] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[17] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[18] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[19] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[20] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[21] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[22] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[23] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[24] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[25] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[26] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[27] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[28] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[29] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[30] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[31] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[32] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[33] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[34] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[35] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[36] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[37] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[38] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[39] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpLock : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpBios : 0x0
------------------ CPU Power Mgmt Psys Config ------------------
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPmax : 0xAC
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1 : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Time : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2 : 0x0
------------------ CPU Test Config ------------------
CPU_TEST_CONFIG: MlcStreamerPrefetcher : 0x1
CPU_TEST_CONFIG: MlcSpatialPrefetcher : 0x1
CPU_TEST_CONFIG: MonitorMwaitEnable : 0x1
CPU_TEST_CONFIG: MachineCheckEnable : 0x1
CPU_TEST_CONFIG: ProcessorTraceOutputScheme : 0x0
CPU_TEST_CONFIG: ProcessorTraceEnable : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemBase : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemLength : 0x0
CPU_TEST_CONFIG: ThreeStrikeCounterDisable : 0x0
CPU_TEST_CONFIG: PcdCpuApLoopMode: 0x2
------------------ CPU PID Test Config ------------------
CPU_PID_TEST_CONFIG : PidTuning : 0x0
------------------ CPU Power Mgmt Test Config ------------------
CPU_POWER_MGMT_TEST_CONFIG: Eist : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientPState : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientTurbo : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TStates : 0x1
CPU_POWER_MGMT_TEST_CONFIG: BiProcHot : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableProcHotOut : 0x1
CPU_POWER_MGMT_TEST_CONFIG: ProcHotResponse : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableVrThermalAlert : 0x0
CPU_POWER_MGMT_TEST_CONFIG: EnableAllThermalFunctions : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ThermalMonitor : 0x1
CPU_POWER_MGMT_TEST_CONFIG: Cx : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PmgCstCfgCtrlLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1e : 0x0
CPU_POWER_MGMT_TEST_CONFIG: C1Autodemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1Undemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCState Demotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCstateUndemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CStatePreWake : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TimedMwait : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstCfgCtrIoMwaitRedirection : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ProcHotLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: RaceToHalt : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: PkgCStateLimit : 0x8
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CustomPowerUnit : 0x1
PpmIrmSetting : 0x0
------------------------ SiCpuPolicy Print End in PostMem -----------------
------------------------ TCSS_PEI_CONFIG -----------------
Revision : 3
TcssPeiConfig->IomAuxPortPad[0].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[0].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullP 0x00000000
TcssPeiConfig->UsbConfig.PortUsb30[0].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[1].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[2].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[3].Enable 0x00000001
TcssPeiConfig->IomConfig.IomOverrides.AuxOri 0x0000
TcssPeiConfig->IomConfig.IomOverrides.HslOri 0x0000
TcssPeiConfig->IomConfig.IomInterface.VccSt 1
TcssPeiConfig->IomConfig.IomInterface.UsbOverride 0
TcssPeiConfig->IomConfig.IomInterface.D3HotEnable 0
TcssPeiConfig->IomConfig.IomInterface.D3ColdEnable 1
TcssPeiConfig->IomConfig.TcStateLimit 10
TcssPeiConfig->IomConfig.DisableTccoldOnUsbConnected 0
TcssPeiConfig->MiscConfig.IomStayInTCColdeSeconds 50
TcssPeiConfig->MiscConfig.IomBeforeEnteringTCCodeSeconds 10
TcssPeiConfig->IomConfig.PmcInterface.PmcPdEnable 1
------------------------ SA_PEI_PCIE_COMMON_CONFIG -----------------
Itbt Root Port 0 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 1 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 2 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 60
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 3 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
[TBT] TbtPrintPolicyConfig Start
------------------------ ITBT Policy (PEI) Print BEGIN -----------------
Revision : 0x1
Revision : 2
PeiITbtConfig->ITbtGenericConfig.ITbtForcePowerOnTimeoutInMs = 1F4
PeiITbtConfig->ITbtGenericConfig.ITbtConnectTopologyTimeoutInMs = 1388
PeiITbtConfig->ITbtGenericConfig.ITbtPcieTunnelingForUsb4 = 1
PeiITbtConfig->ITbtRootPortConfig[0].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[1].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[2].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[3].ITbtPcieRootPortEn = 0
------------------------ ITBT Policy (PEI) Print END -----------------
------------------------ CPU_PCIE_Config -----------------
FiaProgramming = 1
ClockGating= 1
PowerGating= 1
SlotSelection= 1
Serl : 0x1
ComplianceTestMode= 0
RpFunctionSwap= 1
EnablePeerMemoryWrite= 0
PcieDeviceOverrideTablePtr= 0
RootPort[0] PcieGen3PresetCoeffSelection= 1
RootPort[0] PcieGen4PresetCoeffSelection= 1
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ExtSync= 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] DpcEnabled= 1
RootPort[0] RpDpcExtensionsEnabled= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] VcEnabled= 1
RootPort[0] MultiVcEnabled= 0
RootPort[0] PeerToPeer= 0
RootPort[0] FOMS Control Policy= 0
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] Gen3EqPh3Method= 1
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 2
RootPort[0] L1Substates= 2
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] Gen3Uptp= 7
RootPort[0] Gen3Dptp= 7
RootPort[0] Gen4Uptp= 8
RootPort[0] gen4Dptp= 9
RootPort[0] Gen5Uptp= 7
RootPort[0] gen5Dptp= 7
RootPort[0] EnableCpm= 1
RootPort[0] HwEqGen3Coeff0ListCm= 3
RootPort[0] HwEqGen3Coeff1ListCm= 3
RootPort[0] HwEqGen3Coeff2ListCm= 0
RootPort[0] HwEqGen3Coeff3ListCm= 0
RootPort[0] HwEqGen3Coeff4ListCm= 0
RootPort[0] HwEqGen3Coeff0ListCp= 4
RootPort[0] HwEqGen3Coeff1ListCp= 4
RootPort[0] HwEqGen3Coeff2ListCp= 0
RootPort[0] HwEqGen3Coeff3ListCp= 0
RootPort[0] HwEqGen3Coeff4ListCp= 0
RootPort[0] HwEqGen4Coeff0ListCm= 6
RootPort[0] HwEqGen4Coeff1ListCm= 6
RootPort[0] HwEqGen4Coeff2ListCm= 0
RootPort[0] HwEqGen4Coeff3ListCm= 0
RootPort[0] HwEqGen4Coeff4ListCm= 0
RootPort[0] HwEqGen4Coeff0ListCp= A
RootPort[0] HwEqGen4Coeff1ListCp= A
RootPort[0] HwEqGen4Coeff2ListCp= 0
RootPort[0] HwEqGen4Coeff3ListCp= 0
RootPort[0] HwEqGen4Coeff4ListCp= 0
------------------------ CPU_PCIE_Config Print END -----------------
------------------ CPU Power Mgmt VR Config ------------------
CPU_POWER_MGMT_VR_CONFIG : VrConfigEnable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcCurrentLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : DcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Psi1Threshold[0] : 0x50
CPU_POWER_MGMT_VR_CONFIG : Psi2Threshold[0] : 0x14
CPU_POWER_MGMT_VR_CONFIG : Psi3Threshold[0] : 0x4
CPU_POWER_MGMT_VR_CONFIG : Psi3Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : Psi4Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : ImonSlope[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : ImonOffset[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : IccMax[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : VrVoltageLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcEnable[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcTimeWindow[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcLock[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Irms[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG:: FastPkgCRampDisable for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SlowSlewRate for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysSlope : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysOffset : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcousticNoiseMitigation : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SendVrMbxCmd : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrRfiFrequency : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrSpectrumEnable : 0x1
CPU_POWER_MGMT_VR_CONFIG : FivrSpreadSpectrum : 0x8
CPU_POWER_MGMT_VR_CONFIG : EnableMinVoltageOverride : 0x0
CPU_POWER_MGMT_VR_CONFIG : PreWake : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampUp : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampDown : 0x0
CPU_POWER_MGMT_VR_CONFIG : RfiMitigation : 0x0
Install PPI: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Notify: PPI Guid: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779, Peim notify entry point: 76F019C7
SiInit () - Start
FuSA supported sku detected
FusaInit() Start
Disable C1e in fusa mode
IOP FUSA override Function
OPIO FUSA override Fuction
Enable Fusa on Opio
Enable Fusa on Graphics
Enable Fusa on Display
PSF CPU FUSA override Function
Read Default PSF Config = 0360
Read Default PSF Config = 0360
Enable Fusa on PSF
Read After PSF Config = 0F60
Read After PSF Config = 0F60
Lock FUSA Display Lock Bit 0x3000301
Lock FUSA Graphics Lock Bit 0x41
FusaInit() End
FuSA supported sku detected
ConfigurePsmi () - Start
ConfigurePsmi () - PSMI disabled
PeiSiPolicyOverride ()
SubsystemID programming on Internal Devices
MePostMemInit () - Start
POSTCODE=<00009E02> - ME-BIOS: MBP Entry.
PrepareMeBiosPayload () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80080007
00: F0 02 00 00 00 00 00 00
[HECI1] Got msg Success: 80CC0007
00: F0 82 00 00 32 0D 00 00 - 01 08 02 00 00 00 00 00
10: 01 05 02 00 91 03 00 42 - 01 02 02 00 00 92 31 31
20: 01 09 02 00 07 50 F6 21 - 01 01 03 02 0F 00 00 00
30: 23 00 9F 07 01 04 09 03 - FD 52 A0 98 F8 47 6B 93
40: DB C5 E9 CD 0C A8 D5 C4 - 10 42 C7 54 24 A7 FD C0
50: 87 5B 22 68 98 FF 7C 3D - 01 07 04 02 00 00 00 00
60: 00 00 00 00 9B 01 00 00 - 01 0F 02 02 00 00 00 00
70: 05 01 02 02 01 00 01 00 - 05 03 04 02 0D 71 0C 7D
80: FF FF 08 06 10 00 0C 00 - 08 02 0A 03 3E 47 DD 60
90: DF 9A FF 93 58 1B FD 48 - 7A 2E FC D6 C1 33 7B F5
A0: 67 82 80 66 15 8C E7 1C - 0C BF 66 F3 3C DB D3 7C
B0: 01 0E 02 02 01 01 04 00 - 01 0D 05 02 04 00 00 00
C0: B5 00 D2 00 0C 00 0D 00 - DE 73 00 00
ReadMsg returned Success
MsgGetMbpAck->MkhiHeader.Fields.Command = 2
MsgGetMbpAck->MkhiHeader.Fields.IsResponse = 1
MsgGetMbpAck->MkhiHeader.Fields.Result = 0
No. of Mbp Entries: 13
MBP Item 0 header: 00020801
00: 00 00 00 00
MBP Item 1 header: 00020501
00: 91 03 00 42
MBP Item 2 header: 00020201
00: 00 92 31 31
MBP Item 3 header: 00020901
00: 07 50 F6 21
MBP Item 4 header: 02030101
00: 0F 00 00 00 23 00 9F 07
MBP Item 5 header: 03090401
00: FD 52 A0 98 F8 47 6B 93 - DB C5 E9 CD 0C A8 D5 C4
10: 10 42 C7 54 24 A7 FD C0 - 87 5B 22 68 98 FF 7C 3D
Unknown MBP Item 6 header: 02040701
MBP Item 7 header: 02020F01
00: 00 00 00 00
Unknown MBP Item 8 header: 02020105
MBP Item 9 header: 02040305
00: 0D 71 0C 7D FF FF 08 06 - 10 00 0C 00
Unknown MBP Item 10 header: 030A0208
MBP Item 11 header: 02020E01
00: 01 01 04 00
Unknown MBP Item 12 header: 02050D01
HECI reset: clearing buffer from MBP Sensitive data.
[HECI1] Resetting interface
[HECI1] - Step1 Enable Host Reset : H_CSR = 0x800E0E08
[HECI1] - Step2 Wait for reset started: H_CSR = 0x800E0E1C
[HECI1] - Step3 Wait for ME reset: ME_CSR_HA = 0x80000008
Install PPI: ED7C9CE9-5912-4807-EC90-2218BC7BFC6C
------------------------ MeBiosPayload Data Protocol Print Begin -----------------
Revision : 0x1
MeBiosPayload FwVersionName ---
ME FW MajorVersion : 15
ME FW MinorVersion : 0
ME FW HotfixVersion : 35
ME FW BuildVersion : 1951
MeBiosPayload FwCapabilities ---
FullMng : 0x0
StdMng : 0x0
Amt : 0x0
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x0
KVM : 0x0
DAL : 0x1
TLS : 0x1
WLAN : 0x0
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload FwFeaturesState ---
FullMng : 0x1
StdMng : 0x1
Amt : 0x1
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x1
KVM : 0x1
DAL : 0x1
TLS : 0x1
WLAN : 0x1
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload ME Platform Type ---
PlatformTargetUsageType : 0x1
SuperSku : 0x0
IntelMeFwImageType : 0x3
PlatformBrand : 0x0
MeBiosPayload UnconfigOnRtcClearState ---
UnconfigOnRtcClearData : 0x0
MeBiosPayload ArbSvnState ---
Flags : 0x1
MinCseArbSvn : 0x1
CurrCseArbSvn : 0x4
MeBiosPayload MeasuredBootSupport ---
MeasuredBoot : 0x0
Sensitive Data Revision : 0x1
MeBiosPayload Platform Key ---
Key[0x0] : 0x98A052FD
Key[0x1] : 0x936B47F8
Key[0x2] : 0xCDE9C5DB
Key[0x3] : 0xC4D5A80C
Key[0x4] : 0x54C74210
Key[0x5] : 0xC0FDA724
Key[0x6] : 0x68225B87
Key[0x7] : 0x3D7CFF98
------------------------ MeBiosPayload Data Protocol Print End -------------------
POSTCODE=<00009E22> - ME-BIOS: MBP Exit - Success.
MeDeviceConfigure () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
Current MeBiosBootPath - 0
ME FW HOB installed
ME FW HOB data updated
Current ME FW HOB data printed -
00: 04 00 A8 00 00 00 00 00 - 62 5E 88 52 4D 4C 46 95
10: 2D BA 2A 84 89 EE A8 A3 - 01 04 00 00 00 00 00 00
20: 55 02 00 90 06 01 10 80 - 20 00 00 00 00 40 00 00
30: 00 00 00 00 00 00 40 00 - 01 00 00 00 FF FF FF FF
40: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
50: FF FF FF FF 04 00 00 00 - 00 00 00 80 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 05 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00
[HECI2] Setting D0I3 bit
[HECI2] Function is disabled, can't set D0I3 bit!
Disabling CSME device 0:22:1
[HECI3] Setting D0I3 bit
[HECI3] D0I3C register = 00000015
Disabling CSME device 0:22:4
Disabling CSME device 0:22:3
Disabling CSME device 0:22:2
MeDeviceInit [HECI4] H: 00000000, L: FE600000
POSTCODE=<00009004> - ME Device Init
Program HECI MMIO address
[HECI4] Setting D0I3 bit
[HECI4] D0I3C register = 00000015
Disabling CSME device 0:22:5
MeDeviceConfigureInterrupts () for MeDev = 0
MeDeviceConfigureInterrupts () for MeDev = 1
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 2
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 3
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 4
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 5
MeDeviceConfigureInterrupts () exit (Device disabled)
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
MePostMemInit () - End
POSTCODE=<00009B00>
PchInit - Start
PchHsioMiscBiosProg() Start
Installing HSIO ChipsetInit SUS Table Data PPI
Install PPI: 97ED4E5D-01A5-4A3C-B7E9-1A4EA3DD23CE
PchHsioMiscBiosProg() End
ConfigureSata() Started (SATA controler index: 0)
EarlyConfigureSata() Started (SATA controller reg base: 0x000B8000)
EarlyConfigureSata() Ended (SATA controller reg base: 0x000B8000)
ConfigureSataAhci() Started (SATA controler index: 0)
ConfigureSataAhci() Ended (SATA controler index: 0)
ConfigureSata() Ended (SATA controler index: 0)
HybridStorageCheckAndConfigureClkreq Entry
HybridStorageCheckAndConfigureClkreq Exit
GbeInit() Start
GbePmcEnabled: 0
No FIA lanes assigned as GbE
GbeLaneNum: No lanes assigned
GbeRegionValid: 1
GbePresent: 0
LAN disabled
GbeInit() End
PchSpiExtendedBiosDecodeRangeInit - Extended BIOS decode range is disabled. Skipping initialization.
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
CridSupport = 0 20 20
PcieRpInit() Start
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 3 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 4 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 5 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 9 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 10 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 12 has a device attached.
PcieConfigureControllerBasePowerManagement(1)
PchPcieConfigureBasePowerManagement(1) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(2) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(3) Start
PchPcieConfigureBasePowerManagement(4) Start
PcieConfigureControllerBasePowerManagement(5)
PchPcieConfigureBasePowerManagement(5) Start
PchPcieConfigureBasePowerManagement(6) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(7) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(8) Start
Setting DLSULPPGE+DLSULDLSD.
PcieConfigureControllerBasePowerManagement(9)
PchPcieConfigureBasePowerManagement(9) Start
PchPcieConfigureBasePowerManagement(10) Start
PchPcieConfigureBasePowerManagement(11) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(12) Start
WaitForLinkActive, RP mask to wait for = 0x00000B1C
WaitForLinkActive, all RPs done, lost 0ms waiting
DisablePcieRootPort(1) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(2) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (3) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:2
RecursiveBusAssignmentE 0:1C:2 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:2 -> 0,2,2
RecursiveMpsCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:2
RecursiveCccConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (4) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:3
RecursiveBusAssignmentE 0:1C:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:3 -> 0,2,2
RecursiveMpsCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:3
RecursiveCccConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (5) Start
VID: 11F8 DID: 4036 MLS: 4
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
Starting Equalization with following settings:
EQCFG1: 0x00001100
EQCFG2: 0x00042002
HAEQ: 0x00000E00
HW EQ finished, results:
EQCFG1: 0x00001100
LSTS2: 0x001F
Training time = 15510us
5.0 FOM Scoreboard:
0:019 1:018 2:020
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
5.1 FOM Scoreboard:
0:023 1:020 2:023
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
5.2 FOM Scoreboard:
0:017 1:016 2:019
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
5.3 FOM Scoreboard:
0:022 1:019 2:020
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00022104 0x00211183 0x00100103
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:4
RecursiveBusAssignmentE 0:1C:4 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentE 2:0:0 -> 2,3,A
IsPcieDevice 03:00:00 - yes
RecursiveBusAssignmentE 3:0:0 -> 3,4,A
RecursiveBusAssignmentL 3:0:0 -> 3,4,4
IsPcieDevice 03:01:00 - yes
RecursiveBusAssignmentE 3:1:0 -> 3,5,A
RecursiveBusAssignmentL 3:1:0 -> 3,5,5
IsPcieDevice 03:02:00 - yes
RecursiveBusAssignmentE 3:2:0 -> 3,6,A
RecursiveBusAssignmentL 3:2:0 -> 3,6,6
IsPcieDevice 03:03:00 - yes
RecursiveBusAssignmentE 3:3:0 -> 3,7,A
RecursiveBusAssignmentL 3:3:0 -> 3,7,7
IsPcieDevice 03:04:00 - yes
RecursiveBusAssignmentE 3:4:0 -> 3,8,A
IsPcieDevice 08:00:00 - yes
RecursiveBusAssignmentL 3:4:0 -> 3,8,8
RecursiveBusAssignmentL 2:0:0 -> 2,3,8
RecursiveBusAssignmentL 0:1C:4 -> 0,2,8
RecursiveMpsCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsCheck 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsCheck 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsCheck 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsCheck 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsCheck 8:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsConfiguration 8:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveIoApicCheck 3:0:0
HasChildBus03:00:00: yes, 4
IoApic status 0 @0:3:0:0
IsPcieDevice 03:01:00 - yes
RecursiveIoApicCheck 3:1:0
HasChildBus03:01:00: yes, 5
IoApic status 0 @0:3:1:0
IsPcieDevice 03:02:00 - yes
RecursiveIoApicCheck 3:2:0
HasChildBus03:02:00: yes, 6
IoApic status 0 @0:3:2:0
IsPcieDevice 03:03:00 - yes
RecursiveIoApicCheck 3:3:0
HasChildBus03:03:00: yes, 7
IoApic status 0 @0:3:3:0
IsPcieDevice 03:04:00 - yes
RecursiveIoApicCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveIoApicCheck 8:0:0
HasChildBus : : : no
IoApic status 0 @0:8:0:0
IoApic status 0 @0:3:4:0
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:4
RecursiveCccConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCccConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveCccConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveCccConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveCccConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveCccConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveCccConfiguration 8:0:0
HasChildBus : : : no
IsPcieDevice 08:00:00 - yes
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
DisablePcieRootPort(6) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(7) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(8) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (9) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:0
RecursiveBusAssignmentE 0:1D:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:0 -> 0,2,2
RecursiveMpsCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:0
RecursiveCccConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (10) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:1
RecursiveBusAssignmentE 0:1D:1 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:1 -> 0,2,2
RecursiveMpsCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:1
RecursiveCccConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
DisablePcieRootPort(11) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (12) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:3
RecursiveBusAssignmentE 0:1D:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:3 -> 0,2,2
RecursiveMpsCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:3
RecursiveCccConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
PcieRpInit() End
POSTCODE=<00009B04>
[Usb2PhyProgramming] Start
USB2 PHY is accesible
Programming USB2 PHY register 0x4001 to 0x2F3DB806
Warning! Data mismatch after write. Read 2E3DB806
Programming USB2 PHY register 0x402B to 0x006A4005
Programming USB2 PHY register 0x402C to 0x09A25380
Programming USB2 PHY register 0x7F04 to 0x0000C680
Programming USB2 PHY register 0x702C to 0x0088C200
[Usb2PhyClockDependentProgramming] Programming USB2 PHY parameters based on freq enum: 0
Programming USB2 PHY register 0x7000 to 0x64641E08
Programming USB2 PHY register 0x702C to 0x0088C200
Programming USB2 PHY register 0x7008 to 0x222B5A20
Programming USB2 PHY register 0x7014 to 0x59E94D18
Programming USB2 PHY register 0x7024 to 0x3001E800
### PpLane 1
Programming USB2 PHY register 0x4100 to 0xFC05B091
Programming USB2 PHY register 0x4126 to 0x4382924B
Programming USB2 PHY register 0x4108 to 0x0000DAD0
### PpLane 2
Programming USB2 PHY register 0x4200 to 0xFC05B091
Programming USB2 PHY register 0x4226 to 0x4382924B
Programming USB2 PHY register 0x4208 to 0x0000DAD0
### PpLane 3
Programming USB2 PHY register 0x4300 to 0xFC05B091
Programming USB2 PHY register 0x4326 to 0x4382924B
Programming USB2 PHY register 0x4308 to 0x0000DAD0
### PpLane 4
Programming USB2 PHY register 0x4400 to 0xFC05B091
Programming USB2 PHY register 0x4426 to 0x4382924B
Programming USB2 PHY register 0x4408 to 0x0000DAD0
### PpLane 5
Programming USB2 PHY register 0x4500 to 0xFC05B091
Programming USB2 PHY register 0x4526 to 0x4382924B
Programming USB2 PHY register 0x4508 to 0x0000DAD0
### PpLane 6
Programming USB2 PHY register 0x4600 to 0xFC05B091
Programming USB2 PHY register 0x4626 to 0x4382924B
Programming USB2 PHY register 0x4608 to 0x0000DAD0
### PpLane 7
Programming USB2 PHY register 0x4700 to 0xFC05B091
Programming USB2 PHY register 0x4726 to 0x4382924B
Programming USB2 PHY register 0x4708 to 0x0000DAD0
### PpLane 8
Programming USB2 PHY register 0x4800 to 0xFC05B091
Programming USB2 PHY register 0x4826 to 0x4382924B
Programming USB2 PHY register 0x4808 to 0x0000DAD0
### PpLane 9
Programming USB2 PHY register 0x4900 to 0xFC05B091
Programming USB2 PHY register 0x4926 to 0x4382924B
Programming USB2 PHY register 0x4908 to 0x0000DAD0
### PpLane 10
Programming USB2 PHY register 0x4A00 to 0xFC05B091
Programming USB2 PHY register 0x4A26 to 0x4382924B
Programming USB2 PHY register 0x4A08 to 0x0000DAD0
POSTCODE=<00009B05>
POSTCODE=<00009B06>
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0xA0ED
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
xHCI: PEI phase PDO programming
xHCI: Usb2DisabledPorts = 0x100
xHCI: Usb3DisabledPorts = 0x0
HsPortCount 12, SsPortCount 4
XhciUsb2PdoMask 0x00000FFF, XhciUsb3PdoMask 0x0000000F
XhciUsb2Pdo 0x00000100, XhciUsb3Pdo 0x00000000
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 12
Test for XHCI_MEM_DAP_ESS_PORT
XhciConfigure() - End
POSTCODE=<00009B08>
xDCI Controller DID: 0xA0EE
xDCI: Device enabled
POSTCODE=<00009B0A>
Dmi14 R_PCH_OPDMI14_PCR_LPMC = 7E201500
Dmi14 R_PCH_OPDMI14_PCR_LCTL = 8
POSTCODE=<00009B0B>
POSTCODE=<00009B0C>
POSTCODE=<00009B0D>
------------------ IRQ Usage ------------------
IRQxxx USED
IRQ000 0
IRQ001 0
IRQ002 0
IRQ003 0
IRQ004 0
IRQ005 0
IRQ006 0
IRQ007 0
IRQ008 0
IRQ009 0
IRQ010 0
IRQ011 0
IRQ012 0
IRQ013 0
IRQ014 0
IRQ015 0
IRQ016 1
IRQ017 1
IRQ018 1
IRQ019 1
IRQ020 1
IRQ021 1
IRQ022 1
IRQ023 1
IRQ024 1
IRQ025 1
IRQ026 0
IRQ027 1
IRQ028 0
IRQ029 1
IRQ030 1
IRQ031 1
IRQ032 1
IRQ033 1
IRQ034 1
IRQ035 1
IRQ036 1
IRQ037 1
IRQ038 1
IRQ039 0
IRQ040 1
IRQ041 0
IRQ042 1
IRQ043 1
IRQ044 0
IRQ045 0
IRQ046 0
IRQ047 0
IRQ048 0
IRQ049 0
IRQ050 0
IRQ051 0
IRQ052 0
IRQ053 0
IRQ054 0
IRQ055 0
IRQ056 0
IRQ057 0
IRQ058 0
IRQ059 0
IRQ060 0
IRQ061 0
IRQ062 0
IRQ063 0
IRQ064 0
IRQ065 0
IRQ066 0
IRQ067 0
IRQ068 0
IRQ069 0
IRQ070 0
IRQ071 0
IRQ072 0
IRQ073 0
IRQ074 0
IRQ075 0
IRQ076 0
IRQ077 0
IRQ078 0
IRQ079 0
IRQ080 0
IRQ081 0
IRQ082 0
IRQ083 0
IRQ084 0
IRQ085 0
IRQ086 0
IRQ087 0
IRQ088 0
IRQ089 0
IRQ090 0
IRQ091 0
IRQ092 0
IRQ093 0
IRQ094 0
IRQ095 0
IRQ096 0
IRQ097 0
IRQ098 0
IRQ099 0
IRQ100 0
IRQ101 0
IRQ102 0
IRQ103 0
IRQ104 0
IRQ105 0
IRQ106 0
IRQ107 0
IRQ108 0
IRQ109 0
IRQ110 0
IRQ111 0
IRQ112 0
IRQ113 0
IRQ114 0
IRQ115 0
IRQ116 0
IRQ117 0
IRQ118 0
IRQ119 0
IRQ120 0
IRQ121 0
IRQ122 0
IRQ123 0
IRQ124 0
IRQ125 0
IRQ126 0
CnviInit() - Start
CNVi has been fused out
ThcInit() Start
ThcInit() End
POSTCODE=<00009B14>
IshInit() Start
POSTCODE=<00009B15>
Retention is not supported on this stepping overriding the Retention transition times to 0 in VCCIN_AUX_CFG1
SerialIoInit() Start
SerialIoSpiInit() Start
SerialIoSpiInit() End
SerialIoI2cInit() Start
SerialIoI2cInit() End
SerialIoUartInit() Start
SerialIoUartInit() End
SerialIoInit() End
InstallI2cMasterPpi End
Install PPI: B3BFAB9B-9F9C-4E8B-AD37-7F8C51FC6280
[ConfigureEspi] Entry.[ConfigureEspi] eSPI is disabled through strapIEH: Workaround to mask global error registers and clear error status
HybridStorageDynamicDetectionAndConfig() Start
HybridStorage Policy not enabled
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
PsfConfigurePcieGrantCounts() Start
SPA[0] - DGCR12 = 1
SPA[0] - PG1_TGT0 = 1
SPA[1] - DGCR13 = 1
SPA[1] - PG1_TGT1 = 1
SPA[2] - DGCR14 = 1
SPA[2] - PG1_TGT2 = 1
SPA[3] - DGCR15 = 1
SPA[3] - PG1_TGT3 = 1
SPB[0] - DGCR16 = 4
SPB[0] - PG1_TGT5 = 4
SPC[0] - DGCR20 = 1
SPC[0] - PG1_TGT10 = 1
SPC[1] - DGCR21 = 1
SPC[1] - PG1_TGT11 = 1
SPC[2] - DGCR22 = 1
SPC[2] - PG1_TGT12 = 1
SPC[3] - DGCR23 = 1
SPC[3] - PG1_TGT13 = 1
PsfConfigurePcieGrantCounts() End
ChipsetInitSync() Start
Get CSME ChipsetInit Version Data from MBP
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0x7D0C
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 1
//Base CRC Valid: 1
BIOS Computed SUS Table CRC: 7D0C
[HECI1] MeMode 0 (Hfsts1: 90000255)
No ChipsetInit BIOS <-> CSME sync required as all CRCs and Valid bits match
ChipsetInitSync() End
One of the modphy lanes assigned to usb skipping setting MPLSPDDGE and MLSPDDGE
DCI Debug Disabled
PmcSendCommand(): IPC_COMMAND=0xA1, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x10000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
CnviConfigureBt() - Start
CNVi has been fused out
POSTCODE=<00009B7F>
PchInit - End
PostMem SaInit Entry
POSTCODE=<00009A00>
PostMemCheckAndForceVddOn start
PostMemCheckAndForceVddOn end status - 0x0
DeviceConfigure Start
POSTCODE=<00009A01>
Sa Register Mirror Start
Programming GGC
Programming TOUUD
Programming TOLUD
Programming BDSM
Programming BDSM 0x7C000001
Programming BGSM
Programming BGSM 0x7B800001
Programming TSEG
Install PPI: 8E3BB474-0545-4902-86B0-6CB5E264B4A5
Initializing SA GNA device
POSTCODE=<00009A16>
CpuDmi16SpeedChange Start
CpuDmi16SpeedChange not supportedInitializing ConfigureCpuTraceHub
POSTCODE=<00009A22>
ConfigureCpuTraceHub () - Start
TraceHubDataHob->EfiHobGuidType.Name: F1187E54-995F-49D9-ACEE-C534F45A18C7
TraceHubDataHob @ 76CACC40
TraceHubDataHobSize - HobHeader: 8
TraceHubDataHobSize: 20
Program MTB/SW/RTIT BAR
Enable MSE
Clearing LPP_CTL_LPME
LPP_CTL = 113, SCRPD0 = 0 EnableMode 0
CPU Intel Trace Hub is in Low Power Mode or not connected and is disabled by SETUP menu . Stop the initialization.
Initializing TCSS
POSTCODE=<00009A31>
[TCSS] TcssInit() - Start
[TCSS] IomReadyCheck - Start
IOMReady bit = 1
IomReady bit updated to TCSS HOB
IOM version: 0x11001600; Engr version: 0x00000000
TCSS HOB updated
[TCSS] IomReadyCheck - End
[TCSS] TcssRtd3Update - Start
TCSS RTD3: 0x1
[TCSS] TcssRtd3Update - End
[TCSS] TcssCstatelimit() - Start
IOM mailbox data = 0x0000000A
IOM mailbox command = 0x80000007
Override MailBoxData from 8 to 10
[TCSS] System Supported TC State = 0x0000000A
[TCSS] TcssCstatelimit() - End - Status Success
[TCSS] SaXdciIrq - Start
IOM mailbox data = 0x01000100
IOM mailbox command = 0x00000102
SA xDCI Int pin: 0x01
SA xDCI Irq: 0x10
[TCSS] SaXdciIrq - End - Status
[TCSS] IomSetTcColdPowerSavingFactor - Start
IOM mailbox data = 0x00000A32
IOM mailbox command = 0x00000009
IomSetTcColdPowerSavingFactor - End - Status Success
[TCSS] TcssInitAuxHslOri() - Start
Origional AuxOriReg: 0x00000000
IomConfig->IomOverrides.AuxOri: 0x00000000
Update AuxOri: 0x80000000
Origional HslOriReg: 0x00000000
IomConfig->IomOverrides.HslOri: 0x00000000
Update HslOri: 0x80000000
[TCSS] TcssInitAuxHslOri() - End
[TCSS] ConfigureTbtPcieSegFuncMap() - Start
TcssHob->TcssData.PcieMultipleSegmentEnabled = 0
R_SA_PCIESEGMAP = 0, R_SA_PCIEFUNCMAP = 688
[TCSS] ConfigureTbtPcieSegFuncMap() - End
SaPcieInit
SaPcieInit End
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0x9A13
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 1
Test for XHCI_MEM_DAP_ESS_PORT
HDCI Debug Disabled
XhciConfigure() - End
xDCI Controller DID: 0x9A15
xDCI: Device enabled
[TCSS]PmcTcssBiosInitDone: Sending TCSS BIOS Init Done message to PMC 0x01
PmcSendCommand(): IPC_COMMAND=0xA5, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000003, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
[TCSS] TcssIomVccStInfoUpdate - Start
TCSS IOM VccSt: 0x1
[TCSS] TcssIomVccStInfoUpdate - End
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Install PPI: 5AD291B8-ACE4-416A-B750-076359FCC15B
[TCSS] TcssInit() - End
PciExpress PostMem Initialization
POSTCODE=<00009A20>
CPU PcieRpInit() Start
---- RpIndex mapping ----
---- RpIndex = 0 ; PortId = 1 => PEG060 ----
MaxCpuPciePortNum = 1
**** RpIndex = 0 ****
Slot implemented bit is set!
Port 1 has a device attached.
CLKREQ is not assigned, disabling power management for RP 0.
CLKREQ is not connected, clear RpClkreqMask!
Configure power management applicable to all port including disabled ports!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Clock gating is enabled!
Setting PTOCGE
Power gating is enabled!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Root port Clock gating is enabled!
RpIndex 0
Offset[E0] 917400
Offset[E0] 917700
Root port Power gating is enabled!
Load Fia Programming - FIA programming Enabled!
CpuFiaFinalizeConfigurationAndLock - SB_PORTID_PCIE_FIA0
Offset 0x00[CC] = 0x18000
Offset 0x20[PLLCTL] = 0x40000000
Offset 0x40[PMC] = 0x100008
Offset 0x48[PGCUC] = 0x0
CpuPcieWaitForLinkActive, RP mask to wait for = 0x00000001
CpuPcieWaitForLinkActive, all RPs done, lost 0ms waiting
CpuPcieSip16PtmInit for RpBase 30000
PTMCAPR before write in sip16 = 410
PTMCAPR after write in sip16 = 416
PTMCTLR before write RS and PTME = 0
PTMCTLR after write RS and PTME = 3
FomsCp from policy : 0, RpIndex : 0
FomsCpValue : 0
FomsCp after read : 0
Call InitCpuPcieSingleRootPort for Portid 1
InitCpuPcieSingleRootPort (1) Start
Target Link Speed = 1
Set the Completion Retry Status Replay Enable, Dxx:Fn + 320h[22]
CpuPcieGetDeviceInfo Start
VID: 1D79 DID: 2263 MLS: 3
CpuPcieGetDeviceInfo End
End point detected with Gen3 capability!!!
Root port is Gen3/4 capable!!!
CpuPcieMaxPayloadMax = 3
Upstream Non-Posted Request Delay set to 00b which puts delay of 0 clocks
Set R_PCIE_DCAP[B_PCIE_DCAP_MPS] = 1
Coalescing Start
COCTL = 1F40F
R_PCIE_ACRG3 = 200008
Coalescing End
R_PCIE_DCAP2 after programming Atomics and 10-Bit Requester Supported = 10BF7
R_PCIE_DCTL2 after write = 400
R_PCIE_PCIERTP1 after write = B7E5BB
R_PCIE_PCIERTP2 after write = C97
R_PCIE_ACGR3S2 after setting SRT = 2ECF4
R_PCIE_PWRCTL after write = 28004
R_PCIE_PCIECFG2 after write = 63D960DB
R_PCIE_PCIEDBG after write = 8004020
R_PCIE_PCIEPMECTL2 after write = 59F0
Set LCAP APMS according to platform policy 2
Completion timeout = 0
CpuPcieSip16InitCapabilityList start
CpuPcieSip16InitCapabilityList end
Perform equalization for Gen3/Gen4 capable ports
CpuPcieLinkEqualization Start!
Link Speed = 1
CpuPcieDoGen3HardwareEq
CpuPcieDoGen3HardwareEq Start!
LSTS2: 0x0001
Gen3 Preset/Coefficient Mode Selection 1
TxOverride Disabled
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGen3InitializePresets Start!
Port 0 list 0: (3,4)
Port 0 list 1: (3,4)
Port 0 list 2: (0,0)
Port 0 list 3: (0,0)
Port 0 list 4: (0,0)
RTPCL0 = 0x80103103
RTPCL1 = 0x00000000
RTPCL2 = 0x00000000
RTPCL3 = 0x00000000
CpuPcieGen3InitializePresets End!
Gen3 TS Lock Timer = 3
Gen3 PCET timeout = 8 ms
Number Of Preset/Coefficient List = 2
CpuPcieDoGen3HardwareEq End!
CpuPcieLinkEqualization End!
Root PCI-E Powermanagement SCI Enable
Initialize downstream devices
RootportDownstreamConfiguration 6:0
RecursiveBusAssignmentE 0:6:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:6:0 -> 0,2,2
RecursiveMpsCheck 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveCccConfiguration 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
R_PCIE_RXMC1 before write : 0
R_PCIE_RXMC1 after write : 7FF02810
RXMC2 : D651CA
Program TLS to 3
Retrain the link if device is present!
CpuPcieWaitForHwEqDone Begin:
mDoGen3HwEqRpMask = 1
mDoGen4HwEqRpMask = 0
mDoGen5HwEqRpMask = 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
EQCFG1: 0x00801100
LSTS2: 0x001F
Training time = 0us
Controller : 0
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.0 FOM Scoreboard0:109 1:111 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E0000000
MM.MSS value: 0x00757500
Lane 0 Best Coeffiecient: (0xFF, 0xFF)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.1 FOM Scoreboard0:110 1:108 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E1000000
MM.MSS value: 0x00002040
Lane 1 Best Coeffiecient: (0x74, 0xAB)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.2 FOM Scoreboard0:111 1:107 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E2000000
MM.MSS value: 0x00000000
Lane 2 Best Coeffiecient: (0x0, 0x0)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.3 FOM Scoreboard0:108 1:110 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E3000000
MM.MSS value: 0x00000000
Lane 3 Best Coeffiecient: (0x0, 0x0)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
DekelFwVersion 64140E1B
Dekel FW version : 11.225
Lock the registers
CpuPcieRpSetSecuredRegisterLock () Start!
R_PCIE_LPCR before write = 0
Serl from policy: 1
R_PCIE_LPCR after write = 1000100
CpuPcieRpSetSecuredRegisterLock () End!
CPU PcieRpInit() End
UpdateSaHobPostMem Start
POSTCODE=<00009A02>
PostMem CPU PCIE HOB updated
PostMem SA Data HOB updated
Initializing VMD
POSTCODE=<00009A33>
-----------------VmdInit Start ----------------
VmdInfoHob->EfiHobGuidType.Name: CCD0306E-7FA1-4DF5-9999-C1F89A1D1BA9
VmdInfoHob @ 76CACC60
&(VmdInfoHob->VmdPortInfo) @ 76CACC78
VmdHobSize - HobHeaderSize: 174
VmdInfoSize: 174
VMD: VmdDetectPcieStorageDevices Start
VMD: Checking device connection on PEG ports
Read DEVEN register
PegDevenReg = 2000
VMD: Storage device found on Bus/device/Func 0/6/0 DevId 0x2263 Rp Index 1
VMD: Checking device on PCH PCIe ports
VMD: Checking the availability of SATA controller(0/23/0) for sata devices
VMD: Sata device found DevId 0xA0D3
Dumping port info
RpDev 6 RpFunc 0 DevId 0x2263 RpIndex 1
RpDev 23 RpFunc 0 DevId 0xA0D3 RpIndex 0
VMD Device has been disabled
Initializing Pavp
POSTCODE=<00009A32>
Initializing PAVP
CpuPcieRpConfigureRpfnMapping () Start!
Initializing IPU device
POSTCODE=<00009A14>
IpuInit Begins
IPU Fused off
IPU is not supported
Clear IPU bit at DEVEN regiser
[TCC] TccInit() - Start
TCC Tune system
TCC CacheCfg subregion is not valid
L2CatEntries:0x4,
CacheId:0x0, Mask[0]: 0xFFFFF,
CacheId:0x1, Mask[0]: 0xFFFFF,
CacheId:0x2, Mask[0]: 0xFFFFF,
CacheId:0x3, Mask[0]: 0xFFFFF,
L3CatEntries:0x1,
CacheId:0x0, Mask[0]: 0xFFF,
MaxIaL2Cos: 8
TCC RTCT hob data @0x76CACF80 with size 0x1BC
Cache Prefetecher Tuning:
IfuTrainEnable: 0
ConvertItomToRfo: 0
[TCC] TccInit() - End
CpuInit Start
POSTCODE=<00009C15>
Cpu Initialization in PostMem start
CollectProcessorFeature Start
POSTCODE=<00009C17>
ProgramProcessorFeature Start
POSTCODE=<00009C18>
PmcIsPchPmTimerEnabled () = 1
TraceHubAcpiBaseAddress = 0
Initialize Processor Trace
Initialize Hardware Duty Cycle
Initialize Protected Processor Inventory Number (PPIN)
Program xAPIC
Initialize Monitor Wait register
Initialize Machine check registers
Initialize miscellaneous processor functions
(MAILBOX) Mailbox Write Command = 1Dh
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 1Ch
(MAILBOX) Mailbox Status = 00h
Initialize AVX Instructions
ProgramProcessorFeature Done
POSTCODE=<00009C19>
CpuInitPreResetCpl Start
POSTCODE=<00009C20>
ProcessorsPrefetcherInitialization Start
POSTCODE=<00009C21>
InitRatl Start
POSTCODE=<00009C22>
TCC activation programmable = 1
ConfigurePidSettings Start
POSTCODE=<00009C24>
SetBootFrequency Start
POSTCODE=<00009C25>
BiosGuardInit Start
POSTCODE=<00009C28>
BIOS Guard Module is Disabled
CpuInitPreResetCpl Done
POSTCODE=<00009C3F>
InitializeCpuDataHob Start
POSTCODE=<00009C43>
InitializeCpuDataHob Done
POSTCODE=<00009C44>
Cpu Initialize performance and power management features before RESET_CPL Done
CpuInit Done
POSTCODE=<00009C4F>
ConfigureSvidVrs Start
POSTCODE=<00009C23>
VR: Configure SVID Vr's
(MAILBOX) Mailbox Write Command = WRITE_PSYS_PMAX_CMD
(MAILBOX) PsysPmax = 172 (1/8 Watt)
(MAILBOX) Mailbox Write Data = 1376
(MAILBOX) Mailbox Write Command = 80000B18h
(MAILBOX) Mailbox Write Data = 560h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = READ_VR_STRAP_CONFIG_CMD
(MAILBOX) Mailbox Read Command = 80000018h
(MAILBOX) Mailbox Status = 00h
VR: VrTopology data = 0x9
VR Type 0 = SVID, VR Type 1 = non-SVID
VCCIN VR Address = 0x0
VCCIN VR Type = 0x0
VR: Update VR overrides
VR: SelectedCtdpLevel = 0
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
VR: Cpu Identifier = 25
VR Address for Vr Index 0 = 0x0
VR SvidEnabled for Vr Index 0 = 0x1
Override IccMax[0] = 104
Override TdcCurrentLimit[0] = 158
Override TdcEnable[0] = 1
Override AcLoadline[0] = 1B8
Override DcLoadline[0] = C8
(MAILBOX) Mailbox Write Command = WRITE_ACDC_LOADLINE_CMD
(MAILBOX) AcLoadline = 440 (1/100 mOhms)
(MAILBOX) DcLoadline = 200 (1/100 mOhms)
(MAILBOX) Mailbox Write Data = 137433606
(MAILBOX) Mailbox Write Command = 80000218h
(MAILBOX) Mailbox Write Data = 8311206h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_PSI_CUTOFF_CMD
(MAILBOX) Psi1Threshold = 80 (1/4 Amp)
(MAILBOX) Psi2Threshold = 20 (1/4 Amp)
(MAILBOX) Psi3Threshold = 4 (1/4 Amp)
(MAILBOX) Psi3Enable = 1, Psi4Enable = 1
(MAILBOX) Mailbox Write Data = 4214864
(MAILBOX) Mailbox Write Command = 80000318h
(MAILBOX) Mailbox Write Data = 405050h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_IMON_CONFIG_CMD
(MAILBOX) ImonOffset = 0 (1/1000)
(MAILBOX) ImonSlope = 0 (1/100)
(MAILBOX) Mailbox Write Data = 0
(MAILBOX) Mailbox Write Command = 80000418h
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) PCODE Mailbox Write Command = WRITE_VR_ICC_MAX_CMD
(MAILBOX) IccMax = 260 (1/4 A)
(MAILBOX) Mailbox Write Command = 80000618h
(MAILBOX) Mailbox Write Data = 104h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_VR_TDC_CONFIG_CMD
(MAILBOX) TdcPowerLimit = 344 (1/8A)
(MAILBOX) Mailbox Write Command = 8000001Ah
(MAILBOX) Mailbox Write Data = 828158h
(MAILBOX) Mailbox Status = 00h
VR SvidEnabled = 0x1
VR: VR Topology data = 0x76C8F100
VR Type 0 = SVID, VR Type 1 = non-SVID
EncodedSpectrum - 8
AmtPostMemInit() - Start
IntelMeFwImageType = 3
AmtPostMemInit() - End
Initializing VtdLateInit
POSTCODE=<00009A37>
VtdLateInit
Processor does not support Boot Guard.
Touud.Data = 0x0000000880400000
SaSecurityLock Start
POSTCODE=<00009A50>
SaSecurityLock End
POSTCODE=<00009A5F>
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
SiInit () - End
Loading PEIM 4E22BF36-C59D-47C4-9FD1-25A603D75958
Loading PEIM at 0x00076E3F000 EntryPoint=0x00076E3F3C5 SaInitFsp.efi
PROGRESS CODE: V03020002 I0
SaInitFsp Start
SaInitEntryPointFspCommon() Start
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Register for FspEventEndOfFirmware callback to set PAM lock before OS handoff
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
SaInitEntryPointFspCommon() End
SaInitFsp End
PROGRESS CODE: V03020003 I0
Loading PEIM 54D7CC18-492A-4B43-AD9E-A461D81F82B5
Loading PEIM at 0x00076E2D000 EntryPoint=0x00076E2D3C5 PchInitFspTgl.efi
PROGRESS CODE: V03020002 I0
PchInitEntryPointFsp() Start
PchInitEntryPointCommon() Start
PchInitEntryPointCommon() End
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
PchInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM EEE8D8EC-40C2-159B-71C7-8796EEEF3FBC
Loading PEIM at 0x00076E1B000 EntryPoint=0x00076E1B3C6 HeciInit.efi
PROGRESS CODE: V03020002 I0
Fsp MeInitEntryPointFsp() Start
Register PPI Notify: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
Fsp MeInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM 29CBB005-C972-49F3-960F-292E2202CECD
Loading PEIM at 0x00076E13000 EntryPoint=0x00076E133C9 FspNotifyPhasePeim.efi
PROGRESS CODE: V03020002 I0
The entry of FspNotificationPeim
Reinstall PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
PROGRESS CODE: V03020003 I0
Loading PEIM 4F1F379F-2A62-48BB-AC34-D3F135C6E2B7
Loading PEIM at 0x00076E0B000 EntryPoint=0x00076E0B346 PcatSingleSegmentPciCfg2Pei.efi
PROGRESS CODE: V03020002 I0
Install PPI: 057A449A-1FDC-4C06-BFC9-F53F6A99BB92
PROGRESS CODE: V03020003 I0
Loading PEIM 76ED893A-B2F9-4C7D-A05F-1EA170ECF6CD
Loading PEIM at 0x00076D7F000 EntryPoint=0x00076D7F4A9 IntelGraphicsPeim.efi
PROGRESS CODE: V03020002 I0
[INFO]:[PeiGraphicsEntryPoint()]:[PEI Module Name: Intel(R) Graphics Pei Module [17.0.1077] [DEBUG]]
[INFO]:[PeiGraphicsEntryPoint()]:[The value of DMI SIM Register[7:0] is 0]
[INFO]:[PeiGraphicsEntryPoint()]:[Simulation mode is disabled. Environment:HW]
Install PPI: 4EABCD09-43D3-4B4D-B73D-43C8D9899905
Install PPI: 776B0413-92BE-4EB3-BA42-4E75AB1934D9
Install PPI: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
PROGRESS CODE: V03020003 I0
DXE IPL Entry
FSP HOB is located at 0x76C90000
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: FFE09F2D
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F1F1D7
MeOnEndOfPei() enter
SendOptionalHeciCommand ()
HobSize for MePeiPreMemConfig: 2C
HobSize for MePeiConfig: 20
HobSize for AmtPeiConfig: 24
MeOnEndOfPei() done.
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F05165
[TCSS] TcssInitEndOfPei Entry
[TCSS] UpdateMgImrStatus Entry
R_IOM_CSME_IMR_MG_STATUS: 0xC00007F9
MG FW version: 0x07F9
Load MG FW success
[TCSS] UpdateMgImrStatus End
R_IOM_CSME_IMR_TBT_STATUS: 0x00000000
TBT FW version: 0x0000
TBT FW has not yet downloaded to IMR
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F01625
SiInitOnEndOfPei - Start
POSTCODE=<00009B40>
PchOnEndOfPei after memory PEI module - Start
PcieRpConfigureRpfnMapping () Start
SPA = 0x00033210
SPB = 0x000E7654
SPC = 0x00043210
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
POSTCODE=<00009B41>
PchThermalInit () Start
POSTCODE=<00009B42>
(WDT) WdtDisableBeforeS3Resume
HD Audio Class Code: 4.3.0.
HDA: Audio DSP Disabled
HDA: Power Gating and Clock Gating enabled
HDA: Configuration Lockdown
POSTCODE=<00009B47>
PchOnEndOfPei after memory PEI module - End
ConfigureMscForCpuAndPchTraceHub() Start
Trace Hub Memory is not allocated, skip configure MSC!!
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
ConfigureMscForCpuAndPchTraceHub() End
Removing PSF access: EPMASK offset 14, BIT26, endpoint: BA
Removing PSF access: EPMASK offset 14, BIT27, endpoint: BB
Removing PSF access: EPMASK offset 14, BIT28, endpoint: BC
Removing PSF access: EPMASK offset 14, BIT29, endpoint: BD
SetBiosDone Start
ReloadMicrocodePatch Start
POSTCODE=<00009C80>
Info: Skipping RaceConditionResponse per Policy
ReloadMicrocodePatch: second patch load started
LoadMicrocode: Before load, revision = 0xAC
LoadMicrocode: After load, revision = 0xAC
ReloadMicrocodePatch: Second patch load success.
ReloadMicrocodePatch Done
POSTCODE=<00009C81>
ApSafePostMicrocodePatchInit Start
POSTCODE=<00009C82>
ApSafePostMicrocodePatchInit Done
POSTCODE=<00009C83>
Set BIOS_RESET_CPL to indicate all configurations complete
POSTCODE=<00009A61>
GraphicsPmInit Start
POSTCODE=<00009A63>
iGfx Initialization start.
Initializing GT PowerManagement
----- GT PMInit() Begin------
Starting Register programming for GT PM.
Poll to verify Force Wake Acknowledge Bit, Result = 1
Enabled DOP clock gating
DSS Enable Read 0x3F Ssid 0x0
Entered RC6 state in idle mode
GT PM Init Done. Exiting.
ProgramCdClkReg: CdClock 0XFF CDCLK_CTL 0XB80518
iGfx Initialization end.
Initializing Pei Display
POSTCODE=<00009A03>
PeiDisplayInit: Begin
Register PPI Notify: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
Notify: PPI Guid: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B, Peim notify entry point: 76F05E37
PeiGraphicsNotifyCallback Entry
POSTCODE=<00009A04>
CallPpiAndFillFrameBuffer
POSTCODE=<00009A05>
CallPpiAndFillFrameBuffer: Begin
GraphicsPpiInit Start
POSTCODE=<00009A06>
[INFO]:[IsGraphicsDeviceSupported()]:[Supported Graphics Device ID Found]
[INFO]:[InitializeVbtManager()]:[VBT Base Address: 0x76A5B91C]
[INFO]:[InitializeVbtBlockPtrTable()]:[Vbt Version = 250]
[INFO]:[InitializePlatformParams()]:[Initializing Pei Platform Parameters.]
[INFO]:[InitializePlatformParams()]:[LID status from PEI platform policy unsupported.]
[INFO]:[InitializeGfxMmioBase()]:[GfxMmio Base address: 0xAF000000]
[INFO]:[InitializeGpuObject()]:[GfxDeviceId = 0x9A49 and GfxSteppingId = 0x1]
[INFO]:[InitializePchObject()]:[PCH Device Id = 0xA088 and Stepping value: 0x20]
[INFO]:[InitializePchObject()]:[PCH Type is TGL-LP.]
[INFO]:[InitializeGfxFrameBufferBase()]:[GFX FrameBuffer Base Address: 0xB0000000]
[INFO]:[InitializeDsmSizeVariable()]:[Amount of main memory pre-allocated by BIOS for GTT:8 MB]
[INFO]:[InitializeDsmSizeVariable()]:[GsmTableIndex as per BIOS is: 254 and GsmTableSize 60MB]
[INFO]:[InitializeVideoMemory()]:[BDSM value from MMIO offset 0x1080C0: 0x7C000000]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[CDCLK_CTL_REG[46000h] = 0xB80518.]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[Maximum supported Cdclk: 0x28C. SWF06: 0xB80518]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[InitializeCdClockFrequency()]:[Value of CD Freq Select: 0x0. Value of CD Freq Decimal: 0x518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[EnableCdClockPll()]:[Cdclk Enable register: 0xC0000022]
[INFO]:[InitializeCdClockFrequency()]:[Configuring the CD clock control register with the value: 0x380518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x33333300]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x706B4633]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 80]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0xB]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 70]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values from SAGV data0 : 0xB]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 1 : 33333300]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 2 : 706B4633]
[INFO]:[WatermarkInit()]:[Watermark Init is done]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP only.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 2/ Actual PchDdcNumber = 2]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 3/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-B]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[TglCheckComboPortLiveStatus()]:[Live State is set for Combo Port]
[INFO]:[ReadLttprCapabilities()]:[Reading LTTPR Caps for DdiType=1/AuxChannelNumber=16]
[INFO]:[DpInitializePort()]:[DPCD revision is 0x12]
[INFO]:[DpInitializePort()]:[Enable down spread for panel]
[INFO]:[DpLibInitializeDscCaps()]:[DSC is not supported for DPCD revision less than 1.4]
[INFO]:[CalculatePortMaxLinkRateDpcd()]:[Maximum port link rate DPCD : 0x14]
[INFO]:[DpInitializePort()]:[Panel Lane Count for DP is 4]
[INFO]:[DpInitializePort()]:[Maximum Link Rate for DP is 0xA]
[INFO]:[DpInitializePort()]:[Updated Panel Lane Count for DP is 4]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability Data type = EDID.]
[INFO]:[ReadEDID()]:[EDID size = 256]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability EDID Data size = 256 Bytes.]
==================== RAW EDID ==========================
00 FF FF FF FF FF FF 00 1E 6D CA 5B 01 01 01 01
01 1F 01 04 A5 3C 22 78 FA 7B 45 A4 55 4A A2 27
0B 50 54 A5 4B 00 71 4F 81 C0 81 00 81 80 95 00
90 40 A9 C0 B3 00 2A 44 80 A0 70 38 27 40 30 20
35 00 E0 0E 11 00 00 1E 02 3A 80 18 71 38 2D 40
58 2C 45 00 FE 22 11 00 00 1E 00 00 00 FD 00 38
4B 1E 55 12 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 46 48 44 0A 20 20 20 20 20 20 01 ED
02 03 1C F1 49 90 04 03 01 10 12 10 1F 13 23 09
07 07 83 01 00 00 65 03 0C 00 10 00 02 3A 80 18
71 38 2D 40 58 2C 45 00 FE 22 11 00 00 1E 01 1D
00 72 51 D0 1E 20 6E 28 55 00 FE 22 11 00 00 1E
8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 FE 22 11 00
00 18 00 00 00 FF 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E3
========================================================
[INFO]:[ParseDisplayIdTiledTopologyBlock()]:[Couldn't find Tiled Display Info Block.]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[DpDetectDisplayDevice()]:[DP Detection successful for port: Ddi-B]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 3]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 5]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetTimingFromDisplayIDExtention()]:[Finding extension block. Block size: 256]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetNativeModeFromEDID()]:[DTD 1 pixel clock is 174500KHz with multiplier 1]
[INFO]:[GetNativeModeFromEDID()]:[EDID Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[GetNativeModeFromEDID()]:[A supported DTD is found with pixel clock = 174500KHz]
[INFO]:[GetAspectRatioFromEdid()]:[Aspect ratio of Device type 3 is 78 ]
[INFO]:[GetNativeModeFromEDID()]:[Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[BuildSupportedModesTable()]:[GetNativeMode Status for dev 1 = Success. Resolution = 1920x1080 Mode Type = 1]
[INFO]:[SetMode()]:[FrameBufferBase = 0xB0000000]
[INFO]:[GetMaxFrameBufferSizeInBytes()]:[Frame Buffer Size in Bytes: 62914560]
[INFO]:[GalSetMode()]:[Mode set called for mode number: 1920x1080 with 4 bytes per pixel.]
[INFO]:[GalSetMode()]:[Current mode Type = 0 and modeType to set = 1]
[INFO]:[GalSetMode()]:[IsDynamicCdClockSupportEnabled = 0]
[INFO]: [GalSetMode()]:[IsHotPlugEventInProgress():0.]
[INFO]: [GalSetMode()]:[Clearing the frame buffer]
[INFO]:[ClearVideoMemory()]:[Starting clear memory from address 0xB0000000]
[INFO]:[ClearVideoMemory()]:[Video Memory size is 0x7E9000]
[INFO]:[GalAllocateGfxResources()]:[Allocating Plane1A PipeA and TranscoderA ]
[INFO]:[GalAllocateGfxResources()]:[Calling PllSelect.]
[INFO]:[PortPllSelect()]:[Display Type DP. Pll Selected DPLL0.]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPipeline=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPlane=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayTranscoder=0]
[INFO]:[CalculateWatermarkValues()]:[The memory latency value from mailbox is: 0x3]
[INFO]:[CalculateWatermarkValues()]:[HTotal Value 2080]
[INFO]:[CalculateWatermarkValues()]:[Adjusted Pixel Rate is 174500]
[INFO]:[CalculateWatermarkValues()]:[Calculated Pipe Line Time is 96]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 1 is 21]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 2 is 32]
[INFO]:[CalculateWatermarkValues()]:[Final Watermark Value is 32]
[INFO]:[CalculateWatermarkValues()]:[Calculated Blocks = 33]
[INFO]:[CalculateWatermarkValues()]:[Calculated Lines = 2]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence started for port: Ddi-B]
[INFO]:[DpEnableDisplayDevice()]:[Type C Port State: 0]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetPanelSupportedBpc()]:[Supported bpc: 2]
[INFO]:[DpEnableDisplayDevice()]:[Original Lane Count = 4,OriginalLinkRateInUseDpcd = 0A]
[INFO]:[DpEnableDisplayDevice()]:[LinkRate = 2700000]
[INFO]:[DpEnableDisplayDevice()]:[Dp Pixel Clock(in KHz) = 174500]
[INFO]:[CalculateMaxPixelClockValue()]:[Calculated MaxPixelClock value is 360000]
[INFO]:[DpLibGetPanelColorDepth()]:[Panel Color Depth Used: 24 Bpp]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[ConfigureComboPhyPortPll ()]:[DP mode index for ref: 38400 Khz and Clock :270000 Khz: 17]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
=========== Dumping DPLL0 registers ===============
PORT_PLL_CFG_CR0_REG [0x00164284]: 0x00E001A5
PORT_PLL_CFG_CR1_REG [0x00164288]: 0x00000088
DPCLKA_CFCR0_REG [0x00164280]: 0x01E17400
============= End of dumping ====================
[INFO]:[DpEnableDisplayDevice()]:[DP Pll configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[Enabled transport control and Buffer control]
[INFO]:[DpLibTrainLink()]:[Start Full Link Training]
[INFO]:[DpLibTrainLink()]:[DpcdRevision = 0x12]
[INFO]:[DpLibTrainLink()]:[Programmed 0xA to DPCD_LNK_BW_SET_REG(0x0100) for DP with Status = Success]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x1111]
[INFO]:[TrainPattern1()]:[Clock Recovery Done]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Lane Alignment Status = 0x1]
[INFO]:[TrainPattern2()]:[Channel Equalization Successful]
[INFO]:[TrainPattern2()]:[Channel Equalization Done and Vswing and PreEmphLevel are 0 and 0]
[INFO]:[DpEnableDisplayDevice()]:[Link training is completed successfully]
[INFO]:[GetWatermarkLineTime()]:[Returning line time value 60]
[INFO]:[DpEnableDisplayDevice()]:[DP pipe scalar is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP MNTu calculation is done]
[INFO]:[TranscoderSetTimings()]:[HActive = 1919/HTotal=2079, VActive = 1079/VTotal=1118]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[DP Main stream attributes are set]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder DDI function control is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder is enabled]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning blocks value 33]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning lines value 2]
[INFO]:[DpEnableDisplayDevice()]:[DP Plane is enabled]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence is completed for port: Ddi-B]
[INFO]:[GalFullSetModeEnableDevice()]:[FullSetMode completed.]
GraphicsPpiGetMode Start
POSTCODE=<00009A07>
[INFO]:[IntelPeiGraphicsGetMode()]:[Current Mode HRes = 1920 VRes = 1080]
MaxMode:0x1
Mode:0x0
SizeOfInfo:0x24
FrameBufferBase:0xB0000000
FrameBufferSize:0x7E9000
Version:0x0
HorizontalResolution:0x780
VerticalResolution:0x438
PixelFormat:0x1
PixelsPerScanLine:0x780
Install PPI: 590AD868-B0B1-4D20-91FF-C2A9D6888194
CallPpiAndFillFrameBuffer: End
PeiGraphicsNotifyCallback Exit
POSTCODE=<00009A0F>
Initializing CD Clock
POSTCODE=<00009A65>
SaPciPrint Start
POSTCODE=<00009A64>
Printing PCI space for device 0
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 14 9A 06 00 90 20 01 00 00 06 00 00 00 00
10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30 00 00 00 00 E0 00 00 00 00 00 00 00 00 00 00 00
40 01 10 DA FE 00 00 00 00 01 00 DC FE 00 00 00 00
50 C1 FE 00 00 11 A0 02 00 C7 00 A0 7F 01 00 00 7B
60 01 00 00 C0 00 00 00 00 01 00 DA FE 00 00 00 00
70 08 02 00 01 00 04 00 00 00 00 00 00 88 06 00 00
80 30 33 33 33 33 33 00 00 00 00 00 00 00 00 00 00
90 08 02 00 01 00 04 00 00 1A 02 00 01 00 04 00 00
A0 01 00 00 00 08 00 00 00 01 00 40 80 08 00 00 00
B0 01 00 00 7C 01 00 80 7B 01 00 00 7B 01 00 C0 7F
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 1A 02 00 01 00 04 00 00 00 00 00 00 00 00 00 00
E0 09 00 14 01 10 64 00 F0 08 00 24 90 0A 82 61 06
F0 00 80 1F 00 1D 0F 01 00 00 00 00 00 00 00 00 00
Printing PCI space for device 2
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 49 9A 07 00 10 00 01 00 00 03 00 00 00 00
10 04 00 00 AF 00 00 00 00 0C 00 00 B0 00 00 00 00
20 01 00 00 00 00 00 00 00 00 00 00 00 86 80 12 22
30 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
40 09 70 0C 01 0C 00 FF FF 00 00 00 00 00 00 00 00
50 C1 FE 00 00 11 20 00 00 00 00 00 00 00 00 00 00
60 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
70 10 AC 92 00 00 80 00 10 07 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 05 D0 00 01
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 01 00 00 7C 00 00 00 00 01 00 D9 FE 00 00 00 00
D0 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 C7 00 A0 7F 00 00 00 00 00 00 00 00 00 00 00 00
ConfigureHdAudioCodec() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
POSTCODE=<00009B0F>
DetectAndInitializeCodec() Start
SDI#0 has HD-Audio device.
SDI#0: Detected HD-Audio Codec 0x111D76E0 rev 0x03
ConfigureLinkFrequency() Start [SDI:0]
HDA: HDAudio-Link frequency configuration
SDI#0 Verb F00h ParamtererId = 16h response = 0x00000000
HDA: Codec Static Frequency Switching not supported!
ConfigureLinkFrequency() Exit, Status = Unsupported
Found verb table for vendor 0x111D devId 0x76E0 rev 0xFF (SDI:FF, size: 40 dwords)
SDI#1 has no HD-Audio device.
SDI#2 has HD-Audio device.
SDI#2: Detected HD-Audio Codec 0x80862812 rev 0x00
ConfigureLinkFrequency() Start [SDI:2]
HDA: iDisplay-Link frequency configuration
HDA: iDisplay-Link Static BCLK Frequency Switch ID = 4 - 96MHz
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00000004
ConfigureLinkFrequency() End
ConfigureLinkFrequency() Exit, Status = Success
Found verb table for vendor 0x8086 devId 0x2812 rev 0xFF (SDI:FF, size: 18 dwords)
DetectAndInitializeCodec() End, Status = Success
ConfigureHdAudioCodec() End, Status = Success
CpuPowerMgmtInit Start
POSTCODE=<00009C6A>
PeimInitializePowerMgmt Entry
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
EIST capable
HWP capable
Itbm: Intel Turbo Boost Max Technology 3.0 supported
InitPpm
POSTCODE=<00009C71>
PPM:: ConfigTDP Supported Levels=2
PPM:: ConfigTDP Nominal Ratio=28 Tdp=224
PPM:: ConfigTDP Level1 Ratio=12 Tdp=96
PPM:: ConfigTDP Level2 Ratio=18 Tdp=120
OverClocking Lock Bit is set. Disable the Lock and reset the system
(MAILBOX) Mailbox Read Command = 5h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 22Bh
(MAILBOX) Mailbox Status = 00h
Itbm: InitializeItbm()
Itbm: Itbm support is present in Silicon, but reference code policy is disabled
Itbm: Num of Processors = 0x8
Itbm: Highest performance of slowest core LowestMaxPerf = 0x0
MSR(1FC) before configuring C1E: 0x00240059
MSR(1FC) after configuring C1E: 0x00240059
Programming the C6/C7/C8/C9/C10 (MSR 0x60B, 0x60C ,0x633, 0x634, 0x635 IRTL if not auto.
TAR Ratio Replace at 6 with 14
CTDP Ratio Replace at 5 with 15
PROCHOT# OUT is disabled
PROCHOT# Response is enabled
PPM:: ConfigTDP MSR_CONFIG_TDP_CONTROL=0
PPM:: ConfigTDP MSR_TURBO_ACTIVATION_RATIO=14
PL3 MSR 615 Before Writing 0
PL3 MSR 615 After Writing 0
PL4 MSR 601 Before Writing 0
PL4 MSR 601 After Writing 3C8
DDR Power Limit 1 = 0
DDR Power Limit 2 = 0
New Platform Power Limit 1 0 watt (0 in CPU power unit)
Platform Power Limit 2 Power = 0 Watts (0 in CPU power unit)
CPU Post-Mem Exit
POSTCODE=<00009C7F>
EndOfPeiCheckAndForceVddOn start
EndOfPeiCheckAndForceVddOn end status - 0x0
[SA] BootMode = 0
Clear Temp Gfx BARs at End Of PEI.
BuildFviInfoHob(): Build Smbios FVI Data Hob
IomFwVersion = 11001600
MgFwVersion = 07F9
TbtFwVersion = 0000
InitializeSmbiosCacheInfoHobs() - Start
InitializeSmbiosCacheInfoHobs() - End
InitializeSmbiosProcessorInfoHob() - Start
(MAILBOX) Mailbox Read Command = 105h
(MAILBOX) Mailbox Status = 1Fh
(SMBIOS) BCLK frequency message 0, Status = Success
(SMBIOS) Setting to default BCLK frequency.
(MAILBOX) Mailbox Read Command = 1h
(MAILBOX) Mailbox Status = 1Fh
Turbo MaxSpeed 4400 MHz
InitializeSmbiosProcessorInfoHob() - End
SiInitOnEndOfPei - End
FSP is waiting for NOTIFY
FspSiliconInitApi() - [Status: 0x00000000] - End
PROGRESS CODE: V0000087F I0
Success
FspGfxHob->FrameBufferBase = 0xB0000000
Boot-time Cpu DTS: 0x1A4
Graphics Info: 1920 x 1080 x 32 @ 0xB0000000
MEM: 0000000000000000 00000000000A0000 00 1
MEM: 00000000000A0000 0000000000060000 00 2
MEM: 0000000000100000 00000000760B8000 00 1
MEM: 00000000761B8000 0000000000500000 01 2
MEM: 00000000766B8000 0000000000090000 00 3
MEM: 0000000076748000 0000000000008000 00 4
MEM: 0000000076750000 0000000000500000 00 2
MEM: 0000000076C50000 00000000003B0000 00 2
MEM: 0000000077000000 0000000004000000 00 2
MEM: 000000007B000000 0000000000800000 00 2
MEM: 000000007B800000 0000000000800000 00 2
MEM: 000000007C000000 0000000003C00000 00 2
MEM: 00000000FED20000 0000000000060000 00 2
MEM: 00000000FF530000 0000000000AD0000 00 2
MEM: 0000000100000000 0000000780400000 00 1
MP Init (Wakeup)
SMRR Base: 0x7B000006 Mask: 0xFF800000
MP Init (Run)
Detected 8 CPU threads
CPU 0 APIC ID: 0
CPU 1 APIC ID: 4
CPU 2 APIC ID: 2
CPU 3 APIC ID: 6
CPU 4 APIC ID: 1
CPU 5 APIC ID: 3
CPU 6 APIC ID: 5
CPU 7 APIC ID: 7
PCI Enum
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
PciBus: Discovered PPB @ [00|06|00]
PciBus: Discovered PCI @ [01|00|00]
PciBus: Discovered PCI @ [00|08|00]
PciBus: Discovered PCI @ [00|0A|00]
PciBus: Discovered PCI @ [00|0D|00]
PciBus: Discovered PCI @ [00|0D|01]
PciBus: Discovered PCI @ [00|10|00]
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
PciBus: Discovered PCI @ [00|14|01]
PciBus: Discovered PCI @ [00|14|02]
PciBus: Discovered PCI @ [00|15|00]
PciBus: Discovered PCI @ [00|15|01]
PciBus: Discovered PCI @ [00|16|00]
PciBus: Discovered PCI @ [00|17|00]
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [02|00|00]
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [03|00|00]
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [05|00|00]
PciBus: Discovered PPB @ [05|01|00]
PciBus: Discovered PPB @ [05|02|00]
PciBus: Discovered PPB @ [05|03|00]
PciBus: Discovered PPB @ [05|04|00]
PciBus: Discovered PCI @ [0A|00|00]
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0B|00|00]
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0C|00|00]
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0D|00|00]
PciBus: Discovered PCI @ [00|1E|00]
PciBus: Discovered PCI @ [00|1E|03]
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
PciBus: Discovered PCI @ [00|1F|04]
PciBus: Discovered PCI @ [00|1F|05]
DumpPciResAllocTable: NumOfEntries 1
Bus : 0 - FF
Io : 2000 - FFFF
Mem32: 80000000 - FFFFFFFF
Mem64: 1000000000 - 1800000000
PCI(00,00,00)
PCI(00,02,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000080000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[1].TYP = 4
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000090000000 BAR[1].LEN = 0000000010000000 BAR[1].ALN = 000000000FFFFFFF
BAR[2].TYP = 1
BAR[2].OFF = 0x20
BAR[2].BAS = 0000000000002000 BAR[2].LEN = 0000000000000040 BAR[2].ALN = 000000000000003F
PCI(00,06,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081F00000 BAR[2].LEN = 0000000000100000 BAR[2].ALN = 00000000000FFFFF
PCI(01,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F00000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
PCI(00,08,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082040000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,0A,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082020000 BAR[0].LEN = 0000000000008000 BAR[0].ALN = 0000000000007FFF
PCI(00,0D,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082010000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,0D,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081200000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203F000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,10,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203E000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,10,05)
PCI(00,14,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082000000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,14,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081000000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203D000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,14,02)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008202C000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203C000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,15,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203B000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,15,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203A000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,16,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082039000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,17,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082030000 BAR[0].LEN = 0000000000002000 BAR[0].ALN = 0000000000001FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x14
BAR[1].BAS = 0000000082038000 BAR[1].LEN = 0000000000000100 BAR[1].ALN = 0000000000000FFF
BAR[2].TYP = 1
BAR[2].OFF = 0x18
BAR[2].BAS = 0000000000002080 BAR[2].LEN = 0000000000000008 BAR[2].ALN = 0000000000000007
BAR[3].TYP = 1
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000000002088 BAR[3].LEN = 0000000000000004 BAR[3].ALN = 0000000000000003
BAR[4].TYP = 1
BAR[4].OFF = 0x20
BAR[4].BAS = 0000000000002060 BAR[4].LEN = 0000000000000020 BAR[4].ALN = 000000000000001F
BAR[5].TYP = 3
BAR[5].OFF = 0x24
BAR[5].BAS = 0000000082037000 BAR[5].LEN = 0000000000000800 BAR[5].ALN = 0000000000000FFF
PCI(00,1C,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081D00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(02,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081D00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081E00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081B00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(03,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081B00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081C00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,04)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(04,00,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(05,00,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,01,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,02,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,03,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,04,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(0A,00,00)
BAR[0].TYP = 4
BAR[0].OFF = 0x10
BAR[0].BAS = 00000000A0000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[2].TYP = 4
BAR[2].OFF = 0x1C
BAR[2].BAS = 00000000A1000000 BAR[2].LEN = 0000000000008000 BAR[2].ALN = 0000000000007FFF
PCI(00,1D,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081900000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0B,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081900000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081A00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,01)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081700000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0C,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081700000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081800000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081500000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0D,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081500000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081600000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1E,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082036000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000082035000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,1E,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082034000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,1F,00)
PCI(00,1F,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082028000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[3].TYP = 3
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000081400000 BAR[3].LEN = 0000000000100000 BAR[3].ALN = 00000000000FFFFF
PCI(00,1F,04)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082033000 BAR[0].LEN = 0000000000000100 BAR[0].ALN = 0000000000000FFF
BAR[3].TYP = 1
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000000002040 BAR[3].LEN = 0000000000000020 BAR[3].ALN = 000000000000001F
PCI(00,1F,05)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082032000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI HOST: Bus(0x00-0D)
BAR[0].TYP = 1
BAR[0].OFF = 0x100
BAR[0].BAS = 0000000000002000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000080000000 BAR[2].LEN = 0000000002100000 BAR[2].ALN = 0000000000FFFFFF
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 0000000090000000 BAR[3].LEN = 0000000011100000 BAR[3].ALN = 000000000FFFFFFF
PciRootBridgeInfoHob: Rev 0x1, Count 0x1
Bus(0x00-0D)
BarType-1: Base 0x0000000000002000 Length 0x0000000000001000
BarType-3: Base 0x0000000080000000 Length 0x0000000002100000
BarType-4: Base 0x0000000090000000 Length 0x0000000011100000
MEM Pool Used: 0x000075BC
RootportDownstreamPmConfiguration 6:0
RecursiveBusAssignmentP 0:6:0 -> 0,2,1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 1:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrOverrideCheck 1:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=1
ConfigureRpLtrOverride 30000 Val 0 En 0
ConfigureRpLtrOverride 6:0
RecursiveCpmConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveCpmConfiguration 1:0:0
HasChildBus : : : no
IsPcieDevice 01:00:00 - yes
RecursiveL1ssConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveL1ssConfiguration 1:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:6:0
GetAspmCaps 00:06:00 L0s- 4:x L1+ 16:x
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveAspmConfiguration 1:0:0
GetAspmCaps 01:00:00 L0s+ 4:7 L1+ 8:255
CombineAspm FF:FF -> FF
SetAspm on 00:06:00 to 2
IsPcieDevice 01:00:00 - yes
SetAspm on 01:00:00 to 2
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1C:3
RecursiveBusAssignmentP 0:1C:3 -> 0,4,3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 3:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrOverrideCheck 3:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E3000 Val 0 En 0
ConfigureRpLtrOverride 1C:3
RecursiveCpmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCpmConfiguration 3:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveL1ssConfiguration 3:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:3
GetAspmCaps 00:1C:03 L0s- 4:x L1- 16:x
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveAspmConfiguration 3:0:0
GetAspmCaps 03:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:03 to 0
IsPcieDevice 03:00:00 - yes
SetAspm on 03:00:00 to 0
RootportDownstreamPmConfiguration 1C:4
RecursiveBusAssignmentP 0:1C:4 -> 0,5,A
IsPcieDevice 04:00:00 - yes
RecursiveBusAssignmentP 4:0:0 -> 4,6,A
IsPcieDevice 05:00:00 - yes
RecursiveBusAssignmentP 5:0:0 -> 5,7,6
IsPcieDevice 05:01:00 - yes
RecursiveBusAssignmentP 5:1:0 -> 5,8,7
IsPcieDevice 05:02:00 - yes
RecursiveBusAssignmentP 5:2:0 -> 5,9,8
IsPcieDevice 05:03:00 - yes
RecursiveBusAssignmentP 5:3:0 -> 5,A,9
IsPcieDevice 05:04:00 - yes
RecursiveBusAssignmentP 5:4:0 -> 5,B,A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveLtrConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveLtrConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveLtrConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveLtrConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveLtrConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration A:0:0
Not LtrCapable 0A:00:00
RecursiveLtrOverrideCheck 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrOverrideCheck 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveLtrOverrideCheck 5:0:0
HasChildBus05:00:00: yes, 6
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:01:00 - yes
RecursiveLtrOverrideCheck 5:1:0
HasChildBus05:01:00: yes, 7
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:02:00 - yes
RecursiveLtrOverrideCheck 5:2:0
HasChildBus05:02:00: yes, 8
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:03:00 - yes
RecursiveLtrOverrideCheck 5:3:0
HasChildBus05:03:00: yes, 9
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:04:00 - yes
RecursiveLtrOverrideCheck 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrOverrideCheck A:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E4000 Val 0 En 0
ConfigureRpLtrOverride 1C:4
RecursiveCpmConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveCpmConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveCpmConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveCpmConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveCpmConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveCpmConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveCpmConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveCpmConfiguration A:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveL1ssConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveL1ssConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveL1ssConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveL1ssConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveL1ssConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveL1ssConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveL1ssConfiguration A:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:4
GetAspmCaps 00:1C:04 L0s- 4:x L1- 16:x
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveAspmConfiguration 4:0:0
GetAspmCaps 04:00:00 L0s- 0:x L1+ 1:x
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveAspmConfiguration 5:0:0
GetAspmCaps 05:00:00 L0s- 0:x L1+ 1:x
HasChildBus05:00:00: yes, 6
SetAspm on 05:00:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:01:00 - yes
RecursiveAspmConfiguration 5:1:0
GetAspmCaps 05:01:00 L0s- 0:x L1+ 1:x
HasChildBus05:01:00: yes, 7
SetAspm on 05:01:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:02:00 - yes
RecursiveAspmConfiguration 5:2:0
GetAspmCaps 05:02:00 L0s- 0:x L1+ 1:x
HasChildBus05:02:00: yes, 8
SetAspm on 05:02:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:03:00 - yes
RecursiveAspmConfiguration 5:3:0
GetAspmCaps 05:03:00 L0s- 0:x L1+ 1:x
HasChildBus05:03:00: yes, 9
SetAspm on 05:03:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:04:00 - yes
RecursiveAspmConfiguration 5:4:0
GetAspmCaps 05:04:00 L0s- 0:x L1+ 1:x
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveAspmConfiguration A:0:0
GetAspmCaps 0A:00:00 L0s+ 5:3 L1+ 16:64
CombineAspm FF:3F -> 3F
SetAspm on 05:04:00 to 2
IsPcieDevice 0A:00:00 - yes
SetAspm on 0A:00:00 to 2
CombineAspm FF:3F -> 3F
CombineAspm FF:3F -> 3F
SetAspm on 00:1C:04 to 0
IsPcieDevice 04:00:00 - yes
SetAspm on 04:00:00 to 0
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1D:0
RecursiveBusAssignmentP 0:1D:0 -> 0,C,B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration B:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrOverrideCheck B:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E8000 Val 0 En 0
ConfigureRpLtrOverride 1D:0
RecursiveCpmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveCpmConfiguration B:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveL1ssConfiguration B:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:0
GetAspmCaps 00:1D:00 L0s- 4:x L1- 16:x
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveAspmConfiguration B:0:0
GetAspmCaps 0B:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:00 to 0
IsPcieDevice 0B:00:00 - yes
SetAspm on 0B:00:00 to 0
RootportDownstreamPmConfiguration 1D:1
RecursiveBusAssignmentP 0:1D:1 -> 0,D,C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration C:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrOverrideCheck C:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E9000 Val 0 En 0
ConfigureRpLtrOverride 1D:1
RecursiveCpmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveCpmConfiguration C:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveL1ssConfiguration C:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:1
GetAspmCaps 00:1D:01 L0s- 4:x L1- 16:x
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveAspmConfiguration C:0:0
GetAspmCaps 0C:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:01 to 0
IsPcieDevice 0C:00:00 - yes
SetAspm on 0C:00:00 to 0
RootportDownstreamPmConfiguration 1D:3
RecursiveBusAssignmentP 0:1D:3 -> 0,E,D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrConfiguration D:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrOverrideCheck D:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride EB000 Val 0 En 0
ConfigureRpLtrOverride 1D:3
RecursiveCpmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveCpmConfiguration D:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveL1ssConfiguration D:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:3
GetAspmCaps 00:1D:03 L0s+ 4:x L1+ 16:x
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveAspmConfiguration D:0:0
GetAspmCaps 0D:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:03 to 2
IsPcieDevice 0D:00:00 - yes
SetAspm on 0D:00:00 to 2
GFX framebuffer WC is enabled @ 0x90000000:0x10000000
Call FspNotifyPhase(20) ... PROGRESS CODE: V00006800 I0
NotifyPhaseApi() - Begin [Phase: 00000020]
FSP Post PCI Enumeration ...
Install PPI: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E3F517
Enable MSE of Telemetry
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E2D472
PchOnPciEnumCompleteFsp() Start
PchOnPciEnumCompleteCommon() Start
Protected range 0: 0x960F1530
Protected range 1: 0x9FFF1650
GpioCheckConflict Start..
[GPIO Conflict Check] No GPIO HOB found.
PchOnPciEnumCompleteCommon() End
PchOnPciEnumCompleteFsp() End
NotifyPhaseApi() - End [Status: 0x00000000]
PROGRESS CODE: V0000687F I0
Success
ACPI NVS, LowPowerS0IdleConstraint(Micro-pep constraints) = 0x0000000069CA07F7
Update Cpu Nvs Done
Revision 0x1, PpmFlags 0x027A7FB3
Initialize VT-d
VTd enabled
ACPI Init
Creating BDAT Table...
No BDAT data exists, exiting without creating table
Updated BDAT Table in AcpiTable Entries
Publish ACPI table: BDAT @ 0x766B8210
Updated DMAR Table in AcpiTable Entries
Update Dmar ACPI Table
McD0BaseAddress 0x00000000, IgdMode 0x0000
GttMode 0x0003, GttMmAdr 0x80000000, GttMemSize 0x00800000
RMRR Base address IGD 000000007B800000
RMRR Limit address IGD 000000007FBFFFFF
RMRR Base address USB 0000000000000000
RMRR Limit address USB 0000000000000000
WARNING: RmrrUsb.RmrrHeader.ReservedMemoryRegionBaseAddress is 0.
RMRR Base address TCSS DMA0 0000000000000000
RMRR Limit Address TCSS DMA0 0000000000000000
RMRR Base address TCSS DMA1 0000000000000000
RMRR Limit Address TCSS DMA1 0000000000000000
VTD base address 1 = FED90000
VTD base address 2 = 0
VTD base address 4 = 0
VTD base address 5 = 0
VTD base address 6 = 0
VTD base address 7 = 0
VTD base address 3 = FED91000
Removing Ibt DRHD engine 0
Removing Ibt DRHD engine 1
Removing Ibt DRHD engine 2
Removing Ibt DRHD engine 3
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Publish ACPI table: DMAR @ 0x766B8240
Not adding ACPI table
Publish ACPI table: FACP @ 0x766B8310
Publish ACPI table: FWST @ 0x766B8430
Publish ACPI table: HPET @ 0x766B8560
Publish ACPI table: LPIT @ 0x766B85A0
Publish ACPI table: APIC @ 0x766B8670
Publish ACPI table: MCFG @ 0x766B8760
Publish ACPI table: FPDT @ 0x766B87A0
Publish ACPI table: TPM2 @ 0x766B8840
Updated Psd Table in AcpiTable Entries
Publish ACPI table: PSDS @ 0x766B8890
Publish ACPI table: SSDT @ 0x766B88F0
Publish ACPI table: SSDT @ 0x766B8D80
Publish ACPI table: SSDT @ 0x766B9210
Publish ACPI table: SSDT @ 0x766B9B00
Publish ACPI table: SSDT @ 0x766B9FE0
Publish ACPI table: SSDT @ 0x766BAB20
Publish ACPI table: SSDT @ 0x766BAEC0
Publish ACPI table: SSDT @ 0x766BB000
Publish ACPI table: SSDT @ 0x766BB820
Publish ACPI table: SSDT @ 0x766BB9F0
CPU PNVS Base Old=0xFFFF0000 New=0x76748D8D
CPU PNVS Size Old=0xAA55 New=0x0065
Publish ACPI table: SSDT @ 0x766BBDD0
Publish ACPI table: SSDT @ 0x766BE240
PNVS Old=0xFFFF0000 New=0x76748AB5
PNVL Old=0x0000AA55 New=0x000002D8
Publish ACPI table: SSDT @ 0x766DFE70
SANV Base Old=0xFFFF0000 New=0x76748DF2
SANV Size Old=0xAA55 New=0x01BC
Publish ACPI table: SSDT @ 0x766E0240
Publish ACPI table: SSDT @ 0x766E6440
Publish ACPI table: SSDT @ 0x766E72C0
Publish ACPI table: BGRT @ 0x766EAF20
Find RTCT table
Not adding ACPI table
ACPI Ret: Success
AppendSmbiosFwSts () Start
Current ME FW HOB data printed -
00: 01 04 00 00 00 00 00 00 - 55 02 00 90 06 01 10 80
10: 20 00 00 00 00 40 00 00 - 00 00 00 00 00 00 40 00
20: 01 00 00 00 FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - FF FF FF FF 04 00 00 00
40: 00 00 00 80 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 05 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
FWSTS SMBIOS table OEM type 0xDB data printed -
00: DB 6A 00 00 01 04 01 55 - 02 00 90 06 01 10 80 20
10: 00 00 00 00 40 00 00 00 - 00 00 00 00 00 40 00 02
20: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - 03 00 00 00 80 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 04 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00
VbtAddress =0x76A5B91C
Extended VBT supported
VBT data found '$VBT TIGERLAKE '
Updating GOP VBT fields using GOP Configuration Lib.
Update VBT for TGL-U (CNT) LPDDR4
VBT Updated.
IgdOpRegion ended
HeciInitialize () - Start
InitializeHeci () - H_RDY is already initialized
HeciInitLib init Status: Success
CSME MeasuredBoot state: 0
Loading Payload ID UEFI
Loading Component EPLD:UEFI
Registering container EPLD
HASH verification for usage (0x00001000) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00001000): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Load Payload ID 0x49464555 @ 0x00B00000
FV Format Payload
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
MP Init (Done)
HOB @ 0x76C10000
Created 3 OS boot options (Current: 0)
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
HECI1 MeFirmwareStatus = 400000
Stage2: HwState 0x4 TpmType 0x1
TPM Lib Private Data not found
Unable to get log area for TCG 2.0 format events !!
Stage2 stack: 0x40000 (stack used 0xA40, HOB used 0x16E0, 0x3DEE0 free)
Stage2 heap: 0x4C0000 (0x2C9C50 used, 0x1F63B0 free, 0x438CD7 max used)
Payload entry: 0x00800320
Jump to payload
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x00000800000, size is 0x00030000, handle is 0x800000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x5 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x0000080D080 EntryPoint=0x0000080D395 PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM A3610442-E69F-4DF3-82CA-2360C4031A23
Loading PEIM at 0x00000812720 EntryPoint=0x00000812A35 ReportStatusCodeRouterPei.efi
Install PPI: 0065D394-9951-4144-82A3-0AFC8579C251
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Loading PEIM 9D225237-FA01-464C-A949-BAABC02D31D0
Loading PEIM at 0x000008157C0 EntryPoint=0x00000815AD5 StatusCodeHandlerPei.efi
Loading PEIM 352C6AF8-315B-4BD6-B04F-31D4ED1EBE57
Loading PEIM at 0x000008186A0 EntryPoint=0x00000818A88 BlSupportPeim.efi
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
MemInfoCallback: Base=0x 0, Size=0x A0000, Type=0x0 (0x1)
MemInfoCallback: Base=0x A0000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0x 100000, Size=0x760B8000, Type=0x0 (0x1)
MemInfoCallback: Base=0x761B8000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x766B8000, Size=0x 90000, Type=0x5 (0x3)
MemInfoCallback: Base=0x76748000, Size=0x 8000, Type=0x5 (0x4)
MemInfoCallback: Base=0x76750000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x76C50000, Size=0x 3B0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x77000000, Size=0x 4000000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B000000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B800000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7C000000, Size=0x 3C00000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFED20000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFF530000, Size=0x AD0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x100000000, Size=0x780400000, Type=0x0 (0x1)
Low memory 0x761B8000
SystemLowMemTop 0x80000000
PeiMemBase: 0x721B0000.
PeiMemSize: 0x4000000.
PeiInstallPeiMemory MemoryBegin 0x721B0000, MemoryLength 0x4000000
ERROR - Invalid Firmware Volume Header Checksum, change 0xE699 to 0x57FE
Found one valid fv : 0x5D000000830000.
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: 801CEA
The 1th FV start address is 0x00000830000, size is 0x005D0000, handle is 0x830000
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Created graphics info hob
Created graphics device info hob
Detected Acpi Table at 0x766B8000, length 0x32F58
Detected Smbios Table at 0x769E8000, length 0x1000
Rsdp at 0x766B8000
Rsdt at 0x766B8030, Xsdt at 0x766B80E0
Found Fadt in Rsdt
Found MM config address in Rsdt
PmCtrl Reg 0x1804
PmTimer Reg 0x1808
Reset Reg 0xCF9
Reset Value 0x6
PmEvt Reg 0x1800
PmGpeEn Reg 0x1870
PcieBaseAddr 0xC0000000
Create acpi board info guid hob
VerifiedBoot 0x0
MeasuredBoot 0x0
Get FSP hob success. FspsBase = 0x76B78000
Get FSP hob success. FspHobList = 0x76C90000
Get SMM info. smm_base = 0x7B000000
smm_size = 0x800000
Base = 0xFF610000, Size=0x40000 Status=0xSuccess
GuidHob = 0x80E90
DeviceTable = 0x76C10E08
found it = 0x1F05
DeviceBase = 0x1F05
2DeviceBase = 0xFD000
SpiPciBase = 0xC00FD000
SpiFlashInfo->Flags = 0x1
SPI flash base at 0xC00FD000
VarStoreBase=0xFF610000, length=0x40000
TpmType - TPM_TYPE_NONE
Temp Stack : BaseAddress=0x88000 Length=0x8000
Temp Heap : BaseAddress=0x80000 Length=0x8000
Total temporary memory: 65536 bytes.
temporary memory stack ever used: 32768 bytes.
temporary memory heap used for HobList: 4192 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Old Stack size 32768, New stack size 131072
Stack Hob: BaseAddress=0x721B0000 Length=0x20000
Heap Offset = 0x72150000 Stack Offset = 0x72140000
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x000761A3000 EntryPoint=0x000761A3355 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x0007619C000 EntryPoint=0x0007619C3F6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
DiscoverPeimsAndOrderWithApriori(): Found 0x0 PEI FFS files in the 1th FV
DXE IPL Entry
Loading PEIM D6A2CB7F-6A18-4E2F-B43B-9920A733700A
Loading PEIM at 0x00076174000 EntryPoint=0x00076174B94 DxeCore.efi
Loading DXE CORE at 0x00076174000 EntryPoint=0x00076174B94
AddressBits=39 5LevelPaging=0 1GPage=1
Pml5=1 Pml4=1 Pdp=512 TotalPage=2
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 80D5FA
HandOffToDxeCore() Stack Base: 0x76154000, Stack Size: 0x20000
HOBLIST address in DXE = 0x758A2018
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000003 0x761A3000 - 0x761AFFFF
Memory Allocation 0x00000003 0x7619C000 - 0x761A2FFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000004 0x75E00000 - 0x75FFFFFF
Memory Allocation 0x00000007 0x76000000 - 0x76153FFF
Memory Allocation 0x00000004 0x721B0000 - 0x721CFFFF
Memory Allocation 0x00000004 0x75DFF000 - 0x75DFFFFF
FV Hob 0x830000 - 0xDFFFFF
InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 761973E0
InstallProtocolInterface: 8F644FA9-E850-4DB1-9CE2-0B44698E8DA4 7589ED30
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7589E098
InstallProtocolInterface: 220E73B6-6BDB-4413-8405-B974B108619A 7589E630
InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 76198070
Loading driver 80CF7257-87AB-47F9-A3FE-D50B76D89541
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754D91C0
Loading driver at 0x000754BA000 EntryPoint=0x000754BA374 PcdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754D9518
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
InstallProtocolInterface: 11B34006-D85B-4D0A-A290-D5A571310EF7 754C12C0
InstallProtocolInterface: 13A3F0F6-264A-3EF0-F2E0-DEC512342F34 754C1220
InstallProtocolInterface: 5BE40F57-FA68-4610-BBBF-E9C5FCDAD365 754C13D0
InstallProtocolInterface: FD0F4478-0EFD-461D-BA2D-E58C45FD5F5E 754C12B0
Loading driver D93CE3D8-A7EB-4730-8C8E-CC466A9ECC3C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C8B40
Loading driver at 0x000759CC000 EntryPoint=0x000759CD0F4 ReportStatusCodeRouterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C9118
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
InstallProtocolInterface: 86212936-0E76-41C8-A03A-2AF2FC1C39E2 759D20D0
InstallProtocolInterface: D2B2B828-0826-48A7-B3DF-983C006024F0 759D20C8
Loading driver F80697E9-7FD6-4665-8646-88E33EF71DFC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C81C0
Loading driver at 0x000753A0000 EntryPoint=0x000753A0418 SecurityStubDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C8498
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
InstallProtocolInterface: 94AB2F58-1438-4EF1-9152-18941A3A0E68 754232B0
InstallProtocolInterface: A46423E3-4617-49F1-B9FF-D1BFA9115839 754232A8
InstallProtocolInterface: 15853D7C-3DDF-43E0-A1CB-EBF85B8F872C 754232B8
Loading driver 1A1E4886-9517-440E-9FDE-3BE44CEE2136
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C7240
Loading driver at 0x00075494000 EntryPoint=0x000754950F4 CpuDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C7598
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
Paging: added 512 pages to page table pool
CurrentPagingContext:
MachineType - 0x8664
PageTableBase - 0x75E01000
Attributes - 0xC0000006
InstallProtocolInterface: 26BACCB1-6F42-11D4-BCE7-0080C73C8881 754A5B50
MemoryProtectionCpuArchProtocolNotify:
ProtectUefiImageCommon - 0x76197D18
- 0x0000000076174000 - 0x0000000000028000
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x0000000000001000 (0x0000000000004000)
SetUefiImageMemoryAttributes - 0x00000000759CD000 - 0x0000000000003000 (0x0000000000020000)
SetUefiImageMemoryAttributes - 0x00000000759D0000 - 0x0000000000006000 (0x0000000000004000)
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
ConvertPages: failed to find range 0 - 9FFFF
ConvertPages: failed to find range A0000 - BFFFF
ConvertPages: failed to find range C0000 - FFFFF
ConvertPages: failed to find range 761B8000 - 766B7FFF
ConvertPages: failed to find range 76750000 - 7AFFFFFF
ConvertPages: failed to find range 7B000000 - 7FBFFFFF
ConvertPages: failed to find range FEC80000 - FECFFFFF
ConvertPages: failed to find range FED20000 - FED7FFFF
ConvertPages: failed to find range FF530000 - FFFFFFFF
ConvertPages: failed to find range 100000000 - 8803FFFFF
AP Loop Mode is 1
WakeupBufferStart = 85000, WakeupBufferSize = 23C0
CpuDxe: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
CpuDxe: 5-Level Paging = 0
Detect CPU count: 8
Does not find any HOB stored CPU BIST information!
InstallProtocolInterface: 3FDDA605-A76E-4F46-AD29-12F4531B3D08 754A5C40
Loading driver C8339973-A563-4561-B858-D8476F9DEFC4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C21C0
Loading driver at 0x000754AA000 EntryPoint=0x000754AA384 Metronome.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C2498
ProtectUefiImageCommon - 0x754C21C0
- 0x00000000754AA000 - 0x0000000000003960
InstallProtocolInterface: 26BACCB2-6F42-11D4-BCE7-0080C73C8881 754AD6B8
Loading driver B601F8C4-43B7-4784-95B1-F4226CB40CEE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B30C0
Loading driver at 0x000759C2000 EntryPoint=0x000759C3118 RuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B3498
ProtectUefiImageCommon - 0x754B30C0
- 0x00000000759C2000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759C3000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759C6000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: B7DFB4E1-052F-449F-87BE-9818FC91B733 759C80A0
Loading driver 4B28E4C7-FF36-4E10-93CF-A82159E777C5
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B37C0
Loading driver at 0x000759B8000 EntryPoint=0x000759B90B4 ResetSystemRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1B18
ProtectUefiImageCommon - 0x754B37C0
- 0x00000000759B8000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759B9000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759BC000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: 27CFAC88-46CC-11D4-9A38-0090273FC14D 0
InstallProtocolInterface: 9DA34AE0-EAF9-4BBF-8EC3-FD60226C44BE 759BE120
InstallProtocolInterface: 695D7835-8D47-4C11-AB22-FA8ACCE7AE7A 759BE0F8
InstallProtocolInterface: 2DF6BA0B-7092-440D-BD04-FB091EC3F3C1 759BE0D0
Loading driver C3099578-F815-4A96-84A3-FC593760181D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B1240
Loading driver at 0x000759AE000 EntryPoint=0x000759AF0B4 SmmControlDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1698
ProtectUefiImageCommon - 0x754B1240
- 0x00000000759AE000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759AF000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759B2000 - 0x0000000000006000 (0x0000000000004008)
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
InstallProtocolInterface: 843DC720-AB1E-42CB-9357-8A0078F3561B 759B40A8
Loading driver A19B1FE7-C1BC-49F8-875F-54A5D542443F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B07C0
Loading driver at 0x0007548A000 EntryPoint=0x0007548A3C4 CpuIo2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0118
ProtectUefiImageCommon - 0x754B07C0
- 0x000000007548A000 - 0x00000000000040C0
InstallProtocolInterface: AD61F191-AE5F-4C0E-B9FA-E869D288C64F 7548DD68
Loading driver 9B680FCE-AD6B-4F3A-B60B-F59899003443
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF040
Loading driver at 0x0007546E000 EntryPoint=0x0007546E374 DevicePathDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0418
ProtectUefiImageCommon - 0x754AF040
- 0x000000007546E000 - 0x000000000000DF60
InstallProtocolInterface: 0379BE4E-D706-437D-B037-EDB82FB772A4 75477230
InstallProtocolInterface: 8B843E20-8132-4852-90CC-551A4E4A7F1C 75477220
InstallProtocolInterface: 05C99A21-C70F-4AD2-8A5F-35DF3343F51E 75477270
Loading driver 96B5C032-DF4C-4B6E-8232-438DCF448D0E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF340
Loading driver at 0x00075486000 EntryPoint=0x00075486374 NullMemoryTestDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AF898
ProtectUefiImageCommon - 0x754AF340
- 0x0000000075486000 - 0x0000000000003C40
InstallProtocolInterface: 309DE7F1-7F5E-4ACE-B49C-531BE5AA95EF 75489938
Loading driver 245CB4DA-8E15-4A1B-87E3-9878FFA07520
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AEB40
Loading driver at 0x00075482000 EntryPoint=0x00075482374 Legacy8259.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AEE98
ProtectUefiImageCommon - 0x754AEB40
- 0x0000000075482000 - 0x0000000000003A80
InstallProtocolInterface: 38321DBA-4FE0-4E17-8AEC-413055EAEDC1 75485780
Loading driver 348C4D62-BFBD-4882-9ECE-C80BB1C4783B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AE1C0
Loading driver at 0x0007537D000 EntryPoint=0x0007537D394 HiiDatabase.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AE498
ProtectUefiImageCommon - 0x754AE1C0
- 0x000000007537D000 - 0x0000000000022F60
InstallProtocolInterface: E9CA4775-8657-47FC-97E7-7ED65A084324 7539E7D8
InstallProtocolInterface: 0FD96974-23AA-4CDC-B9CB-98D17750322A 7539E850
InstallProtocolInterface: EF9FC172-A1B2-4693-B327-6D32FC416042 7539E878
InstallProtocolInterface: 587E72D7-CC50-4F79-8209-CA291FC1A10F 7539E8D0
InstallProtocolInterface: 0A8BADD5-03B8-4D19-B128-7B8F0EDAA596 7539E900
InstallProtocolInterface: 31A6406A-6BDF-4E46-B2A2-EBAA89C40920 7539E7F8
InstallProtocolInterface: 1A1241E6-8F19-41A9-BC0E-E8EF39E06546 7539E820
Loading driver C68DAA4E-7AB5-41E8-A91D-5954421053F3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A9340
Loading driver at 0x0007547E000 EntryPoint=0x0007547E334 BlSupportDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A9698
ProtectUefiImageCommon - 0x754A9340
- 0x000000007547E000 - 0x0000000000003F80
Install Acpi Table at 0x766B8000, length 0x32F58
Install Smbios Table at 0x769E8000, length 0x1000
Loading driver F9D88642-0737-49BC-81B5-6889CD57D9EA
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8840
Loading driver at 0x00075462000 EntryPoint=0x00075462334 SmbiosDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8018
ProtectUefiImageCommon - 0x754A8840
- 0x0000000075462000 - 0x0000000000005D80
InstallProtocolInterface: 03583FF6-CB36-4940-947E-B9B39F4AFAF7 754679B0
Loading driver 9A5163E7-5C29-453F-825C-837A46A81E15
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8340
Loading driver at 0x0007546A000 EntryPoint=0x0007546A374 SerialDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8618
ProtectUefiImageCommon - 0x754A8340
- 0x000000007546A000 - 0x0000000000003EA0
InstallProtocolInterface: BB25CF6F-F1D4-11D2-9A0C-0090273FC1FD 7546DB20
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7546DB68
Loading driver AD61999A-507E-47E6-BA28-79CC609FA1A4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A70C0
Loading driver at 0x00075456000 EntryPoint=0x00075456514 FspWrapperNotifyDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7A18
ProtectUefiImageCommon - 0x754A70C0
- 0x0000000075456000 - 0x0000000000005FA0
Loading driver C9602B47-9569-47C2-9D1E-FD1DF67A72E4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548F040
Loading driver at 0x0007545E000 EntryPoint=0x0007545E334 PowerButtonHandler.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7598
ProtectUefiImageCommon - 0x7548F040
- 0x000000007545E000 - 0x00000000000039E0
Successfully registered power button periodic timer event!
Loading driver 55E76644-78A5-4A82-A900-7126A5798892
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548FA40
Loading driver at 0x0007544A000 EntryPoint=0x0007544A344 HeciInitDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7548F398
ProtectUefiImageCommon - 0x7548FA40
- 0x000000007544A000 - 0x0000000000005DE0
InstallProtocolInterface: 3C7BC880-41F8-4869-AEFC-870A3ED28299 7548F5B8
Loading driver 6C2004EF-4E0E-4BE4-B14C-340EB4AA5891
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493040
Loading driver at 0x000759A5000 EntryPoint=0x000759A60B4 StatusCodeHandlerRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493D98
ProtectUefiImageCommon - 0x75493040
- 0x00000000759A5000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759A6000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759A9000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040003 I0
Loading driver 6D33944A-EC75-4855-A54D-809C75241F6C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493440
Loading driver at 0x0007533F000 EntryPoint=0x0007533F3CC BdsDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493718
ProtectUefiImageCommon - 0x75493440
- 0x000000007533F000 - 0x000000000001EE80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF6-46CC-11D4-9A38-0090273FC14D 7535B798
PROGRESS CODE: V03040003 I0
Loading driver 6CE6B0DE-781C-4F6C-B42D-98346C614BEC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75492CC0
Loading driver at 0x00075444000 EntryPoint=0x00075444414 HpetTimerDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492B98
ProtectUefiImageCommon - 0x75492CC0
- 0x0000000075444000 - 0x00000000000055A0
PROGRESS CODE: V03040002 I0
Init HPET Timer Driver
HPET Base Address = 0xFED00000
HPET_GENERAL_CAPABILITIES_ID = 0x031ABA858086A701
HPET_GENERAL_CONFIGURATION = 0x0000000000000000
HPET_GENERAL_INTERRUPT_STATUS = 0x0000000000000000
HPET_MAIN_COUNTER = 0x000000002B2FA54B
HPET Main Counter Period = 52083333 (fs)
HPET_TIMER0_CONFIGURATION = 0x00F0000000008030
HPET_TIMER0_COMPARATOR = 0x0000000000000000
HPET_TIMER0_MSI_ROUTE = 0x0000000000000000
HPET_TIMER1_CONFIGURATION = 0x00F0000000008000
HPET_TIMER1_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER1_MSI_ROUTE = 0x0000000000000000
HPET_TIMER2_CONFIGURATION = 0x00F0080000008000
HPET_TIMER2_COMPARATOR = 0x0000000076C8FE20
HPET_TIMER2_MSI_ROUTE = 0x0000000000000000
HPET_TIMER3_CONFIGURATION = 0x00F0100000008000
HPET_TIMER3_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER3_MSI_ROUTE = 0x0000000000000000
HPET_TIMER4_CONFIGURATION = 0x000000000000C000
HPET_TIMER4_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER4_MSI_ROUTE = 0x0000000000000000
HPET_TIMER5_CONFIGURATION = 0x000000000000C000
HPET_TIMER5_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER5_MSI_ROUTE = 0x0000000000000000
HPET_TIMER6_CONFIGURATION = 0x000000000000C000
HPET_TIMER6_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER6_MSI_ROUTE = 0x0000000000000000
HPET_TIMER7_CONFIGURATION = 0x000000000000C000
HPET_TIMER7_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER7_MSI_ROUTE = 0x0000000000000000
Choose 64-bit HPET timer.
HPET Interrupt Mode MSI
HPET Interrupt Vector = 0x40
HPET Counter Mask = 0xFFFFFFFFFFFFFFFF
HPET Timer Period = 100000
HPET Timer Count = 0x000000000002EE00
HPET_TIMER0_CONFIGURATION = 0x00F000000000C034
HPET_TIMER0_COMPARATOR = 0x000000002B386F4C
HPET_TIMER0_MSI_ROUTE = 0xFEE0000000000140
InstallProtocolInterface: 26BACCB3-6F42-11D4-BCE7-0080C73C8881 75449190
PROGRESS CODE: V03040003 I0
Loading driver 47579CF5-1E4F-4B41-99BB-A5C334846D3B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754923C0
Loading driver at 0x00075440000 EntryPoint=0x00075440334 SmmAccessDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492218
ProtectUefiImageCommon - 0x754923C0
- 0x0000000075440000 - 0x0000000000003E60
PROGRESS CODE: V03040002 I0
SmmAccess: SmmBase = 0x7B000000, SmmSize = 0x800000
SmmAccess: Flags = 0x1, SmmCommSize=0x1000
InstallProtocolInterface: C2702B74-800C-4131-8746-8FB5B89CE4AC 75443BB0
PROGRESS CODE: V03040003 I0
Loading driver FDFF263D-5F68-4591-87BA-B768F445A9AF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x0007536B000 EntryPoint=0x0007536B3D4 Tcg2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491A98
ProtectUefiImageCommon - 0x754910C0
- 0x000000007536B000 - 0x0000000000011940
PROGRESS CODE: V03040002 I0
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
Check the tpm information from the bootloader.
Measure boot is not enabled in bootloader.
TPM is disabled in bootloader.
Error: Image at 0007536B000 start failed: Unsupported
PROGRESS CODE: V03040003 I0
Loading driver EBF342FE-B1D3-4EF8-957C-8048606FF671
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x00075323000 EntryPoint=0x00075323394 SetupBrowser.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491D18
ProtectUefiImageCommon - 0x754910C0
- 0x0000000075323000 - 0x000000000001BDA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: B9D4C360-BCFB-4F9B-9298-53C136982258 7533D8D0
InstallProtocolInterface: A770C357-B693-4E6D-A6CF-D21C728E550B 7533D900
InstallProtocolInterface: 1F73B18D-4630-43C1-A1DE-6F80855D7DA4 7533D8E0
PROGRESS CODE: V03040003 I0
Loading driver 00160F8D-2B35-4DF2-BBE0-B272A8D631F0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490CC0
Loading driver at 0x0007543C000 EntryPoint=0x0007543C344 FirmwarePerformanceDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490B18
ProtectUefiImageCommon - 0x75490CC0
- 0x000000007543C000 - 0x0000000000003D40
PROGRESS CODE: V03040002 I0
Found Fpdt in Rsdt
PROGRESS CODE: V03040003 I0
Loading driver 128FB770-5E79-4176-9E51-9BB268A17DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490340
Loading driver at 0x0007536E000 EntryPoint=0x0007536E3A4 PciHostBridgeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490198
ProtectUefiImageCommon - 0x75490340
- 0x000000007536E000 - 0x000000000000E9A0
PROGRESS CODE: V03040002 I0
InitRootBridge: populated root bus 0, with room for 13 subordinate bus(es)
RootBridge: PciRoot(0x0)
Support/Attr: 7001F / 7001F
DmaAbove4G: No
NoExtConfSpace: No
AllocAttr: 0 ()
Bus: 0 - D Translation=0
Io: 2000 - 2FFF Translation=0
Mem: 80000000 - FE0FFFFF Translation=0
MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7547DE18
InstallProtocolInterface: 2F707EBB-4A1A-11D4-9A38-0090273FC14D 7547D270
PROGRESS CODE: V03040003 I0
Loading driver A487A478-51EF-48AA-8794-7BEE2A0562F1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547CD40
Loading driver at 0x00075361000 EntryPoint=0x00075361480 tftpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7547C618
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7536C3C0
ProtectUefiImageCommon - 0x7547CD40
- 0x0000000075361000 - 0x000000000000CEE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7536BA38
PROGRESS CODE: V03040003 I0
Loading driver 0253F9FA-129A-4A8D-B12E-7DC2B6376302
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547C840
Loading driver at 0x000752FD000 EntryPoint=0x000752FD480 dpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D018
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7530D2E0
ProtectUefiImageCommon - 0x7547C840
- 0x00000000752FD000 - 0x00000000000127A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7530C478
PROGRESS CODE: V03040003 I0
Loading driver F099D67F-71AE-4C36-B2A3-DCEB0EB2B7D8
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545D1C0
Loading driver at 0x00075434000 EntryPoint=0x00075434374 WatchdogTimer.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D998
ProtectUefiImageCommon - 0x7545D1C0
- 0x0000000075434000 - 0x0000000000003920
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF5-46CC-11D4-9A38-0090273FC14D 75437670
PROGRESS CODE: V03040003 I0
Loading driver 2FA2A6DA-11D5-4DC3-999A-749648B03C56
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545CB40
Loading driver at 0x00075999000 EntryPoint=0x0007599A118 PiSmmIpl.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C098
ProtectUefiImageCommon - 0x7545CB40
- 0x0000000075999000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007599A000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007599F000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
SmmAccess: SMRAM Map Buffer too small
SmmAccess: Open SMRAM Region
SMM IPL opened SMRAM window
SMM IPL found SMRAM window 7B001000 - 7B7FFFFF
SMM IPL failed to set SMRAM window to EFI_MEMORY_WB
SMRAM attributes: 0000000000000001
SMM IPL loading SMM Core at SMRAM address 7B7EA000
SMM IPL calling SMM Core at SMRAM address 7B7EB138
PiSmmCoreImageBase - 0x000000007B7EA000
PiSmmCoreImageSize - 0x0000000000015000
SmmAddMemoryRegion
MemBase - 0x7B001000
MemLength - 0x7E9000
Type - 0x7
Attributes - 0xA
SmmAddMemoryRegion
MemBase - 0x7B000000
MemLength - 0x1000
Type - 0x6
Attributes - 0x1A
SmmAddMemoryRegion
MemBase - 0x7B7EA000
MemLength - 0x16000
Type - 0x6
Attributes - 0x1A
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545C298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E82C0
InstallProtocolInterface: F4CCBFB7-F6E0-47FD-9DD4-10A8F150C191 759A1420
InstallProtocolInterface: C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332 759A11F8
InstallProtocolInterface: 378DAEDC-F06B-4446-8314-40AB933C87A3 759A1200
PROGRESS CODE: V03040003 I0
Loading driver E660EA85-058E-4B55-A54B-F02F83A24707
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75451040
Loading driver at 0x000752CF000 EntryPoint=0x000752CF3D8 DisplayEngine.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C818
ProtectUefiImageCommon - 0x75451040
- 0x00000000752CF000 - 0x00000000000168C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 9BBE29E9-FDA1-41EC-AD52-452213742D2E 752E41B8
InstallProtocolInterface: 4311EDC0-6054-46D4-9E40-893EA952FCCC 752E41D0
PROGRESS CODE: V03040003 I0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360B18
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7CC0
Loading SMM driver at 0x0007B7D9000 EntryPoint=0x0007B7DA234 CpuIo2Smm.efi
SmmAccess: SMRAM Map Buffer too small
SmmInstallProtocolInterface: 3242A9D8-CE70-4AA0-955D-5E7B140DE4D2 7B7DF0B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360C98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7AC0
Loading SMM driver at 0x0007B7BC000 EntryPoint=0x0007B7BE124 PiSmmCpuDxeSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMRR Base: 0x7B000000, SMRR Size: 0x800000
PcdCpuSmmCodeAccessCheckEnable = 1
mAddressEncMask = 0x0
PcdControlFlowEnforcementPropertyMask = 0
SMRAM TileSize = 0x00002000 (0x00001000, 0x00001000)
SMRAM SaveState Buffer (0x7B7A6000, 0x00016000)
CPU[000] APIC ID=0000 SMBASE=7B79E000 SaveState=7B7ADC00 Size=00000400
CPU[001] APIC ID=0001 SMBASE=7B7A0000 SaveState=7B7AFC00 Size=00000400
CPU[002] APIC ID=0002 SMBASE=7B7A2000 SaveState=7B7B1C00 Size=00000400
CPU[003] APIC ID=0003 SMBASE=7B7A4000 SaveState=7B7B3C00 Size=00000400
CPU[004] APIC ID=0004 SMBASE=7B7A6000 SaveState=7B7B5C00 Size=00000400
CPU[005] APIC ID=0005 SMBASE=7B7A8000 SaveState=7B7B7C00 Size=00000400
CPU[006] APIC ID=0006 SMBASE=7B7AA000 SaveState=7B7B9C00 Size=00000400
CPU[007] APIC ID=0007 SMBASE=7B7AC000 SaveState=7B7BBC00 Size=00000400
Stacks - 0x7B776000
mSmmStackSize - 0x6000
PcdCpuSmmStackGuard - 0x1
mXdSupported - 0x1
One Semaphore Size = 0x40
Total Semaphores Size = 0x940
PhysicalAddressBits = 39, 5LPageTable = 0.
5LevelPaging Needed - 0
1GPageTable Support - 1
PcdCpuSmmRestrictedMemoryAccess - 1
PhysicalAddressBits - 39
InstallProtocolInterface: 26EEB3DE-B689-492E-80F0-BE8BD7DA4BA7 7B7D3380
SMM IPL registered SMM Entry Point address 7B7EBD44
SmmInstallProtocolInterface: EB346B97-975F-4A9F-8B22-F8E92BB3D569 7B7D33B0
SmmInstallProtocolInterface: 69B792EA-39CE-402D-A2A6-F721DE351DFE 7B7D32A8
CpuSmm: SpinLock Size = 0x40, PcdCpuSmmMpTokenCountPerChunk = 0x40
SmmInstallProtocolInterface: 5D5450D7-990C-4180-A803-8E63F0608307 7B7D3450
SmmInstallProtocolInterface: 1D202CAB-C8AB-4D5C-94F7-3CFCC0D3D335 7B7D3420
SMM CPU Module exit from SMRAM with EFI_SUCCESS
SmmAccess: Prepare to close the SMRAM
SmmAccess:Close SMRAM Region, success!
SMM IPL closed SMRAM window
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360898
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E74C0
Loading SMM driver at 0x0007B759000 EntryPoint=0x0007B75A2C4 FvbSmm.efi
SmmAccess: SMRAM Map Buffer too small
SpiInstance = 7B76A998
PchSpiBase at 0xC00FD000
variable address is set to 0xFF610000
SmmInstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
SmmInstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7B76A818
InstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360218
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E70C0
Loading SMM driver at 0x0007B6BF000 EntryPoint=0x0007B6C031C VariableSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD308 Success
VarCheckLibRegisterEndOfDxeCallback - 0x7B6CEDB8 Success
VarCheckLibRegisterAddressPointer - 0x7B74D920 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD93C Success
[VarCheckPcd] No VarCheckPcdBin found at the first RAW section
VarCheckLibRegisterAddressPointer - 0x7B74D940 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CF7E0 Success
Variable driver common space: 0x1DF9C 0x1DF9C 0x1DF9C
Variable driver will work with auth variable format!
SmmInstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 7B74C318
SmmInstallProtocolInterface: B0D8F3C1-B7DE-4C11-BC89-2FB562C8C411 7B74C300
InstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535FB98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7EC0
Loading SMM driver at 0x0007B661000 EntryPoint=0x0007B662234 BlSmmSupport.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMMBASE_INFO = 7B000000
CPU0 ID:00 Base: 7B79E000
CPU1 ID:01 Base: 7B7A0000
CPU2 ID:02 Base: 7B7A2000
CPU3 ID:03 Base: 7B7A4000
CPU4 ID:04 Base: 7B7A6000
CPU5 ID:05 Base: 7B7A8000
CPU6 ID:06 Base: 7B7AA000
CPU7 ID:07 Base: 7B7AC000
SmmInstallProtocolInterface: 18A3C6DC-5EEA-48C8-A1C1-B53389F98999 7B6670E0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535FA18
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E72C0
Loading SMM driver at 0x0007B652000 EntryPoint=0x0007B6532A0 SmmFaultTolerantWriteDxe.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
Ftw: FtwWorkSpaceLba - 0x1E, WorkBlockSize - 0x1000, FtwWorkSpaceBase - 0x0
Ftw: FtwSpareLba - 0x20, SpareBlockSize - 0x1000
Ftw: NumberOfWorkBlock - 0x2, FtwWorkBlockLba - 0x1E
Ftw: WorkSpaceLbaInSpare - 0x0, WorkSpaceBaseInSpare - 0x0
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Remaining work space size - 1FE0
SmmInstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 7B64F028
Variable PK exists.
Variable SetupMode is 0
Variable SecureBoot is 0
Variable SecureBootEnable is 0
Variable CustomMode is 0
Variable VendorKeys is 1
Variable driver will work with auth variable support!
InstallProtocolInterface: 93BA1826-DFFB-45DD-82A7-E7DCAA3BBDF3 0
InstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F198
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E76C0
Loading SMM driver at 0x0007B634000 EntryPoint=0x0007B635234 BlSwSmiHandler.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
Loading driver 9F7DCADE-11EA-448A-A46F-76E003657DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535E040
Loading driver at 0x0007598D000 EntryPoint=0x0007598E0D4 VariableSmmRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7535ED98
ProtectUefiImageCommon - 0x7535E040
- 0x000000007598D000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007598E000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075993000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
Variable driver runtime cache is enabled.
InstallProtocolInterface: 1E5668E2-8481-11D4-BCF1-0080C73C8881 0
InstallProtocolInterface: CD3D0A05-9E24-437C-A891-1EE053DB7638 759952D0
InstallProtocolInterface: AF23B340-97B4-4685-8D4F-A3F28169B21D 759952A0
InstallProtocolInterface: 6441F818-6362-4E44-B570-7DBA31DD2453 0
PROGRESS CODE: V03040003 I0
Loading driver 42857F0A-13F2-4B21-8A23-53D3F714B840
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310BC0
Loading driver at 0x00075984000 EntryPoint=0x00075985114 CapsuleRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7535EA18
ProtectUefiImageCommon - 0x75310BC0
- 0x0000000075984000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075985000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075988000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 5053697E-2CBC-4819-90D9-0580DEEE5754 0
PROGRESS CODE: V03040003 I0
Loading driver AD608272-D07F-4964-801E-7BD3B7888652
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310240
Loading driver at 0x0007597B000 EntryPoint=0x0007597C0B4 MonotonicCounterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75310698
ProtectUefiImageCommon - 0x75310240
- 0x000000007597B000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007597C000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007597F000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1DA97072-BDDC-4B30-99F1-72A0B56FFF2A 0
PROGRESS CODE: V03040003 I0
Loading driver 378D7B65-8DA9-4773-B6E4-A47826A833E1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E97C0
Loading driver at 0x00075971000 EntryPoint=0x000759720C4 PcRtc.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9598
ProtectUefiImageCommon - 0x752E97C0
- 0x0000000075971000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075972000 - 0x0000000000004000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075976000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 27CFAC87-46CC-11D4-9A38-0090273FC14D 0
PROGRESS CODE: V03040003 I0
Loading driver F0E6A44F-7195-41C3-AC64-54F202CD0A21
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E8CC0
Loading driver at 0x00074D0B000 EntryPoint=0x00074D0B4FC SecureBootConfigDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E8B18
ProtectUefiImageCommon - 0x752E8CC0
- 0x0000000074D0B000 - 0x0000000000076EE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 752E8718
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 74D7A388
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D79928
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 752E7B20
InstallProtocolInterface: F0E6A44F-7195-41C3-AC64-54F202CD0A21 752E7B18
PROGRESS CODE: V03040003 I0
Loading driver 93B80004-9FB3-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752120C0
Loading driver at 0x00074DCD000 EntryPoint=0x00074DCD394 PciBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75212A98
ProtectUefiImageCommon - 0x752120C0
- 0x0000000074DCD000 - 0x00000000000154A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DE0FF8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DE1040
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DE1058
InstallProtocolInterface: 19CB87AB-2CB9-4665-8360-DDCF6054F79D 74DE1028
PROGRESS CODE: V03040003 I0
Loading driver 51CCF399-4FDF-4E55-A45B-E123F84D456A
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75211040
Loading driver at 0x00075201000 EntryPoint=0x00075201394 ConPlatformDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75211F18
ProtectUefiImageCommon - 0x75211040
- 0x0000000075201000 - 0x0000000000006960
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 752073E0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 75207428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 75207410
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 752073B0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 75207428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 75207410
PROGRESS CODE: V03040003 I0
Loading driver 408EDCEC-CF6D-477C-A5A8-B4844E3DE281
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752114C0
Loading driver at 0x00074DE5000 EntryPoint=0x00074DE5374 ConSplitterDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75211718
ProtectUefiImageCommon - 0x752114C0
- 0x0000000074DE5000 - 0x0000000000009C00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DEDE28
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DEE1E8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DEE158
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DEDFD0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DEE1B8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DEE170
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DEDFA0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DEE128
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DEE188
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DEDC70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DEE1A0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DEE140
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DEDE58
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DEE1D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DEE110
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74DEDCB0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74DEDCE0
InstallProtocolInterface: 31878C87-0B75-11D5-9A4F-0090273FC14D 74DEDD50
InstallProtocolInterface: 8D59D32B-C655-4AE9-9B15-F25904992A43 74DEDDA8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DEDEA0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DEE010
PROGRESS CODE: V03040003 I0
Loading driver CCCB0C28-4B24-11D5-9A5A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7520B0C0
Loading driver at 0x00074DC5000 EntryPoint=0x00074DC5394 GraphicsConsoleDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7520BA98
ProtectUefiImageCommon - 0x7520B0C0
- 0x0000000074DC5000 - 0x0000000000007D40
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DCB180
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DCC7A8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DCC790
PROGRESS CODE: V03040003 I0
Loading driver 9E863906-A40F-4875-977F-5B93FF237FC6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7520A040
Loading driver at 0x00074DAF000 EntryPoint=0x00074DAF394 TerminalDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7520AF18
ProtectUefiImageCommon - 0x7520A040
- 0x0000000074DAF000 - 0x000000000000A540
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DB8B38
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DB8CC8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DB8CB0
PROGRESS CODE: V03040003 I0
Loading driver 6B38F7B4-AD98-40E9-9093-ACA2B5A253C4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7520A440
Loading driver at 0x00074DA8000 EntryPoint=0x00074DA8374 DiskIoDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7520A698
ProtectUefiImageCommon - 0x7520A440
- 0x0000000074DA8000 - 0x0000000000006800
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DAE1A8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DAE268
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DAE280
PROGRESS CODE: V03040003 I0
Loading driver 1FA1F39E-FEFF-4AAE-BD7B-38A070A3B609
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75209B40
Loading driver at 0x00074D9F000 EntryPoint=0x00074D9F394 PartitionDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75209E18
ProtectUefiImageCommon - 0x75209B40
- 0x0000000074D9F000 - 0x0000000000008A60
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DA72C0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DA7320
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DA7308
PROGRESS CODE: V03040003 I0
Loading driver CD3BAFB6-50FB-4FE8-8E4E-AB74D2C1A600
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75209140
Loading driver at 0x00074DC1000 EntryPoint=0x00074DC1374 EnglishDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75209418
ProtectUefiImageCommon - 0x75209140
- 0x0000000074DC1000 - 0x0000000000003E00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1D85CD7F-F43D-11D2-9A0C-0090273FC14D 74DC47B8
InstallProtocolInterface: A4C751FC-23AE-4C3E-92E9-4964CF63F349 74DC47F0
PROGRESS CODE: V03040003 I0
Loading driver 820C59BB-274C-43B2-83EA-DAC673035A59
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752001C0
Loading driver at 0x00074DBB000 EntryPoint=0x00074DBB374 SataController.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75200E98
ProtectUefiImageCommon - 0x752001C0
- 0x0000000074DBB000 - 0x0000000000005120
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DBFC88
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DBFCB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DBFCD0
PROGRESS CODE: V03040003 I0
Loading driver 19DF145A-B1D4-453F-8507-38816676D7F6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752005C0
Loading driver at 0x00074D8D000 EntryPoint=0x00074D8D384 AtaBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75200518
ProtectUefiImageCommon - 0x752005C0
- 0x0000000074D8D000 - 0x0000000000008460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D94B20
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D94D48
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D94D30
PROGRESS CODE: V03040003 I0
Loading driver 5E523CB4-D397-4986-87BD-A6DD8B22F455
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF8140
Loading driver at 0x00074CEF000 EntryPoint=0x00074CEF3A4 AtaAtapiPassThruDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8B18
ProtectUefiImageCommon - 0x74DF8140
- 0x0000000074CEF000 - 0x000000000000D2E0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CFB6F8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CFB728
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CFB740
PROGRESS CODE: V03040003 I0
Loading driver 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF8540
Loading driver at 0x00074D99000 EntryPoint=0x00074D99374 ScsiBus.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7018
ProtectUefiImageCommon - 0x74DF8540
- 0x0000000074D99000 - 0x0000000000005BA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D9E660
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D9E690
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D9E6A8
PROGRESS CODE: V03040003 I0
Loading driver 0A66E322-3740-4CCE-AD62-BD172CECCA35
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF7140
Loading driver at 0x00074CE1000 EntryPoint=0x00074CE1374 ScsiDisk.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7B18
ProtectUefiImageCommon - 0x74DF7140
- 0x0000000074CE1000 - 0x000000000000D520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CEDB60
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CEDBD8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CEDBC0
PROGRESS CODE: V03040003 I0
Loading driver 961578FE-B6B7-44C3-AF35-6BC705CD2B1F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF7540
Loading driver at 0x00074CD3000 EntryPoint=0x00074CD339C Fat.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF4F98
ProtectUefiImageCommon - 0x74DF7540
- 0x0000000074CD3000 - 0x000000000000D0C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CDF300
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CDF348
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CDF330
PROGRESS CODE: V03040003 I0
Loading driver 8E325979-3FE1-4927-AAE2-8F5C4BD2AF0D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF4140
Loading driver at 0x00074CC5000 EntryPoint=0x00074CC5374 SdMmcPciHcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF4398
ProtectUefiImageCommon - 0x74DF4140
- 0x0000000074CC5000 - 0x000000000000D460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CD1750
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CD1998
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CD19B0
PROGRESS CODE: V03040003 I0
Loading driver 2145F72F-E6F1-4440-A828-59DC9AAB5F89
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF3040
Loading driver at 0x00074D00000 EntryPoint=0x00074D00374 EmmcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF4598
ProtectUefiImageCommon - 0x74DF3040
- 0x0000000074D00000 - 0x000000000000A900
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D09F70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D0A0D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D0A0B8
PROGRESS CODE: V03040003 I0
Loading driver 430AC2F7-EEC6-4093-94F7-9F825A7C1C40
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF39C0
Loading driver at 0x00074CBC000 EntryPoint=0x00074CBC374 SdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF3818
ProtectUefiImageCommon - 0x74DF39C0
- 0x0000000074CBC000 - 0x00000000000084C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CC3C00
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CC3DB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CC3DA0
PROGRESS CODE: V03040003 I0
Loading driver 5BE3BDF4-53CF-46A3-A6A9-73C34A6E5EE3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF2040
Loading driver at 0x00074CA2000 EntryPoint=0x00074CA24C8 NvmExpressDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2D18
ProtectUefiImageCommon - 0x74DF2040
- 0x0000000074CA2000 - 0x000000000000C700
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CADCE8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CADD78
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CADD60
InstallProtocolInterface: 5C198761-16A8-4E69-972C-89D67954F81D 74CADD28
PROGRESS CODE: V03040003 I0
Loading driver 2FB92EFA-2EE0-4BAE-9EB6-7464125E1EF7
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF2440
Loading driver at 0x00074CB3000 EntryPoint=0x00074CB3374 UhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2398
ProtectUefiImageCommon - 0x74DF2440
- 0x0000000074CB3000 - 0x0000000000008FE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CBB7E8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CBB830
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CBB818
PROGRESS CODE: V03040003 I0
Loading driver BDFE430E-8F2A-4DB0-9991-6F856594777E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF1B40
Loading driver at 0x00074C97000 EntryPoint=0x00074C97374 EhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF1E98
ProtectUefiImageCommon - 0x74DF1B40
- 0x0000000074C97000 - 0x000000000000AC00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CA1388
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CA1408
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CA13F0
PROGRESS CODE: V03040003 I0
Loading driver B7F50E91-A759-412C-ADE4-DCD03E7F7C28
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF11C0
Loading driver at 0x00074C77000 EntryPoint=0x00074C77374 XhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF1498
ProtectUefiImageCommon - 0x74DF11C0
- 0x0000000074C77000 - 0x000000000000F520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C859D8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C85B38
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C85B20
PROGRESS CODE: V03040003 I0
Loading driver 240612B7-A063-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF0CC0
Loading driver at 0x00074C6B000 EntryPoint=0x00074C6B394 UsbBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF0118
ProtectUefiImageCommon - 0x74DF0CC0
- 0x0000000074C6B000 - 0x000000000000BD20
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C76268
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C762B0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C76298
PROGRESS CODE: V03040003 I0
Loading driver 2D2E62CF-9ECF-43B7-8219-94E7FC713DFE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF0340
Loading driver at 0x00074C8E000 EntryPoint=0x00074C8E394 UsbKbDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF0718
ProtectUefiImageCommon - 0x74DF0340
- 0x0000000074C8E000 - 0x0000000000008220
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C95450
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C95B80
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C95B68
PROGRESS CODE: V03040003 I0
Loading driver 9FB4B4A7-42C0-4BCD-8540-9BCC6711F83E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEFCC0
Loading driver at 0x00074C62000 EntryPoint=0x00074C62374 UsbMassStorageDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEF898
ProtectUefiImageCommon - 0x74DEFCC0
- 0x0000000074C62000 - 0x0000000000008080
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C69828
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C69900
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C698E8
PROGRESS CODE: V03040003 I0
Loading driver 0B04B2ED-861C-42CD-A22F-C3AAFACCB896
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEF3C0
Loading driver at 0x00074C87000 EntryPoint=0x00074C87394 GraphicsOutputDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE4F18
ProtectUefiImageCommon - 0x74DEF3C0
- 0x0000000074C87000 - 0x0000000000006B80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C8D5C8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C8D608
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C8D620
PROGRESS CODE: V03040003 I0
Driver 4D9CBEF0-15A0-4D0C-83DB-5213E710C23F was discovered but not loaded!!
Driver 5CAB08D5-AD8F-4D8B-B828-D17A8D9FE977 was discovered but not loaded!!
PROGRESS CODE: V03041001 I0
[Bds] Entry...
[BdsDxe] Locate Variable Lock protocol - Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformLangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:LangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOptionSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:HwErrRecSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:OsIndicationsSupported Success
Variable Driver Auto Update PlatformLang, PlatformLang:en, Lang:eng Status: Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformRecovery0000 Success
PROGRESS CODE: V03051005 I0
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
SR-IOV: SupportedPageSize = 0x553; SystemPageSize = 0x1; FirstVFOffset = 0x1;
InitialVFs = 0x7; ReservedBusNum = 0x1; CapOffset = 0x320
BAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[1]: Type = PMem64; Alignment = 0xFFFFFFF; Length = 0x10000000; Offset = 0x18
BAR[2]: Type = Io16; Alignment = 0x3F; Length = 0x40; Offset = 0x20
VFBAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x7000000; Offset = 0x344
VFBAR[1]: Type = PMem64; Alignment = 0x1FFFFFFF; Length = 0xE0000000; Offset = 0x34C
PciBus: Discovered PPB @ [00|06|00]
PciBus: Discovered PCI @ [01|00|00]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
PciBus: Discovered PCI @ [00|08|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|0A|00]
BAR[0]: Type = Mem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|10|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|14|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|14|02]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|15|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|15|01]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|16|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|17|00]
BAR[0]: Type = Mem32; Alignment = 0x1FFF; Length = 0x2000; Offset = 0x10
BAR[1]: Type = Mem32; Alignment = 0xFFF; Length = 0x100; Offset = 0x14
BAR[2]: Type = Io16; Alignment = 0x7; Length = 0x8; Offset = 0x18
BAR[3]: Type = Io16; Alignment = 0x3; Length = 0x4; Offset = 0x1C
BAR[4]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
BAR[5]: Type = Mem32; Alignment = 0xFFF; Length = 0x800; Offset = 0x24
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [02|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [03|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [05|00|00]
PciBus: Discovered PPB @ [05|01|00]
PciBus: Discovered PPB @ [05|02|00]
PciBus: Discovered PPB @ [05|03|00]
PciBus: Discovered PPB @ [05|04|00]
PciBus: Discovered PCI @ [0A|00|00]
ARI: forwarding enabled for PPB[05:04:00]
ARI: CapOffset = 0x150
BAR[0]: Type = PMem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[2]: Type = PMem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0B|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0C|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0D|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PCI @ [00|1E|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|1E|03]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[3]: Type = Mem64; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|04]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x100; Offset = 0x10
BAR[3]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|05]
BAR[0]: Type = Mem32; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DEF698
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DE3428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 754D9898
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DE3828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DE4318
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DBA028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DE4398
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DBA428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DE4A98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DBA828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DE4B18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D98028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D98E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D98428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D98F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D98828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D98F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D97028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D97E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D97428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D97F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D97828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D97F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D96028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D96E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D96428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D96F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D96828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D96F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8C028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8CE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8C428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8CF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8C828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8CF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8B028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8BE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8B428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8BF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8B828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8BF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8A028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8AE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8A428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8AF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D8A828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D8AF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D89028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D89E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D89428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D89F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D89828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D89F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D88028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D88E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D88428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D88F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D88828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D88F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D87028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D87E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D87428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D87F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D87828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D87F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D86028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D86E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D86428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D86F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D86828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D86F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D85028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D85E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D85428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D85F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D85828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D85F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D84028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D84E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D84428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D84F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D84828
Found PCI VGA device
Found LPC Bridge device
[EnumUsbKeyboard] USB keyboard path exists
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x5000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74C3D000
XhcInitSched: Created CMD ring [74C3D240~74C3E240) EVENT ring [74C3E240~74C40240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74C4D038
XhcDriverBindingStart: XHCI started for controller @ 74D88E18
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74CB11A0
XhcGetCapability: 5 ports, 64 bit 1
UsbRootHubInit: root hub 74C1BD18 - max speed 3, 5 ports
UsbBusStart: usb bus started on 74D88E18, root hub 74C1BD18
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x10000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74BF6000
XhcInitSched: Created CMD ring [74BF6240~74BF7240) EVENT ring [74BF7240~74BF9240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74C06038
XhcDriverBindingStart: XHCI started for controller @ 74D8CC98
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74BD20A0
XhcGetCapability: 16 ports, 64 bit 1
UsbRootHubInit: root hub 74BD1D18 - max speed 3, 16 ports
XhcClearRootHubPortFeature: status Success
UsbEnumeratePort: port 0 state - 01, change - 01 on 74BD1D18
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 0
XhcUsbPortReset!
XhcSetRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
Enable Slot Successfully, The Slot ID = 0x1
Address 1 assigned successfully
UsbEnumerateNewDev: hub port 0 is reset
UsbEnumerateNewDev: device is of 2 speed
UsbEnumerateNewDev: device uses translator (0, 0)
UsbEnumerateNewDev: device is now ADDRESSED at 1
UsbEnumerateNewDev: max packet size for EP 0 is 64
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 25
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BFAAC0~74BFBAC0)
Configure Endpoint
UsbEnumerateNewDev: device 1 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 1
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BD0F98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74BD0AC0
UsbConnectDriver: found a hub device
Configure Hub Slot Context
UsbHubInit: hub 1 has 4 ports
UsbHubInit: hub 1 initialized
UsbBusStart: usb bus started on 74D8CC98, root hub 74BD1D18
[GraphicsOutputDxe]: GraphicsDeviceInfo HOB:
VendorId = 8086, DeviceId = 9A49,
RevisionId = FF, BarIndex = 1,
SubsystemVendorId = FFFF, SubsystemId = FFFF
[GraphicsOutputDUsbEnumeratePort: port 2 state - 201, change - 01 on 74BD0A98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 2
Enable Slot Successfully, The Slot ID = 0x2
Address 2 assigned successfully
UsbEnumerateNewDev: hub port 2 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 3)
UsbEnumerateNewDev: device is now ADDRESSED at 2
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 59
UsbParseConfigDesc: config 1 has 2 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
UsbParseInterfaceDesc: interface 1(setting 0) has 1 endpoints
XhcCheckUrbResult: STALL_ERROR! Completecode = 6
Recovery Halted Slot = 2,Dci = 1
XhcResetEndpoint: Slot = 0x2, Dci = 0x1
XhcSetTrDequeuePointer: Slot = 0x2, Dci = 0x1, Urb = 0x74BCDA98
XhcControlTransfer: error - Device Error, transfer - 2
UsbBuildDescTable: get language ID table Unsupported
Endpoint[81]: Created INT ring [74BFD300~74BFE300)
Endpoint[82]: Created INT ring [74BFE300~74BFF300)
Configure Endpoint
UsbEnumerateNewDev: device 2 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 2
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BCDC98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74BCDBC0
UsbConnectDriver: TPL before connect is 8, 74BCDD18
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74BCC038
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74BCC050
InstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
UsbConnectDriver: TPL after connect is 8
UsbSelectSetting: setting 0 selected for interface 1
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BCC698
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74BCCBC0
UsbEnumeratePort: port 3 state - 201, change - 01 on 74BD0A98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 3
Enable Slot Successfully, The Slot ID = 0x3
Address 3 assigned successfully
UsbEnumerateNewDev: hub port 3 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 4)
UsbEnumerateNewDev: device is now ADDRESSED at 3
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 34
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74C00B40~74C01B40)
Configure Endpoint
UsbEnumerateNewDev: device 3 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 3
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BC8D18
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74BC8BC0
xe]: BAR[1]: Base = 90000000, Length = 10000000
[GraphicsOutputDxe]: ... matched!
[GraphicsOutputDxe]: GraphicsDeviceInfo HOB:
VendorId = 8086, DeviceId = 9A49,
RevisionId = FF, BarIndex = 1,
SubsystemVendorId = FFFF, SubsystemId = FFFF
[GraphicsOutputDxe]: BAR[1]: Base = 90000000, Length = 10000000
[GraphicsOutputDxe]: ... matched!
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 74BC7EA8
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BCFD18
GraphicsConsole video resolution 1920 x 1080
Graphics - Mode 0, Column = 80, Row = 25
Graphics - Mode 1, Column = 80, Row = 50
Graphics - Mode 2, Column = 100, Row = 31
Graphics - Mode 3, Column = 240, Row = 56
Graphics Console Started, Mode: 0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74BC7430
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 74DEDF30
[Variable] Lock: AEB9C5C1-94F1-4D02-BFD9-4602DB2D3C54:Tcg2PhysicalPresenceFlags Success
[TPM2] Flags=700E2, PPRequest=0 (LastPPRequest=0)
[TPM2] PPResponse = 0 (LastPPRequest=0, Flags=700E2)
InstallReadyToLock entering......
SmmEndOfDxeHandler
SmmInstallProtocolInterface: 24E70042-D5C5-4260-8C39-0AD3AA32E93D 0
SMM MemoryProtectionAttribute - 0x0000000000000001
MemoryMapSize - 0xBD0
MemoryMap - 0x7B631018
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
[Variable]SMM_END_OF_DXE is signaled
[Variable] Lock: E20939BE-32D4-41BE-A150-897F85D49829:MemoryOverwriteRequestControl Success
[Variable] Lock: BB983CCF-151D-40E1-A07B-4A17BE168292:MemoryOverwriteRequestControlLock Success
VarCheckHiiGenDxeFromHii - HII Database exported at 0x74BB8000, size = 0x9B34
VarCheckHiiGenDxeFromFv
VarCheckHiiBin - size = 0x0
[VarCheckHii] This driver could be removed from *.dsc and *.fdf
Initialize variable error flag (FF)
All EndOfDxe callbacks have returned successfully
InstallProtocolInterface: 60FF8964-E906-41D0-AFED-F241E974E08E 0
SMI LOCK is set.
SmmAccess: Prepare to lock SMRAM Region
SmmAccess: Locked SMM success!
SmmInstallProtocolInterface: 47B7FA8C-F4BD-4AF6-8200-333086F0D2C8 0
GetUefiMemoryMap
SMM Driver 44A20657-10B8-4049-A148-ACD8812AF257 was discovered but not loaded!!
Patch page table start ...
Patch page table done!
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
PatchSmmSaveStateMap:
PatchGdtIdtMap - GDT:
PatchGdtIdtMap - IDT:
SetUefiMemMapAttributes
UefiMemory protection: 0x0 - 0xA0000 Success
UefiMemory protection: 0x100000 - 0x758A6000 Success
UefiMemory protection: 0x75DEC000 - 0x761B8000 Success
UefiMemory protection: 0x766B8000 - 0x76748000 Success
UefiMemory protection: 0x100000000 - 0x880400000 Success
UefiMemoryAttribute protection: 0x75972000 - 0x75976000 Success
UefiMemoryAttribute protection: 0x7597C000 - 0x7597F000 Success
UefiMemoryAttribute protection: 0x75985000 - 0x75988000 Success
UefiMemoryAttribute protection: 0x7598E000 - 0x75993000 Success
UefiMemoryAttribute protection: 0x7599A000 - 0x7599F000 Success
UefiMemoryAttribute protection: 0x759A6000 - 0x759A9000 Success
UefiMemoryAttribute protection: 0x759AF000 - 0x759B2000 Success
UefiMemoryAttribute protection: 0x759B9000 - 0x759BC000 Success
UefiMemoryAttribute protection: 0x759C3000 - 0x759C6000 Success
UefiMemoryAttribute protection: 0x759CD000 - 0x759D0000 Success
SetPageTableAttributes
Start...
SMM IPL locked SMRAM window
InstallReadyToLock end
[Bds]RegisterKeyNotify: 000C/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0002/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0000/000D 80000000/00 Success
Terminal - Mode 0, Column = 80, Row = 25
Terminal - Mode 1, Column = 80, Row = 50
Terminal - Mode 2, Column = 100, Row = 31
^[[2J^[[01;01H^[[=3h^[[2J^[[01;01HInstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74BC11C0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74BC12A8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74BC11D8
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BC1C18
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: D3B36F2D-D551-11D4-9A46-0090273FC14D 0
^[[0m^[[35m^[[40mInstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
NvmExpressDriverBindingStart: start
Cc.En: 0
Cc.Css: 0
Cc.Mps: 0
Cc.Ams: 0
Cc.Shn: 0
Cc.Iosqes: 0
Cc.Iocqes: 0
NVMe controller is disabled with status [Success].
Private->Buffer = [0000000074BB6000]
Admin Submission Queue size (Aqa.Asqs) = [00000001]
Admin Completion Queue size (Aqa.Acqs) = [00000001]
Admin Submission Queue (SqBuffer[0]) = [0000000074BB6000]
Admin Completion Queue (CqBuffer[0]) = [0000000074BB7000]
Sync I/O Submission Queue (SqBuffer[1]) = [0000000074BB8000]
Sync I/O Completion Queue (CqBuffer[1]) = [0000000074BB9000]
Async I/O Submission Queue (SqBuffer[2]) = [0000000074BBA000]
Async I/O Completion Queue (CqBuffer[2]) = [0000000074BBB000]
Aqa.Asqs: 1
Aqa.Acqs: 1
Asq: 74BB6000
Acq: 74BB7000h
Cc.En: 1
Cc.Css: 0
Cc.Mps: 0
Cc.Ams: 0
Cc.Shn: 0
Cc.Iosqes: 6
Cc.Iocqes: 4
NVMe controller is enabled with status [Success].
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x1D79
PCI SSVID : 0x1D79
SN : I050750563
MN : TS1TMTE400S
FR : 0x30383056
RAB : 0x6
IEEE : 0x7C3548
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
InstallProtocolInterface: 52C78312-8EDC-4233-98F2-1A1AA5E388A5 74BBD260
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BBCA98
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74BB0088
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74BB00B8
InstallProtocolInterface: D432A67F-14DC-484B-B3BB-3F0291849327 74BB00E0
InstallProtocolInterface: C88B0B6D-0DFC-49A7-9CB4-49074B4C3A78 74BB0110
== NVME IDENTIFY NAMESPACE [1] DATA ==
NSZE : 0x773BD2B0
NCAP : 0x773BD2B0
NUSE : 0x773BD2B0
LBAF0.LBADS : 0x9
NvmExpressDriverBindingStart: end successfully
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74BB3C20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74BB3C38
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BB3798
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74BB2D30
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74BB2D60
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74BB2DE8
InstallProtocolInterface: C12A7328-F81F-11D2-BA4B-00A0C93EC93B 0
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BB2C98
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74BB22B0
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74BB22E0
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74BB2368
InstallProtocolInterface: 0FC63DAF-8483-4772-8E79-3D69D8477DE4 0
Index : 2
Start LBA : 32C800
End LBA : 773BCFFF
Partition size: 77090800
Start : 65900000 End : EE779FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74BA2F18
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 74BB2830
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 74BB2860
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 74BB28E8
InstallProtocolInterface: E6D6D379-F507-44C2-A23C-238F2A3DF928 0
Prepare to Free Pool
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74BB3920
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74BB3938
BlockSize : 512
LastBlock : 12BFFF
InstallProtocolInterface: 964E5B22-6459-11D2-8E39-00A0C969723B 74BA7030
Installed Fat filesystem on 74BB3818
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74BA2820
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74BA2838
BlockSize : 512
LastBlock : 1FFFFF
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74BA2120
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74BA2138
BlockSize : 512
LastBlock : 770907FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
Original PCI Attributes = 0x4700
Supported PCI Attributes = 0xE700
Enabled PCI Attributes = 0x700
Ports Implemented(PI) = 0x1
HBA Capabilities(CAP) = 0xE534FF00
InstallProtocolInterface: A1E37052-80D9-4E65-A317-3E9A55C43EC9 74BA5F20
SataControllerStart end with Success
==AtaAtapiPassThru Start== Controller = 74DE4698
IDENTIFY DEVICE: [0] = 000000000000427A, [2] = 000000000000C837, [83] = 0000000000007408, [86] = 000000000000BC08
port [0] port multitplier [0] has a [harddisk]
Enabled S.M.A.R.T feature at port [0] PortMultiplier [0]!
CalculateBestPioMode: AdvancedPioMode = 3
IdeInitCalculateMode: PioMode = 4
CalculateBestUdmaMode: DeviceUDmaMode = 407F
IdeInitCalculateMode: UdmaMode = 5
InstallProtocolInterface: 1D3DE7F0-0807-424F-AA69-11A54E19A46F 74BA5440
InstallProtocolInterface: 143B7632-B81B-4CB7-ABD3-B625A5B9BFFE 74BA5490
InstallProtocolInterface: 19DF145A-B1D4-453F-8507-38816676D7F6 74607F18
AtaBus - Identify Device: Port 0 PortMultiplierPort FFFF
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74607C18
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 746079A8
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 746079D8
InstallProtocolInterface: D432A67F-14DC-484B-B3BB-3F0291849327 74607A30
InstallProtocolInterface: 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B 74607420
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 74604B20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 74604B38
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74604698
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745F6D30
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745F6D60
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 745F6DE8
InstallProtocolInterface: C12A7328-F81F-11D2-BA4B-00A0C93EC93B 0
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 745F6518
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745F62B0
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745F62E0
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 745F6368
InstallProtocolInterface: 0FC63DAF-8483-4772-8E79-3D69D8477DE4 0
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 745F5F18
InstallProtocolInterface: 964E5B21-6459-11D2-8E39-00A0C969723B 745F65B0
InstallProtocolInterface: A77B2472-E282-4E9F-A245-C2C0E27BBCC1 745F65E0
InstallProtocolInterface: 8CF2F62C-BC9B-4821-808D-EC9EC421A1A0 745F6668
InstallProtocolInterface: E6D6D379-F507-44C2-A23C-238F2A3DF928 0
Prepare to Free Pool
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745F5C20
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745F5C38
BlockSize : 512
LastBlock : 12BFFF
InstallProtocolInterface: 964E5B22-6459-11D2-8E39-00A0C969723B 745FB030
Installed Fat filesystem on 74604718
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745F6020
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745F6038
BlockSize : 512
LastBlock : 1FFFFF
InstallProtocolInterface: CE345171-BA0B-11D2-8E4F-00A0C969723B 745F55A0
InstallProtocolInterface: 151C8EAE-7F2C-472C-9E54-9828194F6A88 745F55B8
BlockSize : 512
LastBlock : EB4F7FF
NvmExpressDriverBindingStart: start
NvmExpressDriverBindingStart: end successfully
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : 773BCFFF
Partition size: 77090800
Start : 65900000 End : EE779FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 770907FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
SataControllerStart error. return status = Already started
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
^[[0m^[[37m^[[40m
F2 or Down to enter Boot Manager Menu.
ENTER to boot directly.
[Bds]OsIndication: 0000000000000000
[Bds]=============Begin Load Options Dumping ...=============
Driver Options:
SysPrep Options:
Boot Options:
Boot0004: redhat 0x0001
Boot0000: UiApp 0x0109
Boot0002: UEFI 128GB NANDrive 00000000001R11M7MMXF 0x0001
Boot0003: UEFI Shell 0x0001
Boot0001: UEFI TS1TMTE400S I050750563 1 0x0001
PlatformRecovery Options:
PlatformRecovery0000: Default PlatformRecovery 0x0001
[Bds]=============End Load Options Dumping=============
[Bds]BdsWait ...Zzzzzzzzzzzz...
[Bds]BdsWait(3)..Zzzz...
[Bds]BdsWait(2)..Zzzz...
[Bds]BdsWait(1)..Zzzz...
[Bds]Exit the waiting!
PROGRESS CODE: V03051007 I0
[Bds]Stop Hotkey Service!
[Bds]UnregisterKeyNotify: 000C/0000 Success
[Bds]UnregisterKeyNotify: 0002/0000 Success
[Bds]UnregisterKeyNotify: 0000/000D Success
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
Install PPI: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
FSP NotifyPhase ReadyToBoot Success.
PROGRESS CODE: V03051001 I0
Memory Previous Current Next
Type Pages Pages Pages
====== ======== ======== ========
09 00000008 00000000 00000008
0A 0000000A 00000000 0000000A
00 00000016 00000002 00000016
06 00000400 0000004F 00000400
05 00000130 00000065 00000130
[Bds]Booting redhat
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
NvmExpressDriverBindingStart: start
NvmExpressDriverBindingStart: end successfully
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : 773BCFFF
Partition size: 77090800
Start : 65900000 End : EE779FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 770907FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
SataControllerStart error. return status = Already started
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
NvmExpressDriverBindingStart: start
NvmExpressDriverBindingStart: end successfully
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : 773BCFFF
Partition size: 77090800
Start : 65900000 End : EE779FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 770907FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
SataControllerStart start
SataControllerStart error. return status = Already started
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
BlockSize : 512
LastBlock : 773BD2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : 773BCFFF
Partition size: 77090800
Start : 65900000 End : EE779FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 770907FF
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : 770907FF
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
[Bds] Expand HD(1,GPT,1CE6CF3B-848B-4925-9EAC-7150CCF8B3EF,0x800,0x12C000)/\EFI\redhat\shimx64.efi -> <null string>
ERROR: C40000002:V03051002 I0 6D33944A-EC75-4855-A54D-809C75241F6C 76173920
PROGRESS CODE: V03051001 I0
Memory Previous Current Next
Type Pages Pages Pages
====== ======== ======== ========
09 00000008 00000000 00000008
0A 0000000A 00000000 0000000A
00 00000016 00000002 00000016
06 00000400 0000004F 00000400
05 00000130 00000065 00000130
[Bds]Booting UEFI 128GB NANDrive 00000000001R11M7MMXF
BlockSize : 512
LastBlock : EE7C2AF
Valid efi partition table header
Valid efi partition table header
Valid primary and Valid backup partition table
Partition entries read block success
Number of partition entries: 128
start check partition entries
End check partition entries
Index : 0
Start LBA : 800
End LBA : 12C7FF
Partition size: 12C000
Start : 100000 End : 258FFE00
Index : 1
Start LBA : 12C800
End LBA : 32C7FF
Partition size: 200000
Start : 25900000 End : 658FFE00
Index : 2
Start LBA : 32C800
End LBA : EE7BFFF
Partition size: EB4F800
Start : 65900000 End : 1DCF7FFE00
Prepare to Free Pool
BlockSize : 512
LastBlock : 1FFFFF
BlockSize : 512
LastBlock : EB4F7FF
FSOpen: Open '\EFI\BOOT\BOOTX64.EFI' Success
[Bds] Expand PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0) -> PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,1E2FDFDE-4B2C-46EE-B70C-995B4F0DECDA,0x800,0x12C000)/\EFI\BOOT\BOOTX64.EFI
PROGRESS CODE: V03058000 I0
[Security] 3rd party image[0] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,1E2FDFDE-4B2C-46EE-B70C-995B4F0DECDA,0x800,0x12C000)/\EFI\BOOT\BOOTX64.EFI.
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74159AC0
Loading driver at 0x00073F90000 EntryPoint=0x00073FB3000
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74BC2618
ProtectUefiImageCommon - 0x74159AC0
- 0x0000000073F90000 - 0x00000000000D2000
PROGRESS CODE: V03058001 I0
InstallProtocolInterface: 605DAB50-E046-4300-ABB6-3DD810DD8B23 740416E0
FSOpen: Open '\EFI\BOOT\fbx64.efi' Success
FSOpen: Open '\EFI\BOOT\fbx64.efi' Success
FSOpen: Open 'EFI' Success
FSOpen: Open 'redhat' Success
FSOpen: Open 'BOOTX64.CSV' Success
FSOpen: Open '\EFI\redhat\BOOTX64.CSV' Success
FSOpen: Open '\EFI\redhat\shimx64.efi' Success
[Security] 3rd party image[0] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,1E2FDFDE-4B2C-46EE-B70C-995B4F0DECDA,0x800,0x12C000)/\EFI\redhat\shimx64.efi.
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7415B940
Loading driver at 0x00073DD6000 EntryPoint=0x00073DF9000
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7415B818
ProtectUefiImageCommon - 0x7415B940
- 0x0000000073DD6000 - 0x00000000000D2000
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListXRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:SbatLevelRT
[Variable]: Rewritten a preexisting variable(0x00000006) with different attributes(0x00000007) - 605DAB50-E046-4300-ABB6-3DD810DD8B23:MokListTrustedRT
InstallProtocolInterface: 605DAB50-E046-4300-ABB6-3DD810DD8B23 73E876E0
FSOpen: Open '\EFI\redhat\grubx64.efi' Success
ConvertPages: Incompatible memory types, the pages to allocate have been allocated
XhcClearBiosOwnership: called to clear BIOS ownership
XhcClearBiosOwnership: called to clear BIOS ownership
FPDT: -ResetEnd = 21000000
FPDT: -OsLoaderLoadImageStart = 56982000000
FPDT: -OsLoaderStartImageStart = 57031000000
FPDT: -ExitBootServicesEntry = 59380000000
Install PPI: BD44F629-EAE7-4198-87F1-39FAB0FD717E
FSP NotifyPhase EndOfFirmware Success.
gAddPerfRecordProtocolGuid - Locate protocol failed
SmmInstallProtocolInterface: 296EB418-C4C8-4E05-AB59-39E8AF56F00A 0
CpuDxe: 5-Level Paging = 0
MpInitChangeApLoopCallback() done!
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x000000000000A000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x000000000000C000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x000000000000C000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000009000 (0x0000000000000008)
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x000000000000A000 (0x0000000000000008)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #5: Test_10Jan25_1_payloaddebug_withwdblacknvme.log --]
[-- Type: text/x-log; name="Test_10Jan25_1_payloaddebug_withwdblacknvme.log", Size: 1560973 bytes --]
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2025.01.10 17:53:45 =~=~=~=~=~=~=~=~=~=~=~=
\0
============= Intel Slim Bootloader STAGE1A =============
Serial Port Base: 00000000FE032000
PcdPciExpressBaseAddress: 00000000C0000000
mUartMmPciOffset[DebugPort]: 00000000000F0000
PciAddress: 00000000C00F0000
SBID: CTIPL_TGL
ISVN: 001
IVER: 001.000.001.008.00017
SVER: 0000000000000000
FDBG: BLD(D IA32) FSP(D)
FSPV: ID(TGLI-FSP) REV(0A007E70)
CPUV: ID(806C1) UCODE(AC)
Loader global data @ 0xFEF3FC10
Run STAGE1A @ 0xFFFEA000
Load STAGE1B @ 0xFFD80000
============= Intel Slim Bootloader STAGE1B =============
[Boot Guard] AcmStatus : 0x00000000
[Boot Guard] BootStatus: 0x00000000
[Boot Guard] Boot Guard Failed or is Disabled!
SpiInstance = FEF4C3D0
PchSpiBase at 0x00001F05
ScSpiBar0 at 0xF0000000
Loading Component KEYH:_HS_
Registering container KEYH
HASH verification for usage (0x00000100) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000100): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Append public key hash into store: Success
Load EXT CFG Data @ 0xFEF4CB54:0x1034 ... Success
HASH verification for usage (0x00000200) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00000200): Success
Calculate Hash for component Type 0x4 as its not available in Component hash table
Processor does not support Boot Guard.
Boot Guard Support status: 0
GetPlatformDataPtr is copied 0xFEF4CB34
BOOT: BP0
MODE: 0
PlatformName: INDi11
Memory Init
FSPM CfgData assignment
Load Memory Cfg Data
SkipMbpHob = 0x0
Load Graphics Cfg Data
Call FspMemoryInit ...
============= FSP Spec v2.2 Header Revision v5 (TGLI-FSP vA.0.7E.70) =============
Fsp BootFirmwareVolumeBase - 0xFFDEE000
Fsp BootFirmwareVolumeSize - 0x112000
Fsp TemporaryRamBase - 0xFEF4FF00
Fsp TemporaryRamSize - 0x50000
Fsp PeiTemporaryRamBase - 0xFEF4FF00
Fsp PeiTemporaryRamSize - 0x50000
Fsp StackBase - 0xFEF3EFD0
Fsp StackSize - 0x0
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x000FFDEE000, size is 0x00112000, handle is 0xFFDEE000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: A1EEAB87-C859-479D-89B5-1461F4061A3E
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x7 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x000FFE09C98 EntryPoint=0x000FFE09DCD PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM 6141E486-7543-4F1A-A579-FF532ED78E75
Loading PEIM at 0x000FFE0B59C EntryPoint=0x000FFE0B7DD ResetSystemPei.efi
Install PPI: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: 8C9F4DE3-7B90-47EF-9308-287CECD66DE8
Install PPI: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Install PPI: 75CF14AE-3441-49DC-AA10-BB35A7BA8BAB
Loading PEIM BAEB5BEE-5B33-480A-8AB7-B29C85E7CEAB
Loading PEIM at 0x000FFE0CBCC EntryPoint=0x000FFE0CE2D FspGlobalDataInitPei.efi
FspData: Signature - 0x44505346
FspData: Version - 0x0
FspData: PerfIdx - 0x3
FspData: PerfSig - 0x46524550
FspData: FspMode - API
FspData: FspInfoHeader - 0xFFDEE094
FspData: TempRamInitUpdPtr - 0x0
Loading PEIM 1B04374D-FA9C-420F-AC62-FEE6D45E8443
Loading PEIM at 0x000FFE15BDC EntryPoint=0x000FFE15E1D FspDebugServicePei.efi
=====================================
FSP Version : 0A.00.7E.70
RC Version : 0A.E0.7E.70
Build Date : 202403221131
=====================================
Install PPI: 835F3942-1545-414B-9459-BF072FA9A289
Loading PEIM 88C17E54-EBFE-4531-A992-581029F58126
Loading PEIM at 0x000FFE1F554 EntryPoint=0x000FFE1F70A FspPcdInit.efi
FspPcdInitEntryPoint() - Updating PcdPciExpressRegionLength to 0x10000000 & PcdPciExpressBaseAddress to 0xC0000000
Loading PEIM A8499E65-A6F6-48B0-96DB-45C266030D83
Loading PEIM at 0x000FFE20054 EntryPoint=0x000FFE20725 SiInitPreMemFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
SiInitPrePolicy() Start
PCH Series : TGL PCH-LP
PCH Stepping : B0
PCH SKU : LP IOT SKU
GBLRST_CAUSE0: 0x0
GBLRST_CAUSE1: 0x0
HPR_CAUSE0 : 0x0
FIA LOS0 = 0x00000011
FIA LOS1 = 0x00000200
POSTCODE=<00000B00>
PchInitPrePolicy() - Start
PCH PWRM Base needs to be programmed before here
(WDT) Readback = 0x00002000
Register PPI Notify: E09F355D-DAE8-4910-B14A-92780FDCF7CB
Notify: PPI Guid: E09F355D-DAE8-4910-B14A-92780FDCF7CB, Peim notify entry point: FFE3F544
Install PPI: F38D1338-AF7A-4FB6-91DB-1A9C2183570D
SpiServiceInit() Start
Flash Region read Permission : FF
Flash Region write Permission : FF
Component 0 SFDP VSCC value : B1D82084
Component 1 SFDP VSCC value : 2000
Component Number : 1
Total Flash Size : 2000000
PchStrapBaseAddr : 100
PchStrapSize : 118
Mdtba : C00
CpuStrapBaseAddr : C68
CpuStrapSize : 44
SPI PPI Installed
Install PPI: DADE7CE3-6971-4B75-825E-0EE0EB17722D
SpiServiceInit() End
POSTCODE=<00000B02>
LpcOnEarlyPeiConfigure()
PchEarlyDisabledDeviceHandling() - Start
SPA Controller PCD Value = 3210
SPB Controller PCD Value = 7654
SPC Controller PCD Value = 3210
Multilane check for PCIE Controller 0: PCIe SPA is 4x1
No ports disabled
Multilane check for PCIE Controller 1: PCIe SPB is 1x4
Disabling RP 6/7/8
Multilane check for PCIE Controller 2: PCIe SPC is 4x1
No ports disabled
SCS UFS[0] Fuse disabled - performing PSF disable
SCS UFS[1] Fuse disabled - performing PSF disable
ISH Supported and Fuse disabled - performing PSF disable
GBE Supported and Fuse disabled - performing PSF disable
CNVi WiFi function Fuse disabled - performing PSF disable
PchEarlyDisabledDeviceHandling() - End
POSTCODE=<00000B7F>
PchInitPrePolicy() - End
Register PPI Notify: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Install PPI: BC1CFBDB-7E50-42BE-B487-22E0A90CB052
Install PPI: FEC36242-F8D8-4B43-8794-4F1F9F638DDC
SiInitPrePolicy() - End
Loading PEIM 9E1CC850-6731-4848-8752-6673C7005EEE
Loading PEIM at 0x000FFEE2268 EntryPoint=0x000FFEE2595 FspInitPreMem.efi
FspInitPreMemEntryPoint
POSTCODE=<0000D800>
Register PPI Notify: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8
Install PPI: EF398D58-9DFD-4103-BF94-78C6F4FE712F
Installing StallPpi
Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56
Dumping FSPM_UPD - Size: 0x00000978
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x4D 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xF4 0xFE 0x00 0x00 0x05 0x00
0x00000030: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x00 0x60 0x97 0x05 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x01 0xB4 0xE5 0xF4 0xFE
0x00000050: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000060: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000070: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE
0x00000080: 0x00 0x00 0x00 0x00 0xB4 0xE5 0xF4 0xFE 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00
0x000000A0: 0x01 0x00 0x00 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x06 0x07 0x03 0x02 0x05 0x04
0x000000B0: 0x0F 0x08 0x09 0x0E 0x0C 0x0B 0x0A 0x0D 0x0B 0x0C 0x08 0x0F 0x09 0x0E 0x0A 0x0D
0x000000C0: 0x03 0x04 0x07 0x00 0x06 0x01 0x05 0x02 0x04 0x05 0x03 0x02 0x07 0x01 0x00 0x06
0x000000D0: 0x0B 0x0A 0x0C 0x0D 0x08 0x09 0x0E 0x0F 0x0C 0x0B 0x08 0x0D 0x0E 0x0F 0x09 0x0A
0x000000E0: 0x04 0x07 0x03 0x02 0x01 0x06 0x00 0x05 0x0B 0x0A 0x09 0x08 0x0C 0x0D 0x0F 0x0E
0x000000F0: 0x04 0x05 0x06 0x07 0x03 0x02 0x00 0x01 0x00 0x07 0x01 0x06 0x03 0x05 0x02 0x04
0x00000100: 0x09 0x08 0x0A 0x0B 0x0E 0x0F 0x0D 0x0C 0x04 0x05 0x06 0x01 0x03 0x02 0x07 0x00
0x00000110: 0x0A 0x0D 0x0C 0x0B 0x0E 0x09 0x0F 0x08 0x0A 0x0C 0x09 0x0F 0x08 0x0B 0x0D 0x0E
0x00000120: 0x03 0x04 0x01 0x02 0x06 0x00 0x05 0x07 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x00
0x00000150: 0x02 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000160: 0x00 0x00 0xD9 0xFE 0x00 0x20 0xD9 0xFE 0x00 0x10 0xD9 0xFE 0x00 0x40 0xD8 0xFE
0x00000170: 0x00 0x50 0xD8 0xFE 0x00 0x60 0xD8 0xFE 0x00 0x70 0xD8 0xFE 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0xFE 0x01 0x01 0x05 0x00 0x00 0x00
0x00000190: 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x20 0xDA 0xFE 0x00 0x30 0xDA 0xFE
0x000001D0: 0x00 0x40 0xDA 0xFE 0x2C 0x01 0x64 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0xAF 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01 0x01
0x00000260: 0x01 0x00 0x00 0x00 0xFF 0xFF 0xFF 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xB0 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x02 0x02 0x04 0x00 0x00 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00
0x000002A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x02 0x00 0x01 0x01 0x08
0x00000300: 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02
0x00000310: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000320: 0x00 0x00 0x00 0x01 0x00 0x00 0x02 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00
0x00000330: 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000360: 0x00 0x00 0x00 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x6C 0xFF 0x00 0x00 0x00 0x00
0x00000370: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000380: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000390: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000003F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000400: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000410: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000420: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000430: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000440: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000450: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000460: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000470: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000480: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000490: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000004F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000500: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000510: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000520: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000530: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000540: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000550: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000560: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000570: 0x00 0x00 0x04 0x00 0xA0 0xEF 0x00 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0xFF 0xFF
0x00000580: 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08
0x00000590: 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 0xF0 0xD9 0xF4 0xFE 0xFF 0xFF 0xFF 0x00
0x000005A0: 0x10 0x00 0x00 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x08 0x00 0x00 0x60 0x03 0xFE
0x000005B0: 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x07 0x00
0x000005C0: 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01
0x000005D0: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x00 0x01 0x01
0x000005E0: 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000005F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x3F 0xFF 0x3F
0x00000600: 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0xFF 0x3F 0x01 0x01 0x01 0x01
0x00000610: 0x00 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x01 0x00 0x01 0x01
0x00000620: 0x01 0x01 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0xCC 0x30
0x00000630: 0x00 0xE1 0xF5 0x05 0x1A 0x00 0x0B 0x00 0x0B 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A 0x0A
0x00000640: 0x0A 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC 0xAC
0x00000650: 0xAC 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xD4 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD 0xDD
0x00000660: 0xDD 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x03 0x00
0x00000670: 0x00 0x01 0x00 0x01 0x0F 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000680: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000690: 0x00 0x03 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006B0: 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000006C0: 0x01 0x01 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000006D0: 0x00 0x00 0x40 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x000006E0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x01 0x01 0x01 0x01 0x01 0x01
0x000006F0: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x01 0x01 0x01
0x00000700: 0x01 0x01 0x01 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x02 0x01 0x01 0x01 0x00
0x00000710: 0x02 0x00 0x00 0x00 0xE8 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000720: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000730: 0x00 0x00 0x00 0x00 0x00 0x28 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000740: 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000750: 0x06 0x0C 0x46 0x29 0x04 0x0E 0x46 0x29 0x02 0x14 0x46 0x29 0x03 0x16 0x46 0x29
0x00000760: 0x00 0x00 0x00 0x00 0x07 0x04 0x46 0x29 0x05 0x06 0x46 0x29 0x00 0x00 0x00 0x00
0x00000770: 0x00 0x00 0x01 0x01 0x00 0x00 0x04 0x03 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01
0x00000780: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000790: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000007F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000800: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000810: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000820: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000830: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000840: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000850: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000860: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000870: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000880: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000890: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008A0: 0x01 0x02 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x00 0x00
0x000008C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000008F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000900: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x07 0x00 0x00
0x00000910: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000920: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x64 0x00
0x00000930: 0x01 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000940: 0x07 0x07 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00
0x00000950: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0x00 0x00 0x00
0x00000960: 0x00 0x01 0x00 0x00 0x02 0x00 0x60 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000970: 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Install PPI: 824D5A3A-AF92-4C0C-9F19-19526DCA4ABB
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x40
TotalBlockSize after adding Block[0x2]= 0x11C
TotalBlockSize after adding Block[0x3]= 0x198
TotalBlockSize after adding Block[0x4]= 0x200
TotalBlockSize after adding Block[0x0]= 0x2C
TotalBlockSize after adding Block[0x0]= 0x68
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0x168
TotalBlockSize after adding Block[0x3]= 0x270
TotalBlockSize after adding Block[0x0]= 0x28
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xB4
TotalBlockSize = 0xB40
gSiPreMemConfigGuid = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemBlock->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Name = B94C004C-A0AB-40F0-9B61-0B2588BEFDC6
SiPreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCIe AddConfigBlocks
PciePreMemConfig->Header.GuidHob.Name = D0F9C2A9-7332-4733-8DB1-98792760DAE6
PciePreMemConfig->Header.GuidHob.Header.HobLength = 0x24
PCH AddPreMemConfigBlocks
PchGeneralPreMemConfig->Header.GuidHob.Name = C65F62FA-52B9-4837-86EB-1AFBD4ADBB3E
PchGeneralPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
LpcPreMemConfig->Header.GuidHob.Name = A6E6032F-1E58-407E-9AB8-C630C6C4118E
LpcPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HsioPciePreMemConfig->Header.GuidHob.Name = E8FB0C12-0DA1-4A20-B336-FB75938CE014
HsioPciePreMemConfig->Header.GuidHob.Header.HobLength = 0xDC
HsioSataPreMemConfig->Header.GuidHob.Name = 732260D0-A5C1-4119-AA0C-93DCAC670A31
HsioSataPreMemConfig->Header.GuidHob.Header.HobLength = 0x7C
PcieRpPreMemConfig->Header.GuidHob.Name = 8377AB38-F8B0-476A-9CA1-68EA7857D82A
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
GetClkReqForClkSrc 0->0, register 06543210
GetClkReqForClkSrc 1->1, register 06543210
GetClkReqForClkSrc 2->2, register 06543210
GetClkReqForClkSrc 3->3, register 06543210
GetClkReqForClkSrc 4->4, register 06543210
GetClkReqForClkSrc 5->5, register 06543210
GetClkReqForClkSrc 6->6, register 06543210
Me AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x4
MiscPeiPreMemConfig->Header.GuidHob.Name = 4A525577-3469-4F11-99CF-FBCD5EF184E4
MiscPeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x68
PramPreMemConfig->Header.GuidHob.Name = CF0B9B31-A1A6-46D9-8D14-E3AC690F523A
PramPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
MemConfig->Header.GuidHob.Name = 26CF084C-C9DB-41BB-92C6-D197B8A1E4BF
MemConfig->Header.GuidHob.Header.HobLength = 0xE0
MemConfigNoCrc->Header.GuidHob.Name = C56C73D0-1CDB-4C0C-A957-EA62A9E6F50C
MemConfigNoCrc->Header.GuidHob.Header.HobLength = 0x108
Applying Sample policy defaults for LPDDR4
CPU Pre-Mem Entry
POSTCODE=<0000DC00>
CpuSecurityPreMemConfig->Header.GuidHob.Name = 0FD5C346-8260-4067-9469-CF9168A34290
CpuSecurityPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTxtPreMemConfig->Header.GuidHob.Name = 20B4DB03-D160-4F83-A401-9A8AA8886814
CpuTxtPreMemConfig->Header.GuidHob.Header.HobLength = 0x60
CpuConfigLibPreMemConfig->Header.GuidHob.Name = FC1C0EC2-C6B4-4F05-BB85-C8008D5B4AB7
CpuConfigLibPreMemConfig->Header.GuidHob.Header.HobLength = 0x2C
CpuAddPreMemConfigBlocks Done
POSTCODE=<0000DC0F>
IpuPreMemPolicy->Header.GuidHob.Name = 830A222B-3FF5-432E-9DD5-4EE3FCA2AAA2
IpuPreMemPolicy->Header.GuidHob.Header.HobLength = 0x34
DciPreMemConfig->Header.GuidHob.Name = AB4AF366-2250-40C3-92DB-3661C6713C5A
DciPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
CpuTraceHubPreMemConfig->Header.GuidHob.Name = F2E17477-93F3-430D-9E08-3CCC6E2F6C4B
CpuTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
PchTraceHubPreMemConfig->Header.GuidHob.Name = 08456C11-DB85-4914-8D1A-E5AC6437E896
PchTraceHubPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
HdaPreMemConfig->Header.GuidHob.Name = D38F1E2B-21B3-43D1-9FA8-A5E178731E88
HdaPreMemConfig->Header.GuidHob.Header.HobLength = 0x74
PcieRpPreMemConfig->Header.GuidHob.Name = 7C24E649-C1F0-4CF9-8796-E7A0EE3443F8
PcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
SmbusPreMemConfig->Header.GuidHob.Name = 77A6E62C-716B-4386-9E9C-23A02E137B3A
SmbusPreMemConfig->Header.GuidHob.Header.HobLength = 0xA4
WdtPreMemConfig->Header.GuidHob.Name = FBCE08CC-60F2-4BDF-B788-09BB8165522B
WdtPreMemConfig->Header.GuidHob.Header.HobLength = 0x20
OverClockingPreMemConfig->Header.GuidHob.Name = AD151BBC-D5A0-481E-9D19-F67B79E98F68
OverClockingPreMemConfig->Header.GuidHob.Header.HobLength = 0x94
GtPreMemConfig->Header.GuidHob.Name = 0319C56B-C43A-42F1-80BE-CA5BD1D5C928
GtPreMemConfig->Header.GuidHob.Header.HobLength = 0x50
TcssPreMemConfig->Header.GuidHob.Name = 514ED829-B2BB-46BE-A978-6D0C91C1EBE4
TcssPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
Vtd->Header.GuidHob.Name = 03E5CF63-BEBB-4041-B7E7-BF546120F1C5
Vtd->Header.GuidHob.Header.HobLength = 0x44
boot mode : 0x0
CpuPcieRpPreMemConfig->Header.GuidHob.Name = 41AEF892-C800-4AC0-A930-84AC47CACA7E
CpuPcieRpPreMemConfig->Header.GuidHob.Header.HobLength = 0x38
PciePeiPreMemConfig->Header.GuidHob.Name = 81BAF3C9-F295-4572-8B21-793FA31BA5DB
PciePeiPreMemConfig->Header.GuidHob.Header.HobLength = 0x44
CpuDmiPreMemConfig->Header.GuidHob.Name = 30D12AD5-A3C6-49C7-A2FD-355CCB61CBCF
CpuDmiPreMemConfig->Header.GuidHob.Header.HobLength = 0xA8
HostBridgePreMemConfig->Header.GuidHob.Name = BDEF6805-2080-44AD-932E-0004F52CB7A1
HostBridgePreMemConfig->Header.GuidHob.Header.HobLength = 0x40
TelemetryConfig->Header.GuidHob.Name = 422DE269-B2EF-4829-9336-0BE498B553B2
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
HgConfig->Header.GuidHob.Name = C7956998-C065-46C4-8E2F-582B67EBBE2F
HgConfig->Header.GuidHob.Header.HobLength = 0x88
DpInPreMemConfig->Header.GuidHob.Name = 080C14BA-CC84-4746-BF6B-D1F18EAAE835
DpInPreMemConfig->Header.GuidHob.Header.HobLength = 0x28
TccConfig->Header.GuidHob.Name = AFFE7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x38
Install PPI: C133FE57-17C7-4B09-8B3C-97C189D0AB8D
FspUpdatePeiMePolicyPreMem
FSP UpdatePeiSaPolicyPreMem
MemConfig->SaGv = 0
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
---------------------- Si Pre-Mem Config Block Print Begin -----------------
PlatformDebugConsent = 0
SkipOverrideBootModeWhenFwUpdate = 0
---------------------- Si Pre-Mem Config Block Print End -------------------
---------------------- PCIe Pre-Mem Config Block Print Begin -----------------
PcieImrEnabled = 0
PcieImrRpLocation = 0
PcieImrSize = 0
PcieImrRpSelection = 0
---------------------- PCIe Pre-Mem Config Block Print End -------------------
------------------------ PCH Print PreMemPolicy Start ------------------------
Revision= 1
------------------ PCH General PreMem Config ------------------
Port80Route= 0
PcieRefPllSsc= FF
GpioOverride= 0
------------------ PCH LPC PreMem Config ------------------
EnhancePort8xhDecoding= 1
------------------ HSIO PCIE PreMem Config ------------------
RootPort[0] HsioRxSetCtleEnable= 0
RootPort[0] HsioRxSetCtle= 0
RootPort[0] HsioTxGen1DownscaleAmpEnable= 0
RootPort[0] HsioTxGen1DownscaleAmp= 0
RootPort[0] HsioTxGen2DownscaleAmpEnable= 0
RootPort[0] HsioTxGen2DownscaleAmp= 0
RootPort[0] HsioTxGen3DownscaleAmpEnable= 0
RootPort[0] HsioTxGen3DownscaleAmp= 0
RootPort[0] HsioTxGen1DeEmphEnable= 0
RootPort[0] HsioTxGen1DeEmph= 0
RootPort[0] HsioTxGen2DeEmph3p5Enable= 0
RootPort[0] HsioTxGen2DeEmph3p5= 0
RootPort[0] HsioTxGen2DeEmph6p0Enable= 0
RootPort[0] HsioTxGen2DeEmph6p0= 0
RootPort[1] HsioRxSetCtleEnable= 0
RootPort[1] HsioRxSetCtle= 0
RootPort[1] HsioTxGen1DownscaleAmpEnable= 0
RootPort[1] HsioTxGen1DownscaleAmp= 0
RootPort[1] HsioTxGen2DownscaleAmpEnable= 0
RootPort[1] HsioTxGen2DownscaleAmp= 0
RootPort[1] HsioTxGen3DownscaleAmpEnable= 0
RootPort[1] HsioTxGen3DownscaleAmp= 0
RootPort[1] HsioTxGen1DeEmphEnable= 0
RootPort[1] HsioTxGen1DeEmph= 0
RootPort[1] HsioTxGen2DeEmph3p5Enable= 0
RootPort[1] HsioTxGen2DeEmph3p5= 0
RootPort[1] HsioTxGen2DeEmph6p0Enable= 0
RootPort[1] HsioTxGen2DeEmph6p0= 0
RootPort[2] HsioRxSetCtleEnable= 0
RootPort[2] HsioRxSetCtle= 0
RootPort[2] HsioTxGen1DownscaleAmpEnable= 0
RootPort[2] HsioTxGen1DownscaleAmp= 0
RootPort[2] HsioTxGen2DownscaleAmpEnable= 0
RootPort[2] HsioTxGen2DownscaleAmp= 0
RootPort[2] HsioTxGen3DownscaleAmpEnable= 0
RootPort[2] HsioTxGen3DownscaleAmp= 0
RootPort[2] HsioTxGen1DeEmphEnable= 0
RootPort[2] HsioTxGen1DeEmph= 0
RootPort[2] HsioTxGen2DeEmph3p5Enable= 0
RootPort[2] HsioTxGen2DeEmph3p5= 0
RootPort[2] HsioTxGen2DeEmph6p0Enable= 0
RootPort[2] HsioTxGen2DeEmph6p0= 0
RootPort[3] HsioRxSetCtleEnable= 0
RootPort[3] HsioRxSetCtle= 0
RootPort[3] HsioTxGen1DownscaleAmpEnable= 0
RootPort[3] HsioTxGen1DownscaleAmp= 0
RootPort[3] HsioTxGen2DownscaleAmpEnable= 0
RootPort[3] HsioTxGen2DownscaleAmp= 0
RootPort[3] HsioTxGen3DownscaleAmpEnable= 0
RootPort[3] HsioTxGen3DownscaleAmp= 0
RootPort[3] HsioTxGen1DeEmphEnable= 0
RootPort[3] HsioTxGen1DeEmph= 0
RootPort[3] HsioTxGen2DeEmph3p5Enable= 0
RootPort[3] HsioTxGen2DeEmph3p5= 0
RootPort[3] HsioTxGen2DeEmph6p0Enable= 0
RootPort[3] HsioTxGen2DeEmph6p0= 0
RootPort[4] HsioRxSetCtleEnable= 0
RootPort[4] HsioRxSetCtle= 0
RootPort[4] HsioTxGen1DownscaleAmpEnable= 0
RootPort[4] HsioTxGen1DownscaleAmp= 0
RootPort[4] HsioTxGen2DownscaleAmpEnable= 0
RootPort[4] HsioTxGen2DownscaleAmp= 0
RootPort[4] HsioTxGen3DownscaleAmpEnable= 0
RootPort[4] HsioTxGen3DownscaleAmp= 0
RootPort[4] HsioTxGen1DeEmphEnable= 0
RootPort[4] HsioTxGen1DeEmph= 0
RootPort[4] HsioTxGen2DeEmph3p5Enable= 0
RootPort[4] HsioTxGen2DeEmph3p5= 0
RootPort[4] HsioTxGen2DeEmph6p0Enable= 0
RootPort[4] HsioTxGen2DeEmph6p0= 0
RootPort[5] HsioRxSetCtleEnable= 0
RootPort[5] HsioRxSetCtle= 0
RootPort[5] HsioTxGen1DownscaleAmpEnable= 0
RootPort[5] HsioTxGen1DownscaleAmp= 0
RootPort[5] HsioTxGen2DownscaleAmpEnable= 0
RootPort[5] HsioTxGen2DownscaleAmp= 0
RootPort[5] HsioTxGen3DownscaleAmpEnable= 0
RootPort[5] HsioTxGen3DownscaleAmp= 0
RootPort[5] HsioTxGen1DeEmphEnable= 0
RootPort[5] HsioTxGen1DeEmph= 0
RootPort[5] HsioTxGen2DeEmph3p5Enable= 0
RootPort[5] HsioTxGen2DeEmph3p5= 0
RootPort[5] HsioTxGen2DeEmph6p0Enable= 0
RootPort[5] HsioTxGen2DeEmph6p0= 0
RootPort[6] HsioRxSetCtleEnable= 0
RootPort[6] HsioRxSetCtle= 0
RootPort[6] HsioTxGen1DownscaleAmpEnable= 0
RootPort[6] HsioTxGen1DownscaleAmp= 0
RootPort[6] HsioTxGen2DownscaleAmpEnable= 0
RootPort[6] HsioTxGen2DownscaleAmp= 0
RootPort[6] HsioTxGen3DownscaleAmpEnable= 0
RootPort[6] HsioTxGen3DownscaleAmp= 0
RootPort[6] HsioTxGen1DeEmphEnable= 0
RootPort[6] HsioTxGen1DeEmph= 0
RootPort[6] HsioTxGen2DeEmph3p5Enable= 0
RootPort[6] HsioTxGen2DeEmph3p5= 0
RootPort[6] HsioTxGen2DeEmph6p0Enable= 0
RootPort[6] HsioTxGen2DeEmph6p0= 0
RootPort[7] HsioRxSetCtleEnable= 0
RootPort[7] HsioRxSetCtle= 0
RootPort[7] HsioTxGen1DownscaleAmpEnable= 0
RootPort[7] HsioTxGen1DownscaleAmp= 0
RootPort[7] HsioTxGen2DownscaleAmpEnable= 0
RootPort[7] HsioTxGen2DownscaleAmp= 0
RootPort[7] HsioTxGen3DownscaleAmpEnable= 0
RootPort[7] HsioTxGen3DownscaleAmp= 0
RootPort[7] HsioTxGen1DeEmphEnable= 0
RootPort[7] HsioTxGen1DeEmph= 0
RootPort[7] HsioTxGen2DeEmph3p5Enable= 0
RootPort[7] HsioTxGen2DeEmph3p5= 0
RootPort[7] HsioTxGen2DeEmph6p0Enable= 0
RootPort[7] HsioTxGen2DeEmph6p0= 0
RootPort[8] HsioRxSetCtleEnable= 0
RootPort[8] HsioRxSetCtle= 0
RootPort[8] HsioTxGen1DownscaleAmpEnable= 0
RootPort[8] HsioTxGen1DownscaleAmp= 0
RootPort[8] HsioTxGen2DownscaleAmpEnable= 0
RootPort[8] HsioTxGen2DownscaleAmp= 0
RootPort[8] HsioTxGen3DownscaleAmpEnable= 0
RootPort[8] HsioTxGen3DownscaleAmp= 0
RootPort[8] HsioTxGen1DeEmphEnable= 0
RootPort[8] HsioTxGen1DeEmph= 0
RootPort[8] HsioTxGen2DeEmph3p5Enable= 0
RootPort[8] HsioTxGen2DeEmph3p5= 0
RootPort[8] HsioTxGen2DeEmph6p0Enable= 0
RootPort[8] HsioTxGen2DeEmph6p0= 0
RootPort[9] HsioRxSetCtleEnable= 0
RootPort[9] HsioRxSetCtle= 0
RootPort[9] HsioTxGen1DownscaleAmpEnable= 0
RootPort[9] HsioTxGen1DownscaleAmp= 0
RootPort[9] HsioTxGen2DownscaleAmpEnable= 0
RootPort[9] HsioTxGen2DownscaleAmp= 0
RootPort[9] HsioTxGen3DownscaleAmpEnable= 0
RootPort[9] HsioTxGen3DownscaleAmp= 0
RootPort[9] HsioTxGen1DeEmphEnable= 0
RootPort[9] HsioTxGen1DeEmph= 0
RootPort[9] HsioTxGen2DeEmph3p5Enable= 0
RootPort[9] HsioTxGen2DeEmph3p5= 0
RootPort[9] HsioTxGen2DeEmph6p0Enable= 0
RootPort[9] HsioTxGen2DeEmph6p0= 0
RootPort[10] HsioRxSetCtleEnable= 0
RootPort[10] HsioRxSetCtle= 0
RootPort[10] HsioTxGen1DownscaleAmpEnable= 0
RootPort[10] HsioTxGen1DownscaleAmp= 0
RootPort[10] HsioTxGen2DownscaleAmpEnable= 0
RootPort[10] HsioTxGen2DownscaleAmp= 0
RootPort[10] HsioTxGen3DownscaleAmpEnable= 0
RootPort[10] HsioTxGen3DownscaleAmp= 0
RootPort[10] HsioTxGen1DeEmphEnable= 0
RootPort[10] HsioTxGen1DeEmph= 0
RootPort[10] HsioTxGen2DeEmph3p5Enable= 0
RootPort[10] HsioTxGen2DeEmph3p5= 0
RootPort[10] HsioTxGen2DeEmph6p0Enable= 0
RootPort[10] HsioTxGen2DeEmph6p0= 0
RootPort[11] HsioRxSetCtleEnable= 0
RootPort[11] HsioRxSetCtle= 0
RootPort[11] HsioTxGen1DownscaleAmpEnable= 0
RootPort[11] HsioTxGen1DownscaleAmp= 0
RootPort[11] HsioTxGen2DownscaleAmpEnable= 0
RootPort[11] HsioTxGen2DownscaleAmp= 0
RootPort[11] HsioTxGen3DownscaleAmpEnable= 0
RootPort[11] HsioTxGen3DownscaleAmp= 0
RootPort[11] HsioTxGen1DeEmphEnable= 0
RootPort[11] HsioTxGen1DeEmph= 0
RootPort[11] HsioTxGen2DeEmph3p5Enable= 0
RootPort[11] HsioTxGen2DeEmph3p5= 0
RootPort[11] HsioTxGen2DeEmph6p0Enable= 0
RootPort[11] HsioTxGen2DeEmph6p0= 0
---------------- HSIO SATA PreMem Config for controller 0 ----------------
PortSettings[0] HsioRxGen1EqBoostMagEnable= 0
PortSettings[0] HsioRxGen1EqBoostMag= 0
PortSettings[0] HsioRxGen2EqBoostMagEnable= 0
PortSettings[0] HsioRxGen2EqBoostMag= 0
PortSettings[0] HsioRxGen3EqBoostMagEnable= 0
PortSettings[0] HsioRxGen3EqBoostMag= 0
PortSettings[0] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen1DownscaleAmp= 0
PortSettings[0] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen2DownscaleAmp= 0
PortSettings[0] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[0] HsioTxGen3DownscaleAmp= 0
PortSettings[0] HsioTxGen1DeEmphEnable= 0
PortSettings[0] HsioTxGen1DeEmph= 0
PortSettings[0] HsioTxGen2DeEmphEnable= 0
PortSettings[0] HsioTxGen2DeEmph= 0
PortSettings[0] HsioTxGen3DeEmphEnable= 0
PortSettings[0] HsioTxGen3DeEmph= 0
PortSettings[1] HsioRxGen1EqBoostMagEnable= 0
PortSettings[1] HsioRxGen1EqBoostMag= 0
PortSettings[1] HsioRxGen2EqBoostMagEnable= 0
PortSettings[1] HsioRxGen2EqBoostMag= 0
PortSettings[1] HsioRxGen3EqBoostMagEnable= 0
PortSettings[1] HsioRxGen3EqBoostMag= 0
PortSettings[1] HsioTxGen1DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen1DownscaleAmp= 0
PortSettings[1] HsioTxGen2DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen2DownscaleAmp= 0
PortSettings[1] HsioTxGen3DownscaleAmpEnable= 0
PortSettings[1] HsioTxGen3DownscaleAmp= 0
PortSettings[1] HsioTxGen1DeEmphEnable= 0
PortSettings[1] HsioTxGen1DeEmph= 0
PortSettings[1] HsioTxGen2DeEmphEnable= 0
PortSettings[1] HsioTxGen2DeEmph= 0
PortSettings[1] HsioTxGen3DeEmphEnable= 0
PortSettings[1] HsioTxGen3DeEmph= 0
------------------ PCH PCIe RP PreMem Config ------------------
Port[0] RpEnabled= 1
Port[1] RpEnabled= 1
Port[2] RpEnabled= 1
Port[3] RpEnabled= 1
Port[4] RpEnabled= 1
Port[5] RpEnabled= 1
Port[6] RpEnabled= 1
Port[7] RpEnabled= 1
Port[8] RpEnabled= 1
Port[9] RpEnabled= 1
Port[10] RpEnabled= 1
Port[11] RpEnabled= 1
Clock[0] Usage= 80
Clock[0] ClkReq= 0
Clock[1] Usage= 80
Clock[1] ClkReq= 1
Clock[2] Usage= 80
Clock[2] ClkReq= 2
Clock[3] Usage= 80
Clock[3] ClkReq= 3
Clock[4] Usage= 80
Clock[4] ClkReq= 4
Clock[5] Usage= 80
Clock[5] ClkReq= 5
Clock[6] Usage= 80
Clock[6] ClkReq= 6
------------------------ PCH Print PreMemPolicy End --------------------------
---------------------- Me Config Block Pre-Mem Print Begin -----------------
------------------------ ME_PEI_PREMEM_CONFIG -----------------
Revision : 0x2
HeciTimeouts : 0x1
DidInitStat : 0x0
DisableCpuReplacedPolling : 0x0
SendDidMsg (deprecated) : 0x0
DisableMessageCheck : 0x0
SkipMbpHob : 0x0
HeciCommunication2 : 0x0
KtDeviceEnable : 0x1
SkipCpuReplacementCheck : 0x1
Heci1BarAddress : 0xFEDA2000
Heci2BarAddress : 0xFEDA3000
Heci3BarAddress : 0xFEDA4000
---------------------- Me Config Block Pre-Mem Print End -------------------
------------------------ SA Policy (PEI PreMem) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_PREMEM_CONFIG ------------------------
Revision : 2
SpdAddressTable[16] : 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
SmbusBar: 0xEFA0
TsegSize: 0x800000
UserBd: 0x5
SkipExtGfxScan: 1
S3DataPtr: 0x0
WrcFeatureEnable : 0x0
VcRtMappingPegEn : 0x0
TxtImplemented: 0
BdatEnable: 0
BdatTestType: 0
ScanExtGfxForLegacyOpRom: 0
CridEnable: 0
AcpiReservedMemoryBase: 0x0
AcpiReservedMemorySize: 0x0
SystemMemoryLength: 0x0
OpRomScanTempMmioBar: 0x80000000
OpRomScanTempMmioLimit: 0xC0000000
------------------------ MEMORY_CONFIG_NO_CRC ------------------------
CleanMemory: 0
MemTestOnWarmBoot: 1
SerialDebugLevel: 3
PlatformMemorySize: 0x5976000
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DMI PreMem Config ------------------
DmiMaxLinkSpeed : 0x3
DmiAspm : 0x2
DmiHWEQ : 0x1
DmiGen3EqPh2Enable : 0x2
DmiGen3EqPh3Method : 0x0
DmiGen3ProgramStaticEq : 0x1
DmiGen3RootPortPreset[8] : 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8
DmiGen3EndPointPreset[8] : 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7
DmiGen3EndPointHint[8] : 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2
DmiGen3RxCtlePeaking[4] : 0x0 0x0 0x0 0x0 DmiDeEmphasis : 0x1
------------------------ GRAPHICS_PEI_PREMEM_CONFIG -----------------
Revision : 3
PanelPowerEnable : 0x1
GttSize : 8 MB
IgdDvmt50PreAlloc : 0xFE
InternalGraphics : 0x1
PrimaryDisplay : 0x0
ApertureSize : 0x1
GtPsmiSupport : 0x0
PsmiRegionSize : 0x0
DismSize : 0x0
GttMmAdr : 0xAF000000
GmAdr64 : 0xB0000000
DfdRestoreEnable : 0x0
DdiPortAConfig : 0x0
DdiPortBConfig : 0x0
DdiPortAHpd : 0x0
DdiPortBHpd : 0x0
DdiPortCHpd : 0x0
DdiPort1Hpd : 0x0
DdiPort2Hpd : 0x0
DdiPort3Hpd : 0x0
DdiPort4Hpd : 0x0
DdiPortADdc : 0x0
DdiPortBDdc : 0x0
DdiPortCDdc : 0x0
DdiPort1Ddc : 0x0
DdiPort2Ddc : 0x0
DdiPort3Ddc : 0x0
DdiPort4Ddc : 0x0
------------------------ GRAPHICS_PEI_PREMEM_CONFIG Print END -----------------
----------------------- TCSS_PEI_PREMEM_CONFIG -----------------
Revision : 1
TCSS Port Enabled Bitmap : F
TcssPeiPreMemConfig->MiscConfig.PcieMultipleSegmentEnabled : 0x0
TCSS ITBT PCIE 0-3 Enable : 1 1 1 1
TCSS xHCI Enable : 1
TCSS xDCI Enable : 1
TCSS ITBT DMA 0-1 Enable : 1 1
------------------------ VTD_CONFIG -----------------
Revision : 1
VtdDisable : 0x0
X2ApicOptOut : 0x0
DmaControlGuarantee : 0x1
VtdIgdEnable : 0x1
VtdIpuEnable : 0x1
VtdIopEnable : 0x1
VtdItbtEnable : 0x1
VtdBaseAddress[0] : 0xFED90000
VtdBaseAddress[1] : 0xFED92000
VtdBaseAddress[2] : 0xFED91000
VtdBaseAddress[3] : 0xFED84000
VtdBaseAddress[4] : 0xFED85000
VtdBaseAddress[5] : 0xFED86000
VtdBaseAddress[6] : 0xFED87000
PreBootDmaMask : 0x0
DmaBufferSize : 0x400000
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge PreMem Config ------------------
Revision : 1
MchBar : 0xFEDC0000
DmiBar : 0xFEDA0000
EpBar : 0xFEDA1000
EdramBar : 0xFED80000
RegBar : 0xFB000000
EnableAbove4GBMmio : 0x1
------------------------ CPU - SiPreMemPolicyPpi Print Begin in PreMem -----------------
Revision= 1
------------------ CPU Security PreMem Config ------------------
CPU_SECURITY_PREMEM_CONFIG : PrmrrSize = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosSize = 0x2800
CPU_SECURITY_PREMEM_CONFIG : BiosGuard = 0x0
CPU_SECURITY_PREMEM_CONFIG : BiosGuardToolsInterface = 0x0
CPU_SECURITY_PREMEM_CONFIG : Txt = 0x0
CPU_SECURITY_PREMEM_CONFIG : SkipStopPbet = 0x0
CPU_SECURITY_PREMEM_CONFIG : EnableC6Dram = 0x0
CPU_SECURITY_PREMEM_CONFIG : ResetAux = 0x0
CPU_SECURITY_PREMEM_CONFIG : TxtAcheckRequest = 0x0
------------------ CPU TXT PreMem Config ------------------
CPU_TXT_PREMEM_CONFIG : SinitMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtHeapMemorySize = 0x0
CPU_TXT_PREMEM_CONFIG : TgaSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtLcpPdSize = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemoryBase = 0x0
CPU_TXT_PREMEM_CONFIG : TxtDprMemorySize = 0x400000
CPU_TXT_PREMEM_CONFIG : BiosAcmSize = 0x0
CPU_TXT_PREMEM_CONFIG : BiosAcmBase = 0xFF6C0000
CPU_TXT_PREMEM_CONFIG : ApStartupBase = 0x0
------------------ CPU Config Lib PreMem Config ------------------
CPU_CONFIG_LIB_PREMEM_CONFIG : HyperThreading = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : BootFrequency = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : ActiveCoreCount1 = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : JtagC10PowerGateDisable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BistOnReset = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : VmxEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceEnable = 0x2
CPU_CONFIG_LIB_PREMEM_CONFIG : DebugInterfaceLockEnable = 0x1
CPU_CONFIG_LIB_PREMEM_CONFIG : TmeEnable = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : CpuRatio = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : ConfigTdpLevel = 0x0
CPU_CONFIG_LIB_PREMEM_CONFIG : BclkSource = 0x0
------------------------ CPU - SiPreMemPolicyPpi Print End -----------------
------------------------ IPU_PREMEM_CONFIG Begin -----------------
Revision : 4
IpuEnable : 0x1
IpuImrConfiguration : 0x0
ImguClkOutEn[0] : 1
ImguClkOutEn[1] : 1
ImguClkOutEn[2] : 1
ImguClkOutEn[3] : 1
ImguClkOutEn[4] : 0
ImguClkOutEn[5] : 0
LaneUsed[0] : 4
CsiSpeed[0] : 0
LaneUsed[1] : 4
CsiSpeed[1] : 0
LaneUsed[2] : 4
CsiSpeed[2] : 0
LaneUsed[3] : 4
CsiSpeed[3] : 0
LaneUsed[4] : 4
CsiSpeed[4] : 0
LaneUsed[5] : 4
CsiSpeed[5] : 0
LaneUsed[6] : 4
CsiSpeed[6] : 0
LaneUsed[7] : 4
CsiSpeed[7] : 0
----------------------- IPU_PREMEM_CONFIG End ------------------
------------------ DCI PreMem Config ------------------
DciEn = 0
DciDbcMode = 4
DciModphyPg = 0
DciUsb3TypecUfpDbg = 2
------------------ HD Audio PreMem Config ------------------
Enable = 1
DSP Enable = 0
DSP UAA Compliance = 0
Audio Link: HDA Link = 1
Audio Link: DMIC#0 = 0
DMIC#0 Clock Select = 0
Audio Link: DMIC#1 = 0
DMIC#1 Clock Select = 0
Audio Link: SSP#0 = 0
Audio Link: SSP#1 = 0
Audio Link: SSP#2 = 0
Audio Link: SSP#3 = 0
Audio Link: SSP#4 = 0
Audio Link: SSP#5 = 0
Audio Link: SoundWire#1 = 1
Audio Link: SoundWire#2 = 1
Audio Link: SoundWire#3 = 0
Audio Link: SoundWire#4 = 0
VC Type = 0
iDisp Codec Disconnect = 0
iDisp Link Frequency = 4
iDisp Link T-Mode = 3
ResetWaitTimer = 258
Hda Sdi0 Enable = 1
Hda Sdi1 Enable = 0
------------------ ISH PreMem Config ------------------
Enable= 1
------------------ CPU Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x0
------------------ PCH Trace Hub PreMem Config ------------------
EnableMode : 0x0
MemReg0Size : 0x2
MemReg1Size : 0x2
AetEnabled : 0x1
------------------ SMBUS PreMem Config ------------------
Enable= 1
ArpEnable= 0
DynamicPowerGating= 1
SpdWriteDisable= 1
SmbAlertEnable= 0
SmbusIoBase= EFA0
NumRsvdSmbusAddresses= 4
RsvdSmbusAddressTable= { A2h A0h A2h A0h }
------------------ WDT PreMem Config ------------------
DisableAndLock= 0
------------------ OverClocking PreMem Config ------------------
OVERCLOCKING_PREMEM_CONFIG:: OcSupport : 0x0
OVERCLOCKING_PREMEM_CONFIG:: OcLock : 0x1
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CoreVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageAdaptive : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingDownBin : 0x1
OVERCLOCKING_PREMEM_CONFIG:: Avx2RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: Avx3RatioOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: BclkAdaptiveVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: CorePllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: McPllVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: TjMaxOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrFaults : 0x0
OVERCLOCKING_PREMEM_CONFIG:: FivrEfficiency : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtMaxOcRatio : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: GtExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageMode : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOverride : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaExtraTurboVoltage : 0x0
OVERCLOCKING_PREMEM_CONFIG:: SaVoltageOffset : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RealtimeMemoryTiming : 0x0
OVERCLOCKING_PREMEM_CONFIG:: DynamicMemoryChange : 0x0
OVERCLOCKING_PREMEM_CONFIG:: RingCcfAutoGvDisable : 0x1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG -----------------
Revision : 4
RpEnabledMask : 0xFFFFFF
Link Down GPIOs : 0x0
ClockReq Messaging Enable : 0x1
RootPort[0] PcieSpeed : 0
RootPort[0] CdrRelock : 1
RootPort[0] Xl1el : 0
RootPort[0] NewFomDisable : 1
------------------------ CPU_PCIE_RP_PREMEM_CONFIG Print END -----------------
------------------------ PCIE_PEI_PREMEM_CONFIG -----------------
Revision : 1
------------------------ PCIE_PEI_PREMEM_CONFIG Print END -----------------
------------------------ HYBRID_GRAPHICS_CONFIG -----------------
Revision : 2
HgConfig->CpuPcie0Rtd3Gpio.GpioSupport : 0x0
HgMode : 0
HgSlot : 0
------------------------ HG_DELAY_OPTIMIZATION_DATA -----------------
SaRtd3.HgDelayAfterHoldReset : 0x64
SaRtd3.HgDelayAfterPwrEn : 0x12C
------------------------ HYBRID_GRAPHICS_CONFIG print END -----------------
----------------------- DPIN_PREMEM_CONFIG -----------------
Revision : 2
DPIN DPin External Connection Policy : 0
DPIN NumberOfDpInPort : 0x0
DPIN DpInPortConnectMap : 0x0
DPIN DPinDynamicSwitch : 0x0
DPIN DPinDynamicSwitchDelay0 : 0x0
DPIN DPinDynamicSwitchDelay1 : 0x3E8
------------------ TCC PreMem Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Install PPI: 85270BEF-6984-4375-A6EA-B5AA906EDD4A
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
FspInitPreMemEntryPoint done
Notify: PPI Guid: 6CC45765-CCE4-42FD-BC56-011AAAC6C9A8, Peim notify entry point: FFEE2689
Notify: PPI Guid: 85270BEF-6984-4375-A6EA-B5AA906EDD4A, Peim notify entry point: FFE207C3
SiInitPreMemOnPolicy() Start
PsmiInit () - Start
Install PSMI DATA HOB
PsmiDataHob->EfiHobGuidType.Name: 0A9652BD-6ACD-47E5-803A-09537BD2A848
PsmiDataHob @ FEF555B8
PsmiDataHobSize - HobHeader: 6A
PsmiDataHobSize: 82
PSMI HOB installed
PSMI SCRPD1 = 0x0
No PSMI Reservation Request
PsmiInit () - End
ME-BIOS: HECI PPI Entry.
POSTCODE=<0000DE03>
Install PPI: D14319E2-407A-9580-8DE5-51A8FFC6D7D7
ME-BIOS: HECI PPI Exit - Success.
POSTCODE=<0000DE23>
MeDeviceInit [HECI1] H: 00000000, L: FEDA2000
POSTCODE=<0000D001> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI2] H: 00000000, L: FEDA3000
POSTCODE=<0000D002> - ME Device Init
Program HECI MMIO address
MeDeviceInit [HECI3] H: 00000000, L: FEDA4000
POSTCODE=<0000D003> - ME Device Init
Program HECI MMIO address
HeciEnable
[HECI1] Clearing D0I3 bit
[HECI1] D0I3C register = 00000010
Enabling CSME device 0:22:0
HeciInitialize () - Start
[HECI1] HfSts1 = 0x80000015
InitializeHeci () - Set H_RDY
Heci2Disable
[HECI2] Setting D0I3 bit
[HECI2] D0I3C register = 00000015
Disabling CSME device 0:22:1
Heci3Enable
[HECI3] Clearing D0I3 bit
[HECI3] D0I3C register = 00000010
Enabling CSME device 0:22:4
SolEnable
Enabling CSME device 0:22:3
PeiSiPolicyOverridePreMem ()
SiPreMemConfig->PlatformDebugConsent = 0
DciPreMemConfig->DciEn = 0
DciPreMemConfig->DciModphyPg = 1
DciPreMemConfig->DciDbcMode = 4
CpuTraceHubPreMemConfig->TraceHub.EnableMode = 0
CpuTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
CpuTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
PchTraceHubPreMemConfig->TraceHub.EnableMode = 0
PchTraceHubPreMemConfig->TraceHub.MemReg0Size = 2
PchTraceHubPreMemConfig->TraceHub.MemReg1Size = 2
POSTCODE=<0000DB48>
PchOnPolicyInstalled() - Start
ConfigureHdAudio() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
SetHdaControllerReset() - De-assert Reset
ConfigureAudioLinks() Start
HDA: HD Audio Link pins configuration
HDA: SoundWire#0 interface pins configuration, Status = Success
HDA: SoundWire#1 interface pins configuration, Status = Success
ConfigureAudioLinks() End
InitializeDisplayAudio() Start
EnablePowerWell Started !
EnablePowerWell Successfull
InitializeDisplayAudio() End
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00810004
HDA: SRAM retention mode idle wait - 64 XTAL oscillator clocks
ConfigureHdAudio() End - Status = Success
POSTCODE=<0000DB49>
PchHsioBiosProgPreMem() Start
PchHsioBiosProgPreMem() End
POSTCODE=<0000DB4A>
ECTRL Old = 0x0000B860
ECTRL New = 0x0000B861
DCI Debug Disabled
POSTCODE=<0000DB4D>
TraceHubInitialize() - Start
Early Trace is Enabled
Disable early trace complete
SCRPD0 = 0x00000000
TraceHubInitialize() - End. STT disconnected and Trace Hub requested to be disable
Register PPI Notify: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
SetPcieRefPllSsc()
POSTCODE=<0000DB15>
InitializePchSmbus() Start
Install PPI: 9CA93627-B65B-4324-A202-C0B461764543
InitializePchSmbus() End
POSTCODE=<0000DB52>
LpcOnPolicyConfigure()
POSTCODE=<0000DB53>
DCI Debug Disabled
Configure PCH SBU pins
POSTCODE=<0000DB55>
PchOnPolicyInstalled() - End
CpuOnPolicyInstalled Start
POSTCODE=<0000DC20>
XmmInit Start
POSTCODE=<0000DC2F>
Fit Entry Type: Startup ACM Entry
Fit Error Code: Startup ACM not supported by CPU
Microcode Update: 0x000000AC
TxtInit Start
POSTCODE=<0000DC3F>
Install PPI: 38CDD10B-767D-4F6E-A744-67EE1DFE2FA5
TXTPEI: TxtInfoHob passed from platform as:
TXTPEI: ChipsetIsTxtCapable = 1
TXTPEI: ProcessorIsTxtCapable = 1
TXTPEI: TxtMode = 0
TXTPEI: TxtAcheckRequest = 0
TXTPEI: ResetAux = 0
TXTPEI: AcpiBase = 1800
TXTPEI: SinitMemorySize = 0
TXTPEI: TxtHeapMemorySize = 0
TXTPEI: TxtDprMemoryBase = 0
TXTPEI: TxtDprMemorySize = 400000
TXTPEI: BiosAcmBase = FF6C0000
TXTPEI: BiosAcmSize = 0
TXTPEI: SinitAcmBase = 0
TXTPEI: SinitAcmSize = 0
TXTPEI: TgaSize = 0
TXTPEI: TxtLcpPdBase = 0
TXTPEI: TxtLcpPdSize = 0
TXTPEI: Flags = 0
TXTPEI: ApStartupBase = 0
TXTPEI: BIOS ACM is not matched to chipset!! Force TxtMode=0 and unloaded!!
TXTPEI::PEI Lib initialization failure
TXTPEI::Processor, PCH & Platform is TXT capable
TXTPEI::Unlock memory
TXTPEI::TXT failed reported by S-ACM
Install PPI: 9ECAFD30-29E2-42F6-BAF3-8B7DB8FE1F22
Processor does not support Boot Guard.
Boot Guard is not supported.
POSTCODE=<0000DC4F>
SetCpuStrapAndEarlyPowerOnConfig Start
POSTCODE=<0000DC0A>
SetCpuStrapAndEarlyPowerOnConfig: BootMode = 0
Set CPU Soft Straps Entry Point
Current CPU Strap Data = 0x1000
HT is supported
Number of Total Cores = 0x4. Number of Active Cores / Threads = 0x4 / 0x8
Ratio from Policy is 0x0
Current Flex Ratio from MSR is 0x0
Current Flex Ratio from CPU Strap: 0x0
No need to set Flex Ratio.
SetCpuStrapAndEarlyPowerOnConfig Done
POSTCODE=<0000DC14>
POSTCODE=<0000DC5F>
CpuOcInitPreMem Start
POSTCODE=<0000DC26>
(OC) Overclocking is disabled. Bypassing CPU core overclocking flow.
Invoking LockEnableDisableCpuDebug
CPU Pre-Mem Exit
POSTCODE=<0000DC6F>
MeOnPolicyInstalled() - Start
PWRM_PMCON_A = 0xD0801038
MePmInit () - Force an S5 exit path.
MeOnPolicyInstalled() - End
Programming Host Bridge Bars
POSTCODE=<0000DA06>
HostBridgeDataHob->EfiHobGuidType.Name: 3B682D57-D402-40A6-B134-A0C4F6311D09
HostBridgeDataHob @ FEF55988
HostBridgeDataHob Size - HobHeaderSize: 4
HostBridgeDataHobSize: 1C
HostBridgeDataHob->EnableAbove4GBMmio: 1
Host Bridge Data HOB installed
Enable VLW
Install SA HOBs
POSTCODE=<0000DA08>
SaDataHob->EfiHobGuidType.Name: E07D0BDA-BF90-46A9-B00E-B2C44A0ED6D0
SaConfigHob->EfiHobGuidType.Name: 762FA2E6-EA3B-41C8-8C52-63766D7039E0
SaDataHob @ FEF559A8
SaDataHobSize - HobHeader: 3
SaDataHobSize: 1B
SA HOBs installed
Reporting CPU PCIe code version
POSTCODE=<0000DA0A>
***************** System Agent PCIe code version *****************
** Major version number is: 10 **
** Minor version number is: 224 **
** Rev version number is: 126 **
** Build number is: 112 **
******************************************************************
Initializing DMI/OPI Max PayLoad Size
POSTCODE=<0000DA1F>
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
Initializing HybridGraphics
POSTCODE=<0000DA20>
HG:: HybridGraphics PEI initialization Starting
HgInfoHob->EfiHobGuidType.Name: 46CBED07-717A-4A75-85B3-F4B6C4E23A75
HgInfoHob @ FEF559F0
HgInfoHobSize - HobHeader: 4E
HgInfoHobSize: 66
Install HG Info HOB
HG:: HybridGraphics PEI initialization Ends
Initializing CPU PCIe
POSTCODE=<0000DA30>
CpuPcieHob Created
CpuPcieHob->EfiHobGuidType.Name: 440AB2E5-A3EA-466F-8496-DFB13B752995
CpuPcieHob @ FEF55A58
CpuPcieHob - HobHeader: DB
Initialize CPU PciExpress controllers in Premem : PciExpressInit Start
MaxCpuPciePortNum = 1
RpEnabledMask from Policy = FFFFFF
Read DEVEN register
DevEnable = 2F091
RpEnabledMask formed from DEVEN = 1
CpuPcieHob->RpEnabledMask formed after reading DID/setup and controllerconfig = 1
Call DEKEL init function to configure the PHY registers
GetCpuPcieCdrValue = 15
Default Case
GetCpuPcieCdrValue = 15
Default Case
CdrRelock is Enabled for PEG60
CdrRelock is Disabled for PEG10
ClockReq Messaging Enable
CPU PCIE Clock Req configuration Start
Keeping L1SubStates enable by default for RpIndex 0
CpuPcieEnableClkReqMsg Start
Configure CLKREQ# GPIO
Program the registers in CPU Root port
CpuPcieProgramClkReqMsgProtocolReg Start
CpuPcieProgramClkReqMsgProtocolReg End
PchEnableCpuPciePortClkReqMapping Entry
PchFiaEnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Entry
PchFia15EnableCpuPciePortClkReq Exit
PchFiaEnableCpuPciePortClkReq Exit
PchEnableCpuPciePortClkReqMapping Exit
CpuPcieEnableClkReqMsg End
CPU PCIE Clock Req configuration End
Before PchFiaSetClockOutputDelay!!!
**** BDF = 060 ****
Set Slot Implemented Bit
Set TLS to gen1
Set speed capability in rootport 0
PcieSpeed from policy = 0
ElasticBufferProgramming StartElasticBufferProgramming EndRetrain link by clearing BLKDQDASD
PdsEnabledMask= 1
Target link speed = 1
Current link speed = 1
Negotiated link Width = 4
Program the CLKREQ ASSERT pin
CpuPcieSetAssertClkReq Start
CpuPcieSetAssertClkReq End
ClkReqAssertedMask = 0
CpuPciePollClkReqMsgSts StatusBit = 0
CpuPciePollClkReqMsgSts failed, so Disable CLKREQ# messaging
CpuPcieDisableClkReqMsg Start
Disable the CLKREQ# Messaging based on the polling
L1SubStates should not be enabled if CLKREQ# messaging is not enabled
Disable CLKREQ# messaging in Cpu Pcie RP
CpuPcieDisableClkReqMessaging Start
CpuPcieDisableClkReqMessaging End
CpuPcieDisableClkReqMsg End
**** Premem PciExpressInit End ****
Initializing DMI Tc/Vc mapping
POSTCODE=<0000DA40>
DmiBar + R_PCIE_PVCCR1 = 0
TC:0 VC:0!
TC:1 VC:1!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:0 VC:0!
TC:7 VC:2!
VC:0 VCID:0 Enable:1!
VC:1 VCID:1 Enable:1!
VC:2 VCID:7 Enable:1!
Create Graphics Data Hob
GfxDataHob->EfiHobGuidType.Name: 48E6E20A-9110-4332-8C9F-5F7CAE76FCF3
GfxDataHob @ FEF55B50
GfxDataHobSize - HobHeader: 10
GfxDataHobSize: 28
GfxDataHob->PrimaryDisplayDetection: 0
GfxDataHob->ExternalGfxScanEnable: 0
Gfx HOBs installed
Graphics detection
Initializing Graphics
POSTCODE=<0000DA45>
iGFX initialization start
GTBaseAddress 0XAF000000:
IGD enabled.
Update CONFIG0 Address D00 : 10
Configuring iTouch Source Registers Doorbell and GSA_Touch
iGFX initialization end
Initializing Pre-Memory Display
POSTCODE=<0000DA0B>
DisplayNativeGpioInit: Begin
DisplayNativeGpioInit: End
ProgramDisplayWorkaround: Begin
POSTCODE=<0000DA48>
Initializing DpIn PreMem Config.
[DpIn] DpInPreMemInit() - Start
Dp-In External Gfx Card Support = 0 From DpIn PreMemConfigBlock
Initializing CPU specific PreMem Pei Config in Pre-Mem
GetDpInPrivateCpuData - Dp-In not Supported by Silicon. Max DP-In Port Support = 0x0
Initializing Dp-In Config Policy
[DPIN] DpInPostGfxInit() - Start
[DPIN] DpInPostGfxInit() - End
POSTCODE=<0000DA49>
[TCSS] TcssPreMemInit() - Start
Install TCSS DATA HOB
TcssHob->EfiHobGuidType.Name: 455702CE-4ADB-45D9-8B27-F7B0D9798AE0
TcssHob @ FEF55B78
&(TcssHob->TcssData) @ FEF55B90
TcssHob - HobHeader: 6E
TcssData: 32
Install TCSS SSID DATA HOB
TcssSsidHob->EfiHobGuidType.Name: 8903D47A-8F82-4063-A840-31689C9E7820
TcssSsidHob @ FEF55C00
&(TcssHob->TcssSsidTable) @ FEF55C18
TcssSsidHob->NumberOfTcssSsidTable: 8
[TCSS] TcssDevEnInitPreMem - Start
TCSS DEVEN = 0x00000300
IOM mailbox data = 0x00000300
IOM mailbox command = 0x00000001
[TCSS] Updated TCSS_DEVEN to TCSS HOB
[TCSS] TcssDevEnInitPreMem - End
[TCSS] TcssPreMemInit() - End
POSTCODE=<0000DA50>
[TCSS] UpdateDpinToHob Entry
[TCSS] UpdateDpinToHob End
Initializing Vtd
POSTCODE=<0000DA51>
Install VTD DATA HOB
VtdDataHob->EfiHobGuidType.Name: 1D60DCE8-503A-44A8-B32D-56B388F34C55
VtdDataHob @ FEF55C20
VtdDataHobSize - HobHeader: 24
VtdDataHobSize: 3C
VTd enabled
IgdIommuOverride start
Before Override: EcapReg=69E2FF0505E
After Override: EcapReg=29A00F0505E
Initializing System Agent Overclocking
POSTCODE=<0000DA52>
SaOcInit Start
(OC) Overclocking is disabled. Bypassing SA overclocking flow.
Configuring Telemetry CPU CrashLog Device with DEVEN 0x2F091
TotalMmioLength: 0x00000000 bytes
[InstallMrcCallback] MRC Entry...
[InstallMrcCallback] Register PeiMasterBootModePpi Notify Status = Success
Register PPI Notify: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Notify: PPI Guid: 7408D748-FC8C-4EE6-9288-C4BEC092A410, Peim notify entry point: FFE483A5
[PrememoryInitCallBack]
[PeimMemoryInit]
Post Code: DD00h
Processor supports TXT
Platform / PCH supports TXT
TigerLake ULT: Stepping B0
Microcode Update: 0x000000AC
System boot mode: 0h - BOOT_WITH_FULL_CONFIGURATION
Restore data of size 0 from 0x0
Global data of size 132013 is at 0xFEF1A134
MiscPeiPreMemConfig->S3DataPtr: 0 check completed, SysBootMode: 0
Calling CpuReplacementCheck
Skip CPU replacement check by policy
ForceFullTraining 0
Cold boot
(MAILBOX) Mailbox Read Command = 341h
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BIOS_CMD_MRC_CONFIG scesfie. MailboxStatus = 0h, MailboxData = 17Ch
TXTPEI: TXT.E2STS=4
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Spd Address for Mc 0 Channel 0 Dimm 0: 0
Spd Address for Mc 0 Channel 0 Dimm 1: 0
Spd Address for Mc 0 Channel 1 Dimm 0: 0
Spd Address for Mc 0 Channel 1 Dimm 1: 0
Spd Address for Mc 0 Channel 2 Dimm 0: 0
Spd Address for Mc 0 Channel 2 Dimm 1: 0
Spd Address for Mc 0 Channel 3 Dimm 0: 0
Spd Address for Mc 0 Channel 3 Dimm 1: 0
Spd Address for Mc 1 Channel 0 Dimm 0: 0
Spd Address for Mc 1 Channel 0 Dimm 1: 0
Spd Address for Mc 1 Channel 1 Dimm 0: 0
Spd Address for Mc 1 Channel 1 Dimm 1: 0
Spd Address for Mc 1 Channel 2 Dimm 0: 0
Spd Address for Mc 1 Channel 2 Dimm 1: 0
Spd Address for Mc 1 Channel 3 Dimm 0: 0
Spd Address for Mc 1 Channel 3 Dimm 1: 0
IMR Configuration start
ME status: 0x80000015
IPU Fused off
BiosImrDisableMask0 = FFFFBBDF
PCIe IMR Size = 0
Heci Get IMR Size Msg
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80100007
00: F0 0C 00 00 DF BB FF FF - FF FF FF FF 00 00 00 00
[HECI1] Got msg Success: 80100007
00: F0 8C 00 00 00 00 0C 02 - 00 00 00 01 00 00 00 00
Heci Get IMR Size Msg successful. Response:
IMR Size = 0x020C0000
Largest IMR Size = 0x01000000
Flags = 0x00000000
POSTCODE=<0000D000> - Heci Get IMR Size Msg
Requested CSE IMR size = 34340864 Bytes
Largest CSE IMR size = 16777216 Bytes
Requested CSE IMR size (rounded up) = 64 MB
Largest CSE IMR size = 16 MB
MRC Start Memory Configuration
@@@@ Inputs->MemoryProfile:0
*********************************************************************
** Copyright (c) 2011- 2020 Intel Corporation. All rights reserved. **
** Tigerlake memory detection and initialization code. **
** Major version number is: 2 **
** Minor version number is: 0 **
** Rev version number is: 2 **
** Build number is: 10 **
*********************************************************************
BootMode == bmCold
SAGV: Disabled, running at point 3
Post Code: DD03h
MRC task -- MRC Early Overrides -- Started.
MRC task MRC Early Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD02h
MRC task -- Safe Mode Override -- Started.
MRC task Safe Mode Override -- SUCCEEDED, Status = 0h.
Post Code: DD1Dh
MRC task -- Print input parameters -- Started.
Debug.Stream: FEF3E99Ch
Debug.Level: 3h
FreqMax: 0
GearRatio: 0
Ratio: 0
RefClk: 133MHz
BClk: 100000000Hz
MemoryProfile: 0
RealtimeMemoryOC: 0
OcSupport: disabled
OverrideDowngradeForMixedMemory: disabled
BoardType: 5
CmdRanksTerminated: 1h
DqPinsInterleaved: 0
SeparateCkeDelayDdr4: 1
CpuModel: 806C0h
CpuStepping: 1h
GraphicsStolenSize: 3Ch
GraphicsGttSize: 8h
Iteration: 0h
VddVoltage: 0 mV
BootMode: 0h
TxtFlag: 0h
SimicsFlag: 0h
MobilePlatform: 1h
EccSupport: 1h
CleanMemory: 0x0
Ibecc: 0h
IbeccOperationMode: 0x2
IbeccParity: 0x1
McParity: 1h
GfxIsVersatileAcceleration: 0h
ScramblerSupport: 0h
LpFreqSwitch: 1h
MemSSFusa: 0h
RemapEnable: 1h
PowerDownMode: 0h
PwdwnIdleCounter: 0h
DisPgCloseIdleTimeout: 0h
RankInterleave: 1h
EnhancedInterleave: 1h
WeaklockEn: 0h
EnCmdRate: 7h
BaseAddresses
PciE: C0000000h
MchBar: FEDC0000h
Smbus: EFA0h
MeStolenSize: 40h
MmioSize: 800h
TsegSize: 8h
DprSize: 0h
PrmrrSize: 0h
TccMemAddress: 40080000h
TccMemSize: 0h
VddSettleWaitTime: 0h
VccIomV: 950
RmtPerTask: 0
TrainTrace: 0
MarginLimitCheck: 0
MarginLimitL2: 100
AutoSelfRefreshSupport: 1
ExtTemperatureSupport: 1
RhPrevention: 0
RhSolution: 0
RhRefreshSolution: 2
RefreshWm: 1h
RefreshPanicWm: 8h
RefreshHpWm: 7h
LctCmdEyeWidth: 96
RetrainOnFastFail: 1
LpDdrDqDqsReTraining (LpDqsOscEn) : 0h
NewFeatureEnable1: 0
NewFeatureEnable2: 0
MrcSafeConfig: 1h
SafeMode: 1h
VddqVoltageOverride(# of 1mV): 0
ChHashOverride: 0h
ChHashEnable: 1h
ChHashMask: 30CCh
ChHashInterleaveBit: 2h
ExtendedBankHashing: 1h
PerBankRefresh: 1h
ProbelessTrace: 0
Force1Dpc: 0
ForceSingleRank: 0
VttCompForVsshi: 1
Lp5CccConfig: 0x0
CmdMirror: 0x0
Ddr4OneDpc: 0
RxMode: 255
PowerTrainingMode: margin optimization
BdatEnable: 0
BdatTestType: 0
Lp5CccConfig: 0h
*************************************
***** MRC TRAINING STEPS *****
*************************************
TrainingSteps: 0x24FC073B TrainingSteps2: 0xC002
TrainingEnables.SOT: 1
TrainingEnables.ERDMPRTC2D: 0
TrainingEnables.ECT: 1
TrainingEnables.PDA: 1
TrainingEnables.RCVET: 1
TrainingEnables.RDMPRT: 1
TrainingEnables.JWRL: 1
TrainingEnables.EWRTC2D: 0
TrainingEnables.ERDTC2D: 0
TrainingEnables.WRTC1D: 1
TrainingEnables.WRVC1D: 1
TrainingEnables.RDTC1D: 1
DDR4MAP: 0
TrainingEnables2.DIMMODTCAT: 0
TrainingEnables.DIMMODTT: 0
TrainingEnables.DIMMRONT: 0
TrainingEnables.WRDSEQT: 0
TrainingEnables.WRDSUDT: 0
TrainingEnables.WRSRT: 0
TrainingEnables.RDODTT: 0
TrainingEnables.RDEQT: 0
TrainingEnables.RDAPT: 0
TrainingEnables.CMDVC: 1
TrainingEnables.WRTC2D: 1
TrainingEnables.RDTC2D: 1
TrainingEnables.WRVC2D: 1
TrainingEnables.RDVC2D: 1
TrainingEnables.LCT: 1
TrainingEnables.RTL: 0
TrainingEnables.TAT: 0
TrainingEnables.RMT: 1
TrainingEnables.MEMTST: 0
TrainingEnables.ALIASCHK: 0
TrainingEnables.RCVENC1D: 1
TrainingEnables.RMC: 0
TrainingEnables2.DCC: 0
TrainingEnables2.RDVC1D: 1
TrainingEnables2.TXTCO: 0
TrainingEnables2.CLKTCO: 0
TrainingEnables2.CMDSR: 0
TrainingEnables2.CMDDSEQ: 0
TrainingEnables2.DIMMODTCA: 0
TrainingEnables2.TXTCODQS: 0
TrainingEnables2.CMDDRUD: 0
TrainingEnables2.VCCDLLBP: 0
TrainingEnables2.PVTTDNLP: 0
TrainingEnables2.RDVREFDC: 0
TrainingEnables2.VDDQT: 0
TrainingEnables2.RMTBIT: 0
TrainingEnables2.WRITE0: 1
SAGV Inputs
Points Freq Gears
0 0 0
1 0 0
2 0 0
3 0 0
*************************************
***** MRC TIMING DATA *****
*************************************
Controller[0] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 0/0/0 Status: 0h
Controller, Channel, Dimm 0/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/0/1 Status: 0h
Controller, Channel, Dimm 0/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 0/1/0 Status: 0h
Controller, Channel, Dimm 0/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/1/1 Status: 0h
Controller, Channel, Dimm 0/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 0/2/0 Status: 0h
Controller, Channel, Dimm 0/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/2/1 Status: 0h
Controller, Channel, Dimm 0/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 0/3/0 Status: 0h
Controller, Channel, Dimm 0/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 0/3/1 Status: 0h
Controller, Channel, Dimm 0/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller[1] ChannelCount: 4h
Channel[0].Status: 2h
Channel[0].DimmCount: 2h
Controller, Channel, Dimm 1/0/0 Status: 0h
Controller, Channel, Dimm 1/0/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/0/1 Status: 0h
Controller, Channel, Dimm 1/0/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[1].Status: 2h
Channel[1].DimmCount: 2h
Controller, Channel, Dimm 1/1/0 Status: 0h
Controller, Channel, Dimm 1/1/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/1/1 Status: 0h
Controller, Channel, Dimm 1/1/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[2].Status: 2h
Channel[2].DimmCount: 2h
Controller, Channel, Dimm 1/2/0 Status: 0h
Controller, Channel, Dimm 1/2/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/2/1 Status: 0h
Controller, Channel, Dimm 1/2/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Channel[3].Status: 2h
Channel[3].DimmCount: 2h
Controller, Channel, Dimm 1/3/0 Status: 0h
Controller, Channel, Dimm 1/3/0 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 23 10 10 0E 17 29 95 08 00 40 00 00 0A 21 00 00 #....)...@...!..
10h( 16): 48 00 04 04 92 55 00 00 8C 00 90 A8 90 90 06 D0 H....U..........
20h( 32): 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 E1 E1 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 55 00 00 00 20 20 20 20 20 20 20 .....U...
150h( 336): 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 ...
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Controller, Channel, Dimm 1/3/1 Status: 0h
Controller, Channel, Dimm 1/3/1 SpdAddress: 0h
SPD: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0h( 0): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
10h( 16): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
20h( 32): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
30h( 48): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
40h( 64): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50h( 80): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60h( 96): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70h( 112): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80h( 128): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90h( 144): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
A0h( 160): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
B0h( 176): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
C0h( 192): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
D0h( 208): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
E0h( 224): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
F0h( 240): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
100h( 256): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
110h( 272): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
120h( 288): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
130h( 304): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
140h( 320): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
150h( 336): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
160h( 352): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
170h( 368): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
180h( 384): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
190h( 400): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1A0h( 416): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1B0h( 432): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1C0h( 448): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1D0h( 464): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1E0h( 480): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1F0h( 496): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
200h( 512): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
210h( 528): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
220h( 544): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
230h( 560): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
240h( 576): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
250h( 592): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
260h( 608): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
270h( 624): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
280h( 640): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
290h( 656): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2A0h( 672): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2B0h( 688): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2C0h( 704): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2D0h( 720): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2E0h( 736): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
2F0h( 752): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
300h( 768): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
310h( 784): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
320h( 800): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
330h( 816): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
340h( 832): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
350h( 848): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
360h( 864): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
370h( 880): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
380h( 896): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
390h( 912): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3A0h( 928): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3B0h( 944): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3C0h( 960): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3D0h( 976): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3E0h( 992): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
3F0h( 1008): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
*************************************
***** THERMAL OVERWRITE *******
*************************************
ThermalEnables.EnablePwrDn : 1h
ThermalEnables.EnablePwrDnLpddr: 1h
ThermalEnables.Refresh2X : 0h
SrefCfgEna : 1h
SrefCfgIdleTmr : 200h
ThrtCkeMinDefeat: 1h
ThrtCkeMinTmr : 0h
ThrtCkeMinDefeatLpddr: 1h
ThrtCkeMinTmrLpddr : 0h
*************************************
***** DQDQS SWIZZLING *******
*************************************
Mc0.Ch0: 0 1 DqMapCpu2Dram: 0 1 6 7 3 2 5 4 15 8 9 14 12 11 10 13
Mc0.Ch1: 1 0 DqMapCpu2Dram: 11 12 8 15 9 14 10 13 3 4 7 0 6 1 5 2
Mc0.Ch2: 0 1 DqMapCpu2Dram: 4 5 3 2 7 1 0 6 11 10 12 13 8 9 14 15
Mc0.Ch3: 1 0 DqMapCpu2Dram: 12 11 8 13 14 15 9 10 4 7 3 2 1 6 0 5
Mc1.Ch0: 1 0 DqMapCpu2Dram: 11 10 9 8 12 13 15 14 4 5 6 7 3 2 0 1
Mc1.Ch1: 0 1 DqMapCpu2Dram: 0 7 1 6 3 5 2 4 9 8 10 11 14 15 13 12
Mc1.Ch2: 0 1 DqMapCpu2Dram: 4 5 6 1 3 2 7 0 10 13 12 11 14 9 15 8
Mc1.Ch3: 1 0 DqMapCpu2Dram: 10 12 9 15 8 11 13 14 3 4 1 2 6 0 5 7
RcompResistor: 0
RcompTarget[RdOdt]: 0
RcompTarget[WrDS]: 0
RcompTarget[WrDSCmd]: 0
RcompTarget[WrDSCtl]: 0
RcompTarget[WrDSClk]: 0
MRC task Print input parameters -- SUCCEEDED, Status = 0h. Stack Depth: 149824
Post Code: DD20h
MRC task -- SPD PROCESSING -- Started.
SPD Dimm recognition, Controller, Channel, Dimm 0/0/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/1/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/2/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 0/3/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/0/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/1/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/2/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
SPD Dimm recognition, Controller, Channel, Dimm 1/3/0
LPDDR4 Memory Down detected, Rev: 1.0, Size: 384 used/512 total, CRC coverage: 0 - 125
DIMM profile Standard selected
Die per SDRAM Package: 2
Channels per SDRAM Package: 2
SDRAM device width: 16
Number of channels: 1
Primary bus width: 16
Ranks: 2
8 Banks in 1 groups
SDRAM Capacity: 32768 Mb
DIMM size: 4096 MByte
Row bits: 17
Column bits: 10
ECC is not supported
DIMM has no address mirroring
Partial Array Self Refresh is not supported
On-Die Thermal Sensor Readout is not supported
Auto Self Refresh is not supported
Extended Temperature Refresh Rate is not supported
Extended Temperature Range is not supported
tMAC is unlimited
Reference raw card: 0 ' A'
JOSH00: MrcSpdCrcArea: DdrType: 10
JOSH00: MrcSpdCrcArea: CrcStart: 0
JOSH00: MrcSpdCrcArea: CrcSize: 9
JOSH00: SpdDimmRecognition: DimmOut->Crc: C97E
JOSH01: SpdDimmRecognition: DimmOut->Crc: C97E
CAPID0_A: F0006410h
CAPID0_B: 90240008h
CAPID0_C: 0661820Ah
CAPID0_E: 001F8000h
DMFC: 4267
Max_Data_Rate_At_GEAR1: 2667
DDR_OVERCLOCK: 0, PLL_REF100_CFG: 1
MrcMcCapabilityPreSpd Inputs->RefClk = 0
MrcMcCapabilityPreSpd Outputs->RefClk = 0
HighGear 1
Gear2Ever 0
Outputs->MemoryClockMax: 750000, Outputs->FreqMax : 2667, Gear1
The maximum memory frequency allowed is 2667, tCK=750000fs
133MHz reference clock is selected
SPD Dimm timing calculation
Timebase (MTB/FTB):
Profile Controller Channel Dimm Value
0 0 0 0 125000 1000
0 0 1 0 125000 1000
0 0 2 0 125000 1000
0 0 3 0 125000 1000
0 1 0 0 125000 1000
0 1 1 0 125000 1000
0 1 2 0 125000 1000
0 1 3 0 125000 1000
1 0 0 0 125000 1000
1 0 1 0 125000 1000
1 0 2 0 125000 1000
1 0 3 0 125000 1000
1 1 0 0 125000 1000
1 1 1 0 125000 1000
1 1 2 0 125000 1000
1 1 3 0 125000 1000
SDRAM Cycle Time (tCKmin):
Profile Controller Channel Dimm Value (fs)
0 0 0 0 750000
0 0 1 0 750000
0 0 2 0 750000
0 0 3 0 750000
0 1 0 0 750000
0 1 1 0 750000
0 1 2 0 750000
0 1 3 0 750000
1 0 0 0 750000
1 0 1 0 750000
1 0 2 0 750000
1 0 3 0 750000
1 1 0 0 750000
1 1 1 0 750000
1 1 2 0 750000
1 1 3 0 750000
Best case value for profiles 0-3: 750000 750000
CAS Latency Time (tAAmin):
Profile Controller Channel Dimm Value tCL Mask
0 0 0 0 24 5592h
0 0 1 0 24 5592h
0 0 2 0 24 5592h
0 0 3 0 24 5592h
0 1 0 0 24 5592h
0 1 1 0 24 5592h
0 1 2 0 24 5592h
0 1 3 0 24 5592h
Profile 0 common set of supported CAS Latency values = 5592h
1 0 0 0 24 5592h
1 0 1 0 24 5592h
1 0 2 0 24 5592h
1 0 3 0 24 5592h
1 1 0 0 24 5592h
1 1 1 0 24 5592h
1 1 2 0 24 5592h
1 1 3 0 24 5592h
Profile 1 common set of supported CAS Latency values = 5592h
Best case value for profiles 0-3: 24 24
Memory clock = 750000fs
Memory Frequency = 2667
CAS Write Latency (tCWLmin):
Profile Controller Channel Dimm Value
0 0 0 0 23
0 0 1 0 23
0 0 2 0 23
0 0 3 0 23
0 1 0 0 23
0 1 1 0 23
0 1 2 0 23
0 1 3 0 23
1 0 0 0 23
1 0 1 0 23
1 0 2 0 23
1 0 3 0 23
1 1 0 0 23
1 1 1 0 23
1 1 2 0 23
1 1 3 0 23
Best case value for profiles 0-3: 23 23
Active to precharge delay time (tRASmin):
Profile Controller Channel Dimm Value
0 0 0 0 56
0 0 1 0 56
0 0 2 0 56
0 0 3 0 56
0 1 0 0 56
0 1 1 0 56
0 1 2 0 56
0 1 3 0 56
1 0 0 0 56
1 0 1 0 56
1 0 2 0 56
1 0 3 0 56
1 1 0 0 56
1 1 1 0 56
1 1 2 0 56
1 1 3 0 56
Best case value for profiles 0-3: 56 56
RAS# to CAS# delay time (tRCDmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Active to active/refresh delay time (tRCmin):
Profile Controller Channel Dimm Value
0 0 0 0 80
0 0 1 0 80
0 0 2 0 80
0 0 3 0 80
0 1 0 0 80
0 1 1 0 80
0 1 2 0 80
0 1 3 0 80
1 0 0 0 80
1 0 1 0 80
1 0 2 0 80
1 0 3 0 80
1 1 0 0 80
1 1 1 0 80
1 1 2 0 80
1 1 3 0 80
Best case value for profiles 0-3: 80 80
Average Periodic Refresh Interval (tREFImin):
Profile Controller Channel Dimm Value
0 0 0 0 5206
0 0 1 0 5206
0 0 2 0 5206
0 0 3 0 5206
0 1 0 0 5206
0 1 1 0 5206
0 1 2 0 5206
0 1 3 0 5206
1 0 0 0 5206
1 0 1 0 5206
1 0 2 0 5206
1 0 3 0 5206
1 1 0 0 5206
1 1 1 0 5206
1 1 2 0 5206
1 1 3 0 5206
Best case value for profiles 0-3: 5206 5206
Refresh recovery delay time (tRFCmin):
Profile Controller Channel Dimm Value
0 0 0 0 280
0 0 1 0 280
0 0 2 0 280
0 0 3 0 280
0 1 0 0 280
0 1 1 0 280
0 1 2 0 280
0 1 3 0 280
1 0 0 0 280
1 0 1 0 280
1 0 2 0 280
1 0 3 0 280
1 1 0 0 280
1 1 1 0 280
1 1 2 0 280
1 1 3 0 280
Best case value for profiles 0-3: 280 280
Per Bank refresh recovery delay time (tRFCpb):
Profile Controller Channel Dimm Value
0 0 0 0 120
0 0 1 0 120
0 0 2 0 120
0 0 3 0 120
0 1 0 0 120
0 1 1 0 120
0 1 2 0 120
0 1 3 0 120
1 0 0 0 120
1 0 1 0 120
1 0 2 0 120
1 0 3 0 120
1 1 0 0 120
1 1 1 0 120
1 1 2 0 120
1 1 3 0 120
Best case value for profiles 0-3: 120 120
Row precharge delay time (tRPmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Row precharge delay time for all banks (tRPab):
Profile Controller Channel Dimm Value
0 0 0 0 28
Best case value for profiles 0-3: 28 28
Active to active/refresh delay time (tFAWmin):
Profile Controller Channel Dimm Value
0 0 0 0 54
0 0 1 0 54
0 0 2 0 54
0 0 3 0 54
0 1 0 0 54
0 1 1 0 54
0 1 2 0 54
0 1 3 0 54
1 0 0 0 54
1 0 1 0 54
1 0 2 0 54
1 0 3 0 54
1 1 0 0 54
1 1 1 0 54
1 1 2 0 54
1 1 3 0 54
Best case value for profiles 0-3: 54 54
Row active to row active delay time (tRRDmin):
Profile Controller Channel Dimm Value
0 0 0 0 14
0 0 1 0 14
0 0 2 0 14
0 0 3 0 14
0 1 0 0 14
0 1 1 0 14
0 1 2 0 14
0 1 3 0 14
1 0 0 0 14
1 0 1 0 14
1 0 2 0 14
1 0 3 0 14
1 1 0 0 14
1 1 1 0 14
1 1 2 0 14
1 1 3 0 14
Best case value for profiles 0-3: 14 14
Internal read to precharge delay time (tRTPmin):
Profile Controller Channel Dimm Value
0 0 0 0 10
0 0 1 0 10
0 0 2 0 10
0 0 3 0 10
0 1 0 0 10
0 1 1 0 10
0 1 2 0 10
0 1 3 0 10
1 0 0 0 10
1 0 1 0 10
1 0 2 0 10
1 0 3 0 10
1 1 0 0 10
1 1 1 0 10
1 1 2 0 10
1 1 3 0 10
Best case value for profiles 0-3: 10 10
Write recovery time (tWRmin):
Profile Controller Channel Dimm Value
0 0 0 0 24
0 0 1 0 24
0 0 2 0 24
0 0 3 0 24
0 1 0 0 24
0 1 1 0 24
0 1 2 0 24
0 1 3 0 24
1 0 0 0 24
1 0 1 0 24
1 0 2 0 24
1 0 3 0 24
1 1 0 0 24
1 1 1 0 24
1 1 2 0 24
1 1 3 0 24
Best case value for profiles 0-3: 24 24
Internal write to read command delay time (tWTRmin):
Profile Controller Channel Dimm Value
0 0 0 0 14
0 0 1 0 14
0 0 2 0 14
0 0 3 0 14
0 1 0 0 14
0 1 1 0 14
0 1 2 0 14
0 1 3 0 14
1 0 0 0 14
1 0 1 0 14
1 0 2 0 14
1 0 3 0 14
1 1 0 0 14
1 1 1 0 14
1 1 2 0 14
1 1 3 0 14
Best case value for profiles 0-3: 14 14
Refresh recovery delay time (tRFC2min):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Refresh recovery delay time (tRFC4min):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Row active to row active delay time (tRRD_Lmin):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Row active to row active delay time (tRRD_Smin):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Internal write to read command delay time (tWTR_L):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Internal write to read command delay time (tWTR_S):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
CAS to CAS delay for same bank group (tCCD_L):
Profile Controller Channel Dimm Value
0 0 0 0 0
0 0 1 0 0
0 0 2 0 0
0 0 3 0 0
0 1 0 0 0
0 1 1 0 0
0 1 2 0 0
0 1 3 0 0
1 0 0 0 0
1 0 1 0 0
1 0 2 0 0
1 0 3 0 0
1 1 0 0 0
1 1 1 0 0
1 1 2 0 0
1 1 3 0 0
Best case value for profiles 0-3: 0 0
Command rate mode (Nmode):
Profile Controller Channel Dimm Value
0 0 0 0 1
0 0 1 0 1
0 0 2 0 1
0 0 3 0 1
0 1 0 0 1
0 1 1 0 1
0 1 2 0 1
0 1 3 0 1
1 0 0 0 1
1 0 1 0 1
1 0 2 0 1
1 0 3 0 1
1 1 0 0 1
1 1 1 0 1
1 1 2 0 1
1 1 3 0 1
Best case value for profiles 0-3: 1 1
Module voltage VDD (mVolts):
Profile Controller Channel Dimm Value
0 0 0 0 1100
0 0 1 0 1100
0 0 2 0 1100
0 0 3 0 1100
0 1 0 0 1100
0 1 1 0 1100
0 1 2 0 1100
0 1 3 0 1100
1 0 0 0 1100
1 0 1 0 1100
1 0 2 0 1100
1 0 3 0 1100
1 1 0 0 1100
1 1 1 0 1100
1 1 2 0 1100
1 1 3 0 1100
Best case value for profiles 0-3: 1100 1100
MRC task SPD PROCESSING -- SUCCEEDED, Status = 0h. Stack Depth: 149940
Post Code: DD21h
MRC task -- MRC Auto Updates and Overrides -- Started.
LPDDR Low Frequency: 1067
RxMode: Unmatched w/ Rload DQS
LowFrequency: 1067
Updating Rcomp Resistors: 100
Updating Rcomp Targets:
RcompTarget[RdOdt]: 80
RcompTarget[WrDS]: 40
RcompTarget[WrDSCmd]: 40
RcompTarget[WrDSCtl]: 40
RcompTarget[WrDSClk]: 30
DDRIO ODT Mode: Vss
MRC task MRC Auto Updates and Overrides -- SUCCEEDED, Status = 0h.
Post Code: DD22h
MRC task -- MC Capabilities -- Started.
Memory allocated for IGD = 60MB and for GTT = 8MB.
Maximum size of memory allowed on a channel = 65536MB.
Number of channels supported = 4
Number of DIMMs per channel supported = 1
Controller, Channel, Dimm 0/0/0 NMode = 1
Controller, Channel, Dimm 0/1/0 NMode = 1
Controller, Channel, Dimm 0/2/0 NMode = 1
Controller, Channel, Dimm 0/3/0 NMode = 1
Controller, Channel, Dimm 1/0/0 NMode = 1
Controller, Channel, Dimm 1/1/0 NMode = 1
Controller, Channel, Dimm 1/2/0 NMode = 1
Controller, Channel, Dimm 1/3/0 NMode = 1
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
C0D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 0, Dimm 0.
ValidRankBitMask = 0x3
C1D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 1, Dimm 0.
ValidRankBitMask = 0x3
C2D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 2, Dimm 0.
ValidRankBitMask = 0x3
C3D0DimmCapacity = 0x1000
Controller configured to one DIMM per channel, we've selected channel 3, Dimm 0.
ValidRankBitMask = 0x3
MRC task MC Capabilities -- SUCCEEDED, Status = 0h.
Post Code: DD11h
MRC task -- MC Frequency Lock -- Started.
(MAILBOX) Mailbox Read Command = 33Fh
(MAILBOX) Mailbox Status = 00h
CPU_MAILBOX_BCLK_CONFIG_GET_SSC_CONTROL_SUBCOMMAND success. MailboxStatus = 0h
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
W GsmIocScramLpMode: 1
MRC task MC Frequency Lock -- SUCCEEDED, Status = 0h. Stack Depth: 150088
Post Code: DD15h
MRC task -- Memory SubSystem Config -- Started.
W .B0 GsmCmiLsbMaskBit: 8336 (0x2090)
W .B0 GsmCmiHashMode: 2
Controller HASH Enabled
W .B0 EndOfCmiMarker: 0
W .B0 EndOfCmiMarker: 0
Interleaved Memory between controllers 32768 Megabytes
Updating the registers for CMF0
W .B0 GsmCmiStackedMode: 1
W .B0 GsmCmiStackMsMap: 0
W .B0 GsmCmiLMadSliceMap: 0
W .B0 GsmCmiSliceDisable: 0
W .B0 GsmCmiStackedMsHash: 32 (0x20)
W .B0 GsmCmiSMadSliceSize: 0
MRC task Memory SubSystem Config -- SUCCEEDED, Status = 0h. Stack Depth: 150416
Post Code: DD09h
MRC task -- DDRIO Config - Pre DCC -- Started.
W GsmIocScramDdr4Mode: 1
W GsmIocScramLp5Mode: 1
W GsmIocDisIosfSbClkGate: 0
MRC task DDRIO Config - Pre DCC -- SUCCEEDED, Status = 0h.
Post Code: DD23h
MRC task -- MC Config -- Started.
Timing Config
W Mc0.C0 GsmMctRP: 24 (0x18)
W Mc0.C0 GsmMctRPabExt: 24 (0x18)
W Mc0.C0 GsmMctRAS: 4
W Mc0.C0 GsmMctRDPRE: 56 (0x38)
W Mc0.C0 GsmMctPPD: 18 (0x12)
W Mc0.C0 GsmMctFAW: 63 (0x3F)
W Mc0.C0 GsmMctRRDsg: 54 (0x36)
W Mc0.C0 GsmMctRRDdg: 14 (0xE)
W Mc0.C0 GsmMctREFSbRd: 14 (0xE)
W Mc0.C0 GsmMctRDRDsg: 3
W Mc0.C0 GsmMctOdtRdDelay: 0
W Mc0.C0 GsmMctOdtWrDuration: 0
W Mc0.C0 GsmMctOdtWrDelay: 0
W Mc0.C0 GsmMctWrEarlyOdt: 0
W Mc0.C0 GsmMctCL: 0
W Mc0.C0 GsmMctCWL: 24 (0x18)
W Mc0.C0 GsmMctAONPD: 22 (0x16)
W Mc0.C0 GsmMctCWLAdd: 0
W Mc0.C0 GsmMctWRPRE: 4
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdd: 33 (0x21)
W Mc0.C0 GsmMctRDWRsg: 34 (0x22)
W Mc0.C0 GsmMctRDWRdg: 41 (0x29)
W Mc0.C0 GsmMctRDWRdr: 41 (0x29)
W Mc0.C0 GsmMctRDWRdd: 41 (0x29)
W Mc0.C0 GsmMctWRRDsg: 42 (0x2A)
W Mc0.C0 GsmMctWRRDdg: 64 (0x40)
W Mc0.C0 GsmMctWRRDdr: 64 (0x40)
W Mc0.C0 GsmMctWRRDdd: 32 (0x20)
W Mc0.C0 GsmMctWRWRsg: 32 (0x20)
W Mc0.C0 GsmMctWRWRdg: 26 (0x1A)
W Mc0.C0 GsmMctWRWRdr: 26 (0x1A)
W Mc0.C0 GsmMctWRWRdd: 35 (0x23)
W Mc0.C0 GsmMctCKE: 35 (0x23)
W Mc0.C0 GsmMctXP: 10 (0xA)
W Mc0.C0 GsmMctXPDLL: 10 (0xA)
W Mc0.C0 GsmMctRDPDEN: 5
W Mc0.C0 GsmMctWRPDEN: 46 (0x2E)
W Mc0.C0 GsmMctCA2CS: 66 (0x42)
W Mc0.C0 GsmMctPRPDEN: 10 (0xA)
W Mc0.C1 GsmMctRP: 24 (0x18)
W Mc0.C1 GsmMctRPabExt: 24 (0x18)
W Mc0.C1 GsmMctRAS: 4
W Mc0.C1 GsmMctRDPRE: 56 (0x38)
W Mc0.C1 GsmMctPPD: 18 (0x12)
W Mc0.C1 GsmMctFAW: 63 (0x3F)
W Mc0.C1 GsmMctRRDsg: 54 (0x36)
W Mc0.C1 GsmMctRRDdg: 14 (0xE)
W Mc0.C1 GsmMctREFSbRd: 14 (0xE)
W Mc0.C1 GsmMctRDRDsg: 3
W Mc0.C1 GsmMctOdtRdDelay: 0
W Mc0.C1 GsmMctOdtWrDuration: 0
W Mc0.C1 GsmMctOdtWrDelay: 0
W Mc0.C1 GsmMctWrEarlyOdt: 0
W Mc0.C1 GsmMctCL: 0
W Mc0.C1 GsmMctCWL: 24 (0x18)
W Mc0.C1 GsmMctAONPD: 22 (0x16)
W Mc0.C1 GsmMctCWLAdd: 0
W Mc0.C1 GsmMctWRPRE: 4
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdd: 33 (0x21)
W Mc0.C1 GsmMctRDWRsg: 34 (0x22)
W Mc0.C1 GsmMctRDWRdg: 41 (0x29)
W Mc0.C1 GsmMctRDWRdr: 41 (0x29)
W Mc0.C1 GsmMctRDWRdd: 41 (0x29)
W Mc0.C1 GsmMctWRRDsg: 42 (0x2A)
W Mc0.C1 GsmMctWRRDdg: 64 (0x40)
W Mc0.C1 GsmMctWRRDdr: 64 (0x40)
W Mc0.C1 GsmMctWRRDdd: 32 (0x20)
W Mc0.C1 GsmMctWRWRsg: 32 (0x20)
W Mc0.C1 GsmMctWRWRdg: 26 (0x1A)
W Mc0.C1 GsmMctWRWRdr: 26 (0x1A)
W Mc0.C1 GsmMctWRWRdd: 35 (0x23)
W Mc0.C1 GsmMctCKE: 35 (0x23)
W Mc0.C1 GsmMctXP: 10 (0xA)
W Mc0.C1 GsmMctXPDLL: 10 (0xA)
W Mc0.C1 GsmMctRDPDEN: 5
W Mc0.C1 GsmMctWRPDEN: 46 (0x2E)
W Mc0.C1 GsmMctCA2CS: 66 (0x42)
W Mc0.C1 GsmMctPRPDEN: 10 (0xA)
W Mc1.C0 GsmMctRP: 24 (0x18)
W Mc1.C0 GsmMctRPabExt: 24 (0x18)
W Mc1.C0 GsmMctRAS: 4
W Mc1.C0 GsmMctRDPRE: 56 (0x38)
W Mc1.C0 GsmMctPPD: 18 (0x12)
W Mc1.C0 GsmMctFAW: 63 (0x3F)
W Mc1.C0 GsmMctRRDsg: 54 (0x36)
W Mc1.C0 GsmMctRRDdg: 14 (0xE)
W Mc1.C0 GsmMctREFSbRd: 14 (0xE)
W Mc1.C0 GsmMctRDRDsg: 3
W Mc1.C0 GsmMctOdtRdDelay: 0
W Mc1.C0 GsmMctOdtWrDuration: 0
W Mc1.C0 GsmMctOdtWrDelay: 0
W Mc1.C0 GsmMctWrEarlyOdt: 0
W Mc1.C0 GsmMctCL: 0
W Mc1.C0 GsmMctCWL: 24 (0x18)
W Mc1.C0 GsmMctAONPD: 22 (0x16)
W Mc1.C0 GsmMctCWLAdd: 0
W Mc1.C0 GsmMctWRPRE: 4
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdd: 33 (0x21)
W Mc1.C0 GsmMctRDWRsg: 34 (0x22)
W Mc1.C0 GsmMctRDWRdg: 41 (0x29)
W Mc1.C0 GsmMctRDWRdr: 41 (0x29)
W Mc1.C0 GsmMctRDWRdd: 41 (0x29)
W Mc1.C0 GsmMctWRRDsg: 42 (0x2A)
W Mc1.C0 GsmMctWRRDdg: 64 (0x40)
W Mc1.C0 GsmMctWRRDdr: 64 (0x40)
W Mc1.C0 GsmMctWRRDdd: 32 (0x20)
W Mc1.C0 GsmMctWRWRsg: 32 (0x20)
W Mc1.C0 GsmMctWRWRdg: 26 (0x1A)
W Mc1.C0 GsmMctWRWRdr: 26 (0x1A)
W Mc1.C0 GsmMctWRWRdd: 35 (0x23)
W Mc1.C0 GsmMctCKE: 35 (0x23)
W Mc1.C0 GsmMctXP: 10 (0xA)
W Mc1.C0 GsmMctXPDLL: 10 (0xA)
W Mc1.C0 GsmMctRDPDEN: 5
W Mc1.C0 GsmMctWRPDEN: 46 (0x2E)
W Mc1.C0 GsmMctCA2CS: 66 (0x42)
W Mc1.C0 GsmMctPRPDEN: 10 (0xA)
W Mc1.C1 GsmMctRP: 24 (0x18)
W Mc1.C1 GsmMctRPabExt: 24 (0x18)
W Mc1.C1 GsmMctRAS: 4
W Mc1.C1 GsmMctRDPRE: 56 (0x38)
W Mc1.C1 GsmMctPPD: 18 (0x12)
W Mc1.C1 GsmMctFAW: 63 (0x3F)
W Mc1.C1 GsmMctRRDsg: 54 (0x36)
W Mc1.C1 GsmMctRRDdg: 14 (0xE)
W Mc1.C1 GsmMctREFSbRd: 14 (0xE)
W Mc1.C1 GsmMctRDRDsg: 3
W Mc1.C1 GsmMctOdtRdDelay: 0
W Mc1.C1 GsmMctOdtWrDuration: 0
W Mc1.C1 GsmMctOdtWrDelay: 0
W Mc1.C1 GsmMctWrEarlyOdt: 0
W Mc1.C1 GsmMctCL: 0
W Mc1.C1 GsmMctCWL: 24 (0x18)
W Mc1.C1 GsmMctAONPD: 22 (0x16)
W Mc1.C1 GsmMctCWLAdd: 0
W Mc1.C1 GsmMctWRPRE: 4
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdd: 33 (0x21)
W Mc1.C1 GsmMctRDWRsg: 34 (0x22)
W Mc1.C1 GsmMctRDWRdg: 41 (0x29)
W Mc1.C1 GsmMctRDWRdr: 41 (0x29)
W Mc1.C1 GsmMctRDWRdd: 41 (0x29)
W Mc1.C1 GsmMctWRRDsg: 42 (0x2A)
W Mc1.C1 GsmMctWRRDdg: 64 (0x40)
W Mc1.C1 GsmMctWRRDdr: 64 (0x40)
W Mc1.C1 GsmMctWRRDdd: 32 (0x20)
W Mc1.C1 GsmMctWRWRsg: 32 (0x20)
W Mc1.C1 GsmMctWRWRdg: 26 (0x1A)
W Mc1.C1 GsmMctWRWRdr: 26 (0x1A)
W Mc1.C1 GsmMctWRWRdd: 35 (0x23)
W Mc1.C1 GsmMctCKE: 35 (0x23)
W Mc1.C1 GsmMctXP: 10 (0xA)
W Mc1.C1 GsmMctXPDLL: 10 (0xA)
W Mc1.C1 GsmMctRDPDEN: 5
W Mc1.C1 GsmMctWRPDEN: 46 (0x2E)
W Mc1.C1 GsmMctCA2CS: 66 (0x42)
W Mc1.C1 GsmMctPRPDEN: 10 (0xA)
Refresh Config
W Mc0.C0 GsmMctSRXRefDebits: 45 (0x2D)
W Mc0.C0 GsmMctRefreshHpWm: 64 (0x40)
W Mc0.C0 GsmMctRFC: 5206 (0x1456)
W Mc0.C0 GsmMctOrefRi: 280 (0x118)
W Mc0.C0 GsmMctRefreshPanicWm: 7
W Mc0.C0 GsmMctREFIx9: 8
W Mc0.C0 GsmMccPbrIssueNop: 1
W Mc0.C0 GsmMccOdtOverride: 0
W Mc0.C0 EndOfMctMarker: 120 (0x78)
W Mc0.C0 GsmMctXSR: 290 (0x122)
W Mc0.C0 GsmMctSrIdle: 19 (0x13)
W Mc0.C0 GsmMctMOD: 0
W Mc0.C0 GsmMctSR: 290 (0x122)
W Mc0.C0 GsmMctCPDED: 1334 (0x536)
W Mc0.C0 GsmMctZQCAL: 40 (0x28)
W Mc0.C0 GsmMctZQCS: 256 (0x100)
W Mc0.C0 GsmMccTRefiPulseStaggerDis: 1
W Mc0.C1 GsmMctSRXRefDebits: 45 (0x2D)
W Mc0.C1 GsmMctRefreshHpWm: 64 (0x40)
W Mc0.C1 GsmMctRFC: 5206 (0x1456)
W Mc0.C1 GsmMctOrefRi: 280 (0x118)
W Mc0.C1 GsmMctRefreshPanicWm: 7
W Mc0.C1 GsmMctREFIx9: 8
W Mc0.C1 GsmMccPbrIssueNop: 1
W Mc0.C1 GsmMccOdtOverride: 0
W Mc0.C1 EndOfMctMarker: 120 (0x78)
W Mc0.C1 GsmMctXSR: 290 (0x122)
W Mc0.C1 GsmMctSrIdle: 19 (0x13)
W Mc0.C1 GsmMctMOD: 0
W Mc0.C1 GsmMctSR: 290 (0x122)
W Mc0.C1 GsmMctCPDED: 1334 (0x536)
W Mc0.C1 GsmMctZQCAL: 40 (0x28)
W Mc0.C1 GsmMctZQCS: 256 (0x100)
W Mc0.C1 GsmMccTRefiPulseStaggerDis: 1
W Mc1.C0 GsmMctSRXRefDebits: 45 (0x2D)
W Mc1.C0 GsmMctRefreshHpWm: 64 (0x40)
W Mc1.C0 GsmMctRFC: 5206 (0x1456)
W Mc1.C0 GsmMctOrefRi: 280 (0x118)
W Mc1.C0 GsmMctRefreshPanicWm: 7
W Mc1.C0 GsmMctREFIx9: 8
W Mc1.C0 GsmMccPbrIssueNop: 1
W Mc1.C0 GsmMccOdtOverride: 0
W Mc1.C0 EndOfMctMarker: 120 (0x78)
W Mc1.C0 GsmMctXSR: 290 (0x122)
W Mc1.C0 GsmMctSrIdle: 19 (0x13)
W Mc1.C0 GsmMctMOD: 0
W Mc1.C0 GsmMctSR: 290 (0x122)
W Mc1.C0 GsmMctCPDED: 1334 (0x536)
W Mc1.C0 GsmMctZQCAL: 40 (0x28)
W Mc1.C0 GsmMctZQCS: 256 (0x100)
W Mc1.C0 GsmMccTRefiPulseStaggerDis: 1
W Mc1.C1 GsmMctSRXRefDebits: 45 (0x2D)
W Mc1.C1 GsmMctRefreshHpWm: 64 (0x40)
W Mc1.C1 GsmMctRFC: 5206 (0x1456)
W Mc1.C1 GsmMctOrefRi: 280 (0x118)
W Mc1.C1 GsmMctRefreshPanicWm: 7
W Mc1.C1 GsmMctREFIx9: 8
W Mc1.C1 GsmMccPbrIssueNop: 1
W Mc1.C1 GsmMccOdtOverride: 0
W Mc1.C1 EndOfMctMarker: 120 (0x78)
W Mc1.C1 GsmMctXSR: 290 (0x122)
W Mc1.C1 GsmMctSrIdle: 19 (0x13)
W Mc1.C1 GsmMctMOD: 0
W Mc1.C1 GsmMctSR: 290 (0x122)
W Mc1.C1 GsmMctCPDED: 1334 (0x536)
W Mc1.C1 GsmMctZQCAL: 40 (0x28)
W Mc1.C1 GsmMctZQCS: 256 (0x100)
W Mc1.C1 GsmMccTRefiPulseStaggerDis: 1
Scheduler parameters
SCHED_CBIT = 80001000h
SCHED_SECOND_CBIT = 0E000200h
SC_PCIT = 00000040h
W Mc0.C0 GsmMccCmdTriStateDis: 0
W Mc0.C0 GsmMccGear2: 0
W Mc0.C0 GsmMccDdr4OneDpc: 0
W Mc0.C0 GsmMccAddrMirror: 1
W Mc0.C0 GsmMccCmdStretch: 3
W Mc0.C0 GsmMccCmdGapRatio: 0
W Mc0.C0 GsmMccCmdTriStateDisTrain: 1
W Mc0.C0 GsmMccEnableOdtMatrix: 3
W Mc0.C0 GsmMctCAL: 1
W Mc0.C0 GsmMctCSCKEH: 7
W Mc0.C0 GsmMctRFCpb: 7
W Mc0.C0 GsmMccLpddrPasrRowMsb: 2
W Mc0.C0 EndOfMccMarker: 2
W Mc0.C1 GsmMccCmdTriStateDis: 0
W Mc0.C1 GsmMccGear2: 0
W Mc0.C1 GsmMccDdr4OneDpc: 0
W Mc0.C1 GsmMccAddrMirror: 1
W Mc0.C1 GsmMccCmdStretch: 3
W Mc0.C1 GsmMccCmdGapRatio: 0
W Mc0.C1 GsmMccCmdTriStateDisTrain: 1
W Mc0.C1 GsmMccEnableOdtMatrix: 3
W Mc0.C1 GsmMctCAL: 1
W Mc0.C1 GsmMctCSCKEH: 7
W Mc0.C1 GsmMctRFCpb: 7
W Mc0.C1 GsmMccLpddrPasrRowMsb: 2
W Mc0.C1 EndOfMccMarker: 2
SCHED_CBIT = 80001000h
SCHED_SECOND_CBIT = 0E000200h
SC_PCIT = 00000040h
W Mc1.C0 GsmMccCmdTriStateDis: 0
W Mc1.C0 GsmMccGear2: 0
W Mc1.C0 GsmMccDdr4OneDpc: 0
W Mc1.C0 GsmMccAddrMirror: 1
W Mc1.C0 GsmMccCmdStretch: 3
W Mc1.C0 GsmMccCmdGapRatio: 0
W Mc1.C0 GsmMccCmdTriStateDisTrain: 1
W Mc1.C0 GsmMccEnableOdtMatrix: 3
W Mc1.C0 GsmMctCAL: 1
W Mc1.C0 GsmMctCSCKEH: 7
W Mc1.C0 GsmMctRFCpb: 7
W Mc1.C0 GsmMccLpddrPasrRowMsb: 2
W Mc1.C0 EndOfMccMarker: 2
W Mc1.C1 GsmMccCmdTriStateDis: 0
W Mc1.C1 GsmMccGear2: 0
W Mc1.C1 GsmMccDdr4OneDpc: 0
W Mc1.C1 GsmMccAddrMirror: 1
W Mc1.C1 GsmMccCmdStretch: 3
W Mc1.C1 GsmMccCmdGapRatio: 0
W Mc1.C1 GsmMccCmdTriStateDisTrain: 1
W Mc1.C1 GsmMccEnableOdtMatrix: 3
W Mc1.C1 GsmMctCAL: 1
W Mc1.C1 GsmMctCSCKEH: 7
W Mc1.C1 GsmMctRFCpb: 7
W Mc1.C1 GsmMccLpddrPasrRowMsb: 2
W Mc1.C1 EndOfMccMarker: 2
Address Decoding Config
Channel HASH Auto Enabled - Default to DramType:3
W Mc0 GsmMccHashMode: 2
W Mc0 GsmMccLsbMaskBit: 2096 (0x830)
W Mc0 GsmMccDisableCkTristate: 1
W Mc0 GsmMccStackedMode: 3
W Mc0 GsmMccHalfCachelineMode: 0
W Mc0 GsmMccStackedChHash: 16 (0x10)
W Mc0 GsmMccSChannelSize: 0
W Mc0.C0 GsmMccLDimmDramWidth: 8
W Mc0.C0 GsmMccSDimmSize: 1
W Mc0.C0 GsmMccSDimmDramWidth: 8
W Mc0.C0 GsmMccSDdr58GbDevice: 1
W Mc0.C0 GsmMccLDimmRankCnt: 1
W Mc0.C0 GsmMccSDimmRankCnt: 1
W Mc0.C0 GsmMccRankInterleave: 0
W Mc0.C0 GsmMccEccMode: 1
W Mc0.C0 GsmMccAddrDecodeDdrType: 0
W Mc0.C1 GsmMccLDimmDramWidth: 8
W Mc0.C1 GsmMccSDimmSize: 1
W Mc0.C1 GsmMccSDimmDramWidth: 8
W Mc0.C1 GsmMccSDdr58GbDevice: 1
W Mc0.C1 GsmMccLDimmRankCnt: 1
W Mc0.C1 GsmMccSDimmRankCnt: 1
W Mc0.C1 GsmMccRankInterleave: 0
W Mc0.C1 GsmMccEccMode: 1
W Mc0.C1 GsmMccAddrDecodeDdrType: 0
Channel HASH Auto Enabled - Default to DramType:3
W Mc1 GsmMccHashMode: 2
W Mc1 GsmMccLsbMaskBit: 2096 (0x830)
W Mc1 GsmMccDisableCkTristate: 1
W Mc1 GsmMccStackedMode: 3
W Mc1 GsmMccHalfCachelineMode: 0
W Mc1 GsmMccStackedChHash: 16 (0x10)
W Mc1 GsmMccSChannelSize: 0
W Mc1.C0 GsmMccLDimmDramWidth: 8
W Mc1.C0 GsmMccSDimmSize: 1
W Mc1.C0 GsmMccSDimmDramWidth: 8
W Mc1.C0 GsmMccSDdr58GbDevice: 1
W Mc1.C0 GsmMccLDimmRankCnt: 1
W Mc1.C0 GsmMccSDimmRankCnt: 1
W Mc1.C0 GsmMccRankInterleave: 0
W Mc1.C0 GsmMccEccMode: 1
W Mc1.C0 GsmMccAddrDecodeDdrType: 0
W Mc1.C1 GsmMccLDimmDramWidth: 8
W Mc1.C1 GsmMccSDimmSize: 1
W Mc1.C1 GsmMccSDimmDramWidth: 8
W Mc1.C1 GsmMccSDdr58GbDevice: 1
W Mc1.C1 GsmMccLDimmRankCnt: 1
W Mc1.C1 GsmMccSDimmRankCnt: 1
W Mc1.C1 GsmMccRankInterleave: 0
W Mc1.C1 GsmMccEccMode: 1
W Mc1.C1 GsmMccAddrDecodeDdrType: 0
Maintenance Configuration
W Mc0.C0 GsmMccMcSrx: 15 (0xF)
W Mc0.C1 GsmMccMcSrx: 15 (0xF)
W Mc1.C0 GsmMccMcSrx: 15 (0xF)
W Mc1.C1 GsmMccMcSrx: 15 (0xF)
MCHTrace = 0x0
SCHTrace = 0x0
ECC_EN = 0x0
DDRPL_Activate = 0x0
MCHTrace = 0x0
SCHTrace = 0x0
ECC_EN = 0x0
DDRPL_Activate = 0x0
MRC task MC Config -- SUCCEEDED, Status = 0h.
Post Code: DD12h
MRC task -- DDRIO Config - Post DCC -- Started.
Mc0.C0: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C1: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C2: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0.C3: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc0: ValidChBitMask=0xF
Mc1.C0: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C1: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C2: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1.C3: ValidRankBitMask=0x3, Overall ValidRankMask=0x3
Mc1: ValidChBitMask=0xF
ValidMcBitMask=0x3, Overall ValidChBitMask=0xFF
DdrCrVsshiControl: 0xF28014
Init Dimm Vref CRs
SdramCount: 0x2
Condition didnt meet any of the allowed Sleepcycles values, default SleepCycles = 4
DDRMISCCONTROL2 = 0xFE642130
MiscControl7.Cas2FSWCK = 126
New ODT Mode: Vss Original ODT Mode: Vss
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
Init Data CRs
W Mc0.C0 RoundTripIoComp: 18 (0x12)
W Mc0.C0 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C0 RxDqDataValidQclkDelay: 7
W Mc0.C0 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C0.R0 RxIoTclDelay: 0
W Mc0.C0.R1 RxIoTclDelay: 0
W Mc0.C0.R0 RxFifoRdEnTclDelay: 7
W Mc0.C0.R1 RxFifoRdEnTclDelay: 7
W Mc0.C0.R0 RoundTripDelay: 83 (0x53)
W Mc0.C0.R1 RoundTripDelay: 83 (0x53)
W Mc0.C1 RoundTripIoComp: 18 (0x12)
W Mc0.C1 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C1 RxDqDataValidQclkDelay: 7
W Mc0.C1 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C1.R0 RxIoTclDelay: 0
W Mc0.C1.R1 RxIoTclDelay: 0
W Mc0.C1.R0 RxFifoRdEnTclDelay: 7
W Mc0.C1.R1 RxFifoRdEnTclDelay: 7
W Mc0.C1.R0 RoundTripDelay: 83 (0x53)
W Mc0.C1.R1 RoundTripDelay: 83 (0x53)
W Mc0.C2 RoundTripIoComp: 18 (0x12)
W Mc0.C2 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C2 RxDqDataValidQclkDelay: 7
W Mc0.C2 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C2.R0 RxIoTclDelay: 0
W Mc0.C2.R1 RxIoTclDelay: 0
W Mc0.C2.R0 RxFifoRdEnTclDelay: 7
W Mc0.C2.R1 RxFifoRdEnTclDelay: 7
W Mc0.C2.R0 RoundTripDelay: 83 (0x53)
W Mc0.C2.R1 RoundTripDelay: 83 (0x53)
W Mc0.C3 RoundTripIoComp: 18 (0x12)
W Mc0.C3 RxDqDataValidDclkDelay: 23 (0x17)
W Mc0.C3 RxDqDataValidQclkDelay: 7
W Mc0.C3 TxDqFifoWrEnTcwlDelay: 0
W Mc0.C3.R0 RxIoTclDelay: 0
W Mc0.C3.R1 RxIoTclDelay: 0
W Mc0.C3.R0 RxFifoRdEnTclDelay: 7
W Mc0.C3.R1 RxFifoRdEnTclDelay: 7
W Mc0.C3.R0 RoundTripDelay: 83 (0x53)
W Mc0.C3.R1 RoundTripDelay: 83 (0x53)
W Mc1.C4 RoundTripIoComp: 16 (0x10)
W Mc1.C4 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C4 RxDqDataValidQclkDelay: 7
W Mc1.C4 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C4.R0 RxIoTclDelay: 0
W Mc1.C4.R1 RxIoTclDelay: 0
W Mc1.C4.R0 RxFifoRdEnTclDelay: 7
W Mc1.C4.R1 RxFifoRdEnTclDelay: 7
W Mc1.C0.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C0.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C5 RoundTripIoComp: 16 (0x10)
W Mc1.C5 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C5 RxDqDataValidQclkDelay: 7
W Mc1.C5 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C5.R0 RxIoTclDelay: 0
W Mc1.C5.R1 RxIoTclDelay: 0
W Mc1.C5.R0 RxFifoRdEnTclDelay: 7
W Mc1.C5.R1 RxFifoRdEnTclDelay: 7
W Mc1.C1.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C1.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C6 RoundTripIoComp: 16 (0x10)
W Mc1.C6 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C6 RxDqDataValidQclkDelay: 7
W Mc1.C6 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C6.R0 RxIoTclDelay: 0
W Mc1.C6.R1 RxIoTclDelay: 0
W Mc1.C6.R0 RxFifoRdEnTclDelay: 7
W Mc1.C6.R1 RxFifoRdEnTclDelay: 7
W Mc1.C2.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C2.R1 RoundTripDelay: 75 (0x4B)
W Mc1.C7 RoundTripIoComp: 16 (0x10)
W Mc1.C7 RxDqDataValidDclkDelay: 19 (0x13)
W Mc1.C7 RxDqDataValidQclkDelay: 7
W Mc1.C7 TxDqFifoWrEnTcwlDelay: 0
W Mc1.C7.R0 RxIoTclDelay: 0
W Mc1.C7.R1 RxIoTclDelay: 0
W Mc1.C7.R0 RxFifoRdEnTclDelay: 7
W Mc1.C7.R1 RxFifoRdEnTclDelay: 7
W Mc1.C3.R0 RoundTripDelay: 75 (0x4B)
W Mc1.C3.R1 RoundTripDelay: 75 (0x4B)
Mc0 C0 Dec_tCWL: 2
W Mc0.C0 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C0 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C0 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C0 GsmIocInternalClocksOn: 0
W Mc0.C0 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C0 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C0.R0 TxDqsTcoPFallNRise: 0
W Mc0.C0.R1 TxDqsTcoPFallNRise: 0
Mc0 C1 Dec_tCWL: 2
W Mc0.C1 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C1 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C1 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C1 GsmIocInternalClocksOn: 0
W Mc0.C1 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C1 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C1.R0 TxDqsTcoPFallNRise: 0
W Mc0.C1.R1 TxDqsTcoPFallNRise: 0
Mc0 C2 Dec_tCWL: 2
W Mc0.C2 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C2 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C2 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C2 GsmIocInternalClocksOn: 0
W Mc0.C2 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C2 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C2.R0 TxDqsTcoPFallNRise: 0
W Mc0.C2.R1 TxDqsTcoPFallNRise: 0
Mc0 C3 Dec_tCWL: 2
W Mc0.C3 TxDqFifoRdEnTcwlDelay: 19 (0x13)
W Mc0.C3 TxDqFifoRdEnFlybyDelay: 16 (0x10)
W Mc0.C3 GsmIocCmdAnlgEnGraceCnt: 0
W Mc0.C3 GsmIocInternalClocksOn: 0
W Mc0.C3 GsmIocTxAnlgEnGraceCnt: 7
W Mc0.C3 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc0.C3.R0 TxDqsTcoPFallNRise: 0
W Mc0.C3.R1 TxDqsTcoPFallNRise: 0
Mc1 C0 Dec_tCWL: 4
W Mc1.C4 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C4 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C4 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C4 GsmIocInternalClocksOn: 0
W Mc1.C4 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C4 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C4.R0 TxDqsTcoPFallNRise: 0
W Mc1.C4.R1 TxDqsTcoPFallNRise: 0
Mc1 C1 Dec_tCWL: 4
W Mc1.C5 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C5 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C5 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C5 GsmIocInternalClocksOn: 0
W Mc1.C5 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C5 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C5.R0 TxDqsTcoPFallNRise: 0
W Mc1.C5.R1 TxDqsTcoPFallNRise: 0
Mc1 C2 Dec_tCWL: 4
W Mc1.C6 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C6 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C6 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C6 GsmIocInternalClocksOn: 0
W Mc1.C6 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C6 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C6.R0 TxDqsTcoPFallNRise: 0
W Mc1.C6.R1 TxDqsTcoPFallNRise: 0
Mc1 C3 Dec_tCWL: 4
W Mc1.C7 TxDqFifoRdEnTcwlDelay: 17 (0x11)
W Mc1.C7 TxDqFifoRdEnFlybyDelay: 14 (0xE)
W Mc1.C7 GsmIocCmdAnlgEnGraceCnt: 0
W Mc1.C7 GsmIocInternalClocksOn: 0
W Mc1.C7 GsmIocTxAnlgEnGraceCnt: 7
W Mc1.C7 GsmIocTxDqFifoRdEnPerRankDelDis: 127 (0x7F)
W Mc1.C7.R0 TxDqsTcoPFallNRise: 0
W Mc1.C7.R1 TxDqsTcoPFallNRise: 0
W Mc0.C0.R0.S0 RxTap1: 10 (0xA)
W Mc0.C0.R0.S1 RxTap1: 10 (0xA)
W Mc0.C0.R1.S0 RxTap1: 10 (0xA)
W Mc0.C0.R1.S1 RxTap1: 10 (0xA)
W Mc0.C0.R0.S0 RloadDqsDn: 5
W Mc0.C0.R0.S1 RloadDqsDn: 5
W Mc0.C0.R1.S0 RloadDqsDn: 5
W Mc0.C0.R1.S1 RloadDqsDn: 5
W Mc0.C0.R0.S0 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S1 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S0 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S1 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S0 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S1 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S0 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S1 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S0 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1.S0 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R1.S1 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R0.S0.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S1.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S0.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S1.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S0.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S0.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S1 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S0 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S1 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S0.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S0.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S1.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S0.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S1.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S0 RxVocUnmatched: 8
W Mc0.C0.R0.S1 RxVocUnmatched: 8
W Mc0.C0.R1.S0 RxVocUnmatched: 8
W Mc0.C0.R1.S1 RxVocUnmatched: 8
W Mc0.C0.R0.S0 TxEq: 10 (0xA)
W Mc0.C0.R0.S1 TxEq: 10 (0xA)
W Mc0.C0.R1.S0 TxEq: 10 (0xA)
W Mc0.C0.R1.S1 TxEq: 10 (0xA)
W Mc0.C0.R0.S0 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S0 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S1 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S1 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S0 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S0 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S1 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S1 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S0 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S0 RxRankMuxDelay: 0
W Mc0.C0.R0.S1 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S1 RxRankMuxDelay: 0
W Mc0.C0.R1.S0 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S0 RxRankMuxDelay: 0
W Mc0.C0.R1.S1 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S1 RxRankMuxDelay: 0
W Mc0.C0.R0.S2 RxTap1: 10 (0xA)
W Mc0.C0.R0.S3 RxTap1: 10 (0xA)
W Mc0.C0.R1.S2 RxTap1: 10 (0xA)
W Mc0.C0.R1.S3 RxTap1: 10 (0xA)
W Mc0.C0.R0.S2 RloadDqsDn: 5
W Mc0.C0.R0.S3 RloadDqsDn: 5
W Mc0.C0.R1.S2 RloadDqsDn: 5
W Mc0.C0.R1.S3 RloadDqsDn: 5
W Mc0.C0.R0.S2 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S3 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S2 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S3 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S2 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S3 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S2 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S3 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S2 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R1.S2 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R1.S3 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R0.S2.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S3.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S2.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S3.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S2.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S3 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S2 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S3 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S2.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S2.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S3.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S2.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S3.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S2 RxVocUnmatched: 8
W Mc0.C0.R0.S3 RxVocUnmatched: 8
W Mc0.C0.R1.S2 RxVocUnmatched: 8
W Mc0.C0.R1.S3 RxVocUnmatched: 8
W Mc0.C0.R0.S2 TxEq: 10 (0xA)
W Mc0.C0.R0.S3 TxEq: 10 (0xA)
W Mc0.C0.R1.S2 TxEq: 10 (0xA)
W Mc0.C0.R1.S3 TxEq: 10 (0xA)
W Mc0.C0.R0.S2 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S2 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S3 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S3 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S2 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S2 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S3 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S3 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S2 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S2 RxRankMuxDelay: 0
W Mc0.C0.R0.S3 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S3 RxRankMuxDelay: 0
W Mc0.C0.R1.S2 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S2 RxRankMuxDelay: 0
W Mc0.C0.R1.S3 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S3 RxRankMuxDelay: 0
W Mc0.C0.R0.S4 RxTap1: 10 (0xA)
W Mc0.C0.R0.S5 RxTap1: 10 (0xA)
W Mc0.C0.R1.S4 RxTap1: 10 (0xA)
W Mc0.C0.R1.S5 RxTap1: 10 (0xA)
W Mc0.C0.R0.S4 RloadDqsDn: 5
W Mc0.C0.R0.S5 RloadDqsDn: 5
W Mc0.C0.R1.S4 RloadDqsDn: 5
W Mc0.C0.R1.S5 RloadDqsDn: 5
W Mc0.C0.R0.S4 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S5 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S4 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S5 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S4 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S5 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S4 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S5 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S4 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R1.S4 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R1.S5 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R0.S4.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S5.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S4.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S5.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S5 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S4 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S5 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S4.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S4.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S5.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S4.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S5.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S4 RxVocUnmatched: 8
W Mc0.C0.R0.S5 RxVocUnmatched: 8
W Mc0.C0.R1.S4 RxVocUnmatched: 8
W Mc0.C0.R1.S5 RxVocUnmatched: 8
W Mc0.C0.R0.S4 TxEq: 10 (0xA)
W Mc0.C0.R0.S5 TxEq: 10 (0xA)
W Mc0.C0.R1.S4 TxEq: 10 (0xA)
W Mc0.C0.R1.S5 TxEq: 10 (0xA)
W Mc0.C0.R0.S4 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S4 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S5 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S5 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S4 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S4 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S5 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S5 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S4 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S4 RxRankMuxDelay: 0
W Mc0.C0.R0.S5 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S5 RxRankMuxDelay: 0
W Mc0.C0.R1.S4 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S4 RxRankMuxDelay: 0
W Mc0.C0.R1.S5 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S5 RxRankMuxDelay: 0
W Mc0.C0.R0.S6 RxTap1: 10 (0xA)
W Mc0.C0.R0.S7 RxTap1: 10 (0xA)
W Mc0.C0.R1.S6 RxTap1: 10 (0xA)
W Mc0.C0.R1.S7 RxTap1: 10 (0xA)
W Mc0.C0.R0.S6 RloadDqsDn: 5
W Mc0.C0.R0.S7 RloadDqsDn: 5
W Mc0.C0.R1.S6 RloadDqsDn: 5
W Mc0.C0.R1.S7 RloadDqsDn: 5
W Mc0.C0.R0.S6 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S7 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S6 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R1.S7 RxDqsNDelay: 32 (0x20)
W Mc0.C0.R0.S6 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S7 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S6 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R1.S7 RxDqsPDelay: 32 (0x20)
W Mc0.C0.R0.S6 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C0.R1.S6 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R1.S7 RecEnDelay: 320 (0x140)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C0.R0.S6.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B0 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B1 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B2 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B3 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B4 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B5 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B6 RxDqsBitDelay: 4
W Mc0.C0.R0.S7.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S6.B7 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B0 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B1 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B2 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B3 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B4 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B5 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B6 RxDqsBitDelay: 4
W Mc0.C0.R1.S7.B7 RxDqsBitDelay: 4
W Mc0.C0.R0.S6.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B4 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B5 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B6 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B7 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B4 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B5 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B6 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B7 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S6 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S7 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S6 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R1.S7 RxDqsAmpOffset: 15 (0xF)
W Mc0.C0.R0.S6.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S6.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B0 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B1 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B2 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B3 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B4 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B5 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B6 TxDqBitDelay: 8
W Mc0.C0.R0.S7.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S6.B7 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B0 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B1 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B2 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B3 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B4 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B5 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B6 TxDqBitDelay: 8
W Mc0.C0.R1.S7.B7 TxDqBitDelay: 8
W Mc0.C0.R0.S6 RxVocUnmatched: 8
W Mc0.C0.R0.S7 RxVocUnmatched: 8
W Mc0.C0.R1.S6 RxVocUnmatched: 8
W Mc0.C0.R1.S7 RxVocUnmatched: 8
W Mc0.C0.R0.S6 TxEq: 10 (0xA)
W Mc0.C0.R0.S7 TxEq: 10 (0xA)
W Mc0.C0.R1.S6 TxEq: 10 (0xA)
W Mc0.C0.R1.S7 TxEq: 10 (0xA)
W Mc0.C0.R0.S6 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S6 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S7 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S7 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S6 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S6 TxDqsRankMuxDelay: 0
W Mc0.C0.R1.S7 TxDqDelay: 96 (0x60)
W Mc0.C0.R0.S7 TxDqsRankMuxDelay: 0
W Mc0.C0.R0.S6 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S6 RxRankMuxDelay: 0
W Mc0.C0.R0.S7 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S7 RxRankMuxDelay: 0
W Mc0.C0.R1.S6 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S6 RxRankMuxDelay: 0
W Mc0.C0.R1.S7 TxDqsDelay: 64 (0x40)
W Mc0.C0.R0.S7 RxRankMuxDelay: 0
W Mc1.C1.R0.S0 RxTap1: 10 (0xA)
W Mc1.C1.R0.S1 RxTap1: 10 (0xA)
W Mc1.C1.R1.S0 RxTap1: 10 (0xA)
W Mc1.C1.R1.S1 RxTap1: 10 (0xA)
W Mc1.C1.R0.S0 RloadDqsDn: 5
W Mc1.C1.R0.S1 RloadDqsDn: 5
W Mc1.C1.R1.S0 RloadDqsDn: 5
W Mc1.C1.R1.S1 RloadDqsDn: 5
W Mc1.C1.R0.S0 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S1 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S0 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S1 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S0 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S1 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S0 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S1 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S0 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R1.S0 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R1.S1 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R0.S0.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S1.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S0.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S1.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S0.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S1.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S1 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S0 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S1 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S0.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S0.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S1.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S0.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S1.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S0 RxVocUnmatched: 8
W Mc1.C1.R0.S1 RxVocUnmatched: 8
W Mc1.C1.R1.S0 RxVocUnmatched: 8
W Mc1.C1.R1.S1 RxVocUnmatched: 8
W Mc1.C1.R0.S0 TxEq: 10 (0xA)
W Mc1.C1.R0.S1 TxEq: 10 (0xA)
W Mc1.C1.R1.S0 TxEq: 10 (0xA)
W Mc1.C1.R1.S1 TxEq: 10 (0xA)
W Mc1.C1.R0.S0 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S0 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S1 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S1 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S0 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S0 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S1 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S1 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S0 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S0 RxRankMuxDelay: 0
W Mc1.C1.R0.S1 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S1 RxRankMuxDelay: 0
W Mc1.C1.R1.S0 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S0 RxRankMuxDelay: 0
W Mc1.C1.R1.S1 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S1 RxRankMuxDelay: 0
W Mc1.C1.R0.S2 RxTap1: 10 (0xA)
W Mc1.C1.R0.S3 RxTap1: 10 (0xA)
W Mc1.C1.R1.S2 RxTap1: 10 (0xA)
W Mc1.C1.R1.S3 RxTap1: 10 (0xA)
W Mc1.C1.R0.S2 RloadDqsDn: 5
W Mc1.C1.R0.S3 RloadDqsDn: 5
W Mc1.C1.R1.S2 RloadDqsDn: 5
W Mc1.C1.R1.S3 RloadDqsDn: 5
W Mc1.C1.R0.S2 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S3 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S2 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S3 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S2 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S3 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S2 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S3 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S2 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R1.S2 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R1.S3 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R0.S2.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S3.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S2.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S3.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S2.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S3 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S2 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S3 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S2.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S2.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S3.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S2.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S3.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S2 RxVocUnmatched: 8
W Mc1.C1.R0.S3 RxVocUnmatched: 8
W Mc1.C1.R1.S2 RxVocUnmatched: 8
W Mc1.C1.R1.S3 RxVocUnmatched: 8
W Mc1.C1.R0.S2 TxEq: 10 (0xA)
W Mc1.C1.R0.S3 TxEq: 10 (0xA)
W Mc1.C1.R1.S2 TxEq: 10 (0xA)
W Mc1.C1.R1.S3 TxEq: 10 (0xA)
W Mc1.C1.R0.S2 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S2 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S3 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S3 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S2 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S2 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S3 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S3 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S2 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S2 RxRankMuxDelay: 0
W Mc1.C1.R0.S3 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S3 RxRankMuxDelay: 0
W Mc1.C1.R1.S2 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S2 RxRankMuxDelay: 0
W Mc1.C1.R1.S3 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S3 RxRankMuxDelay: 0
W Mc1.C1.R0.S4 RxTap1: 10 (0xA)
W Mc1.C1.R0.S5 RxTap1: 10 (0xA)
W Mc1.C1.R1.S4 RxTap1: 10 (0xA)
W Mc1.C1.R1.S5 RxTap1: 10 (0xA)
W Mc1.C1.R0.S4 RloadDqsDn: 5
W Mc1.C1.R0.S5 RloadDqsDn: 5
W Mc1.C1.R1.S4 RloadDqsDn: 5
W Mc1.C1.R1.S5 RloadDqsDn: 5
W Mc1.C1.R0.S4 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S5 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S4 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S5 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S4 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S5 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S4 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S5 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S4 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R1.S4 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R1.S5 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R0.S4.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S5.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S4.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S5.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S4.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S5.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S5.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S5 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S4 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S5 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S4.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S4.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S5.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S4.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S5.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S4 RxVocUnmatched: 8
W Mc1.C1.R0.S5 RxVocUnmatched: 8
W Mc1.C1.R1.S4 RxVocUnmatched: 8
W Mc1.C1.R1.S5 RxVocUnmatched: 8
W Mc1.C1.R0.S4 TxEq: 10 (0xA)
W Mc1.C1.R0.S5 TxEq: 10 (0xA)
W Mc1.C1.R1.S4 TxEq: 10 (0xA)
W Mc1.C1.R1.S5 TxEq: 10 (0xA)
W Mc1.C1.R0.S4 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S4 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S5 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S5 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S4 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S4 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S5 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S5 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S4 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S4 RxRankMuxDelay: 0
W Mc1.C1.R0.S5 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S5 RxRankMuxDelay: 0
W Mc1.C1.R1.S4 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S4 RxRankMuxDelay: 0
W Mc1.C1.R1.S5 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S5 RxRankMuxDelay: 0
W Mc1.C1.R0.S6 RxTap1: 10 (0xA)
W Mc1.C1.R0.S7 RxTap1: 10 (0xA)
W Mc1.C1.R1.S6 RxTap1: 10 (0xA)
W Mc1.C1.R1.S7 RxTap1: 10 (0xA)
W Mc1.C1.R0.S6 RloadDqsDn: 5
W Mc1.C1.R0.S7 RloadDqsDn: 5
W Mc1.C1.R1.S6 RloadDqsDn: 5
W Mc1.C1.R1.S7 RloadDqsDn: 5
W Mc1.C1.R0.S6 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S7 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S6 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R1.S7 RxDqsNDelay: 32 (0x20)
W Mc1.C1.R0.S6 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S7 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S6 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R1.S7 RxDqsPDelay: 32 (0x20)
W Mc1.C1.R0.S6 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R1.S6 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R1.S7 RecEnDelay: 320 (0x140)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R0.S6.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B0 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B1 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B2 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B3 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B4 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B5 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B6 RxDqsBitDelay: 4
W Mc1.C1.R0.S7.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S6.B7 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B0 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B1 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B2 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B3 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B4 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B5 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B6 RxDqsBitDelay: 4
W Mc1.C1.R1.S7.B7 RxDqsBitDelay: 4
W Mc1.C1.R0.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B1 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B6 RxVoc: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B7 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B1 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B4 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxVoc: 16 (0x10)
W Mc1.C1.R1.S7.B7 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S7 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S6 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R1.S7 RxDqsAmpOffset: 15 (0xF)
W Mc1.C1.R0.S6.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S6.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B0 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B1 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B2 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B3 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B4 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B5 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B6 TxDqBitDelay: 8
W Mc1.C1.R0.S7.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S6.B7 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B0 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B1 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B2 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B3 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B4 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B5 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B6 TxDqBitDelay: 8
W Mc1.C1.R1.S7.B7 TxDqBitDelay: 8
W Mc1.C1.R0.S6 RxVocUnmatched: 8
W Mc1.C1.R0.S7 RxVocUnmatched: 8
W Mc1.C1.R1.S6 RxVocUnmatched: 8
W Mc1.C1.R1.S7 RxVocUnmatched: 8
W Mc1.C1.R0.S6 TxEq: 10 (0xA)
W Mc1.C1.R0.S7 TxEq: 10 (0xA)
W Mc1.C1.R1.S6 TxEq: 10 (0xA)
W Mc1.C1.R1.S7 TxEq: 10 (0xA)
W Mc1.C1.R0.S6 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S6 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S7 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S7 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S6 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S6 TxDqsRankMuxDelay: 0
W Mc1.C1.R1.S7 TxDqDelay: 96 (0x60)
W Mc1.C1.R0.S7 TxDqsRankMuxDelay: 0
W Mc1.C1.R0.S6 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S6 RxRankMuxDelay: 0
W Mc1.C1.R0.S7 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S7 RxRankMuxDelay: 0
W Mc1.C1.R1.S6 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S6 RxRankMuxDelay: 0
W Mc1.C1.R1.S7 TxDqsDelay: 64 (0x40)
W Mc1.C1.R0.S7 RxRankMuxDelay: 0
W GsmIocStrobeOdtStaticDis: 0
W Mc0.C0.S0 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S1 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S2 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S3 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S4 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S5 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S6 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S7 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S0 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S1 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S2 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S3 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S4 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S5 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S6 GsmIocCompOdtStaticDis: 0
W Mc1.C1.S7 GsmIocCompOdtStaticDis: 0
W Mc0.C0.S0 GsmIocDataOdtMode: 1
W Mc0.C0.S1 GsmIocDataOdtMode: 1
W Mc0.C0.S0 McOdtDelay: 0
W Mc0.C0.S1 McOdtDelay: 0
W Mc0.C0.S2 McOdtDelay: 0
W Mc0.C0.S3 McOdtDelay: 0
W Mc0.C0.S4 McOdtDelay: 0
W Mc0.C0.S5 McOdtDelay: 0
W Mc0.C0.S6 McOdtDelay: 0
W Mc0.C0.S7 McOdtDelay: 0
W Mc1.C1.S0 McOdtDelay: 0
W Mc1.C1.S1 McOdtDelay: 0
W Mc1.C1.S2 McOdtDelay: 0
W Mc1.C1.S3 McOdtDelay: 0
W Mc1.C1.S4 McOdtDelay: 0
W Mc1.C1.S5 McOdtDelay: 0
W Mc1.C1.S6 McOdtDelay: 0
W Mc1.C1.S7 McOdtDelay: 0
W Mc0.C0.S0 SenseAmpDelay: 0
W Mc0.C0.S1 SenseAmpDelay: 0
W Mc0.C0.S2 SenseAmpDelay: 0
W Mc0.C0.S3 SenseAmpDelay: 0
W Mc0.C0.S4 SenseAmpDelay: 0
W Mc0.C0.S5 SenseAmpDelay: 0
W Mc0.C0.S6 SenseAmpDelay: 0
W Mc0.C0.S7 SenseAmpDelay: 0
W Mc1.C1.S0 SenseAmpDelay: 0
W Mc1.C1.S1 SenseAmpDelay: 0
W Mc1.C1.S2 SenseAmpDelay: 0
W Mc1.C1.S3 SenseAmpDelay: 0
W Mc1.C1.S4 SenseAmpDelay: 0
W Mc1.C1.S5 SenseAmpDelay: 0
W Mc1.C1.S6 SenseAmpDelay: 0
W Mc1.C1.S7 SenseAmpDelay: 0
W Mc0.C0.S0 DqsOdtDelay: 0
W Mc0.C0.S1 DqsOdtDelay: 0
W Mc0.C0.S2 DqsOdtDelay: 0
W Mc0.C0.S3 DqsOdtDelay: 0
W Mc0.C0.S4 DqsOdtDelay: 0
W Mc0.C0.S5 DqsOdtDelay: 0
W Mc0.C0.S6 DqsOdtDelay: 0
W Mc0.C0.S7 DqsOdtDelay: 0
W Mc1.C1.S0 DqsOdtDelay: 0
W Mc1.C1.S1 DqsOdtDelay: 0
W Mc1.C1.S2 DqsOdtDelay: 0
W Mc1.C1.S3 DqsOdtDelay: 0
W Mc1.C1.S4 DqsOdtDelay: 0
W Mc1.C1.S5 DqsOdtDelay: 0
W Mc1.C1.S6 DqsOdtDelay: 0
W Mc1.C1.S7 DqsOdtDelay: 0
W Mc0.C0.S0 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S1 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S2 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S3 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S4 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S5 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S6 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S7 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S0 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S1 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S2 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S3 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S4 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S5 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S6 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S7 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S0 McOdtDuration: 15 (0xF)
W Mc0.C0.S1 McOdtDuration: 15 (0xF)
W Mc0.C0.S2 McOdtDuration: 15 (0xF)
W Mc0.C0.S3 McOdtDuration: 15 (0xF)
W Mc0.C0.S4 McOdtDuration: 15 (0xF)
W Mc0.C0.S5 McOdtDuration: 15 (0xF)
W Mc0.C0.S6 McOdtDuration: 15 (0xF)
W Mc0.C0.S7 McOdtDuration: 15 (0xF)
W Mc1.C1.S0 McOdtDuration: 15 (0xF)
W Mc1.C1.S1 McOdtDuration: 15 (0xF)
W Mc1.C1.S2 McOdtDuration: 15 (0xF)
W Mc1.C1.S3 McOdtDuration: 15 (0xF)
W Mc1.C1.S4 McOdtDuration: 15 (0xF)
W Mc1.C1.S5 McOdtDuration: 15 (0xF)
W Mc1.C1.S6 McOdtDuration: 15 (0xF)
W Mc1.C1.S7 McOdtDuration: 15 (0xF)
W Mc0.C0.S0 DqsOdtDuration: 7
W Mc0.C0.S1 DqsOdtDuration: 7
W Mc0.C0.S2 DqsOdtDuration: 7
W Mc0.C0.S3 DqsOdtDuration: 7
W Mc0.C0.S4 DqsOdtDuration: 7
W Mc0.C0.S5 DqsOdtDuration: 7
W Mc0.C0.S6 DqsOdtDuration: 7
W Mc0.C0.S7 DqsOdtDuration: 7
W Mc1.C1.S0 DqsOdtDuration: 7
W Mc1.C1.S1 DqsOdtDuration: 7
W Mc1.C1.S2 DqsOdtDuration: 7
W Mc1.C1.S3 DqsOdtDuration: 7
W Mc1.C1.S4 DqsOdtDuration: 7
W Mc1.C1.S5 DqsOdtDuration: 7
W Mc1.C1.S6 DqsOdtDuration: 7
W Mc1.C1.S7 DqsOdtDuration: 7
W Mc0.C0.S0 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S1 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S2 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S3 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S4 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S5 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S6 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S7 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S0 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S1 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S2 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S3 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S4 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S5 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S6 GsmIocEnDqsNRcvEn: 3
W Mc1.C1.S7 GsmIocEnDqsNRcvEn: 3
W Mc0.C0.S0 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S1 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S2 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S3 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S4 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S5 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S6 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S7 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S0 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S1 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S2 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S3 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S4 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S5 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S6 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc1.C1.S7 GsmIocDataRxBurstLen: 63 (0x3F)
W Mc0.C0.S0 GsmIocDisableQuickComp: 1
W Mc0.C0.S1 GsmIocDisableQuickComp: 1
W Mc0.C0.S2 GsmIocDisableQuickComp: 1
W Mc0.C0.S3 GsmIocDisableQuickComp: 1
W Mc0.C0.S4 GsmIocDisableQuickComp: 1
W Mc0.C0.S5 GsmIocDisableQuickComp: 1
W Mc0.C0.S6 GsmIocDisableQuickComp: 1
W Mc0.C0.S7 GsmIocDisableQuickComp: 1
W Mc1.C1.S0 GsmIocDisableQuickComp: 1
W Mc1.C1.S1 GsmIocDisableQuickComp: 1
W Mc1.C1.S2 GsmIocDisableQuickComp: 1
W Mc1.C1.S3 GsmIocDisableQuickComp: 1
W Mc1.C1.S4 GsmIocDisableQuickComp: 1
W Mc1.C1.S5 GsmIocDisableQuickComp: 1
W Mc1.C1.S6 GsmIocDisableQuickComp: 1
W Mc1.C1.S7 GsmIocDisableQuickComp: 1
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 120, DriverPullDown = 40, ReceiverOdt = 80, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
Init Dimm Vref CRs
DdrCrVrefControl: 0x240C1E
W Mc0.C0.S0 CmdGrpPi: 128 (0x80)
W Mc0.C0.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C0.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C0.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C0.S0 CkeGrpPi: 128 (0x80)
W Mc0.C1.S0 CmdGrpPi: 128 (0x80)
W Mc0.C1.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C1.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C1.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C1.S0 CkeGrpPi: 128 (0x80)
W Mc0.C2.S0 CmdGrpPi: 128 (0x80)
W Mc0.C2.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C2.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C2.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C2.S0 CkeGrpPi: 128 (0x80)
W Mc0.C3.S0 CmdGrpPi: 128 (0x80)
W Mc0.C3.R0.S0 CtlGrpPi: 128 (0x80)
W Mc0.C3.R1.S0 CtlGrpPi: 128 (0x80)
W Mc0.C3.S0 ClkGrpPi: 192 (0xC0)
W Mc0.C3.S0 CkeGrpPi: 128 (0x80)
W Mc1.C4.S0 CmdGrpPi: 128 (0x80)
W Mc1.C4.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C4.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C4.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C4.S0 CkeGrpPi: 128 (0x80)
W Mc1.C5.S0 CmdGrpPi: 128 (0x80)
W Mc1.C5.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C5.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C5.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C5.S0 CkeGrpPi: 128 (0x80)
W Mc1.C6.S0 CmdGrpPi: 128 (0x80)
W Mc1.C6.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C6.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C6.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C6.S0 CkeGrpPi: 128 (0x80)
W Mc1.C7.S0 CmdGrpPi: 128 (0x80)
W Mc1.C7.R0.S0 CtlGrpPi: 128 (0x80)
W Mc1.C7.R1.S0 CtlGrpPi: 128 (0x80)
W Mc1.C7.S0 ClkGrpPi: 192 (0xC0)
W Mc1.C7.S0 CkeGrpPi: 128 (0x80)
MrcSetupVtt: RodtCpu=80 ohm, RonDimm=34 ohm
Itarget=10 uA,
IcompDn=23 uA, IcompUp=1 uA
Init MISC CRs
PCU_CR_DDR_VOLTAGE = 0x06
Init COMP CRs
WrDSClk: Target (Up/Down) value: 30/ 30 ReferenceR (Up/Down): 33/ 30 VrefOffset (Up/Down): 100/ 96 Current Comp code (Up/Down): 11/ 13
WrDSCtl: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 33/ 40 VrefOffset (Up/Down): 86/ 96 Current Comp code (Up/Down): 5/ 6
WrDSCmd: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 33/ 40 VrefOffset (Up/Down): 86/ 96 Current Comp code (Up/Down): 5/ 5
RloadVref: 13 set equal to CmdDrvVrefUp (WrDSCmd)
WrDS: Target (Up/Down) value: 40/ 40 ReferenceR (Up/Down): 50/ 40 VrefOffset (Up/Down): 106/ 96 Current Comp code (Up/Down): 15/ 22
RdOdt: Target (Up/Down) value: 80/ 40 ReferenceR (Up/Down): 100/ 80 VrefOffset (Up/Down): 106/127 Current Comp code (Up/Down): 8/ 8
Vdd2Mv = 1100mV, VccIo - 375 = 575mV, TargetV = 148mV, PanicV = 25mV, DDRVSSHIAFEA_CR_DDRCRVSSHISAMPLER = 0x10FC0494
VsshiTargetCompOfst = 0x0, PanicHiCompOfst = 0x3F, PanicLoCompOfst = 0x3F
START_VssHi_Regulator_Offset_Correction
DDRVSSHIAFEA_CR_DDRCRVSSHISAMPLER = 0x10FC0494
VssHiTargetUsePmos = 0x1
PanicHiUsePmos = 0x1
PanicLoUsePmos = 0x1
STOP_VssHi_Regulator_Offset_Correction
final panicvttup0 = 0x2D
final panicvttup1 = 0x2D
final panicvttdn0 = 0x21
final panicvttdn1 = 0x21
W GsmIocDataDqDccLaneStatusResult: 0
MRC task DDRIO Config - Post DCC -- SUCCEEDED, Status = 0h. Stack Depth: 151104
Post Code: DD6Bh
MRC task -- Memory Subsystem FUSA Configuration -- Started.
Disable CMI Parity
CmiParity PARITY_EN: 1
CmiParity ADDR_PARITY_CHK_MASK: 255
Disable MC0 Parity
Mc0Parity PARITY_EN: 1
Mc0Parity RDATA_PARITY_EN: 1
Mc0Parity WDATA_PARITY_EN: 0
Mc0Parity WBE_PARITY_EN: 0
Mc0Parity ADDR_PARITY_EN: 1
Disable MC1 Parity
Mc1Parity PARITY_EN: 1
Mc1Parity RDATA_PARITY_EN: 1
Mc1Parity WDATA_PARITY_EN: 0
Mc1Parity WBE_PARITY_EN: 0
Mc1Parity ADDR_PARITY_EN: 1
CmiParity PARITY_EN: 1
Mc0Parity PARITY_EN: 1
Ibecc0Parity PARITY_EN: 1
Mc1Parity PARITY_EN: 1
Ibecc1Parity PARITY_EN: 1
MRC task Memory Subsystem FUSA Configuration -- SUCCEEDED, Status = 0h.
Post Code: DD7Bh
MRC task -- MRC Check-The-Checker -- Started.
MRC task MRC Check-The-Checker -- SUCCEEDED, Status = 0h.
Post Code: DD0Ah
MRC task -- FLL Init -- Started.
MRC task FLL Init -- SUCCEEDED, Status = 0h.
Post Code: DD14h
MRC task -- DDR COMP Calc - PreTraining -- Started.
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
R SCompCodeCtl: 15 (0xF)
W GsmIocNoDqInterleave: 1
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
START_NUI_values
RcompData1.Bits.RxDqsDelayP = 58
RcompData1.Bits.RxDqsDelayN = 61
RcompData1.Bits.DqsPTargetNUI = 1
RcompData1.Bits.DqsPOffsetNUI = 0
RcompData0.Bits.DqsNTargetNUI = 1
RcompData0.Bits.DqsNOffsetNUI = 0
STOP_NUI_values
MRC task DDR COMP Calc - PreTraining -- SUCCEEDED, Status = 0h.
Post Code: DD13h
MRC task -- DDR SCOMP Config -- Started.
Bypass SCompDq
Bypass SCompCmd
Bypass SCompCtl
Bypass SCompClk
MRC task DDR SCOMP Config -- SUCCEEDED, Status = 0h.
Post Code: DD24h
MRC task -- MC MEMORY MAP -- Started.
PrmrrSize adjusted to = 0 MB
TOM (Total physical memory size) = 32768 MB
GGC value = FEC0h
Unaligned TSEG base = 7B4h
Unaligned GTT base = 7BCh
Unaligned BDSM base = 7C4h
Unaligned TOLUD base = 800h
TSEG base = 7B0h
GTT base = 7B8h
BDSM base = 7C0h
TOLUD base = 7FCh
Reclaim Enable
Remap Base 8000h
Remap Limit 8803h
TOUUD Base 8804h
ME stolen base 770h
ME stolen size 40h
TotalMemorySize = 8000
ToludBase = 7FC
TouudBase = 8804
TsegBase = 7B0
BdsmBase = 7C0
BgsmBase = 7B8
GraphicsControlRegister = FEC0
SetIaGtImrExclusion Enter
SetIaGtImrExclusion End
Set Gfx Memory Map
GMSSize: 60MB
GMSBase read from R_SA_BDSM: 0x7C000000
Rc6CtxBaseLow: 0x7FBF7000
DoorbellCtxBaseLow: 0x7FBFF000
RC6 Context Base: 0x7FBF7001
RC6 Context Base Programming done
MRC task MC MEMORY MAP -- SUCCEEDED, Status = 0h.
Post Code: DD27h
MRC task -- Pre-Training -- Started.
CPGC Mode locked
MRC task Pre-Training -- SUCCEEDED, Status = 0h.
Post Code: DD5Eh
MRC task -- Reset Recovery -- Started.
Issue ZQ CAL on all channels / ranks
Issues 5 write transactions!Reset de-asserted correctly in iter 0!MRC task Reset Recovery -- SUCCEEDED, Status = 0h.
Post Code: DD1Fh
MRC task -- DDR Offset Correction - PreTraining -- Started.
VccDll Bypass!
VssHi FF Offset
W Mc0.C0.S0 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S1 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S2 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S3 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S4 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S5 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S6 GsmIocDqsMaskPulseCnt: 1
W Mc0.C0.S7 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S0 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S1 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S2 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S3 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S4 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S5 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S6 GsmIocDqsMaskPulseCnt: 1
W Mc1.C1.S7 GsmIocDqsMaskPulseCnt: 1
Issue ZQ CAL on all channels / ranks
Issue ZQ CAL on all channels / ranks
START_PreTrain_Offset_Correction_VssHi_FF
STOP_PreTrain_Offset_Correction_VssHi_FF
MRC task DDR Offset Correction - PreTraining -- SUCCEEDED, Status = 0h.
Post Code: DD26h
MRC task -- JEDEC RESET -- Started.
Attempting value = 0xB9B80008 - Pll busy wait - done
Requested/actual ratio 8/8, Frequency=1067, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=1874999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MC0C0 DqOdt = 48 , CaOdt = 60
DriverPullUp = 40, DriverPullDown = 0, ReceiverOdt = 48, Vdd = 1100, Vterm = 0
VrefType = WrV, Vref = 300
DriverPullUp = 40, DriverPullDown = 0, ReceiverOdt = 60, Vdd = 1100, Vterm = 0
VrefType = CmdV, Vref = 330
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 0 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 0 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 1 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 1 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 2 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 2 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 0 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 0 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 0 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 0 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 0 ch 3 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 0 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 0 ch 3 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 0 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 0 ch 3 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 0 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 0 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 0 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 0 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 0 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 0 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 0 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 0 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 0 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 0 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 1 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 1 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 1 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 1 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 1 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 1 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 1 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 1 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 1 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 1 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 2 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 2 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 2 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 2 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 2 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 2 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 2 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 2 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 2 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 2 rank 1: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 0: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 0: MR22, Opcode=0x13
MrcIssueMrw on mc 1 ch 3 rank 0: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 0: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 3 rank 0: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 0: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 0: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 0: MR23, Opcode=0x04
MrcIssueMrw on mc 1 ch 3 rank 1: MR1, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR2, Opcode=0x64
MrcIssueMrw on mc 1 ch 3 rank 1: MR22, Opcode=0x33
MrcIssueMrw on mc 1 ch 3 rank 1: MR11, Opcode=0x45
MrcIssueMrw on mc 1 ch 3 rank 1: MR12, Opcode=0x54
MrcIssueMrw on mc 1 ch 3 rank 1: MR13, Opcode=0x78
MrcIssueMrw on mc 1 ch 3 rank 1: MR14, Opcode=0x4D
MrcIssueMrw on mc 1 ch 3 rank 1: MR3, Opcode=0x30
MrcIssueMrw on mc 1 ch 3 rank 1: MR23, Opcode=0x04
Issue ZQ CAL on all channels / ranks
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task JEDEC RESET -- SUCCEEDED, Status = 0h.
Post Code: DD25h
MRC task -- Print DDR MRs -- Started.
MRC task Print DDR MRs -- SUCCEEDED, Status = 0h.
Post Code: DD29h
MRC task -- SenseAmp Offset Training -- Started.
SampOffset Training:RxVoc,RxDqsUnmatchedAmpOffset
MC 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bits 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S 01234567S
SAmp
0 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
1 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
2 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
3 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
4 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
5 111111111 111111111 111111011 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111 111111111
6 111111111 111111111 111111011 111111111 111111111 111111111 111111011 111111111 111111111 111111111 111101111 111111011 111110111 111111111 111101011 111111111
7 111111111 111111111 111111011 111111111 111110101 111110101 111101011 111111111 111111101 111111101 111101111 111101011 111110101 111111111 111101011 111111011
8 111110111 111111011 111111011 111101011 111110101 111110101 111101011 111111011 111110101 111111101 111101011 111101011 111110101 111111111 111101011 111111011
9 111110101 111111011 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011
10 111110001 111101011 111101011 111101001 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101001
11 111110001 111100001 111101011 111101001 111110101 111110001 111101011 111101011 111110101 111110101 111101011 111101011 111110101 111110101 111101011 111101001
12 111110001 111100001 111101001 111101001 111110101 111100001 111101001 111101011 111110001 111110101 111101001 111101011 111100101 111110101 111101001 111100001
13 111100001 110100001 111100001 110101001 111110100 111100001 111100001 111100000 111110001 111110001 111100001 011101011 111100101 111100001 111101001 111100001
14 110100001 110100001 001100001 100100001 110100000 111000001 011100001 111000000 110000001 110000001 111000001 011001001 111100001 110100001 101100001 111100001
15 000000001 100100001 001100001 000100001 100000000 011000001 010100001 110000000 000000001 000000001 011000001 000001000 010100000 000100001 101100001 010100001
16 000000001 000000000 000000001 000000001 000000000 010000001 000000001 000000000 000000001 000000001 010000001 000000000 010000000 000100001 001000000 010100000
17 000000001 000000000 000000000 000000001 000000000 000000001 000000000 000000000 000000001 000000001 000000000 000000000 000000000 000000001 000000000 010000000
18 000000001 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000
19 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000001 000000000 000000000 000000000 000000000 000000000 000000000 000000000
20 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
21 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
22 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
23 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
24 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
25 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
26 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
27 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
28 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
29 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
30 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000 000000000
Results
W Mc0.C0.R0.S0.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B2 RxVoc: 18 (0x12)
W Mc0.C0.R1.S0.B2 RxVoc: 18 (0x12)
W Mc0.C0.R0.S0.B3 RxVoc: 17 (0x11)
W Mc0.C0.R1.S0.B3 RxVoc: 17 (0x11)
W Mc0.C0.R0.S0.B4 RxVoc: 19 (0x13)
W Mc0.C0.R1.S0.B4 RxVoc: 19 (0x13)
W Mc0.C0.R0.S0.B5 RxVoc: 24 (0x18)
W Mc0.C0.R1.S0.B5 RxVoc: 24 (0x18)
W Mc0.C0.R0.S0.B6 RxVoc: 22 (0x16)
W Mc0.C0.R1.S0.B6 RxVoc: 22 (0x16)
W Mc0.C0.R0.S0.B7 RxVoc: 23 (0x17)
W Mc0.C0.R1.S0.B7 RxVoc: 23 (0x17)
W Mc0.C0.R0.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc0.C0.R1.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc0.C0.R0.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S1.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S1.B2 RxVoc: 19 (0x13)
W Mc0.C0.R1.S1.B2 RxVoc: 19 (0x13)
W Mc0.C0.R0.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S1.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S1.B4 RxVoc: 22 (0x16)
W Mc0.C0.R1.S1.B4 RxVoc: 22 (0x16)
W Mc0.C0.R0.S1.B5 RxVoc: 21 (0x15)
W Mc0.C0.R1.S1.B5 RxVoc: 21 (0x15)
W Mc0.C0.R0.S1.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S1.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S1.B7 RxVoc: 21 (0x15)
W Mc0.C0.R1.S1.B7 RxVoc: 21 (0x15)
W Mc0.C0.R0.S1 RxDqsUnmatchedAmpOffset: 0
W Mc0.C0.R1.S1 RxDqsUnmatchedAmpOffset: 0
W Mc0.C0.R0.S2.B0 RxVoc: 18 (0x12)
W Mc0.C0.R1.S2.B0 RxVoc: 18 (0x12)
W Mc0.C0.R0.S2.B1 RxVoc: 18 (0x12)
W Mc0.C0.R1.S2.B1 RxVoc: 18 (0x12)
W Mc0.C0.R0.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxVoc: 23 (0x17)
W Mc0.C0.R1.S2.B4 RxVoc: 23 (0x17)
W Mc0.C0.R0.S2.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S2.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S2.B6 RxVoc: 27 (0x1B)
W Mc0.C0.R1.S2.B6 RxVoc: 27 (0x1B)
W Mc0.C0.R0.S2.B7 RxVoc: 20 (0x14)
W Mc0.C0.R1.S2.B7 RxVoc: 20 (0x14)
W Mc0.C0.R0.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S3.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S3.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S3.B1 RxVoc: 18 (0x12)
W Mc0.C0.R1.S3.B1 RxVoc: 18 (0x12)
W Mc0.C0.R0.S3.B2 RxVoc: 19 (0x13)
W Mc0.C0.R1.S3.B2 RxVoc: 19 (0x13)
W Mc0.C0.R0.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S3.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S3.B4 RxVoc: 24 (0x18)
W Mc0.C0.R1.S3.B4 RxVoc: 24 (0x18)
W Mc0.C0.R0.S3.B5 RxVoc: 18 (0x12)
W Mc0.C0.R1.S3.B5 RxVoc: 18 (0x12)
W Mc0.C0.R0.S3.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S3.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S3.B7 RxVoc: 22 (0x16)
W Mc0.C0.R1.S3.B7 RxVoc: 22 (0x16)
W Mc0.C0.R0.S3 RxDqsUnmatchedAmpOffset: 29 (0x1D)
W Mc0.C0.R1.S3 RxDqsUnmatchedAmpOffset: 29 (0x1D)
W Mc0.C0.R0.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S4.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S4.B1 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B1 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B2 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B2 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B3 RxVoc: 17 (0x11)
W Mc0.C0.R1.S4.B3 RxVoc: 17 (0x11)
W Mc0.C0.R0.S4.B4 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B4 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S4.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S4.B6 RxVoc: 18 (0x12)
W Mc0.C0.R1.S4.B6 RxVoc: 18 (0x12)
W Mc0.C0.R0.S4.B7 RxVoc: 25 (0x19)
W Mc0.C0.R1.S4.B7 RxVoc: 25 (0x19)
W Mc0.C0.R0.S4 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R1.S4 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R0.S5.B0 RxVoc: 17 (0x11)
W Mc0.C0.R1.S5.B0 RxVoc: 17 (0x11)
W Mc0.C0.R0.S5.B1 RxVoc: 1
W Mc0.C0.R1.S5.B1 RxVoc: 1
W Mc0.C0.R0.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxVoc: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxVoc: 18 (0x12)
W Mc0.C0.R1.S5.B3 RxVoc: 18 (0x12)
W Mc0.C0.R0.S5.B4 RxVoc: 20 (0x14)
W Mc0.C0.R1.S5.B4 RxVoc: 20 (0x14)
W Mc0.C0.R0.S5.B5 RxVoc: 25 (0x19)
W Mc0.C0.R1.S5.B5 RxVoc: 25 (0x19)
W Mc0.C0.R0.S5.B6 RxVoc: 21 (0x15)
W Mc0.C0.R1.S5.B6 RxVoc: 21 (0x15)
W Mc0.C0.R0.S5.B7 RxVoc: 25 (0x19)
W Mc0.C0.R1.S5.B7 RxVoc: 25 (0x19)
W Mc0.C0.R0.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc0.C0.R1.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc0.C0.R0.S6.B0 RxVoc: 18 (0x12)
W Mc0.C0.R1.S6.B0 RxVoc: 18 (0x12)
W Mc0.C0.R0.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B2 RxVoc: 17 (0x11)
W Mc0.C0.R1.S6.B2 RxVoc: 17 (0x11)
W Mc0.C0.R0.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R1.S6.B3 RxVoc: 16 (0x10)
W Mc0.C0.R0.S6.B4 RxVoc: 25 (0x19)
W Mc0.C0.R1.S6.B4 RxVoc: 25 (0x19)
W Mc0.C0.R0.S6.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S6.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S6.B6 RxVoc: 26 (0x1A)
W Mc0.C0.R1.S6.B6 RxVoc: 26 (0x1A)
W Mc0.C0.R0.S6.B7 RxVoc: 20 (0x14)
W Mc0.C0.R1.S6.B7 RxVoc: 20 (0x14)
W Mc0.C0.R0.S6 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R1.S6 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc0.C0.R0.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B0 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxVoc: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxVoc: 17 (0x11)
W Mc0.C0.R1.S7.B2 RxVoc: 17 (0x11)
W Mc0.C0.R0.S7.B3 RxVoc: 18 (0x12)
W Mc0.C0.R1.S7.B3 RxVoc: 18 (0x12)
W Mc0.C0.R0.S7.B4 RxVoc: 23 (0x17)
W Mc0.C0.R1.S7.B4 RxVoc: 23 (0x17)
W Mc0.C0.R0.S7.B5 RxVoc: 19 (0x13)
W Mc0.C0.R1.S7.B5 RxVoc: 19 (0x13)
W Mc0.C0.R0.S7.B6 RxVoc: 24 (0x18)
W Mc0.C0.R1.S7.B6 RxVoc: 24 (0x18)
W Mc0.C0.R0.S7.B7 RxVoc: 19 (0x13)
W Mc0.C0.R1.S7.B7 RxVoc: 19 (0x13)
W Mc0.C0.R0.S7 RxDqsUnmatchedAmpOffset: 3
W Mc0.C0.R1.S7 RxDqsUnmatchedAmpOffset: 3
W Mc1.C1.R0.S0.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S0.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S0.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S0.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S0.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B4 RxVoc: 18 (0x12)
W Mc1.C1.R1.S0.B4 RxVoc: 18 (0x12)
W Mc1.C1.R0.S0.B5 RxVoc: 24 (0x18)
W Mc1.C1.R1.S0.B5 RxVoc: 24 (0x18)
W Mc1.C1.R0.S0.B6 RxVoc: 20 (0x14)
W Mc1.C1.R1.S0.B6 RxVoc: 20 (0x14)
W Mc1.C1.R0.S0.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S0.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc1.C1.R1.S0 RxDqsUnmatchedAmpOffset: 28 (0x1C)
W Mc1.C1.R0.S1.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S1.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S1.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S1.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S1.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B4 RxVoc: 18 (0x12)
W Mc1.C1.R1.S1.B4 RxVoc: 18 (0x12)
W Mc1.C1.R0.S1.B5 RxVoc: 23 (0x17)
W Mc1.C1.R1.S1.B5 RxVoc: 23 (0x17)
W Mc1.C1.R0.S1.B6 RxVoc: 19 (0x13)
W Mc1.C1.R1.S1.B6 RxVoc: 19 (0x13)
W Mc1.C1.R0.S1.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S1.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S1 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc1.C1.R1.S1 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc1.C1.R0.S2.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S2.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S2.B1 RxVoc: 1
W Mc1.C1.R1.S2.B1 RxVoc: 1
W Mc1.C1.R0.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R1.S2.B2 RxVoc: 16 (0x10)
W Mc1.C1.R0.S2.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S2.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S2.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S2.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S2.B5 RxVoc: 19 (0x13)
W Mc1.C1.R1.S2.B5 RxVoc: 19 (0x13)
W Mc1.C1.R0.S2.B6 RxVoc: 24 (0x18)
W Mc1.C1.R1.S2.B6 RxVoc: 24 (0x18)
W Mc1.C1.R0.S2.B7 RxVoc: 20 (0x14)
W Mc1.C1.R1.S2.B7 RxVoc: 20 (0x14)
W Mc1.C1.R0.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R1.S2 RxDqsUnmatchedAmpOffset: 31 (0x1F)
W Mc1.C1.R0.S3.B0 RxVoc: 19 (0x13)
W Mc1.C1.R1.S3.B0 RxVoc: 19 (0x13)
W Mc1.C1.R0.S3.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S3.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S3.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S3.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S3.B3 RxVoc: 18 (0x12)
W Mc1.C1.R1.S3.B3 RxVoc: 18 (0x12)
W Mc1.C1.R0.S3.B4 RxVoc: 25 (0x19)
W Mc1.C1.R1.S3.B4 RxVoc: 25 (0x19)
W Mc1.C1.R0.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R1.S3.B5 RxVoc: 16 (0x10)
W Mc1.C1.R0.S3.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S3.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S3.B7 RxVoc: 18 (0x12)
W Mc1.C1.R1.S3.B7 RxVoc: 18 (0x12)
W Mc1.C1.R0.S3 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R1.S3 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R0.S4.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S4.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S4.B1 RxVoc: 1
W Mc1.C1.R1.S4.B1 RxVoc: 1
W Mc1.C1.R0.S4.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S4.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxVoc: 20 (0x14)
W Mc1.C1.R1.S4.B4 RxVoc: 20 (0x14)
W Mc1.C1.R0.S4.B5 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S4.B5 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S4.B6 RxVoc: 18 (0x12)
W Mc1.C1.R1.S4.B6 RxVoc: 18 (0x12)
W Mc1.C1.R0.S4.B7 RxVoc: 25 (0x19)
W Mc1.C1.R1.S4.B7 RxVoc: 25 (0x19)
W Mc1.C1.R0.S4 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R1.S4 RxDqsUnmatchedAmpOffset: 1
W Mc1.C1.R0.S5.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S5.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S5.B1 RxVoc: 17 (0x11)
W Mc1.C1.R1.S5.B1 RxVoc: 17 (0x11)
W Mc1.C1.R0.S5.B2 RxVoc: 18 (0x12)
W Mc1.C1.R1.S5.B2 RxVoc: 18 (0x12)
W Mc1.C1.R0.S5.B3 RxVoc: 1
W Mc1.C1.R1.S5.B3 RxVoc: 1
W Mc1.C1.R0.S5.B4 RxVoc: 19 (0x13)
W Mc1.C1.R1.S5.B4 RxVoc: 19 (0x13)
W Mc1.C1.R0.S5.B5 RxVoc: 23 (0x17)
W Mc1.C1.R1.S5.B5 RxVoc: 23 (0x17)
W Mc1.C1.R0.S5.B6 RxVoc: 19 (0x13)
W Mc1.C1.R1.S5.B6 RxVoc: 19 (0x13)
W Mc1.C1.R0.S5.B7 RxVoc: 23 (0x17)
W Mc1.C1.R1.S5.B7 RxVoc: 23 (0x17)
W Mc1.C1.R0.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc1.C1.R1.S5 RxDqsUnmatchedAmpOffset: 30 (0x1E)
W Mc1.C1.R0.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxVoc: 18 (0x12)
W Mc1.C1.R1.S6.B1 RxVoc: 18 (0x12)
W Mc1.C1.R0.S6.B2 RxVoc: 1
W Mc1.C1.R1.S6.B2 RxVoc: 1
W Mc1.C1.R0.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxVoc: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S6.B4 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S6.B5 RxVoc: 18 (0x12)
W Mc1.C1.R1.S6.B5 RxVoc: 18 (0x12)
W Mc1.C1.R0.S6.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R1.S6.B6 RxVoc: 26 (0x1A)
W Mc1.C1.R0.S6.B7 RxVoc: 20 (0x14)
W Mc1.C1.R1.S6.B7 RxVoc: 20 (0x14)
W Mc1.C1.R0.S6 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R1.S6 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R0.S7.B0 RxVoc: 17 (0x11)
W Mc1.C1.R1.S7.B0 RxVoc: 17 (0x11)
W Mc1.C1.R0.S7.B1 RxVoc: 2
W Mc1.C1.R1.S7.B1 RxVoc: 2
W Mc1.C1.R0.S7.B2 RxVoc: 17 (0x11)
W Mc1.C1.R1.S7.B2 RxVoc: 17 (0x11)
W Mc1.C1.R0.S7.B3 RxVoc: 1
W Mc1.C1.R1.S7.B3 RxVoc: 1
W Mc1.C1.R0.S7.B4 RxVoc: 23 (0x17)
W Mc1.C1.R1.S7.B4 RxVoc: 23 (0x17)
W Mc1.C1.R0.S7.B5 RxVoc: 20 (0x14)
W Mc1.C1.R1.S7.B5 RxVoc: 20 (0x14)
W Mc1.C1.R0.S7.B6 RxVoc: 25 (0x19)
W Mc1.C1.R1.S7.B6 RxVoc: 25 (0x19)
W Mc1.C1.R0.S7.B7 RxVoc: 22 (0x16)
W Mc1.C1.R1.S7.B7 RxVoc: 22 (0x16)
W Mc1.C1.R0.S7 RxDqsUnmatchedAmpOffset: 0
W Mc1.C1.R1.S7 RxDqsUnmatchedAmpOffset: 0
SampOffset Training:RxPerBitDeskewCal,
MC 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Bits 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567
SAmp
0 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
2 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
3 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
4 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
5 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
6 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
7 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
8 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
9 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
10 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
12 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
13 11101111 11111111 11110111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111101 11111111 11101111
14 01101100 10111111 11110011 10110111 01111111 01110101 11111111 11111110 11101001 11111101 11111011 11111101 10011110 01111101 10111111 11100110
15 01100100 00100001 11010011 00110001 01101000 00110001 00110001 01111100 10100001 10100101 11010011 11101101 00011110 00111100 10110110 10100010
16 00000000 00000001 10000000 00010000 00001000 00010001 00110001 00111100 00000001 00000000 01000010 10000100 00000100 00100000 00000000 10100000
17 00000000 00000001 10000000 00000000 00000000 00010000 00000000 00010000 00000000 00000000 00000010 00000000 00000000 00000000 00000000 00000000
18 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
19 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
20 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
21 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
22 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
23 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
24 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
25 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
26 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
27 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
28 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
29 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
30 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Results
W Mc0.C0.R0.S0.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R1.S0.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R0.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S0.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S0.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S0.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S1.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S1.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S1.B7 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S1.B7 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S2.B0 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S2.B0 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B4 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R1.S2.B4 RxPerBitDeskewCal: 19 (0x13)
W Mc0.C0.R0.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S3.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S3.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S3.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S3.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S3.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S3.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S3.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S4.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S4.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S4.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S4.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S4.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S4.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S4.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S5.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S5.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S5.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S5.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S5.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S5.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S5.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R0.S5.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S5.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B3 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S6.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S6.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S6.B7 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S7.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R1.S7.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc0.C0.R0.S7.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B2 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R1.S7.B3 RxPerBitDeskewCal: 2
W Mc0.C0.R0.S7.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B4 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B5 RxPerBitDeskewCal: 1
W Mc0.C0.R1.S7.B5 RxPerBitDeskewCal: 1
W Mc0.C0.R0.S7.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R1.S7.B6 RxPerBitDeskewCal: 17 (0x11)
W Mc0.C0.R0.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc0.C0.R1.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S0.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S0.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B3 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S0.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S0.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S0.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S0.B7 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S0.B7 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S1.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S1.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S1.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B1 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S2.B1 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S2.B2 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S2.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S2.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S2.B5 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S2.B6 RxPerBitDeskewCal: 2
W Mc1.C1.R1.S2.B6 RxPerBitDeskewCal: 2
W Mc1.C1.R0.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S2.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B1 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S3.B3 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S3.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S3.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S3.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S3.B6 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S3.B7 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S4.B0 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S4.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S4.B2 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B2 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S4.B5 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S4.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S4.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S4.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S5.B0 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S5.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S5.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B4 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S5.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S5.B6 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S5.B6 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S5.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S5.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B0 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S6.B1 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B2 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B3 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B4 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B5 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S6.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S6.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S6.B7 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S7.B0 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S7.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S7.B1 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R1.S7.B2 RxPerBitDeskewCal: 1
W Mc1.C1.R0.S7.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R1.S7.B3 RxPerBitDeskewCal: 19 (0x13)
W Mc1.C1.R0.S7.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S7.B4 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R0.S7.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R1.S7.B5 RxPerBitDeskewCal: 17 (0x11)
W Mc1.C1.R0.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R1.S7.B6 RxPerBitDeskewCal: 16 (0x10)
W Mc1.C1.R0.S7.B7 RxPerBitDeskewCal: 18 (0x12)
W Mc1.C1.R1.S7.B7 RxPerBitDeskewCal: 18 (0x12)
MRC task SenseAmp Offset Training -- SUCCEEDED, Status = 0h. Stack Depth: 151672
Post Code: DD28h
MRC task -- Early command training -- Started.
Start Bit Swizzle
W Mc0 GsmMccLDimmSize: 1
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1 GsmMccLDimmSize: 1
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 8
W Mc0.C0 GsmMctRDRDdr: 8
W Mc0.C1 GsmMctRDRDdg: 8
W Mc0.C1 GsmMctRDRDdr: 8
W Mc1.C0 GsmMctRDRDdg: 8
W Mc1.C0 GsmMctRDRDdr: 8
W Mc1.C1 GsmMctRDRDdg: 8
W Mc1.C1 GsmMctRDRDdr: 8
Running Bit 0
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Running Bit 1
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Running Bit 2
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Running Bit 3
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Running Bit 4
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 01 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 04 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Running Bit 5
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 02 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 40 - Good feedback
Running Bit 6
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 80 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 20 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 10 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 10 - Good feedback
Running Bit 7
Controller 0 Channel 0 CPU Byte 0 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 0 Channel 0 CPU Byte 1 Dram Byte 1 => Feedback = 01 - Good feedback
Controller 0 Channel 1 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 0 Channel 1 CPU Byte 1 Dram Byte 0 => Feedback = 04 - Good feedback
Controller 0 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 10 - Good feedback
Controller 0 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 80 - Good feedback
Controller 0 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 0 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 0 CPU Byte 0 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 0 CPU Byte 1 Dram Byte 0 => Feedback = 08 - Good feedback
Controller 1 Channel 1 CPU Byte 0 Dram Byte 0 => Feedback = 02 - Good feedback
Controller 1 Channel 1 CPU Byte 1 Dram Byte 1 => Feedback = 20 - Good feedback
Controller 1 Channel 2 CPU Byte 0 Dram Byte 0 => Feedback = 40 - Good feedback
Controller 1 Channel 2 CPU Byte 1 Dram Byte 1 => Feedback = 40 - Good feedback
Controller 1 Channel 3 CPU Byte 0 Dram Byte 1 => Feedback = 08 - Good feedback
Controller 1 Channel 3 CPU Byte 1 Dram Byte 0 => Feedback = 80 - Good feedback
MapCA2DQPins Results for Mc0.Ch0 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 0 1 6 7 3 2 5 4
CPU Byte1: 15 8 9 14 12 11 10 13
MapCA2DQPins Results for Mc0.Ch1 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 11 12 8 15 9 14 10 13
CPU Byte1: 3 4 7 0 6 1 5 2
MapCA2DQPins Results for Mc0.Ch2 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 4 5 3 2 7 1 0 6
CPU Byte1: 11 10 12 13 8 9 14 15
MapCA2DQPins Results for Mc0.Ch3 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 12 11 8 13 14 15 9 10
CPU Byte1: 4 7 3 2 1 6 0 5
MapCA2DQPins Results for Mc1.Ch0 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 11 10 9 8 12 13 15 14
CPU Byte1: 4 5 6 7 3 2 0 1
MapCA2DQPins Results for Mc1.Ch1 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 0 7 1 6 3 5 2 4
CPU Byte1: 9 8 10 11 14 15 13 12
MapCA2DQPins Results for Mc1.Ch2 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 4 5 6 1 3 2 7 0
CPU Byte1: 10 13 12 11 14 9 15 8
MapCA2DQPins Results for Mc1.Ch3 ("-1" for skipped Bytes, DRAM DQ pins offsets):
CPU Bit: [0] [1] [2] [3] [4] [5] [6] [7]
CPU Byte0: 10 12 9 15 8 11 13 14
CPU Byte1: 3 4 1 2 6 0 5 7
Revert MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
Revert MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 0
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
End Bit Swizzle
LowFreqCsCmdSweepDone 1
Mc0C0R0 Mc0C1R0 Mc0C2R0 Mc0C3R0 Mc1C0R0 Mc1C1R0 Mc1C2R0 Mc1C3R0 Mc0C0R1 Mc0C1R1 Mc0C2R1 Mc0C3R1 Mc1C0R1 Mc1C1R1 Mc1C2R1 Mc1C3R1
CS: 88
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(88): 11
CS: 96
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(96): 11
CS: 104
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(104): 11
CS: 112
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(112): 11
CS: 120
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(120): 11
CS: 128
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(128): 11
CS: 136
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(136): 11
CS: 144
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(144): 11
CS: 152
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(152): 11
CS: 160
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(160): 11
CS: 168
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
CMD:168 . . . . . . . . . . . . . . . .
Max Consecutive for CS(168): 11
CS: 88
CMD:88 . . . . . . . . . . . . . . . .
CMD:96 . . . . . . . . . . . . . . . .
CMD:104 . . . . . . . . . . . . . . . .
CMD:112 . . . . . . . . . . . . . . . .
CMD:120 . . . . . . . . . . . . . . . .
CMD:128 . . . . . . . . . . . . . . . .
CMD:136 . . . . . . . . . . . . . . . .
CMD:144 . . . . . . . . . . . . . . . .
CMD:152 . . . . . . . . . . . . . . . .
CMD:160 . . . . . . . . . . . . . . . .
Selected values Mc0C0: CS = 88, CMD = 120
Selected values Mc0C1: CS = 88, CMD = 120
Selected values Mc0C2: CS = 88, CMD = 120
Selected values Mc0C3: CS = 88, CMD = 120
Selected values Mc1C0: CS = 88, CMD = 120
Selected values Mc1C1: CS = 88, CMD = 120
Selected values Mc1C2: CS = 88, CMD = 120
Selected values Mc1C3: CS = 88, CMD = 120
Mc0C0R0 Mc0C1R0 Mc0C2R0 Mc0C3R0 Mc1C0R0 Mc1C1R0 Mc1C2R0 Mc1C3R0 Mc0C0R1 Mc0C1R1 Mc0C2R1 Mc0C3R1 Mc1C0R1 Mc1C1R1 Mc1C2R1 Mc1C3R1
CS: 88 . . . . . . . . . . . . . . . .
CS: 96 . . . . . . . . . . . . . . . .
CS: 104 . . . . . . . . . . . . . . . .
Final selected values Mc0C0: CS = 92, CMD = 120
Final selected values Mc0C1: CS = 92, CMD = 120
Final selected values Mc0C2: CS = 92, CMD = 120
Final selected values Mc0C3: CS = 92, CMD = 120
Final selected values Mc1C0: CS = 92, CMD = 120
Final selected values Mc1C1: CS = 92, CMD = 120
Final selected values Mc1C2: CS = 92, CMD = 120
Final selected values Mc1C3: CS = 92, CMD = 120
EarlyChipSelectTrainingLp4 started
PiLow = 88, PiHigh = 168 PiStep = 2
R0: MrcSendCaVrefOnDq done
Mc0Ch0 p1 Mc0Ch1 p1 Mc0Ch2 p1 Mc0Ch3 p1 Mc1Ch0 p1 Mc1Ch1 p1 Mc1Ch2 p1 Mc1Ch3 p1 Mc0Ch0 p2 Mc0Ch1 p2 Mc0Ch2 p2 Mc0Ch3 p2 Mc1Ch0 p2 Mc1Ch1 p2 Mc1Ch2 p2 Mc1Ch3 p2
CTL PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
90: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
92: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
94: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
96: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
98: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
100: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
102: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
104: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
106: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
108: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
110: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
112: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
114: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
116: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
118: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
120: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
122: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
124: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
126: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
128: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
130: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
132: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
134: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
136: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
138: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
140: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
142: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
144: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
146: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
148: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
150: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
152: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
154: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
156: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
158: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
160: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
162: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
164: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
166: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
168: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
CS training data Mc0 Ch0 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch1 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc0 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch0 Rank0
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch1 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
R1: MrcSendCaVrefOnDq done
Mc0Ch0 p1 Mc0Ch1 p1 Mc0Ch2 p1 Mc0Ch3 p1 Mc1Ch0 p1 Mc1Ch1 p1 Mc1Ch2 p1 Mc1Ch3 p1 Mc0Ch0 p2 Mc0Ch1 p2 Mc0Ch2 p2 Mc0Ch3 p2 Mc1Ch0 p2 Mc1Ch1 p2 Mc1Ch2 p2 Mc1Ch3 p2
CTL PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
90: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
92: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
94: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
96: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
98: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
100: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
102: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
104: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
106: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
108: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
110: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
112: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
114: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
116: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
118: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
120: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
122: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
124: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
126: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
128: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
130: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
132: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
134: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
136: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
138: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
140: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
142: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
144: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
146: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
148: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
150: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
152: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
154: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
156: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
158: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
160: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
162: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
164: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
166: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
168: A4 91 29 4A 25 49 2A 64 .52 .46 .16 .85 .1A .86 .85 .13
CS training data Mc0 Ch0 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch1 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc0 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc0 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch0 Rank1
CPUByte Left Right Width
0 88 168 80
CS training data Mc1 Ch1 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CS training data Mc1 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
Finding best CS PIs:
Mc0C0 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C1 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C2 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc0C3 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C0 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C1 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C2 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
Mc1C3 Left Right Center
Rank0 88 168 128
Rank1 88 168 128
EarlyCaTraining started
PiLow = 88, PiHigh = 168, PiStep = 2
R0: MrcSendCaVrefOnDq done
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
CMD PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: .A4 .91 .29 .4A .25 .49 .2A .64
90: .A4 .91 .29 .4A .25 .49 .2A .64
92: .A4 .91 .29 .4A .25 .49 .2A .64
94: .A4 .91 .29 .4A .25 .49 .2A .64
96: .A4 .91 .29 .4A .25 .49 .2A .64
98: .A4 .91 .29 .4A .25 .49 .2A .64
100: .A4 .91 .29 .4A .25 .49 .2A .64
102: .A4 .91 .29 .4A .25 .49 .2A .64
104: .A4 .91 .29 .4A .25 .49 .2A .64
106: .A4 .91 .29 .4A .25 .49 .2A .64
108: .A4 .91 .29 .4A .25 .49 .2A .64
110: .A4 .91 .29 .4A .25 .49 .2A .64
112: .A4 .91 .29 .4A .25 .49 .2A .64
114: .A4 .91 .29 .4A .25 .49 .2A .64
116: .A4 .91 .29 .4A .25 .49 .2A .64
118: .A4 .91 .29 .4A .25 .49 .2A .64
120: .A4 .91 .29 .4A .25 .49 .2A .64
122: .A4 .91 .29 .4A .25 .49 .2A .64
124: .A4 .91 .29 .4A .25 .49 .2A .64
126: .A4 .91 .29 .4A .25 .49 .2A .64
128: .A4 .91 .29 .4A .25 .49 .2A .64
130: .A4 .91 .29 .4A .25 .49 .2A .64
132: .A4 .91 .29 .4A .25 .49 .2A .64
134: .A4 .91 .29 .4A .25 .49 .2A .64
136: .A4 .91 .29 .4A .25 .49 .2A .64
138: .A4 .91 .29 .4A .25 .49 .2A .64
140: .A4 .91 .29 .4A .25 .49 .2A .64
142: .A4 .91 .29 .4A .25 .49 .2A .64
144: .A4 .91 .29 .4A .25 .49 .2A .64
146: .A4 .91 .29 .4A .25 .49 .2A .64
148: .A4 .91 .29 .4A .25 .49 .2A .64
150: .A4 .91 .29 .4A .25 .49 .2A .64
152: .A4 .91 .29 .4A .25 .49 .2A .64
154: .A4 .91 .29 .4A .25 .49 .2A .64
156: .A4 .91 .29 .4A .25 .49 .2A .64
158: .A4 .91 .29 .4A .25 .49 .2A .64
160: .A4 .91 .29 .4A .25 .49 .2A .64
162: .A4 .91 .29 .4A .25 .49 .2A .64
164: .A4 .91 .29 .4A .25 .49 .2A .64
166: .A4 .91 .29 .4A .25 .49 .2A .64
168: .A4 .91 .29 .4A .25 .49 .2A .64
CA training data Mc0 Ch0 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch1 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc0 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch0 Rank0
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch1 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch2 Rank0
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch3 Rank0
CPUByte Left Right Width
0 88 168 80
R1: MrcSendCaVrefOnDq done
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
CMD PI 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
88: .A4 .91 .29 .4A .25 .49 .2A .64
90: .A4 .91 .29 .4A .25 .49 .2A .64
92: .A4 .91 .29 .4A .25 .49 .2A .64
94: .A4 .91 .29 .4A .25 .49 .2A .64
96: .A4 .91 .29 .4A .25 .49 .2A .64
98: .A4 .91 .29 .4A .25 .49 .2A .64
100: .A4 .91 .29 .4A .25 .49 .2A .64
102: .A4 .91 .29 .4A .25 .49 .2A .64
104: .A4 .91 .29 .4A .25 .49 .2A .64
106: .A4 .91 .29 .4A .25 .49 .2A .64
108: .A4 .91 .29 .4A .25 .49 .2A .64
110: .A4 .91 .29 .4A .25 .49 .2A .64
112: .A4 .91 .29 .4A .25 .49 .2A .64
114: .A4 .91 .29 .4A .25 .49 .2A .64
116: .A4 .91 .29 .4A .25 .49 .2A .64
118: .A4 .91 .29 .4A .25 .49 .2A .64
120: .A4 .91 .29 .4A .25 .49 .2A .64
122: .A4 .91 .29 .4A .25 .49 .2A .64
124: .A4 .91 .29 .4A .25 .49 .2A .64
126: .A4 .91 .29 .4A .25 .49 .2A .64
128: .A4 .91 .29 .4A .25 .49 .2A .64
130: .A4 .91 .29 .4A .25 .49 .2A .64
132: .A4 .91 .29 .4A .25 .49 .2A .64
134: .A4 .91 .29 .4A .25 .49 .2A .64
136: .A4 .91 .29 .4A .25 .49 .2A .64
138: .A4 .91 .29 .4A .25 .49 .2A .64
140: .A4 .91 .29 .4A .25 .49 .2A .64
142: .A4 .91 .29 .4A .25 .49 .2A .64
144: .A4 .91 .29 .4A .25 .49 .2A .64
146: .A4 .91 .29 .4A .25 .49 .2A .64
148: .A4 .91 .29 .4A .25 .49 .2A .64
150: .A4 .91 .29 .4A .25 .49 .2A .64
152: .A4 .91 .29 .4A .25 .49 .2A .64
154: .A4 .91 .29 .4A .25 .49 .2A .64
156: .A4 .91 .29 .4A .25 .49 .2A .64
158: .A4 .91 .29 .4A .25 .49 .2A .64
160: .A4 .91 .29 .4A .25 .49 .2A .64
162: .A4 .91 .29 .4A .25 .49 .2A .64
164: .A4 .91 .29 .4A .25 .49 .2A .64
166: .A4 .91 .29 .4A .25 .49 .2A .64
168: .A4 .91 .29 .4A .25 .49 .2A .64
CA training data Mc0 Ch0 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch1 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc0 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc0 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch0 Rank1
CPUByte Left Right Width
0 88 168 80
CA training data Mc1 Ch1 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch2 Rank1
CPUByte Left Right Width
1 88 168 80
CA training data Mc1 Ch3 Rank1
CPUByte Left Right Width
0 88 168 80
Finding best CMD PIs:
Mc0C0 Left Right Center
CAA 88 168 128
Mc0C1 Left Right Center
CAA 88 168 128
Mc0C2 Left Right Center
CAA 88 168 128
Mc0C3 Left Right Center
CAA 88 168 128
Mc1C0 Left Right Center
CAA 88 168 128
Mc1C1 Left Right Center
CAA 88 168 128
Mc1C2 Left Right Center
CAA 88 168 128
Mc1C3 Left Right Center
CAA 88 168 128
Mc0.Ch0 DESWIZZLE_LOW=0x825C8F948, DESWIZZLE_LOW_ERM=0x825C8F948
DqsMapCpu2Dram[0]: 0
Mc0.Ch0 Byte0 WrRetrainSwizzleControl=0x006B7948
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc0.Ch0 Byte1 WrRetrainSwizzleControl=0x016B7948
Mc0.Ch1 DESWIZZLE_HIGH=0x2508D111EB, DESWIZZLE_HIGH_ERM=0x2508D111EB
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc0.Ch1 Byte0 WrRetrainSwizzleControl=0x015311EB
DqsMapCpu2Dram[1]: 0
Mc0.Ch1 Byte1 WrRetrainSwizzleControl=0x005311EB
Mc0.Ch2 DESWIZZLE_LOW=0x8103604EE, DESWIZZLE_LOW_ERM=0x8103604EE
DqsMapCpu2Dram[0]: 0
Mc0.Ch2 Byte0 WrRetrainSwizzleControl=0x009C84EE
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc0.Ch2 Byte1 WrRetrainSwizzleControl=0x019C84EE
Mc0.Ch3 DESWIZZLE_HIGH=0x2501F904E6, DESWIZZLE_HIGH_ERM=0x2501F904E6
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc0.Ch3 Byte0 WrRetrainSwizzleControl=0x013784E6
DqsMapCpu2Dram[1]: 0
Mc0.Ch3 Byte1 WrRetrainSwizzleControl=0x003784E6
Mc1.Ch0 DESWIZZLE_LOW=0x12029897E, DESWIZZLE_LOW_ERM=0x12029897E
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc1.Ch0 Byte0 WrRetrainSwizzleControl=0x0168897E
DqsMapCpu2Dram[1]: 0
Mc1.Ch0 Byte1 WrRetrainSwizzleControl=0x0068897E
Mc1.Ch1 DESWIZZLE_HIGH=0x2C3B40F990, DESWIZZLE_HIGH_ERM=0x2C3B40F990
DqsMapCpu2Dram[0]: 0
Mc1.Ch1 Byte0 WrRetrainSwizzleControl=0x002EF990
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc1.Ch1 Byte1 WrRetrainSwizzleControl=0x012EF990
Mc1.Ch2 DESWIZZLE_LOW=0x81317895F, DESWIZZLE_LOW_ERM=0x81317895F
DqsMapCpu2Dram[0]: 0
Mc1.Ch2 Byte0 WrRetrainSwizzleControl=0x00C8895F
DqsMapCpu2Dram[1]: 1
DataRetrain_ByteSel: 1
Mc1.Ch2 Byte1 WrRetrainSwizzleControl=0x01C8895F
Mc1.Ch3 DESWIZZLE_HIGH=0x250D0A10D5, DESWIZZLE_HIGH_ERM=0x250D0A10D5
DqsMapCpu2Dram[0]: 1
DataRetrain_ByteSel: 1
Mc1.Ch3 Byte0 WrRetrainSwizzleControl=0x01F310D5
DqsMapCpu2Dram[1]: 0
Mc1.Ch3 Byte1 WrRetrainSwizzleControl=0x00F310D5
Attempting value = 0xB9B80014 - Pll busy wait - done
Requested/actual ratio 20/20, Frequency=2667, Gear2=0, BClk=100000000Hz RefClk=133MHz, tCK=749999fs
VDDQ - TX_VOLTAGE: 1100 ICCMAX: 7tCKps=750, wCKps=187 UIps=375, Dclkps=750, Qclkps=375
MRC task Early command training -- SUCCEEDED, Status = 0h. Stack Depth: 152116
Post Code: DD2Bh
MRC task -- Read Leveling training -- Started.
W Mc0.C0.R0 RxIoTclDelay: 3
W Mc0.C0.R1 RxIoTclDelay: 3
R Mc0.C0.S0 GsmIocForceOdtOn: 1
W Mc0.C1.R0 RxIoTclDelay: 3
W Mc0.C1.R1 RxIoTclDelay: 3
W Mc0.C2.R0 RxIoTclDelay: 3
W Mc0.C2.R1 RxIoTclDelay: 3
W Mc0.C3.R0 RxIoTclDelay: 3
W Mc0.C3.R1 RxIoTclDelay: 3
W Mc1.C4.R0 RxIoTclDelay: 3
W Mc1.C4.R1 RxIoTclDelay: 3
W Mc1.C5.R0 RxIoTclDelay: 3
W Mc1.C5.R1 RxIoTclDelay: 3
W Mc1.C6.R0 RxIoTclDelay: 3
W Mc1.C6.R1 RxIoTclDelay: 3
W Mc1.C7.R0 RxIoTclDelay: 3
W Mc1.C7.R1 RxIoTclDelay: 3
W Mc0.C0.S0 GsmIocForceOdtOn: 0
W Mc0.C0.S1 GsmIocForceOdtOn: 0
W Mc0.C0.S2 GsmIocForceOdtOn: 0
W Mc0.C0.S3 GsmIocForceOdtOn: 0
W Mc0.C0.S4 GsmIocForceOdtOn: 0
W Mc0.C0.S5 GsmIocForceOdtOn: 0
W Mc0.C0.S6 GsmIocForceOdtOn: 0
W Mc0.C0.S7 GsmIocForceOdtOn: 0
W Mc1.C1.S0 GsmIocForceOdtOn: 0
W Mc1.C1.S1 GsmIocForceOdtOn: 0
W Mc1.C1.S2 GsmIocForceOdtOn: 0
W Mc1.C1.S3 GsmIocForceOdtOn: 0
W Mc1.C1.S4 GsmIocForceOdtOn: 0
W Mc1.C1.S5 GsmIocForceOdtOn: 0
W Mc1.C1.S6 GsmIocForceOdtOn: 0
W Mc1.C1.S7 GsmIocForceOdtOn: 0
Rank 0
Step 1 Find Middle of high region
Ch/Byte 0 1
RcvEnPi 012345678 012345678
256: 11 00 00 00 00 00 11 00
264: 11 00 00 00 00 00 11 00
272: 11 00 00 01 11 00 11 10
280: 00 00 00 11 11 00 00 10
288: 00 11 00 11 11 01 00 11
296: 00 11 10 11 11 01 00 11
304: 00 11 11 11 11 11 00 11
312: 00 11 11 11 11 11 00 11
320: 00 11 11 11 11 11 00 11
328: 00 11 11 11 11 11 00 11
336: 00 11 11 11 10 11 10 11
344: 11 11 11 10 00 11 11 01
352: 11 11 11 00 00 11 11 00
360: 11 00 11 00 00 11 11 00
368: 11 00 01 00 00 00 11 00
376: 11 00 00 00 00 00 11 00
384: 11 00 00 00 00 00 11 00
392: 11 00 00 00 00 00 11 00
400: 11 00 00 01 11 00 01 10
408: 00 00 00 11 11 00 00 10
416: 00 01 00 11 11 00 00 11
424: 00 11 10 11 11 11 00 11
432: 00 11 11 11 11 11 00 11
440: 00 11 11 11 11 11 00 11
Mc0C0.R0: Left Right Width Center
B0: 344 400 56 372
B1: 344 400 56 372
Mc0C1.R0: Left Right Width Center
B0: 288 352 64 320
B1: 288 352 64 320
Mc0C2.R0: Left Right Width Center
B0: 296 360 64 328
B1: 304 368 64 336
Mc0C3.R0: Left Right Width Center
B0: 280 344 64 312
B1: 272 336 64 304
Mc1C0.R0: Left Right Width Center
B0: 272 336 64 304
B1: 272 328 56 300
Mc1C1.R0: Left Right Width Center
B0: 304 360 56 332
B1: 288 360 72 324
Mc1C2.R0: Left Right Width Center
B0: 336 392 56 364
B1: 344 400 56 372
Mc1C3.R0: Left Right Width Center
B0: 272 336 64 304
B1: 288 344 56 316
Step 2: Move cycle delay from Byte to Channel
Mc0.C0
Mc0.C1
Mc0.C2
Mc0.C3
Mc1.C0
Mc1.C1
Mc1.C2
Mc1.C3
Step 3: Quarter Preamble - Walk Backwards (In PI ticks)
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H
-128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H
-256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H
-384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H
-512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H
-640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H
-768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H
-896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H
-1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H
-1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H
-1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H
-1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H
-1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1664 H H -1664 H H -1664 H H -1664 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1792 H H -1792 H H -1792 H H -1792 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1920 L L -1920 L L -1920 L L -1920 L L
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 372
B1: 372
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 320
B1: 320
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 328
B1: 336
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 312
B1: 304
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 304
B1: 300
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 332
B1: 324
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 364
B1: 372
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 304
B1: 316
Step 4: Add 1qclk.
W Mc0.C0.R0.S0 RecEnDelay: 436 (0x1B4)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 436 (0x1B4)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R0.S2 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R0.S4 RecEnDelay: 392 (0x188)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 400 (0x190)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R0.S6 RecEnDelay: 376 (0x178)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R0.S0 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 364 (0x16C)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R0.S2 RecEnDelay: 396 (0x18C)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 388 (0x184)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R0.S4 RecEnDelay: 428 (0x1AC)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 436 (0x1B4)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R0.S6 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 380 (0x17C)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
Step 5: Walk forward to find rising edge
ChResult[Mc0][Ch0]: 0x3
ChResult[Mc0][Ch1]: 0x3
ChResult[Mc0][Ch2]: 0x3
ChResult[Mc0][Ch3]: 0x3
ChResult[Mc1][Ch0]: 0x3
ChResult[Mc1][Ch1]: 0x3
ChResult[Mc1][Ch2]: 0x3
ChResult[Mc1][Ch3]: 0x3
Step 6: Mid Preamble
Mc0.Ch0: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 26
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 366
B1: 367
Mc0.Ch1: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 25
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 316
B1: 314
Mc0.Ch2: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 25
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 322
B1: 330
Mc0.Ch3: Preamble Increment
B0, IncPreAmble 23
B1, IncPreAmble 25
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 304
B1: 298
Mc1.Ch0: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 30
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 298
B1: 299
Mc1.Ch1: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 23
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 326
B1: 316
Mc1.Ch2: Preamble Increment
B0, IncPreAmble 27
B1, IncPreAmble 27
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 360
B1: 368
Mc1.Ch3: Preamble Increment
B0, IncPreAmble 30
B1, IncPreAmble 25
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 303
B1: 310
Rank 1
Step 1 Find Middle of high region
Ch/Byte 0 1
RcvEnPi 012345678 012345678
256: 11 00 00 00 00 00 11 00
264: 11 00 00 00 00 00 11 00
272: 11 00 00 11 11 00 11 00
280: 00 00 00 11 11 00 11 10
288: 00 11 00 11 11 00 00 10
296: 00 11 10 11 11 00 00 11
304: 00 11 11 11 11 01 00 11
312: 00 11 11 11 11 11 00 11
320: 00 11 11 11 11 11 00 11
328: 00 11 11 11 11 11 00 11
336: 11 11 11 11 11 11 00 11
344: 11 11 11 00 00 11 10 11
352: 11 10 11 00 00 11 11 01
360: 11 00 11 00 00 11 11 01
368: 11 00 01 00 00 11 11 00
376: 11 00 00 00 00 10 11 00
384: 11 00 00 00 00 00 11 00
392: 11 00 00 00 00 00 11 00
400: 11 00 00 11 11 00 11 00
408: 00 00 00 11 11 00 11 10
416: 00 11 00 11 11 00 01 10
424: 00 11 10 11 11 00 00 11
432: 00 11 11 11 11 01 00 11
440: 00 11 11 11 11 11 00 11
Mc0C0.R1: Left Right Width Center
B0: 336 400 64 368
B1: 336 400 64 368
Mc0C1.R1: Left Right Width Center
B0: 288 352 64 320
B1: 288 344 56 316
Mc0C2.R1: Left Right Width Center
B0: 296 360 64 328
B1: 304 368 64 336
Mc0C3.R1: Left Right Width Center
B0: 272 336 64 304
B1: 272 336 64 304
Mc1C0.R1: Left Right Width Center
B0: 272 336 64 304
B1: 272 336 64 304
Mc1C1.R1: Left Right Width Center
B0: 312 376 64 344
B1: 304 368 64 336
Mc1C2.R1: Left Right Width Center
B0: 344 408 64 376
B1: 352 416 64 384
Mc1C3.R1: Left Right Width Center
B0: 280 344 64 312
B1: 296 360 64 328
Step 2: Move cycle delay from Byte to Channel
Mc0.C0
Mc0.C1
Mc0.C2
Mc0.C3
Mc1.C0
Mc1.C1
Mc1.C2
Mc1.C3
Step 3: Quarter Preamble - Walk Backwards (In PI ticks)
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H 0 H H
-128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H -128 H H
-256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H -256 H H
-384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H -384 H H
-512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H -512 H H
-640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H -640 H H
-768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H -768 H H
-896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H -896 H H
-1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H -1024 H H
-1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H -1152 H H
-1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H -1280 H H
-1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H -1408 H H
-1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H -1536 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1664 H H -1664 H H -1664 H H -1664 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1792 H H -1792 H H -1792 H H -1792 H H
-1664 L L -1664 L L -1664 L L -1664 L L -1920 L L -1920 L L -1920 L L -1920 L L
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 368
B1: 368
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 320
B1: 316
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 328
B1: 336
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 304
B1: 304
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 304
B1: 304
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 344
B1: 336
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 376
B1: 384
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 312
B1: 328
Step 4: Add 1qclk.
W Mc0.C0.R1.S0 RecEnDelay: 432 (0x1B0)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R1.S1 RecEnDelay: 432 (0x1B0)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1.S2 RecEnDelay: 384 (0x180)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R1.S3 RecEnDelay: 380 (0x17C)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C0.R1.S4 RecEnDelay: 392 (0x188)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R1.S5 RecEnDelay: 400 (0x190)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C0.R1.S6 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R1.S7 RecEnDelay: 368 (0x170)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc1.C1.R1.S0 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R1.S1 RecEnDelay: 368 (0x170)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C1.R1.S2 RecEnDelay: 408 (0x198)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R1.S3 RecEnDelay: 400 (0x190)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C1.R1.S4 RecEnDelay: 440 (0x1B8)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R1.S5 RecEnDelay: 448 (0x1C0)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C1.R1.S6 RecEnDelay: 376 (0x178)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R1.S7 RecEnDelay: 392 (0x188)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
Step 5: Walk forward to find rising edge
ChResult[Mc0][Ch0]: 0x3
ChResult[Mc0][Ch1]: 0x3
ChResult[Mc0][Ch2]: 0x3
ChResult[Mc0][Ch3]: 0x3
ChResult[Mc1][Ch0]: 0x3
ChResult[Mc1][Ch1]: 0x3
ChResult[Mc1][Ch2]: 0x3
ChResult[Mc1][Ch3]: 0x3
Step 6: Mid Preamble
Mc0.Ch0: Preamble Increment
B0, IncPreAmble 29
B1, IncPreAmble 29
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 366
B1: 366
Mc0.Ch1: Preamble Increment
B0, IncPreAmble 24
B1, IncPreAmble 26
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 313
B1: 311
Mc0.Ch2: Preamble Increment
B0, IncPreAmble 24
B1, IncPreAmble 25
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 321
B1: 330
Mc0.Ch3: Preamble Increment
B0, IncPreAmble 29
B1, IncPreAmble 24
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 302
B1: 297
Mc1.Ch0: Preamble Increment
B0, IncPreAmble 33
B1, IncPreAmble 33
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 306
B1: 306
Mc1.Ch1: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 23
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 338
B1: 328
Mc1.Ch2: Preamble Increment
B0, IncPreAmble 25
B1, IncPreAmble 25
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 370
B1: 378
Mc1.Ch3: Preamble Increment
B0, IncPreAmble 28
B1, IncPreAmble 20
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 309
B1: 317
W Mc0.C0.S0 GsmIocForceOdtOn: 1
W Mc0.C0.S1 GsmIocForceOdtOn: 1
W Mc0.C0.S2 GsmIocForceOdtOn: 1
W Mc0.C0.S3 GsmIocForceOdtOn: 1
W Mc0.C0.S4 GsmIocForceOdtOn: 1
W Mc0.C0.S5 GsmIocForceOdtOn: 1
W Mc0.C0.S6 GsmIocForceOdtOn: 1
W Mc0.C0.S7 GsmIocForceOdtOn: 1
W Mc1.C1.S0 GsmIocForceOdtOn: 1
W Mc1.C1.S1 GsmIocForceOdtOn: 1
W Mc1.C1.S2 GsmIocForceOdtOn: 1
W Mc1.C1.S3 GsmIocForceOdtOn: 1
W Mc1.C1.S4 GsmIocForceOdtOn: 1
W Mc1.C1.S5 GsmIocForceOdtOn: 1
W Mc1.C1.S6 GsmIocForceOdtOn: 1
W Mc1.C1.S7 GsmIocForceOdtOn: 1
Step 7: Program RcvEn Delays and Rx FIFO Timing
W Mc0.C0 RoundTripIoComp: 18 (0x12)
W Mc0.C0 RxDqDataValidDclkDelay: 25 (0x19)
W Mc0.C0.R0 RxIoTclDelay: 0
W Mc0.C0.R0 RxFifoRdEnTclDelay: 8
W Mc0.C0.R0 RoundTripDelay: 88 (0x58)
W Mc0.C0.R0.S0 RecEnDelay: 494 (0x1EE)
W Mc0.C0.R0.S0 RxFlybyDelay: 4
W Mc0.C0.R0.S1 RecEnDelay: 495 (0x1EF)
W Mc0.C0.R0.S1 RxFlybyDelay: 4
W Mc0.C0.R1 RxIoTclDelay: 0
W Mc0.C0.R1 RxFifoRdEnTclDelay: 8
W Mc0.C0.R1 RoundTripDelay: 88 (0x58)
W Mc0.C0.R1.S0 RecEnDelay: 494 (0x1EE)
W Mc0.C0.R0.S0 RxFlybyDelay: 6
W Mc0.C0.R1.S1 RecEnDelay: 494 (0x1EE)
W Mc0.C0.R0.S1 RxFlybyDelay: 6
W Mc0.C1 RoundTripIoComp: 17 (0x11)
W Mc0.C1 RxDqDataValidDclkDelay: 24 (0x18)
W Mc0.C1.R0 RxIoTclDelay: 0
W Mc0.C1.R0 RxFifoRdEnTclDelay: 9
W Mc0.C1.R0 RoundTripDelay: 87 (0x57)
W Mc0.C0.R0.S2 RecEnDelay: 572 (0x23C)
W Mc0.C0.R0.S2 RxFlybyDelay: 4
W Mc0.C0.R0.S3 RecEnDelay: 570 (0x23A)
W Mc0.C0.R0.S3 RxFlybyDelay: 4
W Mc0.C1.R1 RxIoTclDelay: 0
W Mc0.C1.R1 RxFifoRdEnTclDelay: 9
W Mc0.C1.R1 RoundTripDelay: 87 (0x57)
W Mc0.C0.R1.S2 RecEnDelay: 569 (0x239)
W Mc0.C0.R0.S2 RxFlybyDelay: 8
W Mc0.C0.R1.S3 RecEnDelay: 567 (0x237)
W Mc0.C0.R0.S3 RxFlybyDelay: 8
W Mc0.C2 RoundTripIoComp: 18 (0x12)
W Mc0.C2 RxDqDataValidDclkDelay: 25 (0x19)
W Mc0.C2.R0 RxIoTclDelay: 0
W Mc0.C2.R0 RxFifoRdEnTclDelay: 8
W Mc0.C2.R0 RoundTripDelay: 88 (0x58)
W Mc0.C0.R0.S4 RecEnDelay: 450 (0x1C2)
W Mc0.C0.R0.S4 RxFlybyDelay: 4
W Mc0.C0.R0.S5 RecEnDelay: 458 (0x1CA)
W Mc0.C0.R0.S5 RxFlybyDelay: 4
W Mc0.C2.R1 RxIoTclDelay: 0
W Mc0.C2.R1 RxFifoRdEnTclDelay: 8
W Mc0.C2.R1 RoundTripDelay: 88 (0x58)
W Mc0.C0.R1.S4 RecEnDelay: 449 (0x1C1)
W Mc0.C0.R0.S4 RxFlybyDelay: 6
W Mc0.C0.R1.S5 RecEnDelay: 458 (0x1CA)
W Mc0.C0.R0.S5 RxFlybyDelay: 6
W Mc0.C3 RoundTripIoComp: 17 (0x11)
W Mc0.C3 RxDqDataValidDclkDelay: 24 (0x18)
W Mc0.C3.R0 RxIoTclDelay: 0
W Mc0.C3.R0 RxFifoRdEnTclDelay: 9
W Mc0.C3.R0 RoundTripDelay: 87 (0x57)
W Mc0.C0.R0.S6 RecEnDelay: 560 (0x230)
W Mc0.C0.R0.S6 RxFlybyDelay: 4
W Mc0.C0.R0.S7 RecEnDelay: 554 (0x22A)
W Mc0.C0.R0.S7 RxFlybyDelay: 4
W Mc0.C3.R1 RxIoTclDelay: 0
W Mc0.C3.R1 RxFifoRdEnTclDelay: 9
W Mc0.C3.R1 RoundTripDelay: 87 (0x57)
W Mc0.C0.R1.S6 RecEnDelay: 558 (0x22E)
W Mc0.C0.R0.S6 RxFlybyDelay: 8
W Mc0.C0.R1.S7 RecEnDelay: 553 (0x229)
W Mc0.C0.R0.S7 RxFlybyDelay: 8
W Mc1.C4 RoundTripIoComp: 15 (0xF)
W Mc1.C4 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C4.R0 RxIoTclDelay: 0
W Mc1.C4.R0 RxFifoRdEnTclDelay: 9
W Mc1.C0.R0 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R0.S0 RecEnDelay: 554 (0x22A)
W Mc1.C1.R0.S0 RxFlybyDelay: 4
W Mc1.C1.R0.S1 RecEnDelay: 555 (0x22B)
W Mc1.C1.R0.S1 RxFlybyDelay: 4
W Mc1.C4.R1 RxIoTclDelay: 0
W Mc1.C4.R1 RxFifoRdEnTclDelay: 9
W Mc1.C0.R1 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R1.S0 RecEnDelay: 562 (0x232)
W Mc1.C1.R0.S0 RxFlybyDelay: 8
W Mc1.C1.R1.S1 RecEnDelay: 562 (0x232)
W Mc1.C1.R0.S1 RxFlybyDelay: 8
W Mc1.C5 RoundTripIoComp: 15 (0xF)
W Mc1.C5 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C5.R0 RxIoTclDelay: 0
W Mc1.C5.R0 RxFifoRdEnTclDelay: 10 (0xA)
W Mc1.C1.R0 RoundTripDelay: 80 (0x50)
W Mc1.C1.R0.S2 RecEnDelay: 582 (0x246)
W Mc1.C1.R0.S2 RxFlybyDelay: 4
W Mc1.C1.R0.S3 RecEnDelay: 572 (0x23C)
W Mc1.C1.R0.S3 RxFlybyDelay: 4
W Mc1.C5.R1 RxIoTclDelay: 0
W Mc1.C5.R1 RxFifoRdEnTclDelay: 10 (0xA)
W Mc1.C1.R1 RoundTripDelay: 80 (0x50)
W Mc1.C1.R1.S2 RecEnDelay: 594 (0x252)
W Mc1.C1.R0.S2 RxFlybyDelay: 8
W Mc1.C1.R1.S3 RecEnDelay: 584 (0x248)
W Mc1.C1.R0.S3 RxFlybyDelay: 8
W Mc1.C6 RoundTripIoComp: 16 (0x10)
W Mc1.C6 RxDqDataValidDclkDelay: 21 (0x15)
W Mc1.C6.R0 RxIoTclDelay: 0
W Mc1.C6.R0 RxFifoRdEnTclDelay: 8
W Mc1.C2.R0 RoundTripDelay: 80 (0x50)
W Mc1.C1.R0.S4 RecEnDelay: 488 (0x1E8)
W Mc1.C1.R0.S4 RxFlybyDelay: 4
W Mc1.C1.R0.S5 RecEnDelay: 496 (0x1F0)
W Mc1.C1.R0.S5 RxFlybyDelay: 4
W Mc1.C6.R1 RxIoTclDelay: 0
W Mc1.C6.R1 RxFifoRdEnTclDelay: 8
W Mc1.C2.R1 RoundTripDelay: 80 (0x50)
W Mc1.C1.R1.S4 RecEnDelay: 498 (0x1F2)
W Mc1.C1.R0.S4 RxFlybyDelay: 6
W Mc1.C1.R1.S5 RecEnDelay: 506 (0x1FA)
W Mc1.C1.R0.S5 RxFlybyDelay: 6
W Mc1.C7 RoundTripIoComp: 15 (0xF)
W Mc1.C7 RxDqDataValidDclkDelay: 20 (0x14)
W Mc1.C7.R0 RxIoTclDelay: 0
W Mc1.C7.R0 RxFifoRdEnTclDelay: 9
W Mc1.C3.R0 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R0.S6 RecEnDelay: 559 (0x22F)
W Mc1.C1.R0.S6 RxFlybyDelay: 4
W Mc1.C1.R0.S7 RecEnDelay: 566 (0x236)
W Mc1.C1.R0.S7 RxFlybyDelay: 4
W Mc1.C7.R1 RxIoTclDelay: 0
W Mc1.C7.R1 RxFifoRdEnTclDelay: 9
W Mc1.C3.R1 RoundTripDelay: 79 (0x4F)
W Mc1.C1.R1.S6 RecEnDelay: 565 (0x235)
W Mc1.C1.R0.S6 RxFlybyDelay: 8
W Mc1.C1.R1.S7 RecEnDelay: 573 (0x23D)
W Mc1.C1.R0.S7 RxFlybyDelay: 8
Adjusted Receive Enable Settings.
Mc0.Ch0.R0:
RecEnDelay Mc 0 Channel 0 Rank 0:
B0: 494
B1: 495
Mc0.Ch0.R1:
RecEnDelay Mc 0 Channel 0 Rank 1:
B0: 494
B1: 494
Mc0.Ch1.R0:
RecEnDelay Mc 0 Channel 1 Rank 0:
B0: 572
B1: 570
Mc0.Ch1.R1:
RecEnDelay Mc 0 Channel 1 Rank 1:
B0: 569
B1: 567
Mc0.Ch2.R0:
RecEnDelay Mc 0 Channel 2 Rank 0:
B0: 450
B1: 458
Mc0.Ch2.R1:
RecEnDelay Mc 0 Channel 2 Rank 1:
B0: 449
B1: 458
Mc0.Ch3.R0:
RecEnDelay Mc 0 Channel 3 Rank 0:
B0: 560
B1: 554
Mc0.Ch3.R1:
RecEnDelay Mc 0 Channel 3 Rank 1:
B0: 558
B1: 553
Mc1.Ch0.R0:
RecEnDelay Mc 1 Channel 0 Rank 0:
B0: 554
B1: 555
Mc1.Ch0.R1:
RecEnDelay Mc 1 Channel 0 Rank 1:
B0: 562
B1: 562
Mc1.Ch1.R0:
RecEnDelay Mc 1 Channel 1 Rank 0:
B0: 582
B1: 572
Mc1.Ch1.R1:
RecEnDelay Mc 1 Channel 1 Rank 1:
B0: 594
B1: 584
Mc1.Ch2.R0:
RecEnDelay Mc 1 Channel 2 Rank 0:
B0: 488
B1: 496
Mc1.Ch2.R1:
RecEnDelay Mc 1 Channel 2 Rank 1:
B0: 498
B1: 506
Mc1.Ch3.R0:
RecEnDelay Mc 1 Channel 3 Rank 0:
B0: 559
B1: 566
Mc1.Ch3.R1:
RecEnDelay Mc 1 Channel 3 Rank 1:
B0: 565
B1: 573
MRC task Read Leveling training -- SUCCEEDED, Status = 0h. Stack Depth: 154060
Post Code: DD2Ah
MRC task -- CPGC-Based Read MPR training -- Started.
Setting MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 1
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
Setting MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 1
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 8
W Mc0.C0 GsmMctRDRDdr: 8
W Mc0.C1 GsmMctRDRDdg: 8
W Mc0.C1 GsmMctRDRDdr: 8
W Mc1.C0 GsmMctRDRDdg: 8
W Mc1.C0 GsmMctRDRDdr: 8
W Mc1.C1 GsmMctRDRDdg: 8
W Mc1.C1 GsmMctRDRDdr: 8
--- CPGC-based RDMPR ---
Rank = 0
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-62 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-61 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-60 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-59 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-58 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-57 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-56 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-55 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-54 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-53 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-51 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-49 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-47 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-45 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-43 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-41 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-39 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-37 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-35 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00EE 0x000000000000FFFF 0x00FF
-34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x0000000000005FFF 0x00FF 0x000000000000FFFF 0x0073 0x000000000000FFFF 0x00EE 0x0000000000007F24 0x00FF
-33 # # # # # # # # # # # # # # # # 0x000000000000FF3F 0x00FE 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x00000000000013FF 0x00FF 0x000000000000FFFF 0x0033 0x000000000000FFFF 0x00EE 0x0000000000007F20 0x00FF
-32 # # # # # # # # # . # # # # . # 0x0000000000007F1B 0x00FB 0x000000000000FFFF 0x00FF 0x000000000000FF7F 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000001F 0x00FF 0x0000000000000311 0x00DC 0x000000000000FF5C 0x00EE 0x0000000000007F00 0x00FF
-31 # # # # # # # # # . . . # # . # 0x0000000000000E03 0x003B 0x000000000000BDFF 0x00FF 0x0000000000001F7E 0x00BB 0x000000000000FFFF 0x00FF 0x0000000000000009 0x0038 0x0000000000000000 0x0000 0x000000000000FF58 0x00EE 0x0000000000006D00 0x0002
-30 . . # # # # # # . . . . . # . . 0x0000000000000000 0x0000 0x0000000000002DFF 0x00FF 0x0000000000000F76 0x0033 0x000000000000FFFF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000900 0x004E 0x0000000000000000 0x0000
-29 . . # . # # # # . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000356 0x00CE 0x000000000000F4FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-28 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-27 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-26 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-25 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-24 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-23 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-22 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x00000000000000BD 0x000E 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-21 . . # . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000020 0x0038 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-20 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-19 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000FF 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-18 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000FE 0x00FF 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-17 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000F4 0x00FC 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-16 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x00000000000000F0 0x00FC 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-15 . . . . . . # . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000010 0x000C 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-14 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-13 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-12 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-11 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-10 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-9 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-8 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-7 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-6 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-5 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-4 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-3 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-2 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
-1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
0 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
2 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
3 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
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MC0.C0.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -30 4 34 -13 19
MC0.C1.R0: Left Right Width Center RxDqsPN
B0: -20 4 24 -8 24
B1: -29 4 33 -13 19
MC0.C2.R0: Left Right Width Center RxDqsPN
B0: -28 4 32 -12 20
B1: -28 4 32 -12 20
MC0.C3.R0: Left Right Width Center RxDqsPN
B0: -14 4 18 -5 27
B1: -28 4 32 -12 20
MC1.C0.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -32 4 36 -14 18
MC1.C1.R0: Left Right Width Center RxDqsPN
B0: -31 4 35 -14 18
B1: -31 4 35 -14 18
MC1.C2.R0: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -29 4 33 -13 19
MC1.C3.R0: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -30 4 34 -13 19
--- CPGC-based RDMPR ---
Rank = 1
Channel 0 1
Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
DqsDelay
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-61 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-60 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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-58 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-57 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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-44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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-42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-41 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
-40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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-38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF
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-36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFF 0x00FF 0x000000000000FFFD 0x00FF
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-33 # # # # # # # # # # # # # # # # 0x000000000000FF5F 0x00FF 0x000000000000FFFF 0x00FF 0x0000000000007FFF 0x00FF 0x000000000000FFFF 0x00FF 0x00000000000015FF 0x00FF 0x0000000000002701 0x001E 0x000000000000FF7F 0x003F 0x000000000000FF24 0x00FF
-32 # # # # # # # # # # . . . # . # 0x000000000000FF13 0x00FE 0x000000000000FFFF 0x00FF 0x0000000000007FFF 0x00FF 0x000000000000FFFF 0x00FF 0x00000000000010FF 0x00FF 0x0000000000000000 0x0000 0x000000000000FF00 0x0038 0x000000000000FF00 0x00FF
-31 # # # # # # # # # . # . . # . # 0x000000000000FF5F 0x006E 0x000000000000FFFF 0x00FF 0x000000000000035F 0x00EE 0x000000000000FFFF 0x00FF 0x000000000000007F 0x00F9 0x0000000000000001 0x0002 0x0000000000007F00 0x0038 0x0000000000007F00 0x0077
-30 # # # # # # # # # . . . . # . # 0x0000000000000D02 0x0066 0x000000000000BFFF 0x00FF 0x000000000000035E 0x0002 0x000000000000FDFF 0x00FF 0x000000000000001F 0x0038 0x0000000000000000 0x0000 0x0000000000004D00 0x0018 0x0000000000002D00 0x0072
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-1 . . . . . . . . . . . . . . . . 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000 0x0000000000000000 0x0000
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MC0.C0.R1: Left Right Width Center RxDqsPN
B0: -29 4 33 -13 19
B1: -28 4 32 -12 20
MC0.C1.R1: Left Right Width Center RxDqsPN
B0: -21 4 25 -9 23
B1: -28 4 32 -12 20
MC0.C2.R1: Left Right Width Center RxDqsPN
B0: -28 4 32 -12 20
B1: -28 4 32 -12 20
MC0.C3.R1: Left Right Width Center RxDqsPN
B0: -15 4 19 -6 26
B1: -26 4 30 -11 21
MC1.C0.R1: Left Right Width Center RxDqsPN
B0: -28 4 32 -12 20
B1: -31 4 35 -14 18
MC1.C1.R1: Left Right Width Center RxDqsPN
B0: -30 4 34 -13 19
B1: -32 4 36 -14 18
MC1.C2.R1: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -28 4 32 -12 20
MC1.C3.R1: Left Right Width Center RxDqsPN
B0: -32 4 36 -14 18
B1: -27 4 31 -12 20
Revert MPR_TEST_REQ_DBLR.
W Mc0 GsmMccLDimmSize: 0
Revert MPR_TEST_REQ_DBLR.
W Mc1 GsmMccLDimmSize: 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task CPGC-Based Read MPR training -- SUCCEEDED, Status = 0h.
Post Code: DD2Ch
MRC task -- Jedec Write Leveling training -- Started.
Rank 0
Ch0 Ch1
WLDelay 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
192: .32 .30 .30 .32 .32 .30 .32 .30 .30 .30 .30 .30 .30 .32 .30 .32
194: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
196: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
198: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
200: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
202: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
204: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
206: .32 .32 .32 .32 .32 #4 .32 .32 .32 .32 .32 .32 .32 .32 .32 #2
208: .32 .32 .32 .32 .32 #1 .32 .32 .32 .32 #2 .32 .32 #2 .32 #0
210: #2 #3 .26 .32 .32 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
212: #0 #0 #1 .32 .29 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
214: #0 #0 #0 .32 #2 #0 #2 .32 .32 .32 #0 #2 #2 #0 #2 #0
216: #0 #0 #0 #6 #0 #0 #0 .32 .32 .32 #0 #0 #0 #0 #0 #0
218: #0 #0 #0 #0 #0 #0 #0 .25 .32 .26 #0 #0 #0 #0 #0 #0
220: #0 #0 #0 #0 #0 #0 #0 #1 #2 #2 #0 #0 #0 #0 #0 #0
222: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
224: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
226: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
228: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
230: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
232: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
234: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
236: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
238: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
240: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
242: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
244: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
246: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
248: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
250: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
252: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
254: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
256: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
258: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
260: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
262: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
264: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
266: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
268: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
270: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
272: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
274: #0 #0 #0 #0 #0 #7 #0 #0 #0 #0 #0 #0 #0 .30 #0 .29
276: #9 #0 #0 #0 #0 .31 #0 #0 #0 #0 .28 #0 #0 .32 #0 .32
278: .30 .30 #14 #0 #0 .32 #0 #0 #0 #0 .32 #0 #0 .32 #0 .32
280: .32 .32 .32 #0 #0 .32 #0 #0 #0 #0 .32 #0 #0 .32 #0 .32
282: .32 .32 .32 #0 .29 .32 .29 #0 #0 #0 .32 #11 .30 .32 .30 .32
284: .32 .32 .32 #9 .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32
286: .32 .32 .32 .32 .32 .32 .32 #0 #0 #0 .32 .32 .32 .32 .32 .32
288: .32 .32 .32 .32 .32 .32 .32 .30 #0 .27 .32 .32 .32 .32 .32 .32
290: .32 .32 .32 .32 .32 .32 .32 .32 .30 .31 .32 .32 .32 .32 .32 .32
292: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
294: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
296: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
298: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
300: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
302: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
304: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
306: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
308: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
310: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
312: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
314: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
316: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
318: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
InitPassSt InitPassEn CurrPassSt CurrPassEn LargPassSt LargPassEn
Mc0
C0
B0: 192 208 278 336 278 336
B1: 192 208 278 336 278 336
C1
B0: 192 210 280 338 280 338
B1: 192 214 286 342 286 342
C2
B0: 192 212 282 340 282 340
B1: 192 204 276 332 276 332
C3
B0: 192 212 282 340 282 340
B1: 192 218 288 346 288 346
Mc1
C0
B0: 192 218 290 346 290 346
B1: 192 218 288 346 288 346
C1
B0: 192 206 276 334 276 334
B1: 192 212 284 340 284 340
C2
B0: 192 212 282 340 282 340
B1: 192 206 274 334 274 334
C3
B0: 192 212 282 340 282 340
B1: 192 204 274 332 274 332
W Mc0.C0 GsmMccOdtOn: 0
W Mc0.C0 GsmMccMprTrainDdrOn: 0
Mc0.C0.R0: LftEdge Width
B0: 278 58
B1: 278 58
Mc0.C0.R0: DqsPi DqPi
B0: 278 310
B1: 278 310
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc0.C1.R0: LftEdge Width
B0: 280 58
B1: 286 56
Mc0.C1.R0: DqsPi DqPi
B0: 280 312
B1: 286 318
W Mc0.C1 GsmMccOdtOn: 0
W Mc0.C1 GsmMccMprTrainDdrOn: 0
Mc0.C2.R0: LftEdge Width
B0: 282 58
B1: 276 56
Mc0.C2.R0: DqsPi DqPi
B0: 282 314
B1: 276 308
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc0.C3.R0: LftEdge Width
B0: 282 58
B1: 288 58
Mc0.C3.R0: DqsPi DqPi
B0: 282 314
B1: 288 320
W Mc1.C0 GsmMccOdtOn: 0
W Mc1.C0 GsmMccMprTrainDdrOn: 0
Mc1.C0.R0: LftEdge Width
B0: 290 56
B1: 288 58
Mc1.C0.R0: DqsPi DqPi
B0: 290 322
B1: 288 320
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc1.C1.R0: LftEdge Width
B0: 276 58
B1: 284 56
Mc1.C1.R0: DqsPi DqPi
B0: 276 308
B1: 284 316
W Mc1.C1 GsmMccOdtOn: 0
W Mc1.C1 GsmMccMprTrainDdrOn: 0
Mc1.C2.R0: LftEdge Width
B0: 282 58
B1: 274 60
Mc1.C2.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc1.C3.R0: LftEdge Width
B0: 282 58
B1: 274 58
Mc1.C3.R0: DqsPi DqPi
B0: 282 314
B1: 274 306
Rank 1
Ch0 Ch1
WLDelay 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
192: .32 .30 .30 .30 .32 .30 .30 .32 .32 .32 .30 .30 .32 .30 .30 .32
194: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
196: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
198: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
200: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
202: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
204: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
206: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 #7 .32 #2
208: .32 .32 .32 .32 .32 #2 .32 .32 .32 .32 #2 .32 .32 #0 .32 #0
210: #13 #2 .32 .32 .32 #0 .32 .32 .32 .32 #0 .32 .32 #0 .32 #0
212: #1 #0 #3 .32 .32 #0 .32 .32 .32 .32 #0 .27 .32 #0 .32 #0
214: #0 #0 #0 .32 #15 #0 #6 .32 .32 .32 #0 #3 #2 #0 #5 #0
216: #0 #0 #0 .32 #2 #0 #0 .32 .32 .32 #0 #1 #0 #0 #1 #0
218: #0 #0 #0 #2 #0 #0 #0 .32 .32 #3 #0 #0 #0 #0 #0 #0
220: #0 #0 #0 #0 #0 #0 #0 #3 #9 #0 #0 #0 #0 #0 #0 #0
222: #0 #0 #0 #0 #0 #0 #0 #1 #0 #0 #0 #0 #0 #0 #0 #0
224: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
226: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
228: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
230: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
232: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
234: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
236: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
238: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
240: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
242: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
244: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
246: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
248: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
250: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
252: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
254: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
256: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
258: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
260: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
262: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
264: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
266: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
268: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
270: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
272: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0
274: #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 #0 .30 #0 .24
276: #0 #11 #0 #0 #0 .30 #0 #0 #0 #0 #0 #0 #0 .32 #0 .32
278: .30 .31 #0 #0 #0 .32 #0 #0 #0 #0 .30 #0 #0 .32 #0 .32
280: .32 .32 .29 #0 #0 .32 #0 #0 #0 #0 .32 #0 .30 .32 #0 .32
282: .32 .32 .32 #0 #0 .32 #7 #0 #0 #0 .32 #0 .32 .32 #0 .32
284: .32 .32 .32 #0 .30 .32 .30 #0 #0 #0 .32 .30 .32 .32 .30 .32
286: .32 .32 .32 .30 .32 .32 .32 #13 #0 #0 .32 .32 .32 .32 .32 .32
288: .32 .32 .32 .32 .32 .32 .32 .31 #0 #7 .32 .32 .32 .32 .32 .32
290: .32 .32 .32 .32 .32 .32 .32 .32 .30 .30 .32 .32 .32 .32 .32 .32
292: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
294: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
296: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
298: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
300: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
302: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
304: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
306: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
308: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
310: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
312: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
314: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
316: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
318: .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32 .32
InitPassSt InitPassEn CurrPassSt CurrPassEn LargPassSt LargPassEn
Mc0
C0
B0: 192 208 278 336 278 336
B1: 192 208 278 336 278 336
C1
B0: 192 210 280 338 280 338
B1: 192 216 286 344 286 344
C2
B0: 192 212 284 340 284 340
B1: 192 206 276 334 276 334
C3
B0: 192 212 284 340 284 340
B1: 192 218 288 346 288 346
Mc1
C0
B0: 192 218 290 346 290 346
B1: 192 216 290 344 290 344
C1
B0: 192 206 278 334 278 334
B1: 192 212 284 340 284 340
C2
B0: 192 212 280 340 280 340
B1: 192 204 274 332 274 332
C3
B0: 192 212 284 340 284 340
B1: 192 204 274 332 274 332
W Mc0.C0 GsmMccOdtOn: 0
W Mc0.C0 GsmMccMprTrainDdrOn: 0
Mc0.C0.R1: LftEdge Width
B0: 278 58
B1: 278 58
Mc0.C0.R1: DqsPi DqPi
B0: 278 310
B1: 278 310
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc0.C1.R1: LftEdge Width
B0: 280 58
B1: 286 58
Mc0.C1.R1: DqsPi DqPi
B0: 280 312
B1: 286 318
W Mc0.C1 GsmMccOdtOn: 0
W Mc0.C1 GsmMccMprTrainDdrOn: 0
Mc0.C2.R1: LftEdge Width
B0: 284 56
B1: 276 58
Mc0.C2.R1: DqsPi DqPi
B0: 284 316
B1: 276 308
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc0.C3.R1: LftEdge Width
B0: 284 56
B1: 288 58
Mc0.C3.R1: DqsPi DqPi
B0: 284 316
B1: 288 320
W Mc1.C0 GsmMccOdtOn: 0
W Mc1.C0 GsmMccMprTrainDdrOn: 0
Mc1.C0.R1: LftEdge Width
B0: 290 56
B1: 290 54
Mc1.C0.R1: DqsPi DqPi
B0: 290 322
B1: 290 322
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch1
Mc1.C1.R1: LftEdge Width
B0: 278 56
B1: 284 56
Mc1.C1.R1: DqsPi DqPi
B0: 278 310
B1: 284 316
W Mc1.C1 GsmMccOdtOn: 0
W Mc1.C1 GsmMccMprTrainDdrOn: 0
Mc1.C2.R1: LftEdge Width
B0: 280 60
B1: 274 58
Mc1.C2.R1: DqsPi DqPi
B0: 280 312
B1: 274 306
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccOdtOn(491), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccMprTrainDdrOn(492), Ch3
Mc1.C3.R1: LftEdge Width
B0: 284 56
B1: 274 58
Mc1.C3.R1: DqsPi DqPi
B0: 284 316
B1: 274 306
MRC task Jedec Write Leveling training -- SUCCEEDED, Status = 0h.
Post Code: DD4Eh
MRC task -- Write Leveling FlyBy training -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Params : DqSweepStart: -52, DqSweepStop: 18, DQ_SWEEP_STEP: 2
Rank 0
Params : MaxDec: 18, MaxAdd: 14, PiCycleDec: 2, PiCycleAdd: 13
MinCode: 274, MaxCode: 322, Start: -20, End: 27
Sweep through the cycle offsets until we find a value that passes
Channel 0 1
Delay DqOffset Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
-20 -52 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -50 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -48 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -46 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -44 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -42 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -40 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -38 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -36 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -34 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -32 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -30 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -28 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -26 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -24 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -22 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -20 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -18 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -16 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -14 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -12 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -10 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 -2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 0 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 2 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 4 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 6 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
-20 8 # # # # # # # # # # # # # # # # 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF 0x000000000000FFFF
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Rank 1
Params : MaxDec: 18, MaxAdd: 14, PiCycleDec: 2, PiCycleAdd: 13
MinCode: 274, MaxCode: 322, Start: -20, End: 27
Sweep through the cycle offsets until we find a value that passes
Channel 0 1
Delay DqOffset Byte 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7
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255
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267
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W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Leveling FlyBy training -- SUCCEEDED, Status = 0h.
Post Code: DD2Eh
MRC task -- Write Timing Centering -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
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73 # # # # # # # # # # # # # # # # 0x17EC_0 0x1B43_0 0x17EC_0 0x1B8F_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
74 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BA8_0 0x17EC_0 0x1BC3_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
75 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BCD_0 0x17EC_0 0x1BCF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
76 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BD2_0 0x17EC_0 0x1BCF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
77 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BD8_0 0x17EE_0 0x1BDA_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
78 # # # # # # # # # # # # # # # # 0x182F_0 0x1BE0_0 0x17EE_0 0x1C0A_0 0x17EC_0 0x17EC_0 0x17F2_0 0x1804_0
79 # # # # # # # # # # # # # # # # 0x1919_0 0x1BE3_0 0x1826_0 0x1C8D_0 0x17EC_0 0x18A6_0 0x18D4_0 0x18F8_0
80 # # # # # # # # # # # # # # # # 0x1A6B_0 0x1BE6_0 0x1ADC_0 0x1CE9_0 0x17EE_0 0x1B6B_0 0x19CD_0 0x19E4_0
81 # # # # # # # # # # # # # # # # 0x1B93_0 0x1ABB_0 0x1BD5_0 0x1D21_0 0x187C_0 0x1C09_0 0x1B33_0 0x1B36_0
82 # # # # # # # # # # # # # # # # 0x1C57_0 0x18E4_0 0x1C2D_0 0x1BF4_0 0x1B83_0 0x1C43_0 0x1C5C_0 0x1BE7_0
83 # # # # # # # # # # # # # # # # 0x1C87_0 0x1864_0 0x1C6A_0 0x1A1F_0 0x1B43_0 0x1C5D_0 0x1BE3_0 0x1C12_0
84 # # # # # # # # # # # # # # # # 0x1C76_0 0x1837_0 0x1C41_0 0x185D_0 0x19EB_0 0x1CB8_0 0x1A61_0 0x1C6D_0
85 # # # # # # # # # # # # # # # # 0x1B5E_0 0x183D_0 0x1AF1_0 0x182F_0 0x190C_0 0x1C10_0 0x1924_0 0x1C92_0
86 # # # # # # # # # # # # # # # # 0x18E1_0 0x1815_0 0x1923_0 0x17F6_0 0x1858_0 0x1AE0_0 0x1878_0 0x1A6E_0
Mc0.C0.R0: Left Right Width Center
B0: -37 13 50 -12
B1: -40 11 51 -15
Mc0.C1.R0: Left Right Width Center
B0: -40 4 44 -18
B1: -39 11 50 -14
Mc0.C2.R0: Left Right Width Center
B0: -38 15 53 -12
B1: -39 11 50 -14
Mc0.C3.R0: Left Right Width Center
B0: -40 2 42 -19
B1: -38 12 50 -13
Mc1.C0.R0: Left Right Width Center
B0: -38 15 53 -12
B1: -39 15 54 -12
Mc1.C1.R0: Left Right Width Center
B0: -40 12 52 -14
B1: -36 15 51 -11
Mc1.C2.R0: Left Right Width Center
B0: -38 13 51 -13
B1: -40 13 53 -14
Mc1.C3.R0: Left Right Width Center
B0: -36 16 52 -10
B1: -38 13 51 -13
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-86 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-85 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-84 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-83 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-82 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-80 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-78 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-72 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-71 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-70 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-69 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-68 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-67 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-66 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-65 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-64 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-63 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-62 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-61 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-60 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-59 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-57 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
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-55 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-54 # # # # # # # # # # # # # # # # 0x17EF_0 0x17EA_0 0x17EF_0 0x17E4_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-53 # # # # # # # # # # # # # # # # 0x17ED_0 0x17DD_0 0x17EF_0 0x17CB_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-52 # # # # # # # # # # # # # # # # 0x17E9_0 0x17B3_0 0x17EB_0 0x178A_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-51 # # # # # # # # # # # # # # # # 0x17D9_0 0x17A3_0 0x17D8_0 0x174B_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-50 # # # # # # # # # # # # # # # # 0x17C3_0 0x1751_0 0x17C3_0 0x170F_0 0x17EF_0 0x17EF_0 0x17EF_0 0x17EF_0
-49 # # # # # # # # # # # # # # # # 0x17A9_0 0x167C_0 0x17A5_0 0x1592_0 0x17EF_0 0x17EF_0 0x17EC_0 0x17EE_0
-48 # # # # # # # # # # # # # # # # 0x1788_0 0x1398_0 0x1751_0 0xC8D_0 0x17EF_0 0x17EC_0 0x17D4_0 0x17E8_0
-47 # # # # # # # # # # # # # # # # 0x16DD_0 0xD1E_0 0x16B4_0 0x7FA_0 0x17DA_0 0x17E3_0 0x17B9_0 0x17D6_0
-46 # # # # # # # # # # # # # # # # 0x1595_0 0x7B2_0 0x1403_0 0x592_0 0x178E_0 0x17BD_0 0x17A1_0 0x17C7_0
-45 # # # # # # # # # # # # # # # # 0x11A6_0 0x572_0 0xEFE_0 0x2B4_0 0x173E_0 0x17AC_0 0x175B_0 0x17AB_0
-44 # # # # # # # # # # # # # # # # 0xD89_0 0x3D0_0 0x76E_0 0x62_0 0x16A2_0 0x17A1_0 0x1665_0 0x176C_0
-43 # # # # # # # # # # # # # # # # 0x60F_0 0x200_0 0x354_0 0xE_0 0x1120_0 0x1788_0 0x10B6_0 0x156F_0
-42 # # # # # # . # # # # # # # # # 0x148_0 0xCB_0 0x1B2_0 0x1_0 0x803_0 0x16A6_0 0xAE9_0 0xF74_0
-41 # # # # # # . . # # # # # # # # 0x41_0 0xB_0 0x1F_0 0x0_0 0x3B4_0 0x108E_0 0x574_0 0x6AF_0
-40 # . # # . . . . # # # # # # # # 0xD_0 0x4_0 0x0_0 0x0_0 0x22D_0 0x634_0 0x285_0 0x402_0
-39 # . . . . . . . # # # # # # # # 0x2_0 0x0_0 0x0_0 0x0_0 0x4D_0 0x2AF_0 0x100_0 0x1D3_0
-38 . . . . . . . . # # # # # # # # 0x0_0 0x0_0 0x0_0 0x0_0 0x4_0 0xFD_0 0x20_0 0x34_0
-37 . . . . . . . . # . # # # . . # 0x0_0 0x0_0 0x0_0 0x0_0 0x1_0 0x42_0 0x1_0 0x1_0
-36 . . . . . . . . . . . # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x9_0 0x0_0 0x0_0
-35 . . . . . . . . # . . # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x1_0 0x1_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x7_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x18E_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x6B5_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . # . . . # . . . . . . . . . 0x0_0 0x1D_0 0x0_0 0xB68_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . # . . . # . . . . . . . . . 0x0_0 0x81_0 0x0_0 0xD59_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . # . . . # . . . . . . . . . 0x0_0 0x371_0 0x0_0 0xF1E_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . # . . . # . . . . . . . . . 0x0_0 0xADC_0 0x0_0 0xFE7_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . # . . . # . . . . . . . . . 0x0_0 0xED5_0 0x0_0 0xFF3_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . # . . . # . . . . . . . . . 0x0_0 0xFCD_0 0x0_0 0xFF3_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . # . . . # . . . . . . . . . 0x0_0 0xFF4_0 0x0_0 0xFFF_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . # . # # # # . . . . . . . . 0x0_0 0xFFD_0 0x7_0 0x1136_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . # # # # # # # . . . . . . . . 0x1_0 0x100E_0 0xBE_0 0x134A_0 0x0_0 0x0_0 0x0_0 0x0_0
14 # # # # # # # # . . . . . . . # 0x199_0 0x1057_0 0x42F_0 0x14EB_0 0x0_0 0x0_0 0x0_0 0x1_0
15 # # # # # # # # . . . . . # . # 0x6A3_0 0x1180_0 0xA53_0 0x16DE_0 0x0_0 0x0_0 0x3_0 0x21_0
16 # # # # # # # # . . # . . # . # 0xA73_0 0x13F7_0 0x104E_0 0x17D5_0 0x0_0 0x2_0 0x14_0 0x104_0
17 # # # # # # # # # . # # # # # # 0xF97_0 0x1678_0 0x1351_0 0x17EB_0 0x1_0 0x67_0 0x1B4_0 0x561_0
18 # # # # # # # # # # # . # # # # 0x12A4_0 0x174E_0 0x1497_0 0x17EC_0 0x142_0 0x6AF_0 0x92E_0 0xD22_0
19 # # # # # # # # # # # # # # # # 0x14DE_0 0x17DB_0 0x163D_0 0x17EC_0 0xAFD_0 0xE19_0 0xE4D_0 0xFAB_0
20 # # # # # # # # # # # # # # # # 0x15C8_0 0x17EB_0 0x1757_0 0x17EC_0 0xF4F_0 0x1002_0 0x10B8_0 0x10AB_0
21 # # # # # # # # # # # # # # # # 0x1748_0 0x17EC_0 0x17EC_0 0x17EC_0 0x1448_0 0x121D_0 0x1477_0 0x12BE_0
22 # # # # # # # # # # # # # # # # 0x17E8_0 0x17EC_0 0x17EA_0 0x17EC_0 0x16E2_0 0x13B7_0 0x1633_0 0x1458_0
23 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17E4_0 0x1693_0 0x17D9_0 0x1748_0
24 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x1788_0 0x17EC_0 0x17E1_0
25 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
26 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
27 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
28 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
29 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
30 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
31 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
32 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
33 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
34 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
35 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
36 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
37 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
38 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
39 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
40 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
41 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
42 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
43 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
44 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
45 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
46 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
47 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
48 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
49 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
50 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
51 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
52 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
53 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
54 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
55 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
56 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
57 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
58 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
59 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
60 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
61 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
62 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
63 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
64 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
65 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17ED_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
66 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x17F1_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
67 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x185F_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
68 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EC_0 0x17EC_0 0x1940_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
69 # # # # # # # # # # # # # # # # 0x17EC_0 0x17EF_0 0x17EC_0 0x1AAB_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
70 # # # # # # # # # # # # # # # # 0x17EC_0 0x1803_0 0x17EC_0 0x1B0F_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
71 # # # # # # # # # # # # # # # # 0x17EC_0 0x18A0_0 0x17EC_0 0x1B94_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
72 # # # # # # # # # # # # # # # # 0x17EC_0 0x1A95_0 0x17EC_0 0x1BC8_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
73 # # # # # # # # # # # # # # # # 0x17EC_0 0x1B72_0 0x17EC_0 0x1BCF_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
74 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BC2_0 0x17EC_0 0x1BD0_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
75 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BCE_0 0x17EC_0 0x1BD3_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
76 # # # # # # # # # # # # # # # # 0x17EC_0 0x1BD0_0 0x17ED_0 0x1C06_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
77 # # # # # # # # # # # # # # # # 0x17F0_0 0x1BD6_0 0x1819_0 0x1C7E_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17EC_0
78 # # # # # # # # # # # # # # # # 0x1820_0 0x1BEA_0 0x1896_0 0x1CDB_0 0x17EC_0 0x17EC_0 0x17EC_0 0x17ED_0
79 # # # # # # # # # # # # # # # # 0x1975_0 0x1BF8_0 0x1A3C_0 0x1CE4_0 0x17EC_0 0x17EC_0 0x17ED_0 0x17F9_0
80 # # # # # # # # # # # # # # # # 0x1A95_0 0x1C15_0 0x1BFA_0 0x1B3E_0 0x17EC_0 0x17EC_0 0x17EC_0 0x1813_0
81 # # # # # # # # # # # # # # # # 0x1B85_0 0x1AE1_0 0x1C4D_0 0x19A2_0 0x17ED_0 0x181A_0 0x1881_0 0x1999_0
82 # # # # # # # # # # # # # # # # 0x1C09_0 0x18D2_0 0x1C33_0 0x18FD_0 0x182B_0 0x1970_0 0x19F9_0 0x1B0A_0
83 # # # # # # # # # # # # # # # # 0x1B43_0 0x184B_0 0x1AAE_0 0x1870_0 0x1AE8_0 0x1B49_0 0x1B7F_0 0x1BC4_0
84 # # # # # # # # # # # # # # # # 0x1AA7_0 0x1844_0 0x1980_0 0x1801_0 0x1B84_0 0x1BB2_0 0x1BD9_0 0x1BF6_0
85 # # # # # # # # # # # # # # # # 0x18B8_0 0x183D_0 0x184C_0 0x17E8_0 0x1A88_0 0x1C31_0 0x1AC4_0 0x1BB6_0
86 # # # # # # # # # # # # # # # # 0x1810_0 0x181B_0 0x181B_0 0x17E6_0 0x1928_0 0x1C86_0 0x1A09_0 0x1A6F_0
Mc0.C0.R1: Left Right Width Center
B0: -38 13 51 -13
B1: -40 12 52 -14
Mc0.C1.R1: Left Right Width Center
B0: -39 3 42 -18
B1: -39 12 51 -14
Mc0.C2.R1: Left Right Width Center
B0: -40 11 51 -15
B1: -40 11 51 -15
Mc0.C3.R1: Left Right Width Center
B0: -42 0 42 -21
B1: -41 11 52 -15
Mc1.C0.R1: Left Right Width Center
B0: -34 16 50 -9
B1: -37 17 54 -10
Mc1.C1.R1: Left Right Width Center
B0: -36 15 51 -11
B1: -34 16 50 -9
Mc1.C2.R1: Left Right Width Center
B0: -36 16 52 -10
B1: -37 14 51 -12
Mc1.C3.R1: Left Right Width Center
B0: -37 16 53 -11
B1: -36 13 49 -12
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD4Bh
MRC task -- Write Voltage Centering -- Started.
R Mc0.C0 GsmMctRDRDdg: 16 (0x10)
R Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C0 GsmMctRDRDdg: 32 (0x20)
W Mc0.C0 GsmMctRDRDdr: 32 (0x20)
R Mc0.C1 GsmMctRDRDdg: 16 (0x10)
R Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 32 (0x20)
W Mc0.C1 GsmMctRDRDdr: 32 (0x20)
R Mc1.C0 GsmMctRDRDdg: 16 (0x10)
R Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 32 (0x20)
W Mc1.C0 GsmMctRDRDdr: 32 (0x20)
R Mc1.C1 GsmMctRDRDdg: 16 (0x10)
R Mc1.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 32 (0x20)
W Mc1.C1 GsmMctRDRDdr: 32 (0x20)
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
WriteVoltage
-40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc1.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc1.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
WriteVoltage
-40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 0 Summary :
-40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 1 Summary :
-40 40 80 0
Mc1.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 2 Summary :
-40 40 80 0
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Channel 3 Summary :
-40 40 80 0
W Mc0.C0 GsmMctRDRDdg: 16 (0x10)
W Mc0.C0 GsmMctRDRDdr: 16 (0x10)
W Mc0.C1 GsmMctRDRDdg: 16 (0x10)
W Mc0.C1 GsmMctRDRDdr: 16 (0x10)
W Mc1.C0 GsmMctRDRDdg: 16 (0x10)
W Mc1.C0 GsmMctRDRDdr: 16 (0x10)
W Mc1.C1 GsmMctRDRDdg: 16 (0x10)
W Mc1.C1 GsmMctRDRDdr: 16 (0x10)
MRC task Write Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD57h
MRC task -- Read Voltage Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S0 RxVref: 76 (0x4C)
W Mc0.C0.S1 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S2 RxVref: 76 (0x4C)
W Mc0.C0.S3 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S4 RxVref: 76 (0x4C)
W Mc0.C0.S5 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc0.C0.S6 RxVref: 76 (0x4C)
W Mc0.C0.S7 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S0 RxVref: 76 (0x4C)
W Mc1.C1.S1 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S2 RxVref: 76 (0x4C)
W Mc1.C1.S3 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S4 RxVref: 76 (0x4C)
W Mc1.C1.S5 RxVref: 76 (0x4C)
DriverPullUp = 119, DriverPullDown = 40, ReceiverOdt = 79, Vdd = 1100, Vterm = 0
VrefType = RdV, Vref = 220
W Mc1.C1.S6 RxVref: 76 (0x4C)
W Mc1.C1.S7 RxVref: 76 (0x4C)
ReadVoltage
-63 # # # # # # # # # # # # # # # # 0x1BB0_0 0x1B37_0 0x1398_0 0x1B5B_0 0x129F_0 0x14A9_0 0x1C63_0 0x1564_0
-62 # # # # # # # # # # # # # # # # 0x1937_0 0x1A25_0 0x124B_0 0x1A16_0 0x1187_0 0x13A5_0 0x1AAA_0 0x13EE_0
-61 # # # # # # # # # # # # # # # # 0x16BA_0 0x193A_0 0x1190_0 0x192B_0 0x10B3_0 0x12AD_0 0x1885_0 0x1255_0
-60 # # # # # # # # # # # # # # # # 0x147D_0 0x185E_0 0x1115_0 0x1815_0 0xFB8_0 0x11A0_0 0x16A9_0 0x10F7_0
-59 # # # # # # # # # # # # # # # # 0x125F_0 0x1731_0 0x1064_0 0x1778_0 0xDCD_0 0x104F_0 0x14CD_0 0xFB3_0
-58 # # # # # # # # # # # # # # # # 0xF9D_0 0x1608_0 0xF2C_0 0x1667_0 0xBA7_0 0xF45_0 0x12C2_0 0xE7F_0
-57 # # # # # # # # # # # # # # # # 0xD41_0 0x14F0_0 0xE48_0 0x14D9_0 0xAA2_0 0xE27_0 0x105C_0 0xD88_0
-56 # # # # # # # # # # # # # # # # 0xB76_0 0x137D_0 0xD08_0 0x132A_0 0x940_0 0xD17_0 0xE87_0 0xC31_0
-55 # # # # # # # # # # # # # # # # 0x9A3_0 0x112B_0 0xB49_0 0x1122_0 0x709_0 0xC1B_0 0xBFF_0 0xAE6_0
-54 # # # # # # # # # # # # # # # # 0x813_0 0xF1E_0 0x96C_0 0xFA9_0 0x5B5_0 0xB44_0 0xA1B_0 0x943_0
-53 # # # # # # # # # # # # # # # # 0x693_0 0xD14_0 0x76A_0 0xE27_0 0x4D1_0 0xA58_0 0x866_0 0x741_0
-52 # # # # # # # # # # # # # # # # 0x560_0 0xBA7_0 0x5EC_0 0xD06_0 0x443_0 0x98C_0 0x720_0 0x5B9_0
-51 # # # # # # # # # # # # # # # # 0x43B_0 0xA7E_0 0x4E3_0 0xC12_0 0x402_0 0x82C_0 0x665_0 0x4B8_0
-50 # # # # # # # # # # # # # # # # 0x343_0 0x962_0 0x443_0 0xAB5_0 0x3D0_0 0x6BD_0 0x575_0 0x448_0
-49 # # # # # # # # # # # # # # # # 0x245_0 0x84E_0 0x404_0 0x98D_0 0x36B_0 0x581_0 0x47C_0 0x3A8_0
-48 # # # # # # # # # # # # # # # # 0x1A7_0 0x75E_0 0x3AC_0 0x83E_0 0x2BF_0 0x4D2_0 0x3B0_0 0x2DA_0
-47 # # # # # # # # # # # # # # # # 0x12B_0 0x5CA_0 0x2DD_0 0x6C7_0 0x190_0 0x3EC_0 0x2F7_0 0x18A_0
-46 # # # # # # # # # # # # # # # # 0x8E_0 0x452_0 0x1F7_0 0x597_0 0xAD_0 0x33E_0 0x21C_0 0xA5_0
-45 # # # # # # # # # . # # # # # # 0x2F_0 0x2FD_0 0xEA_0 0x425_0 0x37_0 0x2E3_0 0x14B_0 0x32_0
-44 # # # # # # # # # . # # # # # # 0xD_0 0x21C_0 0x40_0 0x394_0 0x20_0 0x2A6_0 0xBD_0 0xA_0
-43 # . # # . # # # # . # # # # # . 0x4_0 0x172_0 0xA_0 0x2DC_0 0x5_0 0x23A_0 0x4B_0 0x2_0
-42 . . # . . # # . # . # # # # . . 0x0_0 0x10D_0 0x1_0 0x22C_0 0x2_0 0x1DB_0 0x29_0 0x0_0
-41 . . # . . . # . # . # # # . . . 0x0_0 0xA4_0 0x0_0 0x1D8_0 0x1_0 0x14A_0 0x17_0 0x0_0
-40 . . # . . . # . . . # # # . . . 0x0_0 0x75_0 0x0_0 0x181_0 0x0_0 0xD2_0 0xF_0 0x0_0
-39 . . # . . . # . . . # . # . . . 0x0_0 0x39_0 0x0_0 0x11D_0 0x0_0 0x81_0 0xA_0 0x0_0
-38 . . # . . . # . . . # . # . . . 0x0_0 0x2A_0 0x0_0 0xD7_0 0x0_0 0x54_0 0x6_0 0x0_0
-37 . . # . . . # . . . # . # . . . 0x0_0 0x19_0 0x0_0 0xA0_0 0x0_0 0x2D_0 0x2_0 0x0_0
-36 . . # . . . # . . . # . # . . . 0x0_0 0x10_0 0x0_0 0x76_0 0x0_0 0xD_0 0x2_0 0x0_0
-35 . . # . . . # . . . # . . . . . 0x0_0 0x7_0 0x0_0 0x5B_0 0x0_0 0x1_0 0x0_0 0x0_0
-34 . . # . . . # . . . # . . . . . 0x0_0 0x6_0 0x0_0 0x42_0 0x0_0 0x1_0 0x0_0 0x0_0
-33 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x2D_0 0x0_0 0x0_0 0x0_0 0x0_0
-32 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x14_0 0x0_0 0x0_0 0x0_0 0x0_0
-31 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x16_0 0x0_0 0x0_0 0x0_0 0x0_0
-30 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0xD_0 0x0_0 0x0_0 0x0_0 0x0_0
-29 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x9_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0x6_0 0x0_0 0x0_0 0x0_0 0x0_0
-27 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
18 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
22 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
25 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
26 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
27 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x3_0 0x0_0 0x0_0 0x0_0 0x0_0
29 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
30 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
31 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x6_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xB_0 0x0_0 0x0_0 0x0_0 0x0_0
33 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x11_0 0x0_0 0x0_0 0x0_0 0x0_0
34 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x1A_0 0x0_0 0x0_0 0x0_0 0x0_0
35 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x26_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x4A_0 0x0_0 0x0_0 0x0_0 0x0_0
37 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x68_0 0x0_0 0x0_0 0x0_0 0x0_0
38 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x9E_0 0x0_0 0x0_0 0x0_0 0x0_0
39 . . # . . . # . . . . . . . . . 0x0_0 0x2_0 0x0_0 0xBD_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . # . . . # . . . # . . # . . 0x0_0 0x4_0 0x0_0 0x124_0 0x0_0 0x1_0 0x1_0 0x0_0
41 . . # . . . # . . . # . . . . . 0x0_0 0x6_0 0x0_0 0x15B_0 0x0_0 0x6_0 0x0_0 0x0_0
42 . . # . . . # . . . # . # . . . 0x0_0 0x6_0 0x0_0 0x1BA_0 0x0_0 0x1A_0 0x1_0 0x0_0
43 . . # . . . # . . . # # # . . . 0x0_0 0x18_0 0x0_0 0x205_0 0x0_0 0x51_0 0x4_0 0x0_0
44 . # # # . . # . . . # # # . . . 0x1_0 0x19_0 0x0_0 0x283_0 0x0_0 0x94_0 0x7_0 0x0_0
45 . # # . . # # . . . # # # # . . 0x1_0 0x3D_0 0x8_0 0x2FB_0 0x0_0 0x135_0 0x1B_0 0x0_0
46 . # # # . # # . . . # # # # . . 0x1_0 0x5F_0 0x14_0 0x355_0 0x0_0 0x1CA_0 0x1F_0 0x0_0
47 . # # # . # # # . . # # # # . # 0x1_0 0xA7_0 0x51_0 0x3F9_0 0x0_0 0x308_0 0x4B_0 0x2_0
48 # # # # # # # # . . # # # # . # 0x3_0 0x11A_0 0xC0_0 0x4AB_0 0x0_0 0x428_0 0x87_0 0x4_0
49 # # # # # # # # . . # # # # . # 0x15_0 0x1F2_0 0x1A8_0 0x56B_0 0x0_0 0x56D_0 0xFE_0 0xA_0
50 # # # # # # # # . . # # # # . # 0x21_0 0x298_0 0x2CA_0 0x611_0 0x0_0 0x630_0 0x18F_0 0x33_0
51 # # # # # # # # # . # # # # # # 0x48_0 0x403_0 0x429_0 0x752_0 0x1_0 0x711_0 0x2E8_0 0xC6_0
52 # # # # # # # # # . # # # # # # 0x6E_0 0x4CB_0 0x4F7_0 0x813_0 0x2_0 0x7F6_0 0x43D_0 0x169_0
53 # # # # # # # # # # # # # # # # 0x12B_0 0x783_0 0x6C3_0 0x9ED_0 0x1F_0 0x93F_0 0x68D_0 0x2AF_0
54 # # # # # # # # # # # # # # # # 0x1D0_0 0x8E5_0 0x7A1_0 0xB1C_0 0x3A_0 0xA11_0 0x82C_0 0x392_0
55 # # # # # # # # # # # # # # # # 0x3B6_0 0xB9E_0 0x8CD_0 0xD01_0 0xC3_0 0xB1E_0 0x9F5_0 0x48C_0
56 # # # # # # # # # # # # # # # # 0x519_0 0xD3D_0 0x9DA_0 0xE52_0 0x198_0 0xBE2_0 0xBD2_0 0x565_0
57 # # # # # # # # # # # # # # # # 0x949_0 0xFD0_0 0xBC6_0 0x10C8_0 0x45E_0 0xD29_0 0xE1D_0 0x63B_0
58 # # # # # # # # # # # # # # # # 0xB8C_0 0x1124_0 0xD24_0 0x129A_0 0x6EB_0 0xE01_0 0x1031_0 0x746_0
59 # # # # # # # # # # # # # # # # 0xE7D_0 0x12B0_0 0xF05_0 0x1478_0 0x951_0 0xEF7_0 0x1222_0 0x8F5_0
60 # # # # # # # # # # # # # # # # 0xFF8_0 0x1351_0 0xFD7_0 0x156C_0 0xAAA_0 0xFD4_0 0x13C4_0 0xA48_0
61 # # # # # # # # # # # # # # # # 0x1275_0 0x149E_0 0x1140_0 0x16DD_0 0xC9F_0 0x1131_0 0x15EF_0 0xC24_0
62 # # # # # # # # # # # # # # # # 0x1430_0 0x1587_0 0x1214_0 0x186B_0 0xF3E_0 0x124B_0 0x17D4_0 0xD84_0
63 # # # # # # # # # # # # # # # # 0x1654_0 0x16FB_0 0x138A_0 0x1A95_0 0x1298_0 0x13A4_0 0x19DD_0 0xF1F_0
Mc0.C0.R0: Left Right Width Center
B0: -42 47 89 2
B1: -43 43 86 0
Mc0.C1.R0: Left Right Width Center
B0: -26 37 63 5
B1: -42 43 85 0
Mc0.C2.R0: Left Right Width Center
B0: -43 47 90 2
B1: -41 44 85 1
Mc0.C3.R0: Left Right Width Center
B0: -21 26 47 2
B1: -42 46 88 2
Mc1.C0.R0: Left Right Width Center
B0: -40 50 90 5
B1: -45 52 97 3
Mc1.C1.R0: Left Right Width Center
B0: -33 39 72 3
B1: -39 42 81 1
Mc1.C2.R0: Left Right Width Center
B0: -35 41 76 3
B1: -41 39 80 -1
Mc1.C3.R0: Left Right Width Center
B0: -42 50 92 4
B1: -43 46 89 1
MRC task Read Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD2Fh
MRC task -- Read Timing Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-62 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-61 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-60 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-59 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-58 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-57 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-56 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-55 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-54 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-53 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-52 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-51 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-50 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-49 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-48 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-47 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-46 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-45 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17D7_0 0x17ED_0 0x17ED_0
-44 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17E6_0 0x17ED_0 0x17ED_0 0x17A2_0 0x17ED_0 0x17ED_0
-43 # # # # # # # # # # # # # # # # 0x17EC_0 0x17ED_0 0x17CE_0 0x17ED_0 0x17ED_0 0x16F2_0 0x17E7_0 0x17D5_0
-42 # # # # # # # # # # # # # # # # 0x17E6_0 0x17ED_0 0x178A_0 0x17ED_0 0x17ED_0 0x1621_0 0x17DC_0 0x1767_0
-41 # # # # # # # # # # # # # # # # 0x17D8_0 0x17ED_0 0x1739_0 0x17ED_0 0x17EB_0 0x157A_0 0x17BF_0 0x168B_0
-40 # # # # # # # # # # # # # # # # 0x17B0_0 0x17DC_0 0x1635_0 0x17ED_0 0x17DF_0 0x13E6_0 0x1738_0 0x1500_0
-39 # # # # # # # # # # # # # # # # 0x178D_0 0x17AF_0 0x1539_0 0x17ED_0 0x177D_0 0x122C_0 0x168B_0 0x1383_0
-38 # # # # # # # # # # # # # # # # 0x16C4_0 0x16DC_0 0x12AE_0 0x17D5_0 0x1608_0 0xF40_0 0x1537_0 0x1164_0
-37 # # # # # # # # # # # # # # # # 0x158B_0 0x163D_0 0xFF7_0 0x17A0_0 0x145D_0 0xC43_0 0x13EC_0 0xEF0_0
-36 # # # # # # # # # # # # # # # # 0x12AE_0 0x153A_0 0xCAF_0 0x174D_0 0x1200_0 0x81F_0 0x122B_0 0xA03_0
-35 # # # # # # # # # # # # # # # # 0xEF0_0 0x145C_0 0x991_0 0x169D_0 0xDC6_0 0x5A1_0 0x1031_0 0x655_0
-34 # # # # # # # # # # # # # # # # 0xB55_0 0x1361_0 0x6D2_0 0x15E5_0 0x8F0_0 0x2F3_0 0xEC6_0 0x438_0
-33 # # # # # # # # # # # # # # # # 0x866_0 0x12BF_0 0x463_0 0x1513_0 0x528_0 0x144_0 0xCA6_0 0x27B_0
-32 # # # # # # # # # # # # # # # # 0x439_0 0x120B_0 0x2C4_0 0x1455_0 0x2B8_0 0xAA_0 0x96E_0 0x184_0
-31 # # # # # # # # # . # # # # . # 0x128_0 0x1092_0 0x148_0 0x12FD_0 0xEA_0 0x18_0 0x5B1_0 0x42_0
-30 # # # # # # # # # . # # # # . # 0x54_0 0xF6A_0 0xB9_0 0x123E_0 0x9D_0 0x2_0 0x349_0 0x8_0
-29 # # # # # # # # # . # . . # . # 0x9_0 0xDD1_0 0x16_0 0x115C_0 0xA_0 0x1_0 0x1E4_0 0x4_0
-28 . . # # # . # # . . . . . # . # 0x0_0 0x9D6_0 0x1_0 0xFDA_0 0x0_0 0x0_0 0x60_0 0x1_0
-27 . . # . . . # # . . . . . # . . 0x0_0 0x689_0 0x0_0 0xEA1_0 0x0_0 0x0_0 0x4_0 0x0_0
-26 . . # . . . # # . . . . . # . . 0x0_0 0x4FB_0 0x0_0 0xDDB_0 0x0_0 0x0_0 0x1_0 0x0_0
-25 . . # . . . # # . . . . . . . . 0x0_0 0x31C_0 0x0_0 0xCEB_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . # . . . # # . . . . . . . . 0x0_0 0x1AA_0 0x0_0 0xBC4_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . # . . . # . . . . . . . . . 0x0_0 0x8D_0 0x0_0 0x99C_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . # . . . # . . . . . . . . . 0x0_0 0x27_0 0x0_0 0x797_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . # . . . # . . . . . . . . . 0x0_0 0xC_0 0x0_0 0x50D_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . # . . . # . . . . . . . . . 0x0_0 0x3_0 0x0_0 0x343_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x1B9_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xFB_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x96_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x36_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xE_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x2_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -28 5 33 -12
Mc0.C1.R0: Left Right Width Center
B0: -18 5 23 -7
B1: -27 5 32 -11
Mc0.C2.R0: Left Right Width Center
B0: -27 5 32 -11
B1: -28 5 33 -12
Mc0.C3.R0: Left Right Width Center
B0: -13 5 18 -4
B1: -23 5 28 -9
Mc1.C0.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -31 5 36 -13
Mc1.C1.R0: Left Right Width Center
B0: -28 5 33 -12
B1: -29 5 34 -12
Mc1.C2.R0: Left Right Width Center
B0: -29 5 34 -12
B1: -25 5 30 -10
Mc1.C3.R0: Left Right Width Center
B0: -31 5 36 -13
B1: -27 5 32 -11
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
DqsDelay
-63 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-62 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-61 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-60 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-59 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-58 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-57 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-56 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-55 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
-54 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
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-50 # # # # # # # # # # # # # # # # 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0 0x17ED_0
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-43 # # # # # # # # # # # # # # # # 0x17ED_0 0x17E9_0 0x17EC_0 0x17ED_0 0x17ED_0 0x1740_0 0x17ED_0 0x17D4_0
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-40 # # # # # # # # # # # # # # # # 0x17C5_0 0x17C7_0 0x16EC_0 0x17ED_0 0x17DA_0 0x14B6_0 0x17D5_0 0x15E4_0
-39 # # # # # # # # # # # # # # # # 0x176B_0 0x1746_0 0x1575_0 0x17EB_0 0x174E_0 0x12EB_0 0x1787_0 0x13F7_0
-38 # # # # # # # # # # # # # # # # 0x16DB_0 0x16CA_0 0x145F_0 0x17E3_0 0x1666_0 0x1147_0 0x16FB_0 0x126E_0
-37 # # # # # # # # # # # # # # # # 0x1577_0 0x15E0_0 0x117E_0 0x17C2_0 0x13EE_0 0xBBE_0 0x15BB_0 0xF7D_0
-36 # # # # # # # # # # # # # # # # 0x121A_0 0x14B0_0 0xC8F_0 0x177C_0 0x10F7_0 0x65E_0 0x13A2_0 0xB8F_0
-35 # # # # # # # # # # # # # # # # 0xD41_0 0x13EA_0 0x7FB_0 0x16ED_0 0xC5D_0 0x303_0 0x10CB_0 0x7AA_0
-34 # # # # # # # # # # # # # # # # 0x94A_0 0x132D_0 0x538_0 0x162A_0 0x6CE_0 0x16F_0 0xE3F_0 0x5AC_0
-33 # # # # # # # # # # # # # # # # 0x65D_0 0x12A7_0 0x3A4_0 0x158E_0 0x4B3_0 0xD5_0 0xA3C_0 0x3FA_0
-32 # # # # # # # # # # # # # # # # 0x352_0 0x1194_0 0x189_0 0x147A_0 0x29B_0 0x4F_0 0x5CA_0 0x1FD_0
-31 # # # # # # # # # . # # . # . # 0xD7_0 0xFFF_0 0x6_0 0x1323_0 0x73_0 0x4_0 0x21D_0 0xE1_0
-30 # # # # # # # # # . . . . # . # 0x36_0 0xE47_0 0x4_0 0x1220_0 0x1B_0 0x0_0 0x96_0 0x25_0
-29 # # # # # # # # # . . . . # . # 0x10_0 0xD3C_0 0x1_0 0x119C_0 0x4_0 0x0_0 0x3E_0 0x7_0
-28 . . # # # . # # . . . . . # . # 0x0_0 0xA07_0 0x1_0 0x10A5_0 0x0_0 0x0_0 0x5_0 0x3_0
-27 # # # . . . # # . . . . . . . . 0x2_0 0x623_0 0x0_0 0xF99_0 0x0_0 0x0_0 0x0_0 0x0_0
-26 . . # . . . # # . . . . . . . . 0x0_0 0x4DA_0 0x0_0 0xEDC_0 0x0_0 0x0_0 0x0_0 0x0_0
-25 . . # . . . # . . . . . . . . . 0x0_0 0x375_0 0x0_0 0xD94_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . # . . . # . . . . . . . . . 0x0_0 0x207_0 0x0_0 0xB8A_0 0x0_0 0x0_0 0x0_0 0x0_0
-23 . . # . . . # . . . . . . . . . 0x0_0 0x113_0 0x0_0 0x96B_0 0x0_0 0x0_0 0x0_0 0x0_0
-22 . . # . . . # . . . . . . . . . 0x0_0 0x63_0 0x0_0 0x6FE_0 0x0_0 0x0_0 0x0_0 0x0_0
-21 . . # . . . # . . . . . . . . . 0x0_0 0x14_0 0x0_0 0x54B_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . # . . . # . . . . . . . . . 0x0_0 0x8_0 0x0_0 0x391_0 0x0_0 0x0_0 0x0_0 0x0_0
-19 . . # . . . # . . . . . . . . . 0x0_0 0x1_0 0x0_0 0x1E1_0 0x0_0 0x0_0 0x0_0 0x0_0
-18 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x113_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x90_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x34_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . # . . . . . . . . . 0x0_0 0x0_0 0x0_0 0xB_0 0x0_0 0x0_0 0x0_0 0x0_0
-14 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-10 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-6 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
2 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -26 5 31 -11
B1: -26 5 31 -11
Mc0.C1.R1: Left Right Width Center
B0: -18 5 23 -7
B1: -27 5 32 -11
Mc0.C2.R1: Left Right Width Center
B0: -27 5 32 -11
B1: -28 5 33 -12
Mc0.C3.R1: Left Right Width Center
B0: -14 5 19 -5
B1: -25 5 30 -10
Mc1.C0.R1: Left Right Width Center
B0: -28 5 33 -12
B1: -31 5 36 -13
Mc1.C1.R1: Left Right Width Center
B0: -30 5 35 -13
B1: -30 5 35 -13
Mc1.C2.R1: Left Right Width Center
B0: -31 5 36 -13
B1: -27 5 32 -11
Mc1.C3.R1: Left Right Width Center
B0: -31 5 36 -13
B1: -27 5 32 -11
MRC task Read Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD38h
MRC task -- Write Timing Centering 2D Before Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 250 250 260 220 220 250 250 260 270 250 250 210 210 250 250 260 270 270 270 260 260 250 260 250 260 260 270 260 260 250 260 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 240 220 250 180 210 240 230 230 250 230 250 190 200 230 240 230 250 250 250 230 250 220 250 220 260 240 260 240 250 220 230
Weighted Center 1 2 2 -1 1 1 1 1 1 0 1 2 2 1 1 1
Final Center 75 73 70 71 75 73 68 74 75 74 73 77 75 73 77 74
Edges we pass on to GetMarginBit are
230 230 240 230 200 190 230 240 240 240 240 240 200 190 240 230 240 240 250 250 240 240 240 230 240 240 250 250 250 240 230 220
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ....#.## 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .#...... 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .....#.. 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0707070707070707 ........ 0x0707070707070707 .......# 0x0707070707070707 ........ 0x0707070709070909 ......#. 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0709070707070707 ..#..... 0x0707070707070707 .......# 0x0707070707070707 ........ 0x0707070707090707 ........ 0x0707070707070707 ......#. 0x0707070707070707 ........ 0x0707070707070707 .......#
0x0606060606060606 ........ 0x0606060606060607 .......$ 0x0606060606060606 ........ 0x0606060609060A09 ....$#.$ 0x0606060606060606 ........ 0x0606060606060606 ...#..#. 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0609070606060606 #$$#.... 0x0606060606060607 .......$ 0x0606060606060606 ........ 0x0606060606090606 .....$.. 0x0606060606060706 ......$. 0x0606060606060606 .......# 0x0606060606060607 .......$
0x0505050505050505 .......# 0x0505050505050507 .......$ 0x0505050505050505 ........ 0x0505050509060A09 #.#.$$$$ 0x0505050505050505 ...#...# 0x0505050605050605 ..#$..$. 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 .....#.# 0x0609070605050505 $$$$.#.# 0x0505050505050507 .......$ 0x0505050505050505 ........ 0x0505050505090505 .....$.. 0x0505050505050705 .#....$. 0x0505050505050506 .#.....$ 0x0505050505050507 .......$
0x0404040404040405 ......#$ 0x0404040404040407 .......$ 0x0404040404040404 ........ 0x0504050409060A09 $.$.$$$$ 0x0404040504040405 ...$...$ 0x0404050604040604 ..$$.#$# 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404050405 .....$#$ 0x0609070604050405 $$$$.$#$ 0x0404040404040407 ...#...$ 0x0404040404040404 .....#.. 0x0404040404090404 ..#..$.. 0x0405040404040704 .$....$. 0x0405040404040406 .$....#$ 0x0404040404040407 .......$
0x0303030303030405 ..#...$$ 0x0303030303030307 .......$ 0x0303030303030303 ........ 0x0503050309060A09 $.$#$$$$ 0x0303030503030305 ###$.#.$ 0x0303050603040604 ..$$.$$$ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303050405 ....#$$$ 0x0609070603050405 $$$$.$$$ 0x0303030403030307 ...$.#.$ 0x0303030303040303 ....#$.. 0x0303040303090303 ##$..$#. 0x0305030303030703 .$#...$. 0x0305030303030406 .$....$$ 0x0303030303030307 ....#..$
0x0202030202020405 ..$...$$ 0x0202020202020207 .....##$ 0x0202020202020202 .....#.. 0x0502050309060A09 $#$$$$$$ 0x0303030502030205 $$$$.$.$ 0x0202050602040604 .#$$#$$$ 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020203050405 ....$$$$ 0x0609070602050405 $$$$#$$$ 0x0202020402030207 .#.$.$.$ 0x0202020203040202 ....$$.# 0x0303040202090302 $$$.#$$. 0x0205030202020702 .$$..#$. 0x0205020202020406 .$.#..$$ 0x0202020203020207 .#.#$..$
0x0101030101010405 ..$...$$ 0x0101010101020207 .....$$$ 0x0101010101020101 .....$.. 0x0502050309060A09 $$$$$$$$ 0x0303030501030105 $$$$.$.$ 0x0102050602040604 .$$$$$$$ 0x0101010101010101 ....#... 0x0101010101010101 .......# 0x0101010103050405 ....$$$$ 0x0609070602050405 $$$$$$$$ 0x0102010401030107 .$.$.$.$ 0x0101010103040102 .#..$$.$ 0x0303040102090301 $$$.$$$# 0x0105030101020701 #$$.#$$# 0x0105010201010406 .$.$#.$$ 0x0102010203010107 .$.$$.#$
0x0000030000000405 ..$...$$ 0x0000000000020207 ..#.#$$$ 0x0000000000020000 .....$.# 0x0502050309060A09 $$$$$$$$ 0x0303030500030005 $$$$.$#$ 0x0002050602040604 .$$$$$$$ 0x0000000001000000 ...#$#.# 0x0000000000000001 .......$ 0x0000000003050405 .#..$$$$ 0x0609070602050405 $$$$$$$$ 0x0002000400030007 .$#$.$#$ 0x0001000003040002 #$#.$$#$ 0x0303040002090301 $$$.$$$$ 0x0105030001020701 $$$.$$$$ 0x0005000201000406 .$.$$#$$ 0x0002000203000107 .$.$$#$$
+--MrcGetMarginBit, rsign = 1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 #....... 0x0808080808080808 .......# 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ..#..... 0x0808080808080808 ........
0x0909090909090909 .#...... 0x0909090909090909 ........ 0x0909090909090909 ..#.#... 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ....#... 0x0709090909090909 ........ 0x0909090909090907 #.#...#. 0x0909090909090909 ........ 0x0909090909090909 #....... 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909070909090909 ........ 0x0909090909090909 ........
0x0A090A0A0A0A0A0A .$...... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A090A090A0A0A ..$.$... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ....#.#. 0x0A0A0A0A0A0A0A0A ##...... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A090A0A0A ....$... 0x070A0A0A0A0A0A0A $.##.... 0x090A090A0A0A0907 $.$.#.$$ 0x0A0A0A0A0A0A0A0A ........ 0x090A0A0A0A0A0A0A $....... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ...#.... 0x0A0A070A0A0A0A0A ..$..... 0x0A0A0A0A0A0A0A0A ........
0x0B090B0B0B0B0B0B .$...... 0x0B0B0B0B0B0B0B0B .#...... 0x0B0B090B090B0B0B #.$#$... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0A0B0A0B ....$.$. 0x0A0A0B0B0B0B0B0B $$...... 0x0B0B0B0B0B0B0B0B ......#. 0x0B0B0B0B090B0B0B ...#$... 0x070B0A0A0B0B0B0B $.$$.... 0x090B090B0A0B0907 $#$#$.$$ 0x0B0B0B0B0B0B0B0B ........ 0x090B0B0B0B0B0B0B $....... 0x0B0B0B0B0B0B0B0B ...#.... 0x0B0B0B0A0B0B0B0B #..$.... 0x0B0B070B0B0B0B0B ..$..... 0x0B0B0B0B0B0B0B0B ..#.....
0x0C090C0C0C0C0C0C .$...... 0x0C0B0C0C0C0C0C0C .$...... 0x0B0C090B090C0C0C $.$$$... 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0A0C0A0C ..#.$.$. 0x0A0A0C0C0C0C0C0C $$...... 0x0C0C0C0C0C0C0B0C ....##$. 0x0C0C0C0B090C0C0C ..#$$... 0x070C0A0A0C0C0C0C $#$$#... 0x090B090B0A0C0907 $$$$$#$$ 0x0C0C0C0C0C0C0C0C #...#... 0x090C0C0C0C0C0C0C $.##.... 0x0C0C0C0B0C0C0C0C ...$#... 0x0B0C0C0A0C0C0C0C $..$.... 0x0C0C070C0C0C0C0C ..$..... 0x0C0C0B0C0C0C0C0C ..$.....
0x0D090D0D0D0D0D0D #$...... 0x0D0B0D0D0D0D0D0D .$##.... 0x0B0D090B090D0D0D $.$$$... 0x0D0D0D0D0D0D0D0D .....#.. 0x0D0D0C0D0A0D0A0D ..$.$.$. 0x0A0A0D0D0D0D0D0D $$...... 0x0D0D0D0D0C0C0B0D ....$$$# 0x0D0D0C0B090D0D0D ..$$$... 0x070C0A0A0C0D0D0D $$$$$#.. 0x090B090B0A0C0907 $$$$$$$$ 0x0C0D0D0D0C0D0D0D $...$... 0x090D0C0C0D0D0D0D $#$$.... 0x0D0D0D0B0C0D0D0D ...$$... 0x0B0D0D0A0D0D0D0D $.#$.#.. 0x0D0D070D0D0D0D0D ..$###.. 0x0D0D0B0D0D0D0D0D ..$..#..
0x0D090E0E0E0E0E0E $$...... 0x0E0B0D0D0E0E0E0E .$$$.... 0x0B0E090B090E0E0E $.$$$#.# 0x0E0E0E0E0E0D0E0E ...#.$.. 0x0E0E0C0E0A0E0A0E ..$.$#$. 0x0A0A0E0E0E0E0E0E $$#..#.. 0x0E0E0E0E0C0C0B0D ..#.$$$$ 0x0E0E0C0B090E0E0E ..$$$.#. 0x070C0A0A0C0D0E0E $$$$$$#. 0x090B090B0A0C0907 $$$$$$$$ 0x0C0E0E0E0C0E0E0E $...$... 0x090D0C0C0E0E0E0E $$$$#... 0x0E0E0E0B0C0E0E0E .##$$.## 0x0B0E0D0A0E0D0E0E $.$$.$.# 0x0E0E070D0D0D0E0E ##$$$$#. 0x0E0E0B0E0E0D0E0E #.$..$..
0x0D090F0F0F0F0F0F $$..##.. 0x0F0B0D0D0F0F0F0F #$$$#... 0x0B0F090B090E0F0E $#$$$$.$ 0x0F0F0F0E0F0D0F0F #..$.$.# 0x0F0F0C0F0A0E0A0F .#$.$$$. 0x0A0A0E0F0F0E0F0F $$$..$.. 0x0F0F0E0F0C0C0B0D ..$.$$$$ 0x0F0F0C0B090F0E0F ..$$$.$. 0x070C0A0A0C0D0E0F $$$$$$$# 0x090B090B0A0C0907 $$$$$$$$ 0x0C0F0F0F0C0F0F0F $...$... 0x090D0C0C0E0F0F0F $$$$$### 0x0F0E0E0B0C0F0E0E #$$$$#$$ 0x0B0F0D0A0F0D0F0E $#$$.$#$ 0x0E0E070D0D0D0E0F $$$$$$$# 0x0E0F0B0F0F0D0F0F $.$#.$..
0x0D0910100F0F1010 $$..$$.. 0x0F0B0D0D0F101010 $$$$$##. 0x0B0F090B090E100E $$$$$$.$ 0x0F10100E100D100F $..$.$.$ 0x100F0C100A0E0A10 .$$.$$$. 0x0A0A0E10100E1010 $$$..$.. 0x10100E100C0C0B0D .#$.$$$$ 0x10100C0B09100E10 ##$$$#$. 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1010100C101010 $.#.$.#. 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A100D0F0E $$$$.$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E100B0F100D1010 $.$$.$..
0x0D0911110F0F1111 $$.#$$.. 0x0F0B0D0D0F101011 $$$$$$$. 0x0B0F090B090E110E $$$$$$#$ 0x0F11110E110D110F $.#$.$.$ 0x110F0C110A0E0A11 #$$#$$$. 0x0A0A0E11110E1111 $$$.#$.. 0x11100E110C0C0B0D .$$#$$$$ 0x10100C0B09100E11 $$$$$$$# 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1110110C111011 $.$.$.$. 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$#$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E110B0F110D1111 $.$$.$..
0x0D0912110F0F1212 $$#$$$#. 0x0F0B0D0D0F101012 $$$$$$$. 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E120D120F $#$$.$.$ 0x110F0C110A0E0A12 $$$$$$$. 0x0A0A0E12110E1212 $$$#$$.. 0x12100E110C0C0B0D .$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1210120C121012 $.$.$.$. 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E120B0F120D1212 $.$$.$..
0x0D0912110F0F1213 $$$$$$$. 0x0F0B0D0D0F101013 $$$$$$$. 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E130D130F $$$$#$.$ 0x110F0C110A0E0A13 $$$$$$$# 0x0A0A0E12110E1313 $$$$$$## 0x13100E110C0C0B0D #$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1310130C131013 $.$.$.$. 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E130B0F130D1313 $.$$.$#.
0x0D0912110F0F1214 $$$$$$$# 0x0F0B0D0D0F101014 $$$$$$$. 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E130D140F $$$$$$#$ 0x110F0C110A0E0A13 $$$$$$$$ 0x0A0A0E12110E1313 $$$$$$$$ 0x13100E110C0C0B0D $$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1410140C141014 $.$.$#$# 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E140B0F140D1314 $#$$#$$.
0x0D0912110F0F1214 $$$$$$$$ 0x0F0B0D0D0F101015 $$$$$$$# 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E130D140F $$$$$$$$ 0x110F0C110A0E0A13 $$$$$$$$ 0x0A0A0E12110E1313 $$$$$$$$ 0x13100E110C0C0B0D $$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1510150C141014 $#$.$$$$ 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E140B0F140D1315 $$$$$$$.
0x0D0912110F0F1214 $$$$$$$$ 0x0F0B0D0D0F101015 $$$$$$$$ 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E130D140F $$$$$$$$ 0x110F0C110A0E0A13 $$$$$$$$ 0x0A0A0E12110E1313 $$$$$$$$ 0x13100E110C0C0B0D $$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1510160C141014 $$$.$$$$ 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E140B0F140D1316 $$$$$$$.
0x0D0912110F0F1214 $$$$$$$$ 0x0F0B0D0D0F101015 $$$$$$$$ 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E130D140F $$$$$$$$ 0x110F0C110A0E0A13 $$$$$$$$ 0x0A0A0E12110E1313 $$$$$$$$ 0x13100E110C0C0B0D $$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1510170C141014 $$$#$$$$ 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E140B0F140D1317 $$$$$$$.
0x0D0912110F0F1214 $$$$$$$$ 0x0F0B0D0D0F101015 $$$$$$$$ 0x0B0F090B090E110E $$$$$$$$ 0x0F12110E130D140F $$$$$$$$ 0x110F0C110A0E0A13 $$$$$$$$ 0x0A0A0E12110E1313 $$$$$$$$ 0x13100E110C0C0B0D $$$$$$$$ 0x10100C0B09100E11 $$$$$$$$ 0x070C0A0A0C0D0E0F $$$$$$$$ 0x090B090B0A0C0907 $$$$$$$$ 0x0C1510170C141014 $$$$$$$$ 0x090D0C0C0E0F0F0F $$$$$$$$ 0x0F0E0E0B0C0F0E0E $$$$$$$$ 0x0B0F0D0A110D0F0E $$$$$$$$ 0x0E0E070D0D0D0E0F $$$$$$$$ 0x0E140B0F140D1318 $$$$$$$#
Edges
Mc0.Ch0.B0: [ 0 12][ 0 8][ 4 17][ 0 16][ 0 14][ 0 14][ 5 17][ 6 19]
Mc0.Ch0.B1: [ 0 14][ 0 10][ 1 12][ 0 12][ 1 14][ 3 15][ 3 15][ 8 20]
Mc0.Ch1.B0: [ 0 10][ 0 14][ 0 8][ 0 10][ 0 8][ 3 13][ 0 16][ 1 13]
Mc0.Ch1.B1: [ 6 14][ 3 17][ 6 16][ 4 13][ 9 18][ 7 12][ 10 19][ 9 14]
Mc0.Ch2.B0: [ 4 16][ 4 14][ 4 11][ 6 16][ 0 9][ 4 13][ 1 9][ 6 18]
Mc0.Ch2.B1: [ 0 9][ 3 9][ 6 13][ 7 17][ 3 16][ 5 13][ 7 18][ 5 18]
Mc0.Ch3.B0: [ 0 18][ 0 15][ 0 13][ 1 16][ 2 11][ 1 11][ 0 10][ 1 12]
Mc0.Ch3.B1: [ 0 15][ 0 15][ 0 11][ 0 10][ 0 8][ 0 15][ 0 13][ 2 16]
Mc1.Ch0.B0: [ 0 7][ 1 11][ 0 9][ 0 9][ 4 11][ 6 12][ 5 13][ 6 14]
Mc1.Ch0.B1: [ 7 8][ 9 10][ 8 8][ 7 10][ 3 9][ 6 11][ 5 8][ 6 7]
Mc1.Ch1.B0: [ 0 11][ 3 20][ 1 15][ 5 22][ 0 11][ 4 19][ 1 15][ 8 19]
Mc1.Ch1.B1: [ 1 8][ 2 12][ 1 11][ 0 11][ 4 13][ 5 14][ 1 14][ 3 14]
Mc1.Ch2.B0: [ 4 14][ 4 13][ 5 13][ 0 10][ 3 11][ 9 14][ 4 13][ 2 13]
Mc1.Ch2.B1: [ 2 10][ 6 14][ 4 12][ 0 9][ 2 16][ 3 12][ 8 14][ 2 13]
Mc1.Ch3.B0: [ 0 13][ 6 13][ 0 7][ 3 12][ 2 12][ 1 12][ 5 13][ 7 14]
Mc1.Ch3.B1: [ 0 13][ 3 19][ 0 10][ 3 14][ 4 19][ 1 12][ 2 18][ 8 23]
Per Bit Offset
Mc0.Ch0.B0: -2 -4 3 0 -1 -1 3 5
Mc0.Ch0.B1: -1 -3 -2 -2 -1 1 1 6
Mc0.Ch1.B0: -3 -1 -4 -3 -4 0 0 -1
Mc0.Ch1.B1: 2 2 3 1 6 2 7 4
Mc0.Ch2.B0: 2 1 -1 3 -4 1 -3 4
Mc0.Ch2.B1: -4 -2 2 4 2 1 5 4
Mc0.Ch3.B0: 1 -1 -2 1 -2 -2 -3 -2
Mc0.Ch3.B1: -1 -1 -3 -3 -4 -1 -2 1
Mc1.Ch0.B0: -5 -2 -4 -4 -1 1 1 2
Mc1.Ch0.B1: -1 2 0 1 -2 1 -2 -2
Mc1.Ch1.B0: -3 4 0 6 -3 4 0 6
Mc1.Ch1.B1: -4 -1 -2 -3 1 2 -1 1
Mc1.Ch2.B0: 1 1 1 -3 -1 4 1 -1
Mc1.Ch2.B1: -2 2 0 -4 1 -1 3 -1
Mc1.Ch3.B0: -2 2 -5 -1 -1 -2 1 3
Mc1.Ch3.B1: -2 3 -3 1 4 -2 2 8
START_TxDqBitDelay
R Mc0.C0.R0.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R0.S0.B1 TxDqBitDelay: 4
R Mc0.C0.R0.S0.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S0.B3 TxDqBitDelay: 8
R Mc0.C0.R0.S0.B4 TxDqBitDelay: 7
R Mc0.C0.R0.S0.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S0.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S1.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B4 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S1.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S2.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S2.B2 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B4 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S2.B6 TxDqBitDelay: 8
R Mc0.C0.R0.S2.B7 TxDqBitDelay: 7
R Mc0.C0.R0.S3.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S3.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S3.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S3.B3 TxDqBitDelay: 9
R Mc0.C0.R0.S3.B4 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S3.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S3.B6 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R0.S3.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S4.B1 TxDqBitDelay: 9
R Mc0.C0.R0.S4.B2 TxDqBitDelay: 7
R Mc0.C0.R0.S4.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S4.B4 TxDqBitDelay: 4
R Mc0.C0.R0.S4.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S4.B6 TxDqBitDelay: 5
R Mc0.C0.R0.S4.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S5.B0 TxDqBitDelay: 4
R Mc0.C0.R0.S5.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S5.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S5.B5 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S5.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S6.B0 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B3 TxDqBitDelay: 9
R Mc0.C0.R0.S6.B4 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B5 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B6 TxDqBitDelay: 5
R Mc0.C0.R0.S6.B7 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B1 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B2 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B4 TxDqBitDelay: 4
R Mc0.C0.R0.S7.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S0.B0 TxDqBitDelay: 3
R Mc1.C1.R0.S0.B1 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S0.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S0.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S0.B5 TxDqBitDelay: 9
R Mc1.C1.R0.S0.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S0.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S1.B0 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S1.B2 TxDqBitDelay: 8
R Mc1.C1.R0.S1.B3 TxDqBitDelay: 9
R Mc1.C1.R0.S1.B4 TxDqBitDelay: 6
R Mc1.C1.R0.S1.B5 TxDqBitDelay: 9
R Mc1.C1.R0.S1.B6 TxDqBitDelay: 6
R Mc1.C1.R0.S1.B7 TxDqBitDelay: 6
R Mc1.C1.R0.S2.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S2.B2 TxDqBitDelay: 8
R Mc1.C1.R0.S2.B3 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S2.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B5 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S2.B6 TxDqBitDelay: 8
R Mc1.C1.R0.S2.B7 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S3.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S3.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B4 TxDqBitDelay: 9
R Mc1.C1.R0.S3.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S3.B6 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B0 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B1 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B2 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S4.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B5 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S4.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S5.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S5.B2 TxDqBitDelay: 8
R Mc1.C1.R0.S5.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S5.B4 TxDqBitDelay: 9
R Mc1.C1.R0.S5.B5 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S5.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S6.B2 TxDqBitDelay: 3
R Mc1.C1.R0.S6.B3 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S6.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S6.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S7.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S7.B2 TxDqBitDelay: 5
R Mc1.C1.R0.S7.B3 TxDqBitDelay: 9
R Mc1.C1.R0.S7.B4 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S7.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B7 TxDqBitDelay: 16 (0x10)
STOP_TxDqBitDelay
LstSavd Margins 250 260 260 260 210 210 250 260 250 260 250 260 210 210 260 260 250 250 270 270 250 260 250 250 260 260 250 260 260 270 240 250 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 230 230 240 190 210 230 240 230 260 240 250 190 200 230 250 260 250 250 260 230 240 230 240 250 250 250 250 240 260 200 250
Weighted Center 1 1 1 1 2 1 1 1 -1 1 1 1 0 0 1 3
Final Center 74 73 69 73 73 72 66 72 76 77 76 78 76 74 76 77
Edges we pass on to GetMarginBit are
230 220 240 230 200 200 240 230 250 240 250 240 200 190 240 240 250 260 260 250 240 230 240 230 250 250 250 250 250 250 230 220
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ....##.. 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 .....##. 0x0808080808080808 ......#. 0x0808080808080808 .#...... 0x0808080808080808 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 .......# 0x0707070707070707 ......#. 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070709090707 ....#.## 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707090907 ..#..... 0x0707070707070907 .#..#... 0x0709070707070707 #.....#. 0x0707070707070707 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 .....##. 0x0606060606060606 ......#. 0x0606060606060607 .......$ 0x0606060606060706 ......$. 0x0606060606060606 ........ 0x0606060606060606 .......# 0x060606060A090707 .....$$$ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606070606090906 ##$.#$$. 0x0607060607060906 .$..$.$. 0x0709060606060706 $$..#.$# 0x0606060606060606 .......#
0x0505050505050505 ......#. 0x0505050505050505 ........ 0x0505050505060605 .....$$# 0x0505050505050605 ..#...$. 0x0505050505050507 .#.....$ 0x0505050505050705 ......$# 0x0505050505050505 ........ 0x0505050505050506 ......#$ 0x050505050A090707 ....$$$$ 0x0505050505050505 ..#..... 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0606070506090905 $$$.$$$. 0x0507050507050905 .$..$#$. 0x0709050506050706 $$.#$.$$ 0x0505050505050506 .......$
0x0404040404040504 ......$. 0x0404040404040404 .......# 0x0404040404060605 .....$$$ 0x0404050404040604 ..$.#.$. 0x0405040404040407 .$.....$ 0x0404040404040705 ...#..$$ 0x0404040404040404 ........ 0x0404040404040506 ......$$ 0x040404040A090707 ....$$$$ 0x0404050404040404 .#$..... 0x0404040404040404 ........ 0x0404040404040404 .#.....# 0x0606070406090904 $$$#$$$. 0x0407040407050904 .$#.$$$# 0x0709040506040706 $$.$$.$$ 0x0404040404040406 .......$
0x0303030303030503 ......$. 0x0303030303030304 .....##$ 0x0303030303060605 .....$$$ 0x0303050304030603 ..$.$.$. 0x0305030303030307 #$...#.$ 0x0303030403030705 ..#$..$$ 0x0303030303030303 ........ 0x0303030303030506 ...#.#$$ 0x030303030A090707 .##.$$$$ 0x0304050303030303 .$$..#.. 0x0303030303030303 .......# 0x0304030303030304 .$...##$ 0x0606070406090903 $$$$$$$. 0x0307040307050904 #$$#$$$$ 0x0709030506030706 $$#$$#$$ 0x0303030303030306 .......$
0x0202020202020502 ..#...$. 0x0202020202030304 .....$$$ 0x0202020202060605 ....#$$$ 0x0202050204020602 .#$.$.$. 0x0305020202030207 $$.#.$.$ 0x0202030402020705 ..$$.#$$ 0x0202020202020202 ....#... 0x0202020302030506 ...$.$$$ 0x020303020A090707 .$$.$$$$ 0x0204050202030202 #$$#.$#. 0x0202020202020203 ...#.#.$ 0x0204020202030304 .$#.#$$$ 0x0606070406090902 $$$$$$$# 0x0307040307050904 $$$$$$$$ 0x0709030506030706 $$$$$$$$ 0x0202020202020206 .......$
0x0101020101010501 ..$...$# 0x0101010101030304 .....$$$ 0x0101010102060605 ...#$$$$ 0x0102050104010601 .$$.$.$. 0x0305010201030107 $$.$.$.$ 0x0101030401020705 ..$$#$$$ 0x0101010102010101 ....$..# 0x0101010301030506 ##.$.$$$ 0x010303010A090707 #$$.$$$$ 0x0204050201030201 $$$$.$$# 0x0101010201020103 .#.$.$.$ 0x0104020102030304 #$$#$$$$ 0x0606070406090902 $$$$$$$$ 0x0307040307050904 $$$$$$$$ 0x0709030506030706 $$$$$$$$ 0x0101010101010106 ....#..$
0x0000020000000501 ..$...$$ 0x0000000000030304 ..#..$$$ 0x0000000102060605 ...$$$$$ 0x0002050004000600 .$$.$#$. 0x0305000200030007 $$.$.$.$ 0x0000030401020705 ..$$$$$$ 0x0000000002000001 #..#$..$ 0x0101000300030506 $$.$#$$$ 0x010303000A090707 $$$#$$$$ 0x0204050200030201 $$$$.$$$ 0x0001000200020003 .$.$.$.$ 0x0104020102030304 $$$$$$$$ 0x0606070406090902 $$$$$$$$ 0x0307040307050904 $$$$$$$$ 0x0709030506030706 $$$$$$$$ 0x0000000001000006 ....$.#$
+--MrcGetMarginBit, rsign = 1
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ...#.#.. 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ....#... 0x0909090709070909 ........ 0x0909090909090909 ....#.#. 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ..###... 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A090A0A0A ..##$... 0x0A0A0A070A070A0A #..$.$.# 0x0A0A0A0A090A090A ....$.$. 0x0A0A0A0A0A0A0A0A ##...... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0909090A0A0A ..$$$... 0x0A0A0A0A0A0A0A0A #.##.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ...#.... 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ..#..... 0x0A0A0A0A0A0A0A0A #.#.....
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0A0A090B0B0B #.$$$..# 0x0A0B0B070B070B0A $.#$.$.$ 0x0B0B0B0B090B090B ....$.$. 0x0A0A0B0B0B0B0B0B $$...... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0909090B0B0B ..$$$... 0x0A0B0A0A0B0B0B0B $.$$.... 0x0B0B0B0B0B0B0B0B #.#.#### 0x0B0B0B0B0B0B0B0B ....#... 0x0B0B0B0B0B0B0B0B #..#.... 0x0B0B0B0A0B0B0B0B ...$.... 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0A0B0B0B0B0B ..$..... 0x0A0B0A0B0B0B0B0B $.$.....
0x0C0C0C0C0C0C0C0C .#...... 0x0C0C0C0C0C0C0C0C .#...... 0x0B0C0A0A090C0C0B $.$$$#.$ 0x0A0C0B070C070C0A $.$$.$.$ 0x0C0C0C0C090C090C ..#.$.$. 0x0A0A0C0C0C0C0C0C $$...... 0x0C0C0C0C0C0C0C0C ......#. 0x0C0C0909090C0C0C .#$$$.#. 0x0A0C0A0A0C0C0C0C $.$$.... 0x0B0C0B0C0B0B0B0B $#$.$$$$ 0x0C0C0C0C0B0C0C0C #...$... 0x0B0C0C0B0C0C0C0C $..$.... 0x0C0C0C0A0C0C0C0C ...$#..# 0x0C0C0C0C0C0C0C0C ...#.... 0x0C0C0A0C0C0C0C0C ..$.#... 0x0A0C0A0C0C0C0C0C $.$#.#..
0x0D0C0D0D0D0D0D0D .$...... 0x0D0C0D0D0D0D0D0D .$##.... 0x0B0D0A0A090C0D0B $#$$$$.$ 0x0A0D0B070D070D0A $.$$.$.$ 0x0D0D0C0D090D090D ..$.$.$. 0x0A0A0D0D0D0D0D0D $$...... 0x0D0D0D0D0D0D0C0D .....#$# 0x0D0C0909090D0C0D #$$$$#$. 0x0A0D0A0A0D0D0D0D $.$$#... 0x0B0C0B0D0B0B0B0B $$$#$$$$ 0x0C0D0D0D0B0D0D0D $...$... 0x0B0D0D0B0D0D0D0D $..$.... 0x0D0D0D0A0C0D0D0C ...$$..$ 0x0D0D0D0C0D0D0D0D ...$.... 0x0D0D0A0D0C0D0D0D ##$#$#.. 0x0A0D0A0C0D0C0D0D $.$$.$..
0x0E0C0E0E0E0E0E0E #$...... 0x0E0C0D0D0E0E0E0E .$$$.... 0x0B0D0A0A090C0E0B $$$$$$.$ 0x0A0E0B070E070E0A $#$$.$.$ 0x0E0E0C0E090E090E ..$.$#$. 0x0A0A0E0E0E0E0E0E $$#..#.. 0x0E0E0E0E0E0D0C0D ....#$$$ 0x0D0C0909090D0C0E $$$$$$$# 0x0A0E0A0A0D0E0E0E $#$$$##. 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C0E0E0E0B0E0E0E $...$... 0x0B0E0E0B0E0E0E0E $##$#... 0x0E0E0E0A0C0E0E0C ###$$.#$ 0x0E0E0E0C0E0E0E0E ...$.... 0x0D0D0A0D0C0D0E0E $$$$$$.. 0x0A0E0A0C0E0C0E0E $.$$.$..
0x0E0C0F0F0F0F0F0F $$...... 0x0F0C0D0D0F0F0F0F .$$$#... 0x0B0D0A0A090C0F0B $$$$$$#$ 0x0A0E0B070F070F0A $$$$#$#$ 0x0F0F0C0F090E090F .#$.$$$. 0x0A0A0E0F0F0E0F0F $$$..$.. 0x0F0F0F0F0E0D0C0D ..#.$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E0F $$$$$$$. 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C0F0F0F0B0F0F0F $...$... 0x0B0E0E0B0E0F0F0F $$$$$... 0x0E0E0E0A0C0F0E0C $$$$$#$$ 0x0F0F0F0C0F0F0F0F #.#$.#.# 0x0D0D0A0D0C0D0F0F $$$$$$## 0x0A0F0A0C0F0C0F0F $.$$.$..
0x0E0C101010101010 $$...... 0x100C0D0D0F101010 #$$$$#.. 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x100F0C10090E0910 .$$.$$$. 0x0A0A0E10100E1010 $$$.#$.. 0x10100F100E0D0C0D ..$.$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$# 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1010100B101010 $.#.$.#. 0x0B0E0E0B0E101010 $$$$$##. 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C100F100F $#$$.$.$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A100A0C100C1010 $.$$#$#.
0x0E0C111111111111 $$..##.. 0x100C0D0D0F101111 $$$$$$#. 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0911 #$$#$$$. 0x0A0A0E11100E1111 $$$#$$.. 0x11110F110E0D0C0D .#$.$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1110110B111011 $.$.$.$. 0x0B0E0E0B0E101011 $$$$$$$# 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C110F110F $$$$.$.$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A110A0C100C1011 $.$$$$$.
0x0E0C121211111212 $$..$$.. 0x100C0D0D0F101112 $$$$$$$. 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0912 $$$$$$$. 0x0A0A0E11100E1212 $$$$$$#. 0x12110F120E0D0C0D .$$#$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1210120B121012 $.$.$.$. 0x0B0E0E0B0E101011 $$$$$$$$ 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C120F120F $$$$#$#$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A120A0C100C1012 $#$$$$$.
0x0E0C131311111313 $$##$$.. 0x100C0D0D0F101113 $$$$$$$. 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0913 $$$$$$$# 0x0A0A0E11100E1213 $$$$$$$# 0x13110F120E0D0C0D #$$$$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1310130B131013 $.$.$#$# 0x0B0E0E0B0E101011 $$$$$$$$ 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C120F120F $$$$$$$$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A120A0C100C1013 $$$$$$$.
0x0E0C131311111414 $$$$$$#. 0x100C0D0D0F101114 $$$$$$$. 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0913 $$$$$$$$ 0x0A0A0E11100E1213 $$$$$$$$ 0x13110F120E0D0C0D $$$$$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1410140B131013 $#$.$$$$ 0x0B0E0E0B0E101011 $$$$$$$$ 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C120F120F $$$$$$$$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A120A0C100C1014 $$$$$$$#
0x0E0C131311111415 $$$$$$$. 0x100C0D0D0F101115 $$$$$$$. 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0913 $$$$$$$$ 0x0A0A0E11100E1213 $$$$$$$$ 0x13110F120E0D0C0D $$$$$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1410150B131013 $$$.$$$$ 0x0B0E0E0B0E101011 $$$$$$$$ 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C120F120F $$$$$$$$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A120A0C100C1014 $$$$$$$$
0x0E0C131311111416 $$$$$$$# 0x100C0D0D0F101116 $$$$$$$# 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0913 $$$$$$$$ 0x0A0A0E11100E1213 $$$$$$$$ 0x13110F120E0D0C0D $$$$$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1410160B131013 $$$.$$$$ 0x0B0E0E0B0E101011 $$$$$$$$ 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C120F120F $$$$$$$$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A120A0C100C1014 $$$$$$$$
0x0E0C131311111416 $$$$$$$$ 0x100C0D0D0F101116 $$$$$$$$ 0x0B0D0A0A090C0F0B $$$$$$$$ 0x0A0E0B070F070F0A $$$$$$$$ 0x110F0C11090E0913 $$$$$$$$ 0x0A0A0E11100E1213 $$$$$$$$ 0x13110F120E0D0C0D $$$$$$$$ 0x0D0C0909090D0C0E $$$$$$$$ 0x0A0E0A0A0D0E0E10 $$$$$$$$ 0x0B0C0B0D0B0B0B0B $$$$$$$$ 0x0C1410170B131013 $$$#$$$$ 0x0B0E0E0B0E101011 $$$$$$$$ 0x0E0E0E0A0C0F0E0C $$$$$$$$ 0x0F100F0C120F120F $$$$$$$$ 0x0D0D0A0D0C0D0F0F $$$$$$$$ 0x0A120A0C100C1014 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 0 13][ 0 11][ 3 18][ 0 18][ 0 16][ 0 16][ 6 19][ 2 21]
Mc0.Ch0.B1: [ 0 15][ 0 11][ 1 12][ 0 12][ 0 14][ 4 15][ 4 16][ 5 21]
Mc0.Ch1.B0: [ 0 10][ 0 12][ 0 9][ 2 9][ 3 8][ 7 11][ 7 14][ 6 10]
Mc0.Ch1.B1: [ 0 9][ 3 13][ 6 10][ 0 7][ 5 14][ 1 7][ 7 14][ 0 9]
Mc0.Ch2.B0: [ 4 16][ 6 14][ 0 11][ 3 16][ 0 8][ 4 13][ 0 8][ 8 18]
Mc0.Ch2.B1: [ 0 9][ 0 9][ 4 13][ 5 16][ 2 15][ 3 13][ 8 17][ 6 18]
Mc0.Ch3.B0: [ 1 18][ 0 16][ 0 14][ 1 17][ 3 13][ 0 12][ 0 11][ 2 12]
Mc0.Ch3.B1: [ 2 12][ 2 11][ 0 8][ 4 8][ 1 8][ 4 12][ 6 11][ 7 13]
Mc1.Ch0.B0: [ 2 9][ 4 13][ 4 9][ 1 9][ 10 12][ 9 13][ 8 13][ 8 15]
Mc1.Ch0.B1: [ 3 10][ 5 11][ 6 10][ 3 12][ 0 10][ 4 10][ 3 10][ 2 10]
Mc1.Ch1.B0: [ 0 11][ 2 19][ 0 15][ 3 22][ 0 10][ 3 18][ 0 15][ 4 18]
Mc1.Ch1.B1: [ 2 10][ 5 13][ 3 13][ 2 10][ 3 13][ 4 15][ 4 15][ 5 16]
Mc1.Ch2.B0: [ 7 13][ 7 13][ 8 13][ 5 9][ 7 11][ 9 14][ 9 13][ 3 11]
Mc1.Ch2.B1: [ 4 14][ 8 15][ 5 14][ 4 11][ 8 17][ 6 14][ 9 17][ 5 14]
Mc1.Ch3.B0: [ 8 12][ 9 12][ 4 9][ 6 12][ 7 11][ 4 12][ 8 14][ 7 14]
Mc1.Ch3.B1: [ 0 9][ 0 17][ 0 9][ 0 11][ 2 15][ 0 11][ 1 15][ 7 19]
Per Bit Offset
Mc0.Ch0.B0: -2 -3 3 1 0 0 5 4
Mc0.Ch0.B1: -1 -3 -2 -2 -1 2 2 5
Mc0.Ch1.B0: -3 -2 -4 -3 -3 1 3 0
Mc0.Ch1.B1: -4 0 0 -5 2 -4 3 -4
Mc0.Ch2.B0: 2 2 -3 2 -4 1 -4 5
Mc0.Ch2.B1: -4 -4 1 3 1 0 5 4
Mc0.Ch3.B0: 2 0 -1 1 0 -2 -3 -1
Mc0.Ch3.B1: -1 -2 -4 -2 -4 0 1 2
Mc1.Ch0.B0: -3 1 -2 -3 3 3 3 4
Mc1.Ch0.B1: -2 0 0 -1 -3 -1 -2 -2
Mc1.Ch1.B0: -3 3 -1 5 -3 3 -1 3
Mc1.Ch1.B1: -2 1 0 -2 0 2 2 3
Mc1.Ch2.B0: 2 2 3 -1 1 4 3 -1
Mc1.Ch2.B1: 1 4 2 -1 5 2 5 2
Mc1.Ch3.B0: 2 3 -2 1 1 0 3 3
Mc1.Ch3.B1: -4 1 -4 -3 1 -3 0 5
START_TxDqBitDelay
R Mc0.C0.R1.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S0.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S0.B2 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S0.B3 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S0.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S0.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S0.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S1.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S1.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S1.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B4 TxDqBitDelay: 7
R Mc0.C0.R1.S1.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S1.B6 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S1.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S2.B0 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S2.B3 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S2.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S2.B7 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B1 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B2 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B3 TxDqBitDelay: 3
R Mc0.C0.R1.S3.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S3.B5 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B6 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S3.B7 TxDqBitDelay: 4
R Mc0.C0.R1.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S4.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S4.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B3 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S4.B4 TxDqBitDelay: 4
R Mc0.C0.R1.S4.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B6 TxDqBitDelay: 4
R Mc0.C0.R1.S4.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S5.B0 TxDqBitDelay: 4
R Mc0.C0.R1.S5.B1 TxDqBitDelay: 4
R Mc0.C0.R1.S5.B2 TxDqBitDelay: 9
R Mc0.C0.R1.S5.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S5.B4 TxDqBitDelay: 9
R Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S5.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S5.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S6.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S6.B1 TxDqBitDelay: 8
R Mc0.C0.R1.S6.B2 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B3 TxDqBitDelay: 9
R Mc0.C0.R1.S6.B4 TxDqBitDelay: 8
R Mc0.C0.R1.S6.B5 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B6 TxDqBitDelay: 5
R Mc0.C0.R1.S6.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B0 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B4 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S7.B6 TxDqBitDelay: 9
R Mc0.C0.R1.S7.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S0.B0 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B1 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S0.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S0.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S1.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B2 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B4 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B6 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B7 TxDqBitDelay: 6
R Mc1.C1.R1.S2.B0 TxDqBitDelay: 5
R Mc1.C1.R1.S2.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B3 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S2.B4 TxDqBitDelay: 5
R Mc1.C1.R1.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B6 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S3.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S3.B1 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B2 TxDqBitDelay: 8
R Mc1.C1.R1.S3.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S3.B4 TxDqBitDelay: 8
R Mc1.C1.R1.S3.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S3.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B2 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S4.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S4.B5 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S4.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B7 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B0 TxDqBitDelay: 9
R Mc1.C1.R1.S5.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B4 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S5.B5 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B6 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S5.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S6.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S6.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S6.B2 TxDqBitDelay: 6
R Mc1.C1.R1.S6.B3 TxDqBitDelay: 9
R Mc1.C1.R1.S6.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S6.B5 TxDqBitDelay: 8
R Mc1.C1.R1.S6.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S6.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S7.B0 TxDqBitDelay: 4
R Mc1.C1.R1.S7.B1 TxDqBitDelay: 9
R Mc1.C1.R1.S7.B2 TxDqBitDelay: 4
R Mc1.C1.R1.S7.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S7.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S7.B5 TxDqBitDelay: 5
R Mc1.C1.R1.S7.B6 TxDqBitDelay: 8
R Mc1.C1.R1.S7.B7 TxDqBitDelay: 13 (0xD)
STOP_TxDqBitDelay
Calling with EnRxDutyCycle = 0, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 230 230 240 230 200 190 230 240 240 240 240 240 200 190 240 230 240 240 250 250 240 240 240 230 240 240 250 250 250 240 230 220 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 250 260 250 210 200 240 230 250 250 260 250 190 200 240 240 250 240 250 240 270 250 230 240 240 250 250 260 250 260 250 240
Vref = -10: 230 230 230 220 190 180 220 210 220 230 240 220 190 180 230 230 230 230 240 230 250 240 230 210 240 230 240 240 230 230 220 220
Vref = -20: 220 200 220 210 180 140 210 180 220 210 220 210 190 150 220 200 210 200 230 210 230 210 210 190 230 210 230 220 220 220 210 200
Vref = -30: 200 190 210 180 170 110 190 160 200 180 200 170 160 110 210 180 210 190 210 180 200 180 190 160 210 170 200 190 200 190 190 180
Vref = 10: 240 240 260 240 210 200 230 240 260 250 260 250 190 190 240 240 250 250 260 240 260 250 240 230 260 240 250 250 240 250 240 240
Vref = 20: 230 230 230 220 190 180 220 220 230 230 230 230 190 180 230 220 230 240 240 230 250 230 230 210 230 220 250 230 220 230 220 220
Vref = 30: 220 200 220 210 170 150 210 200 210 210 220 200 180 150 220 200 220 210 230 220 230 210 220 190 220 210 220 210 210 210 200 200
Weighted Center 0 -1 -1 -1 0 -1 -1 0 0 -1 -1 -1 0 0 0 0
Final Center 75 72 69 70 75 72 67 74 75 73 72 76 75 73 77 74
LstSavd Margins 230 220 240 230 200 200 240 230 250 240 250 240 200 190 240 240 250 260 260 250 240 230 240 230 250 250 250 250 250 250 230 220 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 250 240 250 240 200 200 230 240 250 250 260 250 200 200 240 240 250 250 260 250 250 250 240 240 260 250 260 250 260 250 240 230
Vref = -10: 230 220 230 230 190 180 220 220 240 240 240 240 200 170 230 220 230 230 240 240 240 230 230 220 230 230 240 240 240 240 230 210
Vref = -20: 220 210 220 210 180 150 210 190 220 210 220 210 190 150 220 200 220 210 220 210 220 210 200 200 220 210 230 210 220 210 220 200
Vref = -30: 210 170 200 190 160 120 190 160 200 190 210 180 150 120 220 180 210 190 210 190 210 180 200 170 210 170 200 180 210 190 210 170
Vref = 10: 250 240 250 240 200 200 230 240 260 250 250 250 200 190 240 240 240 250 250 260 240 240 240 240 240 250 260 250 250 250 250 230
Vref = 20: 240 220 240 230 190 170 230 220 230 240 250 230 180 170 230 220 230 240 240 240 240 230 240 220 240 230 250 240 230 230 230 220
Vref = 30: 220 210 220 220 180 160 210 200 220 210 230 210 180 140 220 200 220 210 220 220 220 200 210 190 220 210 230 220 220 210 220 190
Weighted Center -1 0 -1 0 0 -1 -1 -1 0 0 0 0 0 -1 0 -1
Final Center 73 73 68 73 73 71 65 71 76 77 76 78 76 73 76 76
MRC task Write Timing Centering 2D Before Power Training -- SUCCEEDED, Status = 0h. Stack Depth: 160588
Post Code: DD7Dh
MRC task -- Rload Optimization -- Started.
Rload Optimization not needed
MRC task Rload Optimization -- SUCCEEDED, Status = 0h.
Post Code: DD39h
MRC task -- Read Timing Centering 2D Before Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 160 170 160 170 110 120 160 160 160 160 160 170 90 90 140 140 160 170 180 180 160 170 170 170 170 170 150 150 180 180 160 160 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 150 140 150 140 80 90 150 130 150 130 150 140 70 60 120 110 150 140 160 150 150 140 160 140 150 140 150 120 170 150 160 130
Weighted Center -1 -1 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -2 -1 -2
Final Center -13 -13 -6 -12 -12 -13 -5 -10 -13 -14 -13 -13 -13 -12 -14 -13
Edges we pass on to GetMarginBit are
140 150 140 150 90 80 140 140 140 140 140 150 60 70 110 120 140 150 150 160 140 150 150 150 140 150 130 140 160 160 140 150
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ....#... 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ..#..... 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030305030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ..#..#.. 0x0303030303030303 ..#..#..
0x0202020202020202 ........ 0x0202020202020202 ....#... 0x0202020202020202 ........ 0x0202020202020202 ........ 0x0202020202020202 ......#. 0x0202020202020202 ........ 0x0202020202020202 ......#. 0x0202020202020202 ........ 0x0202030202020202 ..$#.... 0x0202020202020202 ........ 0x0202020202020202 ....#... 0x0202020205020202 ....$.#. 0x0202020202020202 ........ 0x0202020202020202 ...#.... 0x0202030202030202 ..$..$.. 0x0202030202030202 ..$..$..
0x0101010101010101 .#...... 0x0101010102010101 .###$... 0x0101010101010101 ........ 0x0101010101010101 .....#.. 0x0101010101010201 .##.##$. 0x0101010101010101 ##...... 0x0101010101010201 ....#.$# 0x0101010101010101 ....#... 0x0101030201010101 ..$$.... 0x0101010101010101 ........ 0x0101010102010101 ....$... 0x0101010105010201 ##..$.$. 0x0101010101010101 ....#.#. 0x0101010201010101 ...$.#.. 0x0101030101030101 #.$#.$.. 0x0101030101030101 ..$..$..
0x0001000000000000 #$...... 0x0001010102000000 #$$$$... 0x0000000000000000 ........ 0x0000000000010000 #..##$.. 0x0001010001010200 .$$.$$$. 0x0101000000000000 $$...#.. 0x0000000001000201 ....$.$$ 0x0000000001000000 ....$... 0x0000030200000000 #.$$.... 0x0000000000000000 ..#..... 0x0000000002000000 #...$... 0x0101000005000200 $$..$#$. 0x0000000001000100 ....$.$. 0x0000000200010000 #.#$.$#. 0x0100030100030000 $.$$#$.. 0x0000030000030000 #.$..$..
+--MrcGetMarginBit, rsign = 1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........
0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........
0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........
0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........
0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........
0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........
0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........
0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........
0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........
0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........
0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........
0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........
0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........
0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........
0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........
0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........
0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........
0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........
0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........
0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........
0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ....#... 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........
0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x202020201F202020 ....$#.. 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........
0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x212121211F202121 ....$$.. 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........
0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x222222221F202222 ..#.$$.. 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........
0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x232322231F202323 ..$#$$#. 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........
0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x242422231F202324 .#$$$$$# 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........
0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x252422231F202324 #$$$$$$$ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........
0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ....#... 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x252422231F202324 $$$$$$$$ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........
0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272726272727 ....$.## 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x252422231F202324 $$$$$$$$ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........
0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282826282727 ....$.$$ 0x2828282828282828 #....... 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x252422231F202324 $$$$$$$$ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........
0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292926292727 ....$#$$ 0x2829292929292929 $......# 0x2929292929292929 ......## 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x252422231F202324 $$$$$$$$ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........
0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A26292727 .##.$$$$ 0x282A2A2A2A2A2A29 $......$ 0x2A2A2A2A2A2A2929 .....#$$ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A .....#.. 0x252422231F202324 $$$$$$$$ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........
0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2A2A2B26292727 #$$.$$$$ 0x282B2B2B2B2B2B29 $...#..$ 0x2B2B2B2B2B2A2929 .###.$$$ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2A2B2B .....$.. 0x252422231F202324 $$$$$$$$ 0x2B2B2B2B2B2B2B2B ....###. 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ....#.#.
0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2B2A2A2C26292727 $$$.$$$$ 0x282C2C2C2B2C2C29 $#.#$..$ 0x2C2B2B2B2C2A2929 .$$$.$$$ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2A2C2C ...#.$.. 0x252422231F202324 $$$$$$$$ 0x2C2C2C2C2B2B2B2C #...$$$. 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2B2C2B2C .#..$.$#
0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D .....##. 0x2B2A2A2D26292727 $$$#$$$$ 0x282C2D2C2B2D2D29 $$.$$..$ 0x2D2B2B2B2D2A2929 .$$$#$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2C2D2A2D2D ..#$.$.# 0x252422231F202324 $$$$$$$$ 0x2C2D2D2D2B2B2B2D $##.$$$. 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D #....... 0x2D2C2D2D2B2D2B2C .$..$.$$
0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2D2D2E .#..#$$# 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2E29 $$#$$#.$ 0x2E2B2B2B2D2A2929 #$$$$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2D2C2E2A2E2D .#$$.$.$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D2E2B2B2B2E $$$.$$$# 0x2E2E2E2E2E2E2E2E ....#... 0x2D2E2E2E2E2E2E2E $#..#..# 0x2E2C2E2E2B2E2B2C .$..$.$$
0x2F2F2F2F2F2F2F2F ....#.## 0x2F2F2F2F2F2F2F2F ........ 0x2F2E2F2F2E2D2D2E #$#.$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$#$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2E2D2C2F2A2F2D .$$$.$.$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D2F2B2B2B2E $$$.$$$$ 0x2F2F2F2F2E2F2F2F .#..$... 0x2D2E2F2F2E2F2F2E $$..$##$ 0x2F2C2F2F2B2F2B2C .$..$.$$
0x303030302F302F2F ....$.$$ 0x3030303030303030 ........ 0x2F2E2F302E2D2D2E $$$#$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x302E2D2C302A302D .$$$.$#$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$#$$$$ 0x302F30302E303030 .$..$... 0x2D2E30302E2F2F2E $$##$$$$ 0x302C30302B302B2C .$##$#$$
0x313131312F312F2F ..#.$#$$ 0x3131313131313131 ........ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313131313131 ....#... 0x3131313131313131 ........ 0x312E2D2C312A302D .$$$#$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x312F31312E313131 .$..$... 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C #$$$$$$$
0x323231322F312F2F ..$.$$$$ 0x3232323232323232 ........ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3232323232323232 ........ 0x3232323232323232 ........ 0x3232323231323232 ....$... 0x3232323232323232 ........ 0x322E2D2C312A302D #$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x322F32322E323232 .$..$... 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x333331332F312F2F ..$.$$$$ 0x3333333333333333 .....### 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3333333333333333 ........ 0x3333333333333333 ........ 0x3333333331333333 ....$... 0x3333333333333333 .....##. 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x332F33332E333333 .$..$##. 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x343431342F312F2F .#$#$$$$ 0x3434343434333333 ###.#$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3434343434343434 ...##... 0x3434343434343434 ........ 0x3434343431343434 ....$##. 0x3434343434333334 .#...$$. 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F34342E333334 #$..$$$. 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F #$$$$$$$ 0x3434343534333333 $$$#$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3535353434353535 ...$$... 0x3535353535353535 ........ 0x3535353531343435 ....$$$. 0x3534353535333335 .$###$$# 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F35352E333335 $$..$$$# 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3636363434363636 ...$$#.. 0x3636363636363636 .......# 0x3636363631343436 ....$$$. 0x3634353535333335 #$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36362E333335 $$#.$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3737373434363737 ..#$$$.. 0x3737373737373736 .....#.$ 0x3737373731343437 ....$$$. 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$#$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3838373434363838 ..$$$$.# 0x3838383838373836 .....$#$ 0x3838383831343438 .#..$$$# 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$$$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3939373434363938 ##$$$$#$ 0x3939393939373836 ##...$$$ 0x3938393931343438 .$..$$$$ 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$$$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3939373434363938 $$$$$$$$ 0x39393A3A3A373836 $$###$$$ 0x3A383A3A31343438 .$..$$$$ 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$$$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3939373434363938 $$$$$$$$ 0x39393A3A3A373836 $$$$$$$$ 0x3B383B3B31343438 #$#.$$$$ 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$$$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3939373434363938 $$$$$$$$ 0x39393A3A3A373836 $$$$$$$$ 0x3B383B3C31343438 $$$.$$$$ 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$$$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
0x353431342F312F2F $$$$$$$$ 0x3434343534333333 $$$$$$$$ 0x2F2E2F302E2D2D2E $$$$$$$$ 0x2B2A2A2D26292727 $$$$$$$$ 0x282C2E2C2B2E2F29 $$$$$$$$ 0x2E2B2B2B2D2A2929 $$$$$$$$ 0x3939373434363938 $$$$$$$$ 0x39393A3A3A373836 $$$$$$$$ 0x3B383B3D31343438 $$$#$$$$ 0x3634353535333335 $$$$$$$$ 0x322E2D2C312A302D $$$$$$$$ 0x252422231F202324 $$$$$$$$ 0x2C2D2D302B2B2B2E $$$$$$$$ 0x342F36372E333335 $$$$$$$$ 0x2D2E30302E2F2F2E $$$$$$$$ 0x312C30302B302B2C $$$$$$$$
Edges
Mc0.Ch0.B0: [ 1 52][ 2 51][ 0 48][ 0 51][ 0 46][ 0 48][ 0 46][ 0 46]
Mc0.Ch0.B1: [ 1 51][ 2 51][ 2 51][ 2 52][ 3 51][ 0 50][ 0 50][ 0 50]
Mc0.Ch1.B0: [ 0 46][ 0 45][ 0 46][ 0 47][ 0 45][ 0 44][ 0 44][ 0 45]
Mc0.Ch1.B1: [ 1 42][ 0 41][ 0 41][ 1 44][ 1 37][ 2 40][ 0 38][ 0 38]
Mc0.Ch2.B0: [ 0 39][ 2 43][ 2 45][ 0 43][ 2 42][ 2 45][ 3 46][ 0 40]
Mc0.Ch2.B1: [ 2 45][ 2 42][ 0 42][ 0 42][ 0 44][ 1 41][ 0 40][ 0 40]
Mc0.Ch3.B0: [ 0 56][ 0 56][ 0 54][ 0 51][ 2 51][ 0 53][ 3 56][ 2 55]
Mc0.Ch3.B1: [ 0 56][ 0 56][ 0 57][ 0 57][ 2 57][ 0 54][ 0 55][ 0 53]
Mc1.Ch0.B0: [ 1 58][ 0 55][ 4 58][ 3 60][ 0 48][ 0 51][ 0 51][ 0 55]
Mc1.Ch0.B1: [ 0 53][ 0 51][ 1 52][ 0 52][ 0 52][ 0 50][ 0 50][ 0 52]
Mc1.Ch1.B0: [ 1 49][ 0 45][ 0 44][ 0 43][ 3 48][ 0 41][ 0 47][ 0 44]
Mc1.Ch1.B1: [ 2 36][ 2 35][ 0 33][ 0 34][ 5 30][ 1 31][ 3 34][ 0 35]
Mc1.Ch2.B0: [ 0 43][ 0 44][ 0 44][ 0 47][ 2 42][ 0 42][ 2 42][ 0 45]
Mc1.Ch2.B1: [ 1 51][ 0 46][ 1 53][ 3 54][ 0 45][ 2 50][ 1 50][ 0 52]
Mc1.Ch3.B0: [ 2 44][ 0 45][ 4 47][ 2 47][ 1 45][ 4 46][ 0 46][ 0 45]
Mc1.Ch3.B1: [ 1 48][ 0 43][ 4 47][ 0 47][ 0 42][ 4 47][ 0 42][ 0 43]
Per Bit Offset
Mc0.Ch0.B0: 23 23 20 22 19 20 19 19
Mc0.Ch0.B1: 22 23 23 23 23 21 21 21
Mc0.Ch1.B0: 19 19 19 20 19 18 18 19
Mc0.Ch1.B1: 18 17 17 19 15 17 15 15
Mc0.Ch2.B0: 16 19 20 18 18 20 21 16
Mc0.Ch2.B1: 20 18 17 17 18 17 16 16
Mc0.Ch3.B0: 24 24 23 22 23 23 26 25
Mc0.Ch3.B1: 24 24 25 25 26 23 24 23
Mc1.Ch0.B0: 26 24 27 28 20 22 22 24
Mc1.Ch0.B1: 23 22 23 22 22 21 21 22
Mc1.Ch1.B0: 21 19 18 18 22 17 20 18
Mc1.Ch1.B1: 15 15 13 13 14 12 15 14
Mc1.Ch2.B0: 18 18 18 20 18 17 18 19
Mc1.Ch2.B1: 22 19 23 25 19 22 22 22
Mc1.Ch3.B0: 19 19 22 21 19 21 19 19
Mc1.Ch3.B1: 21 18 22 20 17 22 17 18
START_RxDqsBitDelay
R Mc0.C0.R0.S0.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S0.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S0.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S0.B4 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S0.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S0.B6 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S0.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S1.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S1.B1 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B2 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B4 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S1.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S2.B0 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B2 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S2.B4 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S2.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S2.B6 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S2.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S3.B0 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S3.B1 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B2 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B3 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S3.B4 RxDqsBitDelay: 19 (0x13)
R Mc0.C0.R0.S3.B5 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S3.B6 RxDqsBitDelay: 19 (0x13)
R Mc0.C0.R0.S3.B7 RxDqsBitDelay: 19 (0x13)
R Mc0.C0.R0.S4.B0 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S4.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S4.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S4.B3 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S4.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S4.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S4.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S4.B7 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S5.B0 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S5.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B2 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B5 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S5.B7 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R0.S6.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S6.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S6.B2 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S6.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S6.B4 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S6.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S6.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S6.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S7.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S7.B3 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S7.B4 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S7.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S7.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S7.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S0.B0 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S0.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S0.B2 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S0.B3 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S0.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S0.B5 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S0.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S0.B7 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S1.B0 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S1.B1 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S1.B3 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S1.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S1.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S1.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S2.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S2.B2 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S2.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S2.B4 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S2.B6 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S2.B7 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S3.B0 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B1 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B2 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S3.B3 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R0.S3.B4 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R0.S3.B5 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R0.S3.B6 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B7 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R0.S4.B0 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B2 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S4.B4 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S4.B6 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S4.B7 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S5.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S5.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S5.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S5.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S5.B4 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S5.B5 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S5.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S5.B7 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S6.B0 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S6.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S6.B2 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S6.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B4 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S6.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S6.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S6.B7 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S7.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S7.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S7.B2 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S7.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S7.B4 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S7.B5 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S7.B6 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S7.B7 RxDqsBitDelay: 22 (0x16)
STOP_RxDqsBitDelay
LstSavd Margins 150 160 150 160 110 120 160 160 160 160 160 170 90 100 150 150 160 170 180 180 170 180 170 180 180 180 160 160 180 180 160 160 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 160 130 150 130 100 90 150 130 150 130 140 140 50 70 140 120 150 140 170 150 150 150 150 150 150 150 160 130 170 150 130 130
Weighted Center -2 -1 -1 -1 -1 0 1 -1 -1 -1 0 0 0 -2 -1 0
Final Center -13 -12 -8 -12 -12 -12 -4 -11 -13 -14 -13 -13 -13 -13 -14 -11
Edges we pass on to GetMarginBit are
140 150 140 140 90 100 140 140 140 140 140 140 60 60 130 130 140 150 160 160 150 150 150 150 150 150 140 150 160 160 130 130
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 .....#.. 0x0404040404040404 .....#.. 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0303030303030303 .#...... 0x0303030303030303 ..##.... 0x0303030303050303 ....#.#. 0x0303030303050303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ....#... 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 #....... 0x0303030303030303 ........ 0x0303030303030303 ........ 0x0303030303030303 ...#.#.. 0x0303030303030303 ........ 0x0303030303030303 ........
0x0203020202020202 .$...... 0x0202030302020202 #.$$.... 0x0202020203050302 ....$$$. 0x0202020202050202 ...##$#. 0x0202020202020202 ..#.#.#. 0x0202020202020202 ##...... 0x0202020202020202 ........ 0x0202020203020202 ..#.$#.. 0x0202020202020202 ........ 0x0202020202020202 ..###.#. 0x0302020202020202 $....... 0x0202020202020202 ......#. 0x0202020202020202 ........ 0x0202020302030202 ..#$.$.. 0x0202020202020202 ..#..... 0x0202020202020202 ........
0x0103010101010101 .$...... 0x0201030301010101 $.$$.... 0x0101010103050301 .#..$$$. 0x0101010202050201 ...$$$$. 0x0101020102010201 ..$.$.$. 0x0202010101010101 $$...#.. 0x0101010101010101 ........ 0x0101020103020101 ..$.$$.. 0x0101010101010101 #.#.#... 0x0101020202010201 ##$$$#$# 0x0301010101010101 $....... 0x0101010101010201 ##..##$. 0x0101010101010101 ........ 0x0101020301030101 ..$$.$.. 0x0101020101010101 ..$..... 0x0101010101010101 .....#..
0x0003000000000000 #$...... 0x0200030300000000 $#$$#### 0x0001000003050300 #$##$$$# 0x0000000202050200 ..#$$$$# 0x0000020002000200 ..$.$.$. 0x0202000000010000 $$...$.. 0x0000000000000000 ......#. 0x0000020003020000 ..$.$$.. 0x0100010001000000 $.$#$... 0x0101020202010201 $$$$$$$$ 0x0300000000000000 $...#... 0x0101000001010200 $$#.$$$. 0x0000000000000000 ....#.#. 0x0000020300030000 #.$$.$## 0x0000020000000000 ..$##... 0x0000000000010000 .....$..
+--MrcGetMarginBit, rsign = 1
0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........ 0x0404040404040404 ........
0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........ 0x0505050505050505 ........
0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........ 0x0606060606060606 ........
0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........ 0x0707070707070707 ........
0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........ 0x0808080808080808 ........
0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........ 0x0909090909090909 ........
0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........ 0x0A0A0A0A0A0A0A0A ........
0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........ 0x0B0B0B0B0B0B0B0B ........
0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........ 0x0C0C0C0C0C0C0C0C ........
0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........ 0x0D0D0D0D0D0D0D0D ........
0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........ 0x0E0E0E0E0E0E0E0E ........
0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........ 0x0F0F0F0F0F0F0F0F ........
0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........ 0x1010101010101010 ........
0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........ 0x1111111111111111 ........
0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........ 0x1212121212121212 ........
0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........ 0x1313131313131313 ........
0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........ 0x1414141414141414 ........
0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........ 0x1515151515151515 ........
0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........ 0x1616161616161616 ........
0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........ 0x1717171717171717 ........
0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........ 0x1818181818181818 ........
0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........ 0x1919191919191919 ........
0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........ 0x1A1A1A1A1A1A1A1A ........
0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........ 0x1B1B1B1B1B1B1B1B ........
0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........ 0x1C1C1C1C1C1C1C1C ........
0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ....#... 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........ 0x1D1D1D1D1D1D1D1D ........
0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1D1E1E1E ....$... 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........ 0x1E1E1E1E1E1E1E1E ........
0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1D1F1F1F ....$... 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........ 0x1F1F1F1F1F1F1F1F ........
0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x202020201D202020 ....$... 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........ 0x2020202020202020 ........
0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x212121211D212121 ....$#.# 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........ 0x2121212121212121 ........
0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x222222221D212221 ..#.$$.$ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........ 0x2222222222222222 ........
0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x232322231D212321 ..$.$$#$ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........ 0x2323232323232323 ........
0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x242422241D212321 ..$#$$$$ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........ 0x2424242424242424 ........
0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x252522241D212321 .#$$$$$$ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........ 0x2525252525252525 ........
0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x262522241D212321 #$$$$$$$ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........ 0x2626262626262626 ........
0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x262522241D212321 $$$$$$$$ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........ 0x2727272727272727 ........
0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ....#... 0x2828282828282828 ........ 0x2828282828282828 ..#...#. 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x262522241D212321 $$$$$$$$ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ........ 0x2828282828282828 ......#.
0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292928292929 ....$.#. 0x2929292929292929 ........ 0x2929282929292829 ..$#..$. 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292929 .....#.. 0x262522241D212321 $$$$$$$$ 0x2929292929292929 ##..#... 0x2929292929292929 ........ 0x2929292929292929 ........ 0x2929292929292829 ......$.
0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A282A292A ....$.$. 0x2A2A2A2A2A2A2A2A ........ 0x2A2A28292A2A282A ..$$..$. 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A292A2A .....$.. 0x262522241D212321 $$$$$$$$ 0x29292A2A292A2A2A $$..$#.. 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A2A2A ........ 0x2A2A2A2A2A2A282A .#....$#
0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B282B292B ..#.$.$# 0x2B2B2B2B2B2B2B2B ...#...# 0x2B2B28292B2B282B ..$$..$# 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B292B2B ..#..$.# 0x262522241D212321 $$$$$$$$ 0x29292B2B292A2B2B $$..$$#. 0x2B2B2B2B2B2B2B2B ........ 0x2B2B2B2B2B2B2B2B ........ 0x2B2A2B2B2B2B282A .$....$$
0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2B2C282C292B .#$.$#$$ 0x2C2C2C2B2C2C2C2B #..$.#.$ 0x2C2C28292C2C282B .#$$##$$ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2B2C2C292C2B .#$#.$.$ 0x262522241D212321 $$$$$$$$ 0x29292C2C292A2B2C $$#.$$$# 0x2C2C2C2C2C2C2C2C ........ 0x2C2C2C2C2C2C2C2C ........ 0x2C2A2C2C2C2C282A .$..#.$$
0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D .....#.. 0x2D2C2B2D282C292B .$$#$$$$ 0x2C2D2D2B2D2C2D2B $.#$#$.$ 0x2D2C28292C2C282B .$$$$$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D ........ 0x2D2C2B2C2D292D2B .$$$.$.$ 0x262522241D212321 $$$$$$$$ 0x29292C2D292A2B2C $$$.$$$$ 0x2D2D2D2D2D2D2D2D ........ 0x2D2D2D2D2D2D2D2D .#.....# 0x2D2A2D2D2C2D282A .$..$.$$
0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2D2E2E .....$.# 0x2E2C2B2D282C292B .$$$$$$$ 0x2C2E2D2B2D2C2E2B $#$$$$#$ 0x2E2C28292C2C282B .$$$$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E ........ 0x2E2E2E2E2E2E2E2E .#...... 0x2E2C2B2C2E292E2B .$$$.$.$ 0x262522241D212321 $$$$$$$$ 0x29292C2E292A2B2C $$$.$$$$ 0x2E2E2E2E2E2E2E2E ........ 0x2E2D2E2E2E2E2E2D #$..#..$ 0x2E2A2E2E2C2E282A .$..$#$$
0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2D2F2E .#..#$.$ 0x2F2C2B2D282C292B #$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x2F2C28292C2C282B .$$$$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2F2F2F2F2F2F2F ........ 0x2F2E2F2F2F2F2F2F .$...#.. 0x2F2C2B2C2F292F2B .$$$.$.$ 0x262522241D212321 $$$$$$$$ 0x29292C2F292A2B2C $$$.$$$$ 0x2F2F2F2F2F2F2F2F ........ 0x2E2D2F2F2E2F2F2D $$..$.#$ 0x2F2A2F2F2C2E282A .$#.$$$$
0x3030303030303030 .......# 0x3030303030303030 ........ 0x302F30302F2D302E .$..$$.$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B #$$$$$$$ 0x3030303030303030 ........ 0x3030303030303030 ........ 0x3030303030303030 ....#... 0x302E3030302F3030 #$.##$## 0x302C2B2C3029302B .$$$#$#$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$#$$$$ 0x3030303030303030 ....#... 0x2E2D30302E302F2D $$.#$#$$ 0x302A2F302C2E282A #$$#$$$$
0x3131313131313130 ....#..$ 0x3131313131313131 ........ 0x312F31312F2D312E #$..$$#$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3131313131313131 ........ 0x3131313131313131 ........ 0x3131313130313131 ....$... 0x302E3130302F3030 $$.$$$$$ 0x312C2B2C3029302B .$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3131313130313131 .#..$... 0x2E2D31302E302F2D $$.$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3232323231323230 ..#.$##$ 0x3232323232323232 .....#.# 0x312F32322F2D312E $$#.$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3232323232323232 ........ 0x3232323232323232 ........ 0x3232323230323232 ....$#.. 0x302E3230302F3030 $$#$$$$$ 0x322C2B2C3029302B #$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3231323230323232 .$..$... 0x2E2D32302E302F2D $$.$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3333323331323230 ..$.$$$$ 0x3333333333323332 ..#..$#$ 0x312F32332F2D312E $$$#$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3333333333333333 ........ 0x3333333333333333 .....#.. 0x3333333330323333 ....$$.# 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3331333330333333 .$..$... 0x2E2D33302E302F2D $$#$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3434323431323230 ..$.$$$$ 0x3434333434323332 ##$..$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3434343434343434 ....#... 0x3434343434333434 .....$.. 0x3434343430323433 .#..$$#$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3431343430343434 .$..$... 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3535323531323230 ..$.$$$$ 0x3434333535323332 $$$..$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3535353534353535 ....$... 0x3535353535333535 .....$.. 0x3534353530323433 .$..$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531353530353535 #$..$#.. 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3636323631323230 #.$#$$$$ 0x3434333636323332 $$$##$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3636363634363636 ....$#.. 0x3636363636333636 .....$.# 0x3634363630323433 .$..$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363630353636 $$#.$$#. 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $#$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3737373734363737 ....$$.. 0x3737373737333736 .....$.$ 0x3734373730323433 .$..$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353637 $$$#$$$. 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $$$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3838383834363838 ....$$#. 0x3838383838333836 .##.#$#$ 0x3834383830323433 #$..$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353638 $$$$$$$# 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $$$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x3939393934363839 #.##$$$. 0x3938383938333836 #$$#$$$$ 0x3834393930323433 $$#.$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353638 $$$$$$$$ 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $$$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x393A39393436383A $.$$$$$. 0x3938383938333836 $$$$$$$$ 0x3834393A30323433 $$$#$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353638 $$$$$$$$ 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $$$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x393B39393436383B $.$$$$$# 0x3938383938333836 $$$$$$$$ 0x3834393A30323433 $$$$$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353638 $$$$$$$$ 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $$$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x393C39393436383B $.$$$$$$ 0x3938383938333836 $$$$$$$$ 0x3834393A30323433 $$$$$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353638 $$$$$$$$ 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
0x3637323631323230 $$$$$$$$ 0x3434333636323332 $$$$$$$$ 0x312F32332F2D312E $$$$$$$$ 0x2F2C2B2D282C292B $$$$$$$$ 0x2C2E2D2B2D2C2E2B $$$$$$$$ 0x302C28292C2C282B $$$$$$$$ 0x393D39393436383B $#$$$$$$ 0x3938383938333836 $$$$$$$$ 0x3834393A30323433 $$$$$$$$ 0x302E3230302F3030 $$$$$$$$ 0x322C2B2C3029302B $$$$$$$$ 0x262522241D212321 $$$$$$$$ 0x29292C30292A2B2C $$$$$$$$ 0x3531363730353638 $$$$$$$$ 0x2E2D33302E302F2D $$$$$$$$ 0x302A2F302C2E282A $$$$$$$$
Edges
Mc0.Ch0.B0: [ 1 53][ 4 54][ 0 49][ 0 53][ 0 48][ 0 49][ 0 49][ 0 47]
Mc0.Ch0.B1: [ 3 51][ 1 51][ 4 50][ 4 53][ 1 53][ 1 49][ 1 50][ 1 49]
Mc0.Ch1.B0: [ 1 48][ 2 46][ 1 49][ 1 50][ 4 46][ 5 44][ 4 48][ 1 45]
Mc0.Ch1.B1: [ 0 46][ 0 43][ 1 42][ 3 44][ 3 39][ 5 43][ 3 40][ 1 42]
Mc0.Ch2.B0: [ 0 43][ 0 45][ 3 44][ 0 42][ 3 44][ 0 43][ 3 45][ 0 42]
Mc0.Ch2.B1: [ 3 47][ 3 43][ 0 39][ 0 40][ 0 43][ 2 43][ 0 39][ 0 42]
Mc0.Ch3.B0: [ 0 56][ 0 60][ 0 56][ 0 56][ 0 51][ 0 53][ 1 55][ 0 58]
Mc0.Ch3.B1: [ 0 56][ 0 55][ 3 55][ 0 56][ 4 55][ 3 50][ 0 55][ 0 53]
Mc1.Ch0.B0: [ 2 55][ 0 51][ 2 56][ 1 57][ 2 47][ 0 49][ 0 51][ 0 50]
Mc1.Ch0.B1: [ 2 47][ 2 45][ 3 49][ 3 47][ 3 47][ 2 46][ 3 47][ 2 47]
Mc1.Ch1.B0: [ 4 49][ 0 43][ 0 42][ 0 43][ 1 47][ 0 40][ 0 47][ 0 42]
Mc1.Ch1.B1: [ 2 37][ 2 36][ 1 33][ 0 35][ 2 28][ 2 32][ 3 34][ 0 32]
Mc1.Ch2.B0: [ 0 40][ 0 40][ 0 43][ 0 47][ 1 40][ 0 41][ 1 42][ 0 43]
Mc1.Ch2.B1: [ 1 52][ 0 48][ 3 53][ 4 54][ 0 47][ 4 52][ 1 53][ 1 55]
Mc1.Ch3.B0: [ 0 45][ 0 44][ 3 50][ 1 47][ 1 45][ 0 47][ 0 46][ 0 44]
Mc1.Ch3.B1: [ 0 47][ 0 41][ 0 46][ 0 47][ 0 43][ 2 45][ 0 39][ 0 41]
Per Bit Offset
Mc0.Ch0.B0: 23 25 21 23 20 21 21 20
Mc0.Ch0.B1: 23 22 23 25 23 21 22 21
Mc0.Ch1.B0: 21 20 21 22 21 21 22 19
Mc0.Ch1.B1: 19 18 18 20 17 20 18 18
Mc0.Ch2.B0: 18 19 20 17 20 18 20 17
Mc0.Ch2.B1: 21 19 16 16 18 19 16 17
Mc0.Ch3.B0: 24 26 24 24 22 23 24 25
Mc0.Ch3.B1: 24 24 25 24 26 23 24 23
Mc1.Ch0.B0: 25 22 25 25 21 21 22 21
Mc1.Ch0.B1: 21 20 22 21 21 20 21 21
Mc1.Ch1.B0: 23 18 17 18 20 16 20 17
Mc1.Ch1.B1: 16 15 13 14 11 13 15 12
Mc1.Ch2.B0: 16 16 18 20 17 17 18 18
Mc1.Ch2.B1: 23 20 24 25 20 24 23 24
Mc1.Ch3.B0: 19 18 23 20 19 20 19 18
Mc1.Ch3.B1: 20 17 19 20 18 20 16 17
START_RxDqsBitDelay
R Mc0.C0.R1.S0.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S0.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S0.B2 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S0.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S0.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S0.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S0.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S0.B7 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S1.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S1.B1 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S1.B2 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S1.B3 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S1.B4 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S1.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S1.B6 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B0 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B1 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S2.B2 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B3 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B4 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B5 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S2.B6 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S2.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B0 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S3.B1 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S3.B2 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S3.B3 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S3.B4 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S3.B5 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S3.B6 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S3.B7 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B0 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S4.B2 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S4.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S4.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S4.B5 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S4.B6 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R1.S4.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S5.B0 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R1.S5.B1 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S5.B2 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B3 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B4 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R1.S5.B5 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R1.S5.B6 RxDqsBitDelay: 20 (0x14)
R Mc0.C0.R1.S5.B7 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R1.S6.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B1 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S6.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R1.S6.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S6.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S6.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S7.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B4 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S7.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R1.S7.B6 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S7.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S0.B0 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S0.B1 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S0.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S0.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S0.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S0.B5 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S0.B6 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S0.B7 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B0 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S1.B2 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R1.S1.B3 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B4 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S1.B6 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S1.B7 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R1.S2.B0 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S2.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S2.B2 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S2.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S2.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S2.B5 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S2.B6 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S2.B7 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S3.B0 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S3.B1 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R1.S3.B2 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R1.S3.B3 RxDqsBitDelay: 18 (0x12)
R Mc1.C1.R1.S3.B4 RxDqsBitDelay: 15 (0xF)
R Mc1.C1.R1.S3.B5 RxDqsBitDelay: 17 (0x11)
R Mc1.C1.R1.S3.B6 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R1.S3.B7 RxDqsBitDelay: 16 (0x10)
R Mc1.C1.R1.S4.B0 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S4.B1 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S4.B2 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S4.B4 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S4.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S4.B6 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S4.B7 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S5.B0 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S5.B1 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B2 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S5.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S5.B4 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S5.B5 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S5.B6 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S5.B7 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S6.B0 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S6.B1 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S6.B2 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S6.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S6.B4 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S6.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S6.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S6.B7 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S7.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S7.B2 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S7.B3 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B4 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S7.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S7.B6 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S7.B7 RxDqsBitDelay: 21 (0x15)
STOP_RxDqsBitDelay
Calling with EnRxDutyCycle = 1, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 140 150 140 150 90 80 140 140 140 140 140 150 60 70 110 120 140 150 150 160 140 150 150 150 140 150 130 140 160 160 140 150 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 150 240 150 180 80 200 140 230 140 220 150 180 70 240 120 250 150 260 160 240 150 230 150 230 150 230 140 250 160 220 150
Vref = -11: 230 150 230 150 190 80 210 140 220 140 210 150 170 70 260 120 250 150 250 160 230 150 230 150 220 150 210 140 260 160 230 150
Vref = -22: 210 150 210 150 190 80 220 140 210 140 170 150 150 70 240 120 250 150 250 160 220 150 210 150 220 150 190 140 270 160 220 150
Vref = -33: 190 150 190 150 150 80 170 140 180 140 150 150 140 70 210 120 230 150 230 160 190 150 190 150 200 150 170 140 240 160 190 150
Vref = 11: 220 150 230 150 170 80 210 140 200 140 200 150 150 70 200 120 230 150 240 160 230 150 210 150 220 150 210 140 250 160 230 150
Vref = 22: 180 150 210 150 140 80 180 140 170 140 160 150 130 70 180 120 200 150 220 160 210 150 180 150 200 150 180 140 210 160 200 150
Vref = 33: 150 150 170 150 110 80 130 140 140 140 140 150 80 70 150 120 160 150 180 160 170 150 150 150 160 150 160 140 180 160 160 150
Weighted Center -3 -4 -5 -3 -3 -2 -4 -5 -4 -4 -4 -3 -3 -3 -4 -3
Final Center -13 -13 -6 -12 -12 -13 -5 -10 -13 -14 -13 -13 -13 -12 -14 -13
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 150 230 150 180 80 200 140 220 140 210 150 180 70 250 120 250 150 260 160 230 150 200 150 220 150 230 140 250 160 220 150
Vref = -11: 220 150 220 150 160 80 190 140 200 140 190 150 150 70 260 120 250 150 250 160 220 150 180 150 220 150 200 140 240 160 190 150
Vref = -22: 190 150 200 150 130 80 160 140 190 140 170 150 120 70 230 120 220 150 220 160 190 150 170 150 190 150 180 140 210 160 180 150
Vref = -33: 180 150 180 150 100 80 130 140 160 140 140 150 100 70 210 120 190 150 190 160 170 150 140 150 180 150 150 140 180 160 130 150
Vref = 11: 220 150 220 150 160 80 200 140 190 140 200 150 160 70 250 120 220 150 230 160 210 150 190 150 200 150 200 140 230 160 220 150
Vref = 22: 190 150 190 150 130 80 180 140 170 140 170 150 120 70 220 120 190 150 210 160 180 150 170 150 180 150 170 140 200 160 190 150
Vref = 33: 160 150 160 150 90 80 140 140 150 140 150 150 100 70 190 120 170 150 180 160 160 150 150 150 150 150 140 140 170 160 170 150
Weighted Center -3 -3 -4 -2 -3 -2 -4 -6 -4 -4 -3 -2 -3 -3 -3 -2
Final Center -16 -16 -10 -14 -15 -15 -9 -16 -17 -18 -16 -15 -16 -15 -17 -15
LstSavd Margins 140 150 140 140 90 100 140 140 140 140 140 140 60 60 130 130 140 150 160 160 150 150 150 150 150 150 140 150 160 160 130 130 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 250 150 240 140 190 100 210 140 230 140 230 140 170 60 250 130 250 150 250 160 250 150 220 150 240 150 240 150 250 160 230 130
Vref = -11: 250 150 240 140 170 100 230 140 220 140 240 140 180 60 250 130 250 150 250 160 230 150 230 150 240 150 220 150 250 160 240 130
Vref = -22: 240 150 240 140 170 100 220 140 230 140 230 140 160 60 240 130 250 150 240 160 230 150 230 150 230 150 210 150 260 160 220 130
Vref = -33: 220 150 210 140 140 100 180 140 210 140 190 140 150 60 220 130 240 150 230 160 210 150 210 150 220 150 190 150 240 160 190 130
Vref = 11: 250 150 240 140 150 100 220 140 220 140 240 140 170 60 240 130 230 150 230 160 250 150 210 150 230 150 230 150 240 160 230 130
Vref = 22: 230 150 230 140 130 100 190 140 190 140 220 140 120 60 190 130 200 150 210 160 230 150 210 150 220 150 200 150 220 160 210 130
Vref = 33: 190 150 190 140 80 100 140 140 150 140 170 140 100 60 170 130 160 150 190 160 190 150 180 150 180 150 180 150 180 160 170 130
Weighted Center -4 -5 -3 -3 -4 -4 -5 -5 -4 -4 -4 -3 -4 -3 -4 -5
Final Center -13 -12 -8 -12 -12 -12 -4 -11 -13 -14 -13 -13 -13 -13 -14 -11
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 150 230 140 170 100 210 140 220 140 220 140 160 60 230 130 240 150 240 160 240 150 190 150 230 150 230 150 250 160 210 130
Vref = -11: 220 150 220 140 160 100 190 140 210 140 200 140 150 60 230 130 240 150 240 160 220 150 180 150 220 150 210 150 240 160 190 130
Vref = -22: 190 150 200 140 130 100 160 140 190 140 190 140 110 60 200 130 220 150 220 160 190 150 160 150 200 150 190 150 210 160 170 130
Vref = -33: 180 150 180 140 90 100 130 140 160 140 150 140 90 60 180 130 180 150 190 160 170 150 140 150 180 150 170 150 180 160 130 130
Vref = 11: 210 150 210 140 150 100 200 140 190 140 200 140 170 60 210 130 210 150 220 160 220 150 190 150 210 150 220 150 230 160 210 130
Vref = 22: 180 150 180 140 120 100 180 140 180 140 180 140 140 60 190 130 180 150 190 160 200 150 180 150 190 150 190 150 200 160 190 130
Vref = 33: 150 150 150 140 80 100 150 140 140 140 160 140 100 60 150 130 150 150 170 160 180 150 160 150 160 150 160 150 170 160 160 130
Weighted Center -3 -3 -2 -2 -3 -3 -4 -4 -3 -3 -3 -1 -3 -3 -3 -3
Final Center -16 -15 -10 -14 -15 -15 -8 -15 -16 -17 -16 -14 -16 -16 -17 -14
MRC task Read Timing Centering 2D Before Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD49h
MRC task -- PowerSavingMeter Base Line Update -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MRC task PowerSavingMeter Base Line Update -- SUCCEEDED, Status = 0h.
Post Code: DD3Ah
MRC task -- Command Voltage Centering -- Started.
Cmd Vref Training with LC = 10
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . # # . . # # # # # # 0x6D09_0 0x0_0 0x0_0 0x6813_0 0x0_0 0x1233_0 0x725A_0 0xEC_0
-36 # # . . . . # # . . . . # # . . 0x4C3B_0 0x0_0 0x0_0 0x683A_0 0x0_0 0x0_0 0x297_0 0x0_0
-32 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0xA09_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -28 40 68 6
B1: -28 40 68 6
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc1.C2.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R0: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . . . . . # # # # . . 0x4AC0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x52EE_0 0x618D_0 0x0_0
-36 . . . . . . . . . . # # # # . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x1E7A_0 0x147_0 0x0_0
-32 . . . . . . . . . . # # . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x71_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -28 40 68 6
B1: -28 40 68 6
Mc1.C2.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Cmd Vref Summary:
Low High Height Center
Mc0.C0: 32 40 72 4
Mc0.C1: 40 40 80 0
Mc0.C2: 40 40 80 0
Mc0.C3: 28 40 68 6
Mc1.C0: 40 40 80 0
Mc1.C1: 28 40 68 6
Mc1.C2: 32 40 72 4
Mc1.C3: 36 40 76 2
MRC task Command Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD3Eh
MRC task -- Late command training -- Started.
Mc0: C0: CmdGroup0 Pi Code: 128
Mc0: C1: CmdGroup0 Pi Code: 128
Mc0: C2: CmdGroup0 Pi Code: 128
Mc0: C3: CmdGroup0 Pi Code: 128
Mc1: C0: CmdGroup0 Pi Code: 128
Mc1: C1: CmdGroup0 Pi Code: 128
Mc1: C2: CmdGroup0 Pi Code: 128
Mc1: C3: CmdGroup0 Pi Code: 128
*** Center CMD Pi Timing
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
. . . . # . . .
32 32 32 32 96 32 32 32
# # # # . # # #
48 48 48 48 80 48 48 48
# # # # . # # #
56 56 56 56 72 56 56 56
# # # # . # # #
60 60 60 60 68 60 60 60
# # # # . # # #
62 62 62 62 66 62 62 62
# . # # . . . #
63 61 63 63 65 61 61 63
. # . . . . # .
Pi Delay
192 192 192 192 192 192 192 192
# # # # # # # #
160 160 160 160 160 160 160 160
. . . . . # . .
176 176 176 176 176 144 176 176
# # # # # . # #
168 168 168 168 168 152 168 168
# # . . . . . #
164 164 172 172 172 156 172 164
. # . # . . . #
166 162 174 170 174 158 174 162
# . # . # . # #
165 163 173 171 173 159 173 161
# # . # . . . .
Mc Ch Left Right Width Center
0 0 63 164 101 114
0 1 62 162 100 112
0 2 63 173 110 118
0 3 63 170 107 117
1 0 65 173 108 119
1 1 61 159 98 110
1 2 62 173 111 118
1 3 63 161 98 112
*** Center Control Timing
*** ECT results
Ctl0Ch0Rank0: CTL: 128
Ctl0Ch0Rank1: CTL: 128
Ctl0Ch1Rank0: CTL: 128
Ctl0Ch1Rank1: CTL: 128
Ctl0Ch2Rank0: CTL: 128
Ctl0Ch2Rank1: CTL: 128
Ctl0Ch3Rank0: CTL: 128
Ctl0Ch3Rank1: CTL: 128
Ctl1Ch0Rank0: CTL: 128
Ctl1Ch0Rank1: CTL: 128
Ctl1Ch1Rank0: CTL: 128
Ctl1Ch1Rank1: CTL: 128
Ctl1Ch2Rank0: CTL: 128
Ctl1Ch2Rank1: CTL: 128
Ctl1Ch3Rank0: CTL: 128
Ctl1Ch3Rank1: CTL: 128
Centering CTL on Ranks 0x3
Rank 0x0
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
# # # . # . # #
96 96 96 32 96 32 96 96
. . . # . # . .
80 80 80 48 80 48 80 80
. . . # . # . .
72 72 72 56 72 56 72 72
. . . # # # . .
68 68 68 60 76 60 68 68
# . # # . # # .
70 66 70 62 74 62 70 66
# # # # # . # .
71 67 71 63 75 61 71 65
# # # # . # . #
Pi Delay
192 192 192 192 192 192 192 192
. # . # . # # #
224 160 224 160 224 160 160 160
# . # . # . . .
208 176 208 176 208 176 176 176
# . # . # . . .
200 184 200 184 200 184 184 184
# . # . # # . .
196 188 196 188 196 180 188 188
# # # # # . . #
194 186 194 186 194 182 190 186
# . # # # . . #
193 187 193 185 193 183 191 185
# # . # . # . .
Mc Ch Left Right Width Center
0 0 72 192 120 132
0 1 68 186 118 127
0 2 72 193 121 133
0 3 64 184 120 124
1 0 75 193 118 134
1 1 62 182 120 122
1 2 71 191 120 131
1 3 66 185 119 126
Rank 0x1
Mc0Ch0 Mc0Ch1 Mc0Ch2 Mc0Ch3 Mc1Ch0 Mc1Ch1 Mc1Ch2 Mc1Ch3
Pi Delay
64 64 64 64 64 64 64 64
# # # # # . # .
96 96 96 96 96 32 96 32
. . . . . # . #
80 80 80 80 80 48 80 48
. . . . . # . #
72 72 72 72 72 56 72 56
. . . . . # . #
68 68 68 68 68 60 68 60
# . # . . # . #
70 66 70 66 66 62 66 62
. # # # # . # .
69 67 71 67 67 61 67 61
. # . # # # . #
Pi Delay
192 192 192 192 192 192 192 192
# # # # # # # #
160 160 160 160 160 160 160 160
. . . . . . . .
176 176 176 176 176 176 176 176
. . . . . . . .
184 184 184 184 184 184 184 184
. . . . . # . #
188 188 188 188 188 180 188 180
. # . # . . . .
190 186 190 186 190 182 190 182
# . . . # . # .
189 187 191 187 189 183 189 183
. # # # # # # #
Mc Ch Left Right Width Center
0 0 69 189 120 129
0 1 68 186 118 127
0 2 71 190 119 131
0 3 68 186 118 127
1 0 68 188 120 128
1 1 62 182 120 122
1 2 67 188 121 128
1 3 62 182 120 122
MRC task Late command training -- SUCCEEDED, Status = 0h.
Post Code: DD3Ah
MRC task -- Command Voltage Centering -- Started.
Cmd Vref Training with LC = 10
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . # # . . # # # # . . 0x6660_0 0x0_0 0x0_0 0x699E_0 0x0_0 0x74_0 0x498D_0 0x0_0
-36 # # . . . . # # . . # # # # . . 0x478E_0 0x0_0 0x0_0 0x603E_0 0x0_0 0x6C_0 0x76_0 0x0_0
-32 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0xDD0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . # # . . . . . . . . 0x0_0 0x0_0 0x0_0 0xD7_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc0.C1.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R0: Left Right Width Center
B0: -24 40 64 8
B1: -24 40 64 8
Mc1.C0.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C2.R0: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R0: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Rank = 1
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
CmdVoltage
-40 # # . . . . . . . . # # # # . . 0x5717_0 0x0_0 0x0_0 0x0_0 0x0_0 0x58A2_0 0x6FBB_0 0x0_0
-36 . . . . . . . . . . # # # # . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x1ED5_0 0x5514_0 0x0_0
-32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
0 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
4 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
8 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
12 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
16 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
20 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
24 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
28 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
32 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
36 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
40 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
Mc0.C0.R1: Left Right Width Center
B0: -36 40 76 2
B1: -36 40 76 2
Mc0.C1.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C2.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc0.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C0.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Mc1.C1.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C2.R1: Left Right Width Center
B0: -32 40 72 4
B1: -32 40 72 4
Mc1.C3.R1: Left Right Width Center
B0: -40 40 80 0
B1: -40 40 80 0
Cmd Vref Summary:
Low High Height Center
Mc0.C0: 32 40 72 4
Mc0.C1: 40 40 80 0
Mc0.C2: 40 40 80 0
Mc0.C3: 24 40 64 8
Mc1.C0: 40 40 80 0
Mc1.C1: 32 40 72 4
Mc1.C2: 32 40 72 4
Mc1.C3: 40 40 80 0
MRC task Command Voltage Centering -- SUCCEEDED, Status = 0h.
Post Code: DD41h
MRC task -- Comp Optimization Training -- Started.
***** Opt Param:SCompCmd *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 63
Comp Vref: 16
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:SCompCtl *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 52
Comp Vref: 0
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:SCompDq *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 0
Comp Vref: 0
MC0.Ch0
MC0.Ch1
MC0.Ch2
MC0.Ch3
MC1.Ch0
MC1.Ch1
MC1.Ch2
MC1.Ch3
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCmdUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 5
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 2, side effect = FALSE
Comp: 13
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCmdDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCtlUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 5
Comp Vref: 86
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 6
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSCtlDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 6
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 15
Comp Vref: 106
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 1, side effect = TRUE
Comp: 22
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 2, side effect = TRUE
Comp: 8
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:WrDSDn *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 22
Comp Vref: 96
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
***** Opt Param:RdOdtUp *****
Initial Values
Comp Offset Param: 0, side effect = FALSE
Comp: 8
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
Comp Offset Param: 1, side effect = FALSE
Comp: 8
Comp Vref: 127
MC0.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC0.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch0
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch1
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch2
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MC1.Ch3
Byte 0 , Comp Offset: 0
Byte 1 , Comp Offset: 0
MinDelta = 0, so comp offsets are already at optimal values. Final values equal initial values.
Re-center Cmd/Ctl Timings
Centering CTL/CMD on Ranks 0x3
Mc Ch Left Right Width Center
0 0 500 520 102 1
Mc Ch Left Right Width Center
0 1 500 540 104 2
Mc Ch Left Right Width Center
0 2 540 580 112 2
Mc Ch Left Right Width Center
0 3 400 540 94 7
Mc Ch Left Right Width Center
1 0 560 540 110 -1
Mc Ch Left Right Width Center
1 1 500 560 106 3
Mc Ch Left Right Width Center
1 2 560 600 116 2
Mc Ch Left Right Width Center
1 3 360 540 90 9
Re-center Cmd Vref
Re-center Write Timing
Re-center Read Timing
Re-center Write Vref
Re-center Read Vref
Re-center RcvEnable
MRC task Comp Optimization Training -- SUCCEEDED, Status = 0h.
Post Code: DD3Bh
MRC task -- Write Voltage Centering 2D -- Started.
Mc0.Ch0 TimScale is 12
Mc0.Ch1 TimScale is 12
Mc0.Ch2 TimScale is 12
Mc0.Ch3 TimScale is 12
Mc1.Ch0 TimScale is 12
Mc1.Ch1 TimScale is 12
Mc1.Ch2 TimScale is 12
Mc1.Ch3 TimScale is 12
Rank0
Mc0.Ch0: Mc0.Ch1: Mc0.Ch2: Mc0.Ch3: Mc1.Ch0: Mc1.Ch1: Mc1.Ch2: Mc1.Ch3:
WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center WrTime Low High Height Center
-4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0 -4 39 40 79 0
4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0 4 39 40 79 0
0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0 0 39 40 79 0
WtdCntr 1 1 1 1 1 1 1 1
MRC task Write Voltage Centering 2D -- SUCCEEDED, Status = 0h.
Post Code: DD3Ch
MRC task -- Read Voltage Centering 2D -- Started.
### Measure Eye Height, per BYTE, at ALL (2D) Timing Points RankMask = 0xF
Mc0.Ch0 Mc0.Ch1 Mc0.Ch2 Mc0.Ch3 Mc1.Ch0 Mc1.Ch1 Mc1.Ch2 Mc1.Ch3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TScale 12 12 11 12 12 12 10 12 12 12 12 12 12 12 12 12
RdTime 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Lo 411 420 400 430 427 430 380 430 470 490 380 420 360 450 475 440
High 450 450 400 460 490 420 370 440 466 460 375 410 350 453 480 486
Center 1 1 0 1 3 0 0 0 0 -1 0 0 0 0 0 2
RdTime -8 -8 -7 -8 -8 -8 -6 -8 -8 -8 -8 -8 -8 -8 -8 -8
Lo 440 430 300 410 430 430 210 450 460 480 360 434 380 465 450 430
High 474 420 315 420 450 440 310 456 457 486 350 400 370 390 490 470
Center 1 0 0 0 1 0 5 0 0 0 0 -1 0 -3 2 2
RdTime 8 8 7 8 8 8 6 8 8 8 8 8 8 8 8 8
Lo 382 370 420 443 441 410 414 453 470 510 423 436 380 440 460 440
High 413 400 460 490 500 447 350 460 464 485 415 427 380 410 480 480
Center 1 1 2 2 2 1 -3 0 0 -1 0 0 0 -1 1 2
RdTime -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63
Lo 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
High 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
Center
WtdCntr 2 1 1 1 2 1 0 0 0 -1 0 -1 0 -2 1 2
RdVref 79 78 80 78 79 78 77 79 82 79 80 79 79 77 80 79
### Measure Eye Height, per BYTE, at ALL (2D) Timing Points RankMask = 0xF
Mc0.Ch0 Mc0.Ch1 Mc0.Ch2 Mc0.Ch3 Mc1.Ch0 Mc1.Ch1 Mc1.Ch2 Mc1.Ch3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
TScale 12 12 11 12 12 12 10 12 12 12 12 12 12 12 12 12
RdTime 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Lo 455 432 420 440 455 445 330 445 470 480 395 410 366 420 470 460
High 417 450 400 450 440 417 340 427 440 483 374 433 340 460 470 460
Center -1 0 -1 0 0 -1 0 0 -1 0 -1 1 -1 2 0 0
RdTime -8 -8 -7 -8 -8 -8 -6 -8 -8 -8 -8 -8 -8 -8 -8 -8
Lo 470 470 300 420 453 442 200 440 460 470 350 434 384 420 450 430
High 440 471 366 430 420 380 280 410 468 500 350 420 390 420 460 440
Center -1 0 3 0 -1 -3 4 -1 0 1 0 0 0 0 0 0
RdTime 8 8 7 8 8 8 6 8 8 8 8 8 8 8 8 8
Lo 390 380 430 455 463 420 410 455 464 473 410 426 385 410 480 460
High 410 420 420 510 485 430 400 445 465 490 416 460 380 450 480 480
Center 1 2 0 2 1 0 0 0 0 0 0 1 0 2 0 1
RdTime -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63 -63
Lo 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
High 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
Center
WtdCntr -1 1 1 1 0 -1 1 -1 0 1 0 1 0 1 0 1
RdVref 78 79 81 79 79 77 78 78 82 80 80 80 79 78 80 80
MRC task Read Voltage Centering 2D -- SUCCEEDED, Status = 0h. Stack Depth: 163592
Post Code: DD38h
MRC task -- Write Timing Centering 2D After Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 240 240 260 260 210 210 250 250 260 260 260 260 200 200 260 260 240 240 240 240 230 230 240 240 250 250 260 260 250 250 250 250 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 250 250 250 190 210 230 240 260 250 250 250 190 200 240 250 240 250 250 250 270 260 230 230 240 250 240 270 240 270 240 240
Weighted Center 1 0 1 1 -1 0 1 1 1 0 -1 0 1 2 2 0
Final Center 76 73 70 71 74 73 69 74 76 74 72 77 75 74 78 74
Edges we pass on to GetMarginBit are
250 240 250 250 200 200 240 230 250 260 250 250 200 190 250 240 250 240 250 250 260 270 230 230 250 240 260 250 260 250 240 240
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x06040B0807070B0D ........ 0x070506060709090E ..#..... 0x0507040504080807 ........ 0x0A0A0B090E0A0F0C ........ 0x0A09070B0409050C ........ 0x04060A0C0A090D0C ........ 0x0907060906060506 ........ 0x0707050504070609 ........ 0x030604040709090A ........ 0x070A080906090606 .......# 0x050C080E050C080E ........ 0x04070605090A0709 ........ 0x09090905070C0907 ........ 0x060A080409070B07 ........ 0x060A03070706090B ........ 0x060B05090C060A10 ........
0x05030A0706060A0C ........ 0x060407050608080D ...#.... 0x0406030403070706 ........ 0x09090A080D090E0B ........ 0x0908060A0308040B .#.....# 0x0305090B09080C0B ........ 0x0806050805050405 ........ 0x0606040403060508 ........ 0x0205030306080809 ........ 0x0609070805080507 ........ 0x040B070D040B070D ..#..#.. 0x0306050408090608 ........ 0x08080804060B0806 ........ 0x0509070308060A06 ........ 0x050902060605080A ........ 0x050A04080B05090F ...#....
0x040209060505090B ........ 0x050307050507070C ..$$.... 0x0305020302060605 ........ 0x080809070C080D0A ....#... 0x080805090207030B .$.#..#$ 0x0204080A08070B0A ...#.... 0x0705040704040304 ........ 0x0505030302050407 .......# 0x0104020205070708 ........ 0x0508060704070407 .#....#$ 0x030A070C030B060C ..$..$#. 0x0205040307080507 ........ 0x07070703050A0705 ........ 0x0408060207050905 ........ 0x0408010505040709 ........ 0x040903080A04080E ...$....
0x030108050404080A ........ 0x040207050406060B ..$$.... 0x0204010201050504 ........ 0x070708060C070C09 ..#.$... 0x070804090106030B #$.$..$$ 0x0103070A07060A09 .##$.#.. 0x0604030603030203 ........ 0x0404020201040307 .......$ 0x0003010104060607 ........ 0x0408050603060407 #$#...$$ 0x0209070B020B060B ##$##$$# 0x0104030206070406 ........ 0x0606060204090604 ....#... 0x0307050106040804 ........ 0x0307000404030608 ..#..... 0x030802080903070D ...$....
0x0200070403030709 ........ 0x030107050305050A .#$$#### 0x0103000100040403 ....##.# 0x060608050C060B08 ..$.$... 0x070803090005030B $$.$##$$ 0x0003070A06060908 .$$$.$#. 0x0503020502020102 ........ 0x0303010100030207 .....##$ 0x0002000003050506 $....... 0x0408050502050407 $$$.##$$ 0x0209070B020B060B $$$$$$$$ 0x0003020105060305 ..#..... 0x0505050104080503 ....$.#. 0x0206040005030703 ........ 0x0206000303020507 #.$.#... 0x020701080802060C .#.$.#..
0x0100060302020608 .$...... 0x020107050305050A .$$$$$$$ 0x0002000000040303 ..$#$$#$ 0x050508040C050A07 .#$.$##. 0x070802090005030B $$#$$$$$ 0x0003070A05060907 $$$$#$$# 0x0402010401010001 ........ 0x0202000000030207 ....$$$$ 0x0001000002040405 $.$$.... 0x0408050402050407 $$$#$$$$ 0x0209070B020B060B $$$$$$$$ 0x0002020004050204 $.$..... 0x0404040004070502 ....$.$. 0x0105030004020602 ...$.#.. 0x0205000203010406 $.$#$#.. 0x010700080702050B .$.$#$##
0x0000050201010507 .$..#... 0x010107050305050A #$$$$$$$ 0x0001000000040303 $.$$$$$$ 0x040508030C050A06 .$$#$$$. 0x070802090005030B $$$$$$$$ 0x0003070A05060907 $$$$$$$$ 0x0301000300000000 ......$. 0x0101000000030207 ..$$$$$$ 0x0000000001030304 $.$$.... 0x0408050402050407 $$$$$$$$ 0x0209070B020B060B $$$$$$$$ 0x0001020003040103 $.$$.... 0x0303030004060501 #.#$$#$. 0x0004020003020501 ...$.$.. 0x0204000203010305 $.$$$$.# 0x000700080702050B .$$$$$$$
0x0000040101000406 $$#.$##. 0x010107050305050A $$$$$$$$ 0x0000000000040303 $.$$$$$$ 0x030508030C050A05 .$$$$$$# 0x070802090005030B $$$$$$$$ 0x0003070A05060907 $$$$$$$$ 0x0200000200000000 ..$.$$$$ 0x0000000000030207 .#$$$$$$ 0x0000000000020203 $$$$#... 0x0408050402050407 $$$$$$$$ 0x0209070B020B060B $$$$$$$$ 0x0000020002030002 $#$$##.# 0x0302030004060500 $.$$$$$. 0x0003010002020400 $..$.$.# 0x0203000203010205 $.$$$$#$ 0x000700080702050B $$$$$$$$
0x0000040001000405 $$$#$$$# 0x010107050305050A $$$$$$$$ 0x0000000000040303 $$$$$$$$ 0x020508030C050A05 #$$$$$$$ 0x070802090005030B $$$$$$$$ 0x0003070A05060907 $$$$$$$$ 0x0100000100000000 .$$.$$$$ 0x0000000000030207 $$$$$$$$ 0x0000000000010102 $$$$$#.. 0x0408050402050407 $$$$$$$$ 0x0209070B020B060B $$$$$$$$ 0x0000020002030002 $$$$$$$$ 0x0301030004060500 $#$$$$$$ 0x0002000001020300 $##$#$.$ 0x0202000203010205 $.$$$$$$ 0x000700080702050B $$$$$$$$
0x0000040001000405 $$$$$$$$ 0x010107050305050A $$$$$$$$ 0x0000000000040303 $$$$$$$$ 0x020508030C050A05 $$$$$$$$ 0x070802090005030B $$$$$$$$ 0x0003070A05060907 $$$$$$$$ 0x0000000000000000 .$$.$$$$ 0x0000000000030207 $$$$$$$$ 0x0000000000010001 $$$$$$## 0x0408050402050407 $$$$$$$$ 0x0209070B020B060B $$$$$$$$ 0x0000020002030002 $$$$$$$$ 0x0301030004060500 $$$$$$$$ 0x0002000001020200 $$$$$$.$ 0x0201000203010205 $#$$$$$$ 0x000700080702050B $$$$$$$$
0x0000040001000405 $$$$$$$$ 0x010107050305050A $$$$$$$$ 0x0000000000040303 $$$$$$$$ 0x020508030C050A05 $$$$$$$$ 0x070802090005030B $$$$$$$$ 0x0003070A05060907 $$$$$$$$ 0x0000000000000000 $$$$$$$$ 0x0000000000030207 $$$$$$$$ 0x0000000000010001 $$$$$$$$ 0x0408050402050407 $$$$$$$$ 0x0209070B020B060B $$$$$$$$ 0x0000020002030002 $$$$$$$$ 0x0301030004060500 $$$$$$$$ 0x0002000001020100 $$$$$$#$ 0x0201000203010205 $$$$$$$$ 0x000700080702050B $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x06040B0807070B0D ........ 0x070506060709090E ..#..##. 0x0507040504080807 ...#.... 0x0A0A0B090E0A0F0C ........ 0x0A09070B0409050C ........ 0x04060A0C0A090D0C ........ 0x0907060906060506 ......#. 0x0707050504070609 ........ 0x030604040709090A ........ 0x070A080906090606 ........ 0x050C080E050C080E ........ 0x04070605090A0709 ........ 0x09090905070C0907 ........ 0x060A080409070B07 ........ 0x060A03070706090B .......# 0x060B05090C060A10 ........
0x07050C0908080C0E ........ 0x080605070808080F ........ 0x0608050405090908 ....#... 0x0B0B0C0A0F0B100D ........ 0x0B0A080C050A060D ........ 0x05070B0D0B0A0E0D .##..... 0x0A08070A07070407 ........ 0x080806060508070A ........ 0x04070505080A0A0B .....#.. 0x080B090A070A0707 .##..... 0x060D090F060D090F ........ 0x050807060A0B080A ........ 0x0A0A0A06080D0A08 ........ 0x070B09050A080C08 #.#...#. 0x070B040808070A0A ........ 0x070C060A0D070B11 ........
0x08060D0A09090D0F ####..## 0x0907050809080810 .#$##$$# 0x07090604050A0A09 ...$$..# 0x0C0C0D0B100C110E .....##. 0x0C0B090D060B070E ........ 0x06070B0E0C0B0F0E .$$..#.. 0x0B09080B08080408 ....##$. 0x090907070609080B ..#..... 0x05080606090A0B0C .....$.. 0x090B090B080B0808 .$$#.... 0x070E0A10070E0A10 .......# 0x060908070B0C090B ........ 0x0B0B0B07090E0B09 ........ 0x070C09060B090C09 $#$..#$# 0x080C050909080B0A .####.#$ 0x080D070B0E080C12 ........
0x08060D0A0A0A0D0F $$$$#.$$ 0x0A07050809080810 #$$$$$$$ 0x080A0704050B0B09 ...$$#.$ 0x0D0D0E0C110C110F .....$$. 0x0D0C0A0E070C080F ........ 0x07070B0F0D0B100F #$$#.$#. 0x0C0A090C08080409 ..#.$$$# 0x0A0A0708070A090C ..$..... 0x060907070A0A0C0D .....$.# 0x0A0B090B090C0909 #$$$###. 0x080F0B11080F0B10 #..##..$ 0x070A09080C0D0A0C ....#... 0x0C0C0C080A0F0C0A ........ 0x070C09070C090C09 $$$#.$$$ 0x090C050909090B0A .$$$$.$$ 0x090E080C0F090D13 #..#....
0x08060D0A0A0B0D0F $$$$$#$$ 0x0A07050809080810 $$$$$$$$ 0x090B0804050B0C09 #..$$$.$ 0x0E0E0F0D120C1110 #...#$$# 0x0E0D0B0F080D0910 ......#. 0x07070B0F0E0B1010 $$$$#$$. 0x0D0B090D08080409 ..$.$$$$ 0x0B0B0709080B0A0D ##$##### 0x070A08080B0A0D0D #####$#$ 0x0A0B090B090C090A $$$$$$$# 0x08100C1108100C10 $..$$##$ 0x080B0A090C0E0B0D ..#.$... 0x0D0D0D090B100D0B .#...#.. 0x070C09070D090C09 $$$$.$$$ 0x0A0C0509090A0B0A #$$$$#$$ 0x090F090C100A0E14 $.#$####
0x08060D0A0A0B0D0F $$$$$$$$ 0x0A07050809080810 $$$$$$$$ 0x090C0904050B0D09 $##$$$.$ 0x0E0F100E120C1110 $###$$$$ 0x0F0E0C10090E0911 .##..#$. 0x07070B0F0E0B1011 $$$$$$$# 0x0E0C090E08080409 ..$#$$$$ 0x0B0B0709080B0A0D $$$$$$$$ 0x070A08080B0A0D0D $$$$$$$$ 0x0A0B090B090C090A $$$$$$$$ 0x08110D1108100C10 $##$$$$$ 0x090C0A0A0C0F0C0E .#$.$#.. 0x0E0D0E0A0C100E0C #$###$#. 0x070C09070E090C09 $$$$#$$$ 0x0A0C0509090A0B0A $$$$$$$$ 0x0910090C100A0E14 $#$$$$$$
0x08060D0A0A0B0D0F $$$$$$$$ 0x0A07050809080810 $$$$$$$$ 0x090C0904050B0E09 $$$$$$#$ 0x0E0F100E120C1110 $$$$$$$$ 0x100E0C110A0E0912 #$$..$$. 0x07070B0F0E0B1011 $$$$$$$$ 0x0F0D090E08080409 ##$$$$$$ 0x0B0B0709080B0A0D $$$$$$$$ 0x070A08080B0A0D0D $$$$$$$$ 0x0A0B090B090C090A $$$$$$$$ 0x08110D1108100C10 $$$$$$$$ 0x0A0C0A0B0C0F0D0F .$$.$$.. 0x0E0D0E0A0C100E0D $$$$$$$# 0x070C09070E090C09 $$$$$$$$ 0x0A0C0509090A0B0A $$$$$$$$ 0x0910090C100A0E14 $$$$$$$$
0x08060D0A0A0B0D0F $$$$$$$$ 0x0A07050809080810 $$$$$$$$ 0x090C0904050B0E09 $$$$$$$$ 0x0E0F100E120C1110 $$$$$$$$ 0x100E0C120B0E0913 $$$##$$. 0x07070B0F0E0B1011 $$$$$$$$ 0x0F0D090E08080409 $$$$$$$$ 0x0B0B0709080B0A0D $$$$$$$$ 0x070A08080B0A0D0D $$$$$$$$ 0x0A0B090B090C090A $$$$$$$$ 0x08110D1108100C10 $$$$$$$$ 0x0B0C0A0C0C0F0E10 #$$#$$.# 0x0E0D0E0A0C100E0D $$$$$$$$ 0x070C09070E090C09 $$$$$$$$ 0x0A0C0509090A0B0A $$$$$$$$ 0x0910090C100A0E14 $$$$$$$$
0x08060D0A0A0B0D0F $$$$$$$$ 0x0A07050809080810 $$$$$$$$ 0x090C0904050B0E09 $$$$$$$$ 0x0E0F100E120C1110 $$$$$$$$ 0x100E0C120B0E0914 $$$$$$$# 0x07070B0F0E0B1011 $$$$$$$$ 0x0F0D090E08080409 $$$$$$$$ 0x0B0B0709080B0A0D $$$$$$$$ 0x070A08080B0A0D0D $$$$$$$$ 0x0A0B090B090C090A $$$$$$$$ 0x08110D1108100C10 $$$$$$$$ 0x0B0C0A0C0C0F0F10 $$$$$$#$ 0x0E0D0E0A0C100E0D $$$$$$$$ 0x070C09070E090C09 $$$$$$$$ 0x0A0C0509090A0B0A $$$$$$$$ 0x0910090C100A0E14 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 0 7][ 0 5][ 5 12][ 1 9][ 2 9][ 1 10][ 5 12][ 6 14]
Mc0.Ch0.B1: [ 2 9][ 2 6][ 7 5][ 6 7][ 4 8][ 6 8][ 6 8][ 11 15]
Mc0.Ch1.B0: [ 0 8][ 0 11][ 0 8][ 1 4][ 1 4][ 5 10][ 4 13][ 4 8]
Mc0.Ch1.B1: [ 3 13][ 6 14][ 9 15][ 4 13][ 13 17][ 6 11][ 11 16][ 6 15]
Mc0.Ch2.B0: [ 8 15][ 9 13][ 3 11][ 10 17][ 1 10][ 6 13][ 4 8][ 12 19]
Mc0.Ch2.B1: [ 0 6][ 4 6][ 8 10][ 11 14][ 6 13][ 7 10][ 10 15][ 8 16]
Mc0.Ch3.B0: [ 0 14][ 0 12][ 0 8][ 0 13][ 0 7][ 0 7][ 0 4][ 0 8]
Mc0.Ch3.B1: [ 0 10][ 1 10][ 0 6][ 0 8][ 0 7][ 4 10][ 3 9][ 8 12]
Mc1.Ch0.B0: [ 0 6][ 0 9][ 0 7][ 0 7][ 1 10][ 2 9][ 1 12][ 2 12]
Mc1.Ch0.B1: [ 5 9][ 9 10][ 6 8][ 5 10][ 3 8][ 6 11][ 5 8][ 7 9]
Mc1.Ch1.B0: [ 3 7][ 10 16][ 8 12][ 12 16][ 3 7][ 12 15][ 7 11][ 12 15]
Mc1.Ch1.B1: [ 0 10][ 1 11][ 3 9][ 0 11][ 3 11][ 4 14][ 0 14][ 3 15]
Mc1.Ch2.B0: [ 4 13][ 2 12][ 4 13][ 0 9][ 5 11][ 7 15][ 6 13][ 0 12]
Mc1.Ch2.B1: [ 0 6][ 3 11][ 1 8][ 0 6][ 2 13][ 3 8][ 2 11][ 1 8]
Mc1.Ch3.B0: [ 3 9][ 2 11][ 1 4][ 3 8][ 4 8][ 2 9][ 3 10][ 6 10]
Mc1.Ch3.B1: [ 0 8][ 8 15][ 0 8][ 9 11][ 8 15][ 3 9][ 6 13][ 12 19]
Per Bit Offset
Mc0.Ch0.B0: -3 -2 -3 -3 -2 -2 -3 -3
Mc0.Ch0.B1: -2 -1 0 1 -1 -2 -2 -1
Mc0.Ch1.B0: -1 -2 0 -3 -2 -1 1 -1
Mc0.Ch1.B1: -2 0 1 -1 1 -2 -2 -2
Mc0.Ch2.B0: 2 2 0 3 2 1 1 4
Mc0.Ch2.B1: -1 -1 -1 1 -1 -1 -1 0
Mc0.Ch3.B0: -2 -1 -2 -3 -3 -3 -3 -2
Mc0.Ch3.B1: -2 -2 -2 -1 -1 0 0 1
Mc1.Ch0.B0: 0 -2 -1 -1 -2 -4 -3 -3
Mc1.Ch0.B1: 0 -1 -1 -2 -1 -1 1 2
Mc1.Ch1.B0: 0 1 2 0 0 2 1 -1
Mc1.Ch1.B1: 1 -1 0 1 -2 -1 0 0
Mc1.Ch2.B0: -1 -2 -1 -1 1 -1 1 -1
Mc1.Ch2.B1: -3 -3 -4 -1 -2 -2 -5 -3
Mc1.Ch3.B0: 0 -4 -1 -2 -1 -1 -3 -3
Mc1.Ch3.B1: -2 1 -1 1 -1 0 -1 -1
START_TxDqBitDelay
R Mc0.C0.R0.S0.B0 TxDqBitDelay: 3
R Mc0.C0.R0.S0.B1 TxDqBitDelay: 2
R Mc0.C0.R0.S0.B2 TxDqBitDelay: 8
R Mc0.C0.R0.S0.B3 TxDqBitDelay: 5
R Mc0.C0.R0.S0.B4 TxDqBitDelay: 5
R Mc0.C0.R0.S0.B5 TxDqBitDelay: 5
R Mc0.C0.R0.S0.B6 TxDqBitDelay: 8
R Mc0.C0.R0.S0.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S1.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S1.B1 TxDqBitDelay: 4
R Mc0.C0.R0.S1.B2 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B3 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B4 TxDqBitDelay: 6
R Mc0.C0.R0.S1.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B6 TxDqBitDelay: 7
R Mc0.C0.R0.S1.B7 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S2.B0 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S2.B2 TxDqBitDelay: 4
R Mc0.C0.R0.S2.B3 TxDqBitDelay: 2
R Mc0.C0.R0.S2.B4 TxDqBitDelay: 2
R Mc0.C0.R0.S2.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S2.B6 TxDqBitDelay: 9
R Mc0.C0.R0.S2.B7 TxDqBitDelay: 6
R Mc0.C0.R0.S3.B0 TxDqBitDelay: 8
R Mc0.C0.R0.S3.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S3.B2 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S3.B3 TxDqBitDelay: 8
R Mc0.C0.R0.S3.B4 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R0.S3.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S3.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S3.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S4.B0 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S4.B1 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R0.S4.B2 TxDqBitDelay: 7
R Mc0.C0.R0.S4.B3 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R0.S4.B4 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R0.S4.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S4.B7 TxDqBitDelay: 16 (0x10)
R Mc0.C0.R0.S5.B0 TxDqBitDelay: 3
R Mc0.C0.R0.S5.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S5.B2 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B3 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R0.S5.B4 TxDqBitDelay: 9
R Mc0.C0.R0.S5.B5 TxDqBitDelay: 8
R Mc0.C0.R0.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S5.B7 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R0.S6.B0 TxDqBitDelay: 7
R Mc0.C0.R0.S6.B1 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B2 TxDqBitDelay: 4
R Mc0.C0.R0.S6.B3 TxDqBitDelay: 6
R Mc0.C0.R0.S6.B4 TxDqBitDelay: 3
R Mc0.C0.R0.S6.B5 TxDqBitDelay: 3
R Mc0.C0.R0.S6.B6 TxDqBitDelay: 2
R Mc0.C0.R0.S6.B7 TxDqBitDelay: 4
R Mc0.C0.R0.S7.B0 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B1 TxDqBitDelay: 5
R Mc0.C0.R0.S7.B2 TxDqBitDelay: 3
R Mc0.C0.R0.S7.B3 TxDqBitDelay: 4
R Mc0.C0.R0.S7.B4 TxDqBitDelay: 3
R Mc0.C0.R0.S7.B5 TxDqBitDelay: 7
R Mc0.C0.R0.S7.B6 TxDqBitDelay: 6
R Mc0.C0.R0.S7.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S0.B0 TxDqBitDelay: 3
R Mc1.C1.R0.S0.B1 TxDqBitDelay: 4
R Mc1.C1.R0.S0.B2 TxDqBitDelay: 3
R Mc1.C1.R0.S0.B3 TxDqBitDelay: 3
R Mc1.C1.R0.S0.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S0.B5 TxDqBitDelay: 5
R Mc1.C1.R0.S0.B6 TxDqBitDelay: 6
R Mc1.C1.R0.S0.B7 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B0 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B1 TxDqBitDelay: 9
R Mc1.C1.R0.S1.B2 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B3 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S1.B5 TxDqBitDelay: 8
R Mc1.C1.R0.S1.B6 TxDqBitDelay: 7
R Mc1.C1.R0.S1.B7 TxDqBitDelay: 8
R Mc1.C1.R0.S2.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B1 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S2.B2 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S2.B3 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S2.B4 TxDqBitDelay: 5
R Mc1.C1.R0.S2.B5 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R0.S2.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S2.B7 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R0.S3.B0 TxDqBitDelay: 5
R Mc1.C1.R0.S3.B1 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B2 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B3 TxDqBitDelay: 6
R Mc1.C1.R0.S3.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B5 TxDqBitDelay: 9
R Mc1.C1.R0.S3.B6 TxDqBitDelay: 7
R Mc1.C1.R0.S3.B7 TxDqBitDelay: 9
R Mc1.C1.R0.S4.B0 TxDqBitDelay: 8
R Mc1.C1.R0.S4.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S4.B2 TxDqBitDelay: 8
R Mc1.C1.R0.S4.B3 TxDqBitDelay: 4
R Mc1.C1.R0.S4.B4 TxDqBitDelay: 8
R Mc1.C1.R0.S4.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S4.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S4.B7 TxDqBitDelay: 6
R Mc1.C1.R0.S5.B0 TxDqBitDelay: 3
R Mc1.C1.R0.S5.B1 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S5.B3 TxDqBitDelay: 3
R Mc1.C1.R0.S5.B4 TxDqBitDelay: 7
R Mc1.C1.R0.S5.B5 TxDqBitDelay: 5
R Mc1.C1.R0.S5.B6 TxDqBitDelay: 6
R Mc1.C1.R0.S5.B7 TxDqBitDelay: 4
R Mc1.C1.R0.S6.B0 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B1 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B2 TxDqBitDelay: 2
R Mc1.C1.R0.S6.B3 TxDqBitDelay: 5
R Mc1.C1.R0.S6.B4 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B5 TxDqBitDelay: 5
R Mc1.C1.R0.S6.B6 TxDqBitDelay: 6
R Mc1.C1.R0.S6.B7 TxDqBitDelay: 8
R Mc1.C1.R0.S7.B0 TxDqBitDelay: 4
R Mc1.C1.R0.S7.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R0.S7.B2 TxDqBitDelay: 4
R Mc1.C1.R0.S7.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R0.S7.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R0.S7.B5 TxDqBitDelay: 6
R Mc1.C1.R0.S7.B6 TxDqBitDelay: 9
R Mc1.C1.R0.S7.B7 TxDqBitDelay: 15 (0xF)
STOP_TxDqBitDelay
LstSavd Margins 240 240 250 250 210 210 250 250 270 270 260 260 200 200 260 260 260 260 260 260 260 260 230 230 250 250 260 260 270 270 250 250 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 260 250 250 190 210 240 240 250 250 250 250 200 200 230 260 270 240 250 260 240 260 230 230 250 250 250 250 250 250 240 240
Weighted Center 1 0 1 0 0 0 0 2 -2 1 1 0 0 0 0 0
Final Center 73 73 69 73 73 72 66 72 75 77 76 78 76 74 76 76
Edges we pass on to GetMarginBit are
250 250 250 250 200 200 240 240 250 250 250 250 200 200 250 240 250 260 260 250 250 250 230 230 250 250 250 250 250 250 240 240
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x06050B0908080D0C .......# 0x07050606070A0A0D .......# 0x0506040505090B08 ........ 0x040808030A040B04 ........ 0x0A0A050A0409040D ........ 0x0404090B09080D0C .#...... 0x0A08070908060507 ........ 0x070604060408090A ........ 0x050906050B0B0B0C ...#.... 0x0608080705070606 ........ 0x050B070D050B070B ........ 0x06090806080A0A0B ........ 0x0A0A0B07090C0B07 ........ 0x090C0A070D0A0D0A ........ 0x0A0B060909080B0B ........ 0x040904050905080D .......#
0x05040A0807070C0D .....#.. 0x060405050609090E ........ 0x0405030404080A07 ...#.#.. 0x0307070209030A03 ..#.#... 0x090904090308030C ........ 0x0305080A08070C0B ........ 0x0907060807050406 ........ 0x0605030503070809 .#...... 0x040805060A0A0A0B ..###### 0x0507070604060505 ........ 0x040A060C040A060A ........ 0x050807050709090A ........ 0x09090A06080B0A06 ........ 0x080B09060C090C09 ........ 0x090A050808070A0A ........ 0x030803040804070E ......#.
0x0403090706070B0D ##.#.$#$ 0x050304040508080E ..##..#$ 0x0304020403080906 ..#$.$.. 0x0206070109020902 ..$#$..# 0x080803080207020B .....#.. 0x0205070907060B0A .$...... 0x0806050706040305 ........ 0x0505020402060708 .$.....# 0x030705070A0A0A0B .#$.$$$$ 0x0406060503050404 ........ 0x0309050B03090509 ..#..#.. 0x0407060406080809 ........ 0x08080905070A0905 ..#.#... 0x070A08050B080B08 ........ 0x0809040707060909 ..#..... 0x020702030703070E .....#$$
0x0403080705070B0D $$#$#$$$ 0x040204040407080E ..$$..$$ 0x0203020402080805 ..$$#$.. 0x0105070109010802 ..$$$#.$ 0x070702070107010A #..##$.# 0x0105060806050A09 .$...... 0x0705040605030204 .....#.. 0x0405010301050608 .$.....$ 0x020705070A0A0A0B #$$$$$$$ 0x0305050402040303 .....#.# 0x0208050A02090408 .#$..$## 0x0306050305070708 ........ 0x0707090407090804 ##$.$... 0x060907040A070A07 ........ 0x0708040606050808 ..$##... 0x010601020603070E ..#.#$$$
0x0403080705070B0D $$$$$$$$ 0x030104040306080E ..$$#.$$ 0x0102020402080704 ..$$$$.. 0x0004070109010702 #.$$$$#$ 0x070601070107000A $#.$$$#$ 0x0005050705040908 .$.##.#. 0x0604030504030103 ....#$#. 0x0305000200040508 .$.#.#.$ 0x020705070A0A0A0B $$$$$$$$ 0x0204040301040203 .####$#$ 0x0108050901090408 .$$..$$$ 0x0205040204060607 ........ 0x0707090307080703 $$$.$##. 0x0508060309060906 ###....# 0x0607040606040707 .#$$$.#. 0x000501010603070E .#$#$$$$
0x0403080705070B0D $$$$$$$$ 0x020004040305080E .#$$$#$$ 0x0001020402080603 ..$$$$.. 0x0003070109010702 $#$$$$$$ 0x070600070107000A $$#$$$$$ 0x0005040705030907 $$#$$#$. 0x0503020404030102 ....$$$# 0x0205000200040408 #$$$$$.$ 0x020705070A0A0A0B $$$$$$$$ 0x0104040301040203 #$$$$$$$ 0x0008050800090408 #$$..$$$ 0x0104030103050506 #.#.#..# 0x0707090207080702 $$$.$$$# 0x0508060208050806 $$$#..#$ 0x0507040606030706 #$$$$#$# 0x000501010603070E $$$$$$$$
0x0403080705070B0D $$$$$$$$ 0x010004040305080E #$$$$$$$ 0x0000020402080502 $.$$$$## 0x0003070109010702 $$$$$$$$ 0x070600070107000A $$$$$$$$ 0x0005040705030906 $$$$$$$. 0x0402010304030102 ....$$$$ 0x0205000200040308 $$$$$$#$ 0x020705070A0A0A0B $$$$$$$$ 0x0104040301040203 $$$$$$$$ 0x0008050700090408 $$$#$$$$ 0x0103030003040406 $.$#$..$ 0x0707090107080702 $$$#$$$$ 0x0508060207040806 $$$$#.$$ 0x0507040606030706 $$$$$$$$ 0x000501010603070E $$$$$$$$
0x0403080705070B0D $$$$$$$$ 0x010004040305080E $$$$$$$$ 0x0000020402080502 $$$$$$$$ 0x0003070109010702 $$$$$$$$ 0x070600070107000A $$$$$$$$ 0x0005040705030905 $$$$$$$# 0x0301000204030102 #...$$$$ 0x0205000200040308 $$$$$$$$ 0x020705070A0A0A0B $$$$$$$$ 0x0104040301040203 $$$$$$$$ 0x0008050700090408 $$$$$$$$ 0x0102030003030306 $.$$$..$ 0x0707090107080702 $$$$$$$$ 0x0508060207030806 $$$$$#$$ 0x0507040606030706 $$$$$$$$ 0x000501010603070E $$$$$$$$
0x0403080705070B0D $$$$$$$$ 0x010004040305080E $$$$$$$$ 0x0000020402080502 $$$$$$$$ 0x0003070109010702 $$$$$$$$ 0x070600070107000A $$$$$$$$ 0x0005040705030905 $$$$$$$$ 0x0300000104030102 $.$#$$$$ 0x0205000200040308 $$$$$$$$ 0x020705070A0A0A0B $$$$$$$$ 0x0104040301040203 $$$$$$$$ 0x0008050700090408 $$$$$$$$ 0x0101030003020206 $#$$$..$ 0x0707090107080702 $$$$$$$$ 0x0508060207030806 $$$$$$$$ 0x0507040606030706 $$$$$$$$ 0x000501010603070E $$$$$$$$
0x0403080705070B0D $$$$$$$$ 0x010004040305080E $$$$$$$$ 0x0000020402080502 $$$$$$$$ 0x0003070109010702 $$$$$$$$ 0x070600070107000A $$$$$$$$ 0x0005040705030905 $$$$$$$$ 0x0300000104030102 $$$$$$$$ 0x0205000200040308 $$$$$$$$ 0x020705070A0A0A0B $$$$$$$$ 0x0104040301040203 $$$$$$$$ 0x0008050700090408 $$$$$$$$ 0x0101030003010106 $$$$$##$ 0x0707090107080702 $$$$$$$$ 0x0508060207030806 $$$$$$$$ 0x0507040606030706 $$$$$$$$ 0x000501010603070E $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x06050B0908080D0C ........ 0x07050606070A0A0D .#...##. 0x0506040505090B08 ........ 0x040808030A040B04 ........ 0x0A0A050A0409040D ........ 0x0404090B09080D0C ........ 0x0A08070908060507 ........ 0x070604060408090A ........ 0x050906050B0B0B0C ........ 0x0608080705070606 ........ 0x050B070D050B070B ........ 0x06090806080A0A0B ........ 0x0A0A0B07090C0B07 ........ 0x090C0A070D0A0D0A ........ 0x0A0B060909080B0B ........ 0x040904050905080D ........
0x07060C0A09090E0D .#...... 0x080407070809090E ........ 0x06070506060A0C09 ........ 0x050909040B050C05 ..#.#.#. 0x0B0B060B050A050E ........ 0x05050A0C0A090E0D ........ 0x0B09080A09070608 .....##. 0x0807050705090A0B ........ 0x060A07060C0C0C0D ........ 0x0709090806080707 ........ 0x060C080E060C080C #...#... 0x070A0907090B0B0C ........ 0x0B0B0C080A0D0C08 ........ 0x0A0D0B080E0B0E0B ........ 0x0B0C070A0A090C0C ........ 0x050A05060A06090E ........
0x08060D0B0A0A0F0E #$#...#. 0x090408080909090F .$###$$. 0x07080607070B0D0A ........ 0x060A09050B060C06 .#$.$#$. 0x0C0C070C060B060F ........ 0x06060B0D0B0A0F0E ........ 0x0C0A090B0A070609 ....#$$. 0x09080608060A0B0C ......#. 0x070B08070D0D0D0E ........ 0x080A0A0907090808 ........ 0x060D090F060D090D $...$#.. 0x080B0A080A0C0C0D ........ 0x0C0C0D090B0E0D09 ...#.... 0x0B0E0C090F0C0F0C ........ 0x0C0D080B0B0A0D0D ........ 0x060B06070B070A0F #.......
0x08060D0C0B0B0F0F $$$...$. 0x0A04080809090910 .$$$$$$# 0x08090708080C0E0B ........ 0x070A09060B060C07 #$$#$$$# 0x0D0D080D070C0710 .#...##. 0x07070C0E0C0B100F .#....#. 0x0D0B0A0C0A07060A ....$$$# 0x0A090709070B0B0D ......$. 0x080C09080E0E0E0F ........ 0x090B0B0A080A0909 ..#..... 0x060E0A10060D0A0E $..#$$#. 0x090C0B090B0D0D0E ........ 0x0D0D0E090C0F0E0A ###$###. 0x0C0F0D0A100D100D ....##.. 0x0D0E090C0C0B0E0E ..#..... 0x060C07080C080B10 $.######
0x08060D0D0C0C0F10 $$$...$. 0x0B04080809090910 #$$$$$$$ 0x090A0809090D0F0C ..#.#### 0x070A09060B060C07 $$$$$$$$ 0x0E0D090E080C0711 .$#.#$$# 0x08070D0F0D0C1010 #$##..$# 0x0E0C0B0D0A07060A ....$$$$ 0x0B0A080A080C0B0E ...#..$# 0x090D0A090F0F0F10 ....#... 0x0A0C0B0B090B0A0A ##$..#.. 0x060F0B10060D0A0F $.#$$$$# 0x0A0D0C0A0C0E0E0F .##..... 0x0D0D0E090C0F0E0B $$$$$$$. 0x0D100E0B100D110E .#.#$$#. 0x0E0F090D0D0C0F0F ##$.#### 0x060D07080C080B10 $.$$$$$$
0x08060D0E0D0D0F11 $$$###$# 0x0B04080809090910 $$$$$$$$ 0x0A0B080A090D0F0C ..$#$$$$ 0x070A09060B060C07 $$$$$$$$ 0x0F0D090F080C0711 #$$.$$$$ 0x08070D0F0E0D1010 $$$$##$$ 0x0F0D0C0E0A07060A .###$$$$ 0x0C0B090A090D0B0E ..#$##$$ 0x0A0E0B0A0F101011 ....$### 0x0A0C0B0C0A0B0B0B $$$##$## 0x06100B10060D0A0F $#$$$$$$ 0x0B0D0C0B0D0F0F10 #$$..... 0x0D0D0E090C0F0E0C $$$$$$$# 0x0E100F0B100D110F #$#$$$$# 0x0E0F090E0D0C0F0F $$$#$$$$ 0x060E07080C080B10 $#$$$$$$
0x08060D0E0D0D0F11 $$$$$$$$ 0x0B04080809090910 $$$$$$$$ 0x0B0C080A090D0F0C ##$$$$$$ 0x070A09060B060C07 $$$$$$$$ 0x0F0D0910080C0711 $$$#$$$$ 0x08070D0F0E0D1010 $$$$$$$$ 0x100D0C0E0A07060A .$$$$$$$ 0x0D0C090A090D0B0E ..$$$$$$ 0x0B0F0C0B0F101011 .#..$$$$ 0x0A0C0B0C0A0B0B0B $$$$$$$$ 0x06100B10060D0A0F $$$$$$$$ 0x0B0D0C0C0E101011 $$$.#... 0x0D0D0E090C0F0E0C $$$$$$$$ 0x0E100F0B100D110F $$$$$$$$ 0x0E0F090E0D0C0F0F $$$$$$$$ 0x060E07080C080B10 $$$$$$$$
0x08060D0E0D0D0F11 $$$$$$$$ 0x0B04080809090910 $$$$$$$$ 0x0B0C080A090D0F0C $$$$$$$$ 0x070A09060B060C07 $$$$$$$$ 0x0F0D0910080C0711 $$$$$$$$ 0x08070D0F0E0D1010 $$$$$$$$ 0x110D0C0E0A07060A #$$$$$$$ 0x0E0D090A090D0B0E #.$$$$$$ 0x0C0F0D0C0F101011 #$##$$$$ 0x0A0C0B0C0A0B0B0B $$$$$$$$ 0x06100B10060D0A0F $$$$$$$$ 0x0B0D0C0D0E111112 $$$#$### 0x0D0D0E090C0F0E0C $$$$$$$$ 0x0E100F0B100D110F $$$$$$$$ 0x0E0F090E0D0C0F0F $$$$$$$$ 0x060E07080C080B10 $$$$$$$$
0x08060D0E0D0D0F11 $$$$$$$$ 0x0B04080809090910 $$$$$$$$ 0x0B0C080A090D0F0C $$$$$$$$ 0x070A09060B060C07 $$$$$$$$ 0x0F0D0910080C0711 $$$$$$$$ 0x08070D0F0E0D1010 $$$$$$$$ 0x110D0C0E0A07060A $$$$$$$$ 0x0E0E090A090D0B0E $#$$$$$$ 0x0C0F0D0C0F101011 $$$$$$$$ 0x0A0C0B0C0A0B0B0B $$$$$$$$ 0x06100B10060D0A0F $$$$$$$$ 0x0B0D0C0D0E111112 $$$$$$$$ 0x0D0D0E090C0F0E0C $$$$$$$$ 0x0E100F0B100D110F $$$$$$$$ 0x0E0F090E0D0C0F0F $$$$$$$$ 0x060E07080C080B10 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 5 7][ 4 5][ 9 12][ 8 13][ 6 12][ 8 12][ 12 14][ 13 16]
Mc0.Ch0.B1: [ 2 10][ 1 4][ 5 7][ 5 7][ 4 8][ 6 9][ 9 9][ 14 15]
Mc0.Ch1.B0: [ 0 10][ 0 11][ 3 7][ 5 9][ 3 8][ 9 12][ 6 14][ 3 11]
Mc0.Ch1.B1: [ 1 6][ 4 9][ 8 8][ 2 5][ 10 10][ 2 5][ 8 11][ 3 6]
Mc0.Ch2.B0: [ 8 14][ 7 12][ 1 8][ 8 15][ 2 7][ 8 11][ 1 6][ 11 16]
Mc0.Ch2.B1: [ 0 7][ 5 6][ 5 12][ 8 14][ 6 13][ 4 12][ 10 15][ 6 15]
Mc0.Ch3.B0: [ 4 16][ 0 12][ 0 11][ 2 13][ 5 9][ 4 6][ 2 5][ 3 9]
Mc0.Ch3.B1: [ 3 13][ 6 13][ 0 8][ 3 9][ 0 8][ 5 12][ 4 10][ 9 13]
Mc1.Ch0.B0: [ 3 11][ 8 14][ 6 12][ 7 11][ 11 14][ 11 15][ 11 15][ 12 16]
Mc1.Ch0.B1: [ 2 9][ 5 11][ 5 10][ 4 11][ 2 9][ 5 10][ 3 10][ 4 10]
Mc1.Ch1.B0: [ 1 5][ 9 15][ 6 10][ 8 15][ 0 5][ 10 12][ 5 9][ 9 14]
Mc1.Ch1.B1: [ 2 10][ 2 12][ 4 11][ 1 12][ 4 13][ 2 16][ 2 16][ 7 17]
Mc1.Ch2.B0: [ 8 12][ 8 12][ 10 13][ 2 8][ 8 11][ 9 14][ 8 13][ 3 11]
Mc1.Ch2.B1: [ 6 13][ 9 15][ 7 14][ 3 10][ 8 15][ 4 12][ 9 16][ 7 14]
Mc1.Ch3.B0: [ 6 13][ 8 14][ 5 8][ 7 13][ 7 12][ 4 11][ 8 14][ 7 14]
Mc1.Ch3.B1: [ 0 5][ 6 13][ 2 6][ 2 7][ 7 11][ 4 7][ 8 10][ 14 15]
Per Bit Offset
Mc0.Ch0.B0: 0 -1 -1 2 1 2 0 3
Mc0.Ch0.B1: -1 -3 0 0 -1 -3 -1 2
Mc0.Ch1.B0: 0 -1 1 2 1 2 -1 -1
Mc0.Ch1.B1: -1 -2 0 1 0 -1 -2 1
Mc0.Ch2.B0: 1 -1 -1 2 1 1 -1 1
Mc0.Ch2.B1: -1 2 -1 0 1 0 -1 -2
Mc0.Ch3.B0: 0 -2 -2 -2 -1 -1 -2 -1
Mc0.Ch3.B1: 1 4 0 0 0 1 -2 1
Mc1.Ch0.B0: 2 2 3 4 2 2 2 2
Mc1.Ch0.B1: -1 0 -1 1 1 1 1 1
Mc1.Ch1.B0: -2 1 1 -2 -3 0 0 1
Mc1.Ch1.B1: 0 -2 -1 1 1 -1 -1 1
Mc1.Ch2.B0: 0 0 1 -2 1 -1 -1 0
Mc1.Ch2.B1: 1 0 1 -1 -2 -2 -1 1
Mc1.Ch3.B0: -1 0 1 1 1 -1 0 -1
Mc1.Ch3.B1: -2 1 0 -1 0 1 1 2
START_TxDqBitDelay
R Mc0.C0.R1.S0.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S0.B1 TxDqBitDelay: 4
R Mc0.C0.R1.S0.B2 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S0.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S0.B4 TxDqBitDelay: 9
R Mc0.C0.R1.S0.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S0.B6 TxDqBitDelay: 13 (0xD)
R Mc0.C0.R1.S0.B7 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R1.S1.B0 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B1 TxDqBitDelay: 2
R Mc0.C0.R1.S1.B2 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S1.B5 TxDqBitDelay: 7
R Mc0.C0.R1.S1.B6 TxDqBitDelay: 9
R Mc0.C0.R1.S1.B7 TxDqBitDelay: 15 (0xF)
R Mc0.C0.R1.S2.B0 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B1 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S2.B3 TxDqBitDelay: 7
R Mc0.C0.R1.S2.B4 TxDqBitDelay: 6
R Mc0.C0.R1.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S2.B6 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S2.B7 TxDqBitDelay: 7
R Mc0.C0.R1.S3.B0 TxDqBitDelay: 3
R Mc0.C0.R1.S3.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S3.B2 TxDqBitDelay: 8
R Mc0.C0.R1.S3.B3 TxDqBitDelay: 4
R Mc0.C0.R1.S3.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S3.B5 TxDqBitDelay: 3
R Mc0.C0.R1.S3.B6 TxDqBitDelay: 9
R Mc0.C0.R1.S3.B7 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B0 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S4.B1 TxDqBitDelay: 9
R Mc0.C0.R1.S4.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S4.B3 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S4.B4 TxDqBitDelay: 5
R Mc0.C0.R1.S4.B5 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S4.B6 TxDqBitDelay: 3
R Mc0.C0.R1.S4.B7 TxDqBitDelay: 14 (0xE)
R Mc0.C0.R1.S5.B0 TxDqBitDelay: 3
R Mc0.C0.R1.S5.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S5.B2 TxDqBitDelay: 8
R Mc0.C0.R1.S5.B3 TxDqBitDelay: 11 (0xB)
R Mc0.C0.R1.S5.B4 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S5.B5 TxDqBitDelay: 8
R Mc0.C0.R1.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc0.C0.R1.S5.B7 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S6.B0 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S6.B1 TxDqBitDelay: 6
R Mc0.C0.R1.S6.B2 TxDqBitDelay: 5
R Mc0.C0.R1.S6.B3 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B4 TxDqBitDelay: 7
R Mc0.C0.R1.S6.B5 TxDqBitDelay: 5
R Mc0.C0.R1.S6.B6 TxDqBitDelay: 3
R Mc0.C0.R1.S6.B7 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B0 TxDqBitDelay: 8
R Mc0.C0.R1.S7.B1 TxDqBitDelay: 10 (0xA)
R Mc0.C0.R1.S7.B2 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B3 TxDqBitDelay: 6
R Mc0.C0.R1.S7.B4 TxDqBitDelay: 4
R Mc0.C0.R1.S7.B5 TxDqBitDelay: 9
R Mc0.C0.R1.S7.B6 TxDqBitDelay: 7
R Mc0.C0.R1.S7.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B0 TxDqBitDelay: 7
R Mc1.C1.R1.S0.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S0.B2 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B3 TxDqBitDelay: 9
R Mc1.C1.R1.S0.B4 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S0.B5 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S0.B6 TxDqBitDelay: 13 (0xD)
R Mc1.C1.R1.S0.B7 TxDqBitDelay: 14 (0xE)
R Mc1.C1.R1.S1.B0 TxDqBitDelay: 5
R Mc1.C1.R1.S1.B1 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B3 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B4 TxDqBitDelay: 6
R Mc1.C1.R1.S1.B5 TxDqBitDelay: 8
R Mc1.C1.R1.S1.B6 TxDqBitDelay: 7
R Mc1.C1.R1.S1.B7 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B0 TxDqBitDelay: 3
R Mc1.C1.R1.S2.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S2.B2 TxDqBitDelay: 8
R Mc1.C1.R1.S2.B3 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B4 TxDqBitDelay: 2
R Mc1.C1.R1.S2.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S2.B6 TxDqBitDelay: 7
R Mc1.C1.R1.S2.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S3.B0 TxDqBitDelay: 6
R Mc1.C1.R1.S3.B1 TxDqBitDelay: 7
R Mc1.C1.R1.S3.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S3.B3 TxDqBitDelay: 7
R Mc1.C1.R1.S3.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B5 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B6 TxDqBitDelay: 9
R Mc1.C1.R1.S3.B7 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S4.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B2 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S4.B3 TxDqBitDelay: 5
R Mc1.C1.R1.S4.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B5 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S4.B6 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S4.B7 TxDqBitDelay: 7
R Mc1.C1.R1.S5.B0 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S5.B1 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B2 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S5.B3 TxDqBitDelay: 6
R Mc1.C1.R1.S5.B4 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S5.B5 TxDqBitDelay: 8
R Mc1.C1.R1.S5.B6 TxDqBitDelay: 12 (0xC)
R Mc1.C1.R1.S5.B7 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S6.B0 TxDqBitDelay: 9
R Mc1.C1.R1.S6.B1 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S6.B2 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B3 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S6.B4 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S6.B5 TxDqBitDelay: 7
R Mc1.C1.R1.S6.B6 TxDqBitDelay: 11 (0xB)
R Mc1.C1.R1.S6.B7 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S7.B0 TxDqBitDelay: 2
R Mc1.C1.R1.S7.B1 TxDqBitDelay: 10 (0xA)
R Mc1.C1.R1.S7.B2 TxDqBitDelay: 4
R Mc1.C1.R1.S7.B3 TxDqBitDelay: 4
R Mc1.C1.R1.S7.B4 TxDqBitDelay: 9
R Mc1.C1.R1.S7.B5 TxDqBitDelay: 6
R Mc1.C1.R1.S7.B6 TxDqBitDelay: 9
R Mc1.C1.R1.S7.B7 TxDqBitDelay: 15 (0xF)
STOP_TxDqBitDelay
Calling with EnRxDutyCycle = 0, EnPerBit = 0, ResetPerBit = 0 En2D = 1
Parameter = 2 (WrT)
Optimization is per rank
LstSavd Margins 250 240 250 250 200 200 240 230 250 260 250 250 200 190 250 240 250 240 250 250 260 270 230 230 250 240 260 250 260 250 240 240 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 260 250 250 200 200 230 240 250 260 250 250 210 200 240 240 240 260 250 240 260 260 230 240 260 250 260 250 250 250 240 240
Vref = -10: 240 220 230 230 190 180 220 220 230 240 240 230 180 180 230 230 220 220 240 230 240 240 220 220 230 230 230 240 230 240 230 220
Vref = -20: 210 200 210 220 170 150 200 190 220 220 220 200 180 150 220 200 210 200 230 210 230 220 220 190 220 200 210 210 220 210 210 200
Vref = -30: 190 180 190 190 160 120 190 160 190 190 210 180 160 110 210 190 200 180 210 180 210 180 200 160 200 170 190 180 210 190 190 180
Vref = 10: 250 250 250 240 200 200 240 240 260 260 250 250 190 190 240 240 240 260 250 250 260 250 240 240 250 240 260 250 240 240 220 250
Vref = 20: 240 230 220 230 190 180 210 220 230 240 240 230 180 170 230 230 240 230 240 230 250 240 230 220 220 230 240 230 230 230 210 230
Vref = 30: 210 200 210 220 180 160 200 190 210 220 230 200 170 140 220 200 220 210 230 220 220 220 220 200 210 200 220 210 220 210 210 210
Weighted Center 0 0 0 0 0 -1 -1 0 0 -1 0 0 0 0 0 0
Final Center 76 73 70 71 74 72 68 74 76 73 72 77 75 74 78 74
LstSavd Margins 250 250 250 250 200 200 240 240 250 250 250 250 200 200 250 240 250 260 260 250 250 250 230 230 250 250 250 250 250 250 240 240 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 250 250 240 200 200 240 240 240 250 250 250 200 190 240 240 250 260 260 260 250 260 240 240 250 250 260 250 250 250 240 240
Vref = -10: 220 230 230 220 190 170 220 220 230 230 240 220 180 180 240 220 240 230 250 240 240 230 230 220 230 230 230 240 240 220 220 230
Vref = -20: 210 220 210 210 190 150 210 200 210 210 220 210 170 150 230 200 220 210 220 210 220 210 200 200 210 200 210 220 220 210 210 200
Vref = -30: 200 180 210 180 180 120 200 170 190 180 210 170 160 110 210 180 210 190 210 190 210 180 200 170 200 170 190 190 210 180 200 170
Vref = 10: 250 260 260 250 200 200 230 240 250 260 260 250 190 200 250 240 250 250 260 260 250 250 240 240 250 250 260 250 250 250 230 240
Vref = 20: 230 230 230 240 190 180 230 220 240 240 240 230 190 190 230 230 230 240 240 240 240 240 220 230 240 230 240 240 230 230 220 220
Vref = 30: 220 220 210 220 180 150 210 200 220 220 230 210 180 150 230 210 220 210 220 220 230 220 220 210 220 210 220 210 220 210 200 200
Weighted Center 0 0 -1 0 0 -1 -1 -1 0 0 0 0 0 0 0 0
Final Center 73 73 68 73 73 71 65 71 75 77 76 78 76 74 76 76
MRC task Write Timing Centering 2D After Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD39h
MRC task -- Read Timing Centering 2D After Power Training -- Started.
Calling with EnRxDutyCycle = 0, EnPerBit = 1, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 160 160 160 160 110 110 150 150 160 160 160 160 100 100 160 160 170 170 180 180 160 160 160 160 160 160 160 160 180 180 150 150 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 170 200 180 140 120 180 160 180 170 190 170 130 100 210 160 220 180 210 200 210 170 190 170 190 180 190 170 220 190 210 170
Weighted Center -3 -1 -1 -1 -1 -1 -2 -3 -2 -1 -2 -1 -1 -1 -2 -2
Final Center -18 -17 -11 -15 -16 -16 -12 -19 -18 -19 -17 -16 -17 -16 -19 -17
Edges we pass on to GetMarginBit are
190 200 190 190 130 130 170 170 170 180 180 180 110 120 180 190 200 200 200 210 190 190 180 180 180 190 180 180 200 210 190 190
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x1B1B181A17181717 ........ 0x1A1B1B1B1B191919 ........ 0x1717171817161617 ....#... 0x1615151713151313 ........ 0x1417181616181914 ........ 0x1816151516151414 ........ 0x1C1C1B1A1B1B1E1D ....#.#. 0x1C1C1D1D1E1B1C1B ........ 0x1E1C1F20181A1A1C ........ 0x1B1A1B1A1A19191A ........ 0x191716161A151816 ........ 0x1313111112101312 ....#... 0x1616161816151617 ........ 0x1A171B1D171A1A1A #....... 0x17171A1917191717 ........ 0x19161A18151A1516 ........
0x1A1A171916171616 .....#.. 0x191A1A1A1A181818 ........ 0x1616161718151516 ........ 0x1514141612141212 ........ 0x1316171515171813 ....#... 0x1715141415141313 ........ 0x1B1B1A191C1A1F1C ....#.#. 0x1B1B1C1C1D1A1B1A ....#... 0x1D1B1E1F1719191B ........ 0x1A191A1919181819 ........ 0x1816151519141715 .....#.. 0x12121010130F1211 ...#.#.. 0x1515151715141516 ........ 0x1B161A1C16191919 ........ 0x1616191816181616 #....... 0x1815191714191415 ...#....
0x1919161815171515 ....#$.. 0x1819191919171717 .....#.. 0x1515151618141415 ....$##. 0x1413131511131111 ........ 0x1215161415161712 ....$... 0x1614131314131212 .....#.# 0x1A1A19181D19201B ........ 0x1A1A1B1B1D191A19 ....$#.. 0x1C1A1D1E1618181A ....#... 0x1918191818171718 ........ 0x1715141418141614 #.#.#$.. 0x11110F10130F1110 ##.$$$.. 0x1414141614131415 ....#... 0x1B15191B15181818 $...#... 0x1615181715171515 $....#.. 0x1714181713181314 ...$#.#.
0x1818151715171414 ##..$$.. 0x1718181818171616 .....$.. 0x1414141518141414 ....$$$# 0x1312121410121010 ........ 0x1114151315151611 ....$... 0x1513121213131112 .#...$.$ 0x191918171D18201A ....$.$. 0x19191A1A1D191918 ....$$.. 0x1B191C1D16171719 ....$... 0x1817181717161617 ....#... 0x1714141318141513 $.$.$$.. 0x11110E10130F100F $$.$$$#. 0x1313131514121314 ....$.#. 0x1B14181A15171717 $...$.#. 0x1614171614171414 $##.#$## 0x1613171713171313 ###$$#$.
0x1818141615171313 $$..$$.. 0x1617171717171515 .####$#. 0x1313131418141414 #.#.$$$$ 0x121111130F110F0F ....###. 0x1013141215141510 ....$.#. 0x1413111112131012 .$...$.$ 0x181817161D172019 ....$#$# 0x181819191D191817 ..#.$$## 0x1A181B1C16161618 #...$.#. 0x1716171617151516 ....$... 0x1713141218141412 $.$.$$## 0x11110D10130F100E $$.$$$$. 0x1212121414111313 ....$.$. 0x1B13171915161716 $#.#$#$# 0x1614171514171414 $$$.$$$$ 0x1613171713171312 $$$$$$$.
0x1818131515171212 $$..$$.. 0x1517171717171514 #$$$$$$# 0x1312131318141414 $.$.$$$$ 0x111010120F110F0E ....$$$# 0x0F1213111513150F ....$#$. 0x1313101011130F12 .$..#$.$ 0x171716151D172019 ....$$$$ 0x171719181D191817 ##$#$$$$ 0x1A171A1B16151617 $###$#$# 0x1615161517141415 .#..$.## 0x1712141118141412 $.$.$$$$ 0x11110C10130F100D $$#$$$$. 0x1111111314101312 ....$.$. 0x1B13161915161716 $$#$$$$$ 0x1614171414171414 $$$#$$$$ 0x1613171713171311 $$$$$$$.
0x1818121415171111 $$#.$$## 0x1517171717171514 $$$$$$$$ 0x1311131218141414 $#$#$$$$ 0x100F0F110F110F0E #.##$$$$ 0x0E1112101513150E ..#.$$$# 0x12130F0F11130E12 #$..$$#$ 0x161615141D172019 ..##$$$$ 0x171719181D191817 $$$$$$$$ 0x1A171A1B16151617 $$$$$$$$ 0x1515151417131415 .$##$.$$ 0x1711141018141412 $.$.$$$$ 0x11110C10130F100C $$$$$$$# 0x10101012140F1311 ....$#$# 0x1B13161915161716 $$$$$$$$ 0x1614171414171414 $$$$$$$$ 0x1613171713171310 $$$$$$$.
0x1818121315171111 $$$.$$$$ 0x1517171717171514 $$$$$$$$ 0x1311131218141414 $$$$$$$$ 0x100E0F110F110F0E $.$$$$$$ 0x0D10120F1513150E ..$.$$$$ 0x12130E0E11130E12 $$#.$$$$ 0x151515141D172019 ..$$$$$$ 0x171719181D191817 $$$$$$$$ 0x1A171A1B16151617 $$$$$$$$ 0x1415151417121415 #$$$$#$$ 0x1710140F18141412 $#$#$$$$ 0x11110C10130F100C $$$$$$$$ 0x0F0F0F11140F1311 .#..$$$$ 0x1B13161915161716 $$$$$$$$ 0x1614171414171414 $$$$$$$$ 0x161317171317130F $$$$$$$#
0x1818121215171111 $$$.$$$$ 0x1517171717171514 $$$$$$$$ 0x1311131218141414 $$$$$$$$ 0x100D0F110F110F0E $.$$$$$$ 0x0C0F120E1513150E ##$#$$$$ 0x12130E0D11130E12 $$$.$$$$ 0x141415141D172019 ..$$$$$$ 0x171719181D191817 $$$$$$$$ 0x1A171A1B16151617 $$$$$$$$ 0x1415151417121415 $$$$$$$$ 0x1710140F18141412 $$$$$$$$ 0x11110C10130F100C $$$$$$$$ 0x0E0F0E10140F1311 #$.#$$$$ 0x1B13161915161716 $$$$$$$$ 0x1614171414171414 $$$$$$$$ 0x161317171317130F $$$$$$$$
0x1818121115171111 $$$.$$$$ 0x1517171717171514 $$$$$$$$ 0x1311131218141414 $$$$$$$$ 0x100C0F110F110F0E $.$$$$$$ 0x0C0F120E1513150E $$$$$$$$ 0x12130E0C11130E12 $$$.$$$$ 0x131315141D172019 ##$$$$$$ 0x171719181D191817 $$$$$$$$ 0x1A171A1B16151617 $$$$$$$$ 0x1415151417121415 $$$$$$$$ 0x1710140F18141412 $$$$$$$$ 0x11110C10130F100C $$$$$$$$ 0x0E0F0D10140F1311 $$#$$$$$ 0x1B13161915161716 $$$$$$$$ 0x1614171414171414 $$$$$$$$ 0x161317171317130F $$$$$$$$
0x1818121015171111 $$$#$$$$ 0x1517171717171514 $$$$$$$$ 0x1311131218141414 $$$$$$$$ 0x100B0F110F110F0E $#$$$$$$ 0x0C0F120E1513150E $$$$$$$$ 0x12130E0B11130E12 $$$#$$$$ 0x131315141D172019 $$$$$$$$ 0x171719181D191817 $$$$$$$$ 0x1A171A1B16151617 $$$$$$$$ 0x1415151417121415 $$$$$$$$ 0x1710140F18141412 $$$$$$$$ 0x11110C10130F100C $$$$$$$$ 0x0E0F0D10140F1311 $$$$$$$$ 0x1B13161915161716 $$$$$$$$ 0x1614171414171414 $$$$$$$$ 0x161317171317130F $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x1B1B181A17181717 ........ 0x1A1B1B1B1B191919 ........ 0x1717171817161617 ........ 0x1615151713151313 ........ 0x1417181616181914 ........ 0x1816151516151414 ........ 0x1C1C1B1A1B1B1E1D ........ 0x1C1C1D1D1E1B1C1B ........ 0x1E1C1F20181A1A1C ........ 0x1B1A1B1A1A19191A ........ 0x191716161A151816 ........ 0x1313111112101312 ........ 0x1616161816151617 ........ 0x1A171B1D171A1A1A ........ 0x17171A1917191717 ........ 0x19161A18151A1516 ........
0x1C1C191B18191818 ........ 0x1B1C1C1C1C1A1A1A ........ 0x1818181918171718 ........ 0x1716161814161414 ........ 0x1518191717191A15 ........ 0x1917161617161515 ........ 0x1D1D1C1B1C1C1F1E ........ 0x1D1D1E1E1F1C1D1C ........ 0x1F1D2021191B1B1D ........ 0x1C1B1C1B1B1A1A1B ........ 0x1A1817171B161917 ........ 0x1414121213111413 ........ 0x1717171917161718 ........ 0x1B181C1E181B1B1B ........ 0x18181B1A181A1818 ........ 0x1A171B19161B1617 ........
0x1D1D1A1C191A1919 ........ 0x1C1D1D1D1D1B1B1B ........ 0x1919191A19181819 ........ 0x1817171915171515 ........ 0x16191A18181A1B16 ........ 0x1A18171718171616 ........ 0x1E1E1D1C1D1D201F ........ 0x1E1E1F1F201D1E1D ........ 0x201E21221A1C1C1E ........ 0x1D1C1D1C1C1B1B1C ........ 0x1B1918181C171A18 ........ 0x1515131314121514 ........ 0x1818181A18171819 ........ 0x1C191D1F191C1C1C ........ 0x19191C1B191B1919 ........ 0x1B181C1A171C1718 ........
0x1E1E1B1D1A1B1A1A ........ 0x1D1E1E1E1E1C1C1C ........ 0x1A1A1A1B1A19191A ........ 0x1918181A16181616 ........ 0x171A1B19191B1C17 ........ 0x1B19181819181717 ........ 0x1F1F1E1D1E1E2120 ........ 0x1F1F2020211E1F1E ........ 0x211F22231B1D1D1F ........ 0x1E1D1E1D1D1C1C1D ........ 0x1C1A19191D181B19 ........ 0x1616141415131615 ........ 0x1919191B1918191A ........ 0x1D1A1E201A1D1D1D ........ 0x1A1A1D1C1A1C1A1A ........ 0x1C191D1B181D1819 ........
0x1F1F1C1E1B1C1B1B ........ 0x1E1F1F1F1F1D1D1D ........ 0x1B1B1B1C1B1A1A1B ........ 0x1A19191B17191717 ........ 0x181B1C1A1A1C1D18 ........ 0x1C1A19191A191818 ........ 0x20201F1E1F1F2221 ........ 0x20202121221F201F ........ 0x222023241C1E1E20 ........ 0x1F1E1F1E1E1D1D1E ........ 0x1D1B1A1A1E191C1A ........ 0x1717151516141716 ....#... 0x1A1A1A1C1A191A1B ........ 0x1E1B1F211B1E1E1E ........ 0x1B1B1E1D1B1D1B1B ........ 0x1D1A1E1C191E191A ........
0x20201D1F1C1D1C1C ........ 0x1F202020201E1E1E ........ 0x1C1C1C1D1C1B1B1C ........ 0x1B1A1A1C181A1818 ........ 0x191C1D1B1B1D1E19 ........ 0x1D1B1A1A1B1A1919 ........ 0x2121201F20202322 ........ 0x2121222223202120 ........ 0x232124251D1F1F21 ........ 0x201F201F1F1E1E1F ........ 0x1E1C1B1B1F1A1D1B ........ 0x1818161616151817 ....$... 0x1B1B1B1D1B1A1B1C ........ 0x1F1C20221C1F1F1F ........ 0x1C1C1F1E1C1E1C1C ........ 0x1E1B1F1D1A1F1A1B ........
0x21211E201D1E1D1D ........ 0x20212121211F1F1F ........ 0x1D1D1D1E1D1C1C1D ........ 0x1C1B1B1D191B1919 ........ 0x1A1D1E1C1C1E1F1A ........ 0x1E1C1B1B1C1B1A1A ........ 0x2222212021212423 ........ 0x2222232324212221 ........ 0x242225261E202022 ........ 0x21202120201F1F20 ........ 0x1F1D1C1C201B1E1C ........ 0x1919171716161918 ....$... 0x1C1C1C1E1C1B1C1D ........ 0x201D21231D202020 ........ 0x1D1D201F1D1F1D1D ........ 0x1F1C201E1B201B1C ........
0x22221F211E1F1E1E ........ 0x2122222222202020 ........ 0x1E1E1E1F1E1D1D1E ........ 0x1D1C1C1E1A1C1A1A ........ 0x1B1E1F1D1D1F201B ........ 0x1F1D1C1C1D1C1B1B ........ 0x2323222122222524 ........ 0x2323242425222322 ........ 0x252326271F212123 ........ 0x2221222121202021 ........ 0x201E1D1D211C1F1D ........ 0x1A1A181816171A19 ....$... 0x1D1D1D1F1D1C1D1E ........ 0x211E22241E212121 ........ 0x1E1E21201E201E1E ........ 0x201D211F1C211C1D ........
0x232320221F201F1F ........ 0x2223232323212121 ........ 0x1F1F1F201F1E1E1F ........ 0x1E1D1D1F1B1D1B1B ........ 0x1C1F201E1E20211C ........ 0x201E1D1D1E1D1C1C ........ 0x2424232223232625 ........ 0x2424252526232423 ........ 0x2624272820222224 ........ 0x2322232222212122 ........ 0x211F1E1E221D201E ........ 0x1B1B191916181B1A ....$... 0x1E1E1E201E1D1E1F ........ 0x221F23251F222222 ........ 0x1F1F22211F211F1F ........ 0x211E22201D221D1E ........
0x2424212320212020 ........ 0x2324242424222222 ........ 0x20202021201F1F20 ........ 0x1F1E1E201C1E1C1C ........ 0x1D20211F1F21221D ........ 0x211F1E1E1F1E1D1D ......#. 0x2525242324242726 ........ 0x2525262627242524 ........ 0x2725282921232325 ........ 0x2423242323222223 ........ 0x22201F1F231E211F ........ 0x1C1C1A1A16191C1B ..#.$.## 0x1F1F1F211F1E1F20 ........ 0x2320242620232323 ........ 0x2020232220222020 ........ 0x221F23211E231E1F ........
0x2525222421222121 ........ 0x2425252525232323 ........ 0x2121212221202021 ........ 0x201F1F211D1F1D1D ........ 0x1E2122202022231E ........ 0x22201F1F201F1D1E ...#..$. 0x2626252425252827 ........ 0x2626272728252625 ........ 0x2826292A22242426 ........ 0x2524252424232324 ........ 0x23212020241F2220 ........ 0x1D1D1A1B161A1C1B .#$.$#$$ 0x20202022201F2021 ........ 0x2421252721242424 ........ 0x2121242321232121 ........ 0x232024221F241F20 ........
0x2626232522232222 ........ 0x2526262626242424 ........ 0x2222222322212122 ........ 0x212020221E201E1E ........ 0x1F2223212123241F ........ 0x2321201F21201D1F .##$.#$. 0x2727262526262928 ........ 0x2727282829262726 ........ 0x29272A2B23252527 ........ 0x2625262525242425 ........ 0x2422212125202321 ........ 0x1E1D1A1C161A1C1B .$$.$$$$ 0x2121212321202122 ........ 0x2522262822252525 ........ 0x2222252422242222 ........ 0x2421252320252021 ........
0x2727242623242323 ........ 0x2627272727252525 ........ 0x2323232423222223 ........ 0x222121231F211F1F ........ 0x2023242222242520 ........ 0x2421201F22201D20 #$$$#$$# 0x2828272627272A29 ........ 0x282829292A272827 ........ 0x2A282B2C24262628 ........ 0x2726272626252526 ........ 0x2523222226212422 ........ 0x1F1D1A1D161A1C1B #$$#$$$$ 0x2222222422212223 .....#.. 0x2623272923262626 ........ 0x2323262523252323 ........ 0x2522262421262122 ........
0x2828252724252424 ........ 0x2728282828262626 ........ 0x2424242524232324 ........ 0x2322222420222020 ....#..# 0x2124252323252621 ........ 0x2421201F22201D20 $$$$$$$$ 0x2929282728282B2A ........ 0x29292A2A2B282928 ........ 0x2B292C2D25272729 ........ 0x2827282727262627 ........ 0x2624232327222523 .....#.. 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2323232523212324 ....#$.. 0x2724282A24272727 ........ 0x2424272624262424 ........ 0x2623272522272223 ........
0x2929262825262525 ........ 0x2829292929272727 ........ 0x2525252625242425 ........ 0x2423232520232120 ....$..$ 0x2225262424262722 ........ 0x2421201F22201D20 $$$$$$$$ 0x2A2A292829292C2B ........ 0x2A2A2B2B2C292A29 ........ 0x2C2A2D2E2628282A ........ 0x2928292828272728 ........ 0x2725242428222624 .#.##$#. 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2424242623212425 ....$$.# 0x2825292B25282828 .....#.. 0x2525282725272525 ........ 0x2724282623282324 ........
0x2A2A272926272626 ........ 0x292A2A2A2A282828 ....#... 0x2626262726252526 ...###.. 0x2524242620242220 #.##$##$ 0x2326272525272823 ........ 0x2421201F22201D20 $$$$$$$$ 0x2B2B2A292A2A2D2C ........ 0x2B2B2C2C2D2A2B2A ........ 0x2D2B2E2F2729292B ........ 0x2A292A2929282829 .#...... 0x2825252428222625 .$.$$$$# 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2525252723212525 #.#.$$#$ 0x29262A2C26282929 #....$#. 0x2626292826282626 ........ 0x2825292724292425 ........
0x2B2B282A27282727 ........ 0x2A2B2B2B2A292929 ....$... 0x2727272726252627 ##.$$$.# 0x2525242620242220 $#$$$$$$ 0x2427282626282924 ........ 0x2421201F22201D20 $$$$$$$$ 0x2C2C2B2A2B2B2E2D ........ 0x2C2C2D2D2E2B2C2B ........ 0x2E2C2F30282A2A2C ........ 0x2B292B2A2A29292A .$...... 0x2925262428222625 #$#$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252823212525 $#$.$$$$ 0x29272B2D2728292A $.#..$$. 0x27272A2927292727 ........ 0x29262A28252A2526 ..#.....
0x2C2C292B28292828 ........ 0x2B2C2C2C2A2A2A2A .##.$##. 0x2727282726252727 $$#$$$#$ 0x2525242620242220 $$$$$$$$ 0x2528292727292A25 ...#.... 0x2421201F22201D20 $$$$$$$$ 0x2D2D2C2B2C2C2F2E ....#.#. 0x2D2D2E2E2F2C2D2C ........ 0x2F2D3031292B2B2D ........ 0x2C292C2B2B2A2A2B .$#..### 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$#$$$$ 0x29282B2E2828292B $#$##$$# 0x28282B2A282A2828 ........ 0x2A272A29262B2627 ..$.....
0x2D2D2A2C292A2929 ........ 0x2C2C2C2D2A2A2A2B .$$#$$$# 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x26292A27282A2B26 ...$.#.. 0x2421201F22201D20 $$$$$$$$ 0x2E2E2D2C2C2D2F2F ....$#$. 0x2E2E2F2F302D2E2D ........ 0x302E31322A2C2C2E ........ 0x2D292C2C2C2A2A2B #$$..$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x29292C2B292B2929 ........ 0x2B282A2A272C2728 .#$.....
0x2E2E2B2D2A2B2A2A ......## 0x2D2C2C2D2A2A2A2B #$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B27292A2C27 ###$.$## 0x2421201F22201D20 $$$$$$$$ 0x2F2F2E2D2C2D2F30 #...$$$# 0x2F2F3030312E2F2E ....#... 0x312F32332B2D2D2F ........ 0x2D292C2D2D2A2A2B $$$##$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2A2A2D2C2A2C2A2A ........ 0x2C282A2B282D2829 .$$...##
0x2F2F2C2E2B2C2A2A ......$$ 0x2D2C2C2D2A2A2A2B $$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B272A2A2C27 $$$$#$$$ 0x2421201F22201D20 $$$$$$$$ 0x2F302F2E2C2D2F30 $.##$$$$ 0x30303131312F302F ....$#.. 0x323033342C2E2E30 .......# 0x2D292C2D2D2A2A2B $$$$$$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2B2B2E2D2B2D2B2B ........ 0x2D282A2C292E2829 .$$.##$$
0x30302D2F2C2D2A2A ..##.#$$ 0x2D2C2C2D2A2A2A2B $$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B272A2A2C27 $$$$$$$$ 0x2421201F22201D20 $$$$$$$$ 0x2F312F2E2C2D2F30 $.$$$$$$ 0x31313232312F3130 .#.#$$.# 0x333134352D2F2F30 .....#.$ 0x2D292C2D2D2A2A2B $$$$$$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2C2C2F2E2C2E2C2C ........ 0x2E282A2D292E2829 .$$.$$$$
0x31312D2F2D2D2A2A .#$$.$$$ 0x2D2C2C2D2A2A2A2B $$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B272A2A2C27 $$$$$$$$ 0x2421201F22201D20 $$$$$$$$ 0x2F322F2E2C2D2F30 $.$$$$$$ 0x32313332312F3230 #$#$$$#$ 0x343235362E2F3030 .....$.$ 0x2D292C2D2D2A2A2B $$$$$$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2D2D302F2D2F2D2D #.#.##.# 0x2F282A2E292E2829 #$$#$$$$
0x32312D2F2E2D2A2A #$$$#$$$ 0x2D2C2C2D2A2A2A2B $$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B272A2A2C27 $$$$$$$$ 0x2421201F22201D20 $$$$$$$$ 0x2F332F2E2C2D2F30 $#$$$$$$ 0x32313332312F3230 $$$$$$$$ 0x353336372F2F3130 .#...$.$ 0x2D292C2D2D2A2A2B $$$$$$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2D2E30302D2F2E2D $.$#$$.$ 0x2F282A2E292E2829 $$$$$$$$
0x32312D2F2E2D2A2A $$$$$$$$ 0x2D2C2C2D2A2A2A2B $$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B272A2A2C27 $$$$$$$$ 0x2421201F22201D20 $$$$$$$$ 0x2F332F2E2C2D2F30 $$$$$$$$ 0x32313332312F3230 $$$$$$$$ 0x36333738302F3230 .$###$.$ 0x2D292C2D2D2A2A2B $$$$$$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2D2F30302D2F2F2D $#$$$$#$ 0x2F282A2E292E2829 $$$$$$$$
0x32312D2F2E2D2A2A $$$$$$$$ 0x2D2C2C2D2A2A2A2B $$$$$$$$ 0x2727282726252727 $$$$$$$$ 0x2525242620242220 $$$$$$$$ 0x272A2B272A2A2C27 $$$$$$$$ 0x2421201F22201D20 $$$$$$$$ 0x2F332F2E2C2D2F30 $$$$$$$$ 0x32313332312F3230 $$$$$$$$ 0x37333738302F3330 #$$$$$#$ 0x2D292C2D2D2A2A2B $$$$$$$$ 0x2925262428222625 $$$$$$$$ 0x1F1D1A1D161A1C1B $$$$$$$$ 0x2526252923212525 $$$$$$$$ 0x29282B2E2828292B $$$$$$$$ 0x2D2F30302D2F2F2D $$$$$$$$ 0x2F282A2E292E2829 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 25 49][ 25 48][ 19 44][ 17 46][ 22 45][ 24 44][ 18 41][ 18 41]
Mc0.Ch0.B1: [ 22 44][ 24 43][ 24 43][ 24 44][ 24 41][ 24 41][ 22 41][ 21 42]
Mc0.Ch1.B0: [ 20 38][ 18 38][ 20 39][ 19 38][ 24 37][ 21 36][ 21 38][ 21 38]
Mc0.Ch1.B1: [ 17 36][ 12 36][ 16 35][ 18 37][ 16 31][ 18 35][ 16 33][ 15 31]
Mc0.Ch2.B0: [ 13 38][ 16 41][ 19 42][ 15 38][ 22 41][ 20 41][ 22 43][ 15 38]
Mc0.Ch2.B1: [ 19 35][ 20 32][ 15 31][ 12 30][ 18 33][ 20 31][ 15 28][ 19 31]
Mc0.Ch3.B0: [ 20 46][ 20 50][ 22 46][ 21 45][ 29 43][ 24 44][ 32 46][ 26 47]
Mc0.Ch3.B1: [ 24 49][ 24 48][ 26 50][ 25 49][ 30 48][ 26 46][ 25 49][ 24 47]
Mc1.Ch0.B0: [ 27 54][ 24 50][ 27 54][ 28 55][ 23 47][ 22 46][ 23 50][ 24 47]
Mc1.Ch0.B1: [ 21 44][ 22 40][ 22 43][ 21 44][ 24 44][ 19 41][ 21 41][ 22 42]
Mc1.Ch1.B0: [ 24 40][ 17 36][ 21 37][ 16 35][ 25 39][ 21 33][ 21 37][ 19 36]
Mc1.Ch1.B1: [ 18 30][ 18 28][ 13 25][ 17 28][ 19 21][ 16 25][ 17 27][ 13 26]
Mc1.Ch2.B0: [ 15 36][ 16 37][ 14 36][ 17 40][ 21 34][ 16 32][ 20 36][ 18 36]
Mc1.Ch2.B1: [ 27 40][ 20 39][ 23 42][ 26 45][ 22 39][ 23 39][ 24 40][ 23 42]
Mc1.Ch3.B0: [ 23 44][ 21 46][ 24 47][ 21 47][ 21 44][ 24 46][ 21 46][ 21 44]
Mc1.Ch3.B1: [ 23 46][ 20 39][ 24 41][ 24 45][ 20 40][ 24 45][ 20 39][ 16 40]
Per Bit Offset
Mc0.Ch0.B0: 10 10 8 6 11 10 7 7
Mc0.Ch0.B1: 7 7 7 7 6 8 7 7
Mc0.Ch1.B0: 6 5 7 5 8 7 8 7
Mc0.Ch1.B1: 5 3 5 5 5 6 6 4
Mc0.Ch2.B0: 6 6 7 5 10 7 8 7
Mc0.Ch2.B1: 3 4 2 0 4 5 2 5
Mc0.Ch3.B0: 5 7 7 7 9 7 9 8
Mc0.Ch3.B1: 9 8 9 8 9 9 9 9
Mc1.Ch0.B0: 11 9 10 10 11 8 11 8
Mc1.Ch0.B1: 6 5 6 7 8 5 6 6
Mc1.Ch1.B0: 7 4 7 4 6 6 5 6
Mc1.Ch1.B1: 5 4 2 6 2 5 3 2
Mc1.Ch2.B0: 4 5 3 5 6 3 6 4
Mc1.Ch2.B1: 8 7 6 7 8 5 6 7
Mc1.Ch3.B0: 11 11 10 9 10 10 11 10
Mc1.Ch3.B1: 10 8 7 11 9 9 9 6
START_RxDqsBitDelay
R Mc0.C0.R0.S0.B0 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S0.B1 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S0.B2 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S0.B3 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S0.B4 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S0.B5 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S0.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S0.B7 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S1.B0 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S1.B1 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B2 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B3 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S1.B4 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S1.B5 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S1.B6 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S1.B7 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S2.B0 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S2.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S2.B3 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S2.B4 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S2.B5 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S2.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S2.B7 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R0.S3.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S3.B1 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S3.B2 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S3.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R0.S3.B4 RxDqsBitDelay: 24 (0x18)
R Mc0.C0.R0.S3.B5 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S3.B6 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S3.B7 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S4.B0 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S4.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R0.S4.B2 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S4.B3 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S4.B4 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R0.S4.B5 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R0.S4.B6 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S4.B7 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S5.B0 RxDqsBitDelay: 27 (0x1B)
R Mc0.C0.R0.S5.B1 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S5.B2 RxDqsBitDelay: 23 (0x17)
R Mc0.C0.R0.S5.B3 RxDqsBitDelay: 21 (0x15)
R Mc0.C0.R0.S5.B4 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S5.B5 RxDqsBitDelay: 26 (0x1A)
R Mc0.C0.R0.S5.B6 RxDqsBitDelay: 22 (0x16)
R Mc0.C0.R0.S5.B7 RxDqsBitDelay: 25 (0x19)
R Mc0.C0.R0.S6.B0 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S6.B1 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R0.S6.B2 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S6.B3 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R0.S6.B4 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S6.B5 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R0.S6.B6 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R0.S6.B7 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B0 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B1 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S7.B2 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R0.S7.B3 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B4 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R0.S7.B5 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R0.S7.B6 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R0.S7.B7 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S0.B0 RxDqsBitDelay: 41 (0x29)
R Mc1.C1.R0.S0.B1 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S0.B2 RxDqsBitDelay: 41 (0x29)
R Mc1.C1.R0.S0.B3 RxDqsBitDelay: 42 (0x2A)
R Mc1.C1.R0.S0.B4 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S0.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S0.B6 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R0.S0.B7 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S1.B0 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S1.B1 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S1.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S1.B3 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S1.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S1.B5 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S1.B6 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S1.B7 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S2.B0 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S2.B1 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S2.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S2.B3 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S2.B4 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S2.B5 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S2.B6 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S2.B7 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S3.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S3.B1 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S3.B2 RxDqsBitDelay: 19 (0x13)
R Mc1.C1.R0.S3.B3 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R0.S3.B4 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S3.B5 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R0.S3.B6 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R0.S3.B7 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R0.S4.B0 RxDqsBitDelay: 26 (0x1A)
R Mc1.C1.R0.S4.B1 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S4.B2 RxDqsBitDelay: 25 (0x19)
R Mc1.C1.R0.S4.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R0.S4.B4 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S4.B5 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R0.S4.B6 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R0.S4.B7 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R0.S5.B0 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S5.B1 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S5.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S5.B3 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S5.B4 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S5.B5 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R0.S5.B6 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R0.S5.B7 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B0 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S6.B1 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S6.B2 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R0.S6.B3 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S6.B4 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S6.B5 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S6.B6 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R0.S6.B7 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S7.B0 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S7.B1 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R0.S7.B3 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S7.B4 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B5 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R0.S7.B6 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R0.S7.B7 RxDqsBitDelay: 28 (0x1C)
STOP_RxDqsBitDelay
LstSavd Margins 160 160 160 160 120 120 150 150 160 160 160 160 100 100 160 160 170 170 180 180 170 170 160 160 160 160 160 160 190 190 150 150 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 210 170 200 170 150 130 200 160 190 170 190 170 110 110 200 170 210 180 220 190 210 180 170 170 220 170 220 170 210 200 180 160
Weighted Center -2 -2 -1 -2 -1 -1 0 -2 -2 -2 -2 0 -3 -3 -1 -1
Final Center -17 -17 -12 -16 -16 -16 -9 -17 -18 -19 -18 -15 -18 -18 -19 -15
Edges we pass on to GetMarginBit are
190 190 180 190 140 140 180 180 180 180 180 180 110 110 180 190 190 200 200 210 190 200 170 170 190 200 190 200 200 210 170 170
### Measure Eye Width Per BIT
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1Byte 0 1
Mc 0 Channel 0 Vref = 0
Mc 0 Channel 1 Vref = 0
Mc 0 Channel 2 Vref = 0
Mc 0 Channel 3 Vref = 0
Mc 1 Channel 0 Vref = 0
Mc 1 Channel 1 Vref = 0
Mc 1 Channel 2 Vref = 0
Mc 1 Channel 3 Vref = 0
+--MrcGetMarginBit, rsign = -1
0x1B1D191B18191918 .#...... 0x1B1A1B1D1B191A19 .##..#.. 0x1918191A19191A17 ........ 0x1716161815181616 ........ 0x1617181518161815 ........ 0x1917141416171415 ........ 0x1C1E1C1C1A1B1C1D ........ 0x1C1C1D1C1E1B1C1B ........ 0x1D1A1D1D19191A19 ........ 0x19181A1919181919 ....#... 0x1B16151618141815 ........ 0x141311120F111310 ........ 0x1414161815151616 ....#... 0x1B181C1D181C1B1C ........ 0x17161B1817181716 ........ 0x1815171816181415 ........
0x1A1E181A17181817 ....#... 0x1A1B1C1C1A1A1918 ........ 0x1817181918181916 ....#... 0x1615151714171515 ....##.# 0x1516171417151714 ....#.#. 0x1816131315161314 .....#.. 0x1B1D1B1B191A1B1C ........ 0x1B1B1C1B1D1A1B1A ........ 0x1C191C1C18181918 ........ 0x181719181A171818 ........ 0x1A15141517131714 .....#.. 0x131210110E10120F ........ 0x1313151716141515 ##...#.. 0x1A171B1C171B1A1B ........ 0x16151A1716171615 .......# 0x1714161715171314 ........
0x191E171917171716 .$..$#.. 0x191B1C1B191A1817 .$$..$.. 0x1716171818171815 ....$### 0x1514141614171415 ..##$$.$ 0x1415161317141713 ....$.$. 0x1715121214161213 ##...$.. 0x1A1C1A1A18191A1B ........ 0x1A1A1B1A1C191A19 .....#.. 0x1B181B1B17171817 ....#... 0x171618171A161717 ....$... 0x1914131416131613 ....#$.. 0x12110F100D0F110E ........ 0x1313141616141414 $$..$$.. 0x19161A1B161A191A ........ 0x1514191615161515 .......$ 0x1613151614161213 ........
0x181E161817171615 .$..$$.. 0x181B1C1A181A1716 .$$..$.. 0x1615161718171815 ....$$$$ 0x1413141614171315 ..$$$$#$ 0x1314151217131712 ....$#$# 0x1715111113161112 $$..#$## 0x191B19191718191A ....#.#. 0x19191A191B191918 ....#$## 0x1A171A1A17161716 ##..$... 0x161517161A151616 ##.#$### 0x1813121316131512 ....$$.. 0x11100E0F0C0E100D ....#... 0x1313131516141313 $$##$$## 0x1815191A15191819 ##.###.# 0x1413181514151415 .......$ 0x1512141513151112 ......#.
0x171E151717171514 #$..$$.. 0x171B1C19171A1615 #$$#.$## 0x1514151618171815 ....$$$$ 0x1312141614171315 #.$$$$$$ 0x1213141117131712 ....$$$$ 0x1715101013161112 $$..$$$$ 0x181A181817171919 ....$#$. 0x181819181B191918 #.##$$$$ 0x1A17191917151615 $$..$... 0x161516161A151616 $$#$$$$$ 0x1712111216131411 #...$$.. 0x100F0D0E0C0D0F0C ....$... 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$#$$$#$ 0x1312171413141315 ....###$ 0x1411131412141111 ..#..#$.
0x171E141617171413 $$##$$## 0x171B1C19161A1615 $$$$#$$$ 0x1413141518171815 .##.$$$$ 0x1311141614171315 $.$$$$$$ 0x1112131017131712 ..##$$$$ 0x17150F0F13161112 $$#.$$$$ 0x1719171717171918 ....$$$. 0x181719181B191918 $.$$$$$$ 0x1A17181817141514 $$..$### 0x161516161A151616 $$$$$$$$ 0x1711101116131310 $.#.$$.. 0x0F0E0C0D0C0C0E0B ....$#.. 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1211161313141315 #...$$$$ 0x1310131311141110 ..$..$$.
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141418171815 #$$.$$$$ 0x1310141614171315 $#$$$$$$ 0x1011131017131712 ##$$$$$$ 0x17150F0E13161112 $$$#$$$$ 0x1618161617171917 ....$$$. 0x181619181B191918 $.$$$$$$ 0x1A17171717141514 $$##$$$$ 0x161516161A151616 $$$$$$$$ 0x171010101613120F $.$.$$## 0x0E0D0B0C0C0C0D0A ....$$.# 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $###$$$$ 0x120F13121014110F #.$..$$.
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141318171815 $$$.$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x1517151517171916 ....$$$. 0x181519181B191918 $#$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170F100F1613120F $.$#$$$$ 0x0D0C0A0B0C0C0C0A #.#.$$#$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120E13110F14110E $.$..$$.
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$#$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x1416141417171915 ....$$$. 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170E100F1613120F $.$$$$$$ 0x0D0B0A0A0C0C0C0A $.$.$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120D13100E14110D $.$.#$$#
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x1315131317171914 ....$$$. 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $#$$$$$$ 0x0D0A0A090C0C0C0A $#$#$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120C130F0E14110D $.$#$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x1214121217171913 ....$$$# 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $#$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x1113111117171913 ....$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x1012101017171913 ....$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0F110F0F17171913 ..#.$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0E100F0E17171913 ..$#$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0D0F0F0E17171913 ..$$$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0C0E0F0E17171913 #.$$$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0C0D0F0E17171913 $.$$$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0C0C0F0E17171913 $.$$$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
0x171E141617171413 $$$$$$$$ 0x171B1C19161A1615 $$$$$$$$ 0x1313141218171815 $$$$$$$$ 0x1310141614171315 $$$$$$$$ 0x1011131017131712 $$$$$$$$ 0x17150F0E13161112 $$$$$$$$ 0x0C0B0F0E17171913 $#$$$$$$ 0x181519181B191918 $$$$$$$$ 0x1A17171717141514 $$$$$$$$ 0x161516161A151616 $$$$$$$$ 0x170D100F1613120F $$$$$$$$ 0x0D0A0A090C0C0C0A $$$$$$$$ 0x1313131516141313 $$$$$$$$ 0x1815181A15191719 $$$$$$$$ 0x1210151213141315 $$$$$$$$ 0x120B130F0E14110D $$$$$$$$
+--MrcGetMarginBit, rsign = 1
0x1B1D191B18191918 ........ 0x1B1A1B1D1B191A19 ........ 0x1918191A19191A17 ........ 0x1716161815181616 ........ 0x1617181518161815 ........ 0x1917141416171415 ........ 0x1C1E1C1C1A1B1C1D ........ 0x1C1C1D1C1E1B1C1B ........ 0x1D1A1D1D19191A19 ........ 0x19181A1919181919 ........ 0x1B16151618141815 ........ 0x141311120F111310 ........ 0x1414161815151616 ........ 0x1B181C1D181C1B1C ........ 0x17161B1817181716 ........ 0x1815171816181415 ........
0x1C1E1A1C191A1A19 ........ 0x1C1B1C1E1C1A1B1A ........ 0x1A191A1B1A1A1B18 ........ 0x1817171916191717 ........ 0x1718191619171916 ........ 0x1A18151517181516 ........ 0x1D1F1D1D1B1C1D1E ........ 0x1D1D1E1D1F1C1D1C ........ 0x1E1B1E1E1A1A1B1A ........ 0x1A191B1A1A191A1A ........ 0x1C17161719151916 ........ 0x1514121310121411 ........ 0x1515171916161717 ........ 0x1C191D1E191D1C1D ........ 0x18171C1918191817 ........ 0x1916181917191516 ........
0x1D1F1B1D1A1B1B1A ........ 0x1D1C1D1F1D1B1C1B ........ 0x1B1A1B1C1B1B1C19 ........ 0x1918181A171A1818 ........ 0x18191A171A181A17 ........ 0x1B19161618191617 ........ 0x1E201E1E1C1D1E1F ........ 0x1E1E1F1E201D1E1D ........ 0x1F1C1F1F1B1B1C1B ........ 0x1B1A1C1B1B1A1B1B ........ 0x1D1817181A161A17 ........ 0x1615131411131512 ........ 0x1616181A17171818 ........ 0x1D1A1E1F1A1E1D1E ........ 0x19181D1A191A1918 ........ 0x1A17191A181A1617 ........
0x1E201C1E1B1C1C1B ........ 0x1E1D1E201E1C1D1C ........ 0x1C1B1C1D1C1C1D1A ........ 0x1A19191B181B1919 ........ 0x191A1B181B191B18 ........ 0x1C1A1717191A1718 ........ 0x1F211F1F1D1E1F20 ........ 0x1F1F201F211E1F1E ........ 0x201D20201C1C1D1C ........ 0x1C1B1D1C1C1B1C1C ........ 0x1E1918191B171B18 ........ 0x1716141512141613 ........ 0x1717191B18181919 ........ 0x1E1B1F201B1F1E1F ........ 0x1A191E1B1A1B1A19 ........ 0x1B181A1B191B1718 ........
0x1F211D1F1C1D1D1C ........ 0x1F1E1F211F1D1E1D ........ 0x1D1C1D1E1D1D1E1B ........ 0x1B1A1A1C191C1A1A ........ 0x1A1B1C191C1A1C19 ........ 0x1D1B18181A1B1819 ........ 0x202220201E1F2021 ........ 0x20202120221F201F ........ 0x211E21211D1D1E1D ........ 0x1D1C1E1D1D1C1D1D ........ 0x1F1A191A1C181C19 ........ 0x1817151613151714 ........ 0x18181A1C19191A1A ........ 0x1F1C20211C201F20 ........ 0x1B1A1F1C1B1C1B1A ........ 0x1C191B1C1A1C1819 ........
0x20221E201D1E1E1D ........ 0x201F2022201E1F1E ........ 0x1E1D1E1F1E1E1F1C ........ 0x1C1B1B1D1A1D1B1B ........ 0x1B1C1D1A1D1B1D1A ........ 0x1E1C19191B1C191A ........ 0x212321211F202122 ........ 0x2121222123202120 ........ 0x221F22221E1E1F1E ........ 0x1E1D1F1E1E1D1E1E ........ 0x201B1A1B1D191D1A ........ 0x1918161714161815 ........ 0x19191B1D1A1A1B1B ........ 0x201D21221D212021 ........ 0x1C1B201D1C1D1C1B ........ 0x1D1A1C1D1B1D191A ........
0x21231F211E1F1F1E ........ 0x21202123211F201F ........ 0x1F1E1F201F1F201D ........ 0x1D1C1C1E1B1E1C1C ........ 0x1C1D1E1B1E1C1E1B ........ 0x1F1D1A1A1C1D1A1B ........ 0x2224222220212223 ........ 0x2222232224212221 ........ 0x232023231F1F201F ........ 0x1F1E201F1F1E1F1F ........ 0x211C1B1C1E1A1E1B ........ 0x1A19171815171916 ........ 0x1A1A1C1E1B1B1C1C ........ 0x211E22231E222122 ........ 0x1D1C211E1D1E1D1C ........ 0x1E1B1D1E1C1E1A1B ........
0x222420221F20201F ........ 0x2221222422202120 ........ 0x201F20212020211E .....#.. 0x1E1D1D1F1C1F1D1D ........ 0x1D1E1F1C1F1D1F1C ........ 0x201E1B1B1D1E1B1C ........ 0x2325232321222324 ........ 0x2323242325222322 ........ 0x2421242420202120 ........ 0x201F2120201F2020 ........ 0x221D1C1D1F1B1F1C ........ 0x1B1A181916181A17 ........ 0x1B1B1D1F1C1C1D1D ........ 0x221F23241F232223 ........ 0x1E1D221F1E1F1E1D ........ 0x1F1C1E1F1D1F1B1C ........
0x2325212320212120 ........ 0x2322232523212221 ........ 0x212021222120221F .....$.. 0x1F1E1E201D201E1E ........ 0x1E1F201D201E201D ........ 0x211F1C1C1E1F1C1D ........ 0x2426242422232425 ........ 0x2424252426232423 ........ 0x2522252521212221 ........ 0x2120222121202121 ........ 0x231E1D1E201C201D ........ 0x1C1B191A17191B18 ........ 0x1C1C1E201D1D1E1E ........ 0x2320242520242324 ........ 0x1F1E23201F201F1E ........ 0x201D1F201E201C1D ........
0x2426222421222221 ........ 0x2423242624222322 ........ 0x2221222322202320 .....$.. 0x201F1F211E211F1F ........ 0x1F20211E211F211E ........ 0x22201D1D1F201D1E ........ 0x2527252523242526 ........ 0x2525262527242524 ........ 0x2623262622222322 ........ 0x2221232222212222 ........ 0x241F1E1F211D211E ........ 0x1D1C1A1B181A1C19 ........ 0x1D1D1F211E1E1F1F ........ 0x2421252621252425 ........ 0x201F24212021201F ........ 0x211E20211F211D1E ........
0x2527232522232322 ........ 0x2524252725232423 ........ 0x2322232423202421 ....#$.. 0x212020221F222020 ........ 0x2021221F2220221F ........ 0x23211E1E20211E1F ........ 0x2628262624252627 ........ 0x2626272628252625 ........ 0x2724272723232423 ........ 0x2322242323222323 ........ 0x25201F20221E221F ........ 0x1E1D1B1C191B1D1A ........ 0x1E1E20221F1F2020 ........ 0x2522262722262526 ........ 0x2120252221222120 ........ 0x221F212220221E1F ........
0x2628242623242423 ........ 0x2625262826242524 ........ 0x2423242523202522 ...#$$.. 0x2221212320232121 ........ 0x2122232023212320 ........ 0x24221F1F21221F20 ........ 0x2729272725262728 ........ 0x2727282729262726 ........ 0x2825282824242524 ........ 0x2423252424232424 ........ 0x26212021231F2320 ........ 0x1F1E1C1D1A1C1E1B ........ 0x1F1F212320202121 ........ 0x2623272823272627 ........ 0x2221262322232221 ........ 0x2320222321231F20 ........
0x2729252724252524 ........ 0x2726272927252625 ........ 0x2524252523202623 ##.$$$#. 0x2322222421242222 ........ 0x2223242124222421 ........ 0x2523202022232021 ........ 0x282A282826272829 ........ 0x282829282A272827 ........ 0x2926292925252625 ........ 0x2524262525242525 ........ 0x2722212224202421 ........ 0x201F1D1E1B1D1F1C ........ 0x2020222421212222 ........ 0x2724282924282728 ........ 0x2322272423242322 ........ 0x2421232422242021 ........
0x282A262825262625 ........ 0x2827282A28262726 ........ 0x2524262523202624 $$.$$$$# 0x2423232522252323 ........ 0x2324252225232522 ........ 0x2624212123242122 ........ 0x292B29292728292A ........ 0x29292A292B282928 ........ 0x2A272A2A26262726 ........ 0x2625272626252626 ........ 0x2823222325212522 ........ 0x21201E1F1C1E201D .#..#... 0x2121232522222323 ........ 0x2825292A25292829 ........ 0x2423282524252423 ........ 0x2522242523252122 ........
0x292B272926272726 ........ 0x2928292B29272827 ........ 0x2524272523202624 $$#$$$$$ 0x2524242623262424 ........ 0x2425262326242623 ........ 0x2725222224252223 ........ 0x2A2C2A2A28292A2B ........ 0x2A2A2B2A2C292A29 ........ 0x2B282B2B27272827 ........ 0x2726282727262727 ........ 0x2924232426222623 ........ 0x22201F201C1F211E .$#.$##. 0x2222242623232424 ........ 0x29262A2B262A292A ........ 0x2524292625262524 ........ 0x2623252624262223 ........
0x2A2C282A27282827 ........ 0x2A292A2C2A282928 ........ 0x2524272523202624 $$$$$$$$ 0x2625252724272525 ..#..... 0x2526272427252724 ........ 0x2826232325262324 ........ 0x2B2D2B2B292A2B2C ........ 0x2B2B2C2B2D2A2B2A ........ 0x2C292C2C28282928 ........ 0x2827292828272828 ........ 0x2A25242527232724 ........ 0x23201F211C1F211F #$$.$$$# 0x2323252724242525 ........ 0x2A272B2C272B2A2B ........ 0x26252A2726272625 ........ 0x2724262725272324 ........
0x2B2D292B28292928 ........ 0x2B2A2B2D2B292A29 ........ 0x2524272523202624 $$$$$$$$ 0x2726252825282626 ..$.#.#. 0x2627282528262825 ........ 0x2927242426272425 ........ 0x2C2E2C2C2A2B2C2D ........ 0x2C2C2D2C2E2B2C2B ........ 0x2D2A2D2D29292A29 ........ 0x29282A2929282929 ........ 0x2B26252628242825 ........ 0x23201F221C1F211F $$$.$$$$ 0x2424262825252626 ........ 0x2B282C2D282C2B2C ........ 0x27262B2827282726 ........ 0x2825272826282425 ........
0x2C2E2A2C292A2A29 ........ 0x2C2B2C2E2C2A2B2A ........ 0x2524272523202624 $$$$$$$$ 0x2827252925292627 ..$.$#$. 0x2728292629272926 ....#... 0x2A28252527282526 ........ 0x2D2F2D2D2B2C2D2E ........ 0x2D2D2E2D2F2C2D2C ........ 0x2E2B2E2E2A2A2B2A ........ 0x2A292B2A2A292A2A ........ 0x2C27262729252926 ........ 0x23201F231C1F211F $$$#$$$$ 0x2525272926262727 ........ 0x2C292D2E292D2C2D ........ 0x28272C2928292827 ........ 0x2926282927292526 ........
0x2D2F2B2D2A2B2B2A ........ 0x2D2C2D2F2D2B2C2B ........ 0x2524272523202624 $$$$$$$$ 0x2928252A25292628 .#$#$$$# 0x28292A2729282A27 .##.$... 0x2B29262628292627 ........ 0x2E302E2E2C2D2E2F ........ 0x2E2E2F2E302D2E2D ........ 0x2F2C2F2F2B2B2C2B ........ 0x2B2A2C2B2B2A2B2B ........ 0x2D2827282A262A27 ...#.... 0x23201F231C1F211F $$$$$$$$ 0x2626282A27272828 ........ 0x2D2A2E2F2A2E2D2E ........ 0x29282D2A292A2928 ........ 0x2A27292A282A2627 ........
0x2E302C2E2B2C2C2B ........ 0x2E2D2E302E2C2D2C ........ 0x2524272523202624 $$$$$$$$ 0x2A28252A25292628 .$$$$$$$ 0x29292A2829292B28 #$$.$#.# 0x2C2A2727292A2728 ........ 0x2F312F2F2D2E2F30 ........ 0x2F2F302F312E2F2E ........ 0x302D30302C2C2D2C ....#... 0x2C2B2D2C2C2B2C2C #.#.#... 0x2E2928282B272B28 ...$...# 0x23201F231C1F211F $$$$$$$$ 0x2727292B28282929 ........ 0x2E2B2F302B2F2E2F ........ 0x2A292E2B2A2B2A29 ........ 0x2B282A2B292B2728 ...#...#
0x2F312D2F2C2D2D2C ........ 0x2F2E2F312F2D2E2D ........ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 #$$$$$$$ 0x29292A2929292C28 $$$#$$#$ 0x2D2B28282A2B2829 .....#.. 0x303230302E2F3031 ..#..... 0x30303130322F302F ........ 0x312E31312C2D2E2D ....$... 0x2C2C2D2D2C2C2D2D $#$.$#.. 0x2F2A29282C282C28 ##.$###$ 0x23201F231C1F211F $$$$$$$$ 0x28282A2C29292A2A ........ 0x2F2C30312C302F30 .....#.. 0x2B2A2F2C2B2C2B2A ...##.#. 0x2C292B2B2A2C2828 ..#$###$
0x30322E302D2E2E2D ........ 0x302F3032302E2F2E ........ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x2E2C29292B2B292A ..#..$.. 0x313330312F303132 ..$..##. 0x3131323133303130 ........ 0x322F32322C2E2F2E ....$... 0x2C2C2D2E2C2C2E2E $$$.$$## 0x2F2A2A282C282C28 $$#$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x29292B2D2A2A2B2B ........ 0x302D31322D303031 #....$.. 0x2C2B302C2B2D2B2B ###$$#$# 0x2D2A2B2B2A2C2828 ##$$$$$$
0x31332F312E2F2F2E ........ 0x31303133312F302F ........ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x2F2D292A2C2B2A2B .#$#.$## 0x3234303230303133 ..$##$$. 0x3232333234313231 ........ 0x333033332C2F302F .#..$##. 0x2C2C2D2F2C2C2E2E $$$#$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2A2A2C2E2B2B2C2C ....#... 0x302E32332E303132 $...#$.. 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x323430322F30302F ..#..... 0x3231323432303130 ........ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x302D292A2D2B2A2B .$$$#$$$ 0x3335303230303134 ..$$$$$# 0x3333343335323332 ........ 0x343034342C2F3030 #$..$$$. 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2B2B2D2F2B2C2D2D ....$#.. 0x302F33342E303233 $.#.$$.. 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x3335303330313130 .#$#.##. 0x3332333533313231 ........ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x312D292A2D2B2A2B #$$$$$$$ 0x3436303230303134 ..$$$$$$ 0x3434353436333433 ........ 0x343035352C2F3031 $$..$$$# 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2C2C2E302B2C2E2E .#..$$## 0x303033352E303334 $#$.$$## 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x3435303331313131 .$$$.$$# 0x3433343634323332 ...#.... 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x312D292A2D2B2A2B $$$$$$$$ 0x3537303230303134 ##$$$$$$ 0x3535363537343534 ....##.. 0x343036362C2F3031 $$.#$$$$ 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2D2C2F312B2C2E2E .$#.$$$$ 0x303033362E303334 $$$#$$$$ 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x3535303332313131 #$$$#$$$ 0x3534353635333433 ##.$.#.# 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x312D292A2D2B2A2B $$$$$$$$ 0x3537303230303134 $$$$$$$$ 0x3636373637343635 ....$$.. 0x343037362C2F3031 $$#$$$$$ 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2E2C2F322B2C2E2E #$$#$$$$ 0x303033362E303334 $$$$$$$$ 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x3535303332313131 $$$$$$$$ 0x3534363636333533 $$#$.$#$ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x312D292A2D2B2A2B $$$$$$$$ 0x3537303230303134 $$$$$$$$ 0x3737383737343736 ....$$.. 0x343037362C2F3031 $$$$$$$$ 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2E2C2F322B2C2E2E $$$$$$$$ 0x303033362E303334 $$$$$$$$ 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x3535303332313131 $$$$$$$$ 0x3534363637333533 $$$$.$$$ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x312D292A2D2B2A2B $$$$$$$$ 0x3537303230303134 $$$$$$$$ 0x3838393837343837 .###$$## 0x343037362C2F3031 $$$$$$$$ 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2E2C2F322B2C2E2E $$$$$$$$ 0x303033362E303334 $$$$$$$$ 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
0x3535303332313131 $$$$$$$$ 0x3534363638333533 $$$$#$$$ 0x2524272523202624 $$$$$$$$ 0x2B28252A25292628 $$$$$$$$ 0x29292A2929292C28 $$$$$$$$ 0x312D292A2D2B2A2B $$$$$$$$ 0x3537303230303134 $$$$$$$$ 0x3938393837343837 #$$$$$$$ 0x343037362C2F3031 $$$$$$$$ 0x2C2C2D2F2C2C2E2E $$$$$$$$ 0x2F2A2A282C282C28 $$$$$$$$ 0x23201F231C1F211F $$$$$$$$ 0x2E2C2F322B2C2E2E $$$$$$$$ 0x303033362E303334 $$$$$$$$ 0x2C2B302C2B2D2B2B $$$$$$$$ 0x2D2A2B2B2A2C2828 $$$$$$$$
Edges
Mc0.Ch0.B0: [ 24 52][ 30 52][ 21 47][ 23 50][ 24 49][ 24 48][ 21 48][ 20 48]
Mc0.Ch0.B1: [ 24 52][ 27 51][ 28 53][ 26 53][ 23 55][ 26 50][ 23 52][ 22 50]
Mc0.Ch1.B0: [ 20 36][ 20 35][ 21 38][ 19 36][ 25 34][ 24 31][ 25 37][ 22 35]
Mc0.Ch1.B1: [ 20 42][ 17 39][ 21 36][ 23 41][ 21 36][ 24 40][ 20 37][ 22 39]
Mc0.Ch2.B0: [ 17 40][ 18 40][ 20 41][ 17 40][ 24 40][ 20 40][ 24 43][ 19 39]
Mc0.Ch2.B1: [ 24 48][ 22 44][ 16 40][ 15 41][ 20 44][ 23 42][ 18 41][ 19 42]
Mc0.Ch3.B0: [ 13 52][ 12 54][ 16 47][ 15 49][ 24 47][ 24 47][ 26 48][ 20 51]
Mc0.Ch3.B1: [ 25 56][ 22 55][ 26 56][ 25 55][ 28 54][ 26 51][ 26 55][ 25 54]
Mc1.Ch0.B0: [ 27 51][ 24 47][ 24 54][ 24 53][ 24 43][ 21 46][ 22 47][ 21 48]
Mc1.Ch0.B1: [ 23 43][ 22 43][ 23 44][ 23 46][ 26 43][ 22 43][ 23 45][ 23 45]
Mc1.Ch1.B0: [ 24 46][ 14 41][ 17 41][ 16 39][ 23 43][ 20 39][ 19 43][ 16 39]
Mc1.Ch1.B1: [ 14 34][ 11 31][ 11 30][ 10 34][ 13 27][ 13 30][ 13 32][ 11 30]
Mc1.Ch2.B0: [ 20 45][ 20 43][ 20 46][ 22 49][ 22 42][ 21 43][ 20 45][ 20 45]
Mc1.Ch2.B1: [ 25 47][ 22 47][ 25 50][ 27 53][ 22 45][ 26 47][ 24 50][ 26 51]
Mc1.Ch3.B0: [ 19 43][ 17 42][ 22 47][ 19 43][ 20 42][ 21 44][ 20 42][ 22 42]
Mc1.Ch3.B1: [ 19 44][ 12 41][ 20 42][ 16 42][ 15 41][ 21 43][ 18 39][ 14 39]
Per Bit Offset
Mc0.Ch0.B0: 11 12 9 10 13 11 10 10
Mc0.Ch0.B1: 11 13 14 11 12 13 12 11
Mc0.Ch1.B0: 3 4 5 2 5 3 5 6
Mc0.Ch1.B1: 8 6 7 8 8 8 7 9
Mc0.Ch2.B0: 7 6 7 8 8 8 10 8
Mc0.Ch2.B1: 11 10 8 8 10 10 10 10
Mc0.Ch3.B0: 5 3 4 4 10 9 9 7
Mc0.Ch3.B1: 13 11 12 12 11 12 13 13
Mc1.Ch0.B0: 10 10 10 10 9 9 9 10
Mc1.Ch0.B1: 8 9 8 10 10 9 9 9
Mc1.Ch1.B0: 8 6 8 6 9 10 7 7
Mc1.Ch1.B1: 4 2 4 4 5 5 4 5
Mc1.Ch2.B0: 13 12 11 12 11 11 11 11
Mc1.Ch2.B1: 9 11 10 11 10 9 10 11
Mc1.Ch3.B0: 8 8 8 7 8 9 8 10
Mc1.Ch3.B1: 8 6 8 5 6 8 9 6
START_RxDqsBitDelay
R Mc0.C0.R1.S0.B0 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S0.B1 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S0.B2 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R1.S0.B3 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S0.B4 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S0.B5 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S0.B6 RxDqsBitDelay: 35 (0x23)
R Mc0.C0.R1.S0.B7 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R1.S1.B0 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B1 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S1.B2 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S1.B3 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S1.B4 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S1.B5 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B6 RxDqsBitDelay: 38 (0x26)
R Mc0.C0.R1.S1.B7 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S2.B0 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S2.B2 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S2.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S2.B4 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S2.B5 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S2.B6 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S2.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S3.B0 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S3.B1 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S3.B2 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S3.B3 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S3.B4 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S3.B5 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S3.B6 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S3.B7 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S4.B0 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S4.B1 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S4.B2 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S4.B3 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S4.B4 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S4.B5 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S4.B6 RxDqsBitDelay: 34 (0x22)
R Mc0.C0.R1.S4.B7 RxDqsBitDelay: 29 (0x1D)
R Mc0.C0.R1.S5.B0 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S5.B1 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S5.B2 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S5.B3 RxDqsBitDelay: 28 (0x1C)
R Mc0.C0.R1.S5.B4 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S5.B5 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S5.B6 RxDqsBitDelay: 30 (0x1E)
R Mc0.C0.R1.S5.B7 RxDqsBitDelay: 31 (0x1F)
R Mc0.C0.R1.S6.B0 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S6.B1 RxDqsBitDelay: 33 (0x21)
R Mc0.C0.R1.S6.B2 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S6.B3 RxDqsBitDelay: 32 (0x20)
R Mc0.C0.R1.S6.B4 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S6.B5 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S6.B6 RxDqsBitDelay: 37 (0x25)
R Mc0.C0.R1.S6.B7 RxDqsBitDelay: 36 (0x24)
R Mc0.C0.R1.S7.B0 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B1 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B2 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B3 RxDqsBitDelay: 40 (0x28)
R Mc0.C0.R1.S7.B4 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B5 RxDqsBitDelay: 39 (0x27)
R Mc0.C0.R1.S7.B6 RxDqsBitDelay: 41 (0x29)
R Mc0.C0.R1.S7.B7 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R1.S0.B0 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B1 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S0.B2 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B3 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S0.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S0.B5 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S0.B6 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S0.B7 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S1.B0 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S1.B1 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S1.B2 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B3 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S1.B4 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S1.B5 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S1.B6 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S1.B7 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S2.B0 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S2.B1 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S2.B2 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S2.B3 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S2.B4 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S2.B5 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S2.B6 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S2.B7 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S3.B0 RxDqsBitDelay: 24 (0x18)
R Mc1.C1.R1.S3.B1 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S3.B2 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S3.B3 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S3.B4 RxDqsBitDelay: 20 (0x14)
R Mc1.C1.R1.S3.B5 RxDqsBitDelay: 22 (0x16)
R Mc1.C1.R1.S3.B6 RxDqsBitDelay: 23 (0x17)
R Mc1.C1.R1.S3.B7 RxDqsBitDelay: 21 (0x15)
R Mc1.C1.R1.S4.B0 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S4.B1 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B2 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S4.B3 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S4.B4 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B5 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S4.B6 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S4.B7 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S5.B0 RxDqsBitDelay: 36 (0x24)
R Mc1.C1.R1.S5.B1 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S5.B2 RxDqsBitDelay: 38 (0x26)
R Mc1.C1.R1.S5.B3 RxDqsBitDelay: 40 (0x28)
R Mc1.C1.R1.S5.B4 RxDqsBitDelay: 34 (0x22)
R Mc1.C1.R1.S5.B5 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S5.B6 RxDqsBitDelay: 37 (0x25)
R Mc1.C1.R1.S5.B7 RxDqsBitDelay: 39 (0x27)
R Mc1.C1.R1.S6.B0 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B1 RxDqsBitDelay: 30 (0x1E)
R Mc1.C1.R1.S6.B2 RxDqsBitDelay: 35 (0x23)
R Mc1.C1.R1.S6.B3 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B4 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B5 RxDqsBitDelay: 33 (0x21)
R Mc1.C1.R1.S6.B6 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S6.B7 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B0 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B1 RxDqsBitDelay: 27 (0x1B)
R Mc1.C1.R1.S7.B2 RxDqsBitDelay: 31 (0x1F)
R Mc1.C1.R1.S7.B3 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S7.B4 RxDqsBitDelay: 28 (0x1C)
R Mc1.C1.R1.S7.B5 RxDqsBitDelay: 32 (0x20)
R Mc1.C1.R1.S7.B6 RxDqsBitDelay: 29 (0x1D)
R Mc1.C1.R1.S7.B7 RxDqsBitDelay: 27 (0x1B)
STOP_RxDqsBitDelay
Calling with EnRxDutyCycle = 1, EnPerBit = 0, ResetPerBit = 0 En2D = 0
Parameter = 1 (RdT)
Optimization is per rank
LstSavd Margins 190 200 190 190 130 130 170 170 170 180 180 180 110 120 180 190 200 200 200 210 190 190 180 180 180 190 180 180 200 210 190 190 Rank: 0
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 200 230 190 150 130 200 170 220 180 210 180 140 120 210 190 240 200 240 210 240 190 220 180 210 190 220 180 250 210 220 190
Weighted Center -1 -2 -1 -2 -2 -2 -1 -1 -2 -2 -3 -2 -1 -2 -2 -2
Final Center -16 -15 -9 -13 -14 -13 -7 -14 -17 -16 -15 -14 -14 -14 -18 -17
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 220 200 220 190 150 130 190 170 220 180 200 180 130 120 210 190 220 200 220 210 210 190 190 180 200 190 210 180 240 210 220 190
Weighted Center -1 -2 -1 -1 -2 -1 -1 -1 -1 -1 -1 -1 -1 -2 -2 -2
Final Center -19 -19 -12 -16 -18 -17 -13 -20 -19 -20 -18 -17 -18 -18 -21 -19
LstSavd Margins 190 190 180 190 140 140 180 180 180 180 180 180 110 110 180 190 190 200 200 210 190 200 170 170 190 200 190 200 200 210 170 170 Rank: 1
Strobe: 0
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 240 190 230 190 160 140 200 180 230 180 230 180 160 110 230 190 240 200 250 210 230 200 220 170 220 200 210 200 240 210 230 170
Weighted Center -3 -2 -1 -1 -3 -3 -3 -2 -2 -2 -2 -3 -1 -1 -2 -3
Final Center -17 -17 -9 -15 -15 -16 -7 -16 -16 -17 -16 -14 -18 -17 -17 -14
Strobe: 1
Mc 0 1
Channel 0 1 2 30 1 2 3
Byte 0 1 0 1 0 1 0 10 1 0 1 0 1 0 1
Vref = 0: 230 190 220 190 140 140 210 180 220 180 210 180 150 110 220 190 220 200 230 210 220 200 200 170 220 200 210 200 240 210 220 170
Weighted Center -2 -2 0 -2 -2 -2 -2 -2 -1 -1 -1 -2 -1 -1 -2 -3
Final Center -19 -19 -12 -18 -18 -18 -11 -19 -19 -20 -19 -17 -19 -19 -21 -18
MRC task Read Timing Centering 2D After Power Training -- SUCCEEDED, Status = 0h.
Post Code: DD47h
MRC task -- Receive Enable Timing Centering -- Started.
Rank = 0
Mc 0 1
Channel 0 1 2 3 0 1 2 3
Byte 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Error Count
RcvEnDelay
-31 # # # # # # # # # # # # # # # # 0x541D5_0 0x5D207_0 0x5D30C_0 0x7D22A_0 0x75504_0 0x5D2EA_0 0x5D512_0 0x5D1FB_0
-29 # # # # # # # # # . # # # # # # 0x50913_0 0x5F353_0 0x512C1_0 0x7BC2D_0 0x5D0A5_0 0x5D172_0 0x5D511_0 0x5BA66_0
-27 # # # # # # # . . . # # # # . # 0x4D0AC_0 0x50652_0 0xF673_0 0x5DAAD_0 0x0_0 0x3B60E_0 0x5D44D_0 0x55DB_0
-25 # # . . . # . . . . # # # # . # 0x36DB5_0 0x0_0 0x74D_0 0x0_0 0x0_0 0x2093_0 0x5B53B_0 0x1A_0
-23 # # . . . . . . . . . . # # . . 0x79CA_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x3A5D4_0 0x0_0
-21 . # . . . . . . . . . . . # . . 0xDBA9_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x4AF6E_0 0x0_0
-19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
-1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
1 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
3 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
5 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
7 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
9 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
11 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
13 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
15 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
17 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
19 . . . . . . . . . . . . . . . . 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
21 . # . . . . . . . . . . . . . . 0x4_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0
23 # # . . . . . . . . . . # # . . 0x1163_0 0x0_0 0x0_0 0x0_0 0x0_0 0x0_0 0xA58_0 0x0_0
25 # # # . . # . . . . # . # # . . 0xF6F78_0 0x1_0 0x1_0 0x0_0 0x0_0 0x4_0 0x32927_0 0x0_0
27 # # # # . # # # . . # # # # . # 0x1CD3A3_0 0xC13_0 0x1192_0 0x10_0 0x0_0 0x2A5C_0 0x1C3B5A_0 0x133_0
29 # # # # # # # # # # # # # # # # 0x198E65_0 0x21CDD_0 0x12595E_0 0x1FFC_0 0x88A_0 0x141683_0 0x1C7CD5_0 0x19548_0
31 # # # # # # # # # # # # # # # # 0x198A38_0 0x1AD2D1_0 0x1846AE_0 0xC4006_0 0xC0E2_0 0x1BAE54_0 0x1A4AC4_0 0x186770_0
Mc0.C0.R0: Left Right Width Center
B0: -21 21 42 0
B1: -19 19 38 0
Mc0.C1.R0: Left Right Width Center
B0: -25 23 48 -1
B1: -25 25 50 0
Mc0.C2.R0: Left Right Width Center
B0: -25 27 52 1
B1: -23 23 46 0
Mc0.C3.R0: Left Right Width Center
B0: -25 25 50 0
B1: -27 25 52 -1
Mc1.C0.R0: Left Right Width Center
B0: -27 27 54 0
B1: -29 27 56 -1
Mc1.C1.R0: Left Right Width Center
B0: -23 23 46 0
B1: -23 25 48 1
Mc1.C2.R0: Left Right Width Center
B0: -21 21 42 0
B1: -19 21 40 1
Mc1.C3.R0: Left Right Width Center
B0: -27 27 54 0
B1: -23 25 48 1
MRC task Receive Enable Timing Centering -- SUCCEEDED, Status = 0h.
Post Code: DD7Ah
MRC task -- Rank Margin Tool for Even Odd UI Errors -- Started.
Rank Margin Testing for EVEN UI errors: DQ LC = 17, Cmd LC = 17
START_RMT_EVEN
Params: RxDqsDelay TxDqDelay
Mc0.C0.R0: -21 21 -25 25
Mc0.C0.R1: -21 21 -23 25
Mc0.C1.R0: -15 14 -20 19
Mc0.C1.R1: -15 14 -19 21
Mc0.C2.R0: -20 19 -24 25
Mc0.C2.R1: -20 20 -24 25
Mc0.C3.R0: -14 13 -19 20
Mc0.C3.R1: -13 13 -19 21
Mc1.C0.R0: -23 21 -23 26
Mc1.C0.R1: -23 21 -25 25
Mc1.C1.R0: -21 19 -24 24
Mc1.C1.R1: -19 19 -24 24
Mc1.C2.R0: -20 20 -26 25
Mc1.C2.R1: -21 21 -25 24
Mc1.C3.R0: -20 21 -24 24
Mc1.C3.R1: -20 20 -23 24
STOP_RMT
Rank Margin Testing for ODD UI errors: DQ LC = 17, Cmd LC = 17
START_RMT_ODD
Params: RxDqsDelay TxDqDelay
Mc0.C0.R0: -19 21 -23 25
Mc0.C0.R1: -21 21 -23 25
Mc0.C1.R0: -15 14 -19 19
Mc0.C1.R1: -15 14 -19 20
Mc0.C2.R0: -19 19 -24 25
Mc0.C2.R1: -19 20 -24 25
Mc0.C3.R0: -13 13 -19 21
Mc0.C3.R1: -13 13 -18 21
Mc1.C0.R0: -22 21 -23 25
Mc1.C0.R1: -21 21 -24 25
Mc1.C1.R0: -18 19 -23 24
Mc1.C1.R1: -18 19 -23 24
Mc1.C2.R0: -20 20 -25 24
Mc1.C2.R1: -20 21 -24 25
Mc1.C3.R0: -20 21 -24 25
Mc1.C3.R1: -19 20 -23 24
STOP_RMT
MRC task Rank Margin Tool for Even Odd UI Errors -- SUCCEEDED, Status = 0h.
Post Code: DD44h
MRC task -- Rank Margin Tool -- Started.
Rank Margin Testing for Composite UI errors: DQ LC = 17, Cmd LC = 17
START_RMT
Params: RecEnDelay TxDqsDelay RxDqsDelay TxDqDelay RxVref TxVref ClkGrpPi CmdVref
Mc0.C0.R0: -80 84 -31 31 -20 21 -24 24 -41 37 -40 40 -50 49 -34 36
Mc0.C0.R1: -80 80 -31 31 -20 21 -22 24 -39 42 -40 40 -48 49 -36 36
Mc0.C1.R0: -100 100 -31 31 -15 14 -19 20 -42 35 -40 40 -50 49 -40 40
Mc0.C1.R1: -100 100 -31 31 -15 14 -19 20 -42 35 -40 40 -51 49 -40 40
Mc0.C2.R0: -88 100 -31 31 -19 19 -23 25 -41 41 -40 40 -56 53 -40 40
Mc0.C2.R1: -92 96 -31 31 -19 20 -24 24 -41 40 -40 40 -58 53 -40 40
Mc0.C3.R0: -104 104 -31 31 -13 13 -19 20 -34 27 -40 40 -31 46 -31 33
Mc0.C3.R1: -108 104 -31 31 -13 13 -18 21 -37 33 -40 40 -63 46 -40 33
Mc1.C0.R0: -112 112 -31 31 -22 21 -23 25 -46 45 -40 40 -54 55 -40 40
Mc1.C0.R1: -108 112 -31 31 -21 21 -24 25 -47 43 -40 40 -54 55 -40 40
Mc1.C1.R0: -92 96 -31 31 -18 19 -23 24 -36 35 -40 40 -27 47 -34 36
Mc1.C1.R1: -92 96 -31 31 -18 19 -23 24 -37 33 -40 40 -55 45 -36 36
Mc1.C2.R0: -80 80 -31 31 -19 20 -25 25 -34 34 -40 40 -57 53 -37 36
Mc1.C2.R1: -80 80 -31 31 -20 21 -24 24 -35 36 -40 40 -57 53 -36 36
Mc1.C3.R0: -104 100 -31 31 -20 21 -23 24 -46 40 -40 40 -27 41 -40 40
Mc1.C3.R1: -100 100 -31 31 -19 20 -22 23 -45 43 -40 40 -27 40 -40 40
STOP_RMT
MRC task Rank Margin Tool -- SUCCEEDED, Status = 0h.
Post Code: DD49h
MRC task -- PowerSavingMeter update -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MRC task PowerSavingMeter update -- SUCCEEDED, Status = 0h.
Post Code: DD48h
MRC task -- SAGV Finalization -- Started.
Mc0.C0.R0.MR[3] = 0x0030
Mc0.C0.R0.MR[11] = 0x0045
Mc0.C0.R0.MR[12] = 0x004E
Mc0.C0.R0.MR[14] = 0x004A
Mc0.C0.R0.MR[1] = 0x004D
Mc0.C0.R0.MR[2] = 0x0064
Mc0.C0.R0.MR[22] = 0x0013
Mc0.C0.R0.MR[23] = 0x0004
Mc0.C0.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9D2E
Mc0.C0: LPDDR_MR_CONTENT = 0x0413F84E4530644D
Mc0.C0.R1.MR[3] = 0x0030
Mc0.C0.R1.MR[11] = 0x0045
Mc0.C0.R1.MR[12] = 0x004E
Mc0.C0.R1.MR[14] = 0x004A
Mc0.C0.R1.MR[1] = 0x004D
Mc0.C0.R1.MR[2] = 0x0064
Mc0.C0.R1.MR[22] = 0x0033
Mc0.C0.R1.MR[23] = 0x0004
Mc0.C0.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9D2E
Mc0.C1.R0.MR[3] = 0x0030
Mc0.C1.R0.MR[11] = 0x0045
Mc0.C1.R0.MR[12] = 0x004A
Mc0.C1.R0.MR[14] = 0x004A
Mc0.C1.R0.MR[1] = 0x004D
Mc0.C1.R0.MR[2] = 0x0064
Mc0.C1.R0.MR[22] = 0x0013
Mc0.C1.R0.MR[23] = 0x0004
Mc0.C1.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc0.C1.R1.MR[3] = 0x0030
Mc0.C1.R1.MR[11] = 0x0045
Mc0.C1.R1.MR[12] = 0x004A
Mc0.C1.R1.MR[14] = 0x004A
Mc0.C1.R1.MR[1] = 0x004D
Mc0.C1.R1.MR[2] = 0x0064
Mc0.C1.R1.MR[22] = 0x0033
Mc0.C1.R1.MR[23] = 0x0004
Mc0.C1.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc0.C2.R0.MR[3] = 0x0030
Mc0.C2.R0.MR[11] = 0x0045
Mc0.C2.R0.MR[12] = 0x004A
Mc0.C2.R0.MR[14] = 0x004A
Mc0.C2.R0.MR[1] = 0x004D
Mc0.C2.R0.MR[2] = 0x0064
Mc0.C2.R0.MR[22] = 0x0013
Mc0.C2.R0.MR[23] = 0x0004
Mc0.C2.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc0.C2: LPDDR_MR_CONTENT = 0x0413F84A4530644D
Mc0.C2.R1.MR[3] = 0x0030
Mc0.C2.R1.MR[11] = 0x0045
Mc0.C2.R1.MR[12] = 0x004A
Mc0.C2.R1.MR[14] = 0x004A
Mc0.C2.R1.MR[1] = 0x004D
Mc0.C2.R1.MR[2] = 0x0064
Mc0.C2.R1.MR[22] = 0x0033
Mc0.C2.R1.MR[23] = 0x0004
Mc0.C2.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc0.C3.R0.MR[3] = 0x0030
Mc0.C3.R0.MR[11] = 0x0045
Mc0.C3.R0.MR[12] = 0x0051
Mc0.C3.R0.MR[14] = 0x004A
Mc0.C3.R0.MR[1] = 0x004D
Mc0.C3.R0.MR[2] = 0x0064
Mc0.C3.R0.MR[22] = 0x0013
Mc0.C3.R0.MR[23] = 0x0004
Mc0.C3.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CAA32E
Mc0.C3.R1.MR[3] = 0x0030
Mc0.C3.R1.MR[11] = 0x0045
Mc0.C3.R1.MR[12] = 0x0051
Mc0.C3.R1.MR[14] = 0x004A
Mc0.C3.R1.MR[1] = 0x004D
Mc0.C3.R1.MR[2] = 0x0064
Mc0.C3.R1.MR[22] = 0x0033
Mc0.C3.R1.MR[23] = 0x0004
Mc0.C3.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CAA32E
Mc1.C0.R0.MR[3] = 0x0030
Mc1.C0.R0.MR[11] = 0x0045
Mc1.C0.R0.MR[12] = 0x004A
Mc1.C0.R0.MR[14] = 0x004A
Mc1.C0.R0.MR[1] = 0x004D
Mc1.C0.R0.MR[2] = 0x0064
Mc1.C0.R0.MR[22] = 0x0013
Mc1.C0.R0.MR[23] = 0x0004
Mc1.C0.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc1.C0: LPDDR_MR_CONTENT = 0x0413F84A4530644D
Mc1.C0.R1.MR[3] = 0x0030
Mc1.C0.R1.MR[11] = 0x0045
Mc1.C0.R1.MR[12] = 0x004A
Mc1.C0.R1.MR[14] = 0x004A
Mc1.C0.R1.MR[1] = 0x004D
Mc1.C0.R1.MR[2] = 0x0064
Mc1.C0.R1.MR[22] = 0x0033
Mc1.C0.R1.MR[23] = 0x0004
Mc1.C0.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
Mc1.C1.R0.MR[3] = 0x0030
Mc1.C1.R0.MR[11] = 0x0045
Mc1.C1.R0.MR[12] = 0x004E
Mc1.C1.R0.MR[14] = 0x004A
Mc1.C1.R0.MR[1] = 0x004D
Mc1.C1.R0.MR[2] = 0x0064
Mc1.C1.R0.MR[22] = 0x0013
Mc1.C1.R0.MR[23] = 0x0004
Mc1.C1.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9D2E
Mc1.C1.R1.MR[3] = 0x0030
Mc1.C1.R1.MR[11] = 0x0045
Mc1.C1.R1.MR[12] = 0x004E
Mc1.C1.R1.MR[14] = 0x004A
Mc1.C1.R1.MR[1] = 0x004D
Mc1.C1.R1.MR[2] = 0x0064
Mc1.C1.R1.MR[22] = 0x0033
Mc1.C1.R1.MR[23] = 0x0004
Mc1.C1.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9D2E
Mc1.C2.R0.MR[3] = 0x0030
Mc1.C2.R0.MR[11] = 0x0045
Mc1.C2.R0.MR[12] = 0x004E
Mc1.C2.R0.MR[14] = 0x004A
Mc1.C2.R0.MR[1] = 0x004D
Mc1.C2.R0.MR[2] = 0x0064
Mc1.C2.R0.MR[22] = 0x0013
Mc1.C2.R0.MR[23] = 0x0004
Mc1.C2.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA9D2E
Mc1.C2: LPDDR_MR_CONTENT = 0x0413F84E4530644D
Mc1.C2.R1.MR[3] = 0x0030
Mc1.C2.R1.MR[11] = 0x0045
Mc1.C2.R1.MR[12] = 0x004E
Mc1.C2.R1.MR[14] = 0x004A
Mc1.C2.R1.MR[1] = 0x004D
Mc1.C2.R1.MR[2] = 0x0064
Mc1.C2.R1.MR[22] = 0x0033
Mc1.C2.R1.MR[23] = 0x0004
Mc1.C2.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA9D2E
Mc1.C3.R0.MR[3] = 0x0030
Mc1.C3.R0.MR[11] = 0x0045
Mc1.C3.R0.MR[12] = 0x004A
Mc1.C3.R0.MR[14] = 0x004A
Mc1.C3.R0.MR[1] = 0x004D
Mc1.C3.R0.MR[2] = 0x0064
Mc1.C3.R0.MR[22] = 0x0013
Mc1.C3.R0.MR[23] = 0x0004
Mc1.C3.R0: LPDDR4_DISCRETE_MR_VALUES = 0x0000000009CA952E
Mc1.C3.R1.MR[3] = 0x0030
Mc1.C3.R1.MR[11] = 0x0045
Mc1.C3.R1.MR[12] = 0x004A
Mc1.C3.R1.MR[14] = 0x004A
Mc1.C3.R1.MR[1] = 0x004D
Mc1.C3.R1.MR[2] = 0x0064
Mc1.C3.R1.MR[22] = 0x0033
Mc1.C3.R1.MR[23] = 0x0004
Mc1.C3.R1: LPDDR4_DISCRETE_MR_VALUES = 0x0000000019CA952E
MRC task SAGV Finalization -- SUCCEEDED, Status = 0h.
Post Code: DD51h
MRC task -- Row Hammer Prevention -- Started.
MRC task Row Hammer Prevention -- SUCCEEDED, Status = 0h.
Post Code: DD50h
MRC task -- MRC activate -- Started.
DIMM ODT summary:
Ron OdtDQ OdtCA
---------------------------------------
Mc0C0D0: 40 48 60
---------------------------------------
Mc0C1D0: 40 48 60
---------------------------------------
Mc0C2D0: 40 48 60
---------------------------------------
Mc0C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 0 Channel = 0 Read ODT = 79
CPU Summary: MC = 0 Channel = 1 Read ODT = 79
CPU Summary: MC = 0 Channel = 2 Read ODT = 79
CPU Summary: MC = 0 Channel = 3 Read ODT = 79
Mc1C0D0: 40 48 60
---------------------------------------
Mc1C1D0: 40 48 60
---------------------------------------
Mc1C2D0: 40 48 60
---------------------------------------
Mc1C3D0: 40 48 60
---------------------------------------
CPU Summary: MC = 1 Channel = 0 Read ODT = 79
CPU Summary: MC = 1 Channel = 1 Read ODT = 79
CPU Summary: MC = 1 Channel = 2 Read ODT = 79
CPU Summary: MC = 1 Channel = 3 Read ODT = 79
MC0_PM_PDWN_CONFIG: 0x1000400h
MC1_PM_PDWN_CONFIG: 0x1000400h
MrcIssueMrr on mc 0 ch 0 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 0 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 0 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 0 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 1 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 1 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 1 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 1 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 2 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 2 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 2 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 2 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 3 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 3 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 0 ch 3 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 0 ch 3 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 0 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 0 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 0 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 0 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 1 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 1 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 1 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 1 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 2 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 2 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 2 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 2 rank 1: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 3 rank 0: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 3 rank 0: MR8
Device[0]= 0x18 - x32
MrcIssueMrr on mc 1 ch 3 rank 1: MR5
Device[0]= 0xFF Micron
MrcIssueMrr on mc 1 ch 3 rank 1: MR8
Device[0]= 0x18 - x32
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch3
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch1
GetSet called with Ch of 1/3 when LPDDR, Group GsmMccCmdTriStateDisTrain(428), Ch3
UpdateSampOdtTiming: GuardBand = 10
W Mc0.C0.S0 McOdtDelay: 0
Warning:Mc0.C0.S0 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S0 McOdtDuration: 15 (0xF)
W Mc0.C0.S0 DqsOdtDelay: 0
Warning:Mc0.C0.S0 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S0 DqsOdtDuration: 7
W Mc0.C0.S0 SenseAmpDelay: 0
Warning:Mc0.C0.S0 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S0 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S1 McOdtDelay: 0
Warning:Mc0.C0.S1 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S1 McOdtDuration: 15 (0xF)
W Mc0.C0.S1 DqsOdtDelay: 0
Warning:Mc0.C0.S1 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S1 DqsOdtDuration: 7
W Mc0.C0.S1 SenseAmpDelay: 0
Warning:Mc0.C0.S1 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S1 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S2 McOdtDelay: 0
Warning:Mc0.C0.S2 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S2 McOdtDuration: 15 (0xF)
W Mc0.C0.S2 DqsOdtDelay: 0
Warning:Mc0.C0.S2 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S2 DqsOdtDuration: 7
W Mc0.C0.S2 SenseAmpDelay: 0
Warning:Mc0.C0.S2 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S2 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S3 McOdtDelay: 0
Warning:Mc0.C0.S3 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S3 McOdtDuration: 15 (0xF)
W Mc0.C0.S3 DqsOdtDelay: 0
Warning:Mc0.C0.S3 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S3 DqsOdtDuration: 7
W Mc0.C0.S3 SenseAmpDelay: 0
Warning:Mc0.C0.S3 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S3 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S4 McOdtDelay: 0
Warning:Mc0.C0.S4 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S4 McOdtDuration: 15 (0xF)
W Mc0.C0.S4 DqsOdtDelay: 0
Warning:Mc0.C0.S4 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S4 DqsOdtDuration: 7
W Mc0.C0.S4 SenseAmpDelay: 0
Warning:Mc0.C0.S4 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S4 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S5 McOdtDelay: 0
Warning:Mc0.C0.S5 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S5 McOdtDuration: 15 (0xF)
W Mc0.C0.S5 DqsOdtDelay: 0
Warning:Mc0.C0.S5 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S5 DqsOdtDuration: 7
W Mc0.C0.S5 SenseAmpDelay: 0
Warning:Mc0.C0.S5 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S5 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S6 McOdtDelay: 0
Warning:Mc0.C0.S6 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S6 McOdtDuration: 15 (0xF)
W Mc0.C0.S6 DqsOdtDelay: 0
Warning:Mc0.C0.S6 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S6 DqsOdtDuration: 7
W Mc0.C0.S6 SenseAmpDelay: 0
Warning:Mc0.C0.S6 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S6 SenseAmpDuration: 15 (0xF)
W Mc0.C0.S7 McOdtDelay: 0
Warning:Mc0.C0.S7 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S7 McOdtDuration: 15 (0xF)
W Mc0.C0.S7 DqsOdtDelay: 0
Warning:Mc0.C0.S7 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc0.C0.S7 DqsOdtDuration: 7
W Mc0.C0.S7 SenseAmpDelay: 0
Warning:Mc0.C0.S7 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc0.C0.S7 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S0 McOdtDelay: 0
Warning:Mc1.C1.S0 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S0 McOdtDuration: 15 (0xF)
W Mc1.C1.S0 DqsOdtDelay: 0
Warning:Mc1.C1.S0 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S0 DqsOdtDuration: 7
W Mc1.C1.S0 SenseAmpDelay: 0
Warning:Mc1.C1.S0 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S0 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S1 McOdtDelay: 0
Warning:Mc1.C1.S1 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S1 McOdtDuration: 15 (0xF)
W Mc1.C1.S1 DqsOdtDelay: 0
Warning:Mc1.C1.S1 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S1 DqsOdtDuration: 7
W Mc1.C1.S1 SenseAmpDelay: 0
Warning:Mc1.C1.S1 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S1 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S2 McOdtDelay: 0
Warning:Mc1.C1.S2 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S2 McOdtDuration: 15 (0xF)
W Mc1.C1.S2 DqsOdtDelay: 0
Warning:Mc1.C1.S2 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S2 DqsOdtDuration: 7
W Mc1.C1.S2 SenseAmpDelay: 0
Warning:Mc1.C1.S2 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S2 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S3 McOdtDelay: 0
Warning:Mc1.C1.S3 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S3 McOdtDuration: 15 (0xF)
W Mc1.C1.S3 DqsOdtDelay: 0
Warning:Mc1.C1.S3 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S3 DqsOdtDuration: 7
W Mc1.C1.S3 SenseAmpDelay: 0
Warning:Mc1.C1.S3 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S3 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S4 McOdtDelay: 0
Warning:Mc1.C1.S4 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S4 McOdtDuration: 15 (0xF)
W Mc1.C1.S4 DqsOdtDelay: 0
Warning:Mc1.C1.S4 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S4 DqsOdtDuration: 7
W Mc1.C1.S4 SenseAmpDelay: 0
Warning:Mc1.C1.S4 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S4 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S5 McOdtDelay: 0
Warning:Mc1.C1.S5 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S5 McOdtDuration: 15 (0xF)
W Mc1.C1.S5 DqsOdtDelay: 0
Warning:Mc1.C1.S5 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S5 DqsOdtDuration: 7
W Mc1.C1.S5 SenseAmpDelay: 0
Warning:Mc1.C1.S5 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S5 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S6 McOdtDelay: 0
Warning:Mc1.C1.S6 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S6 McOdtDuration: 15 (0xF)
W Mc1.C1.S6 DqsOdtDelay: 0
Warning:Mc1.C1.S6 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S6 DqsOdtDuration: 7
W Mc1.C1.S6 SenseAmpDelay: 0
Warning:Mc1.C1.S6 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S6 SenseAmpDuration: 15 (0xF)
W Mc1.C1.S7 McOdtDelay: 0
Warning:Mc1.C1.S7 McOdtDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S7 McOdtDuration: 15 (0xF)
W Mc1.C1.S7 DqsOdtDelay: 0
Warning:Mc1.C1.S7 DqsOdtDuration value 38 is out of range [0:7]. Clamping
W Mc1.C1.S7 DqsOdtDuration: 7
W Mc1.C1.S7 SenseAmpDelay: 0
Warning:Mc1.C1.S7 SenseAmpDuration value 19 is out of range [0:15]. Clamping
W Mc1.C1.S7 SenseAmpDuration: 15 (0xF)
VccDll Bypass!
MRC task MRC activate -- SUCCEEDED, Status = 0h.
Post Code: DD77h
MRC task -- MRC In-band ECC -- Started.
MRC task MRC In-band ECC -- SUCCEEDED, Status = 0h.
Post Code: DD5Ch
MRC task -- MRC Memory Scrubbing -- Started.
MRC task MRC Memory Scrubbing -- SUCCEEDED, Status = 0h.
Post Code: DD42h
MRC task -- Save MC Values -- Started.
SaveDataCommon RegCnt : 0036, TotalRegCnt : 0036,
Controller : 0
SaveDataCommonPerMc RegCnt : 0025, TotalRegCnt : 0061
SaveDataCommonPerCh RegCnt : 0096, TotalRegCnt : 0157
SaveDataCommonPerByte RegCnt : 0008, TotalRegCnt : 0165
Controller : 1
SaveDataCommonPerMc RegCnt : 0025, TotalRegCnt : 0190
SaveDataCommonPerCh RegCnt : 0096, TotalRegCnt : 0286
SaveDataCommonPerByte RegCnt : 0008, TotalRegCnt : 0294
SaveMCValues: Common section: saved 1308 bytes
SaveDataSaGv RegCnt : 0207, TotalRegCnt : 0207
Controller : 0
SaveDataSaGvMc RegCnt : 0182, TotalRegCnt : 0389
Controller : 1
SaveDataSaGvMc RegCnt : 0182, TotalRegCnt : 0571
SaveDataSaGvPerByte RegCnt : 0584, TotalRegCnt : 1155
SaveDataSaGvPerByte RegCnt : 0584, TotalRegCnt : 1739
SaveDataSaGvCcc RegCnt : 0160, TotalRegCnt : 1899
SAGV section: saved 8092 bytes
Saved data CRC = 55092B60h
MRC task Save MC Values -- SUCCEEDED, Status = 0h.
Post Code: DD71h
MRC task -- Normal Operation -- Started.
CPGC Mode Unlocked
MRC task Normal Operation -- SUCCEEDED, Status = 0h.
Post Code: DD72h
MRC task -- Configure Thermal values -- Started.
Configuring Thermal Controls
PM_SREF_CONFIG 5060h: 10200h
PM_SREF_CONFIG 15060h: 10200h
DDR_PTM_CTL 5880h: 40h
MRC task Configure Thermal values -- SUCCEEDED, Status = 0h.
Post Code: DD61h
MRC task -- MRC Energy Performance Gain -- Started.
MRC task MRC Energy Performance Gain -- SUCCEEDED, Status = 0h.
Post Code: DD5Ah
MRC task -- MRC SA GV Switch -- Started.
Waiting for SAGV 3 point save acknowledge
MRC task MRC SA GV Switch -- SUCCEEDED, Status = 0h.
Post Code: DD60h
MRC task -- TXT Memory alias check -- Started.
TXTPEI::New Alias Check Begin
TXTPEI::New Alias Check End
MRC task TXT Memory alias check -- SUCCEEDED, Status = 0h.
Post Code: DD5Dh
MRC task -- MRC done -- Started.
MrcSetLockPrmrr: 0xFFE3C511
PRMRR size is zero, only Locking PRMRR MASK MSR
MrcTmeInit: 0xFFE37302
Total Memory Encryption (TME) Initialization
TME supports AES-XTS encryption policy
TME is disabled. Skipping TME activation.
TME: Initialize MSR_TME_ACTIVATE
TmeEnable = 0x0
KeySelect = 0x0
SaveKey = 0x0
TmePolicy = 0x0
MSR_TME_ACTIVATE was initialized and locked: 0000000000000001
SetIaGtImrExclusionLock Enter
SetIaGtImrExclusionLock End
Memory map registers are locked
Waiting for mc_init_done Acknowledge
MRC task MRC done -- SUCCEEDED, Status = 0h.
Lowest StackAddr: 0xFEF16888 Top StackAddr: 0xFEF3E790 Depth: 163592
Returned From MrcStartMemoryConfiguration(). MrcStatus = 00000000h
Normal mode memory test started.
Normal mode memory test passed.
ME UMA Size requested: 64 MB
Calling MeConfigDidReg
POSTCODE=<0000DE01> - ME-BIOS: DID Entry.
ME status: 0x80000015
Entered ME DRAM Init Done procedure.
ME Data HOB installed
[HECI1] MeMode 0 (Hfsts1: 80000015)
InitStat: 0
Install PPI: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87
Notify: PPI Guid: D497B143-F3EF-4192-A8C5-5EF6CD6E4C87, Peim notify entry point: FFE35F70
PchTraceHubDisable() disable Trace Hub device via PSF
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000008, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
POSTCODE=<0000DB50>
PchTraceHubDisable() Power gate Trace Hub device via PMC
PmcSendCommand(): IPC_COMMAND=0xA4, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
PchTraceHubDisable() Locking HSWPGCR1
Sending DID as MKHI message
HECI1 Hfsts1 = 80000015, Hfsts4 = 4000
[HECI1] Send msg: 80140007
00: F0 01 00 00 00 00 00 77 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI1] Got msg Success: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
HeciSend DRAM Init Done successful. Response:
Pci2Priv Base Low = 0x00000000
Pci2Priv Base High = 0x00000000
Flags = 0x00
BIOS Action = 0x04
ME DRAM Init Done ACK received.
HFS read after DID ACK: 80000015
BiosAction = 4
BIOS continues to POST.
POSTCODE=<0000DE21> - ME-BIOS: DID Exit - Success.
CSE IMR Base Low = 0x77000000
CSE IMR Base High = 0x00000000
MeDramInitDone Complete.
BuildMemoryS3DataHob.
MemoryS3DataHob Base : FEF1E3E4
MemoryS3DataHob Size : FAA7
BuildMemoryInfoDataHob.
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 0 Dimm 0 is : 0x2C00
Module Part Number of Channel 0 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 1 Dimm 0 is : 0x2C00
Module Part Number of Channel 1 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 2 Dimm 0 is : 0x2C00
Module Part Number of Channel 2 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
Manufacturer Id of Channel 3 Dimm 0 is : 0x2C00
Module Part Number of Channel 3 Dimm 0 is : 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0 0
BuildMemoryPlatformDataHob.
Install EFI memory.
2LM TwoLmPreMemConfig is not found
Required memory size = 0x3B0000 bytes
Found 00000000000A0000h bytes at 0000000000000000h
Found 0000000000060000h bytes at 00000000000A0000h
Found 0000000076F00000h bytes at 0000000000100000h
Found 0000000004000000h bytes at 0000000077000000h
Found 0000000000800000h bytes at 000000007B000000h
Found 0000000000800000h bytes at 000000007B800000h
Found 0000000003C00000h bytes at 000000007C000000h
Found 0000000000060000h bytes at 00000000FED20000h
Base memory test started.
PeiInstallPeiMemory MemoryBegin 0x76C50000, MemoryLength 0x3B0000
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 76C50000h, PeiMemoryLength = 3B0000h
FSP_RESERVED_MEMORY_RESOURCE_HOB
FspReservedMemoryResource Base : 76C50000
FspReservedMemoryResource Size : 3B0000
Base memory test started.
Base memory test started.
TSeg base is 7B000000h
TSeg SMRAM size is 800000h
Found 0x0000000780400000 bytes at 0x0000000100000000
Providing I/O space resource from 0x2000 to 0xE000
Providing PCI space from 0x7FC00000 to 0xBFFFFFFF
BuildHobUsageDataHob.
MemoryInit Complete.
Post Code: 0055h
Install PPI: 0FF07255-67C2-456D-9A95-C9162C23868D
Installed gMrcMemoryInitDonePpi
SiInitPreMemOnPolicy() - End
Temp Stack : BaseAddress=0xFEF3EFD0 Length=0x0
Temp Heap : BaseAddress=0xFEF4FF00 Length=0x50000
Total temporary memory: 327680 bytes.
temporary memory stack ever used: 0 bytes.
temporary memory heap used for HobList: 92496 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x0000000B 0xFC800000 - 0xFE7FFFFF
Memory Allocation 0x0000000B 0xFED00000 - 0xFED00FFF
Memory Allocation 0x0000000B 0xFB000000 - 0xFBFFFFFF
Old Stack size 0, New stack size 262144
Stack Hob: BaseAddress=0x76C50000 Length=0x40000
Heap Offset = 0x882BFF00 Stack Offset = 0x882AEFD0
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x00076FED188 EntryPoint=0x00076FED406 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: FFEE289C
Memory Discovered Notify invoked ...
Migrate FSP-M UPD from FEF3F000 to 76FEC000
FspMemoryInitApi() - End
POSTCODE=<0000D87F>
Success
Loader global data @ 0x76C0FD50
Memory Tolum @ 0x7FC00000
Memory Touum @ 0x880400000
Memory Tom @ 0x800000000
Switch to memory stack @ 0x76C4FF00
Stage1 stack: 0x40000 (0x2A948 used)
Stage1 heap: 0x10000 (0x4360 used, 0x5274 max used)
Call FspTempRamExit ... POSTCODE=<0000B800>
McBank End Index 0x13
MicrocodeRegionBase : 0xFFC15000
MicrocodeRegionSize : 0x00038000
CodeRegionBase : 0xFFD00000
CodeRegionSize : 0x00300000
Memory Length (Below 4GB) = 7B000000.
Memory Length (Above 4GB) = 780400000.
MTRR programming:
MSR_IA32_MTRR_FIX64K_00000 Msr 250 = 0606060606060606
MSR_IA32_MTRR_FIX16K_80000 Msr 258 = 0606060606060606
MSR_IA32_MTRR_FIX16K_A0000 Msr 259 = 0000000000000000
MSR_IA32_MTRR_FIX4K_C0000 Msr 268 = 0505050505050505
MSR_IA32_MTRR_FIX4K_C8000 Msr 269 = 0505050505050505
MSR_IA32_MTRR_FIX4K_D0000 Msr 26A = 0505050505050505
MSR_IA32_MTRR_FIX4K_D8000 Msr 26B = 0505050505050505
MSR_IA32_MTRR_FIX4K_E0000 Msr 26C = 0505050505050505
MSR_IA32_MTRR_FIX4K_E8000 Msr 26D = 0505050505050505
MSR_IA32_MTRR_FIX4K_F0000 Msr 26E = 0505050505050505
MSR_IA32_MTRR_FIX4K_F8000 Msr 26F = 0505050505050505
MSR_IA32_MTRR_PHYSBASE0 Msr 200 = 00000000FF000005
MSR_IA32_MTRR_PHYSMASK0 Msr 201 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE1 Msr 202 = 0000000000000006
MSR_IA32_MTRR_PHYSMASK1 Msr 203 = 0000007F80000800
MSR_IA32_MTRR_PHYSBASE2 Msr 204 = 000000007B000000
MSR_IA32_MTRR_PHYSMASK2 Msr 205 = 0000007FFF000800
MSR_IA32_MTRR_PHYSBASE3 Msr 206 = 000000007C000000
MSR_IA32_MTRR_PHYSMASK3 Msr 207 = 0000007FFC000800
MSR_IA32_MTRR_PHYSBASE4 Msr 208 = 0000000100000006
MSR_IA32_MTRR_PHYSMASK4 Msr 209 = 0000007F00000800
MSR_IA32_MTRR_PHYSBASE5 Msr 20A = 0000000200000006
MSR_IA32_MTRR_PHYSMASK5 Msr 20B = 0000007E00000800
MSR_IA32_MTRR_PHYSBASE6 Msr 20C = 0000000400000006
MSR_IA32_MTRR_PHYSMASK6 Msr 20D = 0000007C00000800
MSR_IA32_MTRR_PHYSBASE7 Msr 20E = 0000000800000006
MSR_IA32_MTRR_PHYSMASK7 Msr 20F = 0000007800000800
MSR_IA32_MTRR_PHYSBASE8 Msr 210 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK8 Msr 211 = 0000000000000000
MSR_IA32_MTRR_PHYSBASE9 Msr 212 = 0000000000000000
MSR_IA32_MTRR_PHYSMASK9 Msr 213 = 0000000000000000
TempRamExitApi() - End
POSTCODE=<0000B87F>
Success
Memory FSP @ 0x76C50000
Memory TOP @ 0x76750000
Loading Component FLMP:SG02
HASH verification for usage (0x00000002) with Hash Alg (0x2): Success
Loaded STAGE2 @ 0x76A03000
============= Intel Slim Bootloader STAGE2 =============
PCH gen (0x5), series (0x2), stepping (0x10)
LPC DeviceId (0xA088)
Boot-time Pch Dts: 0x15E
GPIO PAD: 0x0902000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0900000B DATA: 0x0150A383 0x00002001
GPIO PAD: 0x0900000C DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0900000D DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09000016 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x090B0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0006 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0007 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x090B0010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0011 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0908000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0908000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0000 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000E DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0001 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0003 DATA: 0x0350A383 0x00002019
GPIO PAD: 0x090C0006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070006 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070010 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070011 DATA: 0x0350A283 0x00002001
GPIO PAD: 0x09070012 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09030000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030001 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030002 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09030003 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x09030004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09030007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020000 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020001 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020002 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020003 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020004 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020005 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020006 DATA: 0x0550A381 0x00002001
GPIO PAD: 0x09020007 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020008 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09020009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000A DATA: 0x0350A383 0x00002001
GPIO PAD: 0x0902000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0902000E DATA: 0x03302385 0x00002001
GPIO PAD: 0x09020010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09020012 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020013 DATA: 0x03300583 0x00002001
GPIO PAD: 0x09020017 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000009 DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000A DATA: 0x0550E281 0x00002017
GPIO PAD: 0x0900000E DATA: 0x0350A285 0x00002001
GPIO PAD: 0x0900000F DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000010 DATA: 0x0550A281 0x00002019
GPIO PAD: 0x09000011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09000012 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09000013 DATA: 0x033002E1 0x00002001
GPIO PAD: 0x09000014 DATA: 0x033022E1 0x00002001
GPIO PAD: 0x09000015 DATA: 0x033005E1 0x00002001
GPIO PAD: 0x09000017 DATA: 0x0350A287 0x00002001
GPIO PAD: 0x090B0002 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0005 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090B0008 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B0009 DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000A DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000B DATA: 0x0550A583 0x00002019
GPIO PAD: 0x090B000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0013 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090B0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0016 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090B0017 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09080000 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080001 DATA: 0x0550A381 0x00002019
GPIO PAD: 0x09080002 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080003 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080009 DATA: 0x03302385 0x0000201F
GPIO PAD: 0x0908000A DATA: 0x03302285 0x0000201F
GPIO PAD: 0x0908000B DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x0908000C DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x09080010 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09080011 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x09080012 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x09080013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090E0001 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0002 DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0003 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0004 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0006 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090E0007 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0008 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0009 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E000A DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000B DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000C DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000D DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E000F DATA: 0x0550A581 0x00002019
GPIO PAD: 0x090E0010 DATA: 0x0550E281 0x00002019
GPIO PAD: 0x090E0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090E0012 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0013 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0014 DATA: 0x0350A383 0x0000201F
GPIO PAD: 0x090E0015 DATA: 0x0350A283 0x0000201F
GPIO PAD: 0x090E0016 DATA: 0x0350A385 0x00002009
GPIO PAD: 0x090E0017 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0004 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x090C0007 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0009 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C000A DATA: 0x0350A281 0x00002001
GPIO PAD: 0x090C0011 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0012 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x090C0013 DATA: 0x03306581 0x00002001
GPIO PAD: 0x090C0014 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x090C0015 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070000 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070001 DATA: 0x0350A281 0x00002001
GPIO PAD: 0x09070005 DATA: 0x0550A583 0x00002001
GPIO PAD: 0x0907000A DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000B DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000C DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000D DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000E DATA: 0x0350A381 0x00002001
GPIO PAD: 0x0907000F DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070013 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09070014 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070015 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09070016 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030005 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09030006 DATA: 0x0350A381 0x00002001
GPIO PAD: 0x09060000 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060001 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060002 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060003 DATA: 0x0350A383 0x00002001
GPIO PAD: 0x09060004 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060005 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060006 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09060007 DATA: 0x0350A385 0x00002001
GPIO PAD: 0x09050000 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050001 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050002 DATA: 0x0150A383 0x0000201F
GPIO PAD: 0x09050003 DATA: 0x0150A383 0x00002019
GPIO PAD: 0x09050004 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050005 DATA: 0x0150A283 0x00002001
GPIO PAD: 0x09050006 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050007 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x09050008 DATA: 0x0150A383 0x00002001
GPIO PAD: 0x09050009 DATA: 0x0150A281 0x00002001
GPIO PAD: 0x0905000A DATA: 0x0150A283 0x00002001
GPIO PAD: 0x0905000B DATA: 0x0150A283 0x00002001
Variable region: 0xFF60E000:0x2000
SaveNvsData Length=0xFAA8
bios range (0x1530000 : 0xAD0000)
MRC data successfully saved to 0x120000
Save MRC Training Data (0x76C96120 0x00FAA8) ... Success
Silicon Init
PchLp is detected
BIOS SPI region will be protected
IAS SPI region will be protected
Load Silicon Cfg Data
Call FspSiliconInit ...
POSTCODE=<00009800>
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFDF8A7B
The 1th FV start address is 0x00076B78000, size is 0x0008B000, handle is 0x76B78000
Memory Discovered Notify completed ...
DiscoverPeimsAndOrderWithApriori(): Found 0xC PEI FFS files in the 1th FV
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x00076FE7198 EntryPoint=0x00076FE74A6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
Loading PEIM 299D6F8B-2EC9-4E40-9EC6-DDAA7EBF5FD9
Loading PEIM at 0x00076F01000 EntryPoint=0x00076F014D4 SiInitFsp.efi
ITbtPcieRpLibConstructor - Start
ITbtPcieRpLibConstructor - End
Register PPI Notify: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Install PPI: F69ABF86-4048-44EF-A8EF-6C7F204AC8DA
Loading PEIM 131B73AC-C033-4DE1-8794-6DAB08E731CF
Loading PEIM at 0x00076EC7000 EntryPoint=0x00076EC7659 FspInit.efi
Dumping FSPS_UPD - Size: 0x00000EE0
0x00000000: 0x54 0x47 0x4C 0x55 0x50 0x44 0x5F 0x53 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000010: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000020: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000030: 0x1C 0xB9 0xA5 0x76 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000040: 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000050: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x01 0x01 0x01 0x01 0x01
0x00000060: 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000070: 0x50 0x66 0xA2 0x76 0x34 0x0B 0x0A 0x0B 0x0B 0x0B 0x0B 0x0B 0x0B 0x0E 0x09 0x09
0x00000080: 0x00 0x06 0x00 0x00 0x50 0x20 0xA0 0x76 0x00 0x01 0x00 0x00 0x01 0x00 0x00 0x00
0x00000090: 0x00 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000000A0: 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x00 0x00
0x000000B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000000C0: 0x00 0x00 0x00 0x04 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xC2 0x01 0x00
0x000000D0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00
0x000000E0: 0x00 0xC2 0x01 0x00 0x00 0xC2 0x01 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x08
0x000000F0: 0x08 0x08 0x08 0x08 0x08 0x08 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x02 0x02 0x02
0x00000100: 0x02 0x02 0x02 0x02 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x01 0x01 0x00 0x01 0x01
0x00000110: 0x00 0x00 0x00 0x00 0x0A 0x22 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000120: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000130: 0x0B 0x32 0x0B 0x19 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000140: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x02 0x0B 0x19
0x00000150: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x12 0x0B 0x19 0x00 0x00 0x00 0x00
0x00000170: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000180: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00
0x00000190: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001A0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001B0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001C0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000001F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000200: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000210: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000220: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000230: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000240: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000250: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000260: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000270: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000280: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000290: 0x00 0x00 0x00 0x00 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06
0x000002A0: 0x06 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002B0: 0x00 0x00 0x00 0x00 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03
0x000002C0: 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002D0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002E0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x000002F0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000300: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000310: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000320: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x03
0x00000330: 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000340: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x03
0x00000350: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x01
0x00000360: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000370: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000380: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x00000390: 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01
0x000003A0: 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00
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0x00000C90: 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10 0x03 0x10
0x00000CA0: 0x03 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000CB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CC0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CD0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000CE0: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000CF0: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D00: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D10: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D20: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D30: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02
0x00000D40: 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D50: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D60: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00
0x00000D70: 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D80: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000D90: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DB0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000DC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0xFF 0x00 0x00 0x03 0x10 0x0F 0x10 0x0F 0x10
0x00000DD0: 0x0F 0x10 0x03 0x10 0x0F 0x10 0x0F 0x10 0x0F 0x10 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DE0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x02 0x02 0x02 0x02 0x02 0x02
0x00000DF0: 0x02 0x02 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x3C 0x00 0x07 0x07 0x07 0x07 0x07 0x07
0x00000E00: 0x07 0x07 0x08 0x08 0x08 0x08 0x09 0x09 0x09 0x09 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E10: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E20: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E30: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E40: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E50: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E60: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E70: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000E80: 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00
0x00000E90: 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0xA0 0x00 0x00 0x00 0xA2 0x00 0x00 0x00 0xA4
0x00000EA0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EB0: 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00000EC0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01
0x00000ED0: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xAA 0x55
Updating UPDs consumed in FspSiliconInitApi...
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x1]= 0x504
TotalBlockSize after adding Block[0x2]= 0x530
TotalBlockSize after adding Block[0x3]= 0x55C
TotalBlockSize after adding Block[0x4]= 0x588
TotalBlockSize after adding Block[0x5]= 0x5CC
TotalBlockSize after adding Block[0x6]= 0x5EC
TotalBlockSize after adding Block[0x7]= 0x610
TotalBlockSize after adding Block[0x8]= 0x638
TotalBlockSize after adding Block[0x9]= 0x678
TotalBlockSize after adding Block[0x0]= 0x24
TotalBlockSize after adding Block[0x0]= 0x20
TotalBlockSize after adding Block[0x0]= 0x1C
TotalBlockSize after adding Block[0x0]= 0x30
TotalBlockSize after adding Block[0x1]= 0x88
TotalBlockSize after adding Block[0x2]= 0xCC
TotalBlockSize after adding Block[0x3]= 0x144
TotalBlockSize after adding Block[0x4]= 0x16C
TotalBlockSize after adding Block[0x5]= 0x19C
TotalBlockSize after adding Block[0x6]= 0x220
TotalBlockSize after adding Block[0x7]= 0x274
TotalBlockSize after adding Block[0x0]= 0x38
TotalBlockSize after adding Block[0x0]= 0x224
TotalBlockSize after adding Block[0x1]= 0x248
TotalBlockSize after adding Block[0x0]= 0x4C
TotalBlockSize after adding Block[0x0]= 0x98
TotalBlockSize after adding Block[0x1]= 0xF4
TotalBlockSize after adding Block[0x2]= 0x1D8
TotalBlockSize = 0x1998
gSiConfigGuid = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Name = 4ED6D282-22F3-4FE1-A661-061A973859D8
SiConfig->Header.GuidHob.Header.HobLength = 0x34
PCH AddConfigBlocks
PchGeneralConfig->Header.GuidHob.Name = 6ED94C8C-25F7-4686-B246-CA4DE2954B5D
PchGeneralConfig->Header.GuidHob.Header.HobLength = 0x20
PchPcieConfig->Header.GuidHob.Name = 0A53B507-988B-475C-BF76-33DE106D9484
PchPcieConfig->Header.GuidHob.Header.HobLength = 0x4E4
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
RstConfig->Header.GuidHob.Name = 43B6F112-3851-4DDC-81B9-E45A2B0EB325
RstConfig->Header.GuidHob.Header.HobLength = 0x2C
FlashProtectionConfig->Header.GuidHob.Name = D0F71512-9E32-4CC9-A5A3-AD679A0667B8
FlashProtectionConfig->Header.GuidHob.Header.HobLength = 0x44
LockDownConfig->Header.GuidHob.Name = 8A838E0A-A639-46F0-A9CE-70C485FBA80D
LockDownConfig->Header.GuidHob.Header.HobLength = 0x20
HsioConfig->Header.GuidHob.Name = E53EBEE7-103D-4A71-9B6A-74EE5F4C8DF5
HsioConfig->Header.GuidHob.Header.HobLength = 0x24
AdrConfig->Header.GuidHob.Name = 5B36A07C-3BBF-4D53-8A2D-E1CF97390C65
AdrConfig->Header.GuidHob.Header.HobLength = 0x28
FivrConfig->Header.GuidHob.Name = 68EE8BD4-05F2-4656-AEE4-AD10C722C34F
FivrConfig->Header.GuidHob.Header.HobLength = 0x40
AMT AddConfigBlocks
ME AddConfigBlocks. TotalBlockCount = 0x1
SA AddConfigBlocks. TotalBlockCount = 0x1
MiscPeiConfig->Header.GuidHob.Name = 01DEF8E6-E998-4E27-8998-9CFAB292BC50
MiscPeiConfig->Header.GuidHob.Header.HobLength = 0x1C
CPU Post-Mem Entry
POSTCODE=<00009C00>
CpuConfig->Header.GuidHob.Name = 48C3AAC9-D66C-42E4-9B1D-39045F465341
CpuConfig->Header.GuidHob.Header.HobLength = 0x30
BiosGuardConfig->Header.GuidHob.Name = 762F9DDB-1C89-4612-846B-EEDC8F622545
BiosGuardConfig->Header.GuidHob.Header.HobLength = 0x58
CpuPowerMgmtBasicConfig->Header.GuidHob.Name = A021E31D-7C14-47DA-B5EC-CABB4D76EDC8
CpuPowerMgmtBasicConfig->Header.GuidHob.Header.HobLength = 0x44
CpuPowerMgmtCustomConfig->Header.GuidHob.Name = 562FA1C8-55EE-4E2F-91CA-8D8450032F0E
CpuPowerMgmtCustomConfig->Header.GuidHob.Header.HobLength = 0x78
CpuPowerMgmtPsysConfig->Header.GuidHob.Name = 04E7F850-19B5-47BA-9D28-B1E75E1F4853
CpuPowerMgmtPsysConfig->Header.GuidHob.Header.HobLength = 0x28
CpuTestConfig->Header.GuidHob.Name = D4DBA957-0D9C-4AF2-9D40-35A844E493AD
CpuTestConfig->Header.GuidHob.Header.HobLength = 0x30
CpuPidTestConfig->Header.GuidHob.Name = 2511095F-D49E-4537-A660-887131D153DA
CpuPidTestConfig->Header.GuidHob.Header.HobLength = 0x84
CpuPowerMgmtTestConfig->Header.GuidHob.Name = 5161ED3D-90BF-436F-B833-D71789B348C1
CpuPowerMgmtTestConfig->Header.GuidHob.Header.HobLength = 0x54
FuSA supported sku detected
CpuAddConfigBlocks Done
POSTCODE=<00009C09>
TBT AddConfigBlocks. TotalBlockCount = 0x1
ITbtPeiConfig->Header.GuidHob.Name = D7E7E1E6-CBEC-4F5F-AED3-FDC0A8B07E25
ITbtPeiConfig->Header.GuidHob.Header.HobLength = 0x38
RtcConfig->Header.GuidHob.Name = 0E9259B8-3DDE-40C7-AA5F-94829A868FAF
RtcConfig->Header.GuidHob.Header.HobLength = 0x20
ThermalConfig->Header.GuidHob.Name = 4416506D-1197-4722-A5B4-4611F9239EAE
ThermalConfig->Header.GuidHob.Header.HobLength = 0x40
CnviConfig->Header.GuidHob.Name = E53EBEF7-103D-4A70-9B6A-73EE5F4C8DF5
CnviConfig->Header.GuidHob.Header.HobLength = 0x28
EspiConfig->Header.GuidHob.Name = 60FBF3B8-96D4-4187-849E-AAF75C4BE1E3
EspiConfig->Header.GuidHob.Header.HobLength = 0x20
GbeConfig->Header.GuidHob.Name = 4B2DE99E-7517-4D04-8C02-F11A592B142F
GbeConfig->Header.GuidHob.Header.HobLength = 0x20
TsnConfig->Header.GuidHob.Name = 9E9A93CB-0F4E-4E56-902D-6C76DE90F771
TsnConfig->Header.GuidHob.Header.HobLength = 0x30
HdaConfig->Header.GuidHob.Name = 7EB3CE7E-82E0-4CD7-BDE5-B2BF4E91C34C
HdaConfig->Header.GuidHob.Header.HobLength = 0x28
IehConfig->Header.GuidHob.Name = 42C4D7F3-981D-4475-A2AE-ADCDD5CE871E
IehConfig->Header.GuidHob.Header.HobLength = 0x20
IshConfig->Header.GuidHob.Name = 433AE2AA-C5A6-46ED-9419-1E5DB81C5740
IshConfig->Header.GuidHob.Header.HobLength = 0x128
InterruptConfig->Header.GuidHob.Name = 09A2B815-BE29-45EF-BFBF-58EAAC5E2978
InterruptConfig->Header.GuidHob.Header.HobLength = 0x224
IoApicConfig->Header.GuidHob.Name = 2873D0F1-00F6-40AB-AC36-9A68BA873E6C
IoApicConfig->Header.GuidHob.Header.HobLength = 0x24
P2sbConfig->Header.GuidHob.Name = 2474DCB8-4BB4-49DA-8783-7CD3D385FF07
P2sbConfig->Header.GuidHob.Header.HobLength = 0x20
PchDmiConfig->Header.GuidHob.Name = B3A61210-1CD3-4797-8EE6-D3429C4F17BD
PchDmiConfig->Header.GuidHob.Header.HobLength = 0x20
PmConfig->Header.GuidHob.Name = 93826157-DC85-4E34-AED9-6EA10DF9E3A7
PmConfig->Header.GuidHob.Header.HobLength = 0x44
SataConfig->Header.GuidHob.Name = F5F87B4F-CC3C-408D-89E3-61C59C5407C4
SataConfig->Header.GuidHob.Header.HobLength = 0x4C
UsbConfig->Header.GuidHob.Name = B2DA9CCD-6A8C-4BB6-B3E6-CDFBB7668BDE
UsbConfig->Header.GuidHob.Header.HobLength = 0x98
Usb2PhyConfig->Header.GuidHob.Name = 576C1134-2E0C-CB7D-CD3F-AC682DAED3F2
Usb2PhyConfig->Header.GuidHob.Header.HobLength = 0x5C
Usb3HsioConfig->Header.GuidHob.Name = F8AFC238-F176-12CE-BEF4-69F9B1AC40D5
Usb3HsioConfig->Header.GuidHob.Header.HobLength = 0xE4
ThcConfig->Header.GuidHob.Name = 1B318AD1-AA0D-4764-99FD-BB2BF47F7ED6
ThcConfig->Header.GuidHob.Header.HobLength = 0x2C
PsfConfig->Header.GuidHob.Name = 49B12CF6-0A56-4B9F-A84C-F57D21238C77
PsfConfig->Header.GuidHob.Header.HobLength = 0x20
FusaConfig->Header.GuidHob.Name = F9225896-A9C8-4543-BA9E-5332D7BF8C2B
FusaConfig->Header.GuidHob.Header.HobLength = 0x20
GtConfig->Header.GuidHob.Name = 04249AC0-0088-439F-A74E-A7042A062F5D
GtConfig->Header.GuidHob.Header.HobLength = 0x48
TcssConfig->Header.GuidHob.Name = FB631590-79C9-4F0D-A996-EEE29866FAFD
TcssConfig->Header.GuidHob.Header.HobLength = 0x178
GnaConfig->Header.GuidHob.Name = 53E0EF18-B8A8-4795-A66D-E4772CC3AE82
GnaConfig->Header.GuidHob.Header.HobLength = 0x20
VmdConfig->Header.GuidHob.Name = 79B52C74-B9BA-4F36-A240-F2410D20848A
VmdConfig->Header.GuidHob.Header.HobLength = 0xB8
CpuPcieRpConfig->Header.GuidHob.Name = 9749A5FB-9130-44F0-8F61-DBFF8EF2CAC7
CpuPcieRpConfig->Header.GuidHob.Header.HobLength = 0x260
TelemetryConfig->Header.GuidHob.Name = 8EBF9FEE-7496-42B4-A6F6-CF2B339930D6
TelemetryConfig->Header.GuidHob.Header.HobLength = 0x20
SerialIoConfig->Header.GuidHob.Name = 6CC06EBF-0D34-4340-BC16-DA09E5783ADB
SerialIoConfig->Header.GuidHob.Header.HobLength = 0x17C
CpuPowerMgmtVrConfig->Header.GuidHob.Name = 254766C9-929D-4EAC-9EEC-DFA20244B5EA
CpuPowerMgmtVrConfig->Header.GuidHob.Header.HobLength = 0xDC
HybridStorage AddConfigBlocks
HybridStorageConfig->Header.GuidHob.Name = 265CE069-D8CF-48BE-AE12-024C2512FAF8
HybridStorageConfig->Header.GuidHob.Header.HobLength = 0x20
HostBridgePeiConfig->Header.GuidHob.Name = 3B6D998E-8B6E-4F53-BE41-074195538AAF
HostBridgePeiConfig->Header.GuidHob.Header.HobLength = 0x20
TccConfig->Header.GuidHob.Name = AE3E7E1D-8179-4F5D-A346-0403851FBB58
TccConfig->Header.GuidHob.Header.HobLength = 0x44
SpiConfig->Header.GuidHob.Name = 150360EF-99BE-4E43-94BB-BD4026CA3457
SpiConfig->Header.GuidHob.Header.HobLength = 0x28
Install PPI: AEBFFA01-7EDC-49FF-8D88-CB848C5E8670
FSP UpdatePeiPchPolicy
Searching for microcode updates in region passed in TempRamInit API MicrocodeRegionBase = 0xFFC15000, MicrocodeRegionSize = 0x38000.
Microcode update found at 0xFFC15000
FuSA supported sku detected
FSP UpdatePeiMePolicy
FSP UpdatePeiSaPolicy
GtConfig->GraphicsConfigPtr from FSP UpdatePeiSaPolicy: 0x76A5B91C
GtConfig->LogoPtr: 0x0
GtConfig->LogoSize: 0x0
GtConfig->LogoPixelHeight: 0x0
GtConfig->LogoPixelWidth: 0x0
FSP UpdatePeiAmtPolicy
FSP FspUpdatePeiTbtPolicy
MaxLogicProcessors = 8
Install PPI: 1A266768-FD43-4E18-A88A-35C794C3910E
Register PPI Notify: EE16160A-E8BE-47A6-820A-C6900DB0250A
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Mono Status Code PEIM Loaded
SI PEI Policy Initialization Done in Post-Memory
PROGRESS CODE: V03020003 I0
Loading PEIM EDADEB9D-DDBA-48BD-9D22-C1C169C8C5C6
Loading PEIM at 0x00076EA5000 EntryPoint=0x00076EA5D26 CpuMpPei.efi
PROGRESS CODE: V03020002 I0
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: 76EA61CC
AP Loop Mode is 2
WakeupBufferStart = 9F000, WakeupBufferSize = 0
CpuMpPei: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
ShadowMicrocodePatchByPcd: 0x1 microcode patches will be loaded into memory, with size 0x1B400.
ShadowMicrocodePatchWorker: Required microcode patches have been loaded at 0x76E48000, with size 0x1B400.
Register PPI Notify: 8F9D4825-797D-48FC-8471-845025792EF6
Does not find any stored CPU BIST information from PPI!
APICID - 0x00000000, BIST - 0x00000000
APICID - 0x00000001, BIST - 0x00000000
APICID - 0x00000002, BIST - 0x00000000
APICID - 0x00000003, BIST - 0x00000000
APICID - 0x00000004, BIST - 0x00000000
APICID - 0x00000005, BIST - 0x00000000
APICID - 0x00000006, BIST - 0x00000000
APICID - 0x00000007, BIST - 0x00000000
Install PPI: 9E9F374B-8F16-4230-9824-5846EE766A97
Install PPI: 5CB9CB3D-31A4-480C-9498-29D269BACFBA
Install PPI: EE16160A-E8BE-47A6-820A-C6900DB0250A
PROGRESS CODE: V03020003 I0
Notify: PPI Guid: EE16160A-E8BE-47A6-820A-C6900DB0250A, Peim notify entry point: 76EC7963
Dump Silicon Policy updated by Platform...
------------------------ Silicon Print Policy Start ------------------------
CsmFlag= 0
SkipSsidProgramming= 0
CustomizedSvid= 0
CustomizedSsid= 0
SsidTablePtr= 0
NumberOfSsidTableEntry= 0
TraceHubMemBase = 0x00000000
SkipBiosDoneWhenFwUpdate= 0
------------------------ Silicon Print Policy End --------------------------
------------------------ PCH Print Policy Start ------------------------
Revision= 1
------------------ PCH General Config ------------------
Crid= 0
LegacyIoLowLatency = 0
------------------ PCH PCIE Config ------------------
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ClkReqDetect= 1
RootPort[0] MrlSensorPresent = 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] PcieSpeed= 0
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 0
RootPort[0] L1Substates= 0
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] SlotPowerLimitScale= 0
RootPort[0] SlotPowerLimitValue= 0
RootPort[0] EnableCpm= 1
RootPort[0] FormFactor = 0
RootPort[1] HotPlug= 0
RootPort[1] PmSci= 1
RootPort[1] ClkReqDetect= 1
RootPort[1] MrlSensorPresent = 0
RootPort[1] UnsupportedRequestReport= 0
RootPort[1] FatalErrorReport= 0
RootPort[1] NoFatalErrorReport= 0
RootPort[1] CorrectableErrorReport= 0
RootPort[1] SystemErrorOnFatalError= 0
RootPort[1] SystemErrorOnNonFatalError= 0
RootPort[1] SystemErrorOnCorrectableError= 0
RootPort[1] MaxPayload= 1
RootPort[1] SlotImplemented= 1
RootPort[1] AcsEnabled= 1
RootPort[1] PtmEnabled= 1
RootPort[1] AdvancedErrorReporting= 1
RootPort[1] TransmitterHalfSwing= 0
RootPort[1] PcieSpeed= 0
RootPort[1] PhysicalSlotNumber= 1
RootPort[1] CompletionTimeout= 0
RootPort[1] Aspm= 0
RootPort[1] L1Substates= 0
RootPort[1] LtrEnable= 1
RootPort[1] LtrConfigLock= 0
RootPort[1] LtrMaxSnoopLatency= 1003
RootPort[1] LtrMaxNoSnoopLatency= 1003
RootPort[1] SnoopLatencyOverrideMode= 2
RootPort[1] SnoopLatencyOverrideMultiplier= 2
RootPort[1] SnoopLatencyOverrideValue= 3C
RootPort[1] NonSnoopLatencyOverrideMode= 2
RootPort[1] NonSnoopLatencyOverrideMultiplier= 2
RootPort[1] NonSnoopLatencyOverrideValue= 3C
RootPort[1] ForceLtrOverride= 0
RootPort[1] DetectTimeoutMs= 0
RootPort[1] SlotPowerLimitScale= 0
RootPort[1] SlotPowerLimitValue= 0
RootPort[1] EnableCpm= 1
RootPort[1] FormFactor = 0
RootPort[2] HotPlug= 0
RootPort[2] PmSci= 1
RootPort[2] ClkReqDetect= 1
RootPort[2] MrlSensorPresent = 0
RootPort[2] UnsupportedRequestReport= 0
RootPort[2] FatalErrorReport= 0
RootPort[2] NoFatalErrorReport= 0
RootPort[2] CorrectableErrorReport= 0
RootPort[2] SystemErrorOnFatalError= 0
RootPort[2] SystemErrorOnNonFatalError= 0
RootPort[2] SystemErrorOnCorrectableError= 0
RootPort[2] MaxPayload= 1
RootPort[2] SlotImplemented= 1
RootPort[2] AcsEnabled= 1
RootPort[2] PtmEnabled= 1
RootPort[2] AdvancedErrorReporting= 1
RootPort[2] TransmitterHalfSwing= 0
RootPort[2] PcieSpeed= 0
RootPort[2] PhysicalSlotNumber= 2
RootPort[2] CompletionTimeout= 0
RootPort[2] Aspm= 0
RootPort[2] L1Substates= 0
RootPort[2] LtrEnable= 1
RootPort[2] LtrConfigLock= 0
RootPort[2] LtrMaxSnoopLatency= 1003
RootPort[2] LtrMaxNoSnoopLatency= 1003
RootPort[2] SnoopLatencyOverrideMode= 2
RootPort[2] SnoopLatencyOverrideMultiplier= 2
RootPort[2] SnoopLatencyOverrideValue= 3C
RootPort[2] NonSnoopLatencyOverrideMode= 2
RootPort[2] NonSnoopLatencyOverrideMultiplier= 2
RootPort[2] NonSnoopLatencyOverrideValue= 3C
RootPort[2] ForceLtrOverride= 0
RootPort[2] DetectTimeoutMs= 0
RootPort[2] SlotPowerLimitScale= 0
RootPort[2] SlotPowerLimitValue= 0
RootPort[2] EnableCpm= 1
RootPort[2] FormFactor = 0
RootPort[3] HotPlug= 0
RootPort[3] PmSci= 1
RootPort[3] ClkReqDetect= 1
RootPort[3] MrlSensorPresent = 0
RootPort[3] UnsupportedRequestReport= 0
RootPort[3] FatalErrorReport= 0
RootPort[3] NoFatalErrorReport= 0
RootPort[3] CorrectableErrorReport= 0
RootPort[3] SystemErrorOnFatalError= 0
RootPort[3] SystemErrorOnNonFatalError= 0
RootPort[3] SystemErrorOnCorrectableError= 0
RootPort[3] MaxPayload= 1
RootPort[3] SlotImplemented= 1
RootPort[3] AcsEnabled= 1
RootPort[3] PtmEnabled= 1
RootPort[3] AdvancedErrorReporting= 1
RootPort[3] TransmitterHalfSwing= 0
RootPort[3] PcieSpeed= 0
RootPort[3] PhysicalSlotNumber= 3
RootPort[3] CompletionTimeout= 0
RootPort[3] Aspm= 0
RootPort[3] L1Substates= 0
RootPort[3] LtrEnable= 1
RootPort[3] LtrConfigLock= 0
RootPort[3] LtrMaxSnoopLatency= 1003
RootPort[3] LtrMaxNoSnoopLatency= 1003
RootPort[3] SnoopLatencyOverrideMode= 2
RootPort[3] SnoopLatencyOverrideMultiplier= 2
RootPort[3] SnoopLatencyOverrideValue= 3C
RootPort[3] NonSnoopLatencyOverrideMode= 2
RootPort[3] NonSnoopLatencyOverrideMultiplier= 2
RootPort[3] NonSnoopLatencyOverrideValue= 3C
RootPort[3] ForceLtrOverride= 0
RootPort[3] DetectTimeoutMs= 0
RootPort[3] SlotPowerLimitScale= 0
RootPort[3] SlotPowerLimitValue= 0
RootPort[3] EnableCpm= 1
RootPort[3] FormFactor = 0
RootPort[4] HotPlug= 0
RootPort[4] PmSci= 1
RootPort[4] ClkReqDetect= 1
RootPort[4] MrlSensorPresent = 0
RootPort[4] UnsupportedRequestReport= 0
RootPort[4] FatalErrorReport= 0
RootPort[4] NoFatalErrorReport= 0
RootPort[4] CorrectableErrorReport= 0
RootPort[4] SystemErrorOnFatalError= 0
RootPort[4] SystemErrorOnNonFatalError= 0
RootPort[4] SystemErrorOnCorrectableError= 0
RootPort[4] MaxPayload= 1
RootPort[4] SlotImplemented= 1
RootPort[4] AcsEnabled= 1
RootPort[4] PtmEnabled= 1
RootPort[4] AdvancedErrorReporting= 1
RootPort[4] TransmitterHalfSwing= 0
RootPort[4] PcieSpeed= 0
RootPort[4] PhysicalSlotNumber= 4
RootPort[4] CompletionTimeout= 0
RootPort[4] Aspm= 0
RootPort[4] L1Substates= 0
RootPort[4] LtrEnable= 1
RootPort[4] LtrConfigLock= 0
RootPort[4] LtrMaxSnoopLatency= 1003
RootPort[4] LtrMaxNoSnoopLatency= 1003
RootPort[4] SnoopLatencyOverrideMode= 2
RootPort[4] SnoopLatencyOverrideMultiplier= 2
RootPort[4] SnoopLatencyOverrideValue= 3C
RootPort[4] NonSnoopLatencyOverrideMode= 2
RootPort[4] NonSnoopLatencyOverrideMultiplier= 2
RootPort[4] NonSnoopLatencyOverrideValue= 3C
RootPort[4] ForceLtrOverride= 0
RootPort[4] DetectTimeoutMs= 0
RootPort[4] SlotPowerLimitScale= 0
RootPort[4] SlotPowerLimitValue= 0
RootPort[4] EnableCpm= 1
RootPort[4] FormFactor = 0
RootPort[5] HotPlug= 0
RootPort[5] PmSci= 1
RootPort[5] ClkReqDetect= 1
RootPort[5] MrlSensorPresent = 0
RootPort[5] UnsupportedRequestReport= 0
RootPort[5] FatalErrorReport= 0
RootPort[5] NoFatalErrorReport= 0
RootPort[5] CorrectableErrorReport= 0
RootPort[5] SystemErrorOnFatalError= 0
RootPort[5] SystemErrorOnNonFatalError= 0
RootPort[5] SystemErrorOnCorrectableError= 0
RootPort[5] MaxPayload= 1
RootPort[5] SlotImplemented= 1
RootPort[5] AcsEnabled= 1
RootPort[5] PtmEnabled= 1
RootPort[5] AdvancedErrorReporting= 1
RootPort[5] TransmitterHalfSwing= 0
RootPort[5] PcieSpeed= 0
RootPort[5] PhysicalSlotNumber= 5
RootPort[5] CompletionTimeout= 0
RootPort[5] Aspm= 0
RootPort[5] L1Substates= 0
RootPort[5] LtrEnable= 1
RootPort[5] LtrConfigLock= 0
RootPort[5] LtrMaxSnoopLatency= 1003
RootPort[5] LtrMaxNoSnoopLatency= 1003
RootPort[5] SnoopLatencyOverrideMode= 2
RootPort[5] SnoopLatencyOverrideMultiplier= 2
RootPort[5] SnoopLatencyOverrideValue= 3C
RootPort[5] NonSnoopLatencyOverrideMode= 2
RootPort[5] NonSnoopLatencyOverrideMultiplier= 2
RootPort[5] NonSnoopLatencyOverrideValue= 3C
RootPort[5] ForceLtrOverride= 0
RootPort[5] DetectTimeoutMs= 0
RootPort[5] SlotPowerLimitScale= 0
RootPort[5] SlotPowerLimitValue= 0
RootPort[5] EnableCpm= 1
RootPort[5] FormFactor = 0
RootPort[6] HotPlug= 0
RootPort[6] PmSci= 1
RootPort[6] ClkReqDetect= 1
RootPort[6] MrlSensorPresent = 0
RootPort[6] UnsupportedRequestReport= 0
RootPort[6] FatalErrorReport= 0
RootPort[6] NoFatalErrorReport= 0
RootPort[6] CorrectableErrorReport= 0
RootPort[6] SystemErrorOnFatalError= 0
RootPort[6] SystemErrorOnNonFatalError= 0
RootPort[6] SystemErrorOnCorrectableError= 0
RootPort[6] MaxPayload= 1
RootPort[6] SlotImplemented= 1
RootPort[6] AcsEnabled= 1
RootPort[6] PtmEnabled= 1
RootPort[6] AdvancedErrorReporting= 1
RootPort[6] TransmitterHalfSwing= 0
RootPort[6] PcieSpeed= 0
RootPort[6] PhysicalSlotNumber= 6
RootPort[6] CompletionTimeout= 0
RootPort[6] Aspm= 0
RootPort[6] L1Substates= 0
RootPort[6] LtrEnable= 1
RootPort[6] LtrConfigLock= 0
RootPort[6] LtrMaxSnoopLatency= 1003
RootPort[6] LtrMaxNoSnoopLatency= 1003
RootPort[6] SnoopLatencyOverrideMode= 2
RootPort[6] SnoopLatencyOverrideMultiplier= 2
RootPort[6] SnoopLatencyOverrideValue= 3C
RootPort[6] NonSnoopLatencyOverrideMode= 2
RootPort[6] NonSnoopLatencyOverrideMultiplier= 2
RootPort[6] NonSnoopLatencyOverrideValue= 3C
RootPort[6] ForceLtrOverride= 0
RootPort[6] DetectTimeoutMs= 0
RootPort[6] SlotPowerLimitScale= 0
RootPort[6] SlotPowerLimitValue= 0
RootPort[6] EnableCpm= 1
RootPort[6] FormFactor = 0
RootPort[7] HotPlug= 0
RootPort[7] PmSci= 1
RootPort[7] ClkReqDetect= 1
RootPort[7] MrlSensorPresent = 0
RootPort[7] UnsupportedRequestReport= 0
RootPort[7] FatalErrorReport= 0
RootPort[7] NoFatalErrorReport= 0
RootPort[7] CorrectableErrorReport= 0
RootPort[7] SystemErrorOnFatalError= 0
RootPort[7] SystemErrorOnNonFatalError= 0
RootPort[7] SystemErrorOnCorrectableError= 0
RootPort[7] MaxPayload= 1
RootPort[7] SlotImplemented= 1
RootPort[7] AcsEnabled= 1
RootPort[7] PtmEnabled= 1
RootPort[7] AdvancedErrorReporting= 1
RootPort[7] TransmitterHalfSwing= 0
RootPort[7] PcieSpeed= 0
RootPort[7] PhysicalSlotNumber= 7
RootPort[7] CompletionTimeout= 0
RootPort[7] Aspm= 0
RootPort[7] L1Substates= 0
RootPort[7] LtrEnable= 1
RootPort[7] LtrConfigLock= 0
RootPort[7] LtrMaxSnoopLatency= 1003
RootPort[7] LtrMaxNoSnoopLatency= 1003
RootPort[7] SnoopLatencyOverrideMode= 2
RootPort[7] SnoopLatencyOverrideMultiplier= 2
RootPort[7] SnoopLatencyOverrideValue= 3C
RootPort[7] NonSnoopLatencyOverrideMode= 2
RootPort[7] NonSnoopLatencyOverrideMultiplier= 2
RootPort[7] NonSnoopLatencyOverrideValue= 3C
RootPort[7] ForceLtrOverride= 0
RootPort[7] DetectTimeoutMs= 0
RootPort[7] SlotPowerLimitScale= 0
RootPort[7] SlotPowerLimitValue= 0
RootPort[7] EnableCpm= 1
RootPort[7] FormFactor = 0
RootPort[8] HotPlug= 0
RootPort[8] PmSci= 1
RootPort[8] ClkReqDetect= 1
RootPort[8] MrlSensorPresent = 0
RootPort[8] UnsupportedRequestReport= 0
RootPort[8] FatalErrorReport= 0
RootPort[8] NoFatalErrorReport= 0
RootPort[8] CorrectableErrorReport= 0
RootPort[8] SystemErrorOnFatalError= 0
RootPort[8] SystemErrorOnNonFatalError= 0
RootPort[8] SystemErrorOnCorrectableError= 0
RootPort[8] MaxPayload= 1
RootPort[8] SlotImplemented= 1
RootPort[8] AcsEnabled= 1
RootPort[8] PtmEnabled= 1
RootPort[8] AdvancedErrorReporting= 1
RootPort[8] TransmitterHalfSwing= 0
RootPort[8] PcieSpeed= 0
RootPort[8] PhysicalSlotNumber= 8
RootPort[8] CompletionTimeout= 0
RootPort[8] Aspm= 0
RootPort[8] L1Substates= 0
RootPort[8] LtrEnable= 1
RootPort[8] LtrConfigLock= 0
RootPort[8] LtrMaxSnoopLatency= 1003
RootPort[8] LtrMaxNoSnoopLatency= 1003
RootPort[8] SnoopLatencyOverrideMode= 2
RootPort[8] SnoopLatencyOverrideMultiplier= 2
RootPort[8] SnoopLatencyOverrideValue= 3C
RootPort[8] NonSnoopLatencyOverrideMode= 2
RootPort[8] NonSnoopLatencyOverrideMultiplier= 2
RootPort[8] NonSnoopLatencyOverrideValue= 3C
RootPort[8] ForceLtrOverride= 0
RootPort[8] DetectTimeoutMs= 0
RootPort[8] SlotPowerLimitScale= 0
RootPort[8] SlotPowerLimitValue= 0
RootPort[8] EnableCpm= 1
RootPort[8] FormFactor = 0
RootPort[9] HotPlug= 0
RootPort[9] PmSci= 1
RootPort[9] ClkReqDetect= 1
RootPort[9] MrlSensorPresent = 0
RootPort[9] UnsupportedRequestReport= 0
RootPort[9] FatalErrorReport= 0
RootPort[9] NoFatalErrorReport= 0
RootPort[9] CorrectableErrorReport= 0
RootPort[9] SystemErrorOnFatalError= 0
RootPort[9] SystemErrorOnNonFatalError= 0
RootPort[9] SystemErrorOnCorrectableError= 0
RootPort[9] MaxPayload= 1
RootPort[9] SlotImplemented= 1
RootPort[9] AcsEnabled= 1
RootPort[9] PtmEnabled= 1
RootPort[9] AdvancedErrorReporting= 1
RootPort[9] TransmitterHalfSwing= 0
RootPort[9] PcieSpeed= 0
RootPort[9] PhysicalSlotNumber= 9
RootPort[9] CompletionTimeout= 0
RootPort[9] Aspm= 0
RootPort[9] L1Substates= 0
RootPort[9] LtrEnable= 1
RootPort[9] LtrConfigLock= 0
RootPort[9] LtrMaxSnoopLatency= 1003
RootPort[9] LtrMaxNoSnoopLatency= 1003
RootPort[9] SnoopLatencyOverrideMode= 2
RootPort[9] SnoopLatencyOverrideMultiplier= 2
RootPort[9] SnoopLatencyOverrideValue= 3C
RootPort[9] NonSnoopLatencyOverrideMode= 2
RootPort[9] NonSnoopLatencyOverrideMultiplier= 2
RootPort[9] NonSnoopLatencyOverrideValue= 3C
RootPort[9] ForceLtrOverride= 0
RootPort[9] DetectTimeoutMs= 0
RootPort[9] SlotPowerLimitScale= 0
RootPort[9] SlotPowerLimitValue= 0
RootPort[9] EnableCpm= 1
RootPort[9] FormFactor = 0
RootPort[10] HotPlug= 0
RootPort[10] PmSci= 1
RootPort[10] ClkReqDetect= 1
RootPort[10] MrlSensorPresent = 0
RootPort[10] UnsupportedRequestReport= 0
RootPort[10] FatalErrorReport= 0
RootPort[10] NoFatalErrorReport= 0
RootPort[10] CorrectableErrorReport= 0
RootPort[10] SystemErrorOnFatalError= 0
RootPort[10] SystemErrorOnNonFatalError= 0
RootPort[10] SystemErrorOnCorrectableError= 0
RootPort[10] MaxPayload= 1
RootPort[10] SlotImplemented= 1
RootPort[10] AcsEnabled= 1
RootPort[10] PtmEnabled= 1
RootPort[10] AdvancedErrorReporting= 1
RootPort[10] TransmitterHalfSwing= 0
RootPort[10] PcieSpeed= 0
RootPort[10] PhysicalSlotNumber= A
RootPort[10] CompletionTimeout= 0
RootPort[10] Aspm= 4
RootPort[10] L1Substates= 2
RootPort[10] LtrEnable= 1
RootPort[10] LtrConfigLock= 0
RootPort[10] LtrMaxSnoopLatency= 1003
RootPort[10] LtrMaxNoSnoopLatency= 1003
RootPort[10] SnoopLatencyOverrideMode= 2
RootPort[10] SnoopLatencyOverrideMultiplier= 2
RootPort[10] SnoopLatencyOverrideValue= 3C
RootPort[10] NonSnoopLatencyOverrideMode= 2
RootPort[10] NonSnoopLatencyOverrideMultiplier= 2
RootPort[10] NonSnoopLatencyOverrideValue= 3C
RootPort[10] ForceLtrOverride= 0
RootPort[10] DetectTimeoutMs= 0
RootPort[10] SlotPowerLimitScale= 0
RootPort[10] SlotPowerLimitValue= 0
RootPort[10] EnableCpm= 1
RootPort[10] FormFactor = 0
RootPort[11] HotPlug= 0
RootPort[11] PmSci= 1
RootPort[11] ClkReqDetect= 1
RootPort[11] MrlSensorPresent = 0
RootPort[11] UnsupportedRequestReport= 0
RootPort[11] FatalErrorReport= 0
RootPort[11] NoFatalErrorReport= 0
RootPort[11] CorrectableErrorReport= 0
RootPort[11] SystemErrorOnFatalError= 0
RootPort[11] SystemErrorOnNonFatalError= 0
RootPort[11] SystemErrorOnCorrectableError= 0
RootPort[11] MaxPayload= 1
RootPort[11] SlotImplemented= 1
RootPort[11] AcsEnabled= 1
RootPort[11] PtmEnabled= 1
RootPort[11] AdvancedErrorReporting= 1
RootPort[11] TransmitterHalfSwing= 0
RootPort[11] PcieSpeed= 0
RootPort[11] PhysicalSlotNumber= B
RootPort[11] CompletionTimeout= 0
RootPort[11] Aspm= 4
RootPort[11] L1Substates= 2
RootPort[11] LtrEnable= 1
RootPort[11] LtrConfigLock= 0
RootPort[11] LtrMaxSnoopLatency= 1003
RootPort[11] LtrMaxNoSnoopLatency= 1003
RootPort[11] SnoopLatencyOverrideMode= 2
RootPort[11] SnoopLatencyOverrideMultiplier= 2
RootPort[11] SnoopLatencyOverrideValue= 3C
RootPort[11] NonSnoopLatencyOverrideMode= 2
RootPort[11] NonSnoopLatencyOverrideMultiplier= 2
RootPort[11] NonSnoopLatencyOverrideValue= 3C
RootPort[11] ForceLtrOverride= 0
RootPort[11] DetectTimeoutMs= 0
RootPort[11] SlotPowerLimitScale= 0
RootPort[11] SlotPowerLimitValue= 0
RootPort[11] EnableCpm= 1
RootPort[11] FormFactor = 0
OverrideEqualizationDefaults: 0
PcieLinkEqMethod: 0
PcieLinkEqMode: 0
Ph1DownstreamPortTransmitterPreset: 0
Ph1UpstreamPortTransmitterPreset: 0
Ph3NumberOfPresetsOrCoefficients: 0
Phase 3 Coefficient 0, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 1, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 2, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 3, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 4, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 5, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 6, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 7, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 8, pre-cursor = 0, post-cursor = 0
Phase 3 Coefficient 9, pre-cursor = 0, post-cursor = 0
Phase 3 Preset 0 = 0
Phase 3 Preset 1 = 0
Phase 3 Preset 2 = 0
Phase 3 Preset 3 = 0
Phase 3 Preset 4 = 0
Phase 3 Preset 5 = 0
Phase 3 Preset 6 = 0
Phase 3 Preset 7 = 0
Phase 3 Preset 8 = 0
Phase 3 Preset 9 = 0
Phase 3 Preset 10 = 0
LocalTransmitterOverrideEnable = 0
Ph2LocalTransmitterOverridePreset = 0
EnablePort8xhDecode= 0
PchPciePort8xhDecodePortIndex= 0
EnablePeerMemoryWrite= 0
ComplianceTestMode= 0
RpFunctionSwap= 1
--------------------- RST Config ------------------------
Raid0= 1
Raid1= 1
Raid10= 1
Raid5= 1
Irrt= 1
OromUiBanner= 1
OromUiDelay= 0
HddUnlock= 1
LedLocate= 1
IrrtOnly= 1
SmartStorage= 1
LegacyOrom= 0
OptaneMemory= 1
CpuAttachedStorage= 1
RstPcieStorageRemap[0].Enable = 0
RstPcieStorageRemap[0].RstPcieStoragePort = 0
RstPcieStorageRemap[0].DeviceResetDelay = 64
RstPcieStorageRemap[1].Enable = 0
RstPcieStorageRemap[1].RstPcieStoragePort = 0
RstPcieStorageRemap[1].DeviceResetDelay = 64
RstPcieStorageRemap[2].Enable = 0
RstPcieStorageRemap[2].RstPcieStoragePort = 0
RstPcieStorageRemap[2].DeviceResetDelay = 64
------------------ PCH Lock Down Config ------------------
GlobalSmi= 1
BiosInterface= 1
BiosLock= 0
UnlockGpioPads= 0
------------------ PCH Flash Protection Config ------------------
WriteProtectionEnable[0] = 1
ReadProtectionEnable[0] = 0
ProtectedRangeLimit[0] = 160F
ProtectedRangeBase[0] = 1530
WriteProtectionEnable[1] = 1
ReadProtectionEnable[1] = 0
ProtectedRangeLimit[1] = 1FFF
ProtectedRangeBase[1] = 1650
WriteProtectionEnable[2] = 0
ReadProtectionEnable[2] = 0
ProtectedRangeLimit[2] = 0
ProtectedRangeBase[2] = 0
WriteProtectionEnable[3] = 0
ReadProtectionEnable[3] = 0
ProtectedRangeLimit[3] = 0
ProtectedRangeBase[3] = 0
WriteProtectionEnable[4] = 0
ReadProtectionEnable[4] = 0
ProtectedRangeLimit[4] = 0
ProtectedRangeBase[4] = 0
------------------ PCH HSIO Config ------------------
ChipsetInit Binary Pointer = 0
ChipsetInit Binary Length = 0
------------------ PCH FIVR Config ------------------
ExtV1p05Rail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = 64
ExtVnnRail:
EnabledStates = 0
SupportedVoltageStates = 0
Voltage = 1A4
IccMax = C8
ExtVnnRailSx:
EnabledStates = 0
Voltage = 1A4
IccMax = C8
VccinAux:
LowToHighCurModeVolTranTime = C
RetToHighCurModeVolTranTime = 36
RetToLowCurModeVolTranTime = 2B
OffToHighCurModeVolTranTime = 96
FivrDynPm = 1
------------------------ PCH Print Platform Protocol End --------------------------
------------------ Rtc Config ------------------
BiosInterfaceLock = 1
MemoryLock = 1
------------------ PCH Thermal Config ------------------
TTLevels T0Level 0 centigrade degree
TTLevels T1Level 0 centigrade degree
TTLevels T2Level 0 centigrade degree
TTLevels TTEnable 0
TTLevels TTState13Enable 0
TTLevels TTLock 0
TTLevels SuggestedSetting 1
TTLevels PchCrossThrottling 1
DmiHaAWC DmiTsawEn 0
DmiHaAWC TS0TW 3
DmiHaAWC TS1TW 2
DmiHaAWC TS2TW 1
DmiHaAWC TS3TW 0
DmiHaAWC SuggestedSetting 1
MemoryThrottling Enable= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
MemoryThrottling TsGpioPinSetting PmsyncEnable= 0
MemoryThrottling TsGpioPinSetting C0TransmitEnable= 0
MemoryThrottling TsGpioPinSetting PinSelection= 0
PchHotEnable = 0
PchHotLevel = 73
------------------ CNVi Config ------------------
CNVi Mode = 1
BT Core = 1
BT Audio Offload = 0
Pin Muxing:
RF_RESET# = No muxing
CLKREQ = No muxing
------------------ eSPI Config ------------------
LGMR Enable 1
Host C10 Report Enable 0
BME for Master and Slave Enabled 1
Lock Link Configuration 1
Espi Pm HAE 1
------------------ GBE Config ------------------
Enable= 1
LtrEnable= 1
------------------ Tsn Config ------------------
TSN 0 Enable= 0
Tsn0MacAddressHigh = 0
Tsn0MacAddressLow = 0
TsnMultiVcEnable = 0
TsnLinkSpeed= 3
------------------ HDA Config ------------------
Pme = 0
Codec Sx Wake Capability = 0
HD-A Link Frequency = 2
VerbTableEntryNum = 6
VerbTablePtr = 76A02050
------------------ Ieh Config ------------------------
Mode: 0x1
------------------ ISH Config ------------------
SPI0 Enable = 0
SPI0 Cs#0 Enable = 0
Pin muxing:
Mosi = No muxing
Miso = No muxing
Clk = No muxing
Cs#0 = No muxing
Pad termination:
Mosi = GpioTermDefault
Miso = GpioTermDefault
Clk = GpioTermDefault
Cs#0 = GpioTermDefault
UART0 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
UART1 Enable = 0
Pin muxing:
Rx = No muxing
Tx = No muxing
Rts = No muxing
Cts = No muxing
Pad termination:
Rx = GpioTermDefault
Tx = GpioTermDefault
Rts = GpioTermDefault
Cts = GpioTermDefault
I2C0 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C1 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
I2C2 Enable = 0
Pin muxing:
Sda = No muxing
Scl = No muxing
Pad termination:
Sda = GpioTermDefault
Scl = GpioTermDefault
GP_0 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_1 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_2 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_3 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_4 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_5 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_6 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
GP_7 Enable = 0
Pin muxing:
Gpio = No muxing
Pad termination:
Gpio = GpioTermDefault
------------------ Interrupt Config ------------------
Interrupt assignment:
Dxx:Fx INTx IRQ
D31:F3 1 016
D31:F4 1 016
D31:F7 1 016
D30:F0 1 016
D30:F1 2 017
D30:F2 3 036
D30:F3 4 037
D28:F0 1 016
D28:F1 2 017
D28:F2 3 018
D28:F3 4 019
D25:F2 3 033
D23:F0 1 016
D22:F0 1 016
D22:F1 2 017
D22:F4 1 016
D22:F5 4 019
D21:F0 1 027
D21:F1 2 040
D21:F2 3 029
D21:F3 4 030
D20:F0 1 016
D20:F1 2 017
D20:F3 1 016
D19:F0 1 043
D18:F0 1 016
D18:F6 2 034
D17:F0 1 035
D17:F1 2 020
D17:F2 3 021
D17:F3 4 042
D16:F0 3 018
D16:F1 4 019
D16:F6 1 023
D16:F7 2 022
D31:F6 1 016
D30:F4 1 016
D29:F0 1 016
D29:F1 2 017
D29:F2 3 018
D29:F3 4 019
D28:F4 1 016
D28:F5 2 017
D28:F6 3 018
D28:F7 4 019
D25:F0 1 031
D25:F1 2 032
D22:F2 3 018
D22:F3 4 019
D19:F1 2 024
D19:F2 3 025
D19:F3 4 038
Other interrupt configuration:
GpioIrqRoute= 14
SciIrqSelect= 9
TcoIrqEnable= 0
TcoIrqSelect= 9
------------------ IOAPIC Config ------------------
IoApicEntry24_119= 1
Enable8254ClockGating= 1
Enable8254ClockGatingOnS3= 1
IoApicId= 2
------------------ P2SB Config ------------------
SbAccessUnlock= 0
------------------ DMI Config ------------------
PwrOptEnable= 0
DmiAspmCtrl = 4
CwbEnable= 1
DmiPowerReduction= 1
OpioRecenter= 1
------------------ PCH PM Config ------------------
WakeConfig PmeB0S5Dis = 0
WakeConfig WolEnableOverride = 1
WakeConfig LanWakeFromDeepSx = 1
WakeConfig PcieWakeFromDeepSx = 0
WakeConfig WoWlanEnable = 0
WakeConfig WoWlanDeepSxEnable = 0
PchDeepSxPol = 0
PchSlpS3MinAssert = 3
PchSlpS4MinAssert = 1
PchSlpSusMinAssert = 4
PchSlpAMinAssert = 4
SlpStrchSusUp = 0
SlpLanLowDc = 1
PwrBtnOverridePeriod = 0
DisableEnergyReport = 0
DisableDsxAcPresentPulldown = 0
PchPwrCycDur = 0
PciePllSsc = FF
DisableNativePowerButton = 0
MeWakeSts = 1
WolOvrWkSts = 1
EnableTcoTimer = 1
VrAlert = 0
PowerButtonDebounce = 0
PsOnEnable = 0
CpuC10GatePinEnable = 1
PmcDbgMsgEn = 0
ModPhySusPgEnable = 1
Usb2PhySusPgEnable = 1
OsIdleEnable = 1
V1p05PhyExtFetControlEn = 0
V1p05IsExtFetControlEn = 0
LpmS0ixSubStateEnable = FF
S0ixAutoDemotion = 1
LatchEventsC10Exit = 0
EnableTimedGpio0 = 0
EnableTimedGpio1 = 0
GlobalResetMasksOverride = 0
GlobalResetTriggerMask = 0
GlobalResetEventMask = 0
--------------- SATA Config for controller 0 -----------
Enable= 1
SataMode= 0
PortSettings[0] Enabled= 1
PortSettings[0] HotPlug= 0
PortSettings[0] InterlockSw= 0
PortSettings[0] External= 0
PortSettings[0] SpinUp= 0
PortSettings[0] SolidStateDrive= 0
PortSettings[0] DevSlp= 0
PortSettings[0] DevSlpResetConfig= 1
PortSettings[0] EnableDitoConfig= 0
PortSettings[0] DmVal= 0
PortSettings[0] DitoVal= 0
PortSettings[0] ZpOdd= 0
PortSettings[1] Enabled= 1
PortSettings[1] HotPlug= 0
PortSettings[1] InterlockSw= 0
PortSettings[1] External= 0
PortSettings[1] SpinUp= 0
PortSettings[1] SolidStateDrive= 0
PortSettings[1] DevSlp= 0
PortSettings[1] DevSlpResetConfig= 1
PortSettings[1] EnableDitoConfig= 0
PortSettings[1] DmVal= 0
PortSettings[1] DitoVal= 0
PortSettings[1] ZpOdd= 0
SpeedSupport= 0
EsataSpeedLimit= 0
LedEnable= 0
TestMode= 0
SalpSupport= 1
PwrOptEnable= 0
RaidDeviceId= 0
SataRstInterrupt = 0
ThermalThrottling P0T1M 1
ThermalThrottling P0T2M 2
ThermalThrottling P0T3M 3
ThermalThrottling P0TDisp 0
ThermalThrottling P0Tinact 0
ThermalThrottling P0TDispFinit 0
ThermalThrottling P1T1M 1
ThermalThrottling P1T2M 2
ThermalThrottling P1T3M 3
ThermalThrottling P1TDisp 0
ThermalThrottling P1Tinact 0
ThermalThrottling P1TDispFinit 0
ThermalThrottling SuggestedSetting 1
------------------ USB Config ------------------
PdoProgramming = 1
OverCurrentEnable = 1
XhciOcLock = 1
LtrModeEnable = 1
HsiiEnable = 0
PortUsb20[0].Enabled = 1
PortUsb20[0].OverCurrentPin = OC0
PortUsb20[0].PortResetMessageEnable = 0
PortUsb20[1].Enabled = 1
PortUsb20[1].OverCurrentPin = OC255
PortUsb20[1].PortResetMessageEnable = 0
PortUsb20[2].Enabled = 1
PortUsb20[2].OverCurrentPin = OC255
PortUsb20[2].PortResetMessageEnable = 0
PortUsb20[3].Enabled = 1
PortUsb20[3].OverCurrentPin = OC0
PortUsb20[3].PortResetMessageEnable = 0
PortUsb20[4].Enabled = 1
PortUsb20[4].OverCurrentPin = OC0
PortUsb20[4].PortResetMessageEnable = 0
PortUsb20[5].Enabled = 1
PortUsb20[5].OverCurrentPin = OC3
PortUsb20[5].PortResetMessageEnable = 0
PortUsb20[6].Enabled = 1
PortUsb20[6].OverCurrentPin = OC3
PortUsb20[6].PortResetMessageEnable = 0
PortUsb20[7].Enabled = 1
PortUsb20[7].OverCurrentPin = OC0
PortUsb20[7].PortResetMessageEnable = 0
PortUsb20[8].Enabled = 0
PortUsb20[8].OverCurrentPin = OC3
PortUsb20[8].PortResetMessageEnable = 0
PortUsb20[9].Enabled = 1
PortUsb20[9].OverCurrentPin = OC3
PortUsb20[9].PortResetMessageEnable = 0
PortUsb30[0] Enabled = 1
PortUsb30[0].OverCurrentPin = OC0
PortUsb30[1] Enabled = 1
PortUsb30[1].OverCurrentPin = OC0
PortUsb30[2] Enabled = 1
PortUsb30[2].OverCurrentPin = OC255
PortUsb30[3] Enabled = 1
PortUsb30[3].OverCurrentPin = OC255
LtrOverrideEnable = 0
XdciConfig.Enable= 1
USB3LinkSpeed = 0
------------------ USB2 PHY Config ------------------
Port[0].Petxiset = 6
Port[0].Txiset = 0
Port[0].Predeemp = 3
Port[0].Pehalfbit = 0
Port[1].Petxiset = 6
Port[1].Txiset = 0
Port[1].Predeemp = 3
Port[1].Pehalfbit = 0
Port[2].Petxiset = 6
Port[2].Txiset = 0
Port[2].Predeemp = 3
Port[2].Pehalfbit = 0
Port[3].Petxiset = 6
Port[3].Txiset = 0
Port[3].Predeemp = 3
Port[3].Pehalfbit = 0
Port[4].Petxiset = 6
Port[4].Txiset = 0
Port[4].Predeemp = 3
Port[4].Pehalfbit = 0
Port[5].Petxiset = 6
Port[5].Txiset = 0
Port[5].Predeemp = 3
Port[5].Pehalfbit = 0
Port[6].Petxiset = 6
Port[6].Txiset = 0
Port[6].Predeemp = 3
Port[6].Pehalfbit = 0
Port[7].Petxiset = 6
Port[7].Txiset = 0
Port[7].Predeemp = 3
Port[7].Pehalfbit = 0
Port[8].Petxiset = 6
Port[8].Txiset = 0
Port[8].Predeemp = 3
Port[8].Pehalfbit = 0
Port[9].Petxiset = 6
Port[9].Txiset = 0
Port[9].Predeemp = 3
Port[9].Pehalfbit = 0
------------------ USB3 HSIO Config ------------------
Port[0].HsioTxDeEmphEnable = 0
Port[0].HsioTxDeEmph = 0
Port[0].HsioTxDownscaleAmpEnable = 0
Port[0].HsioTxDownscaleAmp = 0
Port[0].HsioCtrlAdaptOffsetCfgEnable = 0
Port[0].HsioCtrlAdaptOffsetCfg = 0
Port[0].HsioFilterSelNEnable = 0
Port[0].HsioFilterSelN = 0
Port[0].HsioFilterSelPEnable = 0
Port[0].HsioFilterSelP = 0
Port[0].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[0].HsioOlfpsCfgPullUpDwnRes = 3
Port[0].HsioTxRate0UniqTranEnable = 0
Port[0].HsioTxRate0UniqTran = 4C
Port[0].HsioTxRate1UniqTranEnable = 0
Port[0].HsioTxRate1UniqTran = 4C
Port[0].HsioTxRate2UniqTranEnable = 0
Port[0].HsioTxRate2UniqTran = 4C
Port[0].HsioTxRate3UniqTranEnable = 0
Port[0].HsioTxRate3UniqTran = 4C
Port[1].HsioTxDeEmphEnable = 0
Port[1].HsioTxDeEmph = 0
Port[1].HsioTxDownscaleAmpEnable = 0
Port[1].HsioTxDownscaleAmp = 0
Port[1].HsioCtrlAdaptOffsetCfgEnable = 0
Port[1].HsioCtrlAdaptOffsetCfg = 0
Port[1].HsioFilterSelNEnable = 0
Port[1].HsioFilterSelN = 0
Port[1].HsioFilterSelPEnable = 0
Port[1].HsioFilterSelP = 0
Port[1].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[1].HsioOlfpsCfgPullUpDwnRes = 3
Port[1].HsioTxRate0UniqTranEnable = 0
Port[1].HsioTxRate0UniqTran = 4C
Port[1].HsioTxRate1UniqTranEnable = 0
Port[1].HsioTxRate1UniqTran = 4C
Port[1].HsioTxRate2UniqTranEnable = 0
Port[1].HsioTxRate2UniqTran = 4C
Port[1].HsioTxRate3UniqTranEnable = 0
Port[1].HsioTxRate3UniqTran = 4C
Port[2].HsioTxDeEmphEnable = 0
Port[2].HsioTxDeEmph = 0
Port[2].HsioTxDownscaleAmpEnable = 0
Port[2].HsioTxDownscaleAmp = 0
Port[2].HsioCtrlAdaptOffsetCfgEnable = 0
Port[2].HsioCtrlAdaptOffsetCfg = 0
Port[2].HsioFilterSelNEnable = 0
Port[2].HsioFilterSelN = 0
Port[2].HsioFilterSelPEnable = 0
Port[2].HsioFilterSelP = 0
Port[2].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[2].HsioOlfpsCfgPullUpDwnRes = 3
Port[2].HsioTxRate0UniqTranEnable = 0
Port[2].HsioTxRate0UniqTran = 4C
Port[2].HsioTxRate1UniqTranEnable = 0
Port[2].HsioTxRate1UniqTran = 4C
Port[2].HsioTxRate2UniqTranEnable = 0
Port[2].HsioTxRate2UniqTran = 4C
Port[2].HsioTxRate3UniqTranEnable = 0
Port[2].HsioTxRate3UniqTran = 4C
Port[3].HsioTxDeEmphEnable = 0
Port[3].HsioTxDeEmph = 0
Port[3].HsioTxDownscaleAmpEnable = 0
Port[3].HsioTxDownscaleAmp = 0
Port[3].HsioCtrlAdaptOffsetCfgEnable = 0
Port[3].HsioCtrlAdaptOffsetCfg = 0
Port[3].HsioFilterSelNEnable = 0
Port[3].HsioFilterSelN = 0
Port[3].HsioFilterSelPEnable = 0
Port[3].HsioFilterSelP = 0
Port[3].HsioOlfpsCfgPullUpDwnResEnable = 0
Port[3].HsioOlfpsCfgPullUpDwnRes = 3
Port[3].HsioTxRate0UniqTranEnable = 0
Port[3].HsioTxRate0UniqTran = 4C
Port[3].HsioTxRate1UniqTranEnable = 0
Port[3].HsioTxRate1UniqTran = 4C
Port[3].HsioTxRate2UniqTranEnable = 0
Port[3].HsioTxRate2UniqTran = 4C
Port[3].HsioTxRate3UniqTranEnable = 0
Port[3].HsioTxRate3UniqTran = 4C
------------------ PCH Thc Config ------------------------
THC ports:
PORT0 Assignment: 0x0
PORT0 Interrupt Pin Muxing: No muxing
PORT1 Assignment: 0x0
PORT1 Interrupt Pin Muxing: No muxing
------------------ Psf Config ------------------------
TccEnable: 0x0
------------------ Fusa Config ------------------------
DisplayFusaConfigEnable: 0x1
GraphicFusaConfigEnable: 0x1
OpioFusaConfigEnable: 0x1
PsfFusaConfigEnable: 0x1
------------------ Hybrid Storage Config ------------------
Hybrid Storage Mode = 0
------------------ TCC Sub Region Config ------------------
Software SRAM Enabled = 0
DSO Tuning Enabled = 0
Error Log Enabled = 0
Cache Cfg - Base Address = 0x0
Cache Cfg - Size = 0x0
Stream Cfg - Base Address = 0x0
Stream Cfg - Size = 0x0
Stream Cfg - Status = 0x0
Crl Bin - Base Address = 0x0
Crl Bin - Size = 0x0
Ifu Enabled = 0
------------------ SPI Config ------------------------
ExtendedBiosDecodeRangeEnable: 0x0
ExtendedBiosDecodeRangeBase: 0x0
ExtendedBiosDecodeRangeLimit: 0xFFFF
---------------------- AmtPolicyPpi Print Begin -----------------
Revision : 0x1
------------------------ AMT_PEI_CONFIG -----------------
Revision : 0x1
AmtEnabled : 0x1
WatchDogEnabled : 0x0
FwProgress : 0x0
WatchDogTimerOs : 0x0
WatchDogTimerBios : 0x0
ManageabilityMode : 0x0
AmtSolEnabled : 0x0
RemoteAssistance : 0x0
AmtKvmEnabled : 0x0
ForcMebxSyncUp : 0x0
---------------------- AmtPolicyPpi Print End -------------------
---------------------- Me Config Block Print Begin -----------------
------------------------ ME_PEI_CONFIG -----------------
Revision : 0x3
MctpBroadcastCycle : 0x0
EndOfPostMessage : 0x2
DisableD0I3SettingForHeci : 0x0
EnforceEDebugMode : 0x0
MeUnconfigOnRtcClear : 0x1
---------------------- Me Config Block Print End -------------------
------------------------ SA Policy (PEI) Print BEGIN ------------------------
Revision : 0x1
------------------------ SA_MISC_PEI_CONFIG ------------------------
Revision : 1
------------------------ GRAPHICS_PEI_CONFIG -----------------
Revision : 7
RenderStandby : 0x1
PmSupport : 0x1
PavpEnable : 0x1
CdClock : 0xFF
SkipCdClockInit : 0x0
PeiGraphicsPeimInit : 0x1
LogoPtr : 0x0
LogoSize : 0x0
BltBufferAdress : 0x0
BltBufferSize : 0x0
GraphicsConfigPtr : 0x76A5B91C
CdynmaxClampEnable : 0x0
GtFreqMax : 0xFF
DisableTurboGt : 0x0
------------------------ GRAPHICS_PEI_CONFIG Print END -----------------
------------------------ GNA_CONFIG -----------------
Revision : 1
------------------------ GNA_CONFIG Print END -----------------
----------------------- VMD_PEI_CONFIG -----------------
Revision : 4
VMD Enable : 0
VMD Global Mapping : 0
VMD VmdCfgBarSize : 0
VMD VmdMemBarSize1 : 0
VMD VmdMemBarSize2 : 0
VMD VmdCfgBarAttr : 0
VMD VmdMemBar1Attr : 0
VMD VmdMemBar2Attr : 0
VMD VmdCfgBarBase : 0xA0000000
VMD VmdMemBar1Base : 0xA2000000
VMD VmdMemBar2Base : 0xA4000000
Vmd OS Variable details
VMD Request Entry Count is 26
Storage device B/D/F or RpIndex/D/F is 90/26/2
Storage device B/D/F or RpIndex/D/F is 4/5/0
Storage device B/D/F or RpIndex/D/F is 6/7/0
Storage device B/D/F or RpIndex/D/F is 8/9/0
Storage device B/D/F or RpIndex/D/F is 10/11/0
Storage device B/D/F or RpIndex/D/F is 12/13/0
Storage device B/D/F or RpIndex/D/F is 14/15/0
Storage device B/D/F or RpIndex/D/F is 16/17/0
Storage device B/D/F or RpIndex/D/F is 18/19/0
Storage device B/D/F or RpIndex/D/F is 20/21/0
Storage device B/D/F or RpIndex/D/F is 22/23/0
Storage device B/D/F or RpIndex/D/F is 24/25/0
Storage device B/D/F or RpIndex/D/F is 26/27/0
Storage device B/D/F or RpIndex/D/F is 28/29/0
Storage device B/D/F or RpIndex/D/F is 30/31/0
Storage device B/D/F or RpIndex/D/F is 32/1/1
Storage device B/D/F or RpIndex/D/F is 34/3/1
Storage device B/D/F or RpIndex/D/F is 36/5/1
Storage device B/D/F or RpIndex/D/F is 38/7/1
Storage device B/D/F or RpIndex/D/F is 40/9/1
Storage device B/D/F or RpIndex/D/F is 42/11/1
Storage device B/D/F or RpIndex/D/F is 44/13/1
Storage device B/D/F or RpIndex/D/F is 46/15/1
Storage device B/D/F or RpIndex/D/F is 48/17/1
Storage device B/D/F or RpIndex/D/F is 50/19/1
Storage device B/D/F or RpIndex/D/F is 52/21/1
-------------------- VMD_CONFIG Print END -----------------
----------------------- Telemetry_PEI_CONFIG -----------------
Revision : 1
Telemetry CpuCrashLogEnable : 1
-------------------- Telemetry_CONFIG Print END -----------------
------------------ HostBridge Pei Config ------------------
Revision : 1
Device4Enable : 0x0
SkipPamLock : 0x0
EdramTestMode : 0x2
------------------ Serial IO Config ------------------
SPI[0].Mode = 0
SPI[0].DefaultCsOutput = 0
SPI[0].CsMode = 0
SPI[0].CsState = 0
SPI[0].CsEnable[0] = 1
SPI[0].CsPolarity[0] = 1
SPI[0].CsEnable[1] = 0
SPI[0].CsPolarity[1] = 1
SPI[1].Mode = 1
SPI[1].DefaultCsOutput = 0
SPI[1].CsMode = 0
SPI[1].CsState = 0
SPI[1].CsEnable[0] = 1
SPI[1].CsPolarity[0] = 1
SPI[1].CsEnable[1] = 0
SPI[1].CsPolarity[1] = 1
SPI[2].Mode = 0
SPI[2].DefaultCsOutput = 0
SPI[2].CsMode = 0
SPI[2].CsState = 0
SPI[2].CsEnable[0] = 1
SPI[2].CsPolarity[0] = 1
SPI[2].CsEnable[1] = 0
SPI[2].CsPolarity[1] = 1
SPI[3].Mode = 0
SPI[3].DefaultCsOutput = 0
SPI[3].CsMode = 0
SPI[3].CsState = 0
SPI[3].CsEnable[0] = 1
SPI[3].CsPolarity[0] = 1
SPI[3].CsEnable[1] = 0
SPI[3].CsPolarity[1] = 1
SPI[4].Mode = 0
SPI[4].DefaultCsOutput = 0
SPI[4].CsMode = 0
SPI[4].CsState = 0
SPI[4].CsEnable[0] = 1
SPI[4].CsPolarity[0] = 1
SPI[4].CsEnable[1] = 0
SPI[4].CsPolarity[1] = 1
SPI[5].Mode = 0
SPI[5].DefaultCsOutput = 0
SPI[5].CsMode = 0
SPI[5].CsState = 0
SPI[5].CsEnable[0] = 1
SPI[5].CsPolarity[0] = 1
SPI[5].CsEnable[1] = 0
SPI[5].CsPolarity[1] = 1
SPI[6].Mode = 0
SPI[6].DefaultCsOutput = 0
SPI[6].CsMode = 0
SPI[6].CsState = 0
SPI[6].CsEnable[0] = 1
SPI[6].CsPolarity[0] = 1
SPI[6].CsEnable[1] = 0
SPI[6].CsPolarity[1] = 1
UART[0].Mode = 4
UART[0].Attributes.BaudRate = 115200
UART[0].Attributes.Parity = 1
UART[0].Attributes.DataBits = 8
UART[0].Attributes.StopBits = 1
UART[0].Attributes.AutoFlow = 1
UART[0].PinMux.Rx = 0x190B0208
UART[0].PinMux.Tx = 0x190B1209
UART[0].PinMux.Rts = 0x190B220A
UART[0].PinMux.Cts = 0x190B320B
UART[0].DBG2 = 0
UART[0].PowerGating = 2
UART[0].DmaEnable = 1
UART[1].Mode = 0
UART[1].Attributes.BaudRate = 115200
UART[1].Attributes.Parity = 1
UART[1].Attributes.DataBits = 8
UART[1].Attributes.StopBits = 1
UART[1].Attributes.AutoFlow = 1
UART[1].PinMux.Rx = 0x0
UART[1].PinMux.Tx = 0x0
UART[1].PinMux.Rts = 0x0
UART[1].PinMux.Cts = 0x0
UART[1].DBG2 = 0
UART[1].PowerGating = 2
UART[1].DmaEnable = 1
UART[2].Mode = 2
UART[2].Attributes.BaudRate = 115200
UART[2].Attributes.Parity = 1
UART[2].Attributes.DataBits = 8
UART[2].Attributes.StopBits = 1
UART[2].Attributes.AutoFlow = 0
UART[2].PinMux.Rx = 0x0
UART[2].PinMux.Tx = 0x0
UART[2].PinMux.Rts = 0x0
UART[2].PinMux.Cts = 0x0
UART[2].DBG2 = 0
UART[2].PowerGating = 2
UART[2].DmaEnable = 0
UART[3].Mode = 0
UART[3].Attributes.BaudRate = 115200
UART[3].Attributes.Parity = 1
UART[3].Attributes.DataBits = 8
UART[3].Attributes.StopBits = 1
UART[3].Attributes.AutoFlow = 1
UART[3].PinMux.Rx = 0x0
UART[3].PinMux.Tx = 0x0
UART[3].PinMux.Rts = 0x0
UART[3].PinMux.Cts = 0x0
UART[3].DBG2 = 0
UART[3].PowerGating = 2
UART[3].DmaEnable = 1
UART[4].Mode = 0
UART[4].Attributes.BaudRate = 115200
UART[4].Attributes.Parity = 1
UART[4].Attributes.DataBits = 8
UART[4].Attributes.StopBits = 1
UART[4].Attributes.AutoFlow = 1
UART[4].PinMux.Rx = 0x0
UART[4].PinMux.Tx = 0x0
UART[4].PinMux.Rts = 0x0
UART[4].PinMux.Cts = 0x0
UART[4].DBG2 = 0
UART[4].PowerGating = 2
UART[4].DmaEnable = 1
UART[5].Mode = 0
UART[5].Attributes.BaudRate = 115200
UART[5].Attributes.Parity = 1
UART[5].Attributes.DataBits = 8
UART[5].Attributes.StopBits = 1
UART[5].Attributes.AutoFlow = 0
UART[5].PinMux.Rx = 0x0
UART[5].PinMux.Tx = 0x0
UART[5].PinMux.Rts = 0x0
UART[5].PinMux.Cts = 0x0
UART[5].DBG2 = 0
UART[5].PowerGating = 2
UART[5].DmaEnable = 0
UART[6].Mode = 0
UART[6].Attributes.BaudRate = 115200
UART[6].Attributes.Parity = 1
UART[6].Attributes.DataBits = 8
UART[6].Attributes.StopBits = 1
UART[6].Attributes.AutoFlow = 0
UART[6].PinMux.Rx = 0x0
UART[6].PinMux.Tx = 0x0
UART[6].PinMux.Rts = 0x0
UART[6].PinMux.Cts = 0x0
UART[6].DBG2 = 0
UART[6].PowerGating = 2
UART[6].DmaEnable = 0
I2C[0].Mode = 1
I2C[0].PinMux.Sda = 0x0
I2C[0].PinMux.Scl = 0x0
I2C[0].PadTermination = 0
I2C[1].Mode = 1
I2C[1].PinMux.Sda = 0x0
I2C[1].PinMux.Scl = 0x0
I2C[1].PadTermination = 0
I2C[2].Mode = 0
I2C[2].PinMux.Sda = 0x0
I2C[2].PinMux.Scl = 0x0
I2C[2].PadTermination = 0
I2C[3].Mode = 0
I2C[3].PinMux.Sda = 0x0
I2C[3].PinMux.Scl = 0x0
I2C[3].PadTermination = 0
I2C[4].Mode = 0
I2C[4].PinMux.Sda = 0x0
I2C[4].PinMux.Scl = 0x0
I2C[4].PadTermination = 0
I2C[5].Mode = 0
I2C[5].PinMux.Sda = 0x0
I2C[5].PinMux.Scl = 0x0
I2C[5].PadTermination = 0
I2C[6].Mode = 0
I2C[6].PinMux.Sda = 0x0
I2C[6].PinMux.Scl = 0x0
I2C[6].PadTermination = 0
I2C[7].Mode = 0
I2C[7].PinMux.Sda = 0x0
I2C[7].PinMux.Scl = 0x0
I2C[7].PadTermination = 0
------------------------ SiCpuPolicy Print Begin in PostMem-----------------
Revision= 1
------------------ CPU Config ------------------
CPU_CONFIG : AesEnable : 0x1
CPU_CONFIG : TxtEnable : 0x0
CPU_CONFIG : MicrocodePatchAddress : 0xFFC15000
CPU_CONFIG : PpinSupport : 0x0
CPU_CONFIG : AvxDisable : 0x0
CPU_CONFIG : Avx3Disable : 0x0
CPU_CONFIG : RaceConditionResponse : 0x0
CPU_CONFIG : AcSplitLock : 0x0
CPU_CONFIG : SmbiosType4MaxSpeedOverride : 0
------------------ CPU BIOS Guard Config ------------------
BIOS_GUARD_CONFIG:: EcCmdProvisionEav : 0xFF
BIOS_GUARD_CONFIG:: EcCmdLock : 0xFF
BIOS_GUARD_CONFIG:: BiosGuardModulePtr : 0xFFFFFFFFFFFFFFFF
BIOS_GUARD_CONFIG:: Platform attributes : 0xFFFFFFFF
BIOS_GUARD_CONFIG:: SendEcCmd : 0xFFFFFFFF
------------------ CPU Power Mgmt Basic Config ------------------
CPU_POWER_MGMT_BASIC_CONFIG : OneCoreRatioLimit : 0x0 , TwoCoreRatioLimit = 0x0 , ThreeCoreRatioLimit = 0x0 , FourCoreRatioLimit = 0x0, FiveCoreRatioLimit = 0x0, SixCoreRatioLimit = 0x0, SevenCoreRatioLimit = 0x0, EightCoreRatioLimit = 0x0
CPU_POWER_MGMT_BASIC_CONFIG: Hwp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: SkipSetBootPState : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HdcControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: (Intel Turbo Boost Max Technology 3.0)EnableItbm : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2 : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TurboPowerLimitLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3DutyCycle : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4Lock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetClamp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetLock : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TurboMode : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: TccActivationOffset : 0xA
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit2Power : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit4 : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit1Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: PowerLimit3Time : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: TccOffsetTimeWindowForRatl : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: HwpInterruptControl : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnablePerCorePState : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoPerCorePstate : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableHwpAutoEppGrouping : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: EnableEpbPeciOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: EnableFastMsrHwpReq : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: MinRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: MaxRingRatioLimit : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: ApplyConfigTdp : 0x1
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionOverride : 0x0
CPU_POWER_MGMT_BASIC_CONFIG: VccInDemotionMs : 0x1E
------------------ CPU Power Mgmt Custom Config ------------------
CustomRatioTable...
CPU_POWER_MGMT_CUSTOM_CONFIG: VidNumber : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: VidCpuid : 0x6C1
CPU_POWER_MGMT_CUSTOM_CONFIG: VidMaxRatio : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[16] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[17] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[18] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[19] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[20] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[21] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[22] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[23] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[24] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[25] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[26] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[27] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[28] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[29] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[30] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[31] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[32] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[33] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[34] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[35] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[36] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[37] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[38] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatio[39] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[0] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[1] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[2] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[3] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[4] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[5] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[6] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[7] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[8] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[9] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[10] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[11] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[12] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[13] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[14] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: StateRatioMax16[15] : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[0] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[1] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit2 : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomPowerLimit1Time : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: CustomConfigTdpTable[2] CustomTurboActivationRatio : 0x14
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpLock : 0x0
CPU_POWER_MGMT_CUSTOM_CONFIG: ConfigTdpBios : 0x0
------------------ CPU Power Mgmt Psys Config ------------------
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2Power = 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPmax : 0xAC
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1 : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit1Time : 0x0
CPU_POWER_MGMT_PSYS_CONFIG: PsysPowerLimit2 : 0x0
------------------ CPU Test Config ------------------
CPU_TEST_CONFIG: MlcStreamerPrefetcher : 0x1
CPU_TEST_CONFIG: MlcSpatialPrefetcher : 0x1
CPU_TEST_CONFIG: MonitorMwaitEnable : 0x1
CPU_TEST_CONFIG: MachineCheckEnable : 0x1
CPU_TEST_CONFIG: ProcessorTraceOutputScheme : 0x0
CPU_TEST_CONFIG: ProcessorTraceEnable : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemBase : 0x0
CPU_TEST_CONFIG: ProcessorTraceMemLength : 0x0
CPU_TEST_CONFIG: ThreeStrikeCounterDisable : 0x0
CPU_TEST_CONFIG: PcdCpuApLoopMode: 0x2
------------------ CPU PID Test Config ------------------
CPU_PID_TEST_CONFIG : PidTuning : 0x0
------------------ CPU Power Mgmt Test Config ------------------
CPU_POWER_MGMT_TEST_CONFIG: Eist : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientPState : 0x1
CPU_POWER_MGMT_TEST_CONFIG: EnergyEfficientTurbo : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TStates : 0x1
CPU_POWER_MGMT_TEST_CONFIG: BiProcHot : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableProcHotOut : 0x1
CPU_POWER_MGMT_TEST_CONFIG: ProcHotResponse : 0x1
CPU_POWER_MGMT_TEST_CONFIG: DisableVrThermalAlert : 0x0
CPU_POWER_MGMT_TEST_CONFIG: EnableAllThermalFunctions : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ThermalMonitor : 0x1
CPU_POWER_MGMT_TEST_CONFIG: Cx : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PmgCstCfgCtrlLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1e : 0x0
CPU_POWER_MGMT_TEST_CONFIG: C1Autodemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: C1Undemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCState Demotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: PkgCstateUndemotion : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CStatePreWake : 0x1
CPU_POWER_MGMT_TEST_CONFIG: TimedMwait : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstCfgCtrIoMwaitRedirection : 0x0
CPU_POWER_MGMT_TEST_CONFIG: ProcHotLock : 0x1
CPU_POWER_MGMT_TEST_CONFIG: RaceToHalt : 0x1
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5Irtl : 0x0
CPU_POWER_MGMT_TEST_CONFIG: PkgCStateLimit : 0x8
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl1TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl2TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl3TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl4TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CstateLatencyControl5TimeUnit : 0x2
CPU_POWER_MGMT_TEST_CONFIG: CustomPowerUnit : 0x1
PpmIrmSetting : 0x0
------------------------ SiCpuPolicy Print End in PostMem -----------------
------------------------ TCSS_PEI_CONFIG -----------------
Revision : 3
TcssPeiConfig->IomAuxPortPad[0].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[0].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[1].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[2].GpioPullP 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullN 0x00000000
TcssPeiConfig->IomAuxPortPad[3].GpioPullP 0x00000000
TcssPeiConfig->UsbConfig.PortUsb30[0].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[1].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[2].Enable 0x00000001
TcssPeiConfig->UsbConfig.PortUsb30[3].Enable 0x00000001
TcssPeiConfig->IomConfig.IomOverrides.AuxOri 0x0000
TcssPeiConfig->IomConfig.IomOverrides.HslOri 0x0000
TcssPeiConfig->IomConfig.IomInterface.VccSt 1
TcssPeiConfig->IomConfig.IomInterface.UsbOverride 0
TcssPeiConfig->IomConfig.IomInterface.D3HotEnable 0
TcssPeiConfig->IomConfig.IomInterface.D3ColdEnable 1
TcssPeiConfig->IomConfig.TcStateLimit 10
TcssPeiConfig->IomConfig.DisableTccoldOnUsbConnected 0
TcssPeiConfig->MiscConfig.IomStayInTCColdeSeconds 50
TcssPeiConfig->MiscConfig.IomBeforeEnteringTCCodeSeconds 10
TcssPeiConfig->IomConfig.PmcInterface.PmcPdEnable 1
------------------------ SA_PEI_PCIE_COMMON_CONFIG -----------------
Itbt Root Port 0 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 1 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 2 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 60
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
Itbt Root Port 3 Config :
AcsEnabled : 1
DpcEnabled : 1
LtrEnable : 1
ItbtPcieRootPortPTM : 0
Aspm : 1
SlotNumber : 0
SlotPowerLimitScale : 0
SlotPowerLimitValue : 0
AdvancedErrorReporting : 0
UnsupportedRequestReport : 0
FatalErrorReport : 0
NoFatalErrorReport : 0
SystemErrorOnFatalError : 0
SystemErrorOnNonFatalError : 0
SystemErrorOnCorrectableError : 0
LtrMaxSnoopLatency : 0
LtrMaxNoSnoopLatency : 0
SnoopLatencyOverrideMode : 1
SnoopLatencyOverrideMultiplier : 2
SnoopLatencyOverrideValue : 200
NonSnoopLatencyOverrideMode : 1
NonSnoopLatencyOverrideMultiplier : 2
NonSnoopLatencyOverrideValue : 200
ForceLtrOverride : 0
LtrConfigLock : 0
[TBT] TbtPrintPolicyConfig Start
------------------------ ITBT Policy (PEI) Print BEGIN -----------------
Revision : 0x1
Revision : 2
PeiITbtConfig->ITbtGenericConfig.ITbtForcePowerOnTimeoutInMs = 1F4
PeiITbtConfig->ITbtGenericConfig.ITbtConnectTopologyTimeoutInMs = 1388
PeiITbtConfig->ITbtGenericConfig.ITbtPcieTunnelingForUsb4 = 1
PeiITbtConfig->ITbtRootPortConfig[0].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[1].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[2].ITbtPcieRootPortEn = 0
PeiITbtConfig->ITbtRootPortConfig[3].ITbtPcieRootPortEn = 0
------------------------ ITBT Policy (PEI) Print END -----------------
------------------------ CPU_PCIE_Config -----------------
FiaProgramming = 1
ClockGating= 1
PowerGating= 1
SlotSelection= 1
Serl : 0x1
ComplianceTestMode= 0
RpFunctionSwap= 1
EnablePeerMemoryWrite= 0
PcieDeviceOverrideTablePtr= 0
RootPort[0] PcieGen3PresetCoeffSelection= 1
RootPort[0] PcieGen4PresetCoeffSelection= 1
RootPort[0] HotPlug= 0
RootPort[0] PmSci= 1
RootPort[0] ExtSync= 0
RootPort[0] UnsupportedRequestReport= 0
RootPort[0] FatalErrorReport= 0
RootPort[0] NoFatalErrorReport= 0
RootPort[0] CorrectableErrorReport= 0
RootPort[0] SystemErrorOnFatalError= 0
RootPort[0] SystemErrorOnNonFatalError= 0
RootPort[0] SystemErrorOnCorrectableError= 0
RootPort[0] MaxPayload= 1
RootPort[0] DpcEnabled= 1
RootPort[0] RpDpcExtensionsEnabled= 1
RootPort[0] SlotImplemented= 1
RootPort[0] AcsEnabled= 1
RootPort[0] PtmEnabled= 1
RootPort[0] VcEnabled= 1
RootPort[0] MultiVcEnabled= 0
RootPort[0] PeerToPeer= 0
RootPort[0] FOMS Control Policy= 0
RootPort[0] AdvancedErrorReporting= 1
RootPort[0] TransmitterHalfSwing= 0
RootPort[0] Gen3EqPh3Method= 1
RootPort[0] PhysicalSlotNumber= 0
RootPort[0] CompletionTimeout= 0
RootPort[0] Aspm= 2
RootPort[0] L1Substates= 2
RootPort[0] LtrEnable= 1
RootPort[0] LtrConfigLock= 0
RootPort[0] LtrMaxSnoopLatency= 1003
RootPort[0] LtrMaxNoSnoopLatency= 1003
RootPort[0] SnoopLatencyOverrideMode= 2
RootPort[0] SnoopLatencyOverrideMultiplier= 2
RootPort[0] SnoopLatencyOverrideValue= 3C
RootPort[0] NonSnoopLatencyOverrideMode= 2
RootPort[0] NonSnoopLatencyOverrideMultiplier= 2
RootPort[0] NonSnoopLatencyOverrideValue= 3C
RootPort[0] ForceLtrOverride= 0
RootPort[0] DetectTimeoutMs= 0
RootPort[0] Gen3Uptp= 7
RootPort[0] Gen3Dptp= 7
RootPort[0] Gen4Uptp= 8
RootPort[0] gen4Dptp= 9
RootPort[0] Gen5Uptp= 7
RootPort[0] gen5Dptp= 7
RootPort[0] EnableCpm= 1
RootPort[0] HwEqGen3Coeff0ListCm= 3
RootPort[0] HwEqGen3Coeff1ListCm= 3
RootPort[0] HwEqGen3Coeff2ListCm= 0
RootPort[0] HwEqGen3Coeff3ListCm= 0
RootPort[0] HwEqGen3Coeff4ListCm= 0
RootPort[0] HwEqGen3Coeff0ListCp= 4
RootPort[0] HwEqGen3Coeff1ListCp= 4
RootPort[0] HwEqGen3Coeff2ListCp= 0
RootPort[0] HwEqGen3Coeff3ListCp= 0
RootPort[0] HwEqGen3Coeff4ListCp= 0
RootPort[0] HwEqGen4Coeff0ListCm= 6
RootPort[0] HwEqGen4Coeff1ListCm= 6
RootPort[0] HwEqGen4Coeff2ListCm= 0
RootPort[0] HwEqGen4Coeff3ListCm= 0
RootPort[0] HwEqGen4Coeff4ListCm= 0
RootPort[0] HwEqGen4Coeff0ListCp= A
RootPort[0] HwEqGen4Coeff1ListCp= A
RootPort[0] HwEqGen4Coeff2ListCp= 0
RootPort[0] HwEqGen4Coeff3ListCp= 0
RootPort[0] HwEqGen4Coeff4ListCp= 0
------------------------ CPU_PCIE_Config Print END -----------------
------------------ CPU Power Mgmt VR Config ------------------
CPU_POWER_MGMT_VR_CONFIG : VrConfigEnable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcCurrentLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : DcLoadline[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Psi1Threshold[0] : 0x50
CPU_POWER_MGMT_VR_CONFIG : Psi2Threshold[0] : 0x14
CPU_POWER_MGMT_VR_CONFIG : Psi3Threshold[0] : 0x4
CPU_POWER_MGMT_VR_CONFIG : Psi3Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : Psi4Enable[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : ImonSlope[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : ImonOffset[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : IccMax[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : VrVoltageLimit[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcEnable[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : TdcTimeWindow[0] : 0x1
CPU_POWER_MGMT_VR_CONFIG : TdcLock[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG : Irms[0] : 0x0
CPU_POWER_MGMT_VR_CONFIG:: FastPkgCRampDisable for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SlowSlewRate for Index = 0 : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysSlope : 0x0
CPU_POWER_MGMT_VR_CONFIG : PsysOffset : 0x0
CPU_POWER_MGMT_VR_CONFIG : AcousticNoiseMitigation : 0x0
CPU_POWER_MGMT_VR_CONFIG:: SendVrMbxCmd : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrRfiFrequency : 0x0
CPU_POWER_MGMT_VR_CONFIG : FivrSpectrumEnable : 0x1
CPU_POWER_MGMT_VR_CONFIG : FivrSpreadSpectrum : 0x8
CPU_POWER_MGMT_VR_CONFIG : EnableMinVoltageOverride : 0x0
CPU_POWER_MGMT_VR_CONFIG : PreWake : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampUp : 0x0
CPU_POWER_MGMT_VR_CONFIG : RampDown : 0x0
CPU_POWER_MGMT_VR_CONFIG : RfiMitigation : 0x0
Install PPI: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779
Notify: PPI Guid: D570DE8C-B9C4-4FFA-ADEE-A5827CE31779, Peim notify entry point: 76F019C7
SiInit () - Start
FuSA supported sku detected
FusaInit() Start
Disable C1e in fusa mode
IOP FUSA override Function
OPIO FUSA override Fuction
Enable Fusa on Opio
Enable Fusa on Graphics
Enable Fusa on Display
PSF CPU FUSA override Function
Read Default PSF Config = 0360
Read Default PSF Config = 0360
Enable Fusa on PSF
Read After PSF Config = 0F60
Read After PSF Config = 0F60
Lock FUSA Display Lock Bit 0x3000301
Lock FUSA Graphics Lock Bit 0x41
FusaInit() End
FuSA supported sku detected
ConfigurePsmi () - Start
ConfigurePsmi () - PSMI disabled
PeiSiPolicyOverride ()
SubsystemID programming on Internal Devices
MePostMemInit () - Start
POSTCODE=<00009E02> - ME-BIOS: MBP Entry.
PrepareMeBiosPayload () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80080007
00: F0 02 00 00 00 00 00 00
[HECI1] Got msg Success: 80CC0007
00: F0 82 00 00 32 0D 00 00 - 01 01 03 02 0F 00 00 00
10: 23 00 9F 07 01 04 09 03 - FD 52 A0 98 F8 47 6B 93
20: DB C5 E9 CD 0C A8 D5 C4 - 10 42 C7 54 24 A7 FD C0
30: 87 5B 22 68 98 FF 7C 3D - 01 07 04 02 00 00 00 00
40: 00 00 00 00 9B 01 00 00 - 01 0F 02 02 00 00 00 00
50: 05 01 02 02 01 00 01 00 - 05 03 04 02 0D 71 FF FF
60: FF FF 08 06 10 00 08 00 - 08 02 0A 03 74 50 4F 7D
70: 8D 44 A2 C5 CA 1C 36 7B - 0F F5 2B 0A 11 C3 7F 15
80: 91 62 4A 53 30 5C 28 FD - B3 FC E5 6C 60 DC 6B 38
90: 01 08 02 00 00 00 00 00 - 01 05 02 00 91 03 00 42
A0: 01 02 02 00 00 92 31 31 - 01 09 02 00 07 50 F6 21
B0: 01 0E 02 02 01 01 04 00 - 01 0D 05 02 01 00 00 00
C0: 32 01 0E 02 1A 00 0D 00 - 00 00 00 00
ReadMsg returned Success
MsgGetMbpAck->MkhiHeader.Fields.Command = 2
MsgGetMbpAck->MkhiHeader.Fields.IsResponse = 1
MsgGetMbpAck->MkhiHeader.Fields.Result = 0
No. of Mbp Entries: 13
MBP Item 0 header: 02030101
00: 0F 00 00 00 23 00 9F 07
MBP Item 1 header: 03090401
00: FD 52 A0 98 F8 47 6B 93 - DB C5 E9 CD 0C A8 D5 C4
10: 10 42 C7 54 24 A7 FD C0 - 87 5B 22 68 98 FF 7C 3D
Unknown MBP Item 2 header: 02040701
MBP Item 3 header: 02020F01
00: 00 00 00 00
Unknown MBP Item 4 header: 02020105
MBP Item 5 header: 02040305
00: 0D 71 FF FF FF FF 08 06 - 10 00 08 00
Unknown MBP Item 6 header: 030A0208
MBP Item 7 header: 00020801
00: 00 00 00 00
MBP Item 8 header: 00020501
00: 91 03 00 42
MBP Item 9 header: 00020201
00: 00 92 31 31
MBP Item 10 header: 00020901
00: 07 50 F6 21
MBP Item 11 header: 02020E01
00: 01 01 04 00
Unknown MBP Item 12 header: 02050D01
HECI reset: clearing buffer from MBP Sensitive data.
[HECI1] Resetting interface
[HECI1] - Step1 Enable Host Reset : H_CSR = 0x800E0E08
[HECI1] - Step2 Wait for reset started: H_CSR = 0x800E0E1C
[HECI1] - Step3 Wait for ME reset: ME_CSR_HA = 0x80000008
Install PPI: ED7C9CE9-5912-4807-EC90-2218BC7BFC6C
------------------------ MeBiosPayload Data Protocol Print Begin -----------------
Revision : 0x1
MeBiosPayload FwVersionName ---
ME FW MajorVersion : 15
ME FW MinorVersion : 0
ME FW HotfixVersion : 35
ME FW BuildVersion : 1951
MeBiosPayload FwCapabilities ---
FullMng : 0x0
StdMng : 0x0
Amt : 0x0
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x0
KVM : 0x0
DAL : 0x1
TLS : 0x1
WLAN : 0x0
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload FwFeaturesState ---
FullMng : 0x1
StdMng : 0x1
Amt : 0x1
EyeRiver : 0x0
IntegratedTouch : 0x0 [Deprecated]
IntelCLS : 0x0
ISH : 0x0
PAVP : 0x1
IPV6 : 0x1
KVM : 0x1
DAL : 0x1
TLS : 0x1
WLAN : 0x1
TrustedDevice : 0x0
PTT : 0x1
MeBiosPayload ME Platform Type ---
PlatformTargetUsageType : 0x1
SuperSku : 0x0
IntelMeFwImageType : 0x3
PlatformBrand : 0x0
MeBiosPayload UnconfigOnRtcClearState ---
UnconfigOnRtcClearData : 0x0
MeBiosPayload ArbSvnState ---
Flags : 0x1
MinCseArbSvn : 0x1
CurrCseArbSvn : 0x4
MeBiosPayload MeasuredBootSupport ---
MeasuredBoot : 0x0
Sensitive Data Revision : 0x1
MeBiosPayload Platform Key ---
Key[0x0] : 0x98A052FD
Key[0x1] : 0x936B47F8
Key[0x2] : 0xCDE9C5DB
Key[0x3] : 0xC4D5A80C
Key[0x4] : 0x54C74210
Key[0x5] : 0xC0FDA724
Key[0x6] : 0x68225B87
Key[0x7] : 0x3D7CFF98
------------------------ MeBiosPayload Data Protocol Print End -------------------
POSTCODE=<00009E22> - ME-BIOS: MBP Exit - Success.
MeDeviceConfigure () - Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
Current MeBiosBootPath - 0
ME FW HOB installed
ME FW HOB data updated
Current ME FW HOB data printed -
00: 04 00 A8 00 00 00 00 00 - 62 5E 88 52 4D 4C 46 95
10: 2D BA 2A 84 89 EE A8 A3 - 01 04 00 00 00 00 00 00
20: 55 02 00 90 16 01 10 80 - 20 00 00 00 00 40 00 00
30: 00 00 00 00 00 00 40 00 - 01 00 00 00 FF FF FF FF
40: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
50: FF FF FF FF 04 00 00 00 - 00 00 00 80 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 05 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00
[HECI2] Setting D0I3 bit
[HECI2] Function is disabled, can't set D0I3 bit!
Disabling CSME device 0:22:1
[HECI3] Setting D0I3 bit
[HECI3] D0I3C register = 00000015
Disabling CSME device 0:22:4
Disabling CSME device 0:22:3
Disabling CSME device 0:22:2
MeDeviceInit [HECI4] H: 00000000, L: FE600000
POSTCODE=<00009004> - ME Device Init
Program HECI MMIO address
[HECI4] Setting D0I3 bit
[HECI4] D0I3C register = 00000015
Disabling CSME device 0:22:5
MeDeviceConfigureInterrupts () for MeDev = 0
MeDeviceConfigureInterrupts () for MeDev = 1
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 2
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 3
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 4
MeDeviceConfigureInterrupts () exit (Device disabled)
MeDeviceConfigureInterrupts () for MeDev = 5
MeDeviceConfigureInterrupts () exit (Device disabled)
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
MePostMemInit () - End
POSTCODE=<00009B00>
PchInit - Start
PchHsioMiscBiosProg() Start
Installing HSIO ChipsetInit SUS Table Data PPI
Install PPI: 97ED4E5D-01A5-4A3C-B7E9-1A4EA3DD23CE
PchHsioMiscBiosProg() End
ConfigureSata() Started (SATA controler index: 0)
EarlyConfigureSata() Started (SATA controller reg base: 0x000B8000)
EarlyConfigureSata() Ended (SATA controller reg base: 0x000B8000)
ConfigureSataAhci() Started (SATA controler index: 0)
ConfigureSataAhci() Ended (SATA controler index: 0)
ConfigureSata() Ended (SATA controler index: 0)
HybridStorageCheckAndConfigureClkreq Entry
HybridStorageCheckAndConfigureClkreq Exit
GbeInit() Start
GbePmcEnabled: 0
No FIA lanes assigned as GbE
GbeLaneNum: No lanes assigned
GbeRegionValid: 1
GbePresent: 0
LAN disabled
GbeInit() End
PchSpiExtendedBiosDecodeRangeInit - Extended BIOS decode range is disabled. Skipping initialization.
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
CridSupport = 0 20 20
PcieRpInit() Start
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 3 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 4 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 5 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 9 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 10 has a device attached.
Printing PCIe equalization settings
PcieLinkEqMethod = 0
PcieLinkEqMode = 1
Ph1DownstreamPortTransmitterPreset = 7
Ph1UpstreamPortTransmitterPreset = 5
Ph3NumberOfPresetsOrCoefficients = 3
Phase 3 Coefficient 0, pre-cursor = 6, post-cursor = 8
Phase 3 Coefficient 1, pre-cursor = 6, post-cursor = 12
Phase 3 Coefficient 2, pre-cursor = 8, post-cursor = 8
Phase 2 local transmitter override enable = 0
Phase 2 local transmitter override preset = 0
PipePresetToCoefficientQuerySupported = 1
Port 12 has a device attached.
PcieConfigureControllerBasePowerManagement(1)
PchPcieConfigureBasePowerManagement(1) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(2) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(3) Start
PchPcieConfigureBasePowerManagement(4) Start
PcieConfigureControllerBasePowerManagement(5)
PchPcieConfigureBasePowerManagement(5) Start
PchPcieConfigureBasePowerManagement(6) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(7) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(8) Start
Setting DLSULPPGE+DLSULDLSD.
PcieConfigureControllerBasePowerManagement(9)
PchPcieConfigureBasePowerManagement(9) Start
PchPcieConfigureBasePowerManagement(10) Start
PchPcieConfigureBasePowerManagement(11) Start
Setting DLSULPPGE+DLSULDLSD.
PchPcieConfigureBasePowerManagement(12) Start
WaitForLinkActive, RP mask to wait for = 0x00000B1C
WaitForLinkActive, all RPs done, lost 0ms waiting
DisablePcieRootPort(1) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(2) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (3) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:2
RecursiveBusAssignmentE 0:1C:2 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:2 -> 0,2,2
RecursiveMpsCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:2
RecursiveCccConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:2
HasChildBus00:1C:02: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (4) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:3
RecursiveBusAssignmentE 0:1C:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1C:3 -> 0,2,2
RecursiveMpsCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:3
RecursiveCccConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (5) Start
VID: 11F8 DID: 4036 MLS: 4
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
Starting Equalization with following settings:
EQCFG1: 0x00001100
EQCFG2: 0x00042002
HAEQ: 0x00000E00
HW EQ finished, results:
EQCFG1: 0x00001100
LSTS2: 0x001F
Training time = 16690us
5.0 FOM Scoreboard:
0:024 1:021 2:020
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00222104 0x00111183 0x00000103
5.1 FOM Scoreboard:
0:026 1:021 2:022
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00222104 0x00111183 0x00000103
5.2 FOM Scoreboard:
0:021 1:018 2:018
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00222104 0x00111183 0x00000103
5.3 FOM Scoreboard:
0:021 1:025 2:023
3:000 4:000 5:000
6:000 7:000 8:000
9:000 10:000 11:000
ranks 0x00300000 0x00222104 0x00111183 0x00000103
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1C:4
RecursiveBusAssignmentE 0:1C:4 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentE 2:0:0 -> 2,3,A
IsPcieDevice 03:00:00 - yes
RecursiveBusAssignmentE 3:0:0 -> 3,4,A
RecursiveBusAssignmentL 3:0:0 -> 3,4,4
IsPcieDevice 03:01:00 - yes
RecursiveBusAssignmentE 3:1:0 -> 3,5,A
RecursiveBusAssignmentL 3:1:0 -> 3,5,5
IsPcieDevice 03:02:00 - yes
RecursiveBusAssignmentE 3:2:0 -> 3,6,A
RecursiveBusAssignmentL 3:2:0 -> 3,6,6
IsPcieDevice 03:03:00 - yes
RecursiveBusAssignmentE 3:3:0 -> 3,7,A
RecursiveBusAssignmentL 3:3:0 -> 3,7,7
IsPcieDevice 03:04:00 - yes
RecursiveBusAssignmentE 3:4:0 -> 3,8,A
IsPcieDevice 08:00:00 - yes
RecursiveBusAssignmentL 3:4:0 -> 3,8,8
RecursiveBusAssignmentL 2:0:0 -> 2,3,8
RecursiveBusAssignmentL 0:1C:4 -> 0,2,8
RecursiveMpsCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsCheck 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsCheck 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsCheck 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsCheck 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsCheck 8:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveMpsConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveMpsConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveMpsConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveMpsConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveMpsConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveMpsConfiguration 8:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveIoApicCheck 3:0:0
HasChildBus03:00:00: yes, 4
IoApic status 0 @0:3:0:0
IsPcieDevice 03:01:00 - yes
RecursiveIoApicCheck 3:1:0
HasChildBus03:01:00: yes, 5
IoApic status 0 @0:3:1:0
IsPcieDevice 03:02:00 - yes
RecursiveIoApicCheck 3:2:0
HasChildBus03:02:00: yes, 6
IoApic status 0 @0:3:2:0
IsPcieDevice 03:03:00 - yes
RecursiveIoApicCheck 3:3:0
HasChildBus03:03:00: yes, 7
IoApic status 0 @0:3:3:0
IsPcieDevice 03:04:00 - yes
RecursiveIoApicCheck 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveIoApicCheck 8:0:0
HasChildBus : : : no
IoApic status 0 @0:8:0:0
IoApic status 0 @0:3:4:0
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1C:4
RecursiveCccConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus02:00:00: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCccConfiguration 3:0:0
HasChildBus03:00:00: yes, 4
IsPcieDevice 03:01:00 - yes
RecursiveCccConfiguration 3:1:0
HasChildBus03:01:00: yes, 5
IsPcieDevice 03:02:00 - yes
RecursiveCccConfiguration 3:2:0
HasChildBus03:02:00: yes, 6
IsPcieDevice 03:03:00 - yes
RecursiveCccConfiguration 3:3:0
HasChildBus03:03:00: yes, 7
IsPcieDevice 03:04:00 - yes
RecursiveCccConfiguration 3:4:0
HasChildBus03:04:00: yes, 8
IsPcieDevice 08:00:00 - yes
RecursiveCccConfiguration 8:0:0
HasChildBus : : : no
IsPcieDevice 08:00:00 - yes
IsPcieDevice 02:00:00 - yes
HasChildBus00:1C:04: yes, 2
IsPcieDevice 02:00:00 - yes
DisablePcieRootPort(6) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(7) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
DisablePcieRootPort(8) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (9) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:0
RecursiveBusAssignmentE 0:1D:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:0 -> 0,2,2
RecursiveMpsCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:0
RecursiveCccConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
InitPcieSingleRootPort (10) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:1
RecursiveBusAssignmentE 0:1D:1 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:1 -> 0,2,2
RecursiveMpsCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:1
RecursiveCccConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
DisablePcieRootPort(11) Start
Stopping the port.
Hiding the port
DisablePcieRootPort() End
InitPcieSingleRootPort (12) Start
VID: 8086 DID: 0D9F MLS: 2
PCIe SIP < 16 does not support Peer Disable
PCIe SIP < 16 does not support 10-bit tag
PCIe SIP < 16 does not support Completion Coalescing
PCIe EQ: Setting coefficient 0, pre-cursor = 6, post-cursor = 8
PCIe EQ: Setting coefficient 1, pre-cursor = 6, post-cursor = 12
PCIe EQ: Setting coefficient 2, pre-cursor = 8, post-cursor = 8
PCIe SIP < 16 does not support retimer presence detect
RootportDownstreamConfiguration 1D:3
RecursiveBusAssignmentE 0:1D:3 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:1D:3 -> 0,2,2
RecursiveMpsCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveIoApicCheck 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveIoApicCheck 2:0:0
HasChildBus : : : no
IoApic status 0 @0:2:0:0
IoApic status 0 @0:0:1D:3
RecursiveCccConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
Child supports PTM proceeding with PTM configuration
RecursivePtmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, 2
IsPcieDevice 02:00:00 - yes
RecursivePtmConfiguration 2:0:0
HasChildBus : : : no
PcieRpInit() End
POSTCODE=<00009B04>
[Usb2PhyProgramming] Start
USB2 PHY is accesible
Programming USB2 PHY register 0x4001 to 0x2F3DB806
Warning! Data mismatch after write. Read 2E3DB806
Programming USB2 PHY register 0x402B to 0x006A4005
Programming USB2 PHY register 0x402C to 0x09A25380
Programming USB2 PHY register 0x7F04 to 0x0000C680
Programming USB2 PHY register 0x702C to 0x0088C200
[Usb2PhyClockDependentProgramming] Programming USB2 PHY parameters based on freq enum: 0
Programming USB2 PHY register 0x7000 to 0x64641E08
Programming USB2 PHY register 0x702C to 0x0088C200
Programming USB2 PHY register 0x7008 to 0x222B5A20
Programming USB2 PHY register 0x7014 to 0x59E94D18
Programming USB2 PHY register 0x7024 to 0x3001E800
### PpLane 1
Programming USB2 PHY register 0x4100 to 0xFC05B091
Programming USB2 PHY register 0x4126 to 0x4382924B
Programming USB2 PHY register 0x4108 to 0x0000DAD0
### PpLane 2
Programming USB2 PHY register 0x4200 to 0xFC05B091
Programming USB2 PHY register 0x4226 to 0x4382924B
Programming USB2 PHY register 0x4208 to 0x0000DAD0
### PpLane 3
Programming USB2 PHY register 0x4300 to 0xFC05B091
Programming USB2 PHY register 0x4326 to 0x4382924B
Programming USB2 PHY register 0x4308 to 0x0000DAD0
### PpLane 4
Programming USB2 PHY register 0x4400 to 0xFC05B091
Programming USB2 PHY register 0x4426 to 0x4382924B
Programming USB2 PHY register 0x4408 to 0x0000DAD0
### PpLane 5
Programming USB2 PHY register 0x4500 to 0xFC05B091
Programming USB2 PHY register 0x4526 to 0x4382924B
Programming USB2 PHY register 0x4508 to 0x0000DAD0
### PpLane 6
Programming USB2 PHY register 0x4600 to 0xFC05B091
Programming USB2 PHY register 0x4626 to 0x4382924B
Programming USB2 PHY register 0x4608 to 0x0000DAD0
### PpLane 7
Programming USB2 PHY register 0x4700 to 0xFC05B091
Programming USB2 PHY register 0x4726 to 0x4382924B
Programming USB2 PHY register 0x4708 to 0x0000DAD0
### PpLane 8
Programming USB2 PHY register 0x4800 to 0xFC05B091
Programming USB2 PHY register 0x4826 to 0x4382924B
Programming USB2 PHY register 0x4808 to 0x0000DAD0
### PpLane 9
Programming USB2 PHY register 0x4900 to 0xFC05B091
Programming USB2 PHY register 0x4926 to 0x4382924B
Programming USB2 PHY register 0x4908 to 0x0000DAD0
### PpLane 10
Programming USB2 PHY register 0x4A00 to 0xFC05B091
Programming USB2 PHY register 0x4A26 to 0x4382924B
Programming USB2 PHY register 0x4A08 to 0x0000DAD0
POSTCODE=<00009B05>
POSTCODE=<00009B06>
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0xA0ED
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
xHCI: PEI phase PDO programming
xHCI: Usb2DisabledPorts = 0x100
xHCI: Usb3DisabledPorts = 0x0
HsPortCount 12, SsPortCount 4
XhciUsb2PdoMask 0x00000FFF, XhciUsb3PdoMask 0x0000000F
XhciUsb2Pdo 0x00000100, XhciUsb3Pdo 0x00000000
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 12
Test for XHCI_MEM_DAP_ESS_PORT
XhciConfigure() - End
POSTCODE=<00009B08>
xDCI Controller DID: 0xA0EE
xDCI: Device enabled
POSTCODE=<00009B0A>
Dmi14 R_PCH_OPDMI14_PCR_LPMC = 7E201500
Dmi14 R_PCH_OPDMI14_PCR_LCTL = 8
POSTCODE=<00009B0B>
POSTCODE=<00009B0C>
POSTCODE=<00009B0D>
------------------ IRQ Usage ------------------
IRQxxx USED
IRQ000 0
IRQ001 0
IRQ002 0
IRQ003 0
IRQ004 0
IRQ005 0
IRQ006 0
IRQ007 0
IRQ008 0
IRQ009 0
IRQ010 0
IRQ011 0
IRQ012 0
IRQ013 0
IRQ014 0
IRQ015 0
IRQ016 1
IRQ017 1
IRQ018 1
IRQ019 1
IRQ020 1
IRQ021 1
IRQ022 1
IRQ023 1
IRQ024 1
IRQ025 1
IRQ026 0
IRQ027 1
IRQ028 0
IRQ029 1
IRQ030 1
IRQ031 1
IRQ032 1
IRQ033 1
IRQ034 1
IRQ035 1
IRQ036 1
IRQ037 1
IRQ038 1
IRQ039 0
IRQ040 1
IRQ041 0
IRQ042 1
IRQ043 1
IRQ044 0
IRQ045 0
IRQ046 0
IRQ047 0
IRQ048 0
IRQ049 0
IRQ050 0
IRQ051 0
IRQ052 0
IRQ053 0
IRQ054 0
IRQ055 0
IRQ056 0
IRQ057 0
IRQ058 0
IRQ059 0
IRQ060 0
IRQ061 0
IRQ062 0
IRQ063 0
IRQ064 0
IRQ065 0
IRQ066 0
IRQ067 0
IRQ068 0
IRQ069 0
IRQ070 0
IRQ071 0
IRQ072 0
IRQ073 0
IRQ074 0
IRQ075 0
IRQ076 0
IRQ077 0
IRQ078 0
IRQ079 0
IRQ080 0
IRQ081 0
IRQ082 0
IRQ083 0
IRQ084 0
IRQ085 0
IRQ086 0
IRQ087 0
IRQ088 0
IRQ089 0
IRQ090 0
IRQ091 0
IRQ092 0
IRQ093 0
IRQ094 0
IRQ095 0
IRQ096 0
IRQ097 0
IRQ098 0
IRQ099 0
IRQ100 0
IRQ101 0
IRQ102 0
IRQ103 0
IRQ104 0
IRQ105 0
IRQ106 0
IRQ107 0
IRQ108 0
IRQ109 0
IRQ110 0
IRQ111 0
IRQ112 0
IRQ113 0
IRQ114 0
IRQ115 0
IRQ116 0
IRQ117 0
IRQ118 0
IRQ119 0
IRQ120 0
IRQ121 0
IRQ122 0
IRQ123 0
IRQ124 0
IRQ125 0
IRQ126 0
CnviInit() - Start
CNVi has been fused out
ThcInit() Start
ThcInit() End
POSTCODE=<00009B14>
IshInit() Start
POSTCODE=<00009B15>
Retention is not supported on this stepping overriding the Retention transition times to 0 in VCCIN_AUX_CFG1
SerialIoInit() Start
SerialIoSpiInit() Start
SerialIoSpiInit() End
SerialIoI2cInit() Start
SerialIoI2cInit() End
SerialIoUartInit() Start
SerialIoUartInit() End
SerialIoInit() End
InstallI2cMasterPpi End
Install PPI: B3BFAB9B-9F9C-4E8B-AD37-7F8C51FC6280
[ConfigureEspi] Entry.[ConfigureEspi] eSPI is disabled through strapIEH: Workaround to mask global error registers and clear error status
HybridStorageDynamicDetectionAndConfig() Start
HybridStorage Policy not enabled
PCIe SPA is 4x1
PCIe SPB is 1x4
PCIe SPC is 4x1
PsfConfigurePcieGrantCounts() Start
SPA[0] - DGCR12 = 1
SPA[0] - PG1_TGT0 = 1
SPA[1] - DGCR13 = 1
SPA[1] - PG1_TGT1 = 1
SPA[2] - DGCR14 = 1
SPA[2] - PG1_TGT2 = 1
SPA[3] - DGCR15 = 1
SPA[3] - PG1_TGT3 = 1
SPB[0] - DGCR16 = 4
SPB[0] - PG1_TGT5 = 4
SPC[0] - DGCR20 = 1
SPC[0] - PG1_TGT10 = 1
SPC[1] - DGCR21 = 1
SPC[1] - PG1_TGT11 = 1
SPC[2] - DGCR22 = 1
SPC[2] - PG1_TGT12 = 1
SPC[3] - DGCR23 = 1
SPC[3] - PG1_TGT13 = 1
PsfConfigurePcieGrantCounts() End
ChipsetInitSync() Start
Get CSME ChipsetInit Version Data from MBP
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0xFFFF
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 0
//Base CRC Valid: 1
BIOS Computed SUS Table CRC: 7D0C
[HECI1] MeMode 0 (Hfsts1: 90000255)
Read ChipsetInit Binary from CSME
PeiHeciReadChipsetInitMsg(): Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 80240008
00: 00 00 05 00 0A 00 00 00 - 00 00 00 00 10 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 20 00 00
[HECI1] Got msg Success: 01FC0008
00: 00 00 05 00 0A 00 00 00 - 00 00 00 00 10 14 00 00
10: 00 00 00 00 00 00 00 00 - FC 13 00 00 00 00 00 00
20: FC 13 00 00 00 00 00 00 - 0D 71 FF FF FF FF 08 06
30: 10 00 08 00 00 00 44 44 - 45 A5 00 0F 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 28 AB 07 00 - 01 00 04 80 60 00 00 20
60: 28 AB 07 00 01 00 30 80 - 01 04 30 00 28 AB 07 00
70: 01 00 3C 80 06 00 00 00 - 28 AB 07 00 04 00 E8 80
80: 80 08 0C 3C 28 AB 07 00 - 0F 00 80 81 19 00 00 00
90: 28 AB 07 00 07 00 88 81 - 00 00 00 00 28 AB 07 00
A0: 0F 00 90 81 02 07 01 0C - 28 AB 07 00 04 00 98 81
B0: 00 00 02 00 28 AB 07 00 - 05 00 9C 81 03 00 1C 00
C0: 28 AB 07 00 07 00 A0 81 - 00 00 00 00 28 AB 07 00
D0: 05 00 A8 81 06 00 1F 00 - 28 AB 07 00 03 00 AC 81
E0: 0B 03 00 00 28 AB 07 00 - 0A 00 B0 81 00 3C 00 78
F0: 28 AB 07 00 01 00 C8 81 - 01 00 00 00 28 AB 07 00
00: 01 00 CC 81 01 00 00 00 - 0F 00 00 00 28 AB 07 00
10: 08 00 E8 86 00 48 17 1A - 28 AB 07 00 02 00 1C 84
20: 00 C0 00 60 28 AB 07 00 - 02 00 40 84 F0 A0 02 FF
30: 28 AB 07 00 08 00 60 86 - 08 00 08 F3 28 AB 07 00
40: 02 00 C0 86 00 10 88 1B - 28 AB 07 00 02 00 8C 85
50: 00 08 1F 20 28 AB 07 00 - 0F 00 F0 86 20 28 28 28
60: 28 AB 07 00 02 00 30 86 - 50 C0 00 BE 28 AB 07 00
70: 08 00 58 86 09 A0 32 81 - 28 AB 07 00 08 00 20 87
80: 04 02 12 08 28 AB 07 00 - 07 00 44 86 4E DE 05 01
90: 28 AB 07 00 06 00 54 87 - 80 50 06 00 28 AB 07 00
A0: 02 00 3C 84 02 9F 00 00 - 28 AB 07 00 02 00 20 86
B0: 00 44 00 00 28 AB 07 00 - 04 00 D4 86 C0 80 82 00
C0: 28 AB 07 00 08 00 9C 85 - 00 0C 49 22 28 AB 07 00
D0: 08 00 10 86 FF 01 C8 1E - 28 AB 07 00 04 00 14 86
E0: 9F 63 0C 03 28 AB 07 00 - 01 00 3C 86 F0 00 00 00
F0: 28 AB 07 00 07 00 2C 86 - 5A 10 08 00
[HECI1] Got msg Success: 01FC0008
00: 28 AB 07 00 0F 00 08 86 - 50 FF FF 3F 28 AB 07 00
10: 08 00 28 87 00 00 04 FC - 28 AB 07 00 07 00 4C 86
20: 07 C9 05 01 28 AB 07 00 - 01 00 20 84 25 16 07 0D
30: 28 AB 07 00 07 00 8C 86 - 58 40 04 00 28 AB 07 00
40: 03 00 4C 87 FF 08 01 00 - 28 AB 07 00 07 00 64 86
50: 00 A4 00 00 28 AB 07 00 - 01 00 50 87 6E 80 10 10
60: 28 AB 07 00 04 00 78 86 - 60 40 83 40 28 AB 07 00
70: 0F 00 80 86 60 17 A0 01 - 28 AB 07 00 0C 00 A0 86
80: EC 70 C0 28 28 AB 07 00 - 0F 00 C4 86 D1 EC 21 E4
90: 28 AB 07 00 01 00 28 84 - E0 01 02 01 28 AB 07 00
A0: 05 00 0C 86 FF 9B 92 00 - 28 AB 07 00 08 00 50 86
B0: 3F 3F 3F 05 28 AB 07 00 - 01 00 AC 86 EC 60 00 00
C0: 28 AB 07 00 0C 00 24 87 - 22 22 26 10 28 AB 07 00
D0: 01 00 54 86 02 00 C0 88 - 28 AB 07 00 01 00 54 85
E0: 06 2A 29 28 28 AB 07 00 - 04 00 C8 86 50 88 8D 3F
F0: 28 AB 07 00 04 00 9C 86 - 00 00 2C 00 28 AB 07 00
00: 02 00 18 86 BF 00 00 00 - 28 AB 07 00 0F 00 EC 86
10: 04 80 00 00 28 AB 07 00 - 0E 00 08 87 45 F4 DF CC
20: 28 AB 07 00 07 00 A4 86 - 28 28 28 00 28 AB 07 00
30: 01 00 70 86 5E 25 40 40 - 28 AB 07 00 0B 00 88 86
40: 20 70 74 E4 28 AB 07 00 - 04 00 48 87 88 0A 8D D7
50: 28 AB 07 00 06 00 40 87 - 0A 00 E2 16 28 AB 07 00
60: 04 00 00 84 00 01 89 80 - 28 AB 07 00 08 00 1C 86
70: 08 10 3B 68 28 AB 07 00 - 01 00 1C 87 03 7F 1B 1B
80: 28 AB 07 00 0F 00 E4 86 - 50 45 0B 1C 28 AB 07 00
90: 01 00 5C 86 2E 08 3B 00 - 28 AB 07 00 07 00 04 84
A0: 64 C0 11 00 28 AB 07 00 - 08 00 24 84 10 0A 0B A4
B0: 28 AB 07 00 05 00 40 86 - 58 CF 05 01 28 AB 07 00
C0: 0A 00 00 86 70 A8 52 0B - 28 AB 07 00 01 00 18 84
D0: 7C 00 89 02 28 AB 07 00 - 02 00 58 85 20 1E 1F 15
E0: 28 AB 07 00 08 00 84 85 - 08 0A 00 08 28 AB 07 00
F0: 05 00 04 86 09 09 0F 00 - 28 AB 07 00
[HECI1] Got msg Success: 01FC0008
00: 06 00 10 84 00 00 BF 72 - 28 AB 07 00 0F 00 18 87
10: 00 0C 00 01 28 AB 07 00 - 05 00 68 86 2A 82 10 B8
20: 28 AB 07 00 01 00 64 86 - 08 A4 00 00 0F 00 00 00
30: 28 AB 07 00 0C 00 48 93 - 88 0A 8A D3 28 AB 07 00
40: 0F 00 5C 93 33 33 24 20 - 28 AB 07 00 02 00 64 91
50: 4C 60 4C 4C 28 AB 07 00 - 07 00 A4 92 1E 1E 1E 00
60: 28 AB 07 00 03 00 14 90 - 1D C5 00 11 28 AB 07 00
70: 0F 00 C4 92 D1 EC 01 E6 - 28 AB 07 00 0C 00 1C 93
80: 03 7F 21 21 28 AB 07 00 - 02 00 E4 92 40 A5 0B 4B
90: 28 AB 07 00 0F 00 18 93 - 01 00 00 4A 28 AB 07 00
A0: 02 00 54 93 80 54 02 00 - 28 AB 07 00 0F 00 24 90
B0: 0F 0C 0C A4 28 AB 07 00 - 01 00 28 90 E0 01 02 01
C0: 28 AB 07 00 0C 00 E8 92 - 00 48 26 1A 28 AB 07 00
D0: 01 00 20 90 26 16 07 0D - 28 AB 07 00 09 00 1C 92
E0: F8 10 3B 00 28 AB 07 00 - 0C 00 C8 92 50 88 8D 0D
F0: 28 AB 07 00 01 00 E0 92 - 32 60 00 08 28 AB 07 00
00: 04 00 AC 92 F6 60 00 00 - 28 AB 07 00 06 00 14 92
10: 9F 61 38 03 28 AB 07 00 - 0F 00 14 93 08 1C 05 0F
20: 28 AB 07 00 0F 00 24 93 - 36 38 B2 1F 28 AB 07 00
30: 0A 00 00 92 70 94 52 0B - 28 AB 07 00 07 00 44 93
40: 2B 1C 18 00 28 AB 07 00 - 07 00 4C 92 49 CD 05 01
50: 28 AB 07 00 03 00 4C 93 - DC 4F 01 00 28 AB 07 00
60: 0C 00 28 93 00 00 1A FF - 28 AB 07 00 08 00 60 92
70: 08 00 08 33 28 AB 07 00 - 03 00 58 93 A4 9C 8C 31
80: 28 AB 07 00 06 00 64 92 - 00 54 02 00 28 AB 07 00
90: 05 00 54 91 06 2A 2D 28 - 28 AB 07 00 05 00 68 92
A0: 06 82 10 B8 28 AB 07 00 - 03 00 44 90 97 48 09 64
B0: 28 AB 07 00 0F 00 80 92 - 40 17 04 04 28 AB 07 00
C0: 08 00 A0 92 EC 70 80 1E - 28 AB 07 00 01 00 10 93
D0: 68 00 40 00 28 AB 07 00 - 08 00 84 91 08 0A 00 08
E0: 28 AB 07 00 0F 00 88 92 - 10 30 77 64 28 AB 07 00
F0: 04 00 78 92 60 40 83 40 - 28 AB 07 00
[HECI1] Got msg Success: 01FC0008
00: 07 00 2C 92 0C 00 0B 00 - 28 AB 07 00 07 00 04 92
10: 09 0B 0F 00 28 AB 07 00 - 0D 00 40 92 4E CF 18 03
20: 28 AB 07 00 08 00 6C 92 - 00 24 04 5C 28 AB 07 00
30: 0F 00 20 93 04 21 03 0D - 28 AB 07 00 0F 00 0C 93
40: 1F E0 21 21 28 AB 07 00 - 01 00 3C 92 F0 00 00 00
50: 28 AB 07 00 01 00 0C 92 - E6 9B 52 00 28 AB 07 00
60: 02 00 18 92 BF 00 00 00 - 28 AB 07 00 01 00 5C 90
70: 96 BC 1F 3F 28 AB 07 00 - 04 00 00 90 00 01 89 80
80: 28 AB 07 00 0C 00 08 93 - 45 34 48 D0 28 AB 07 00
90: 01 00 50 93 6E 80 10 10 - 28 AB 07 00 04 00 04 93
A0: 80 AA 11 C0 28 AB 07 00 - 02 00 8C 91 00 08 1F 20
B0: 28 AB 07 00 0F 00 08 92 - 50 D1 EC 01 28 AB 07 00
C0: 04 00 7C 92 18 18 26 40 - 28 AB 07 00 09 00 CC 92
D0: 25 17 17 5B 28 AB 07 00 - 08 00 B4 92 40 40 81 08
E0: 28 AB 07 00 01 00 60 93 - 72 00 00 00 28 AB 07 00
F0: 07 00 8C 92 20 48 82 00 - 28 AB 07 00 0E 00 40 93
00: 0A 00 EB 1F 28 AB 07 00 - 03 00 70 92 58 26 40 40
10: 28 AB 07 00 09 00 10 92 - FB 01 C8 0A 28 AB 07 00
20: 04 00 04 90 44 00 21 00 - 0F 00 00 00 28 AA 07 00
30: 04 00 E8 80 80 08 0C 3C - 0F 00 00 00 28 AA 07 00
40: 04 00 14 86 1F 63 20 03 - 28 AA 07 00 02 00 40 84
50: 00 A0 02 FF 28 AA 07 00 - 0D 00 68 86 2A 82 00 B8
60: 28 AA 07 00 04 00 78 86 - 60 40 83 40 28 AA 07 00
70: 08 00 C0 86 00 00 88 5B - 28 AA 07 00 04 00 10 84
80: 00 00 BF 72 28 AA 07 00 - 05 00 40 86 58 CF 05 01
90: 28 AA 07 00 04 00 C8 86 - 50 88 8D 60 28 AA 07 00
A0: 07 00 2C 86 0A 10 0A 00 - 28 AA 07 00 0E 00 80 86
B0: 60 0F A0 E8 28 AA 07 00 - 07 00 8C 86 58 40 04 00
C0: 28 AA 07 00 02 00 E0 86 - 00 04 00 08 28 AA 07 00
D0: 04 00 C4 86 FF FF 3F FF - 28 AA 07 00 0F 00 64 84
E0: 00 02 1B E0 28 AA 07 00 - 01 00 38 84 7F 00 00 00
F0: 28 AA 07 00 05 00 0C 86 - FF 9B 12 00
[HECI1] Got msg Success: 01FC0008
00: 28 AA 07 00 08 00 24 84 - 10 0A 0B A4 28 AA 07 00
10: 01 00 18 84 7C 00 09 02 - 28 AA 07 00 04 00 BC 86
20: 80 00 10 00 28 AA 07 00 - 06 00 D4 86 C0 80 82 00
30: 28 AA 07 00 02 00 F4 86 - 00 0E 00 00 28 AA 07 00
40: 01 00 5C 86 2A 08 60 00 - 28 AA 07 00 03 00 88 86
50: 20 00 74 24 28 AA 07 00 - 08 00 B4 86 40 40 81 2C
60: 28 AA 07 00 08 00 A0 86 - EC 00 00 1C 28 AA 07 00
70: 03 00 64 86 00 54 00 00 - 28 AA 07 00 04 00 9C 86
80: 00 00 4C 00 28 AA 07 00 - 03 00 4C 86 07 C9 02 01
90: 28 AA 07 00 0A 00 74 86 - 49 FF 80 8D 28 AA 07 00
A0: 01 00 3C 86 F0 00 00 00 - 28 AA 07 00 0D 00 E4 86
B0: 50 05 0B 9C 28 AA 07 00 - 0F 00 F0 86 20 28 28 28
C0: 28 AA 07 00 01 00 28 84 - E0 01 02 01 28 AA 07 00
D0: 01 00 10 86 5F 01 C0 00 - 28 AA 07 00 07 00 A4 86
E0: 1C 1C 1C 00 28 AA 07 00 - 0F 00 EC 86 C4 00 00 00
F0: 28 AA 07 00 01 00 54 85 - 06 2A 29 28 28 AA 07 00
00: 09 00 54 86 02 00 C0 08 - 28 AA 07 00 04 00 00 84
10: 00 01 09 80 28 AA 07 00 - 07 00 04 84 64 C1 24 00
20: 28 AA 07 00 01 00 20 84 - 25 16 07 0D 28 AA 07 00
30: 02 00 3C 84 02 9F 00 00 - 28 AA 07 00 08 00 9C 85
40: 00 0C 49 22 28 AA 07 00 - 03 00 70 86 5A E5 40 40
50: 28 AA 07 00 01 00 90 86 - 48 30 50 75 28 AA 07 00
60: 08 00 84 85 08 0A 00 08 - 28 AA 07 00 03 00 24 86
70: FC 60 33 AA 28 AA 07 00 - 07 00 44 86 4E DE 05 01
80: 28 AA 07 00 08 00 50 86 - 3F 3F 3F 05 28 AA 07 00
90: 01 00 04 86 39 09 05 00 - 28 AA 07 00 02 00 20 86
A0: 00 4C 00 00 28 AA 07 00 - 0F 00 64 84 05 00 33 E0
B0: 28 AA 07 00 02 00 30 86 - 50 C0 00 BE 28 AA 07 00
C0: 0A 00 58 86 09 A0 31 81 - 28 AA 07 00 02 00 8C 85
D0: 00 08 1F 20 28 AA 07 00 - 0A 00 00 86 00 A8 52 00
E0: 28 AA 07 00 0F 00 08 86 - 50 FF FF 3F 28 AA 07 00
F0: 03 00 AC 86 EC 60 00 00 - 28 AA 07 00
[HECI1] Got msg Success: 01FC0008
00: 08 00 60 86 00 00 00 FF - 28 AA 07 00 02 00 1C 84
10: 00 C0 00 60 28 AA 07 00 - 09 00 1C 86 A8 00 3B 6E
20: 28 AA 07 00 01 00 64 86 - 08 54 00 00 0F 00 00 00
30: 28 AA 07 00 0F 00 64 8C - 00 00 33 E0 28 AA 07 00
40: 06 00 04 8C 44 01 24 00 - 28 AA 07 00 08 00 24 8C
50: 10 0A 0B A4 28 AA 07 00 - 01 00 1C 8E A8 00 3B 00
60: 28 AA 07 00 04 00 10 8C - 00 00 BF 72 28 AA 07 00
70: 0F 00 64 8C 00 02 1B E0 - 28 AA 07 00 02 00 00 8E
80: 00 69 52 09 28 AA 07 00 - 07 00 48 8E 4C 19 05 01
90: 28 AA 07 00 02 00 74 8E - 49 FF 80 8E 28 AA 07 00
A0: 0A 00 54 8E 00 01 C0 00 - 28 AA 07 00 01 00 04 8E
B0: 09 09 05 00 28 AA 07 00 - 08 00 B4 8E 40 40 81 2C
C0: 28 AA 07 00 02 00 20 8E - 00 48 00 00 28 AA 07 00
D0: 09 00 08 8E 50 18 E0 21 - 28 AA 07 00 04 00 78 8E
E0: 60 40 83 40 28 AA 07 00 - 06 00 8C 8E 7C 80 08 00
F0: 28 AA 07 00 04 00 00 8C - 00 01 09 80 28 AA 07 00
00: 01 00 28 8C E0 01 02 01 - 0F 00 00 00 28 A9 07 00
10: 01 00 04 80 60 00 00 20 - 28 A9 07 00 01 00 30 80
20: 01 04 30 00 28 A9 07 00 - 01 00 3C 80 06 00 00 00
30: 28 A9 07 00 04 00 E8 80 - 80 08 0C 3C 28 A9 07 00
40: 08 00 38 81 C4 C4 00 00 - 28 A9 07 00 0A 00 B0 81
50: 00 3C 00 78 28 A9 07 00 - 01 00 C8 81 01 00 00 00
60: 28 A9 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
70: 28 A9 07 00 07 00 44 86 - 4E DE 05 01 28 A9 07 00
80: 07 00 2C 86 0A 10 0A 00 - 28 A9 07 00 02 00 30 86
90: 50 C0 00 BE 28 A9 07 00 - 01 00 5C 86 2A 08 60 00
A0: 28 A9 07 00 02 00 3C 84 - 02 9F 00 00 28 A9 07 00
B0: 02 00 E0 86 00 04 00 08 - 28 A9 07 00 01 00 28 84
C0: E0 01 02 01 28 A9 07 00 - 08 00 50 86 3F 3F 3F 05
D0: 28 A9 07 00 01 00 3C 86 - F0 00 00 00 28 A9 07 00
E0: 03 00 AC 86 EC 60 00 00 - 28 A9 07 00 01 00 18 84
F0: 7C 00 09 02 28 A9 07 00 - 04 00 00 84
[HECI1] Got msg Success: 01FC0008
00: 00 01 09 80 28 A9 07 00 - 04 00 9C 86 00 00 4C 00
10: 28 A9 07 00 01 00 04 86 - 39 09 05 00 28 A9 07 00
20: 07 00 A4 86 1C 1C 1C 00 - 28 A9 07 00 04 00 BC 86
30: 80 00 10 00 28 A9 07 00 - 0F 00 F0 86 20 28 28 28
40: 28 A9 07 00 08 00 9C 85 - 00 0C 49 22 28 A9 07 00
50: 01 00 20 84 25 16 07 0D - 28 A9 07 00 0A 00 00 86
60: 00 A8 52 00 28 A9 07 00 - 04 00 78 86 60 40 83 40
70: 28 A9 07 00 0F 00 64 84 - 00 02 1B E0 28 A9 07 00
80: 02 00 1C 84 00 C0 00 60 - 28 A9 07 00 05 00 0C 86
90: FF 9B 12 00 28 A9 07 00 - 04 00 C8 86 50 88 8D 60
A0: 28 A9 07 00 03 00 88 86 - 20 00 74 24 28 A9 07 00
B0: 08 00 C0 86 00 00 88 5B - 28 A9 07 00 03 00 24 86
C0: FC 60 33 AA 28 A9 07 00 - 02 00 40 84 00 A0 02 FF
D0: 28 A9 07 00 07 00 04 84 - 64 C1 24 00 28 A9 07 00
E0: 01 00 90 86 48 30 50 75 - 28 A9 07 00 04 00 14 86
F0: 1F 63 20 03 28 A9 07 00 - 09 00 1C 86 A8 00 3B 6E
00: 28 A9 07 00 02 00 8C 85 - 00 08 1F 20 28 A9 07 00
10: 08 00 24 84 10 0A 0B A4 - 28 A9 07 00 05 00 40 86
20: 58 CF 05 01 28 A9 07 00 - 02 00 20 86 00 4C 00 00
30: 28 A9 07 00 0F 00 08 86 - 50 FF FF 3F 28 A9 07 00
40: 03 00 4C 86 07 C9 02 01 - 28 A9 07 00 0D 00 68 86
50: 2A 82 00 B8 28 A9 07 00 - 0F 00 64 84 05 00 33 E0
60: 28 A9 07 00 03 00 64 86 - 00 54 00 00 28 A9 07 00
70: 04 00 10 84 00 00 BF 72 - 28 A9 07 00 01 00 10 86
80: 5F 01 C0 00 28 A9 07 00 - 0E 00 80 86 60 0F A0 E8
90: 28 A9 07 00 0A 00 58 86 - 09 A0 31 81 28 A9 07 00
A0: 08 00 84 85 08 0A 00 08 - 28 A9 07 00 07 00 8C 86
B0: 58 40 04 00 28 A9 07 00 - 08 00 A0 86 EC 00 00 1C
C0: 28 A9 07 00 0D 00 E4 86 - 50 05 0B 9C 28 A9 07 00
D0: 08 00 B4 86 40 40 81 2C - 28 A9 07 00 0A 00 74 86
E0: 49 FF 80 8D 28 A9 07 00 - 01 00 54 85 06 2A 29 28
F0: 28 A9 07 00 09 00 54 86 - 02 00 C0 08
[HECI1] Got msg Success: 01FC0008
00: 28 A9 07 00 03 00 70 86 - 5A E5 40 40 28 A9 07 00
10: 04 00 C4 86 FF FF 3F FF - 28 A9 07 00 0F 00 EC 86
20: C4 00 00 00 28 A9 07 00 - 08 00 60 86 00 00 00 FF
30: 28 A9 07 00 06 00 D4 86 - C0 80 82 00 28 A9 07 00
40: 01 00 38 84 7F 00 00 00 - 28 A9 07 00 02 00 F4 86
50: 00 0E 00 00 28 A9 07 00 - 01 00 64 86 08 54 00 00
60: 0F 00 00 00 28 A9 07 00 - 08 00 B4 8E 40 40 81 2C
70: 28 A9 07 00 09 00 08 8E - 50 18 E0 21 28 A9 07 00
80: 04 00 78 8E 60 40 83 40 - 28 A9 07 00 06 00 8C 8E
90: 7C 80 08 00 28 A9 07 00 - 06 00 04 8C 44 01 24 00
A0: 28 A9 07 00 07 00 48 8E - 4C 19 05 01 28 A9 07 00
B0: 0A 00 54 8E 00 01 C0 00 - 28 A9 07 00 04 00 10 8C
C0: 00 00 BF 72 28 A9 07 00 - 0F 00 64 8C 00 02 1B E0
D0: 28 A9 07 00 0F 00 64 8C - 00 00 33 E0 28 A9 07 00
E0: 02 00 00 8E 00 69 52 09 - 28 A9 07 00 02 00 74 8E
F0: 49 FF 80 8E 28 A9 07 00 - 08 00 24 8C 10 0A 0B A4
00: 28 A9 07 00 01 00 28 8C - E0 01 02 01 28 A9 07 00
10: 01 00 1C 8E A8 00 3B 00 - 28 A9 07 00 04 00 00 8C
20: 00 01 09 80 28 A9 07 00 - 02 00 20 8E 00 48 00 00
30: 28 A9 07 00 01 00 04 8E - 09 09 05 00 0F 00 00 00
40: 28 A9 07 00 02 00 74 96 - 49 FF 80 8E 28 A9 07 00
50: 02 00 18 96 BF 00 00 00 - 28 A9 07 00 04 00 5C 96
60: 2A 08 30 00 28 A9 07 00 - 09 00 1C 96 58 00 3B 01
70: 28 A9 07 00 04 00 18 94 - 7C 00 39 02 28 A9 07 00
80: 0C 00 58 96 09 A0 33 01 - 28 A9 07 00 02 00 00 96
90: 00 29 52 09 28 A9 07 00 - 0F 00 04 94 45 01 24 04
A0: 28 A9 07 00 07 00 48 96 - 4C 15 05 01 28 A9 07 00
B0: 08 00 E8 96 00 48 17 2C - 28 A9 07 00 03 00 04 96
C0: 09 00 05 00 28 A9 07 00 - 03 00 58 95 00 28 1F 15
D0: 28 A9 07 00 01 00 6C 96 - 28 24 04 48 28 A9 07 00
E0: 01 00 28 94 E0 01 02 01 - 28 A9 07 00 0F 00 64 94
F0: 00 02 1B E0 28 A9 07 00 - 0F 00 54 95
[HECI1] Got msg Success: 01FC0008
00: 06 2D 2D 28 28 A9 07 00 - 04 00 00 94 00 01 09 80
10: 28 A9 07 00 08 00 88 96 - 00 30 74 64 28 A9 07 00
20: 08 00 A0 96 EC 00 00 2B - 28 A9 07 00 02 00 2C 96
30: 0A 50 0A 00 28 A9 07 00 - 02 00 F4 96 00 18 00 00
40: 28 A9 07 00 07 00 8C 96 - 70 20 08 00 28 A9 07 00
50: 08 00 24 94 10 0A 0B A4 - 28 A9 07 00 04 00 10 94
60: 00 00 BF 72 28 A9 07 00 - 0F 00 64 94 00 00 33 E0
70: 28 A9 07 00 04 00 9C 96 - 00 00 20 00 28 A9 07 00
80: 07 00 A4 96 2B 2B 2B 00 - 28 A9 07 00 0B 00 54 96
90: 02 01 C0 00 28 A9 07 00 - 05 00 40 96 5E CF 18 01
A0: 28 A9 07 00 08 00 B4 96 - 40 40 81 2C 28 A9 07 00
B0: 04 00 78 96 60 40 83 40 - 28 A9 07 00 08 00 50 96
C0: 3F 3F 3F 01 28 A9 07 00 - 09 00 68 96 1E 82 00 BA
D0: 28 A9 07 00 09 00 08 96 - 50 18 E0 21 28 A9 07 00
E0: 02 00 20 96 00 48 00 00 - 28 A9 07 00 04 00 C8 96
F0: 50 88 4F 60 28 A9 07 00 - 07 00 44 96 48 15 05 01
00: 0F 00 00 00 28 A8 07 00 - 01 00 04 80 60 00 00 20
10: 28 A8 07 00 01 00 30 80 - 01 04 30 00 28 A8 07 00
20: 01 00 3C 80 06 00 00 00 - 28 A8 07 00 04 00 E8 80
30: 80 08 0C 3C 28 A8 07 00 - 08 00 38 81 AC D4 00 00
40: 28 A8 07 00 0B 00 90 81 - 02 06 01 0C 28 A8 07 00
50: 05 00 A8 81 06 00 1F 00 - 28 A8 07 00 0A 00 B0 81
60: 00 3C 00 78 28 A8 07 00 - 01 00 C8 81 01 00 00 00
70: 28 A8 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
80: 0F 00 00 00 29 AC 07 00 - 04 00 1C 01 01 30 00 80
90: 29 AC 07 00 06 00 0C B1 - 40 00 07 00 29 AC 07 00
A0: 02 00 6C 03 0B 03 00 00 - 29 AC 07 00 0A 00 70 03
B0: 00 3C 00 78 29 AC 07 00 - 01 00 88 03 01 00 00 00
C0: 29 AC 07 00 01 00 14 B1 - E9 D4 25 48 29 AC 07 00
D0: 04 00 50 03 03 09 02 0C - 0F 00 00 00 28 6A 07 00
E0: 07 00 6C 04 00 00 03 00 - 28 6A 07 00 07 00 EC 03
F0: 00 00 03 00 28 6A 07 00 - 07 00 8C 04
[HECI1] Got msg Success: 01FC0008
00: 00 00 03 00 28 6A 07 00 - 07 00 0C 04 00 00 03 00
10: 28 6E 07 00 07 00 2C 04 - 00 00 00 00 28 6E 07 00
20: 07 00 4C 04 00 00 00 00 - 28 6E 07 00 07 00 6C 04
30: 00 00 00 00 28 6E 07 00 - 07 00 8C 04 00 00 00 00
40: 28 69 07 00 02 00 10 03 - 00 30 00 06 28 69 07 00
50: 03 00 04 03 18 18 00 C0 - 28 69 07 00 07 00 0C 03
60: 18 18 03 00 28 69 07 00 - 02 00 30 03 00 30 00 07
70: 28 69 07 00 03 00 24 03 - 18 18 00 C0 28 69 07 00
80: 07 00 2C 03 18 18 03 00 - 28 6E 07 00 02 00 70 03
90: 04 30 00 06 28 6E 07 00 - 03 00 64 03 00 00 00 C0
A0: 28 6E 07 00 07 00 6C 03 - 00 00 03 00 28 6E 07 00
B0: 02 00 90 03 04 30 00 07 - 28 6E 07 00 03 00 84 03
C0: 00 00 00 C0 28 6E 07 00 - 07 00 8C 03 00 00 03 00
D0: 28 6D 07 00 02 00 D0 03 - 04 30 20 07 28 6D 07 00
E0: 03 00 C4 03 00 00 00 C0 - 28 6D 07 00 07 00 CC 03
F0: 00 00 03 00 28 6D 07 00 - 07 00 AC 03 00 00 03 00
00: 28 6D 07 00 07 00 2C 03 - 00 00 03 00 28 6D 07 00
10: 07 00 EC 03 00 00 03 00 - 28 6D 07 00 0C 00 04 07
20: 6C 00 80 01 28 6D 07 00 - 08 00 08 07 00 00 00 00
30: 28 6D 07 00 0C 00 14 07 - 6D 00 80 01 28 6D 07 00
40: 08 00 18 07 00 00 00 00 - 28 6D 07 00 0C 00 24 07
50: 6E 00 80 01 28 6D 07 00 - 08 00 28 07 00 00 00 00
60: 28 6D 07 00 0C 00 34 07 - 6F 00 80 01 28 6D 07 00
70: 08 00 38 07 00 00 00 00 - 28 6D 07 00 0C 00 44 07
80: 70 00 80 01 28 6D 07 00 - 08 00 48 07 00 00 00 00
90: 28 6D 07 00 0C 00 54 07 - 71 00 80 01 28 6D 07 00
A0: 08 00 58 07 00 00 00 00 - 28 6D 07 00 0C 00 64 07
B0: 72 00 80 01 28 6D 07 00 - 08 00 68 07 00 00 00 00
C0: 28 6D 07 00 0C 00 74 07 - 73 00 80 01 28 6D 07 00
D0: 08 00 78 07 00 00 00 00 - 28 6D 07 00 08 00 10 03
E0: 00 20 20 02 28 6A 07 00 - 02 00 B0 04 00 00 20 07
F0: 28 6A 07 00 03 00 A4 04 - 00 00 00 C0
[HECI1] Got msg Success: 804C0008
00: 28 6A 07 00 02 00 D0 04 - 00 00 20 07 28 6A 07 00
10: 03 00 C4 04 00 00 00 C0 - 28 6A 07 00 02 00 70 03
20: 04 20 00 07 28 6A 07 00 - 03 00 64 03 00 00 00 C0
30: 28 6A 07 00 07 00 6C 03 - 00 00 02 00 28 6D 07 00
40: 07 00 8C 03 00 00 02 00 - 0F 00 00 00
PeiHeciReadChipsetInitMsg(): End
//*****************ChipsetInitTable BIOS Table Start*****************
//Version Information
//Current Base CRC: 0x710D
//Current SUS CRC: 0x7D0C
//Current OEM CRC: 0xFFFF
//Version: 0x8
//Product: 0x6
//Base Layer: 0x1
//Metal Layer: 0x0
//OEM Version: 0
//Debug Mode: 0
//OEM CRC Valid: 0
//SUS CRC Valid: 1
//Base CRC Valid: 1
// Phy Data Group Table (Fixed table with 16 Entries)
//Id: 0x0, RecordOffset: 0x0
//Id: 0x4, RecordOffset: 0x444
//Id: 0x5, RecordOffset: 0x45A
//Id: 0xA, RecordOffset: 0x4F4
//Id: 0x9, RecordOffset: 0x56D
//Id: 0xF, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
//Id: 0x0, RecordOffset: 0x0
// HSIO Command Table
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x81, 0x19, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8180, Value: 0x19
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x88, 0x81, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8188, Value: 0x0
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x90, 0x81, 0x02, 0x07, 0x01, 0x0C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8190, Value: 0xC010702
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x98, 0x81, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8198, Value: 0x20000
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x9C, 0x81, 0x03, 0x00, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x819C, Value: 0x1C0003
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA0, 0x81, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x81A0, Value: 0x0
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0xA8, 0x81, 0x06, 0x00, 0x1F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x81A8, Value: 0x1F0006
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x81, 0x0B, 0x03, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x81AC, Value: 0x30B
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xE8, 0x86, 0x00, 0x48, 0x17, 0x1A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86E8, Value: 0x1A174800
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0xF0, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A0F0
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x08, 0x00, 0x08, 0xF3, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xF3080008
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0xC0, 0x86, 0x00, 0x10, 0x88, 0x1B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86C0, Value: 0x1B881000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x32, 0x81, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8658, Value: 0x8132A009
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x20, 0x87, 0x04, 0x02, 0x12, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8720, Value: 0x8120204
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x54, 0x87, 0x80, 0x50, 0x06, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8754, Value: 0x65080
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x44, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4400
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x10, 0x86, 0xFF, 0x01, 0xC8, 0x1E, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8610, Value: 0x1EC801FF
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x9F, 0x63, 0x0C, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x30C639F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x5A, 0x10, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0x8105A
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x28, 0x87, 0x00, 0x00, 0x04, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8728, Value: 0xFC040000
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x864C, Value: 0x105C907
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x87, 0xFF, 0x08, 0x01, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x874C, Value: 0x108FF
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x64, 0x86, 0x00, 0xA4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8664, Value: 0xA400
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x50, 0x87, 0x6E, 0x80, 0x10, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8750, Value: 0x1010806E
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x86, 0x60, 0x17, 0xA0, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8680, Value: 0x1A01760
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xA0, 0x86, 0xEC, 0x70, 0xC0, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x86A0, Value: 0x28C070EC
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xC4, 0x86, 0xD1, 0xEC, 0x21, 0xE4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86C4, Value: 0xE421ECD1
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x92, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x929BFF
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x24, 0x87, 0x22, 0x22, 0x26, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x8724, Value: 0x10262222
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x88, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8654, Value: 0x88C00002
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x3F8D8850
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x2C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x2C0000
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x18, 0x86, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8618, Value: 0xBF
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0x04, 0x80, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0x8004
0x28, 0xAB, 0x07, 0x00, 0x0E, 0x00, 0x08, 0x87, 0x45, 0xF4, 0xDF, 0xCC, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8708, Value: 0xCCDFF445
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x28, 0x28, 0x28, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x282828
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x70, 0x86, 0x5E, 0x25, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8670, Value: 0x4040255E
0x28, 0xAB, 0x07, 0x00, 0x0B, 0x00, 0x88, 0x86, 0x20, 0x70, 0x74, 0xE4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x8688, Value: 0xE4747020
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x48, 0x87, 0x88, 0x0A, 0x8D, 0xD7, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8748, Value: 0xD78D0A88
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x40, 0x87, 0x0A, 0x00, 0xE2, 0x16, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8740, Value: 0x16E2000A
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x89, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80890100
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x1C, 0x86, 0x08, 0x10, 0x3B, 0x68, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x861C, Value: 0x683B1008
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x87, 0x03, 0x7F, 0x1B, 0x1B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x871C, Value: 0x1B1B7F03
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xE4, 0x86, 0x50, 0x45, 0x0B, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86E4, Value: 0x1C0B4550
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2E, 0x08, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x3B082E
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC0, 0x11, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x11C064
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x70, 0xA8, 0x52, 0x0B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0xB52A870
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x89, 0x02, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x289007C
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x58, 0x85, 0x20, 0x1E, 0x1F, 0x15, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8558, Value: 0x151F1E20
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x04, 0x86, 0x09, 0x09, 0x0F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8604, Value: 0xF0909
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x18, 0x87, 0x00, 0x0C, 0x00, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8718, Value: 0x1000C00
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x10, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8668, Value: 0xB810822A
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0xA4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0xA408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x48, 0x93, 0x88, 0x0A, 0x8A, 0xD3, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9348, Value: 0xD38A0A88
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x5C, 0x93, 0x33, 0x33, 0x24, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x935C, Value: 0x20243333
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x64, 0x91, 0x4C, 0x60, 0x4C, 0x4C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9164, Value: 0x4C4C604C
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x92, 0x1E, 0x1E, 0x1E, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x92A4, Value: 0x1E1E1E
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x14, 0x90, 0x1D, 0xC5, 0x00, 0x11, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9014, Value: 0x1100C51D
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0xC4, 0x92, 0xD1, 0xEC, 0x01, 0xE6, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x92C4, Value: 0xE601ECD1
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x1C, 0x93, 0x03, 0x7F, 0x21, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x931C, Value: 0x21217F03
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0xE4, 0x92, 0x40, 0xA5, 0x0B, 0x4B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x92E4, Value: 0x4B0BA540
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x18, 0x93, 0x01, 0x00, 0x00, 0x4A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9318, Value: 0x4A000001
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x54, 0x93, 0x80, 0x54, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9354, Value: 0x25480
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x90, 0x0F, 0x0C, 0x0C, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9024, Value: 0xA40C0C0F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x28, 0x90, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9028, Value: 0x10201E0
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xE8, 0x92, 0x00, 0x48, 0x26, 0x1A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x92E8, Value: 0x1A264800
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x20, 0x90, 0x26, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9020, Value: 0xD071626
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x92, 0xF8, 0x10, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x921C, Value: 0x3B10F8
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0xC8, 0x92, 0x50, 0x88, 0x8D, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x92C8, Value: 0xD8D8850
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0xE0, 0x92, 0x32, 0x60, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x92E0, Value: 0x8006032
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0xAC, 0x92, 0xF6, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x92AC, Value: 0x60F6
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x14, 0x92, 0x9F, 0x61, 0x38, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x9214, Value: 0x338619F
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x14, 0x93, 0x08, 0x1C, 0x05, 0x0F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9314, Value: 0xF051C08
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x93, 0x36, 0x38, 0xB2, 0x1F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9324, Value: 0x1FB23836
0x28, 0xAB, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x92, 0x70, 0x94, 0x52, 0x0B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x9200, Value: 0xB529470
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x44, 0x93, 0x2B, 0x1C, 0x18, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9344, Value: 0x181C2B
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x92, 0x49, 0xCD, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x924C, Value: 0x105CD49
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x93, 0xDC, 0x4F, 0x01, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x934C, Value: 0x14FDC
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x28, 0x93, 0x00, 0x00, 0x1A, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9328, Value: 0xFF1A0000
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x60, 0x92, 0x08, 0x00, 0x08, 0x33, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9260, Value: 0x33080008
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x58, 0x93, 0xA4, 0x9C, 0x8C, 0x31, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9358, Value: 0x318C9CA4
0x28, 0xAB, 0x07, 0x00, 0x06, 0x00, 0x64, 0x92, 0x00, 0x54, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x9264, Value: 0x25400
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x54, 0x91, 0x06, 0x2A, 0x2D, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9154, Value: 0x282D2A06
0x28, 0xAB, 0x07, 0x00, 0x05, 0x00, 0x68, 0x92, 0x06, 0x82, 0x10, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9268, Value: 0xB8108206
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x44, 0x90, 0x97, 0x48, 0x09, 0x64, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9044, Value: 0x64094897
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x80, 0x92, 0x40, 0x17, 0x04, 0x04, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9280, Value: 0x4041740
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x92, 0xEC, 0x70, 0x80, 0x1E, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x92A0, Value: 0x1E8070EC
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x10, 0x93, 0x68, 0x00, 0x40, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9310, Value: 0x400068
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x84, 0x91, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9184, Value: 0x8000A08
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x88, 0x92, 0x10, 0x30, 0x77, 0x64, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9288, Value: 0x64773010
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x78, 0x92, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9278, Value: 0x40834060
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x92, 0x0C, 0x00, 0x0B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x922C, Value: 0xB000C
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x04, 0x92, 0x09, 0x0B, 0x0F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9204, Value: 0xF0B09
0x28, 0xAB, 0x07, 0x00, 0x0D, 0x00, 0x40, 0x92, 0x4E, 0xCF, 0x18, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x9240, Value: 0x318CF4E
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0x6C, 0x92, 0x00, 0x24, 0x04, 0x5C, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x926C, Value: 0x5C042400
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x20, 0x93, 0x04, 0x21, 0x03, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9320, Value: 0xD032104
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x0C, 0x93, 0x1F, 0xE0, 0x21, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x930C, Value: 0x2121E01F
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x92, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x923C, Value: 0xF0
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x0C, 0x92, 0xE6, 0x9B, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x920C, Value: 0x529BE6
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x18, 0x92, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9218, Value: 0xBF
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x90, 0x96, 0xBC, 0x1F, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x905C, Value: 0x3F1FBC96
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x00, 0x90, 0x00, 0x01, 0x89, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9000, Value: 0x80890100
0x28, 0xAB, 0x07, 0x00, 0x0C, 0x00, 0x08, 0x93, 0x45, 0x34, 0x48, 0xD0, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9308, Value: 0xD0483445
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x50, 0x93, 0x6E, 0x80, 0x10, 0x10, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9350, Value: 0x1010806E
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x04, 0x93, 0x80, 0xAA, 0x11, 0xC0, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9304, Value: 0xC011AA80
0x28, 0xAB, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x91, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x918C, Value: 0x201F0800
0x28, 0xAB, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x92, 0x50, 0xD1, 0xEC, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9208, Value: 0x1ECD150
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x7C, 0x92, 0x18, 0x18, 0x26, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x927C, Value: 0x40261818
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0xCC, 0x92, 0x25, 0x17, 0x17, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x92CC, Value: 0x5B171725
0x28, 0xAB, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x92, 0x40, 0x40, 0x81, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x92B4, Value: 0x8814040
0x28, 0xAB, 0x07, 0x00, 0x01, 0x00, 0x60, 0x93, 0x72, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9360, Value: 0x72
0x28, 0xAB, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x92, 0x20, 0x48, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x928C, Value: 0x824820
0x28, 0xAB, 0x07, 0x00, 0x0E, 0x00, 0x40, 0x93, 0x0A, 0x00, 0xEB, 0x1F, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x9340, Value: 0x1FEB000A
0x28, 0xAB, 0x07, 0x00, 0x03, 0x00, 0x70, 0x92, 0x58, 0x26, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9270, Value: 0x40402658
0x28, 0xAB, 0x07, 0x00, 0x09, 0x00, 0x10, 0x92, 0xFB, 0x01, 0xC8, 0x0A, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9210, Value: 0xAC801FB
0x28, 0xAB, 0x07, 0x00, 0x04, 0x00, 0x04, 0x90, 0x44, 0x00, 0x21, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAB, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9004, Value: 0x210044
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x1F, 0x63, 0x20, 0x03, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x320631F
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0x00, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A000
0x28, 0xAA, 0x07, 0x00, 0x0D, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x00, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x8668, Value: 0xB800822A
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xC0, 0x86, 0x00, 0x00, 0x88, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86C0, Value: 0x5B880000
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xAA, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x608D8850
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x0A, 0x10, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0xA100A
0x28, 0xAA, 0x07, 0x00, 0x0E, 0x00, 0x80, 0x86, 0x60, 0x0F, 0xA0, 0xE8, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8680, Value: 0xE8A00F60
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0xE0, 0x86, 0x00, 0x04, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86E0, Value: 0x8000400
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xC4, 0x86, 0xFF, 0xFF, 0x3F, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C4, Value: 0xFF3FFFFF
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE01B0200
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x38, 0x84, 0x7F, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8438, Value: 0x7F
0x28, 0xAA, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x12, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x129BFF
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x09, 0x02, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x209007C
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0xBC, 0x86, 0x80, 0x00, 0x10, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86BC, Value: 0x100080
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x86, 0x00, 0x0E, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86F4, Value: 0xE00
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2A, 0x08, 0x60, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x60082A
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x88, 0x86, 0x20, 0x00, 0x74, 0x24, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8688, Value: 0x24740020
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x86, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86B4, Value: 0x2C814040
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x86, 0xEC, 0x00, 0x00, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86A0, Value: 0x1C0000EC
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x64, 0x86, 0x00, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8664, Value: 0x5400
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x4C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x4C0000
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x864C, Value: 0x102C907
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x74, 0x86, 0x49, 0xFF, 0x80, 0x8D, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8674, Value: 0x8D80FF49
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xAA, 0x07, 0x00, 0x0D, 0x00, 0xE4, 0x86, 0x50, 0x05, 0x0B, 0x9C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x86E4, Value: 0x9C0B0550
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x10, 0x86, 0x5F, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8610, Value: 0xC0015F
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x1C, 0x1C, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x1C1C1C
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0xC4, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0xC4
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8654, Value: 0x8C00002
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80090100
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC1, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x24C164
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x70, 0x86, 0x5A, 0xE5, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8670, Value: 0x4040E55A
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x90, 0x86, 0x48, 0x30, 0x50, 0x75, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8690, Value: 0x75503048
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0x24, 0x86, 0xFC, 0x60, 0x33, 0xAA, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8624, Value: 0xAA3360FC
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x04, 0x86, 0x39, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8604, Value: 0x50939
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x4C, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4C00
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x05, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE0330005
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x31, 0x81, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8658, Value: 0x8131A009
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x00, 0xA8, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0x52A800
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xAA, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x00, 0x00, 0x00, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xFF000000
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x86, 0xA8, 0x00, 0x3B, 0x6E, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x861C, Value: 0x6E3B00A8
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0x5408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE0330000
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0x04, 0x8C, 0x44, 0x01, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8C04, Value: 0x240144
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0x24, 0x8C, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8C24, Value: 0xA40B0A10
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x8E, 0xA8, 0x00, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E1C, Value: 0x3B00A8
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x10, 0x8C, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C10, Value: 0x72BF0000
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE01B0200
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x00, 0x8E, 0x00, 0x69, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E00, Value: 0x9526900
0x28, 0xAA, 0x07, 0x00, 0x07, 0x00, 0x48, 0x8E, 0x4C, 0x19, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8E48, Value: 0x105194C
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x74, 0x8E, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E74, Value: 0x8E80FF49
0x28, 0xAA, 0x07, 0x00, 0x0A, 0x00, 0x54, 0x8E, 0x00, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8E54, Value: 0xC00100
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x04, 0x8E, 0x09, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E04, Value: 0x50909
0x28, 0xAA, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x8E, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8EB4, Value: 0x2C814040
0x28, 0xAA, 0x07, 0x00, 0x02, 0x00, 0x20, 0x8E, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E20, Value: 0x4800
0x28, 0xAA, 0x07, 0x00, 0x09, 0x00, 0x08, 0x8E, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8E08, Value: 0x21E01850
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x78, 0x8E, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8E78, Value: 0x40834060
0x28, 0xAA, 0x07, 0x00, 0x06, 0x00, 0x8C, 0x8E, 0x7C, 0x80, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8E8C, Value: 0x8807C
0x28, 0xAA, 0x07, 0x00, 0x04, 0x00, 0x00, 0x8C, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C00, Value: 0x80090100
0x28, 0xAA, 0x07, 0x00, 0x01, 0x00, 0x28, 0x8C, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8C28, Value: 0x10201E0
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x38, 0x81, 0xC4, 0xC4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8138, Value: 0xC4C4
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x10, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1001
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x44, 0x86, 0x4E, 0xDE, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8644, Value: 0x105DE4E
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x86, 0x0A, 0x10, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x862C, Value: 0xA100A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x30, 0x86, 0x50, 0xC0, 0x00, 0xBE, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8630, Value: 0xBE00C050
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x5C, 0x86, 0x2A, 0x08, 0x60, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x865C, Value: 0x60082A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x3C, 0x84, 0x02, 0x9F, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x843C, Value: 0x9F02
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xE0, 0x86, 0x00, 0x04, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86E0, Value: 0x8000400
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x84, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8428, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x50, 0x86, 0x3F, 0x3F, 0x3F, 0x05, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8650, Value: 0x53F3F3F
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x86, 0xF0, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x863C, Value: 0xF0
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0xAC, 0x86, 0xEC, 0x60, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x86AC, Value: 0x60EC
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x18, 0x84, 0x7C, 0x00, 0x09, 0x02, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8418, Value: 0x209007C
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x84, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8400, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x86, 0x00, 0x00, 0x4C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x869C, Value: 0x4C0000
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x86, 0x39, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8604, Value: 0x50939
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x86, 0x1C, 0x1C, 0x1C, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x86A4, Value: 0x1C1C1C
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xBC, 0x86, 0x80, 0x00, 0x10, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86BC, Value: 0x100080
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0xF0, 0x86, 0x20, 0x28, 0x28, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86F0, Value: 0x28282820
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x9C, 0x85, 0x00, 0x0C, 0x49, 0x22, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x859C, Value: 0x22490C00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x20, 0x84, 0x25, 0x16, 0x07, 0x0D, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8420, Value: 0xD071625
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x00, 0x86, 0x00, 0xA8, 0x52, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8600, Value: 0x52A800
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x86, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8678, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x1C, 0x84, 0x00, 0xC0, 0x00, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x841C, Value: 0x6000C000
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x0C, 0x86, 0xFF, 0x9B, 0x12, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x860C, Value: 0x129BFF
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x86, 0x50, 0x88, 0x8D, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C8, Value: 0x608D8850
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x88, 0x86, 0x20, 0x00, 0x74, 0x24, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8688, Value: 0x24740020
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xC0, 0x86, 0x00, 0x00, 0x88, 0x5B, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86C0, Value: 0x5B880000
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x24, 0x86, 0xFC, 0x60, 0x33, 0xAA, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8624, Value: 0xAA3360FC
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x40, 0x84, 0x00, 0xA0, 0x02, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8440, Value: 0xFF02A000
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x04, 0x84, 0x64, 0xC1, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8404, Value: 0x24C164
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x90, 0x86, 0x48, 0x30, 0x50, 0x75, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8690, Value: 0x75503048
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x14, 0x86, 0x1F, 0x63, 0x20, 0x03, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8614, Value: 0x320631F
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x86, 0xA8, 0x00, 0x3B, 0x6E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x861C, Value: 0x6E3B00A8
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x8C, 0x85, 0x00, 0x08, 0x1F, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x858C, Value: 0x201F0800
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x84, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8424, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x40, 0x86, 0x58, 0xCF, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x8640, Value: 0x105CF58
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x86, 0x00, 0x4C, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8620, Value: 0x4C00
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x86, 0x50, 0xFF, 0xFF, 0x3F, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8608, Value: 0x3FFFFF50
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x4C, 0x86, 0x07, 0xC9, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x864C, Value: 0x102C907
0x28, 0xA9, 0x07, 0x00, 0x0D, 0x00, 0x68, 0x86, 0x2A, 0x82, 0x00, 0xB8, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x8668, Value: 0xB800822A
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x84, 0x05, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8464, Value: 0xE0330005
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x64, 0x86, 0x00, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8664, Value: 0x5400
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x84, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8410, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x10, 0x86, 0x5F, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8610, Value: 0xC0015F
0x28, 0xA9, 0x07, 0x00, 0x0E, 0x00, 0x80, 0x86, 0x60, 0x0F, 0xA0, 0xE8, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xE, FID: 0x0, Offset: 0x8680, Value: 0xE8A00F60
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x58, 0x86, 0x09, 0xA0, 0x31, 0x81, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8658, Value: 0x8131A009
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x84, 0x85, 0x08, 0x0A, 0x00, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8584, Value: 0x8000A08
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x86, 0x58, 0x40, 0x04, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x868C, Value: 0x44058
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x86, 0xEC, 0x00, 0x00, 0x1C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86A0, Value: 0x1C0000EC
0x28, 0xA9, 0x07, 0x00, 0x0D, 0x00, 0xE4, 0x86, 0x50, 0x05, 0x0B, 0x9C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xD, FID: 0x0, Offset: 0x86E4, Value: 0x9C0B0550
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x86, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x86B4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x74, 0x86, 0x49, 0xFF, 0x80, 0x8D, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8674, Value: 0x8D80FF49
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x54, 0x85, 0x06, 0x2A, 0x29, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8554, Value: 0x28292A06
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x54, 0x86, 0x02, 0x00, 0xC0, 0x08, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8654, Value: 0x8C00002
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x70, 0x86, 0x5A, 0xE5, 0x40, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x8670, Value: 0x4040E55A
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC4, 0x86, 0xFF, 0xFF, 0x3F, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x86C4, Value: 0xFF3FFFFF
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0xEC, 0x86, 0xC4, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x86EC, Value: 0xC4
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x60, 0x86, 0x00, 0x00, 0x00, 0xFF, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8660, Value: 0xFF000000
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0xD4, 0x86, 0xC0, 0x80, 0x82, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x86D4, Value: 0x8280C0
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x38, 0x84, 0x7F, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8438, Value: 0x7F
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x86, 0x00, 0x0E, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x86F4, Value: 0xE00
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x64, 0x86, 0x08, 0x54, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8664, Value: 0x5408
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x8E, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8EB4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x08, 0x8E, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x8E08, Value: 0x21E01850
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x8E, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8E78, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0x8C, 0x8E, 0x7C, 0x80, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8E8C, Value: 0x8807C
0x28, 0xA9, 0x07, 0x00, 0x06, 0x00, 0x04, 0x8C, 0x44, 0x01, 0x24, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0x8C04, Value: 0x240144
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x48, 0x8E, 0x4C, 0x19, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x8E48, Value: 0x105194C
0x28, 0xA9, 0x07, 0x00, 0x0A, 0x00, 0x54, 0x8E, 0x00, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x8E54, Value: 0xC00100
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x8C, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C10, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x8C, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8C64, Value: 0xE0330000
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x00, 0x8E, 0x00, 0x69, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E00, Value: 0x9526900
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x74, 0x8E, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E74, Value: 0x8E80FF49
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x8C, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8C24, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x8C, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8C28, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x1C, 0x8E, 0xA8, 0x00, 0x3B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E1C, Value: 0x3B00A8
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x8C, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x8C00, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x8E, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x8E20, Value: 0x4800
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x04, 0x8E, 0x09, 0x09, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8E04, Value: 0x50909
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x74, 0x96, 0x49, 0xFF, 0x80, 0x8E, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9674, Value: 0x8E80FF49
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x18, 0x96, 0xBF, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9618, Value: 0xBF
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x5C, 0x96, 0x2A, 0x08, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x965C, Value: 0x30082A
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x1C, 0x96, 0x58, 0x00, 0x3B, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x961C, Value: 0x13B0058
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x18, 0x94, 0x7C, 0x00, 0x39, 0x02, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9418, Value: 0x239007C
0x28, 0xA9, 0x07, 0x00, 0x0C, 0x00, 0x58, 0x96, 0x09, 0xA0, 0x33, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x9658, Value: 0x133A009
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x00, 0x96, 0x00, 0x29, 0x52, 0x09, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9600, Value: 0x9522900
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x94, 0x45, 0x01, 0x24, 0x04, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9404, Value: 0x4240145
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x48, 0x96, 0x4C, 0x15, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9648, Value: 0x105154C
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xE8, 0x96, 0x00, 0x48, 0x17, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96E8, Value: 0x2C174800
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x04, 0x96, 0x09, 0x00, 0x05, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9604, Value: 0x50009
0x28, 0xA9, 0x07, 0x00, 0x03, 0x00, 0x58, 0x95, 0x00, 0x28, 0x1F, 0x15, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x9558, Value: 0x151F2800
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x6C, 0x96, 0x28, 0x24, 0x04, 0x48, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x966C, Value: 0x48042428
0x28, 0xA9, 0x07, 0x00, 0x01, 0x00, 0x28, 0x94, 0xE0, 0x01, 0x02, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x9428, Value: 0x10201E0
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x94, 0x00, 0x02, 0x1B, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9464, Value: 0xE01B0200
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x54, 0x95, 0x06, 0x2D, 0x2D, 0x28, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9554, Value: 0x282D2D06
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x00, 0x94, 0x00, 0x01, 0x09, 0x80, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9400, Value: 0x80090100
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x88, 0x96, 0x00, 0x30, 0x74, 0x64, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9688, Value: 0x64743000
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xA0, 0x96, 0xEC, 0x00, 0x00, 0x2B, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96A0, Value: 0x2B0000EC
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x2C, 0x96, 0x0A, 0x50, 0x0A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x962C, Value: 0xA500A
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0xF4, 0x96, 0x00, 0x18, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x96F4, Value: 0x1800
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x96, 0x70, 0x20, 0x08, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x968C, Value: 0x82070
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x24, 0x94, 0x10, 0x0A, 0x0B, 0xA4, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9424, Value: 0xA40B0A10
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x10, 0x94, 0x00, 0x00, 0xBF, 0x72, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9410, Value: 0x72BF0000
0x28, 0xA9, 0x07, 0x00, 0x0F, 0x00, 0x64, 0x94, 0x00, 0x00, 0x33, 0xE0, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x9464, Value: 0xE0330000
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x9C, 0x96, 0x00, 0x00, 0x20, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x969C, Value: 0x200000
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0xA4, 0x96, 0x2B, 0x2B, 0x2B, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x96A4, Value: 0x2B2B2B
0x28, 0xA9, 0x07, 0x00, 0x0B, 0x00, 0x54, 0x96, 0x02, 0x01, 0xC0, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x9654, Value: 0xC00102
0x28, 0xA9, 0x07, 0x00, 0x05, 0x00, 0x40, 0x96, 0x5E, 0xCF, 0x18, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x9640, Value: 0x118CF5E
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0xB4, 0x96, 0x40, 0x40, 0x81, 0x2C, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x96B4, Value: 0x2C814040
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0x78, 0x96, 0x60, 0x40, 0x83, 0x40, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x9678, Value: 0x40834060
0x28, 0xA9, 0x07, 0x00, 0x08, 0x00, 0x50, 0x96, 0x3F, 0x3F, 0x3F, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x9650, Value: 0x13F3F3F
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x68, 0x96, 0x1E, 0x82, 0x00, 0xBA, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9668, Value: 0xBA00821E
0x28, 0xA9, 0x07, 0x00, 0x09, 0x00, 0x08, 0x96, 0x50, 0x18, 0xE0, 0x21, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x9, FID: 0x0, Offset: 0x9608, Value: 0x21E01850
0x28, 0xA9, 0x07, 0x00, 0x02, 0x00, 0x20, 0x96, 0x00, 0x48, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x9620, Value: 0x4800
0x28, 0xA9, 0x07, 0x00, 0x04, 0x00, 0xC8, 0x96, 0x50, 0x88, 0x4F, 0x60, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x96C8, Value: 0x604F8850
0x28, 0xA9, 0x07, 0x00, 0x07, 0x00, 0x44, 0x96, 0x48, 0x15, 0x05, 0x01, //Command: 0x0, Size: 0x5, PID: 0xA9, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x9644, Value: 0x1051548
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0x3C, 0x80, 0x06, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x803C, Value: 0x6
0x28, 0xA8, 0x07, 0x00, 0x04, 0x00, 0xE8, 0x80, 0x80, 0x08, 0x0C, 0x3C, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x80E8, Value: 0x3C0C0880
0x28, 0xA8, 0x07, 0x00, 0x08, 0x00, 0x38, 0x81, 0xAC, 0xD4, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x8138, Value: 0xD4AC
0x28, 0xA8, 0x07, 0x00, 0x0B, 0x00, 0x90, 0x81, 0x02, 0x06, 0x01, 0x0C, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0xB, FID: 0x0, Offset: 0x8190, Value: 0xC010602
0x28, 0xA8, 0x07, 0x00, 0x05, 0x00, 0xA8, 0x81, 0x06, 0x00, 0x1F, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x5, FID: 0x0, Offset: 0x81A8, Value: 0x1F0006
0x28, 0xA8, 0x07, 0x00, 0x0A, 0x00, 0xB0, 0x81, 0x00, 0x3C, 0x00, 0x78, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x81B0, Value: 0x78003C00
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0xC8, 0x81, 0x01, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81C8, Value: 0x1
0x28, 0xA8, 0x07, 0x00, 0x01, 0x00, 0xCC, 0x81, 0x01, 0x10, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xA8, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x81CC, Value: 0x1001
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x29, 0xAC, 0x07, 0x00, 0x04, 0x00, 0x1C, 0x01, 0x01, 0x30, 0x00, 0x80, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x11C, Value: 0x80003001
0x29, 0xAC, 0x07, 0x00, 0x06, 0x00, 0x0C, 0xB1, 0x40, 0x00, 0x07, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x6, FID: 0x0, Offset: 0xB10C, Value: 0x70040
0x29, 0xAC, 0x07, 0x00, 0x02, 0x00, 0x6C, 0x03, 0x0B, 0x03, 0x00, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x36C, Value: 0x30B
0x29, 0xAC, 0x07, 0x00, 0x0A, 0x00, 0x70, 0x03, 0x00, 0x3C, 0x00, 0x78, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0xA, FID: 0x0, Offset: 0x370, Value: 0x78003C00
0x29, 0xAC, 0x07, 0x00, 0x01, 0x00, 0x88, 0x03, 0x01, 0x00, 0x00, 0x00, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0x388, Value: 0x1
0x29, 0xAC, 0x07, 0x00, 0x01, 0x00, 0x14, 0xB1, 0xE9, 0xD4, 0x25, 0x48, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x1, FID: 0x0, Offset: 0xB114, Value: 0x4825D4E9
0x29, 0xAC, 0x07, 0x00, 0x04, 0x00, 0x50, 0x03, 0x03, 0x09, 0x02, 0x0C, //Command: 0x1, Size: 0x5, PID: 0xAC, OpCode: 0x7, Bar: 0x0, FBE: 0x4, FID: 0x0, Offset: 0x350, Value: 0xC020903
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x46C, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0xEC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3EC, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x48C, Value: 0x30000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x0C, 0x04, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x40C, Value: 0x30000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x42C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x4C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x44C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x46C, Value: 0x0
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x04, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x48C, Value: 0x0
0x28, 0x69, 0x07, 0x00, 0x02, 0x00, 0x10, 0x03, 0x00, 0x30, 0x00, 0x06, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x310, Value: 0x6003000
0x28, 0x69, 0x07, 0x00, 0x03, 0x00, 0x04, 0x03, 0x18, 0x18, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x304, Value: 0xC0001818
0x28, 0x69, 0x07, 0x00, 0x07, 0x00, 0x0C, 0x03, 0x18, 0x18, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x30C, Value: 0x31818
0x28, 0x69, 0x07, 0x00, 0x02, 0x00, 0x30, 0x03, 0x00, 0x30, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x330, Value: 0x7003000
0x28, 0x69, 0x07, 0x00, 0x03, 0x00, 0x24, 0x03, 0x18, 0x18, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x324, Value: 0xC0001818
0x28, 0x69, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x03, 0x18, 0x18, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x69, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x32C, Value: 0x31818
0x28, 0x6E, 0x07, 0x00, 0x02, 0x00, 0x70, 0x03, 0x04, 0x30, 0x00, 0x06, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x370, Value: 0x6003004
0x28, 0x6E, 0x07, 0x00, 0x03, 0x00, 0x64, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x364, Value: 0xC0000000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x36C, Value: 0x30000
0x28, 0x6E, 0x07, 0x00, 0x02, 0x00, 0x90, 0x03, 0x04, 0x30, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x390, Value: 0x7003004
0x28, 0x6E, 0x07, 0x00, 0x03, 0x00, 0x84, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x384, Value: 0xC0000000
0x28, 0x6E, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6E, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x38C, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x02, 0x00, 0xD0, 0x03, 0x04, 0x30, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x3D0, Value: 0x7203004
0x28, 0x6D, 0x07, 0x00, 0x03, 0x00, 0xC4, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x3C4, Value: 0xC0000000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xCC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3CC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xAC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3AC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0x2C, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x32C, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0xEC, 0x03, 0x00, 0x00, 0x03, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x3EC, Value: 0x30000
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x04, 0x07, 0x6C, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x704, Value: 0x180006C
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x708, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x14, 0x07, 0x6D, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x714, Value: 0x180006D
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x18, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x718, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x24, 0x07, 0x6E, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x724, Value: 0x180006E
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x28, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x728, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x34, 0x07, 0x6F, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x734, Value: 0x180006F
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x38, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x738, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x44, 0x07, 0x70, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x744, Value: 0x1800070
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x48, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x748, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x54, 0x07, 0x71, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x754, Value: 0x1800071
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x58, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x758, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x64, 0x07, 0x72, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x764, Value: 0x1800072
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x68, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x768, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x0C, 0x00, 0x74, 0x07, 0x73, 0x00, 0x80, 0x01, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0xC, FID: 0x0, Offset: 0x774, Value: 0x1800073
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x78, 0x07, 0x00, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x778, Value: 0x0
0x28, 0x6D, 0x07, 0x00, 0x08, 0x00, 0x10, 0x03, 0x00, 0x20, 0x20, 0x02, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x8, FID: 0x0, Offset: 0x310, Value: 0x2202000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0xB0, 0x04, 0x00, 0x00, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x4B0, Value: 0x7200000
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0xA4, 0x04, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x4A4, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0xD0, 0x04, 0x00, 0x00, 0x20, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x4D0, Value: 0x7200000
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0xC4, 0x04, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x4C4, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x02, 0x00, 0x70, 0x03, 0x04, 0x20, 0x00, 0x07, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x2, FID: 0x0, Offset: 0x370, Value: 0x7002004
0x28, 0x6A, 0x07, 0x00, 0x03, 0x00, 0x64, 0x03, 0x00, 0x00, 0x00, 0xC0, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x3, FID: 0x0, Offset: 0x364, Value: 0xC0000000
0x28, 0x6A, 0x07, 0x00, 0x07, 0x00, 0x6C, 0x03, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6A, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x36C, Value: 0x20000
0x28, 0x6D, 0x07, 0x00, 0x07, 0x00, 0x8C, 0x03, 0x00, 0x00, 0x02, 0x00, //Command: 0x0, Size: 0x5, PID: 0x6D, OpCode: 0x7, Bar: 0x0, FBE: 0x7, FID: 0x0, Offset: 0x38C, Value: 0x20000
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x01, 0x40, 0x06, 0xB8, 0x3D, 0x2F, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4001, Value: 0x2F3DB806
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2B, 0x40, 0x05, 0x40, 0x6A, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x402B, Value: 0x6A4005
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x40, 0x80, 0x53, 0xA2, 0x09, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x402C, Value: 0x9A25380
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x7F, 0x80, 0xC6, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7F04, Value: 0xC680
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x70, 0x00, 0xC2, 0x88, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x702C, Value: 0x88C200
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x70, 0x08, 0x1E, 0x64, 0x64, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7000, Value: 0x64641E08
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x2C, 0x70, 0x00, 0xC2, 0x88, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x702C, Value: 0x88C200
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x70, 0x20, 0x5A, 0x2B, 0x22, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7008, Value: 0x222B5A20
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x14, 0x70, 0x18, 0x4D, 0xE9, 0x59, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7014, Value: 0x59E94D18
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x24, 0x70, 0x00, 0xE8, 0x01, 0x30, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x7024, Value: 0x3001E800
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x41, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4100, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x41, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4126, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x41, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4108, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x42, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4200, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x42, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4226, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x42, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4208, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x43, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4300, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x43, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4326, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x43, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4308, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x44, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4400, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x44, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4426, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x44, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4408, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x45, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4500, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x45, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4526, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x45, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4508, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x46, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4600, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x46, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4626, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x46, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4608, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x47, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4700, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x47, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4726, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x47, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4708, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x48, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4800, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x48, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4826, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x48, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4808, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x49, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4900, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x49, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4926, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x49, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4908, Value: 0xDAD0
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x00, 0x4A, 0x91, 0xB0, 0x05, 0xFC, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A00, Value: 0xFC05B091
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x26, 0x4A, 0x4B, 0x92, 0x82, 0x43, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A26, Value: 0x4382924B
0x28, 0xCA, 0x07, 0x00, 0x0F, 0x00, 0x08, 0x4A, 0xD0, 0xDA, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xCA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x4A08, Value: 0xDAD0
0x0F, 0x00, 0x00, 0x00, //End Table Marker
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x30, 0x80, 0x01, 0x04, 0x30, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8030, Value: 0x300401
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x3C, 0x80, 0x07, 0x00, 0x00, 0x00, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x803C, Value: 0x7
0x28, 0xAA, 0x07, 0x00, 0x0F, 0x00, 0x04, 0x80, 0x60, 0x00, 0x00, 0x20, //Command: 0x0, Size: 0x5, PID: 0xAA, OpCode: 0x7, Bar: 0x0, FBE: 0xF, FID: 0x0, Offset: 0x8004, Value: 0x20000060
0x0F, 0x00, 0x00, 0x00, //End Table Marker
//*****************ChipsetInitTable BIOS Table End*****************
Push Updated ChipsetInit table with CSME
PeiHeciWriteChipsetInitMsg(): Start
HECI1 Hfsts1 = 90000255, Hfsts4 = 4000
[HECI1] Send msg: 01FC0008
00: 00 00 05 00 19 00 00 00 - 00 00 00 00 0C 16 00 00
10: 00 00 00 00 00 00 00 00 - 0D 71 0C 7D FF FF 08 06
20: 10 00 0C 00 00 00 44 44 - 45 A5 4F 4A 56 D9 00 0F
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 28 AB 07 00 - 01 00 04 80 60 00 00 20
50: 28 AB 07 00 01 00 30 80 - 01 04 30 00 28 AB 07 00
60: 01 00 3C 80 06 00 00 00 - 28 AB 07 00 04 00 E8 80
70: 80 08 0C 3C 28 AB 07 00 - 0F 00 80 81 19 00 00 00
80: 28 AB 07 00 07 00 88 81 - 00 00 00 00 28 AB 07 00
90: 0F 00 90 81 02 07 01 0C - 28 AB 07 00 04 00 98 81
A0: 00 00 02 00 28 AB 07 00 - 05 00 9C 81 03 00 1C 00
B0: 28 AB 07 00 07 00 A0 81 - 00 00 00 00 28 AB 07 00
C0: 05 00 A8 81 06 00 1F 00 - 28 AB 07 00 03 00 AC 81
D0: 0B 03 00 00 28 AB 07 00 - 0A 00 B0 81 00 3C 00 78
E0: 28 AB 07 00 01 00 C8 81 - 01 00 00 00 28 AB 07 00
F0: 01 00 CC 81 01 00 00 00 - 0F 00 00 00 28 AB 07 00
00: 08 00 E8 86 00 48 17 1A - 28 AB 07 00 02 00 1C 84
10: 00 C0 00 60 28 AB 07 00 - 02 00 40 84 F0 A0 02 FF
20: 28 AB 07 00 08 00 60 86 - 08 00 08 F3 28 AB 07 00
30: 02 00 C0 86 00 10 88 1B - 28 AB 07 00 02 00 8C 85
40: 00 08 1F 20 28 AB 07 00 - 0F 00 F0 86 20 28 28 28
50: 28 AB 07 00 02 00 30 86 - 50 C0 00 BE 28 AB 07 00
60: 08 00 58 86 09 A0 32 81 - 28 AB 07 00 08 00 20 87
70: 04 02 12 08 28 AB 07 00 - 07 00 44 86 4E DE 05 01
80: 28 AB 07 00 06 00 54 87 - 80 50 06 00 28 AB 07 00
90: 02 00 3C 84 02 9F 00 00 - 28 AB 07 00 02 00 20 86
A0: 00 44 00 00 28 AB 07 00 - 04 00 D4 86 C0 80 82 00
B0: 28 AB 07 00 08 00 9C 85 - 00 0C 49 22 28 AB 07 00
C0: 08 00 10 86 FF 01 C8 1E - 28 AB 07 00 04 00 14 86
D0: 9F 63 0C 03 28 AB 07 00 - 01 00 3C 86 F0 00 00 00
E0: 28 AB 07 00 07 00 2C 86 - 5A 10 08 00 28 AB 07 00
F0: 0F 00 08 86 50 FF FF 3F - 28 AB 07 00
[HECI1] Send msg: 01FC0008
00: 08 00 28 87 00 00 04 FC - 28 AB 07 00 07 00 4C 86
10: 07 C9 05 01 28 AB 07 00 - 01 00 20 84 25 16 07 0D
20: 28 AB 07 00 07 00 8C 86 - 58 40 04 00 28 AB 07 00
30: 03 00 4C 87 FF 08 01 00 - 28 AB 07 00 07 00 64 86
40: 00 A4 00 00 28 AB 07 00 - 01 00 50 87 6E 80 10 10
50: 28 AB 07 00 04 00 78 86 - 60 40 83 40 28 AB 07 00
60: 0F 00 80 86 60 17 A0 01 - 28 AB 07 00 0C 00 A0 86
70: EC 70 C0 28 28 AB 07 00 - 0F 00 C4 86 D1 EC 21 E4
80: 28 AB 07 00 01 00 28 84 - E0 01 02 01 28 AB 07 00
90: 05 00 0C 86 FF 9B 92 00 - 28 AB 07 00 08 00 50 86
A0: 3F 3F 3F 05 28 AB 07 00 - 01 00 AC 86 EC 60 00 00
B0: 28 AB 07 00 0C 00 24 87 - 22 22 26 10 28 AB 07 00
C0: 01 00 54 86 02 00 C0 88 - 28 AB 07 00 01 00 54 85
D0: 06 2A 29 28 28 AB 07 00 - 04 00 C8 86 50 88 8D 3F
E0: 28 AB 07 00 04 00 9C 86 - 00 00 2C 00 28 AB 07 00
F0: 02 00 18 86 BF 00 00 00 - 28 AB 07 00 0F 00 EC 86
00: 04 80 00 00 28 AB 07 00 - 0E 00 08 87 45 F4 DF CC
10: 28 AB 07 00 07 00 A4 86 - 28 28 28 00 28 AB 07 00
20: 01 00 70 86 5E 25 40 40 - 28 AB 07 00 0B 00 88 86
30: 20 70 74 E4 28 AB 07 00 - 04 00 48 87 88 0A 8D D7
40: 28 AB 07 00 06 00 40 87 - 0A 00 E2 16 28 AB 07 00
50: 04 00 00 84 00 01 89 80 - 28 AB 07 00 08 00 1C 86
60: 08 10 3B 68 28 AB 07 00 - 01 00 1C 87 03 7F 1B 1B
70: 28 AB 07 00 0F 00 E4 86 - 50 45 0B 1C 28 AB 07 00
80: 01 00 5C 86 2E 08 3B 00 - 28 AB 07 00 07 00 04 84
90: 64 C0 11 00 28 AB 07 00 - 08 00 24 84 10 0A 0B A4
A0: 28 AB 07 00 05 00 40 86 - 58 CF 05 01 28 AB 07 00
B0: 0A 00 00 86 70 A8 52 0B - 28 AB 07 00 01 00 18 84
C0: 7C 00 89 02 28 AB 07 00 - 02 00 58 85 20 1E 1F 15
D0: 28 AB 07 00 08 00 84 85 - 08 0A 00 08 28 AB 07 00
E0: 05 00 04 86 09 09 0F 00 - 28 AB 07 00 06 00 10 84
F0: 00 00 BF 72 28 AB 07 00 - 0F 00 18 87
[HECI1] Send msg: 01FC0008
00: 00 0C 00 01 28 AB 07 00 - 05 00 68 86 2A 82 10 B8
10: 28 AB 07 00 01 00 64 86 - 08 A4 00 00 0F 00 00 00
20: 28 AB 07 00 0C 00 48 93 - 88 0A 8A D3 28 AB 07 00
30: 0F 00 5C 93 33 33 24 20 - 28 AB 07 00 02 00 64 91
40: 4C 60 4C 4C 28 AB 07 00 - 07 00 A4 92 1E 1E 1E 00
50: 28 AB 07 00 03 00 14 90 - 1D C5 00 11 28 AB 07 00
60: 0F 00 C4 92 D1 EC 01 E6 - 28 AB 07 00 0C 00 1C 93
70: 03 7F 21 21 28 AB 07 00 - 02 00 E4 92 40 A5 0B 4B
80: 28 AB 07 00 0F 00 18 93 - 01 00 00 4A 28 AB 07 00
90: 02 00 54 93 80 54 02 00 - 28 AB 07 00 0F 00 24 90
A0: 0F 0C 0C A4 28 AB 07 00 - 01 00 28 90 E0 01 02 01
B0: 28 AB 07 00 0C 00 E8 92 - 00 48 26 1A 28 AB 07 00
C0: 01 00 20 90 26 16 07 0D - 28 AB 07 00 09 00 1C 92
D0: F8 10 3B 00 28 AB 07 00 - 0C 00 C8 92 50 88 8D 0D
E0: 28 AB 07 00 01 00 E0 92 - 32 60 00 08 28 AB 07 00
F0: 04 00 AC 92 F6 60 00 00 - 28 AB 07 00 06 00 14 92
00: 9F 61 38 03 28 AB 07 00 - 0F 00 14 93 08 1C 05 0F
10: 28 AB 07 00 0F 00 24 93 - 36 38 B2 1F 28 AB 07 00
20: 0A 00 00 92 70 94 52 0B - 28 AB 07 00 07 00 44 93
30: 2B 1C 18 00 28 AB 07 00 - 07 00 4C 92 49 CD 05 01
40: 28 AB 07 00 03 00 4C 93 - DC 4F 01 00 28 AB 07 00
50: 0C 00 28 93 00 00 1A FF - 28 AB 07 00 08 00 60 92
60: 08 00 08 33 28 AB 07 00 - 03 00 58 93 A4 9C 8C 31
70: 28 AB 07 00 06 00 64 92 - 00 54 02 00 28 AB 07 00
80: 05 00 54 91 06 2A 2D 28 - 28 AB 07 00 05 00 68 92
90: 06 82 10 B8 28 AB 07 00 - 03 00 44 90 97 48 09 64
A0: 28 AB 07 00 0F 00 80 92 - 40 17 04 04 28 AB 07 00
B0: 08 00 A0 92 EC 70 80 1E - 28 AB 07 00 01 00 10 93
C0: 68 00 40 00 28 AB 07 00 - 08 00 84 91 08 0A 00 08
D0: 28 AB 07 00 0F 00 88 92 - 10 30 77 64 28 AB 07 00
E0: 04 00 78 92 60 40 83 40 - 28 AB 07 00 07 00 2C 92
F0: 0C 00 0B 00 28 AB 07 00 - 07 00 04 92
[HECI1] Send msg: 01FC0008
00: 09 0B 0F 00 28 AB 07 00 - 0D 00 40 92 4E CF 18 03
10: 28 AB 07 00 08 00 6C 92 - 00 24 04 5C 28 AB 07 00
20: 0F 00 20 93 04 21 03 0D - 28 AB 07 00 0F 00 0C 93
30: 1F E0 21 21 28 AB 07 00 - 01 00 3C 92 F0 00 00 00
40: 28 AB 07 00 01 00 0C 92 - E6 9B 52 00 28 AB 07 00
50: 02 00 18 92 BF 00 00 00 - 28 AB 07 00 01 00 5C 90
60: 96 BC 1F 3F 28 AB 07 00 - 04 00 00 90 00 01 89 80
70: 28 AB 07 00 0C 00 08 93 - 45 34 48 D0 28 AB 07 00
80: 01 00 50 93 6E 80 10 10 - 28 AB 07 00 04 00 04 93
90: 80 AA 11 C0 28 AB 07 00 - 02 00 8C 91 00 08 1F 20
A0: 28 AB 07 00 0F 00 08 92 - 50 D1 EC 01 28 AB 07 00
B0: 04 00 7C 92 18 18 26 40 - 28 AB 07 00 09 00 CC 92
C0: 25 17 17 5B 28 AB 07 00 - 08 00 B4 92 40 40 81 08
D0: 28 AB 07 00 01 00 60 93 - 72 00 00 00 28 AB 07 00
E0: 07 00 8C 92 20 48 82 00 - 28 AB 07 00 0E 00 40 93
F0: 0A 00 EB 1F 28 AB 07 00 - 03 00 70 92 58 26 40 40
00: 28 AB 07 00 09 00 10 92 - FB 01 C8 0A 28 AB 07 00
10: 04 00 04 90 44 00 21 00 - 0F 00 00 00 28 AA 07 00
20: 04 00 E8 80 80 08 0C 3C - 0F 00 00 00 28 AA 07 00
30: 04 00 14 86 1F 63 20 03 - 28 AA 07 00 02 00 40 84
40: 00 A0 02 FF 28 AA 07 00 - 0D 00 68 86 2A 82 00 B8
50: 28 AA 07 00 04 00 78 86 - 60 40 83 40 28 AA 07 00
60: 08 00 C0 86 00 00 88 5B - 28 AA 07 00 04 00 10 84
70: 00 00 BF 72 28 AA 07 00 - 05 00 40 86 58 CF 05 01
80: 28 AA 07 00 04 00 C8 86 - 50 88 8D 60 28 AA 07 00
90: 07 00 2C 86 0A 10 0A 00 - 28 AA 07 00 0E 00 80 86
A0: 60 0F A0 E8 28 AA 07 00 - 07 00 8C 86 58 40 04 00
B0: 28 AA 07 00 02 00 E0 86 - 00 04 00 08 28 AA 07 00
C0: 04 00 C4 86 FF FF 3F FF - 28 AA 07 00 0F 00 64 84
D0: 00 02 1B E0 28 AA 07 00 - 01 00 38 84 7F 00 00 00
E0: 28 AA 07 00 05 00 0C 86 - FF 9B 12 00 28 AA 07 00
F0: 08 00 24 84 10 0A 0B A4 - 28 AA 07 00
[HECI1] Send msg: 01FC0008
00: 01 00 18 84 7C 00 09 02 - 28 AA 07 00 04 00 BC 86
10: 80 00 10 00 28 AA 07 00 - 06 00 D4 86 C0 80 82 00
20: 28 AA 07 00 02 00 F4 86 - 00 0E 00 00 28 AA 07 00
30: 01 00 5C 86 2A 08 60 00 - 28 AA 07 00 03 00 88 86
40: 20 00 74 24 28 AA 07 00 - 08 00 B4 86 40 40 81 2C
50: 28 AA 07 00 08 00 A0 86 - EC 00 00 1C 28 AA 07 00
60: 03 00 64 86 00 54 00 00 - 28 AA 07 00 04 00 9C 86
70: 00 00 4C 00 28 AA 07 00 - 03 00 4C 86 07 C9 02 01
80: 28 AA 07 00 0A 00 74 86 - 49 FF 80 8D 28 AA 07 00
90: 01 00 3C 86 F0 00 00 00 - 28 AA 07 00 0D 00 E4 86
A0: 50 05 0B 9C 28 AA 07 00 - 0F 00 F0 86 20 28 28 28
B0: 28 AA 07 00 01 00 28 84 - E0 01 02 01 28 AA 07 00
C0: 01 00 10 86 5F 01 C0 00 - 28 AA 07 00 07 00 A4 86
D0: 1C 1C 1C 00 28 AA 07 00 - 0F 00 EC 86 C4 00 00 00
E0: 28 AA 07 00 01 00 54 85 - 06 2A 29 28 28 AA 07 00
F0: 09 00 54 86 02 00 C0 08 - 28 AA 07 00 04 00 00 84
00: 00 01 09 80 28 AA 07 00 - 07 00 04 84 64 C1 24 00
10: 28 AA 07 00 01 00 20 84 - 25 16 07 0D 28 AA 07 00
20: 02 00 3C 84 02 9F 00 00 - 28 AA 07 00 08 00 9C 85
30: 00 0C 49 22 28 AA 07 00 - 03 00 70 86 5A E5 40 40
40: 28 AA 07 00 01 00 90 86 - 48 30 50 75 28 AA 07 00
50: 08 00 84 85 08 0A 00 08 - 28 AA 07 00 03 00 24 86
60: FC 60 33 AA 28 AA 07 00 - 07 00 44 86 4E DE 05 01
70: 28 AA 07 00 08 00 50 86 - 3F 3F 3F 05 28 AA 07 00
80: 01 00 04 86 39 09 05 00 - 28 AA 07 00 02 00 20 86
90: 00 4C 00 00 28 AA 07 00 - 0F 00 64 84 05 00 33 E0
A0: 28 AA 07 00 02 00 30 86 - 50 C0 00 BE 28 AA 07 00
B0: 0A 00 58 86 09 A0 31 81 - 28 AA 07 00 02 00 8C 85
C0: 00 08 1F 20 28 AA 07 00 - 0A 00 00 86 00 A8 52 00
D0: 28 AA 07 00 0F 00 08 86 - 50 FF FF 3F 28 AA 07 00
E0: 03 00 AC 86 EC 60 00 00 - 28 AA 07 00 08 00 60 86
F0: 00 00 00 FF 28 AA 07 00 - 02 00 1C 84
[HECI1] Send msg: 01FC0008
00: 00 C0 00 60 28 AA 07 00 - 09 00 1C 86 A8 00 3B 6E
10: 28 AA 07 00 01 00 64 86 - 08 54 00 00 0F 00 00 00
20: 28 AA 07 00 0F 00 64 8C - 00 00 33 E0 28 AA 07 00
30: 06 00 04 8C 44 01 24 00 - 28 AA 07 00 08 00 24 8C
40: 10 0A 0B A4 28 AA 07 00 - 01 00 1C 8E A8 00 3B 00
50: 28 AA 07 00 04 00 10 8C - 00 00 BF 72 28 AA 07 00
60: 0F 00 64 8C 00 02 1B E0 - 28 AA 07 00 02 00 00 8E
70: 00 69 52 09 28 AA 07 00 - 07 00 48 8E 4C 19 05 01
80: 28 AA 07 00 02 00 74 8E - 49 FF 80 8E 28 AA 07 00
90: 0A 00 54 8E 00 01 C0 00 - 28 AA 07 00 01 00 04 8E
A0: 09 09 05 00 28 AA 07 00 - 08 00 B4 8E 40 40 81 2C
B0: 28 AA 07 00 02 00 20 8E - 00 48 00 00 28 AA 07 00
C0: 09 00 08 8E 50 18 E0 21 - 28 AA 07 00 04 00 78 8E
D0: 60 40 83 40 28 AA 07 00 - 06 00 8C 8E 7C 80 08 00
E0: 28 AA 07 00 04 00 00 8C - 00 01 09 80 28 AA 07 00
F0: 01 00 28 8C E0 01 02 01 - 0F 00 00 00 28 A9 07 00
00: 01 00 04 80 60 00 00 20 - 28 A9 07 00 01 00 30 80
10: 01 04 30 00 28 A9 07 00 - 01 00 3C 80 06 00 00 00
20: 28 A9 07 00 04 00 E8 80 - 80 08 0C 3C 28 A9 07 00
30: 08 00 38 81 C4 C4 00 00 - 28 A9 07 00 0A 00 B0 81
40: 00 3C 00 78 28 A9 07 00 - 01 00 C8 81 01 00 00 00
50: 28 A9 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
60: 28 A9 07 00 07 00 44 86 - 4E DE 05 01 28 A9 07 00
70: 07 00 2C 86 0A 10 0A 00 - 28 A9 07 00 02 00 30 86
80: 50 C0 00 BE 28 A9 07 00 - 01 00 5C 86 2A 08 60 00
90: 28 A9 07 00 02 00 3C 84 - 02 9F 00 00 28 A9 07 00
A0: 02 00 E0 86 00 04 00 08 - 28 A9 07 00 01 00 28 84
B0: E0 01 02 01 28 A9 07 00 - 08 00 50 86 3F 3F 3F 05
C0: 28 A9 07 00 01 00 3C 86 - F0 00 00 00 28 A9 07 00
D0: 03 00 AC 86 EC 60 00 00 - 28 A9 07 00 01 00 18 84
E0: 7C 00 09 02 28 A9 07 00 - 04 00 00 84 00 01 09 80
F0: 28 A9 07 00 04 00 9C 86 - 00 00 4C 00
[HECI1] Send msg: 01FC0008
00: 28 A9 07 00 01 00 04 86 - 39 09 05 00 28 A9 07 00
10: 07 00 A4 86 1C 1C 1C 00 - 28 A9 07 00 04 00 BC 86
20: 80 00 10 00 28 A9 07 00 - 0F 00 F0 86 20 28 28 28
30: 28 A9 07 00 08 00 9C 85 - 00 0C 49 22 28 A9 07 00
40: 01 00 20 84 25 16 07 0D - 28 A9 07 00 0A 00 00 86
50: 00 A8 52 00 28 A9 07 00 - 04 00 78 86 60 40 83 40
60: 28 A9 07 00 0F 00 64 84 - 00 02 1B E0 28 A9 07 00
70: 02 00 1C 84 00 C0 00 60 - 28 A9 07 00 05 00 0C 86
80: FF 9B 12 00 28 A9 07 00 - 04 00 C8 86 50 88 8D 60
90: 28 A9 07 00 03 00 88 86 - 20 00 74 24 28 A9 07 00
A0: 08 00 C0 86 00 00 88 5B - 28 A9 07 00 03 00 24 86
B0: FC 60 33 AA 28 A9 07 00 - 02 00 40 84 00 A0 02 FF
C0: 28 A9 07 00 07 00 04 84 - 64 C1 24 00 28 A9 07 00
D0: 01 00 90 86 48 30 50 75 - 28 A9 07 00 04 00 14 86
E0: 1F 63 20 03 28 A9 07 00 - 09 00 1C 86 A8 00 3B 6E
F0: 28 A9 07 00 02 00 8C 85 - 00 08 1F 20 28 A9 07 00
00: 08 00 24 84 10 0A 0B A4 - 28 A9 07 00 05 00 40 86
10: 58 CF 05 01 28 A9 07 00 - 02 00 20 86 00 4C 00 00
20: 28 A9 07 00 0F 00 08 86 - 50 FF FF 3F 28 A9 07 00
30: 03 00 4C 86 07 C9 02 01 - 28 A9 07 00 0D 00 68 86
40: 2A 82 00 B8 28 A9 07 00 - 0F 00 64 84 05 00 33 E0
50: 28 A9 07 00 03 00 64 86 - 00 54 00 00 28 A9 07 00
60: 04 00 10 84 00 00 BF 72 - 28 A9 07 00 01 00 10 86
70: 5F 01 C0 00 28 A9 07 00 - 0E 00 80 86 60 0F A0 E8
80: 28 A9 07 00 0A 00 58 86 - 09 A0 31 81 28 A9 07 00
90: 08 00 84 85 08 0A 00 08 - 28 A9 07 00 07 00 8C 86
A0: 58 40 04 00 28 A9 07 00 - 08 00 A0 86 EC 00 00 1C
B0: 28 A9 07 00 0D 00 E4 86 - 50 05 0B 9C 28 A9 07 00
C0: 08 00 B4 86 40 40 81 2C - 28 A9 07 00 0A 00 74 86
D0: 49 FF 80 8D 28 A9 07 00 - 01 00 54 85 06 2A 29 28
E0: 28 A9 07 00 09 00 54 86 - 02 00 C0 08 28 A9 07 00
F0: 03 00 70 86 5A E5 40 40 - 28 A9 07 00
[HECI1] Send msg: 01FC0008
00: 04 00 C4 86 FF FF 3F FF - 28 A9 07 00 0F 00 EC 86
10: C4 00 00 00 28 A9 07 00 - 08 00 60 86 00 00 00 FF
20: 28 A9 07 00 06 00 D4 86 - C0 80 82 00 28 A9 07 00
30: 01 00 38 84 7F 00 00 00 - 28 A9 07 00 02 00 F4 86
40: 00 0E 00 00 28 A9 07 00 - 01 00 64 86 08 54 00 00
50: 0F 00 00 00 28 A9 07 00 - 08 00 B4 8E 40 40 81 2C
60: 28 A9 07 00 09 00 08 8E - 50 18 E0 21 28 A9 07 00
70: 04 00 78 8E 60 40 83 40 - 28 A9 07 00 06 00 8C 8E
80: 7C 80 08 00 28 A9 07 00 - 06 00 04 8C 44 01 24 00
90: 28 A9 07 00 07 00 48 8E - 4C 19 05 01 28 A9 07 00
A0: 0A 00 54 8E 00 01 C0 00 - 28 A9 07 00 04 00 10 8C
B0: 00 00 BF 72 28 A9 07 00 - 0F 00 64 8C 00 02 1B E0
C0: 28 A9 07 00 0F 00 64 8C - 00 00 33 E0 28 A9 07 00
D0: 02 00 00 8E 00 69 52 09 - 28 A9 07 00 02 00 74 8E
E0: 49 FF 80 8E 28 A9 07 00 - 08 00 24 8C 10 0A 0B A4
F0: 28 A9 07 00 01 00 28 8C - E0 01 02 01 28 A9 07 00
00: 01 00 1C 8E A8 00 3B 00 - 28 A9 07 00 04 00 00 8C
10: 00 01 09 80 28 A9 07 00 - 02 00 20 8E 00 48 00 00
20: 28 A9 07 00 01 00 04 8E - 09 09 05 00 0F 00 00 00
30: 28 A9 07 00 02 00 74 96 - 49 FF 80 8E 28 A9 07 00
40: 02 00 18 96 BF 00 00 00 - 28 A9 07 00 04 00 5C 96
50: 2A 08 30 00 28 A9 07 00 - 09 00 1C 96 58 00 3B 01
60: 28 A9 07 00 04 00 18 94 - 7C 00 39 02 28 A9 07 00
70: 0C 00 58 96 09 A0 33 01 - 28 A9 07 00 02 00 00 96
80: 00 29 52 09 28 A9 07 00 - 0F 00 04 94 45 01 24 04
90: 28 A9 07 00 07 00 48 96 - 4C 15 05 01 28 A9 07 00
A0: 08 00 E8 96 00 48 17 2C - 28 A9 07 00 03 00 04 96
B0: 09 00 05 00 28 A9 07 00 - 03 00 58 95 00 28 1F 15
C0: 28 A9 07 00 01 00 6C 96 - 28 24 04 48 28 A9 07 00
D0: 01 00 28 94 E0 01 02 01 - 28 A9 07 00 0F 00 64 94
E0: 00 02 1B E0 28 A9 07 00 - 0F 00 54 95 06 2D 2D 28
F0: 28 A9 07 00 04 00 00 94 - 00 01 09 80
[HECI1] Send msg: 01FC0008
00: 28 A9 07 00 08 00 88 96 - 00 30 74 64 28 A9 07 00
10: 08 00 A0 96 EC 00 00 2B - 28 A9 07 00 02 00 2C 96
20: 0A 50 0A 00 28 A9 07 00 - 02 00 F4 96 00 18 00 00
30: 28 A9 07 00 07 00 8C 96 - 70 20 08 00 28 A9 07 00
40: 08 00 24 94 10 0A 0B A4 - 28 A9 07 00 04 00 10 94
50: 00 00 BF 72 28 A9 07 00 - 0F 00 64 94 00 00 33 E0
60: 28 A9 07 00 04 00 9C 96 - 00 00 20 00 28 A9 07 00
70: 07 00 A4 96 2B 2B 2B 00 - 28 A9 07 00 0B 00 54 96
80: 02 01 C0 00 28 A9 07 00 - 05 00 40 96 5E CF 18 01
90: 28 A9 07 00 08 00 B4 96 - 40 40 81 2C 28 A9 07 00
A0: 04 00 78 96 60 40 83 40 - 28 A9 07 00 08 00 50 96
B0: 3F 3F 3F 01 28 A9 07 00 - 09 00 68 96 1E 82 00 BA
C0: 28 A9 07 00 09 00 08 96 - 50 18 E0 21 28 A9 07 00
D0: 02 00 20 96 00 48 00 00 - 28 A9 07 00 04 00 C8 96
E0: 50 88 4F 60 28 A9 07 00 - 07 00 44 96 48 15 05 01
F0: 0F 00 00 00 28 A8 07 00 - 01 00 04 80 60 00 00 20
00: 28 A8 07 00 01 00 30 80 - 01 04 30 00 28 A8 07 00
10: 01 00 3C 80 06 00 00 00 - 28 A8 07 00 04 00 E8 80
20: 80 08 0C 3C 28 A8 07 00 - 08 00 38 81 AC D4 00 00
30: 28 A8 07 00 0B 00 90 81 - 02 06 01 0C 28 A8 07 00
40: 05 00 A8 81 06 00 1F 00 - 28 A8 07 00 0A 00 B0 81
50: 00 3C 00 78 28 A8 07 00 - 01 00 C8 81 01 00 00 00
60: 28 A8 07 00 01 00 CC 81 - 01 10 00 00 0F 00 00 00
70: 0F 00 00 00 29 AC 07 00 - 04 00 1C 01 01 30 00 80
80: 29 AC 07 00 06 00 0C B1 - 40 00 07 00 29 AC 07 00
90: 02 00 6C 03 0B 03 00 00 - 29 AC 07 00 0A 00 70 03
A0: 00 3C 00 78 29 AC 07 00 - 01 00 88 03 01 00 00 00
B0: 29 AC 07 00 01 00 14 B1 - E9 D4 25 48 29 AC 07 00
C0: 04 00 50 03 03 09 02 0C - 0F 00 00 00 28 6A 07 00
D0: 07 00 6C 04 00 00 03 00 - 28 6A 07 00 07 00 EC 03
E0: 00 00 03 00 28 6A 07 00 - 07 00 8C 04 00 00 03 00
F0: 28 6A 07 00 07 00 0C 04 - 00 00 03 00
[HECI1] Send msg: 01FC0008
00: 28 6E 07 00 07 00 2C 04 - 00 00 00 00 28 6E 07 00
10: 07 00 4C 04 00 00 00 00 - 28 6E 07 00 07 00 6C 04
20: 00 00 00 00 28 6E 07 00 - 07 00 8C 04 00 00 00 00
30: 28 69 07 00 02 00 10 03 - 00 30 00 06 28 69 07 00
40: 03 00 04 03 18 18 00 C0 - 28 69 07 00 07 00 0C 03
50: 18 18 03 00 28 69 07 00 - 02 00 30 03 00 30 00 07
60: 28 69 07 00 03 00 24 03 - 18 18 00 C0 28 69 07 00
70: 07 00 2C 03 18 18 03 00 - 28 6E 07 00 02 00 70 03
80: 04 30 00 06 28 6E 07 00 - 03 00 64 03 00 00 00 C0
90: 28 6E 07 00 07 00 6C 03 - 00 00 03 00 28 6E 07 00
A0: 02 00 90 03 04 30 00 07 - 28 6E 07 00 03 00 84 03
B0: 00 00 00 C0 28 6E 07 00 - 07 00 8C 03 00 00 03 00
C0: 28 6D 07 00 02 00 D0 03 - 04 30 20 07 28 6D 07 00
D0: 03 00 C4 03 00 00 00 C0 - 28 6D 07 00 07 00 CC 03
E0: 00 00 03 00 28 6D 07 00 - 07 00 AC 03 00 00 03 00
F0: 28 6D 07 00 07 00 2C 03 - 00 00 03 00 28 6D 07 00
00: 07 00 EC 03 00 00 03 00 - 28 6D 07 00 0C 00 04 07
10: 6C 00 80 01 28 6D 07 00 - 08 00 08 07 00 00 00 00
20: 28 6D 07 00 0C 00 14 07 - 6D 00 80 01 28 6D 07 00
30: 08 00 18 07 00 00 00 00 - 28 6D 07 00 0C 00 24 07
40: 6E 00 80 01 28 6D 07 00 - 08 00 28 07 00 00 00 00
50: 28 6D 07 00 0C 00 34 07 - 6F 00 80 01 28 6D 07 00
60: 08 00 38 07 00 00 00 00 - 28 6D 07 00 0C 00 44 07
70: 70 00 80 01 28 6D 07 00 - 08 00 48 07 00 00 00 00
80: 28 6D 07 00 0C 00 54 07 - 71 00 80 01 28 6D 07 00
90: 08 00 58 07 00 00 00 00 - 28 6D 07 00 0C 00 64 07
A0: 72 00 80 01 28 6D 07 00 - 08 00 68 07 00 00 00 00
B0: 28 6D 07 00 0C 00 74 07 - 73 00 80 01 28 6D 07 00
C0: 08 00 78 07 00 00 00 00 - 28 6D 07 00 08 00 10 03
D0: 00 20 20 02 28 6A 07 00 - 02 00 B0 04 00 00 20 07
E0: 28 6A 07 00 03 00 A4 04 - 00 00 00 C0 28 6A 07 00
F0: 02 00 D0 04 00 00 20 07 - 28 6A 07 00
[HECI1] Send msg: 01FC0008
00: 03 00 C4 04 00 00 00 C0 - 28 6A 07 00 02 00 70 03
10: 04 20 00 07 28 6A 07 00 - 03 00 64 03 00 00 00 C0
20: 28 6A 07 00 07 00 6C 03 - 00 00 02 00 28 6D 07 00
30: 07 00 8C 03 00 00 02 00 - 0F 00 00 00 28 CA 07 00
40: 0F 00 01 40 06 B8 3D 2F - 28 CA 07 00 0F 00 2B 40
50: 05 40 6A 00 28 CA 07 00 - 0F 00 2C 40 80 53 A2 09
60: 28 CA 07 00 0F 00 04 7F - 80 C6 00 00 28 CA 07 00
70: 0F 00 2C 70 00 C2 88 00 - 28 CA 07 00 0F 00 00 70
80: 08 1E 64 64 28 CA 07 00 - 0F 00 2C 70 00 C2 88 00
90: 28 CA 07 00 0F 00 08 70 - 20 5A 2B 22 28 CA 07 00
A0: 0F 00 14 70 18 4D E9 59 - 28 CA 07 00 0F 00 24 70
B0: 00 E8 01 30 28 CA 07 00 - 0F 00 00 41 91 B0 05 FC
C0: 28 CA 07 00 0F 00 26 41 - 4B 92 82 43 28 CA 07 00
D0: 0F 00 08 41 D0 DA 00 00 - 28 CA 07 00 0F 00 00 42
E0: 91 B0 05 FC 28 CA 07 00 - 0F 00 26 42 4B 92 82 43
F0: 28 CA 07 00 0F 00 08 42 - D0 DA 00 00 28 CA 07 00
00: 0F 00 00 43 91 B0 05 FC - 28 CA 07 00 0F 00 26 43
10: 4B 92 82 43 28 CA 07 00 - 0F 00 08 43 D0 DA 00 00
20: 28 CA 07 00 0F 00 00 44 - 91 B0 05 FC 28 CA 07 00
30: 0F 00 26 44 4B 92 82 43 - 28 CA 07 00 0F 00 08 44
40: D0 DA 00 00 28 CA 07 00 - 0F 00 00 45 91 B0 05 FC
50: 28 CA 07 00 0F 00 26 45 - 4B 92 82 43 28 CA 07 00
60: 0F 00 08 45 D0 DA 00 00 - 28 CA 07 00 0F 00 00 46
70: 91 B0 05 FC 28 CA 07 00 - 0F 00 26 46 4B 92 82 43
80: 28 CA 07 00 0F 00 08 46 - D0 DA 00 00 28 CA 07 00
90: 0F 00 00 47 91 B0 05 FC - 28 CA 07 00 0F 00 26 47
A0: 4B 92 82 43 28 CA 07 00 - 0F 00 08 47 D0 DA 00 00
B0: 28 CA 07 00 0F 00 00 48 - 91 B0 05 FC 28 CA 07 00
C0: 0F 00 26 48 4B 92 82 43 - 28 CA 07 00 0F 00 08 48
D0: D0 DA 00 00 28 CA 07 00 - 0F 00 00 49 91 B0 05 FC
E0: 28 CA 07 00 0F 00 26 49 - 4B 92 82 43 28 CA 07 00
F0: 0F 00 08 49 D0 DA 00 00 - 28 CA 07 00
[HECI1] Send msg: 804C0008
00: 0F 00 00 4A 91 B0 05 FC - 28 CA 07 00 0F 00 26 4A
10: 4B 92 82 43 28 CA 07 00 - 0F 00 08 4A D0 DA 00 00
20: 0F 00 00 00 28 AA 07 00 - 0F 00 30 80 01 04 30 00
30: 28 AA 07 00 0F 00 3C 80 - 07 00 00 00 28 AA 07 00
40: 0F 00 04 80 60 00 00 20 - 0F 00 00 00
[HECI1] Got msg Success: 80140008
00: 00 00 05 00 19 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
PeiHeciWriteChipsetInitMsg(): End
No global reset required
ChipsetInitSync() End
One of the modphy lanes assigned to usb skipping setting MPLSPDDGE and MLSPDDGE
DCI Debug Disabled
PmcSendCommand(): IPC_COMMAND=0xA1, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x10000001, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
CnviConfigureBt() - Start
CNVi has been fused out
POSTCODE=<00009B7F>
PchInit - End
PostMem SaInit Entry
POSTCODE=<00009A00>
PostMemCheckAndForceVddOn start
PostMemCheckAndForceVddOn end status - 0x0
DeviceConfigure Start
POSTCODE=<00009A01>
Sa Register Mirror Start
Programming GGC
Programming TOUUD
Programming TOLUD
Programming BDSM
Programming BDSM 0x7C000001
Programming BGSM
Programming BGSM 0x7B800001
Programming TSEG
Install PPI: 8E3BB474-0545-4902-86B0-6CB5E264B4A5
Initializing SA GNA device
POSTCODE=<00009A16>
CpuDmi16SpeedChange Start
CpuDmi16SpeedChange not supportedInitializing ConfigureCpuTraceHub
POSTCODE=<00009A22>
ConfigureCpuTraceHub () - Start
TraceHubDataHob->EfiHobGuidType.Name: F1187E54-995F-49D9-ACEE-C534F45A18C7
TraceHubDataHob @ 76CB0298
TraceHubDataHobSize - HobHeader: 8
TraceHubDataHobSize: 20
Program MTB/SW/RTIT BAR
Enable MSE
Clearing LPP_CTL_LPME
LPP_CTL = 113, SCRPD0 = 0 EnableMode 0
CPU Intel Trace Hub is in Low Power Mode or not connected and is disabled by SETUP menu . Stop the initialization.
Initializing TCSS
POSTCODE=<00009A31>
[TCSS] TcssInit() - Start
[TCSS] IomReadyCheck - Start
IOMReady bit = 1
IomReady bit updated to TCSS HOB
IOM version: 0x11001600; Engr version: 0x00000000
TCSS HOB updated
[TCSS] IomReadyCheck - End
[TCSS] TcssRtd3Update - Start
TCSS RTD3: 0x1
[TCSS] TcssRtd3Update - End
[TCSS] TcssCstatelimit() - Start
IOM mailbox data = 0x0000000A
IOM mailbox command = 0x80000007
Override MailBoxData from 8 to 10
[TCSS] System Supported TC State = 0x0000000A
[TCSS] TcssCstatelimit() - End - Status Success
[TCSS] SaXdciIrq - Start
IOM mailbox data = 0x01000100
IOM mailbox command = 0x00000102
SA xDCI Int pin: 0x01
SA xDCI Irq: 0x10
[TCSS] SaXdciIrq - End - Status
[TCSS] IomSetTcColdPowerSavingFactor - Start
IOM mailbox data = 0x00000A32
IOM mailbox command = 0x00000009
IomSetTcColdPowerSavingFactor - End - Status Success
[TCSS] TcssInitAuxHslOri() - Start
Origional AuxOriReg: 0x00000000
IomConfig->IomOverrides.AuxOri: 0x00000000
Update AuxOri: 0x80000000
Origional HslOriReg: 0x00000000
IomConfig->IomOverrides.HslOri: 0x00000000
Update HslOri: 0x80000000
[TCSS] TcssInitAuxHslOri() - End
[TCSS] ConfigureTbtPcieSegFuncMap() - Start
TcssHob->TcssData.PcieMultipleSegmentEnabled = 0
R_SA_PCIESEGMAP = 0, R_SA_PCIEFUNCMAP = 688
[TCSS] ConfigureTbtPcieSegFuncMap() - End
SaPcieInit
SaPcieInit End
XhciConfigure() - Start
[GetXhciControllerInfo] xHCI Controller DID: 0x9A13
[GetXhciControllerInfo] IP Version: xHCI IP v18.0
XhciHcInit XhciMmio Base = 0xFE600000
Number of supported Super Speed Ports = 4
Number of supported High Speed Ports = 1
Test for XHCI_MEM_DAP_ESS_PORT
HDCI Debug Disabled
XhciConfigure() - End
xDCI Controller DID: 0x9A15
xDCI: Device enabled
[TCSS]PmcTcssBiosInitDone: Sending TCSS BIOS Init Done message to PMC 0x01
PmcSendCommand(): IPC_COMMAND=0xA5, IPC_SUB_CMD = 0x00, IPC_SIZE=0x04
WBUF0=0x00000003, WBUF1=0x00000000, WBUF2=0x00000000, WBUF3=0x00000000
[TCSS] TcssIomVccStInfoUpdate - Start
TCSS IOM VccSt: 0x1
[TCSS] TcssIomVccStInfoUpdate - End
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Install PPI: 5AD291B8-ACE4-416A-B750-076359FCC15B
[TCSS] TcssInit() - End
PciExpress PostMem Initialization
POSTCODE=<00009A20>
CPU PcieRpInit() Start
---- RpIndex mapping ----
---- RpIndex = 0 ; PortId = 1 => PEG060 ----
MaxCpuPciePortNum = 1
**** RpIndex = 0 ****
Slot implemented bit is set!
Port 1 has a device attached.
CLKREQ is not assigned, disabling power management for RP 0.
CLKREQ is not connected, clear RpClkreqMask!
Configure power management applicable to all port including disabled ports!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Clock gating is enabled!
Setting PTOCGE
Power gating is enabled!
CpuPcieConfigurePortBasedPowerManagement(1) Start
Root port Clock gating is enabled!
RpIndex 0
Offset[E0] 917400
Offset[E0] 917700
Root port Power gating is enabled!
Load Fia Programming - FIA programming Enabled!
CpuFiaFinalizeConfigurationAndLock - SB_PORTID_PCIE_FIA0
Offset 0x00[CC] = 0x18000
Offset 0x20[PLLCTL] = 0x40000000
Offset 0x40[PMC] = 0x100008
Offset 0x48[PGCUC] = 0x0
CpuPcieWaitForLinkActive, RP mask to wait for = 0x00000001
CpuPcieWaitForLinkActive, all RPs done, lost 0ms waiting
CpuPcieSip16PtmInit for RpBase 30000
PTMCAPR before write in sip16 = 410
PTMCAPR after write in sip16 = 416
PTMCTLR before write RS and PTME = 0
PTMCTLR after write RS and PTME = 3
FomsCp from policy : 0, RpIndex : 0
FomsCpValue : 0
FomsCp after read : 0
Call InitCpuPcieSingleRootPort for Portid 1
InitCpuPcieSingleRootPort (1) Start
Target Link Speed = 1
Set the Completion Retry Status Replay Enable, Dxx:Fn + 320h[22]
CpuPcieGetDeviceInfo Start
VID: 15B7 DID: 5017 MLS: 4
CpuPcieGetDeviceInfo End
End point detected with Gen4 capability!!!
Root port is Gen3/4 capable!!!
CpuPcieMaxPayloadMax = 3
Upstream Non-Posted Request Delay set to 00b which puts delay of 0 clocks
Set R_PCIE_DCAP[B_PCIE_DCAP_MPS] = 1
Coalescing Start
COCTL = 1F40F
R_PCIE_ACRG3 = 200008
Coalescing End
R_PCIE_DCAP2 after programming Atomics and 10-Bit Requester Supported = 10BF7
R_PCIE_DCTL2 after write = 400
R_PCIE_PCIERTP1 after write = B7E5BB
R_PCIE_PCIERTP2 after write = C97
R_PCIE_ACGR3S2 after setting SRT = 2ECF4
R_PCIE_PWRCTL after write = 28004
R_PCIE_PCIECFG2 after write = 63D960DB
R_PCIE_PCIEDBG after write = 8004020
R_PCIE_PCIEPMECTL2 after write = 59F0
Set LCAP APMS according to platform policy 2
Completion timeout = 0
CpuPcieSip16InitCapabilityList start
CpuPcieSip16InitCapabilityList end
Perform equalization for Gen3/Gen4 capable ports
CpuPcieLinkEqualization Start!
Link Speed = 1
CpuPcieDoGen3HardwareEq
CpuPcieDoGen3HardwareEq Start!
LSTS2: 0x0001
Gen3 Preset/Coefficient Mode Selection 1
TxOverride Disabled
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGen3InitializePresets Start!
Port 0 list 0: (3,4)
Port 0 list 1: (3,4)
Port 0 list 2: (0,0)
Port 0 list 3: (0,0)
Port 0 list 4: (0,0)
RTPCL0 = 0x80103103
RTPCL1 = 0x00000000
RTPCL2 = 0x00000000
RTPCL3 = 0x00000000
CpuPcieGen3InitializePresets End!
Gen3 TS Lock Timer = 3
Gen3 PCET timeout = 8 ms
Number Of Preset/Coefficient List = 2
CpuPcieDoGen3HardwareEq End!
CpuPcieDoGen4HardwareEq
CpuPcieDoGen4HardwareEq Start!
LSTS2: 0x0001
Gen4 Preset/Coefficient Mode Selection 1
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
CpuPcieGen4InitializePresets Start!
Port 0 list 0: (6,10)
Port 0 list 1: (6,10)
Port 0 list 2: (0,0)
Port 0 list 3: (0,0)
Port 0 list 4: (0,0)
PX16GRTPCL0 = 0x80286286
PX16GRTPCL1 = 0x00000000
PX16GRTPCL2 = 0x00000000
PX16GRTPCL3 = 0x00000000
CpuPcieGen4InitializePresets End!
Gen4 TS Lock Timer = 4
Gen4 Number of Preset/Coefficient = 2
Gen4 PCET timeout for = 8 ms
Gen4Uptp = 8, Gen4Dptp = 9!
CpuPcieDoGen4HardwareEq End!
CpuPcieLinkEqualization End!
Root PCI-E Powermanagement SCI Enable
Initialize downstream devices
RootportDownstreamConfiguration 6:0
RecursiveBusAssignmentE 0:6:0 -> 0,2,A
IsPcieDevice 02:00:00 - yes
RecursiveBusAssignmentL 0:6:0 -> 0,2,2
RecursiveMpsCheck 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsCheck 2:0:0
HasChildBus : : : no
RecursiveMpsConfiguration 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveMpsConfiguration 2:0:0
HasChildBus : : : no
RecursiveCccConfiguration 0:6:0
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCccConfiguration 2:0:0
HasChildBus : : : no
IsPcieDevice 02:00:00 - yes
HasChildBus00:06:00: yes, 2
IsPcieDevice 02:00:00 - yes
R_PCIE_RXMC1 before write : 0
R_PCIE_RXMC1 after write : 7FF02810
RXMC2 : D651CA
Program TLS to 4
Retrain the link if device is present!
CpuPcieWaitForHwEqDone Begin:
mDoGen3HwEqRpMask = 1
mDoGen4HwEqRpMask = 1
mDoGen5HwEqRpMask = 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
Gen4 Hardware Equalization Done bit is set for Root Port 0
Gen4 Hardware Equalization Done bit is set for Root Port 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
Gen4 Hardware Equalization Done bit is set for Root Port 0
Gen3 Hardware Equalization Done bit is set for Root Port 0
EQCFG1: 0x01801100
LSTS2: 0x001F
Training time = 0us
Controller : 0
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.0 FOM Scoreboard0:112 1:108 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E0000000
MM.MSS value: 0x00757500
Lane 0 Best Coeffiecient: (0xFF, 0xFF)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.1 FOM Scoreboard0:108 1:106 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E1000000
MM.MSS value: 0x00002040
Lane 1 Best Coeffiecient: (0x74, 0xAB)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.2 FOM Scoreboard0:107 1:112 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E2000000
MM.MSS value: 0x00000000
Lane 2 Best Coeffiecient: (0x0, 0x0)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
0.3 FOM Scoreboard0:108 1:109 2:000 3:000 4:000 5:000 6:000 7:000 8:000 9:000 10:000 11:000
FOMS : E3000000
MM.MSS value: 0x00000000
Lane 3 Best Coeffiecient: (0x0, 0x0)
CpuPcieGetMaxLinkWidth Start!
LinkWidth = 4
CpuPcieGetMaxLinkWidth End!
DekelFwVersion 64140E1B
Dekel FW version : 11.225
Lock the registers
CpuPcieRpSetSecuredRegisterLock () Start!
R_PCIE_LPCR before write = 0
Serl from policy: 1
R_PCIE_LPCR after write = 1000100
CpuPcieRpSetSecuredRegisterLock () End!
CPU PcieRpInit() End
UpdateSaHobPostMem Start
POSTCODE=<00009A02>
PostMem CPU PCIE HOB updated
PostMem SA Data HOB updated
Initializing VMD
POSTCODE=<00009A33>
-----------------VmdInit Start ----------------
VmdInfoHob->EfiHobGuidType.Name: CCD0306E-7FA1-4DF5-9999-C1F89A1D1BA9
VmdInfoHob @ 76CB02B8
&(VmdInfoHob->VmdPortInfo) @ 76CB02D0
VmdHobSize - HobHeaderSize: 174
VmdInfoSize: 174
VMD: VmdDetectPcieStorageDevices Start
VMD: Checking device connection on PEG ports
Read DEVEN register
PegDevenReg = 2000
VMD: Storage device found on Bus/device/Func 0/6/0 DevId 0x5017 Rp Index 1
VMD: Checking device on PCH PCIe ports
VMD: Checking the availability of SATA controller(0/23/0) for sata devices
VMD: Sata device found DevId 0xA0D3
Dumping port info
RpDev 6 RpFunc 0 DevId 0x5017 RpIndex 1
RpDev 23 RpFunc 0 DevId 0xA0D3 RpIndex 0
VMD Device has been disabled
Initializing Pavp
POSTCODE=<00009A32>
Initializing PAVP
CpuPcieRpConfigureRpfnMapping () Start!
Initializing IPU device
POSTCODE=<00009A14>
IpuInit Begins
IPU Fused off
IPU is not supported
Clear IPU bit at DEVEN regiser
[TCC] TccInit() - Start
TCC Tune system
TCC CacheCfg subregion is not valid
L2CatEntries:0x4,
CacheId:0x0, Mask[0]: 0xFFFFF,
CacheId:0x1, Mask[0]: 0xFFFFF,
CacheId:0x2, Mask[0]: 0xFFFFF,
CacheId:0x3, Mask[0]: 0xFFFFF,
L3CatEntries:0x1,
CacheId:0x0, Mask[0]: 0xFFF,
MaxIaL2Cos: 8
TCC RTCT hob data @0x76CB05D8 with size 0x1BC
Cache Prefetecher Tuning:
IfuTrainEnable: 0
ConvertItomToRfo: 0
[TCC] TccInit() - End
CpuInit Start
POSTCODE=<00009C15>
Cpu Initialization in PostMem start
CollectProcessorFeature Start
POSTCODE=<00009C17>
ProgramProcessorFeature Start
POSTCODE=<00009C18>
PmcIsPchPmTimerEnabled () = 1
TraceHubAcpiBaseAddress = 0
Initialize Processor Trace
Initialize Hardware Duty Cycle
Initialize Protected Processor Inventory Number (PPIN)
Program xAPIC
Initialize Monitor Wait register
Initialize Machine check registers
Initialize miscellaneous processor functions
(MAILBOX) Mailbox Write Command = 1Dh
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 1Ch
(MAILBOX) Mailbox Status = 00h
Initialize AVX Instructions
ProgramProcessorFeature Done
POSTCODE=<00009C19>
CpuInitPreResetCpl Start
POSTCODE=<00009C20>
ProcessorsPrefetcherInitialization Start
POSTCODE=<00009C21>
InitRatl Start
POSTCODE=<00009C22>
TCC activation programmable = 1
ConfigurePidSettings Start
POSTCODE=<00009C24>
SetBootFrequency Start
POSTCODE=<00009C25>
BiosGuardInit Start
POSTCODE=<00009C28>
BIOS Guard Module is Disabled
CpuInitPreResetCpl Done
POSTCODE=<00009C3F>
InitializeCpuDataHob Start
POSTCODE=<00009C43>
InitializeCpuDataHob Done
POSTCODE=<00009C44>
Cpu Initialize performance and power management features before RESET_CPL Done
CpuInit Done
POSTCODE=<00009C4F>
ConfigureSvidVrs Start
POSTCODE=<00009C23>
VR: Configure SVID Vr's
(MAILBOX) Mailbox Write Command = WRITE_PSYS_PMAX_CMD
(MAILBOX) PsysPmax = 172 (1/8 Watt)
(MAILBOX) Mailbox Write Data = 1376
(MAILBOX) Mailbox Write Command = 80000B18h
(MAILBOX) Mailbox Write Data = 560h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = READ_VR_STRAP_CONFIG_CMD
(MAILBOX) Mailbox Read Command = 80000018h
(MAILBOX) Mailbox Status = 00h
VR: VrTopology data = 0x9
VR Type 0 = SVID, VR Type 1 = non-SVID
VCCIN VR Address = 0x0
VCCIN VR Type = 0x0
VR: Update VR overrides
VR: SelectedCtdpLevel = 0
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
VR: Cpu Identifier = 25
VR Address for Vr Index 0 = 0x0
VR SvidEnabled for Vr Index 0 = 0x1
Override IccMax[0] = 104
Override TdcCurrentLimit[0] = 158
Override TdcEnable[0] = 1
Override AcLoadline[0] = 1B8
Override DcLoadline[0] = C8
(MAILBOX) Mailbox Write Command = WRITE_ACDC_LOADLINE_CMD
(MAILBOX) AcLoadline = 440 (1/100 mOhms)
(MAILBOX) DcLoadline = 200 (1/100 mOhms)
(MAILBOX) Mailbox Write Data = 137433606
(MAILBOX) Mailbox Write Command = 80000218h
(MAILBOX) Mailbox Write Data = 8311206h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_PSI_CUTOFF_CMD
(MAILBOX) Psi1Threshold = 80 (1/4 Amp)
(MAILBOX) Psi2Threshold = 20 (1/4 Amp)
(MAILBOX) Psi3Threshold = 4 (1/4 Amp)
(MAILBOX) Psi3Enable = 1, Psi4Enable = 1
(MAILBOX) Mailbox Write Data = 4214864
(MAILBOX) Mailbox Write Command = 80000318h
(MAILBOX) Mailbox Write Data = 405050h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_IMON_CONFIG_CMD
(MAILBOX) ImonOffset = 0 (1/1000)
(MAILBOX) ImonSlope = 0 (1/100)
(MAILBOX) Mailbox Write Data = 0
(MAILBOX) Mailbox Write Command = 80000418h
(MAILBOX) Mailbox Write Data = 0h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) PCODE Mailbox Write Command = WRITE_VR_ICC_MAX_CMD
(MAILBOX) IccMax = 260 (1/4 A)
(MAILBOX) Mailbox Write Command = 80000618h
(MAILBOX) Mailbox Write Data = 104h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Write Command = WRITE_VR_TDC_CONFIG_CMD
(MAILBOX) TdcPowerLimit = 344 (1/8A)
(MAILBOX) Mailbox Write Command = 8000001Ah
(MAILBOX) Mailbox Write Data = 828158h
(MAILBOX) Mailbox Status = 00h
VR SvidEnabled = 0x1
VR: VR Topology data = 0x76C8F100
VR Type 0 = SVID, VR Type 1 = non-SVID
EncodedSpectrum - 8
AmtPostMemInit() - Start
IntelMeFwImageType = 3
AmtPostMemInit() - End
Initializing VtdLateInit
POSTCODE=<00009A37>
VtdLateInit
Processor does not support Boot Guard.
Touud.Data = 0x0000000880400000
SaSecurityLock Start
POSTCODE=<00009A50>
SaSecurityLock End
POSTCODE=<00009A5F>
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
FuSA supported sku detected
DIAGTEST_FEATURE_EN: 1
DIAGTEST_EN: 0
DIAGTEST_PCHMODE: 0
Diagnostic Mode detected is 0
SiInit () - End
Loading PEIM 4E22BF36-C59D-47C4-9FD1-25A603D75958
Loading PEIM at 0x00076E3F000 EntryPoint=0x00076E3F3C5 SaInitFsp.efi
PROGRESS CODE: V03020002 I0
SaInitFsp Start
SaInitEntryPointFspCommon() Start
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Register for FspEventEndOfFirmware callback to set PAM lock before OS handoff
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
SaInitEntryPointFspCommon() End
SaInitFsp End
PROGRESS CODE: V03020003 I0
Loading PEIM 54D7CC18-492A-4B43-AD9E-A461D81F82B5
Loading PEIM at 0x00076E2D000 EntryPoint=0x00076E2D3C5 PchInitFspTgl.efi
PROGRESS CODE: V03020002 I0
PchInitEntryPointFsp() Start
PchInitEntryPointCommon() Start
PchInitEntryPointCommon() End
Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
PchInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM EEE8D8EC-40C2-159B-71C7-8796EEEF3FBC
Loading PEIM at 0x00076E1B000 EntryPoint=0x00076E1B3C6 HeciInit.efi
PROGRESS CODE: V03020002 I0
Fsp MeInitEntryPointFsp() Start
Register PPI Notify: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B
Register PPI Notify: BD44F629-EAE7-4198-87F1-39FAB0FD717E
Fsp MeInitEntryPointFsp() End
PROGRESS CODE: V03020003 I0
Loading PEIM 29CBB005-C972-49F3-960F-292E2202CECD
Loading PEIM at 0x00076E13000 EntryPoint=0x00076E133C9 FspNotifyPhasePeim.efi
PROGRESS CODE: V03020002 I0
The entry of FspNotificationPeim
Reinstall PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
PROGRESS CODE: V03020003 I0
Loading PEIM 4F1F379F-2A62-48BB-AC34-D3F135C6E2B7
Loading PEIM at 0x00076E0B000 EntryPoint=0x00076E0B346 PcatSingleSegmentPciCfg2Pei.efi
PROGRESS CODE: V03020002 I0
Install PPI: 057A449A-1FDC-4C06-BFC9-F53F6A99BB92
PROGRESS CODE: V03020003 I0
Loading PEIM 76ED893A-B2F9-4C7D-A05F-1EA170ECF6CD
Loading PEIM at 0x00076D7F000 EntryPoint=0x00076D7F4A9 IntelGraphicsPeim.efi
PROGRESS CODE: V03020002 I0
[INFO]:[PeiGraphicsEntryPoint()]:[PEI Module Name: Intel(R) Graphics Pei Module [17.0.1077] [DEBUG]]
[INFO]:[PeiGraphicsEntryPoint()]:[The value of DMI SIM Register[7:0] is 0]
[INFO]:[PeiGraphicsEntryPoint()]:[Simulation mode is disabled. Environment:HW]
Install PPI: 4EABCD09-43D3-4B4D-B73D-43C8D9899905
Install PPI: 776B0413-92BE-4EB3-BA42-4E75AB1934D9
Install PPI: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
PROGRESS CODE: V03020003 I0
DXE IPL Entry
FSP HOB is located at 0x76C90000
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: FFE09F2D
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F1F1D7
MeOnEndOfPei() enter
SendOptionalHeciCommand ()
HobSize for MePeiPreMemConfig: 2C
HobSize for MePeiConfig: 20
HobSize for AmtPeiConfig: 24
MeOnEndOfPei() done.
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F05165
[TCSS] TcssInitEndOfPei Entry
[TCSS] UpdateMgImrStatus Entry
R_IOM_CSME_IMR_MG_STATUS: 0xC00007F9
MG FW version: 0x07F9
Load MG FW success
[TCSS] UpdateMgImrStatus End
R_IOM_CSME_IMR_TBT_STATUS: 0x00000000
TBT FW version: 0x0000
TBT FW has not yet downloaded to IMR
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 76F01625
SiInitOnEndOfPei - Start
POSTCODE=<00009B40>
PchOnEndOfPei after memory PEI module - Start
PcieRpConfigureRpfnMapping () Start
SPA = 0x00033210
SPB = 0x000E7654
SPC = 0x00043210
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPA = 0x80033012
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPB = 0x800E7654
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
SPC = 0x80043210
POSTCODE=<00009B41>
PchThermalInit () Start
POSTCODE=<00009B42>
(WDT) WdtDisableBeforeS3Resume
HD Audio Class Code: 4.3.0.
HDA: Audio DSP Disabled
HDA: Power Gating and Clock Gating enabled
HDA: Configuration Lockdown
POSTCODE=<00009B47>
PchOnEndOfPei after memory PEI module - End
ConfigureMscForCpuAndPchTraceHub() Start
Trace Hub Memory is not allocated, skip configure MSC!!
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
Trace hub does not exist
ConfigureMscForCpuAndPchTraceHub() End
Removing PSF access: EPMASK offset 14, BIT26, endpoint: BA
Removing PSF access: EPMASK offset 14, BIT27, endpoint: BB
Removing PSF access: EPMASK offset 14, BIT28, endpoint: BC
Removing PSF access: EPMASK offset 14, BIT29, endpoint: BD
SetBiosDone Start
ReloadMicrocodePatch Start
POSTCODE=<00009C80>
Info: Skipping RaceConditionResponse per Policy
ReloadMicrocodePatch: second patch load started
LoadMicrocode: Before load, revision = 0xAC
LoadMicrocode: After load, revision = 0xAC
ReloadMicrocodePatch: Second patch load success.
ReloadMicrocodePatch Done
POSTCODE=<00009C81>
ApSafePostMicrocodePatchInit Start
POSTCODE=<00009C82>
ApSafePostMicrocodePatchInit Done
POSTCODE=<00009C83>
Set BIOS_RESET_CPL to indicate all configurations complete
POSTCODE=<00009A61>
GraphicsPmInit Start
POSTCODE=<00009A63>
iGfx Initialization start.
Initializing GT PowerManagement
----- GT PMInit() Begin------
Starting Register programming for GT PM.
Poll to verify Force Wake Acknowledge Bit, Result = 1
Enabled DOP clock gating
DSS Enable Read 0x3F Ssid 0x0
Entered RC6 state in idle mode
GT PM Init Done. Exiting.
ProgramCdClkReg: CdClock 0XFF CDCLK_CTL 0XB80518
iGfx Initialization end.
Initializing Pei Display
POSTCODE=<00009A03>
PeiDisplayInit: Begin
Register PPI Notify: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B
Notify: PPI Guid: 6ECD1463-4A4A-461B-AF5F-5A33E3B2162B, Peim notify entry point: 76F05E37
PeiGraphicsNotifyCallback Entry
POSTCODE=<00009A04>
CallPpiAndFillFrameBuffer
POSTCODE=<00009A05>
CallPpiAndFillFrameBuffer: Begin
GraphicsPpiInit Start
POSTCODE=<00009A06>
[INFO]:[IsGraphicsDeviceSupported()]:[Supported Graphics Device ID Found]
[INFO]:[InitializeVbtManager()]:[VBT Base Address: 0x76A5B91C]
[INFO]:[InitializeVbtBlockPtrTable()]:[Vbt Version = 250]
[INFO]:[InitializePlatformParams()]:[Initializing Pei Platform Parameters.]
[INFO]:[InitializePlatformParams()]:[LID status from PEI platform policy unsupported.]
[INFO]:[InitializeGfxMmioBase()]:[GfxMmio Base address: 0xAF000000]
[INFO]:[InitializeGpuObject()]:[GfxDeviceId = 0x9A49 and GfxSteppingId = 0x1]
[INFO]:[InitializePchObject()]:[PCH Device Id = 0xA088 and Stepping value: 0x20]
[INFO]:[InitializePchObject()]:[PCH Type is TGL-LP.]
[INFO]:[InitializeGfxFrameBufferBase()]:[GFX FrameBuffer Base Address: 0xB0000000]
[INFO]:[InitializeDsmSizeVariable()]:[Amount of main memory pre-allocated by BIOS for GTT:8 MB]
[INFO]:[InitializeDsmSizeVariable()]:[GsmTableIndex as per BIOS is: 254 and GsmTableSize 60MB]
[INFO]:[InitializeVideoMemory()]:[BDSM value from MMIO offset 0x1080C0: 0x7C000000]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[CDCLK_CTL_REG[46000h] = 0xB80518.]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[InitializeCdClockFrequency()]:[Maximum supported Cdclk: 0x28C. SWF06: 0xB80518]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 150]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[InitializeCdClockFrequency()]:[Value of CD Freq Select: 0x0. Value of CD Freq Decimal: 0x518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[EnableCdClockPll()]:[Cdclk Enable register: 0xC0000022]
[INFO]:[InitializeCdClockFrequency()]:[Configuring the CD clock control register with the value: 0x380518]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x33333300]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x706B4633]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 80]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0xB]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 70]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values from SAGV data0 : 0xB]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 1 : 33333300]
[INFO]:[WatermarkInit()]:[Watermark Memory Latency values set 2 : 706B4633]
[INFO]:[WatermarkInit()]:[Watermark Init is done]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP only.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 2/ Actual PchDdcNumber = 2]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 3/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 4/ Actual PchDdcNumber = 9]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[EnumerateSupportedDisplays()]:[Display class is: DP with HDMI and DVI.]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[GetPchGmBusPinPair()]:[DDCBusNumber or VbtPinPairSelected = 6/ Actual PchDdcNumber = 11]
[INFO]:[EnumerateEFPPrivateData()]:[EfpPrivateData->PllDiv0AfcStartupBitConfigType = 0 ]
[INFO]:[EnumerateEFPPrivateData()]:[DpPortMaxLinkRate = 0/DpPortMaxLaneCount = 4]
[INFO]:[CopyTimingFromGenericDtd()]:[Setting timing descriptor as EDID capable ]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-B]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[TglCheckComboPortLiveStatus()]:[Live State is set for Combo Port]
[INFO]:[ReadLttprCapabilities()]:[Reading LTTPR Caps for DdiType=1/AuxChannelNumber=16]
[INFO]:[DpInitializePort()]:[DPCD revision is 0x12]
[INFO]:[DpInitializePort()]:[Enable down spread for panel]
[INFO]:[DpLibInitializeDscCaps()]:[DSC is not supported for DPCD revision less than 1.4]
[INFO]:[CalculatePortMaxLinkRateDpcd()]:[Maximum port link rate DPCD : 0x14]
[INFO]:[DpInitializePort()]:[Panel Lane Count for DP is 4]
[INFO]:[DpInitializePort()]:[Maximum Link Rate for DP is 0xA]
[INFO]:[DpInitializePort()]:[Updated Panel Lane Count for DP is 4]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability Data type = EDID.]
[INFO]:[ReadEDID()]:[EDID size = 256]
[INFO]:[ReadDisplayCapabilityData()]:[DisplayCapability EDID Data size = 256 Bytes.]
==================== RAW EDID ==========================
00 FF FF FF FF FF FF 00 1E 6D CA 5B 01 01 01 01
01 1F 01 04 A5 3C 22 78 FA 7B 45 A4 55 4A A2 27
0B 50 54 A5 4B 00 71 4F 81 C0 81 00 81 80 95 00
90 40 A9 C0 B3 00 2A 44 80 A0 70 38 27 40 30 20
35 00 E0 0E 11 00 00 1E 02 3A 80 18 71 38 2D 40
58 2C 45 00 FE 22 11 00 00 1E 00 00 00 FD 00 38
4B 1E 55 12 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 46 48 44 0A 20 20 20 20 20 20 01 ED
02 03 1C F1 49 90 04 03 01 10 12 10 1F 13 23 09
07 07 83 01 00 00 65 03 0C 00 10 00 02 3A 80 18
71 38 2D 40 58 2C 45 00 FE 22 11 00 00 1E 01 1D
00 72 51 D0 1E 20 6E 28 55 00 FE 22 11 00 00 1E
8C 0A D0 8A 20 E0 2D 10 10 3E 96 00 FE 22 11 00
00 18 00 00 00 FF 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E3
========================================================
[INFO]:[ParseDisplayIdTiledTopologyBlock()]:[Couldn't find Tiled Display Info Block.]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[DpDetectDisplayDevice()]:[DP Detection successful for port: Ddi-B]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 3]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-D]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 3]
[INFO]:[DpDetectDisplayDevice()]:[Detecting DP display on port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[DpDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DpDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 3 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 2 and DDI type: 5]
[INFO]:[HdmiDetectDisplayDevice()]:[Detecting HDMI display for Port: Ddi-F]
[INFO]:[IsHDPortEnabled()]:[No HD Port Support.]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set for Legacy port]
[INFO]:[CheckDklPortLiveStatus()]:[Live State is not set Dkl port]
[ERROR]:[HdmiDetectDisplayDevice()]:[PortCheckLiveStatus() failed]
[ERROR]:[GalDetectDisplayDevice()]:[DVI Detection - HdmiDetectDisplayDevice() failed]
[INFO]:[EnumerateAttachedDisplays()]:[GalDetectDisplayDevice() failed for Display type: 4 and DDI type: 5]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetTimingFromDisplayIDExtention()]:[Finding extension block. Block size: 256]
[INFO]:[DpGetMaxPixelClock()]:[LinkRate = 2700 Mbps, AllowedLaneCount = 4, PanelColorDepth = 24]
[INFO]:[DpGetMaxPixelClock()]:[DpMaxPixelClock = 360000 KHz]
[INFO]:[GetNativeModeFromEDID()]:[DTD 1 pixel clock is 174500KHz with multiplier 1]
[INFO]:[GetNativeModeFromEDID()]:[EDID Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[GetNativeModeFromEDID()]:[A supported DTD is found with pixel clock = 174500KHz]
[INFO]:[GetAspectRatioFromEdid()]:[Aspect ratio of Device type 3 is 78 ]
[INFO]:[GetNativeModeFromEDID()]:[Display 3 Data: HActive = 1920, VActive = 1080]
[INFO]:[BuildSupportedModesTable()]:[GetNativeMode Status for dev 1 = Success. Resolution = 1920x1080 Mode Type = 1]
[INFO]:[SetMode()]:[FrameBufferBase = 0xB0000000]
[INFO]:[GetMaxFrameBufferSizeInBytes()]:[Frame Buffer Size in Bytes: 62914560]
[INFO]:[GalSetMode()]:[Mode set called for mode number: 1920x1080 with 4 bytes per pixel.]
[INFO]:[GalSetMode()]:[Current mode Type = 0 and modeType to set = 1]
[INFO]:[GalSetMode()]:[IsDynamicCdClockSupportEnabled = 0]
[INFO]: [GalSetMode()]:[IsHotPlugEventInProgress():0.]
[INFO]: [GalSetMode()]:[Clearing the frame buffer]
[INFO]:[ClearVideoMemory()]:[Starting clear memory from address 0xB0000000]
[INFO]:[ClearVideoMemory()]:[Video Memory size is 0x7E9000]
[INFO]:[GalAllocateGfxResources()]:[Allocating Plane1A PipeA and TranscoderA ]
[INFO]:[GalAllocateGfxResources()]:[Calling PllSelect.]
[INFO]:[PortPllSelect()]:[Display Type DP. Pll Selected DPLL0.]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPipeline=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayPlane=0]
[INFO]:[GalFullSetModeEnableDevice()]:[CurrentDisplayTranscoder=0]
[INFO]:[CalculateWatermarkValues()]:[The memory latency value from mailbox is: 0x3]
[INFO]:[CalculateWatermarkValues()]:[HTotal Value 2080]
[INFO]:[CalculateWatermarkValues()]:[Adjusted Pixel Rate is 174500]
[INFO]:[CalculateWatermarkValues()]:[Calculated Pipe Line Time is 96]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 1 is 21]
[INFO]:[CalculateWatermarkValues()]:[Watermark value as per method 2 is 32]
[INFO]:[CalculateWatermarkValues()]:[Final Watermark Value is 32]
[INFO]:[CalculateWatermarkValues()]:[Calculated Blocks = 33]
[INFO]:[CalculateWatermarkValues()]:[Calculated Lines = 2]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence started for port: Ddi-B]
[INFO]:[DpEnableDisplayDevice()]:[Type C Port State: 0]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetSupportedBppFromEDID()]:[EDID Panel Color depth: 24 bpp]
[INFO]:[GetPanelColorDepth()]:[Using Color depth: 24 bpp]
[INFO]:[GetPanelSupportedBpc()]:[Supported bpc: 2]
[INFO]:[DpEnableDisplayDevice()]:[Original Lane Count = 4,OriginalLinkRateInUseDpcd = 0A]
[INFO]:[DpEnableDisplayDevice()]:[LinkRate = 2700000]
[INFO]:[DpEnableDisplayDevice()]:[Dp Pixel Clock(in KHz) = 174500]
[INFO]:[CalculateMaxPixelClockValue()]:[Calculated MaxPixelClock value is 360000]
[INFO]:[DpLibGetPanelColorDepth()]:[Panel Color Depth Used: 24 Bpp]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 140]
[INFO]:[SetMaxVoltageLevel()]:[Max Voltage level is set]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[ConfigureComboPhyPortPll ()]:[DP mode index for ref: 38400 Khz and Clock :270000 Khz: 17]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[GetDssmReferenceFrequency()]:[DPLL reference frequency from register: 38400 MHz]
[INFO]:[SetRequiredVoltageLevel()]:[Setting Voltage Level = 3]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Interface register run busy bit is still set. Trying again.]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data0 as 0x1]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Read value Data1 as 0x0]
[INFO]:[ReadValueFromGTDriverMailbox()]:[Remaining time out value: 90]
=========== Dumping DPLL0 registers ===============
PORT_PLL_CFG_CR0_REG [0x00164284]: 0x00E001A5
PORT_PLL_CFG_CR1_REG [0x00164288]: 0x00000088
DPCLKA_CFCR0_REG [0x00164280]: 0x01E17400
============= End of dumping ====================
[INFO]:[DpEnableDisplayDevice()]:[DP Pll configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[Enabled transport control and Buffer control]
[INFO]:[DpLibTrainLink()]:[Start Full Link Training]
[INFO]:[DpLibTrainLink()]:[DpcdRevision = 0x12]
[INFO]:[DpLibTrainLink()]:[Programmed 0xA to DPCD_LNK_BW_SET_REG(0x0100) for DP with Status = Success]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x1111]
[INFO]:[TrainPattern1()]:[Clock Recovery Done]
[INFO]:[SetComboPhyVswingPreEmphValues()]:[Vswing Level: 0, Pre-Emphasis Level: 0, LS index: 0, BitRate: 2700000]
[INFO]:[IsClockRecoveryDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Main Link Status = 0x7777]
[INFO]:[IsChannelEqualizationDone()]:[Lane Alignment Status = 0x1]
[INFO]:[TrainPattern2()]:[Channel Equalization Successful]
[INFO]:[TrainPattern2()]:[Channel Equalization Done and Vswing and PreEmphLevel are 0 and 0]
[INFO]:[DpEnableDisplayDevice()]:[Link training is completed successfully]
[INFO]:[GetWatermarkLineTime()]:[Returning line time value 60]
[INFO]:[DpEnableDisplayDevice()]:[DP pipe scalar is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP MNTu calculation is done]
[INFO]:[TranscoderSetTimings()]:[HActive = 1919/HTotal=2079, VActive = 1079/VTotal=1118]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder configuration is done]
[INFO]:[DpEnableDisplayDevice()]:[DP Main stream attributes are set]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder DDI function control is enabled]
[INFO]:[DpEnableDisplayDevice()]:[DP transcoder is enabled]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning blocks value 33]
[INFO]:[GetWatermarkBlocksAndLines()]:[Returning lines value 2]
[INFO]:[DpEnableDisplayDevice()]:[DP Plane is enabled]
[INFO]:[DpEnableDisplayDevice()]:[Dp Enable display sequence is completed for port: Ddi-B]
[INFO]:[GalFullSetModeEnableDevice()]:[FullSetMode completed.]
GraphicsPpiGetMode Start
POSTCODE=<00009A07>
[INFO]:[IntelPeiGraphicsGetMode()]:[Current Mode HRes = 1920 VRes = 1080]
MaxMode:0x1
Mode:0x0
SizeOfInfo:0x24
FrameBufferBase:0xB0000000
FrameBufferSize:0x7E9000
Version:0x0
HorizontalResolution:0x780
VerticalResolution:0x438
PixelFormat:0x1
PixelsPerScanLine:0x780
Install PPI: 590AD868-B0B1-4D20-91FF-C2A9D6888194
CallPpiAndFillFrameBuffer: End
PeiGraphicsNotifyCallback Exit
POSTCODE=<00009A0F>
Initializing CD Clock
POSTCODE=<00009A65>
SaPciPrint Start
POSTCODE=<00009A64>
Printing PCI space for device 0
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 14 9A 06 00 90 20 01 00 00 06 00 00 00 00
10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30 00 00 00 00 E0 00 00 00 00 00 00 00 00 00 00 00
40 01 10 DA FE 00 00 00 00 01 00 DC FE 00 00 00 00
50 C1 FE 00 00 11 A0 02 00 C7 00 A0 7F 01 00 00 7B
60 01 00 00 C0 00 00 00 00 01 00 DA FE 00 00 00 00
70 08 02 00 01 00 04 00 00 00 00 00 00 88 06 00 00
80 30 33 33 33 33 33 00 00 00 00 00 00 00 00 00 00
90 08 02 00 01 00 04 00 00 1A 02 00 01 00 04 00 00
A0 01 00 00 00 08 00 00 00 01 00 40 80 08 00 00 00
B0 01 00 00 7C 01 00 80 7B 01 00 00 7B 01 00 C0 7F
C0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
D0 1A 02 00 01 00 04 00 00 00 00 00 00 00 00 00 00
E0 09 00 14 01 10 64 00 F0 08 00 24 90 0A 82 61 06
F0 00 80 1F 00 1D 0F 01 00 00 00 00 00 00 00 00 00
Printing PCI space for device 2
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 86 80 49 9A 07 00 10 00 01 00 00 03 00 00 00 00
10 04 00 00 AF 00 00 00 00 0C 00 00 B0 00 00 00 00
20 01 00 00 00 00 00 00 00 00 00 00 00 86 80 12 22
30 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
40 09 70 0C 01 0C 00 FF FF 00 00 00 00 00 00 00 00
50 C1 FE 00 00 11 20 00 00 00 00 00 00 00 00 00 00
60 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
70 10 AC 92 00 00 80 00 10 07 00 00 00 00 00 00 00
80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
A0 00 00 00 00 00 00 00 00 00 00 00 00 05 D0 00 01
B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
C0 01 00 00 7C 00 00 00 00 01 00 D9 FE 00 00 00 00
D0 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00
E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
F0 C7 00 A0 7F 00 00 00 00 00 00 00 00 00 00 00 00
ConfigureHdAudioCodec() Start
HdaPciBase = 0xFB000, HdaBar = 0x0
POSTCODE=<00009B0F>
DetectAndInitializeCodec() Start
SDI#0 has HD-Audio device.
SDI#0: Detected HD-Audio Codec 0x111D76E0 rev 0x03
ConfigureLinkFrequency() Start [SDI:0]
HDA: HDAudio-Link frequency configuration
SDI#0 Verb F00h ParamtererId = 16h response = 0x00000000
HDA: Codec Static Frequency Switching not supported!
ConfigureLinkFrequency() Exit, Status = Unsupported
Found verb table for vendor 0x111D devId 0x76E0 rev 0xFF (SDI:FF, size: 40 dwords)
SDI#1 has no HD-Audio device.
SDI#2 has HD-Audio device.
SDI#2: Detected HD-Audio Codec 0x80862812 rev 0x00
ConfigureLinkFrequency() Start [SDI:2]
HDA: iDisplay-Link frequency configuration
HDA: iDisplay-Link Static BCLK Frequency Switch ID = 4 - 96MHz
HDA: Set iDisplay Audio T-Mode - 8T
ETmode controller T-Mode: PCI Config Space + C0h[28:27_12]: 0x30020602
ConfigureIDispAudioFrequency() Start
iGFX: iDisplay Audio link frequency setting: 0x8010
AUDIO_PIN_BUF_CTL = B00A7077
UTIL_PIN_BUF_CTL = 300A7077
ConfigureIDispAudioFrequency() End
HDA: LCTLx (Link 1 Control) = 0x00000004
ConfigureLinkFrequency() End
ConfigureLinkFrequency() Exit, Status = Success
Found verb table for vendor 0x8086 devId 0x2812 rev 0xFF (SDI:FF, size: 18 dwords)
DetectAndInitializeCodec() End, Status = Success
ConfigureHdAudioCodec() End, Status = Success
CpuPowerMgmtInit Start
POSTCODE=<00009C6A>
PeimInitializePowerMgmt Entry
GetCpuIdentifier () - CpuSku = 0x0
- PackageTdp = 2800
- CpuStepping = 1
CPU Identifier = TGL-U 4+2 28W
EIST capable
HWP capable
Itbm: Intel Turbo Boost Max Technology 3.0 supported
InitPpm
POSTCODE=<00009C71>
PPM:: ConfigTDP Supported Levels=2
PPM:: ConfigTDP Nominal Ratio=28 Tdp=224
PPM:: ConfigTDP Level1 Ratio=12 Tdp=96
PPM:: ConfigTDP Level2 Ratio=18 Tdp=120
OverClocking Lock Bit is set. Disable the Lock and reset the system
(MAILBOX) Mailbox Read Command = 5h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 10h
(MAILBOX) Mailbox Status = 00h
(MAILBOX) Mailbox Read Command = 22Bh
(MAILBOX) Mailbox Status = 00h
Itbm: InitializeItbm()
Itbm: Itbm support is present in Silicon, but reference code policy is disabled
Itbm: Num of Processors = 0x8
Itbm: Highest performance of slowest core LowestMaxPerf = 0x0
MSR(1FC) before configuring C1E: 0x00240059
MSR(1FC) after configuring C1E: 0x00240059
Programming the C6/C7/C8/C9/C10 (MSR 0x60B, 0x60C ,0x633, 0x634, 0x635 IRTL if not auto.
TAR Ratio Replace at 6 with 14
CTDP Ratio Replace at 5 with 15
PROCHOT# OUT is disabled
PROCHOT# Response is enabled
PPM:: ConfigTDP MSR_CONFIG_TDP_CONTROL=0
PPM:: ConfigTDP MSR_TURBO_ACTIVATION_RATIO=14
PL3 MSR 615 Before Writing 0
PL3 MSR 615 After Writing 0
PL4 MSR 601 Before Writing 0
PL4 MSR 601 After Writing 3C8
DDR Power Limit 1 = 0
DDR Power Limit 2 = 0
New Platform Power Limit 1 0 watt (0 in CPU power unit)
Platform Power Limit 2 Power = 0 Watts (0 in CPU power unit)
CPU Post-Mem Exit
POSTCODE=<00009C7F>
EndOfPeiCheckAndForceVddOn start
EndOfPeiCheckAndForceVddOn end status - 0x0
[SA] BootMode = 0
Clear Temp Gfx BARs at End Of PEI.
BuildFviInfoHob(): Build Smbios FVI Data Hob
IomFwVersion = 11001600
MgFwVersion = 07F9
TbtFwVersion = 0000
InitializeSmbiosCacheInfoHobs() - Start
InitializeSmbiosCacheInfoHobs() - End
InitializeSmbiosProcessorInfoHob() - Start
(MAILBOX) Mailbox Read Command = 105h
(MAILBOX) Mailbox Status = 1Fh
(SMBIOS) BCLK frequency message 0, Status = Success
(SMBIOS) Setting to default BCLK frequency.
(MAILBOX) Mailbox Read Command = 1h
(MAILBOX) Mailbox Status = 1Fh
Turbo MaxSpeed 4400 MHz
InitializeSmbiosProcessorInfoHob() - End
SiInitOnEndOfPei - End
FSP is waiting for NOTIFY
FspSiliconInitApi() - [Status: 0x00000000] - End
PROGRESS CODE: V0000087F I0
Success
FspGfxHob->FrameBufferBase = 0xB0000000
Boot-time Cpu DTS: 0x1AE
Graphics Info: 1920 x 1080 x 32 @ 0xB0000000
MEM: 0000000000000000 00000000000A0000 00 1
MEM: 00000000000A0000 0000000000060000 00 2
MEM: 0000000000100000 00000000760B8000 00 1
MEM: 00000000761B8000 0000000000500000 01 2
MEM: 00000000766B8000 0000000000090000 00 3
MEM: 0000000076748000 0000000000008000 00 4
MEM: 0000000076750000 0000000000500000 00 2
MEM: 0000000076C50000 00000000003B0000 00 2
MEM: 0000000077000000 0000000004000000 00 2
MEM: 000000007B000000 0000000000800000 00 2
MEM: 000000007B800000 0000000000800000 00 2
MEM: 000000007C000000 0000000003C00000 00 2
MEM: 00000000FED20000 0000000000060000 00 2
MEM: 00000000FF530000 0000000000AD0000 00 2
MEM: 0000000100000000 0000000780400000 00 1
MP Init (Wakeup)
SMRR Base: 0x7B000006 Mask: 0xFF800000
MP Init (Run)
Detected 8 CPU threads
CPU 0 APIC ID: 0
CPU 1 APIC ID: 4
CPU 2 APIC ID: 2
CPU 3 APIC ID: 6
CPU 4 APIC ID: 1
CPU 5 APIC ID: 3
CPU 6 APIC ID: 5
CPU 7 APIC ID: 7
PCI Enum
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
PciBus: Discovered PPB @ [00|06|00]
PciBus: Discovered PCI @ [01|00|00]
PciBus: Discovered PCI @ [00|08|00]
PciBus: Discovered PCI @ [00|0A|00]
PciBus: Discovered PCI @ [00|0D|00]
PciBus: Discovered PCI @ [00|0D|01]
PciBus: Discovered PCI @ [00|10|00]
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
PciBus: Discovered PCI @ [00|14|01]
PciBus: Discovered PCI @ [00|14|02]
PciBus: Discovered PCI @ [00|15|00]
PciBus: Discovered PCI @ [00|15|01]
PciBus: Discovered PCI @ [00|16|00]
PciBus: Discovered PCI @ [00|17|00]
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [02|00|00]
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [03|00|00]
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [05|00|00]
PciBus: Discovered PPB @ [05|01|00]
PciBus: Discovered PPB @ [05|02|00]
PciBus: Discovered PPB @ [05|03|00]
PciBus: Discovered PPB @ [05|04|00]
PciBus: Discovered PCI @ [0A|00|00]
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0B|00|00]
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0C|00|00]
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0D|00|00]
PciBus: Discovered PCI @ [00|1E|00]
PciBus: Discovered PCI @ [00|1E|03]
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
PciBus: Discovered PCI @ [00|1F|04]
PciBus: Discovered PCI @ [00|1F|05]
DumpPciResAllocTable: NumOfEntries 1
Bus : 0 - FF
Io : 2000 - FFFF
Mem32: 80000000 - FFFFFFFF
Mem64: 1000000000 - 1800000000
PCI(00,00,00)
PCI(00,02,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000080000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[1].TYP = 4
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000090000000 BAR[1].LEN = 0000000010000000 BAR[1].ALN = 000000000FFFFFFF
BAR[2].TYP = 1
BAR[2].OFF = 0x20
BAR[2].BAS = 0000000000002000 BAR[2].LEN = 0000000000000040 BAR[2].ALN = 000000000000003F
PCI(00,06,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081F00000 BAR[2].LEN = 0000000000100000 BAR[2].ALN = 00000000000FFFFF
PCI(01,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081F00000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
PCI(00,08,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082040000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,0A,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082020000 BAR[0].LEN = 0000000000008000 BAR[0].ALN = 0000000000007FFF
PCI(00,0D,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082010000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,0D,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081200000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203F000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,10,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203E000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,10,05)
PCI(00,14,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082000000 BAR[0].LEN = 0000000000010000 BAR[0].ALN = 000000000000FFFF
PCI(00,14,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081000000 BAR[0].LEN = 0000000000200000 BAR[0].ALN = 00000000001FFFFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203D000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,14,02)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008202C000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 000000008203C000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,15,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203B000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,15,01)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 000000008203A000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,16,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082039000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,17,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082030000 BAR[0].LEN = 0000000000002000 BAR[0].ALN = 0000000000001FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x14
BAR[1].BAS = 0000000082038000 BAR[1].LEN = 0000000000000100 BAR[1].ALN = 0000000000000FFF
BAR[2].TYP = 1
BAR[2].OFF = 0x18
BAR[2].BAS = 0000000000002080 BAR[2].LEN = 0000000000000008 BAR[2].ALN = 0000000000000007
BAR[3].TYP = 1
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000000002088 BAR[3].LEN = 0000000000000004 BAR[3].ALN = 0000000000000003
BAR[4].TYP = 1
BAR[4].OFF = 0x20
BAR[4].BAS = 0000000000002060 BAR[4].LEN = 0000000000000020 BAR[4].ALN = 000000000000001F
BAR[5].TYP = 3
BAR[5].OFF = 0x24
BAR[5].BAS = 0000000082037000 BAR[5].LEN = 0000000000000800 BAR[5].ALN = 0000000000000FFF
PCI(00,1C,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081D00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(02,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081D00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081E00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081B00000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(03,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081B00000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081C00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1C,04)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(04,00,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(05,00,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,01,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,02,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,03,00)
PPB BAR0/1
PPB APPERTURE
PCI(05,04,00)
PPB BAR0/1
PPB APPERTURE
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 00000000A0000000 BAR[3].LEN = 0000000001100000 BAR[3].ALN = 0000000000FFFFFF
PCI(0A,00,00)
BAR[0].TYP = 4
BAR[0].OFF = 0x10
BAR[0].BAS = 00000000A0000000 BAR[0].LEN = 0000000001000000 BAR[0].ALN = 0000000000FFFFFF
BAR[2].TYP = 4
BAR[2].OFF = 0x1C
BAR[2].BAS = 00000000A1000000 BAR[2].LEN = 0000000000008000 BAR[2].ALN = 0000000000007FFF
PCI(00,1D,00)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081900000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0B,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081900000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081A00000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,01)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081700000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0C,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081700000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081800000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1D,03)
PPB BAR0/1
PPB APPERTURE
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000081500000 BAR[2].LEN = 0000000000200000 BAR[2].ALN = 00000000000FFFFF
PCI(0D,00,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000081500000 BAR[0].LEN = 0000000000100000 BAR[0].ALN = 00000000000FFFFF
BAR[3].TYP = 3
BAR[3].OFF = 0x1C
BAR[3].BAS = 0000000081600000 BAR[3].LEN = 0000000000004000 BAR[3].ALN = 0000000000003FFF
PCI(00,1E,00)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082036000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[1].TYP = 3
BAR[1].OFF = 0x18
BAR[1].BAS = 0000000082035000 BAR[1].LEN = 0000000000001000 BAR[1].ALN = 0000000000000FFF
PCI(00,1E,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082034000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI(00,1F,00)
PCI(00,1F,03)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082028000 BAR[0].LEN = 0000000000004000 BAR[0].ALN = 0000000000003FFF
BAR[3].TYP = 3
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000081400000 BAR[3].LEN = 0000000000100000 BAR[3].ALN = 00000000000FFFFF
PCI(00,1F,04)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082033000 BAR[0].LEN = 0000000000000100 BAR[0].ALN = 0000000000000FFF
BAR[3].TYP = 1
BAR[3].OFF = 0x20
BAR[3].BAS = 0000000000002040 BAR[3].LEN = 0000000000000020 BAR[3].ALN = 000000000000001F
PCI(00,1F,05)
BAR[0].TYP = 3
BAR[0].OFF = 0x10
BAR[0].BAS = 0000000082032000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
PCI HOST: Bus(0x00-0D)
BAR[0].TYP = 1
BAR[0].OFF = 0x100
BAR[0].BAS = 0000000000002000 BAR[0].LEN = 0000000000001000 BAR[0].ALN = 0000000000000FFF
BAR[2].TYP = 3
BAR[2].OFF = 0x100
BAR[2].BAS = 0000000080000000 BAR[2].LEN = 0000000002100000 BAR[2].ALN = 0000000000FFFFFF
BAR[3].TYP = 4
BAR[3].OFF = 0x100
BAR[3].BAS = 0000000090000000 BAR[3].LEN = 0000000011100000 BAR[3].ALN = 000000000FFFFFFF
PciRootBridgeInfoHob: Rev 0x1, Count 0x1
Bus(0x00-0D)
BarType-1: Base 0x0000000000002000 Length 0x0000000000001000
BarType-3: Base 0x0000000080000000 Length 0x0000000002100000
BarType-4: Base 0x0000000090000000 Length 0x0000000011100000
MEM Pool Used: 0x000075BC
RootportDownstreamPmConfiguration 6:0
RecursiveBusAssignmentP 0:6:0 -> 0,2,1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrConfiguration 1:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveLtrOverrideCheck 1:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=1
ConfigureRpLtrOverride 30000 Val 0 En 0
ConfigureRpLtrOverride 6:0
RecursiveCpmConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveCpmConfiguration 1:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:6:0
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveL1ssConfiguration 1:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:6:0
GetAspmCaps 00:06:00 L0s- 4:x L1+ 16:x
HasChildBus00:06:00: yes, 1
IsPcieDevice 01:00:00 - yes
RecursiveAspmConfiguration 1:0:0
GetAspmCaps 01:00:00 L0s- 7:4 L1+ 8:255
CombineAspm FF:FF -> FF
SetAspm on 00:06:00 to 2
IsPcieDevice 01:00:00 - yes
SetAspm on 01:00:00 to 2
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1C:3
RecursiveBusAssignmentP 0:1C:3 -> 0,4,3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrConfiguration 3:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveLtrOverrideCheck 3:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E3000 Val 0 En 0
ConfigureRpLtrOverride 1C:3
RecursiveCpmConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveCpmConfiguration 3:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:3
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveL1ssConfiguration 3:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:3
GetAspmCaps 00:1C:03 L0s- 4:x L1- 16:x
HasChildBus00:1C:03: yes, 3
IsPcieDevice 03:00:00 - yes
RecursiveAspmConfiguration 3:0:0
GetAspmCaps 03:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:03 to 0
IsPcieDevice 03:00:00 - yes
SetAspm on 03:00:00 to 0
RootportDownstreamPmConfiguration 1C:4
RecursiveBusAssignmentP 0:1C:4 -> 0,5,A
IsPcieDevice 04:00:00 - yes
RecursiveBusAssignmentP 4:0:0 -> 4,6,A
IsPcieDevice 05:00:00 - yes
RecursiveBusAssignmentP 5:0:0 -> 5,7,6
IsPcieDevice 05:01:00 - yes
RecursiveBusAssignmentP 5:1:0 -> 5,8,7
IsPcieDevice 05:02:00 - yes
RecursiveBusAssignmentP 5:2:0 -> 5,9,8
IsPcieDevice 05:03:00 - yes
RecursiveBusAssignmentP 5:3:0 -> 5,A,9
IsPcieDevice 05:04:00 - yes
RecursiveBusAssignmentP 5:4:0 -> 5,B,A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveLtrConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveLtrConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveLtrConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveLtrConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveLtrConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrConfiguration A:0:0
Not LtrCapable 0A:00:00
RecursiveLtrOverrideCheck 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveLtrOverrideCheck 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveLtrOverrideCheck 5:0:0
HasChildBus05:00:00: yes, 6
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:01:00 - yes
RecursiveLtrOverrideCheck 5:1:0
HasChildBus05:01:00: yes, 7
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:02:00 - yes
RecursiveLtrOverrideCheck 5:2:0
HasChildBus05:02:00: yes, 8
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:03:00 - yes
RecursiveLtrOverrideCheck 5:3:0
HasChildBus05:03:00: yes, 9
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
IsPcieDevice 05:04:00 - yes
RecursiveLtrOverrideCheck 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveLtrOverrideCheck A:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E4000 Val 0 En 0
ConfigureRpLtrOverride 1C:4
RecursiveCpmConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveCpmConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveCpmConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveCpmConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveCpmConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveCpmConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveCpmConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveCpmConfiguration A:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:4
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveL1ssConfiguration 4:0:0
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveL1ssConfiguration 5:0:0
HasChildBus05:00:00: yes, 6
IsPcieDevice 05:01:00 - yes
RecursiveL1ssConfiguration 5:1:0
HasChildBus05:01:00: yes, 7
IsPcieDevice 05:02:00 - yes
RecursiveL1ssConfiguration 5:2:0
HasChildBus05:02:00: yes, 8
IsPcieDevice 05:03:00 - yes
RecursiveL1ssConfiguration 5:3:0
HasChildBus05:03:00: yes, 9
IsPcieDevice 05:04:00 - yes
RecursiveL1ssConfiguration 5:4:0
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveL1ssConfiguration A:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:4
GetAspmCaps 00:1C:04 L0s- 4:x L1- 16:x
HasChildBus00:1C:04: yes, 4
IsPcieDevice 04:00:00 - yes
RecursiveAspmConfiguration 4:0:0
GetAspmCaps 04:00:00 L0s- 0:x L1+ 1:x
HasChildBus04:00:00: yes, 5
IsPcieDevice 05:00:00 - yes
RecursiveAspmConfiguration 5:0:0
GetAspmCaps 05:00:00 L0s- 0:x L1+ 1:x
HasChildBus05:00:00: yes, 6
SetAspm on 05:00:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:01:00 - yes
RecursiveAspmConfiguration 5:1:0
GetAspmCaps 05:01:00 L0s- 0:x L1+ 1:x
HasChildBus05:01:00: yes, 7
SetAspm on 05:01:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:02:00 - yes
RecursiveAspmConfiguration 5:2:0
GetAspmCaps 05:02:00 L0s- 0:x L1+ 1:x
HasChildBus05:02:00: yes, 8
SetAspm on 05:02:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:03:00 - yes
RecursiveAspmConfiguration 5:3:0
GetAspmCaps 05:03:00 L0s- 0:x L1+ 1:x
HasChildBus05:03:00: yes, 9
SetAspm on 05:03:00 to 2
CombineAspm FF:FF -> FF
IsPcieDevice 05:04:00 - yes
RecursiveAspmConfiguration 5:4:0
GetAspmCaps 05:04:00 L0s- 0:x L1+ 1:x
HasChildBus05:04:00: yes, A
IsPcieDevice 0A:00:00 - yes
RecursiveAspmConfiguration A:0:0
GetAspmCaps 0A:00:00 L0s+ 5:3 L1+ 16:64
CombineAspm FF:3F -> 3F
SetAspm on 05:04:00 to 2
IsPcieDevice 0A:00:00 - yes
SetAspm on 0A:00:00 to 2
CombineAspm FF:3F -> 3F
CombineAspm FF:3F -> 3F
SetAspm on 00:1C:04 to 0
IsPcieDevice 04:00:00 - yes
SetAspm on 04:00:00 to 0
RootportDownstreamPmConfiguration 1C:0
RecursiveBusAssignmentP 0:1C:0 -> 0,3,2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrConfiguration 2:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveLtrOverrideCheck 2:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E0000 Val 0 En 0
ConfigureRpLtrOverride 1C:0
RecursiveCpmConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveCpmConfiguration 2:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1C:0
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveL1ssConfiguration 2:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1C:0
GetAspmCaps 00:1C:00 L0s- 4:x L1- 16:x
HasChildBus00:1C:00: yes, 2
IsPcieDevice 02:00:00 - yes
RecursiveAspmConfiguration 2:0:0
GetAspmCaps 02:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1C:00 to 0
IsPcieDevice 02:00:00 - yes
SetAspm on 02:00:00 to 0
RootportDownstreamPmConfiguration 1D:0
RecursiveBusAssignmentP 0:1D:0 -> 0,C,B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrConfiguration B:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveLtrOverrideCheck B:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E8000 Val 0 En 0
ConfigureRpLtrOverride 1D:0
RecursiveCpmConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveCpmConfiguration B:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:0
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveL1ssConfiguration B:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:0
GetAspmCaps 00:1D:00 L0s- 4:x L1- 16:x
HasChildBus00:1D:00: yes, B
IsPcieDevice 0B:00:00 - yes
RecursiveAspmConfiguration B:0:0
GetAspmCaps 0B:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:00 to 0
IsPcieDevice 0B:00:00 - yes
SetAspm on 0B:00:00 to 0
RootportDownstreamPmConfiguration 1D:1
RecursiveBusAssignmentP 0:1D:1 -> 0,D,C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrConfiguration C:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveLtrOverrideCheck C:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride E9000 Val 0 En 0
ConfigureRpLtrOverride 1D:1
RecursiveCpmConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveCpmConfiguration C:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:1
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveL1ssConfiguration C:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:1
GetAspmCaps 00:1D:01 L0s- 4:x L1- 16:x
HasChildBus00:1D:01: yes, C
IsPcieDevice 0C:00:00 - yes
RecursiveAspmConfiguration C:0:0
GetAspmCaps 0C:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:01 to 0
IsPcieDevice 0C:00:00 - yes
SetAspm on 0C:00:00 to 0
RootportDownstreamPmConfiguration 1D:3
RecursiveBusAssignmentP 0:1D:3 -> 0,E,D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrConfiguration D:0:0
HasChildBus : : : no
RecursiveLtrOverrideCheck 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveLtrOverrideCheck D:0:0
HasChildBus : : : no
CombineLtr: A(V0 S0 E0 : V0 S0 E0, F0)
: B(V0 S0 E0 : V0 S0 E0, F0)
: R(V0 S0 E0 : V0 S0 E0, F0)
ConfigureRpLtrOverride IsCpuPcie=0
ConfigureRpLtrOverride EB000 Val 0 En 0
ConfigureRpLtrOverride 1D:3
RecursiveCpmConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveCpmConfiguration D:0:0
HasChildBus : : : no
RecursiveL1ssConfiguration 0:1D:3
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveL1ssConfiguration D:0:0
HasChildBus : : : no
RecursiveAspmConfiguration 0:1D:3
GetAspmCaps 00:1D:03 L0s+ 4:x L1+ 16:x
HasChildBus00:1D:03: yes, D
IsPcieDevice 0D:00:00 - yes
RecursiveAspmConfiguration D:0:0
GetAspmCaps 0D:00:00 L0s- 5:3 L1+ 4:64
CombineAspm FF:40 -> 40
SetAspm on 00:1D:03 to 2
IsPcieDevice 0D:00:00 - yes
SetAspm on 0D:00:00 to 2
GFX framebuffer WC is enabled @ 0x90000000:0x10000000
Call FspNotifyPhase(20) ... PROGRESS CODE: V00006800 I0
NotifyPhaseApi() - Begin [Phase: 00000020]
FSP Post PCI Enumeration ...
Install PPI: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E3F517
Enable MSE of Telemetry
Notify: PPI Guid: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793, Peim notify entry point: 76E2D472
PchOnPciEnumCompleteFsp() Start
PchOnPciEnumCompleteCommon() Start
Protected range 0: 0x960F1530
Protected range 1: 0x9FFF1650
GpioCheckConflict Start..
[GPIO Conflict Check] No GPIO HOB found.
PchOnPciEnumCompleteCommon() End
PchOnPciEnumCompleteFsp() End
NotifyPhaseApi() - End [Status: 0x00000000]
PROGRESS CODE: V0000687F I0
Success
ACPI NVS, LowPowerS0IdleConstraint(Micro-pep constraints) = 0x0000000069CA07F7
Update Cpu Nvs Done
Revision 0x1, PpmFlags 0x027A7FB3
Initialize VT-d
VTd enabled
ACPI Init
Creating BDAT Table...
No BDAT data exists, exiting without creating table
Updated BDAT Table in AcpiTable Entries
Publish ACPI table: BDAT @ 0x766B8210
Updated DMAR Table in AcpiTable Entries
Update Dmar ACPI Table
McD0BaseAddress 0x00000000, IgdMode 0x0000
GttMode 0x0003, GttMmAdr 0x80000000, GttMemSize 0x00800000
RMRR Base address IGD 000000007B800000
RMRR Limit address IGD 000000007FBFFFFF
RMRR Base address USB 0000000000000000
RMRR Limit address USB 0000000000000000
WARNING: RmrrUsb.RmrrHeader.ReservedMemoryRegionBaseAddress is 0.
RMRR Base address TCSS DMA0 0000000000000000
RMRR Limit Address TCSS DMA0 0000000000000000
RMRR Base address TCSS DMA1 0000000000000000
RMRR Limit Address TCSS DMA1 0000000000000000
VTD base address 1 = FED90000
VTD base address 2 = 0
VTD base address 4 = 0
VTD base address 5 = 0
VTD base address 6 = 0
VTD base address 7 = 0
VTD base address 3 = FED91000
Removing Ibt DRHD engine 0
Removing Ibt DRHD engine 1
Removing Ibt DRHD engine 2
Removing Ibt DRHD engine 3
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Rmrr->RmrrHeader.ReservedMemoryRegionBaseAddress 0
Publish ACPI table: DMAR @ 0x766B8240
Not adding ACPI table
Publish ACPI table: FACP @ 0x766B8310
Publish ACPI table: FWST @ 0x766B8430
Publish ACPI table: HPET @ 0x766B8560
Publish ACPI table: LPIT @ 0x766B85A0
Publish ACPI table: APIC @ 0x766B8670
Publish ACPI table: MCFG @ 0x766B8760
Publish ACPI table: FPDT @ 0x766B87A0
Publish ACPI table: TPM2 @ 0x766B8840
Updated Psd Table in AcpiTable Entries
Publish ACPI table: PSDS @ 0x766B8890
Publish ACPI table: SSDT @ 0x766B88F0
Publish ACPI table: SSDT @ 0x766B8D80
Publish ACPI table: SSDT @ 0x766B9210
Publish ACPI table: SSDT @ 0x766B9B00
Publish ACPI table: SSDT @ 0x766B9FE0
Publish ACPI table: SSDT @ 0x766BAB20
Publish ACPI table: SSDT @ 0x766BAEC0
Publish ACPI table: SSDT @ 0x766BB000
Publish ACPI table: SSDT @ 0x766BB820
Publish ACPI table: SSDT @ 0x766BB9F0
CPU PNVS Base Old=0xFFFF0000 New=0x76748D8D
CPU PNVS Size Old=0xAA55 New=0x0065
Publish ACPI table: SSDT @ 0x766BBDD0
Publish ACPI table: SSDT @ 0x766BE240
PNVS Old=0xFFFF0000 New=0x76748AB5
PNVL Old=0x0000AA55 New=0x000002D8
Publish ACPI table: SSDT @ 0x766DFE70
SANV Base Old=0xFFFF0000 New=0x76748DF2
SANV Size Old=0xAA55 New=0x01BC
Publish ACPI table: SSDT @ 0x766E0240
Publish ACPI table: SSDT @ 0x766E6440
Publish ACPI table: SSDT @ 0x766E72C0
Publish ACPI table: BGRT @ 0x766EAF20
Find RTCT table
Not adding ACPI table
ACPI Ret: Success
AppendSmbiosFwSts () Start
Current ME FW HOB data printed -
00: 01 04 00 00 00 00 00 00 - 55 02 00 90 16 01 10 80
10: 20 00 00 00 00 40 00 00 - 00 00 00 00 00 00 40 00
20: 01 00 00 00 FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - FF FF FF FF 04 00 00 00
40: 00 00 00 80 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 05 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
FWSTS SMBIOS table OEM type 0xDB data printed -
00: DB 6A 00 00 01 04 01 55 - 02 00 90 16 01 85 30 20
10: 00 00 00 00 40 00 00 00 - 00 00 00 00 00 40 00 02
20: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF
30: FF FF FF FF FF FF FF FF - 03 00 00 00 80 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 04 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00
VbtAddress =0x76A5B91C
Extended VBT supported
VBT data found '$VBT TIGERLAKE '
Updating GOP VBT fields using GOP Configuration Lib.
Update VBT for TGL-U (CNT) LPDDR4
VBT Updated.
IgdOpRegion ended
HeciInitialize () - Start
InitializeHeci () - H_RDY is already initialized
HeciInitLib init Status: Success
CSME MeasuredBoot state: 0
Loading Payload ID UEFI
Loading Component EPLD:UEFI
Registering container EPLD
HASH verification for usage (0x00001000) with Hash Alg (0x2): Success
SignType (0x2) SignSize (0x180) SignHashAlg (0x2)
RSA verification for usage (0x00001000): Success
HASH verification for usage (0x00000000) with Hash Alg (0x2): Success
Load Payload ID 0x49464555 @ 0x00B00000
FV Format Payload
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
MP Init (Done)
HOB @ 0x76C10000
Created 3 OS boot options (Current: 0)
SmmRamBase = 0x7B000000, SmmRamSize = 0x800000
HECI1 MeFirmwareStatus = 400000
Stage2: HwState 0x4 TpmType 0x1
TPM Lib Private Data not found
Unable to get log area for TCG 2.0 format events !!
Stage2 stack: 0x40000 (stack used 0xA40, HOB used 0x16E0, 0x3DEE0 free)
Stage2 heap: 0x4C0000 (0x2C9C50 used, 0x1F63B0 free, 0x438E6B max used)
Payload entry: 0x00800320
Jump to payload
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x00000800000, size is 0x00030000, handle is 0x800000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389
DiscoverPeimsAndOrderWithApriori(): Found 0x5 PEI FFS files in the 0th FV
Loading PEIM 9B3ADA4F-AE56-4C24-8DEA-F03B7558AE50
Loading PEIM at 0x0000080D080 EntryPoint=0x0000080D395 PcdPeim.efi
Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480
Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1
Install PPI: 4D8B155B-C059-4C8F-8926-06FD4331DB8A
Install PPI: A60C6B59-E459-425D-9C69-0BCC9CB27D81
Register PPI Notify: 605EA650-C65C-42E1-BA80-91A52AB618C6
Loading PEIM A3610442-E69F-4DF3-82CA-2360C4031A23
Loading PEIM at 0x00000812720 EntryPoint=0x00000812A35 ReportStatusCodeRouterPei.efi
Install PPI: 0065D394-9951-4144-82A3-0AFC8579C251
Install PPI: 229832D3-7A30-4B36-B827-F40CB7D45436
Loading PEIM 9D225237-FA01-464C-A949-BAABC02D31D0
Loading PEIM at 0x000008157C0 EntryPoint=0x00000815AD5 StatusCodeHandlerPei.efi
Loading PEIM 352C6AF8-315B-4BD6-B04F-31D4ED1EBE57
Loading PEIM at 0x000008186A0 EntryPoint=0x00000818A88 BlSupportPeim.efi
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
MemInfoCallback: Base=0x 0, Size=0x A0000, Type=0x0 (0x1)
MemInfoCallback: Base=0x A0000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0x 100000, Size=0x760B8000, Type=0x0 (0x1)
MemInfoCallback: Base=0x761B8000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x766B8000, Size=0x 90000, Type=0x5 (0x3)
MemInfoCallback: Base=0x76748000, Size=0x 8000, Type=0x5 (0x4)
MemInfoCallback: Base=0x76750000, Size=0x 500000, Type=0x5 (0x2)
MemInfoCallback: Base=0x76C50000, Size=0x 3B0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x77000000, Size=0x 4000000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B000000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7B800000, Size=0x 800000, Type=0x5 (0x2)
MemInfoCallback: Base=0x7C000000, Size=0x 3C00000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFED20000, Size=0x 60000, Type=0x5 (0x2)
MemInfoCallback: Base=0xFF530000, Size=0x AD0000, Type=0x5 (0x2)
MemInfoCallback: Base=0x100000000, Size=0x780400000, Type=0x0 (0x1)
Low memory 0x761B8000
SystemLowMemTop 0x80000000
PeiMemBase: 0x721B0000.
PeiMemSize: 0x4000000.
PeiInstallPeiMemory MemoryBegin 0x721B0000, MemoryLength 0x4000000
ERROR - Invalid Firmware Volume Header Checksum, change 0xE699 to 0x57FE
Found one valid fv : 0x5D000000830000.
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: 801CEA
The 1th FV start address is 0x00000830000, size is 0x005D0000, handle is 0x830000
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Created graphics info hob
Created graphics device info hob
Detected Acpi Table at 0x766B8000, length 0x32F58
Detected Smbios Table at 0x769E8000, length 0x1000
Rsdp at 0x766B8000
Rsdt at 0x766B8030, Xsdt at 0x766B80E0
Found Fadt in Rsdt
Found MM config address in Rsdt
PmCtrl Reg 0x1804
PmTimer Reg 0x1808
Reset Reg 0xCF9
Reset Value 0x6
PmEvt Reg 0x1800
PmGpeEn Reg 0x1870
PcieBaseAddr 0xC0000000
Create acpi board info guid hob
VerifiedBoot 0x0
MeasuredBoot 0x0
Get FSP hob success. FspsBase = 0x76B78000
Get FSP hob success. FspHobList = 0x76C90000
Get SMM info. smm_base = 0x7B000000
smm_size = 0x800000
Base = 0xFF610000, Size=0x40000 Status=0xSuccess
GuidHob = 0x80E90
DeviceTable = 0x76C10E08
found it = 0x1F05
DeviceBase = 0x1F05
2DeviceBase = 0xFD000
SpiPciBase = 0xC00FD000
SpiFlashInfo->Flags = 0x1
SPI flash base at 0xC00FD000
VarStoreBase=0xFF610000, length=0x40000
TpmType - TPM_TYPE_NONE
Temp Stack : BaseAddress=0x88000 Length=0x8000
Temp Heap : BaseAddress=0x80000 Length=0x8000
Total temporary memory: 65536 bytes.
temporary memory stack ever used: 32768 bytes.
temporary memory heap used for HobList: 4192 bytes.
temporary memory heap occupied by memory pages: 0 bytes.
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Old Stack size 32768, New stack size 131072
Stack Hob: BaseAddress=0x721B0000 Length=0x20000
Heap Offset = 0x72150000 Stack Offset = 0x72140000
Loading PEIM 52C05B14-0B98-496C-BC3B-04B50211D680
Loading PEIM at 0x000761A3000 EntryPoint=0x000761A3355 PeiCore.efi
Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE
Loading PEIM 86D70125-BAA3-4296-A62F-602BEBBB9081
Loading PEIM at 0x0007619C000 EntryPoint=0x0007619C3F6 DxeIpl.efi
Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7
Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731
DiscoverPeimsAndOrderWithApriori(): Found 0x0 PEI FFS files in the 1th FV
DXE IPL Entry
Loading PEIM D6A2CB7F-6A18-4E2F-B43B-9920A733700A
Loading PEIM at 0x00076174000 EntryPoint=0x00076174B94 DxeCore.efi
Loading DXE CORE at 0x00076174000 EntryPoint=0x00076174B94
AddressBits=39 5LevelPaging=0 1GPage=1
Pml5=1 Pml4=1 Pdp=512 TotalPage=2
Install PPI: 605EA650-C65C-42E1-BA80-91A52AB618C6
Notify: PPI Guid: 605EA650-C65C-42E1-BA80-91A52AB618C6, Peim notify entry point: 80D5FA
HandOffToDxeCore() Stack Base: 0x76154000, Stack Size: 0x20000
HOBLIST address in DXE = 0x758A2018
Memory Allocation 0x00000009 0x766B8000 - 0x76747FFF
Memory Allocation 0x0000000A 0x76748000 - 0x7674FFFF
Memory Allocation 0x00000004 0x800000 - 0xDFFFFF
Memory Allocation 0x0000000B 0xFEC80000 - 0xFECFFFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000003 0x761A3000 - 0x761AFFFF
Memory Allocation 0x00000003 0x7619C000 - 0x761A2FFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000003 0x76174000 - 0x7619BFFF
Memory Allocation 0x00000004 0x76154000 - 0x76173FFF
Memory Allocation 0x00000004 0x75E00000 - 0x75FFFFFF
Memory Allocation 0x00000007 0x76000000 - 0x76153FFF
Memory Allocation 0x00000004 0x721B0000 - 0x721CFFFF
Memory Allocation 0x00000004 0x75DFF000 - 0x75DFFFFF
FV Hob 0x830000 - 0xDFFFFF
InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 761973E0
InstallProtocolInterface: 8F644FA9-E850-4DB1-9CE2-0B44698E8DA4 7589ED30
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7589E098
InstallProtocolInterface: 220E73B6-6BDB-4413-8405-B974B108619A 7589E630
InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 76198070
Loading driver 80CF7257-87AB-47F9-A3FE-D50B76D89541
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754D91C0
Loading driver at 0x000754BA000 EntryPoint=0x000754BA374 PcdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754D9518
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
InstallProtocolInterface: 11B34006-D85B-4D0A-A290-D5A571310EF7 754C12C0
InstallProtocolInterface: 13A3F0F6-264A-3EF0-F2E0-DEC512342F34 754C1220
InstallProtocolInterface: 5BE40F57-FA68-4610-BBBF-E9C5FCDAD365 754C13D0
InstallProtocolInterface: FD0F4478-0EFD-461D-BA2D-E58C45FD5F5E 754C12B0
Loading driver D93CE3D8-A7EB-4730-8C8E-CC466A9ECC3C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C8B40
Loading driver at 0x000759CC000 EntryPoint=0x000759CD0F4 ReportStatusCodeRouterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C9118
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
InstallProtocolInterface: 86212936-0E76-41C8-A03A-2AF2FC1C39E2 759D20D0
InstallProtocolInterface: D2B2B828-0826-48A7-B3DF-983C006024F0 759D20C8
Loading driver F80697E9-7FD6-4665-8646-88E33EF71DFC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C81C0
Loading driver at 0x000753A0000 EntryPoint=0x000753A0418 SecurityStubDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C8498
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
InstallProtocolInterface: 94AB2F58-1438-4EF1-9152-18941A3A0E68 754232B0
InstallProtocolInterface: A46423E3-4617-49F1-B9FF-D1BFA9115839 754232A8
InstallProtocolInterface: 15853D7C-3DDF-43E0-A1CB-EBF85B8F872C 754232B8
Loading driver 1A1E4886-9517-440E-9FDE-3BE44CEE2136
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C7240
Loading driver at 0x00075494000 EntryPoint=0x000754950F4 CpuDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C7598
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
Paging: added 512 pages to page table pool
CurrentPagingContext:
MachineType - 0x8664
PageTableBase - 0x75E01000
Attributes - 0xC0000006
InstallProtocolInterface: 26BACCB1-6F42-11D4-BCE7-0080C73C8881 754A5B50
MemoryProtectionCpuArchProtocolNotify:
ProtectUefiImageCommon - 0x76197D18
- 0x0000000076174000 - 0x0000000000028000
ProtectUefiImageCommon - 0x754D91C0
- 0x00000000754BA000 - 0x0000000000007BA0
ProtectUefiImageCommon - 0x754C8B40
- 0x00000000759CC000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759CC000 - 0x0000000000001000 (0x0000000000004000)
SetUefiImageMemoryAttributes - 0x00000000759CD000 - 0x0000000000003000 (0x0000000000020000)
SetUefiImageMemoryAttributes - 0x00000000759D0000 - 0x0000000000006000 (0x0000000000004000)
ProtectUefiImageCommon - 0x754C81C0
- 0x00000000753A0000 - 0x000000000008C220
ProtectUefiImageCommon - 0x754C7240
- 0x0000000075494000 - 0x0000000000012AE0
ConvertPages: failed to find range 0 - 9FFFF
ConvertPages: failed to find range A0000 - BFFFF
ConvertPages: failed to find range C0000 - FFFFF
ConvertPages: failed to find range 761B8000 - 766B7FFF
ConvertPages: failed to find range 76750000 - 7AFFFFFF
ConvertPages: failed to find range 7B000000 - 7FBFFFFF
ConvertPages: failed to find range FEC80000 - FECFFFFF
ConvertPages: failed to find range FED20000 - FED7FFFF
ConvertPages: failed to find range FF530000 - FFFFFFFF
ConvertPages: failed to find range 100000000 - 8803FFFFF
AP Loop Mode is 1
WakeupBufferStart = 85000, WakeupBufferSize = 23C0
CpuDxe: 5-Level Paging = 0
APIC MODE is 1
MpInitLib: Find 8 processors in system.
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
CpuDxe: 5-Level Paging = 0
Detect CPU count: 8
Does not find any HOB stored CPU BIST information!
InstallProtocolInterface: 3FDDA605-A76E-4F46-AD29-12F4531B3D08 754A5C40
Loading driver C8339973-A563-4561-B858-D8476F9DEFC4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754C21C0
Loading driver at 0x000754AA000 EntryPoint=0x000754AA384 Metronome.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754C2498
ProtectUefiImageCommon - 0x754C21C0
- 0x00000000754AA000 - 0x0000000000003960
InstallProtocolInterface: 26BACCB2-6F42-11D4-BCE7-0080C73C8881 754AD6B8
Loading driver B601F8C4-43B7-4784-95B1-F4226CB40CEE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B30C0
Loading driver at 0x000759C2000 EntryPoint=0x000759C3118 RuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B3498
ProtectUefiImageCommon - 0x754B30C0
- 0x00000000759C2000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759C2000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759C3000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759C6000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: B7DFB4E1-052F-449F-87BE-9818FC91B733 759C80A0
Loading driver 4B28E4C7-FF36-4E10-93CF-A82159E777C5
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B37C0
Loading driver at 0x000759B8000 EntryPoint=0x000759B90B4 ResetSystemRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1B18
ProtectUefiImageCommon - 0x754B37C0
- 0x00000000759B8000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759B8000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759B9000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759BC000 - 0x0000000000006000 (0x0000000000004008)
InstallProtocolInterface: 27CFAC88-46CC-11D4-9A38-0090273FC14D 0
InstallProtocolInterface: 9DA34AE0-EAF9-4BBF-8EC3-FD60226C44BE 759BE120
InstallProtocolInterface: 695D7835-8D47-4C11-AB22-FA8ACCE7AE7A 759BE0F8
InstallProtocolInterface: 2DF6BA0B-7092-440D-BD04-FB091EC3F3C1 759BE0D0
Loading driver C3099578-F815-4A96-84A3-FC593760181D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B1240
Loading driver at 0x000759AE000 EntryPoint=0x000759AF0B4 SmmControlDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B1698
ProtectUefiImageCommon - 0x754B1240
- 0x00000000759AE000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x00000000759AE000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759AF000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759B2000 - 0x0000000000006000 (0x0000000000004008)
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
InstallProtocolInterface: 843DC720-AB1E-42CB-9357-8A0078F3561B 759B40A8
Loading driver A19B1FE7-C1BC-49F8-875F-54A5D542443F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754B07C0
Loading driver at 0x0007548A000 EntryPoint=0x0007548A3C4 CpuIo2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0118
ProtectUefiImageCommon - 0x754B07C0
- 0x000000007548A000 - 0x00000000000040C0
InstallProtocolInterface: AD61F191-AE5F-4C0E-B9FA-E869D288C64F 7548DD68
Loading driver 9B680FCE-AD6B-4F3A-B60B-F59899003443
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF040
Loading driver at 0x0007546E000 EntryPoint=0x0007546E374 DevicePathDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754B0418
ProtectUefiImageCommon - 0x754AF040
- 0x000000007546E000 - 0x000000000000DF60
InstallProtocolInterface: 0379BE4E-D706-437D-B037-EDB82FB772A4 75477230
InstallProtocolInterface: 8B843E20-8132-4852-90CC-551A4E4A7F1C 75477220
InstallProtocolInterface: 05C99A21-C70F-4AD2-8A5F-35DF3343F51E 75477270
Loading driver 96B5C032-DF4C-4B6E-8232-438DCF448D0E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AF340
Loading driver at 0x00075486000 EntryPoint=0x00075486374 NullMemoryTestDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AF898
ProtectUefiImageCommon - 0x754AF340
- 0x0000000075486000 - 0x0000000000003C40
InstallProtocolInterface: 309DE7F1-7F5E-4ACE-B49C-531BE5AA95EF 75489938
Loading driver 245CB4DA-8E15-4A1B-87E3-9878FFA07520
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AEB40
Loading driver at 0x00075482000 EntryPoint=0x00075482374 Legacy8259.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AEE98
ProtectUefiImageCommon - 0x754AEB40
- 0x0000000075482000 - 0x0000000000003A80
InstallProtocolInterface: 38321DBA-4FE0-4E17-8AEC-413055EAEDC1 75485780
Loading driver 348C4D62-BFBD-4882-9ECE-C80BB1C4783B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754AE1C0
Loading driver at 0x0007537D000 EntryPoint=0x0007537D394 HiiDatabase.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754AE498
ProtectUefiImageCommon - 0x754AE1C0
- 0x000000007537D000 - 0x0000000000022F60
InstallProtocolInterface: E9CA4775-8657-47FC-97E7-7ED65A084324 7539E7D8
InstallProtocolInterface: 0FD96974-23AA-4CDC-B9CB-98D17750322A 7539E850
InstallProtocolInterface: EF9FC172-A1B2-4693-B327-6D32FC416042 7539E878
InstallProtocolInterface: 587E72D7-CC50-4F79-8209-CA291FC1A10F 7539E8D0
InstallProtocolInterface: 0A8BADD5-03B8-4D19-B128-7B8F0EDAA596 7539E900
InstallProtocolInterface: 31A6406A-6BDF-4E46-B2A2-EBAA89C40920 7539E7F8
InstallProtocolInterface: 1A1241E6-8F19-41A9-BC0E-E8EF39E06546 7539E820
Loading driver C68DAA4E-7AB5-41E8-A91D-5954421053F3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A9340
Loading driver at 0x0007547E000 EntryPoint=0x0007547E334 BlSupportDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A9698
ProtectUefiImageCommon - 0x754A9340
- 0x000000007547E000 - 0x0000000000003F80
Install Acpi Table at 0x766B8000, length 0x32F58
Install Smbios Table at 0x769E8000, length 0x1000
Loading driver F9D88642-0737-49BC-81B5-6889CD57D9EA
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8840
Loading driver at 0x00075462000 EntryPoint=0x00075462334 SmbiosDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8018
ProtectUefiImageCommon - 0x754A8840
- 0x0000000075462000 - 0x0000000000005D80
InstallProtocolInterface: 03583FF6-CB36-4940-947E-B9B39F4AFAF7 754679B0
Loading driver 9A5163E7-5C29-453F-825C-837A46A81E15
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A8340
Loading driver at 0x0007546A000 EntryPoint=0x0007546A374 SerialDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A8618
ProtectUefiImageCommon - 0x754A8340
- 0x000000007546A000 - 0x0000000000003EA0
InstallProtocolInterface: BB25CF6F-F1D4-11D2-9A0C-0090273FC1FD 7546DB20
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7546DB68
Loading driver AD61999A-507E-47E6-BA28-79CC609FA1A4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754A70C0
Loading driver at 0x00075456000 EntryPoint=0x00075456514 FspWrapperNotifyDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7A18
ProtectUefiImageCommon - 0x754A70C0
- 0x0000000075456000 - 0x0000000000005FA0
Loading driver C9602B47-9569-47C2-9D1E-FD1DF67A72E4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548F040
Loading driver at 0x0007545E000 EntryPoint=0x0007545E334 PowerButtonHandler.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 754A7598
ProtectUefiImageCommon - 0x7548F040
- 0x000000007545E000 - 0x00000000000039E0
Successfully registered power button periodic timer event!
Loading driver 55E76644-78A5-4A82-A900-7126A5798892
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7548FA40
Loading driver at 0x0007544A000 EntryPoint=0x0007544A344 HeciInitDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7548F398
ProtectUefiImageCommon - 0x7548FA40
- 0x000000007544A000 - 0x0000000000005DE0
InstallProtocolInterface: 3C7BC880-41F8-4869-AEFC-870A3ED28299 7548F5B8
Loading driver 6C2004EF-4E0E-4BE4-B14C-340EB4AA5891
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493040
Loading driver at 0x000759A5000 EntryPoint=0x000759A60B4 StatusCodeHandlerRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493D98
ProtectUefiImageCommon - 0x75493040
- 0x00000000759A5000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x00000000759A5000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x00000000759A6000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x00000000759A9000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040003 I0
Loading driver 6D33944A-EC75-4855-A54D-809C75241F6C
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75493440
Loading driver at 0x0007533F000 EntryPoint=0x0007533F3CC BdsDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75493718
ProtectUefiImageCommon - 0x75493440
- 0x000000007533F000 - 0x000000000001EE80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF6-46CC-11D4-9A38-0090273FC14D 7535B798
PROGRESS CODE: V03040003 I0
Loading driver 6CE6B0DE-781C-4F6C-B42D-98346C614BEC
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75492CC0
Loading driver at 0x00075444000 EntryPoint=0x00075444414 HpetTimerDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492B98
ProtectUefiImageCommon - 0x75492CC0
- 0x0000000075444000 - 0x00000000000055A0
PROGRESS CODE: V03040002 I0
Init HPET Timer Driver
HPET Base Address = 0xFED00000
HPET_GENERAL_CAPABILITIES_ID = 0x031ABA858086A701
HPET_GENERAL_CONFIGURATION = 0x0000000000000000
HPET_GENERAL_INTERRUPT_STATUS = 0x0000000000000000
HPET_MAIN_COUNTER = 0x00000000A4E2A135
HPET Main Counter Period = 52083333 (fs)
HPET_TIMER0_CONFIGURATION = 0x00F0000000008030
HPET_TIMER0_COMPARATOR = 0x0000000000000000
HPET_TIMER0_MSI_ROUTE = 0x0000000000000000
HPET_TIMER1_CONFIGURATION = 0x00F0000000008000
HPET_TIMER1_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER1_MSI_ROUTE = 0x0000000000000000
HPET_TIMER2_CONFIGURATION = 0x00F0080000008000
HPET_TIMER2_COMPARATOR = 0x0000000076C8FE20
HPET_TIMER2_MSI_ROUTE = 0x0000000000000000
HPET_TIMER3_CONFIGURATION = 0x00F0100000008000
HPET_TIMER3_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER3_MSI_ROUTE = 0x0000000000000000
HPET_TIMER4_CONFIGURATION = 0x000000000000C000
HPET_TIMER4_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER4_MSI_ROUTE = 0x0000000000000000
HPET_TIMER5_CONFIGURATION = 0x000000000000C000
HPET_TIMER5_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER5_MSI_ROUTE = 0x0000000000000000
HPET_TIMER6_CONFIGURATION = 0x000000000000C000
HPET_TIMER6_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER6_MSI_ROUTE = 0x0000000000000000
HPET_TIMER7_CONFIGURATION = 0x000000000000C000
HPET_TIMER7_COMPARATOR = 0x00000000FFFFFFFF
HPET_TIMER7_MSI_ROUTE = 0x0000000000000000
Choose 64-bit HPET timer.
HPET Interrupt Mode MSI
HPET Interrupt Vector = 0x40
HPET Counter Mask = 0xFFFFFFFFFFFFFFFF
HPET Timer Period = 100000
HPET Timer Count = 0x000000000002EE00
HPET_TIMER0_CONFIGURATION = 0x00F000000000C034
HPET_TIMER0_COMPARATOR = 0x00000000A4EB6B36
HPET_TIMER0_MSI_ROUTE = 0xFEE0000000000140
InstallProtocolInterface: 26BACCB3-6F42-11D4-BCE7-0080C73C8881 75449190
PROGRESS CODE: V03040003 I0
Loading driver 47579CF5-1E4F-4B41-99BB-A5C334846D3B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754923C0
Loading driver at 0x00075440000 EntryPoint=0x00075440334 SmmAccessDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75492218
ProtectUefiImageCommon - 0x754923C0
- 0x0000000075440000 - 0x0000000000003E60
PROGRESS CODE: V03040002 I0
SmmAccess: SmmBase = 0x7B000000, SmmSize = 0x800000
SmmAccess: Flags = 0x1, SmmCommSize=0x1000
InstallProtocolInterface: C2702B74-800C-4131-8746-8FB5B89CE4AC 75443BB0
PROGRESS CODE: V03040003 I0
Loading driver FDFF263D-5F68-4591-87BA-B768F445A9AF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x0007536B000 EntryPoint=0x0007536B3D4 Tcg2Dxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491A98
ProtectUefiImageCommon - 0x754910C0
- 0x000000007536B000 - 0x0000000000011940
PROGRESS CODE: V03040002 I0
InterfaceId - 0x00084311
InterfaceType - 0x01
InterfaceVersion - 0x01
CapFIFO - 0x0
CapCRB - 0x1
InterfaceCapability - 0x00000000
StatusEx - 0x00
PtpInterface - 2
VID - 0x8086
DID - 0xA13A
RID - 0x00
Check the tpm information from the bootloader.
Measure boot is not enabled in bootloader.
TPM is disabled in bootloader.
Error: Image at 0007536B000 start failed: Unsupported
PROGRESS CODE: V03040003 I0
Loading driver EBF342FE-B1D3-4EF8-957C-8048606FF671
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 754910C0
Loading driver at 0x00075323000 EntryPoint=0x00075323394 SetupBrowser.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75491D18
ProtectUefiImageCommon - 0x754910C0
- 0x0000000075323000 - 0x000000000001BDA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: B9D4C360-BCFB-4F9B-9298-53C136982258 7533D8D0
InstallProtocolInterface: A770C357-B693-4E6D-A6CF-D21C728E550B 7533D900
InstallProtocolInterface: 1F73B18D-4630-43C1-A1DE-6F80855D7DA4 7533D8E0
PROGRESS CODE: V03040003 I0
Loading driver 00160F8D-2B35-4DF2-BBE0-B272A8D631F0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490CC0
Loading driver at 0x0007543C000 EntryPoint=0x0007543C344 FirmwarePerformanceDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490B18
ProtectUefiImageCommon - 0x75490CC0
- 0x000000007543C000 - 0x0000000000003D40
PROGRESS CODE: V03040002 I0
Found Fpdt in Rsdt
PROGRESS CODE: V03040003 I0
Loading driver 128FB770-5E79-4176-9E51-9BB268A17DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75490340
Loading driver at 0x0007536E000 EntryPoint=0x0007536E3A4 PciHostBridgeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75490198
ProtectUefiImageCommon - 0x75490340
- 0x000000007536E000 - 0x000000000000E9A0
PROGRESS CODE: V03040002 I0
InitRootBridge: populated root bus 0, with room for 13 subordinate bus(es)
RootBridge: PciRoot(0x0)
Support/Attr: 7001F / 7001F
DmaAbove4G: No
NoExtConfSpace: No
AllocAttr: 0 ()
Bus: 0 - D Translation=0
Io: 2000 - 2FFF Translation=0
Mem: 80000000 - FE0FFFFF Translation=0
MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7547DE18
InstallProtocolInterface: 2F707EBB-4A1A-11D4-9A38-0090273FC14D 7547D270
PROGRESS CODE: V03040003 I0
Loading driver A487A478-51EF-48AA-8794-7BEE2A0562F1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547CD40
Loading driver at 0x00075361000 EntryPoint=0x00075361480 tftpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7547C618
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7536C3C0
ProtectUefiImageCommon - 0x7547CD40
- 0x0000000075361000 - 0x000000000000CEE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7536BA38
PROGRESS CODE: V03040003 I0
Loading driver 0253F9FA-129A-4A8D-B12E-7DC2B6376302
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7547C840
Loading driver at 0x000752FD000 EntryPoint=0x000752FD480 dpDynamicCommand.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D018
InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC 7530D2E0
ProtectUefiImageCommon - 0x7547C840
- 0x00000000752FD000 - 0x00000000000127A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 3C7200E9-005F-4EA4-87DE-A3DFAC8A27C3 7530C478
PROGRESS CODE: V03040003 I0
Loading driver F099D67F-71AE-4C36-B2A3-DCEB0EB2B7D8
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545D1C0
Loading driver at 0x00075434000 EntryPoint=0x00075434374 WatchdogTimer.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545D998
ProtectUefiImageCommon - 0x7545D1C0
- 0x0000000075434000 - 0x0000000000003920
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 665E3FF5-46CC-11D4-9A38-0090273FC14D 75437670
PROGRESS CODE: V03040003 I0
Loading driver 2FA2A6DA-11D5-4DC3-999A-749648B03C56
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545CB40
Loading driver at 0x00075999000 EntryPoint=0x0007599A118 PiSmmIpl.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C098
ProtectUefiImageCommon - 0x7545CB40
- 0x0000000075999000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x0000000075999000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007599A000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007599F000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
SmmAccess: SMRAM Map Buffer too small
SmmAccess: Open SMRAM Region
SMM IPL opened SMRAM window
SMM IPL found SMRAM window 7B001000 - 7B7FFFFF
SMM IPL failed to set SMRAM window to EFI_MEMORY_WB
SMRAM attributes: 0000000000000001
SMM IPL loading SMM Core at SMRAM address 7B7EA000
SMM IPL calling SMM Core at SMRAM address 7B7EB138
PiSmmCoreImageBase - 0x000000007B7EA000
PiSmmCoreImageSize - 0x0000000000015000
SmmAddMemoryRegion
MemBase - 0x7B001000
MemLength - 0x7E9000
Type - 0x7
Attributes - 0xA
SmmAddMemoryRegion
MemBase - 0x7B000000
MemLength - 0x1000
Type - 0x6
Attributes - 0x1A
SmmAddMemoryRegion
MemBase - 0x7B7EA000
MemLength - 0x16000
Type - 0x6
Attributes - 0x1A
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7545C298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E82C0
InstallProtocolInterface: F4CCBFB7-F6E0-47FD-9DD4-10A8F150C191 759A1420
InstallProtocolInterface: C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332 759A11F8
InstallProtocolInterface: 378DAEDC-F06B-4446-8314-40AB933C87A3 759A1200
PROGRESS CODE: V03040003 I0
Loading driver E660EA85-058E-4B55-A54B-F02F83A24707
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75451040
Loading driver at 0x000752CF000 EntryPoint=0x000752CF3D8 DisplayEngine.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7545C818
ProtectUefiImageCommon - 0x75451040
- 0x00000000752CF000 - 0x00000000000168C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 9BBE29E9-FDA1-41EC-AD52-452213742D2E 752E41B8
InstallProtocolInterface: 4311EDC0-6054-46D4-9E40-893EA952FCCC 752E41D0
PROGRESS CODE: V03040003 I0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360B18
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7CC0
Loading SMM driver at 0x0007B7D9000 EntryPoint=0x0007B7DA234 CpuIo2Smm.efi
SmmAccess: SMRAM Map Buffer too small
SmmInstallProtocolInterface: 3242A9D8-CE70-4AA0-955D-5E7B140DE4D2 7B7DF0B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360C98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7AC0
Loading SMM driver at 0x0007B7BC000 EntryPoint=0x0007B7BE124 PiSmmCpuDxeSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMRR Base: 0x7B000000, SMRR Size: 0x800000
PcdCpuSmmCodeAccessCheckEnable = 1
mAddressEncMask = 0x0
PcdControlFlowEnforcementPropertyMask = 0
SMRAM TileSize = 0x00002000 (0x00001000, 0x00001000)
SMRAM SaveState Buffer (0x7B7A6000, 0x00016000)
CPU[000] APIC ID=0000 SMBASE=7B79E000 SaveState=7B7ADC00 Size=00000400
CPU[001] APIC ID=0001 SMBASE=7B7A0000 SaveState=7B7AFC00 Size=00000400
CPU[002] APIC ID=0002 SMBASE=7B7A2000 SaveState=7B7B1C00 Size=00000400
CPU[003] APIC ID=0003 SMBASE=7B7A4000 SaveState=7B7B3C00 Size=00000400
CPU[004] APIC ID=0004 SMBASE=7B7A6000 SaveState=7B7B5C00 Size=00000400
CPU[005] APIC ID=0005 SMBASE=7B7A8000 SaveState=7B7B7C00 Size=00000400
CPU[006] APIC ID=0006 SMBASE=7B7AA000 SaveState=7B7B9C00 Size=00000400
CPU[007] APIC ID=0007 SMBASE=7B7AC000 SaveState=7B7BBC00 Size=00000400
Stacks - 0x7B776000
mSmmStackSize - 0x6000
PcdCpuSmmStackGuard - 0x1
mXdSupported - 0x1
One Semaphore Size = 0x40
Total Semaphores Size = 0x940
PhysicalAddressBits = 39, 5LPageTable = 0.
5LevelPaging Needed - 0
1GPageTable Support - 1
PcdCpuSmmRestrictedMemoryAccess - 1
PhysicalAddressBits - 39
InstallProtocolInterface: 26EEB3DE-B689-492E-80F0-BE8BD7DA4BA7 7B7D3380
SMM IPL registered SMM Entry Point address 7B7EBD44
SmmInstallProtocolInterface: EB346B97-975F-4A9F-8B22-F8E92BB3D569 7B7D33B0
SmmInstallProtocolInterface: 69B792EA-39CE-402D-A2A6-F721DE351DFE 7B7D32A8
CpuSmm: SpinLock Size = 0x40, PcdCpuSmmMpTokenCountPerChunk = 0x40
SmmInstallProtocolInterface: 5D5450D7-990C-4180-A803-8E63F0608307 7B7D3450
SmmInstallProtocolInterface: 1D202CAB-C8AB-4D5C-94F7-3CFCC0D3D335 7B7D3420
SMM CPU Module exit from SMRAM with EFI_SUCCESS
SmmAccess: Prepare to close the SMRAM
SmmAccess:Close SMRAM Region, success!
SMM IPL closed SMRAM window
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360898
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E74C0
Loading SMM driver at 0x0007B759000 EntryPoint=0x0007B75A2C4 FvbSmm.efi
SmmAccess: SMRAM Map Buffer too small
SpiInstance = 7B76A998
PchSpiBase at 0xC00FD000
variable address is set to 0xFF610000
--FileSystemGuid not match: FFFFFFFF-FFFF-FFFF-FFFF-FFFFFFFFFFFF
Fvb: FV header @ 0xFF610000 invalid
FvLength: 0x40000
HeaderLength: 0x48
Header Checksum: 0xF8F7
FvBlockMap[0].NumBlocks: 0x40
FvBlockMap[0].BlockLength: 0x1000
FwBlockService.c: Writing back healthy FV header
Verified boot is not enabled in bootloader.
ImageData=0x75209060, ImageSize=0x3FB8
SmmInstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
SmmInstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 7B76A818
InstallProtocolInterface: D326D041-BD31-4C01-B5A8-628BE87F0653 7B76A8B0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75360298
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E70C0
Loading SMM driver at 0x0007B6BF000 EntryPoint=0x0007B6C031C VariableSmm.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD308 Success
VarCheckLibRegisterEndOfDxeCallback - 0x7B6CEDB8 Success
VarCheckLibRegisterAddressPointer - 0x7B74D920 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CD93C Success
[VarCheckPcd] No VarCheckPcdBin found at the first RAW section
VarCheckLibRegisterAddressPointer - 0x7B74D940 Success
VarCheckLibRegisterSetVariableCheckHandler - 0x7B6CF7E0 Success
Variable driver common space: 0x1DF9C 0x1DF9C 0x1DF9C
Variable driver will work with auth variable format!
SmmInstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 7B74C318
SmmInstallProtocolInterface: B0D8F3C1-B7DE-4C11-BC89-2FB562C8C411 7B74C300
InstallProtocolInterface: ED32D533-99E6-4209-9CC0-2D72CDD998A7 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535FC98
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E7EC0
Loading SMM driver at 0x0007B661000 EntryPoint=0x0007B662234 BlSmmSupport.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
SMMBASE_INFO = 7B000000
CPU0 ID:00 Base: 7B79E000
CPU1 ID:01 Base: 7B7A0000
CPU2 ID:02 Base: 7B7A2000
CPU3 ID:03 Base: 7B7A4000
CPU4 ID:04 Base: 7B7A6000
CPU5 ID:05 Base: 7B7A8000
CPU6 ID:06 Base: 7B7AA000
CPU7 ID:07 Base: 7B7AC000
SmmInstallProtocolInterface: 18A3C6DC-5EEA-48C8-A1C1-B53389F98999 7B6670E0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F818
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E72C0
Loading SMM driver at 0x0007B652000 EntryPoint=0x0007B6532A0 SmmFaultTolerantWriteDxe.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
mSmmMemLibInternalMaximumSupportAddress = 0x7FFFFFFFFF
Ftw: FtwWorkSpaceLba - 0x1E, WorkBlockSize - 0x1000, FtwWorkSpaceBase - 0x0
Ftw: FtwSpareLba - 0x20, SpareBlockSize - 0x1000
Ftw: NumberOfWorkBlock - 0x2, FtwWorkBlockLba - 0x1E
Ftw: WorkSpaceLbaInSpare - 0x0, WorkSpaceBaseInSpare - 0x0
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Remaining work space size - 1FE0
Ftw: Work block header check mismatch
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64F108
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B650108
Ftw: Work block header check mismatch
Ftw: Both working and spare blocks are invalid, init workspace
Ftw: start to reclaim work space
FvbProtocolRead: Lba: 0x1E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64B018
FvbProtocolRead: Lba: 0x1F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B64C018
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62A018
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62B018
FvbProtocolRead: Lba: 0x22 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62C018
FvbProtocolRead: Lba: 0x23 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62D018
FvbProtocolRead: Lba: 0x24 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62E018
FvbProtocolRead: Lba: 0x25 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B62F018
FvbProtocolRead: Lba: 0x26 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B630018
FvbProtocolRead: Lba: 0x27 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B631018
FvbProtocolRead: Lba: 0x28 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B632018
FvbProtocolRead: Lba: 0x29 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B633018
FvbProtocolRead: Lba: 0x2A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B634018
FvbProtocolRead: Lba: 0x2B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B635018
FvbProtocolRead: Lba: 0x2C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B636018
FvbProtocolRead: Lba: 0x2D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B637018
FvbProtocolRead: Lba: 0x2E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B638018
FvbProtocolRead: Lba: 0x2F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B639018
FvbProtocolRead: Lba: 0x30 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63A018
FvbProtocolRead: Lba: 0x31 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63B018
FvbProtocolRead: Lba: 0x32 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63C018
FvbProtocolRead: Lba: 0x33 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63D018
FvbProtocolRead: Lba: 0x34 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63E018
FvbProtocolRead: Lba: 0x35 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B63F018
FvbProtocolRead: Lba: 0x36 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B640018
FvbProtocolRead: Lba: 0x37 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B641018
FvbProtocolRead: Lba: 0x38 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B642018
FvbProtocolRead: Lba: 0x39 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B643018
FvbProtocolRead: Lba: 0x3A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B644018
FvbProtocolRead: Lba: 0x3B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B645018
FvbProtocolRead: Lba: 0x3C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B646018
FvbProtocolRead: Lba: 0x3D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B647018
FvbProtocolRead: Lba: 0x3E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B648018
FvbProtocolRead: Lba: 0x3F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B649018
FvbProtocolEraseBlocks:
FvbProtocolRead: Lba: 0x20 Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B7E0
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B7E0
FvbProtocolRead: Lba: 0x20 Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolRead: Lba: 0x20 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B609018
FvbProtocolRead: Lba: 0x21 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60A018
FvbProtocolRead: Lba: 0x22 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60B018
FvbProtocolRead: Lba: 0x23 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60C018
FvbProtocolRead: Lba: 0x24 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60D018
FvbProtocolRead: Lba: 0x25 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60E018
FvbProtocolRead: Lba: 0x26 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B60F018
FvbProtocolRead: Lba: 0x27 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B610018
FvbProtocolRead: Lba: 0x28 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B611018
FvbProtocolRead: Lba: 0x29 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B612018
FvbProtocolRead: Lba: 0x2A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B613018
FvbProtocolRead: Lba: 0x2B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B614018
FvbProtocolRead: Lba: 0x2C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B615018
FvbProtocolRead: Lba: 0x2D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B616018
FvbProtocolRead: Lba: 0x2E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B617018
FvbProtocolRead: Lba: 0x2F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B618018
FvbProtocolRead: Lba: 0x30 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B619018
FvbProtocolRead: Lba: 0x31 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61A018
FvbProtocolRead: Lba: 0x32 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61B018
FvbProtocolRead: Lba: 0x33 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61C018
FvbProtocolRead: Lba: 0x34 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61D018
FvbProtocolRead: Lba: 0x35 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61E018
FvbProtocolRead: Lba: 0x36 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B61F018
FvbProtocolRead: Lba: 0x37 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B620018
FvbProtocolRead: Lba: 0x38 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B621018
FvbProtocolRead: Lba: 0x39 Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B622018
FvbProtocolRead: Lba: 0x3A Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B623018
FvbProtocolRead: Lba: 0x3B Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B624018
FvbProtocolRead: Lba: 0x3C Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B625018
FvbProtocolRead: Lba: 0x3D Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B626018
FvbProtocolRead: Lba: 0x3E Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B627018
FvbProtocolRead: Lba: 0x3F Offset: 0x0 NumBytes: 0x1000, Buffer: 0x7B628018
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolEraseBlocks:
FvbProtocolRead: Lba: 0x1E Offset: 0x14 NumBytes: 0x1, Buffer: 0x7B77B790
FvbProtocolEraseBlocks:
Ftw: reclaim work space successfully
SmmInstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 7B64F028
Variable PK exists.
Variable SetupMode is 0
Variable SecureBoot is 0
Variable SecureBootEnable is 0
Variable CustomMode is 0
Variable VendorKeys is 1
Variable driver will work with auth variable support!
InstallProtocolInterface: 93BA1826-DFFB-45DD-82A7-E7DCAA3BBDF3 0
InstallProtocolInterface: 3868FC3B-7E45-43A7-906C-4BA47DE1754D 0
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535F218
SmmInstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7B7E76C0
Loading SMM driver at 0x0007B634000 EntryPoint=0x0007B635234 BlSwSmiHandler.efi
SmmAccess: SMRAM Map Buffer too small
SmmAccess: SMRAM Map Buffer too small
RegType = 0x1
RegWidth = 0x4
SmiGblPos = 0x0
SmiApmPos = 0x5
SmiEosPos = 0x1
Address = 0x1830
Loading driver 9F7DCADE-11EA-448A-A46F-76E003657DD1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 7535EB40
Loading driver at 0x0007598D000 EntryPoint=0x0007598E0D4 VariableSmmRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 7535E098
ProtectUefiImageCommon - 0x7535EB40
- 0x000000007598D000 - 0x000000000000C000
SetUefiImageMemoryAttributes - 0x000000007598D000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007598E000 - 0x0000000000005000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075993000 - 0x0000000000006000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
Variable driver runtime cache is enabled.
InstallProtocolInterface: 1E5668E2-8481-11D4-BCF1-0080C73C8881 0
InstallProtocolInterface: CD3D0A05-9E24-437C-A891-1EE053DB7638 759952D0
InstallProtocolInterface: AF23B340-97B4-4685-8D4F-A3F28169B21D 759952A0
InstallProtocolInterface: 6441F818-6362-4E44-B570-7DBA31DD2453 0
PROGRESS CODE: V03040003 I0
Loading driver 42857F0A-13F2-4B21-8A23-53D3F714B840
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310CC0
Loading driver at 0x00075984000 EntryPoint=0x00075985114 CapsuleRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75310A98
ProtectUefiImageCommon - 0x75310CC0
- 0x0000000075984000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x0000000075984000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075985000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075988000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 5053697E-2CBC-4819-90D9-0580DEEE5754 0
PROGRESS CODE: V03040003 I0
Loading driver AD608272-D07F-4964-801E-7BD3B7888652
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75310340
Loading driver at 0x0007597B000 EntryPoint=0x0007597C0B4 MonotonicCounterRuntimeDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9F18
ProtectUefiImageCommon - 0x75310340
- 0x000000007597B000 - 0x0000000000009000
SetUefiImageMemoryAttributes - 0x000000007597B000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000000007597C000 - 0x0000000000003000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x000000007597F000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1DA97072-BDDC-4B30-99F1-72A0B56FFF2A 0
PROGRESS CODE: V03040003 I0
Loading driver 378D7B65-8DA9-4773-B6E4-A47826A833E1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E91C0
Loading driver at 0x00075971000 EntryPoint=0x000759720C4 PcRtc.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E9418
ProtectUefiImageCommon - 0x752E91C0
- 0x0000000075971000 - 0x000000000000A000
SetUefiImageMemoryAttributes - 0x0000000075971000 - 0x0000000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x0000000075972000 - 0x0000000000004000 (0x0000000000020008)
SetUefiImageMemoryAttributes - 0x0000000075976000 - 0x0000000000005000 (0x0000000000004008)
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 27CFAC87-46CC-11D4-9A38-0090273FC14D 0
PROGRESS CODE: V03040003 I0
Loading driver F0E6A44F-7195-41C3-AC64-54F202CD0A21
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752E8140
Loading driver at 0x00074D0B000 EntryPoint=0x00074D0B4FC SecureBootConfigDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 752E8D98
ProtectUefiImageCommon - 0x752E8140
- 0x0000000074D0B000 - 0x0000000000076EE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 752E8998
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 74D7A388
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D79928
InstallProtocolInterface: 330D4706-F2A0-4E4F-A369-B66FA8D54385 752E6FA0
InstallProtocolInterface: F0E6A44F-7195-41C3-AC64-54F202CD0A21 752E6F98
PROGRESS CODE: V03040003 I0
Loading driver 93B80004-9FB3-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752082C0
Loading driver at 0x00074DCD000 EntryPoint=0x00074DCD394 PciBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75208C98
ProtectUefiImageCommon - 0x752082C0
- 0x0000000074DCD000 - 0x00000000000154A0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DE0FF8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DE1040
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DE1058
InstallProtocolInterface: 19CB87AB-2CB9-4665-8360-DDCF6054F79D 74DE1028
PROGRESS CODE: V03040003 I0
Loading driver 51CCF399-4FDF-4E55-A45B-E123F84D456A
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75207B40
Loading driver at 0x00074DEB000 EntryPoint=0x00074DEB394 ConPlatformDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75207E98
ProtectUefiImageCommon - 0x75207B40
- 0x0000000074DEB000 - 0x0000000000006960
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DF13E0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DF1428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DF1410
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DF13B0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DF1428
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DF1410
PROGRESS CODE: V03040003 I0
Loading driver 408EDCEC-CF6D-477C-A5A8-B4844E3DE281
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 75207240
Loading driver at 0x00074DB9000 EntryPoint=0x00074DB9374 ConSplitterDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75207518
ProtectUefiImageCommon - 0x75207240
- 0x0000000074DB9000 - 0x0000000000009C00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1E28
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21E8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2158
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1FD0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21B8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2170
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1FA0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC2128
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2188
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1C70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21A0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2140
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DC1E58
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DC21D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DC2110
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74DC1CB0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74DC1CE0
InstallProtocolInterface: 31878C87-0B75-11D5-9A4F-0090273FC14D 74DC1D50
InstallProtocolInterface: 8D59D32B-C655-4AE9-9B15-F25904992A43 74DC1DA8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DC1EA0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74DC2010
PROGRESS CODE: V03040003 I0
Loading driver CCCB0C28-4B24-11D5-9A5A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 752012C0
Loading driver at 0x00074DC5000 EntryPoint=0x00074DC5394 GraphicsConsoleDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 75201C98
ProtectUefiImageCommon - 0x752012C0
- 0x0000000074DC5000 - 0x0000000000007D40
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DCB180
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DCC7A8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DCC790
PROGRESS CODE: V03040003 I0
Loading driver 9E863906-A40F-4875-977F-5B93FF237FC6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF8B40
Loading driver at 0x00074DA3000 EntryPoint=0x00074DA3394 TerminalDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8E98
ProtectUefiImageCommon - 0x74DF8B40
- 0x0000000074DA3000 - 0x000000000000A540
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DACB38
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DACCC8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DACCB0
PROGRESS CODE: V03040003 I0
Loading driver 6B38F7B4-AD98-40E9-9093-ACA2B5A253C4
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF81C0
Loading driver at 0x00074DB2000 EntryPoint=0x00074DB2374 DiskIoDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF8498
ProtectUefiImageCommon - 0x74DF81C0
- 0x0000000074DB2000 - 0x0000000000006800
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DB81A8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DB8268
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DB8280
PROGRESS CODE: V03040003 I0
Loading driver 1FA1F39E-FEFF-4AAE-BD7B-38A070A3B609
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF7CC0
Loading driver at 0x00074D91000 EntryPoint=0x00074D91394 PartitionDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7B18
ProtectUefiImageCommon - 0x74DF7CC0
- 0x0000000074D91000 - 0x0000000000008A60
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D992C0
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D99320
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D99308
PROGRESS CODE: V03040003 I0
Loading driver CD3BAFB6-50FB-4FE8-8E4E-AB74D2C1A600
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF72C0
Loading driver at 0x00074DE3000 EntryPoint=0x00074DE3374 EnglishDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF7A18
ProtectUefiImageCommon - 0x74DF72C0
- 0x0000000074DE3000 - 0x0000000000003E00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 1D85CD7F-F43D-11D2-9A0C-0090273FC14D 74DE67B8
InstallProtocolInterface: A4C751FC-23AE-4C3E-92E9-4964CF63F349 74DE67F0
PROGRESS CODE: V03040003 I0
Loading driver 820C59BB-274C-43B2-83EA-DAC673035A59
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF68C0
Loading driver at 0x00074D8B000 EntryPoint=0x00074D8B374 SataController.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF6B98
ProtectUefiImageCommon - 0x74DF68C0
- 0x0000000074D8B000 - 0x0000000000005120
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D8FC88
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D8FCB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D8FCD0
PROGRESS CODE: V03040003 I0
Loading driver 19DF145A-B1D4-453F-8507-38816676D7F6
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF6440
Loading driver at 0x00074D82000 EntryPoint=0x00074D82384 AtaBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF5F98
ProtectUefiImageCommon - 0x74DF6440
- 0x0000000074D82000 - 0x0000000000008460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D89B20
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D89D48
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D89D30
PROGRESS CODE: V03040003 I0
Loading driver 5E523CB4-D397-4986-87BD-A6DD8B22F455
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF5140
Loading driver at 0x00074CEF000 EntryPoint=0x00074CEF3A4 AtaAtapiPassThruDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF5398
ProtectUefiImageCommon - 0x74DF5140
- 0x0000000074CEF000 - 0x000000000000D2E0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CFB6F8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CFB728
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CFB740
PROGRESS CODE: V03040003 I0
Loading driver 0167CCC4-D0F7-4F21-A3EF-9E64B7CDCE8B
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF5540
Loading driver at 0x00074D05000 EntryPoint=0x00074D05374 ScsiBus.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2B18
ProtectUefiImageCommon - 0x74DF5540
- 0x0000000074D05000 - 0x0000000000005BA0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74D0A660
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74D0A690
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74D0A6A8
PROGRESS CODE: V03040003 I0
Loading driver 0A66E322-3740-4CCE-AD62-BD172CECCA35
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DF27C0
Loading driver at 0x00074CD3000 EntryPoint=0x00074CD3374 ScsiDisk.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DF2D18
ProtectUefiImageCommon - 0x74DF27C0
- 0x0000000074CD3000 - 0x000000000000D520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CDFB60
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CDFBD8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CDFBC0
PROGRESS CODE: V03040003 I0
Loading driver 961578FE-B6B7-44C3-AF35-6BC705CD2B1F
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEA040
Loading driver at 0x00074CC5000 EntryPoint=0x00074CC539C Fat.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEAD18
ProtectUefiImageCommon - 0x74DEA040
- 0x0000000074CC5000 - 0x000000000000D0C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CD1300
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CD1348
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CD1330
PROGRESS CODE: V03040003 I0
Loading driver 8E325979-3FE1-4927-AAE2-8F5C4BD2AF0D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DEA9C0
Loading driver at 0x00074CB7000 EntryPoint=0x00074CB7374 SdMmcPciHcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEA898
ProtectUefiImageCommon - 0x74DEA9C0
- 0x0000000074CB7000 - 0x000000000000D460
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CC3750
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CC3998
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CC39B0
PROGRESS CODE: V03040003 I0
Loading driver 2145F72F-E6F1-4440-A828-59DC9AAB5F89
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE9040
Loading driver at 0x00074CAC000 EntryPoint=0x00074CAC374 EmmcDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DEA598
ProtectUefiImageCommon - 0x74DE9040
- 0x0000000074CAC000 - 0x000000000000A900
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CB5F70
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CB60D0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CB60B8
PROGRESS CODE: V03040003 I0
Loading driver 430AC2F7-EEC6-4093-94F7-9F825A7C1C40
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE9440
Loading driver at 0x00074CE6000 EntryPoint=0x00074CE6374 SdDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE9698
ProtectUefiImageCommon - 0x74DE9440
- 0x0000000074CE6000 - 0x00000000000084C0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CEDC00
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CEDDB8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CEDDA0
PROGRESS CODE: V03040003 I0
Loading driver 5BE3BDF4-53CF-46A3-A6A9-73C34A6E5EE3
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE8B40
Loading driver at 0x00074C92000 EntryPoint=0x00074C924C8 NvmExpressDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE9898
ProtectUefiImageCommon - 0x74DE8B40
- 0x0000000074C92000 - 0x000000000000CA60
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C9E028
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C9E0B8
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C9E0A0
InstallProtocolInterface: 5C198761-16A8-4E69-972C-89D67954F81D 74C9E068
PROGRESS CODE: V03040003 I0
Loading driver 2FB92EFA-2EE0-4BAE-9EB6-7464125E1EF7
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE8240
Loading driver at 0x00074D9A000 EntryPoint=0x00074D9A374 UhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE8598
ProtectUefiImageCommon - 0x74DE8240
- 0x0000000074D9A000 - 0x0000000000008FE0
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74DA27E8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74DA2830
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74DA2818
PROGRESS CODE: V03040003 I0
Loading driver BDFE430E-8F2A-4DB0-9991-6F856594777E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE7CC0
Loading driver at 0x00074C87000 EntryPoint=0x00074C87374 EhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE7918
ProtectUefiImageCommon - 0x74DE7CC0
- 0x0000000074C87000 - 0x000000000000AC00
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C91388
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C91408
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C913F0
PROGRESS CODE: V03040003 I0
Loading driver B7F50E91-A759-412C-ADE4-DCD03E7F7C28
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DE7340
Loading driver at 0x00074C67000 EntryPoint=0x00074C67374 XhciDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DE7B18
ProtectUefiImageCommon - 0x74DE7340
- 0x0000000074C67000 - 0x000000000000F520
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C759D8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C75B38
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C75B20
PROGRESS CODE: V03040003 I0
Loading driver 240612B7-A063-11D4-9A3A-0090273FC14D
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC4140
Loading driver at 0x00074C7B000 EntryPoint=0x00074C7B394 UsbBusDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC4B18
ProtectUefiImageCommon - 0x74DC4140
- 0x0000000074C7B000 - 0x000000000000BD20
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C86268
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C862B0
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C86298
PROGRESS CODE: V03040003 I0
Loading driver 2D2E62CF-9ECF-43B7-8219-94E7FC713DFE
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC4540
Loading driver at 0x00074C5E000 EntryPoint=0x00074C5E394 UsbKbDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC3018
ProtectUefiImageCommon - 0x74DC4540
- 0x0000000074C5E000 - 0x0000000000008220
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C65450
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C65B80
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C65B68
PROGRESS CODE: V03040003 I0
Loading driver 9FB4B4A7-42C0-4BCD-8540-9BCC6711F83E
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC3140
Loading driver at 0x00074C55000 EntryPoint=0x00074C55374 UsbMassStorageDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DC3B18
ProtectUefiImageCommon - 0x74DC3140
- 0x0000000074C55000 - 0x0000000000008080
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74C5C828
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74C5C900
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74C5C8E8
PROGRESS CODE: V03040003 I0
Loading driver 0B04B2ED-861C-42CD-A22F-C3AAFACCB896
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 74DC3540
Loading driver at 0x00074CA5000 EntryPoint=0x00074CA5394 GraphicsOutputDxe.efi
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 74DB1F98
ProtectUefiImageCommon - 0x74DC3540
- 0x0000000074CA5000 - 0x0000000000006B80
PROGRESS CODE: V03040002 I0
InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 74CAB5C8
InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 74CAB608
InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 74CAB620
PROGRESS CODE: V03040003 I0
Driver 4D9CBEF0-15A0-4D0C-83DB-5213E710C23F was discovered but not loaded!!
Driver 5CAB08D5-AD8F-4D8B-B828-D17A8D9FE977 was discovered but not loaded!!
PROGRESS CODE: V03041001 I0
[Bds] Entry...
[BdsDxe] Locate Variable Lock protocol - Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformLangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:LangCodes Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOptionSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:HwErrRecSupport Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:OsIndicationsSupported Success
Variable Driver Auto Update Lang, Lang:eng, PlatformLang:en Status: Success
[Variable] Lock: 8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformRecovery0000 Success
PROGRESS CODE: V03051005 I0
PciBus: Discovered PCI @ [00|00|00]
PciBus: Discovered PCI @ [00|02|00]
SR-IOV: SupportedPageSize = 0x553; SystemPageSize = 0x1; FirstVFOffset = 0x1;
InitialVFs = 0x7; ReservedBusNum = 0x1; CapOffset = 0x320
BAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[1]: Type = PMem64; Alignment = 0xFFFFFFF; Length = 0x10000000; Offset = 0x18
BAR[2]: Type = Io16; Alignment = 0x3F; Length = 0x40; Offset = 0x20
VFBAR[0]: Type = Mem64; Alignment = 0xFFFFFF; Length = 0x7000000; Offset = 0x344
VFBAR[1]: Type = PMem64; Alignment = 0x1FFFFFFF; Length = 0xE0000000; Offset = 0x34C
PciBus: Discovered PPB @ [00|06|00]
PciBus: Discovered PCI @ [01|00|00]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
PciBus: Discovered PCI @ [00|08|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|0A|00]
BAR[0]: Type = Mem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|0D|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|10|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|10|05]
PciBus: Discovered PCI @ [00|14|00]
BAR[0]: Type = Mem64; Alignment = 0xFFFF; Length = 0x10000; Offset = 0x10
PciBus: Discovered PCI @ [00|14|01]
BAR[0]: Type = Mem64; Alignment = 0x1FFFFF; Length = 0x200000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|14|02]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|15|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|15|01]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|16|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|17|00]
BAR[0]: Type = Mem32; Alignment = 0x1FFF; Length = 0x2000; Offset = 0x10
BAR[1]: Type = Mem32; Alignment = 0xFFF; Length = 0x100; Offset = 0x14
BAR[2]: Type = Io16; Alignment = 0x7; Length = 0x8; Offset = 0x18
BAR[3]: Type = Io16; Alignment = 0x3; Length = 0x4; Offset = 0x1C
BAR[4]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
BAR[5]: Type = Mem32; Alignment = 0xFFF; Length = 0x800; Offset = 0x24
PciBus: Discovered PPB @ [00|1C|00]
PciBus: Discovered PCI @ [02|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|03]
PciBus: Discovered PCI @ [03|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1C|04]
PciBus: Discovered PPB @ [04|00|00]
PciBus: Discovered PPB @ [05|00|00]
PciBus: Discovered PPB @ [05|01|00]
PciBus: Discovered PPB @ [05|02|00]
PciBus: Discovered PPB @ [05|03|00]
PciBus: Discovered PPB @ [05|04|00]
PciBus: Discovered PCI @ [0A|00|00]
ARI: forwarding enabled for PPB[05:04:00]
ARI: CapOffset = 0x150
BAR[0]: Type = PMem64; Alignment = 0xFFFFFF; Length = 0x1000000; Offset = 0x10
BAR[2]: Type = PMem64; Alignment = 0x7FFF; Length = 0x8000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|00]
PciBus: Discovered PCI @ [0B|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|01]
PciBus: Discovered PCI @ [0C|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PPB @ [00|1D|03]
PciBus: Discovered PCI @ [0D|00|00]
BAR[0]: Type = Mem32; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x10
BAR[3]: Type = Mem32; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x1C
PciBus: Discovered PCI @ [00|1E|00]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
BAR[1]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x18
PciBus: Discovered PCI @ [00|1E|03]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
PciBus: Discovered PCI @ [00|1F|00]
PciBus: Discovered PCI @ [00|1F|03]
BAR[0]: Type = Mem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x10
BAR[3]: Type = Mem64; Alignment = 0xFFFFF; Length = 0x100000; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|04]
BAR[0]: Type = Mem64; Alignment = 0xFFF; Length = 0x100; Offset = 0x10
BAR[3]: Type = Io16; Alignment = 0x1F; Length = 0x20; Offset = 0x20
PciBus: Discovered PCI @ [00|1F|05]
BAR[0]: Type = Mem32; Alignment = 0xFFF; Length = 0x1000; Offset = 0x10
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DB0F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DB0428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DB0F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DB0828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAFF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAF828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74DAEF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74DAE828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D04F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D04828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D03F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D03828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D02F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D02828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D01F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D01828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74D00F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74D00828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFFF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFF828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFEF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFE828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDE98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDF18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CFDF98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CFD828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE5F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE5828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE4F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE4828
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3E98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3028
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3F18
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3428
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74CE3F98
InstallProtocolInterface: 4CF5B200-68B8-4CA5-9EEC-B23E3F50029A 74CE3828
Found PCI VGA device
Found LPC Bridge device
[EnumUsbKeyboard] USB keyboard path exists
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x5000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74C03000
XhcInitSched: Created CMD ring [74C03240~74C04240) EVENT ring [74C04240~74C06240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74C13038
XhcDriverBindingStart: XHCI started for controller @ 74CFFD18
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74BE4020
XhcGetCapability: 5 ports, 64 bit 1
UsbRootHubInit: root hub 74BE4C98 - max speed 3, 5 ports
UsbBusStart: usb bus started on 74CFFD18, root hub 74BE4C98
XhcCreateUsb3Hc: Capability length 0x80
XhcCreateUsb3Hc: HcSParams1 0x10000840
XhcCreateUsb3Hc: HcSParams2 0x14200054
XhcCreateUsb3Hc: HcCParams 0x20007FC1
XhcCreateUsb3Hc: DBOff 0x3000
XhcCreateUsb3Hc: RTSOff 0x2000
XhcCreateUsb3Hc: UsbLegSupOffset 0x46C
XhcCreateUsb3Hc: DebugCapSupOffset 0x700
XhcSetBiosOwnership: called to set BIOS ownership
XhcResetHC!
XhcInitSched:DCBAA=0x74BBF000
XhcInitSched: Created CMD ring [74BBF240~74BC0240) EVENT ring [74BC0240~74BC2240)
InstallProtocolInterface: 3E745226-9818-45B6-A2AC-D7CD0E8BA2BC 74BCF038
XhcDriverBindingStart: XHCI started for controller @ 74D03C98
InstallProtocolInterface: 240612B7-A063-11D4-9A3A-0090273FC14D 74B9A020
XhcGetCapability: 16 ports, 64 bit 1
UsbRootHubInit: root hub 74B9AC98 - max speed 3, 16 ports
XhcClearRootHubPortFeature: status Success
UsbEnumeratePort: port 0 state - 01, change - 01 on 74B9AC98
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 0
XhcUsbPortReset!
XhcSetRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
XhcClearRootHubPortFeature: status Success
Enable Slot Successfully, The Slot ID = 0x1
Address 1 assigned successfully
UsbEnumerateNewDev: hub port 0 is reset
UsbEnumerateNewDev: device is of 2 speed
UsbEnumerateNewDev: device uses translator (0, 0)
UsbEnumerateNewDev: device is now ADDRESSED at 1
UsbEnumerateNewDev: max packet size for EP 0 is 64
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 25
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BC3AC0~74BC4AC0)
Configure Endpoint
UsbEnumerateNewDev: device 1 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 1
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B99D98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B99F40
UsbConnectDriver: found a hub device
Configure Hub Slot Context
UsbHubInit: hub 1 has 4 ports
UsbHubInit: hub 1 initialized
UsbBusStart: usb bus started on 74D03C98, root hub 74B9AC98
[Variable] Lock: AEB9C5C1-94F1-4D02-BFD9-4602DB2D3C54:Tcg2PhysicalPresenceFlags Success
[TPM2] Initial physical presence flags value is 0x700E2
[TPM2] Flags=700E2, PPRequest=0 (LastPPRequest=0UsbEnumeratePort: port 2 state - 201, change - 01 on 74B99F18
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 2
Enable Slot Successfully, The Slot ID = 0x2
Address 2 assigned successfully
UsbEnumerateNewDev: hub port 2 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 3)
UsbEnumerateNewDev: device is now ADDRESSED at 2
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 59
UsbParseConfigDesc: config 1 has 2 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
UsbParseInterfaceDesc: interface 1(setting 0) has 1 endpoints
XhcCheckUrbResult: STALL_ERROR! Completecode = 6
Recovery Halted Slot = 2,Dci = 1
XhcResetEndpoint: Slot = 0x2, Dci = 0x1
XhcSetTrDequeuePointer: Slot = 0x2, Dci = 0x1, Urb = 0x74B98918
XhcControlTransfer: error - Device Error, transfer - 2
UsbBuildDescTable: get language ID table Unsupported
Endpoint[81]: Created INT ring [74BC6300~74BC7300)
Endpoint[82]: Created INT ring [74BC7300~74BC8300)
Configure Endpoint
UsbEnumerateNewDev: device 2 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 2
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B96A98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B98940
UsbConnectDriver: TPL before connect is 8, 74B96B98
InstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74B98238
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74B98250
InstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
UsbConnectDriver: TPL after connect is 8
UsbSelectSetting: setting 0 selected for interface 1
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B92718
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B928C0
UsbEnumeratePort: port 3 state - 201, change - 01 on 74B99F18
UsbEnumeratePort: Device Connect/Disconnect Normally
UsbEnumeratePort: new device connected at port 3
Enable Slot Successfully, The Slot ID = 0x3
Address 3 assigned successfully
UsbEnumerateNewDev: hub port 3 is reset
UsbEnumerateNewDev: device is of 1 speed
UsbEnumerateNewDev: device uses translator (1, 4)
UsbEnumerateNewDev: device is now ADDRESSED at 3
UsbEnumerateNewDev: max packet size for EP 0 is 8
Evaluate context
UsbBuildDescTable: device has 1 configures
UsbGetOneConfig: total length is 34
UsbParseConfigDesc: config 1 has 1 interfaces
UsbParseInterfaceDesc: interface 0(setting 0) has 1 endpoints
Endpoint[81]: Created INT ring [74BC9B40~74BCAB40)
Configure Endpoint
UsbEnumerateNewDev: device 3 is now in CONFIGED state
UsbSelectConfig: config 1 selected for device 3
UsbSelectSetting: setting 0 selected for interface 0
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B91B98
InstallProtocolInterface: 2B2F68D6-0CD2-44CF-8E8B-BBA20B1B5B75 74B91AC0
)
[TPM2] PPResponse = 0 (LastPPRequest=0, Flags=700E2)
InstallReadyToLock entering......
SmmEndOfDxeHandler
SmmInstallProtocolInterface: 24E70042-D5C5-4260-8C39-0AD3AA32E93D 0
SMM MemoryProtectionAttribute - 0x0000000000000001
MemoryMapSize - 0xBD0
MemoryMap - 0x7B631018
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
[Variable]SMM_END_OF_DXE is signaled
[Variable] Lock: E20939BE-32D4-41BE-A150-897F85D49829:MemoryOverwriteRequestControl Success
[Variable] Lock: BB983CCF-151D-40E1-A07B-4A17BE168292:MemoryOverwriteRequestControlLock Success
VarCheckHiiGenDxeFromHii - HII Database exported at 0x74B86000, size = 0x9B34
VarCheckHiiGenDxeFromFv
VarCheckHiiBin - size = 0x0
[VarCheckHii] This driver could be removed from *.dsc and *.fdf
Initialize variable error flag (FF)
All EndOfDxe callbacks have returned successfully
InstallProtocolInterface: 60FF8964-E906-41D0-AFED-F241E974E08E 0
SMI LOCK is set.
SmmAccess: Prepare to lock SMRAM Region
SmmAccess: Locked SMM success!
SmmInstallProtocolInterface: 47B7FA8C-F4BD-4AF6-8200-333086F0D2C8 0
GetUefiMemoryMap
SMM Driver 44A20657-10B8-4049-A148-ACD8812AF257 was discovered but not loaded!!
Patch page table start ...
Patch page table done!
MemoryAttributesTable:
Version - 0x00000001
NumberOfEntries - 0x00000027
DescriptorSize - 0x00000030
Entry (0x7B632028)
Type - 0x6
PhysicalStart - 0x000000007B000000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632058)
Type - 0x7
PhysicalStart - 0x000000007B001000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000630
Attribute - 0x0000000000004000
Entry (0x7B632088)
Type - 0x6
PhysicalStart - 0x000000007B631000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B6320B8)
Type - 0x5
PhysicalStart - 0x000000007B635000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B6320E8)
Type - 0x6
PhysicalStart - 0x000000007B638000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000004000
Entry (0x7B632118)
Type - 0x5
PhysicalStart - 0x000000007B63D000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632148)
Type - 0x6
PhysicalStart - 0x000000007B63E000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000015
Attribute - 0x0000000000004000
Entry (0x7B632178)
Type - 0x5
PhysicalStart - 0x000000007B653000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000020000
Entry (0x7B6321A8)
Type - 0x6
PhysicalStart - 0x000000007B65A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6321D8)
Type - 0x5
PhysicalStart - 0x000000007B660000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632208)
Type - 0x6
PhysicalStart - 0x000000007B661000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632238)
Type - 0x5
PhysicalStart - 0x000000007B662000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632268)
Type - 0x6
PhysicalStart - 0x000000007B665000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B632298)
Type - 0x5
PhysicalStart - 0x000000007B66B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6322C8)
Type - 0x6
PhysicalStart - 0x000000007B66C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000054
Attribute - 0x0000000000004000
Entry (0x7B6322F8)
Type - 0x5
PhysicalStart - 0x000000007B6C0000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000005C
Attribute - 0x0000000000020000
Entry (0x7B632328)
Type - 0x6
PhysicalStart - 0x000000007B71C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000003C
Attribute - 0x0000000000004000
Entry (0x7B632358)
Type - 0x5
PhysicalStart - 0x000000007B758000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632388)
Type - 0x6
PhysicalStart - 0x000000007B759000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B6323B8)
Type - 0x5
PhysicalStart - 0x000000007B75A000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000005
Attribute - 0x0000000000020000
Entry (0x7B6323E8)
Type - 0x6
PhysicalStart - 0x000000007B75F000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632418)
Type - 0x5
PhysicalStart - 0x000000007B766000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632448)
Type - 0x6
PhysicalStart - 0x000000007B767000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000004
Attribute - 0x0000000000004000
Entry (0x7B632478)
Type - 0x5
PhysicalStart - 0x000000007B76B000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6324A8)
Type - 0x6
PhysicalStart - 0x000000007B76C000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
Entry (0x7B6324D8)
Type - 0x5
PhysicalStart - 0x000000007B775000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632508)
Type - 0x6
PhysicalStart - 0x000000007B776000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000030
Attribute - 0x0000000000004000
Entry (0x7B632538)
Type - 0x5
PhysicalStart - 0x000000007B7A6000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000016
Attribute - 0x0000000000020000
Entry (0x7B632568)
Type - 0x6
PhysicalStart - 0x000000007B7BC000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632598)
Type - 0x5
PhysicalStart - 0x000000007B7BD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000010
Attribute - 0x0000000000020000
Entry (0x7B6325C8)
Type - 0x6
PhysicalStart - 0x000000007B7CD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000B
Attribute - 0x0000000000004000
Entry (0x7B6325F8)
Type - 0x5
PhysicalStart - 0x000000007B7D8000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B632628)
Type - 0x6
PhysicalStart - 0x000000007B7D9000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000004000
Entry (0x7B632658)
Type - 0x5
PhysicalStart - 0x000000007B7DA000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000003
Attribute - 0x0000000000020000
Entry (0x7B632688)
Type - 0x6
PhysicalStart - 0x000000007B7DD000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000006
Attribute - 0x0000000000004000
Entry (0x7B6326B8)
Type - 0x5
PhysicalStart - 0x000000007B7E3000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000001
Attribute - 0x0000000000020000
Entry (0x7B6326E8)
Type - 0x6
PhysicalStart - 0x000000007B7E4000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000007
Attribute - 0x0000000000004000
Entry (0x7B632718)
Type - 0x5
PhysicalStart - 0x000000007B7EB000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x000000000000000C
Attribute - 0x0000000000020000
Entry (0x7B632748)
Type - 0x6
PhysicalStart - 0x000000007B7F7000
VirtualStart - 0x0000000000000000
NumberOfPages - 0x0000000000000009
Attribute - 0x0000000000004000
PatchSmmSaveStateMap:
PatchGdtIdtMap - GDT:
PatchGdtIdtMap - IDT:
SetUefiMemMapAttributes
UefiMemory protection: 0x0 - 0xA0000 Success
UefiMemory protection: 0x100000 - 0x758A6000 Success
UefiMemory protection: 0x75DEC000 - 0x761B8000 Success
UefiMemory protection: 0x766B8000 - 0x76748000 Success
UefiMemory protection: 0x100000000 - 0x880400000 Success
UefiMemoryAttribute protection: 0x75972000 - 0x75976000 Success
UefiMemoryAttribute protection: 0x7597C000 - 0x7597F000 Success
UefiMemoryAttribute protection: 0x75985000 - 0x75988000 Success
UefiMemoryAttribute protection: 0x7598E000 - 0x75993000 Success
UefiMemoryAttribute protection: 0x7599A000 - 0x7599F000 Success
UefiMemoryAttribute protection: 0x759A6000 - 0x759A9000 Success
UefiMemoryAttribute protection: 0x759AF000 - 0x759B2000 Success
UefiMemoryAttribute protection: 0x759B9000 - 0x759BC000 Success
UefiMemoryAttribute protection: 0x759C3000 - 0x759C6000 Success
UefiMemoryAttribute protection: 0x759CD000 - 0x759D0000 Success
SetPageTableAttributes
Start...
SMM IPL locked SMRAM window
InstallReadyToLock end
[GraphicsOutputDxe]: GraphicsDeviceInfo HOB:
VendorId = 8086, DeviceId = 9A49,
RevisionId = FF, BarIndex = 1,
SubsystemVendorId = FFFF, SubsystemId = FFFF
[GraphicsOutputDxe]: BAR[1]: Base = 90000000, Length = 10000000
[GraphicsOutputDxe]: ... matched!
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
0: shl:0 shr:0 mask:FF0000
1: shl:0 shr:0 mask:FF00
2: shl:0 shr:0 mask:FF
Bytes per pixel: 4
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 754521A8
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 75452998
[Bds]RegisterKeyNotify: 000C/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0002/0000 80000000/00 Success
[Bds]RegisterKeyNotify: 0000/000D 80000000/00 Success
Terminal - Mode 0, Column = 80, Row = 25
Terminal - Mode 1, Column = 80, Row = 50
Terminal - Mode 2, Column = 100, Row = 31
^[[2J^[[01;01H^[[=3h^[[2J^[[01;01HInstallProtocolInterface: 387477C1-69C7-11D2-8E39-00A0C969723B 74B8D5C0
InstallProtocolInterface: DD9E7534-7762-4698-8C14-F58517A625AA 74B8D6A8
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74B8D5D8
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B 74B8D818
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: D3B36F2D-D551-11D4-9A46-0090273FC14D 0
^[[0m^[[35m^[[40mInstallProtocolInterface: D3B36F2B-D551-11D4-9A46-0090273FC14D 0
GraphicsConsole video resolution 1920 x 1080
Graphics - Mode 0, Column = 80, Row = 25
Graphics - Mode 1, Column = 80, Row = 50
Graphics - Mode 2, Column = 100, Row = 31
Graphics - Mode 3, Column = 240, Row = 56
Graphics Console Started, Mode: 0
InstallProtocolInterface: 387477C2-69C7-11D2-8E39-00A0C969723B 74B8B5B0
InstallProtocolInterface: D3B36F2C-D551-11D4-9A46-0090273FC14D 0
InstallProtocolInterface: 9042A9DE-23DC-4A38-96FB-7ADED080516A 74DC1F30
^[[0m^[[37m^[[40mUsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL before connect is 4
UsbBusRecursivelyConnectWantedUsbIo: TPL after connect is 4
NvmExpressDriverBindingStart: start
Cc.En: 0
Cc.Css: 0
Cc.Mps: 0
Cc.Ams: 0
Cc.Shn: 0
Cc.Iosqes: 0
Cc.Iocqes: 0
NVMe controller is disabled with status [Success].
Private->Buffer = [0000000074B7F000]
Admin Submission Queue size (Aqa.Asqs) = [00000001]
Admin Completion Queue size (Aqa.Acqs) = [00000001]
Admin Submission Queue (SqBuffer[0]) = [0000000074B7F000]
Admin Completion Queue (CqBuffer[0]) = [0000000074B80000]
Sync I/O Submission Queue (SqBuffer[1]) = [0000000074B81000]
Sync I/O Completion Queue (CqBuffer[1]) = [0000000074B82000]
Async I/O Submission Queue (SqBuffer[2]) = [0000000074B83000]
Async I/O Completion Queue (CqBuffer[2]) = [0000000074B84000]
Aqa.Asqs: 1
Aqa.Acqs: 1
Asq: 74B7F000
Acq: 74B80000h
Cc.En: 1
Cc.Css: 0
Cc.Mps: 0
Cc.Ams: 0
Cc.Shn: 0
Cc.Iosqes: 6
Cc.Iocqes: 4
NVMe controller is enabled with status [Success].
== NVME IDENTIFY CONTROLLER DATA ==
PCI VID : 0x15B7
PCI SSVID : 0x15B7
SN : 24484F803744
MN : WD_BLACK SN770 2TB
FR : 0x31313337
RAB : 0x4
IEEE : 0x1B44
AERL : 0x7
SQES : 0x66
CQES : 0x44
NN : 0x1
NvmExpressPassThru: Timeout occurs for an NVMe command.
NvmExpressPassThru: Timeout and go to Exit with Invalid Parameter
NvmeCreateIoCompletionQueue: Break from FOR with Invalid Parameter
NvmeControllerInit() failed. Going to Exit!
NvmExpressDriverBindingStart: end with Invalid Parameter
!!!! X64 Exception Type - 12(#MC - Machine-Check) CPU Apic ID - 00000006 !!!!
RIP - 0000000075494491, CS - 0000000000000038, RFLAGS - 0000000000000046
RAX - 0000000000000000, RCX - 0000000074FFCE02, RDX - 00000000BFEBFBFF
RBX - 0000000000000000, RSP - 0000000074E28F48, RBP - 0000000074E28F90
RSI - 0000000074FFC4C0, RDI - 0000000074FFFAD8
R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000
R11 - 0000000000000000, R12 - 0000000000000F00, R13 - 0000000000000001
R14 - 0000000000000001, R15 - 0000000074FF9014
DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030
GS - 0000000000000030, SS - 0000000000000030
CR0 - 0000000080010033, CR2 - 0000000000000000, CR3 - 0000000075E01000
CR4 - 0000000000040668, CR8 - 0000000000000000
DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
GDTR - 0000000075DD5B18 0000000000000047, LDTR - 0000000000000000
IDTR - 0000000074FFB4C0 0000000000000FFF, TR - 0000000000000000
FXSAVE_STATE - 0000000074E28BA0
!!!! Find image based on IP(0x75494491) d:\sbl_tgl-up3_mr8\uefipldplatform\Build\TglPlatformPkgX64\DEBUG_VS2019\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb (ImageBase=0000000075494000, EntryPoint=00000000754950F4) !!!!
!!!! X64 Exception Type - 12(#MC - Machine-Check) CPU Apic ID - 00000004 !!!!
RIP - 0000000075494491, CS - 0000000000000038, RFLAGS - 0000000000000046
RAX - 0000000000000000, RCX - 0000000074FFCC72, RDX - 00000000BFEBFBFF
RBX - 0000000000000000, RSP - 0000000074E20F48, RBP - 0000000074E20F90
RSI - 0000000074FFC4C0, RDI - 0000000074FFFAD8
R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000
R11 - 0000000000000000, R12 - 0000000000000F00, R13 - 0000000000000001
R14 - 0000000000000001, R15 - 0000000074FF9010
DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030
GS - 0000000000000030, SS - 0000000000000030
CR0 - 0000000080010033, CR2 - 0000000000000000, CR3 - 0000000075E01000
CR4 - 0000000000040668, CR8 - 0000000000000000
DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
GDTR - 0000000075DD5B18 0000000000000047, LDTR - 0000000000000000
IDTR - 0000000074FFB4C0 0000000000000FFF, TR - 0000000000000000
FXSAVE_STATE - 0000000074E20BA0
!!!! Find image based on IP(0x75494491) d:\sbl_tgl-up3_mr8\uefipldplatform\Build\TglPlatformPkgX64\DEBUG_VS2019\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb (ImageBase=0000000075494000, EntryPoint=00000000754950F4) !!!!
!!!! X64 Exception Type - 12(#MC - Machine-Check) CPU Apic ID - 00000007 !!!!
RIP - 0000000075494491, CS - 0000000000000038, RFLAGS - 0000000000000046
RAX - 0000000000000000, RCX - 0000000074FFCECA, RDX - 00000000BFEBFBFF
RBX - 0000000000000000, RSP - 0000000074E30F48, RBP - 0000000074E30F90
RSI - 0000000074FFC4C0, RDI - 0000000074FFFAD8
R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000
R11 - 0000000000000000, R12 - 0000000000000F00, R13 - 0000000000000001
R14 - 0000000000000001, R15 - 0000000074FF9018
DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030
GS - 0000000000000030, SS - 0000000000000030
CR0 - 0000000080010033, CR2 - 0000000000000000, CR3 - 0000000075E01000
CR4 - 0000000000040668, CR8 - 0000000000000000
DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
GDTR - 0000000075DD5B18 0000000000000047, LDTR - 0000000000000000
IDTR - 0000000074FFB4C0 0000000000000FFF, TR - 0000000000000000
FXSAVE_STATE - 0000000074E30BA0
!!!! Find image based on IP(0x75494491) d:\sbl_tgl-up3_mr8\uefipldplatform\Build\TglPlatformPkgX64\DEBUG_VS2019\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb (ImageBase=0000000075494000, EntryPoint=00000000754950F4) !!!!
!!!! X64 Exception Type - 12(#MC - Machine-Check) CPU Apic ID - 00000003 !!!!
RIP - 0000000075494491, CS - 0000000000000038, RFLAGS - 0000000000000046
RAX - 0000000000000000, RCX - 0000000074FFCBAA, RDX - 00000000BFEBFBFF
RBX - 0000000000000000, RSP - 0000000074E10F48, RBP - 0000000074E10F90
RSI - 0000000074FFC4C0, RDI - 0000000074FFFAD8
R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000
R11 - 0000000000000000, R12 - 0000000000000F00, R13 - 0000000000000001
R14 - 0000000000000001, R15 - 0000000074FF9008
DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030
GS - 0000000000000030, SS - 0000000000000030
CR0 - 0000000080010033, CR2 - 0000000000000000, CR3 - 0000000075E01000
CR4 - 0000000000040668, CR8 - 0000000000000000
DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
GDTR - 0000000075DD5B18 0000000000000047, LDTR - 0000000000000000
IDTR - 0000000074FFB4C0 0000000000000FFF, TR - 0000000000000000
FXSAVE_STATE - 0000000074E10BA0
!!!! Find image based on IP(0x75494491) d:\sbl_tgl-up3_mr8\uefipldplatform\Build\TglPlatformPkgX64\DEBUG_VS2019\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb (ImageBase=0000000075494000, EntryPoint=00000000754950F4) !!!!
!!!! X64 Exception Type - 12(#MC - Machine-Check) CPU Apic ID - 00000005 !!!!
RIP - 0000000075494491, CS - 0000000000000038, RFLAGS - 0000000000000046
RAX - 0000000000000000, RCX - 0000000074FFCD3A, RDX - 00000000BFEBFBFF
RBX - 0000000000000000, RSP - 0000000074E18F48, RBP - 0000000074E18F90
RSI - 0000000074FFC4C0, RDI - 0000000074FFFAD8
R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000
R11 - 0000000000000000, R12 - 0000000000000F00, R13 - 0000000000000001
R14 - 0000000000000001, R15 - 0000000074FF900C
DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030
GS - 0000000000000030, SS - 0000000000000030
CR0 - 0000000080010033, CR2 - 0000000000000000, CR3 - 0000000075E01000
CR4 - 0000000000040668, CR8 - 0000000000000000
DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
GDTR - 0000000075DD5B18 0000000000000047, LDTR - 0000000000000000
IDTR - 0000000074FFB4C0 0000000000000FFF, TR - 0000000000000000
FXSAVE_STATE - 0000000074E18BA0
!!!! Find image based on IP(0x75494491) d:\sbl_tgl-up3_mr8\uefipldplatform\Build\TglPlatformPkgX64\DEBUG_VS2019\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb (ImageBase=0000000075494000, EntryPoint=00000000754950F4) !!!!
!!!! X64 Exception Type - 12(#MC - Machine-Check) CPU Apic ID - 00000002 !!!!
RIP - 0000000075494491, CS - 0000000000000038, RFLAGS - 0000000000000046
RAX - 0000000000000000, RCX - 0000000074FFCAE2, RDX - 00000000BFEBFBFF
RBX - 0000000000000000, RSP - 0000000074E08F48, RBP - 0000000074E08F90
RSI - 0000000074FFC4C0, RDI - 0000000074FFFAD8
R8 - 0000000000000000, R9 - 0000000000000000, R10 - 0000000000000000
R11 - 0000000000000000, R12 - 0000000000000F00, R13 - 0000000000000001
R14 - 0000000000000001, R15 - 0000000074FF9004
DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030
GS - 0000000000000030, SS - 0000000000000030
CR0 - 0000000080010033, CR2 - 0000000000000000, CR3 - 0000000075E01000
CR4 - 0000000000040668, CR8 - 0000000000000000
DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
GDTR - 0000000075DD5B18 0000000000000047, LDTR - 0000000000000000
IDTR - 0000000074FFB4C0 0000000000000FFF, TR - 0000000000000000
FXSAVE_STATE - 0000000074E08BA0
!!!! Find image based on IP(0x75494491) d:\sbl_tgl-up3_mr8\uefipldplatform\Build\TglPlatformPkgX64\DEBUG_VS2019\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb (ImageBase=0000000075494000, EntryPoint=00000000754950F4) !!!!
ÿ
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2025-01-10 13:15 [edk2-devel] i7 TGL-UP3 Slimboot MR8 EDK Code: Gen 4 NVMe Storage: Timeout for NvmExpressPassThru Siddhartha via groups.io
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