From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web10.36157.1683646668888725466 for ; Tue, 09 May 2023 08:37:49 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=TGitfr/s; spf=pass (domain: redhat.com, ip: 170.10.133.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1683646668; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=fU2XevsVenY2Y+t7gCbSYLVHbbQ9+Q674GzninAQp2s=; b=TGitfr/svJbfe7tFihls6whA9jaOxGG62rz/CuB4j3RIX/ptNax1uTAIpZDMfmByI3Ci5S frCuB/9mqxyH+g3Xi/sx+xrf866xsRY+Wa4kmt7YUnhSyudBkVCkKg16Qbm7ZTWG5l3tGY 4TVXQIO6vN35gry/IgJuISsux7wdcek= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-512-Ahsqc2XMOYe0cI1cX-jJAw-1; Tue, 09 May 2023 11:37:46 -0400 X-MC-Unique: Ahsqc2XMOYe0cI1cX-jJAw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.rdu2.redhat.com [10.11.54.2]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 6AD2C80C8C5; Tue, 9 May 2023 15:37:46 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.192.221]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3CAAE40C6E67; Tue, 9 May 2023 15:37:46 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id D29C518000A6; Tue, 9 May 2023 17:37:44 +0200 (CEST) Date: Tue, 9 May 2023 17:37:44 +0200 From: "Gerd Hoffmann" To: devel@edk2.groups.io, zhiguang.liu@intel.com Subject: Re: [edk2-devel] [PATCH v5 0/5] UefiCpuPkg/ResetVector: Refine page table creation, and support 5 Level paging Message-ID: References: <20230508081504.1067-1-zhiguang.liu@intel.com> MIME-Version: 1.0 In-Reply-To: <20230508081504.1067-1-zhiguang.liu@intel.com> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.2 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, May 08, 2023 at 04:14:59PM +0800, Zhiguang Liu wrote: > This patch set simplify the page table creation code, remove some > hard-code, combine files and support 5 Level paging. > > V4: > Refine comments and update below macro names: > PG_NLE -> PAGE_NLE > PTE_2MB -> PDE_2MB > PDP_1G -> PDPTE_1GB > PAGE_BLP_ATTR -> PAGE_BLE_ATTR > > No code logic impact > > V5: > Update below macro names: > PDE_2MB -> PAGE_PDE_2MB > PDPTE_1GB -> PAGE_PDPTE_1GB > > No code logic impact > > Zhiguang Liu (5): > UefiCpuPkg/ResetVector: Rename macros about page table. > UefiCpuPkg/ResetVector: Simplify page table creation in ResetVector > UefiCpuPkg/ResetVector: Combine PageTables1G.asm and PageTables2M.asm > UefiCpuPkg/ResetVector: Modify Page Table in ResetVector > UefiCpuPkg/ResetVector: Support 5 level page table in ResetVector Tested-by: Gerd Hoffmann Acked-by: Gerd Hoffmann take care, Gerd