From: "Gerd Hoffmann" <kraxel@redhat.com>
To: devel@edk2.groups.io, zhiguang.liu@intel.com
Cc: "Dong, Eric" <eric.dong@intel.com>, "Ni, Ray" <ray.ni@intel.com>,
"Kumar, Rahul R" <rahul.r.kumar@intel.com>,
"De, Debkumar" <debkumar.de@intel.com>,
"West, Catharine" <catharine.west@intel.com>
Subject: Re: [edk2-devel] [PATCH 2/2] UefiCpuPkg: Support 5 level page table in ResetVector
Date: Fri, 14 Apr 2023 12:04:53 +0200 [thread overview]
Message-ID: <oys3alugmh5z6ovqc22cuxq3ax3rgiow3tvszjoy2md5zrummu@55ishqh4lflg> (raw)
In-Reply-To: <PH0PR11MB5048E2FCA19ABCB4E60C4BA090999@PH0PR11MB5048.namprd11.prod.outlook.com>
> Using 5level paging when the below two conditions are both true:
> 1. CPU support 5level paging
> 2. Platform choose to use 5level paging. (by specifing macro USE_5_LEVEL_PAGE_TABLE)
>
> There is an assumption that if platform choose to use 5level paging,
> then 5level paging should be supported by CPU. (Platform should know
> its CPU capability)
That assumption does not hold for virtual machines. OVMF builds with
5-level paging support enabled should continue to work on CPUs without
5-level paging support.
> If Platform choose to use 4level paging at build time, we can save 4K space by not creating the 5 level page.
I'm fine with that.
But with 5-level paging enabled the reset vector should be able to
fallback to 4-level paging in case the CPU does not support 5-level
paging.
take care,
Gerd
next prev parent reply other threads:[~2023-04-14 10:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-03 9:28 [PATCH 2/2] UefiCpuPkg: Support 5 level page table in ResetVector Zhiguang Liu
2023-04-03 11:55 ` Gerd Hoffmann
2023-04-14 7:09 ` [edk2-devel] " Zhiguang Liu
2023-04-14 10:04 ` Gerd Hoffmann [this message]
2023-04-15 5:02 ` Ni, Ray
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