From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail04.groups.io (mail04.groups.io [45.79.224.9]) by spool.mail.gandi.net (Postfix) with ESMTPS id 06D54D80888 for ; Tue, 16 Apr 2024 07:35:46 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=cVpKvCV5tQkO7p9x1/rU3kfC8QKiQtRSPjjgwIYBhNg=; c=relaxed/simple; d=groups.io; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Disposition; s=20240206; t=1713252945; v=1; b=H1T6zAk2aNv1qGQS9QEN5/stu48csUS+zl+Y2xIykTjIkTc9lOTk0u9MbcjzMgS9vlTxmMHw zctRDEhNIELejKcHE7GJo3ZNc9eXe35eNPpUm1tCG+o/3drISxcUV1UeoNo1VnQyL3aTHEdk7/g emgRHFDBmB4UQ2OSNXhK+I8mUKd1G39DrS7fG2sybFwd56bq2hrkH9hphDqida8GGTZAcGHIAwI ZWQ/8h4PaNNvL6en7MxL5ZK975hbhdqF8ZFA/nvgOf20QjPINJdOw6xqBBKRIO/YSCQ3BQ3KD1Z OT2ujoMRN2TzUpPwPu/H/CXjxTZE+re3txx3NAgWjDGyQ== X-Received: by 127.0.0.2 with SMTP id iWAlYY7687511xthplCc5JCc; Tue, 16 Apr 2024 00:35:45 -0700 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.14726.1713252940085947513 for ; Tue, 16 Apr 2024 00:35:40 -0700 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-530-DFilzdz5M2a29RTn3Sj-wg-1; Tue, 16 Apr 2024 03:35:34 -0400 X-MC-Unique: DFilzdz5M2a29RTn3Sj-wg-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 35813802E4D; Tue, 16 Apr 2024 07:35:34 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.169]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0ED1B51EF; Tue, 16 Apr 2024 07:35:34 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id F0FFC18009E6; Tue, 16 Apr 2024 09:35:28 +0200 (CEST) Date: Tue, 16 Apr 2024 09:35:28 +0200 From: "Gerd Hoffmann" To: "Wu, Jiaxin" Cc: "thomas.lendacky@amd.com" , "devel@edk2.groups.io" , "Ni, Ray" , "Zeng, Star" , Ard Biesheuvel , "Yao, Jiewen" , "Kumar, Rahul R" Subject: Re: [edk2-devel] [PATCH v1 03/13] UefiCpuPkg/SmmRelocationLib: Add library instance for OVMF Message-ID: References: <20240410135724.15344-1-jiaxin.wu@intel.com> <20240410135724.15344-4-jiaxin.wu@intel.com> MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Tue, 16 Apr 2024 00:35:40 -0700 Resent-From: kraxel@redhat.com Reply-To: devel@edk2.groups.io,kraxel@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: AnZPkXXejKL4hDVezhsOM2Hax7686176AA= Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=H1T6zAk2; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.9 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none) On Mon, Apr 15, 2024 at 01:04:58PM +0000, Wu, Jiaxin wrote: > Hi Gred, > > Because: > 1) The mode of the CPU check is different between the AMD & OVMF. > OVMF: > CpuSaveState->x86.SMMRevId & 0Xffff > > AMD: > LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA > > 2) Existing SmBase configuration is different between the AMD & OVMF. > OVMF: > AmdCpuState->x64.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex]; > > AMD: > if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) { > CpuSaveState->x86.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex]; > } else { > CpuSaveState->x64.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex]; > } > > This series patch won't change the existing implementation code logic, so, we need override one version for OVMF. The real question is why do these differences exist and are they actually needed. I'd expect the CPU mode check return identical results. The SmBase configuration for OVMF looks suspicious to me. I'm wondering whenever the OVMF code actually works in Ia32 builds ... take care, Gerd -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117853): https://edk2.groups.io/g/devel/message/117853 Mute This Topic: https://groups.io/mt/105441992/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-