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Date: Wed, 10 May 2023 09:51:55 +0200
From: "Gerd Hoffmann" <kraxel@redhat.com>
To: devel@edk2.groups.io, jiaxin.wu@intel.com
Cc: "Bi, Dandan" <dandan.bi@intel.com>, 
	"Gao, Liming" <gaoliming@byosoft.com.cn>, "Dong, Eric" <eric.dong@intel.com>, "Ni, Ray" <ray.ni@intel.com>, 
	"Zeng, Star" <star.zeng@intel.com>, "Kumar, Rahul R" <rahul.r.kumar@intel.com>
Subject: Re: [edk2-devel] [PATCH v1 3/3] MdeModulePkg/DxeIpl: Align Page table Level setting with previous level.
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On Wed, May 10, 2023 at 01:56:59AM +0000, Wu, Jiaxin wrote:
> This happens to transfer PEI control to DXE. The paging is created for DXE phase,

Ah, ok.  The code looks fine then.

> so, here, it's means the cpu running in the ia32 pei. I will refine the comments as below:
> 
> If cpu has already runned in X64 PEI, Page table Level in DXE must align with previous level. 
> If cpu runs in IA32 PEI, Page table Level in DXE is decided by PCD and feature capbility.

Good idea.

thanks,
  Gerd