[PATCH] ArmPkg: Various typo

["Antoine Coeur" <Coeur@gmx.fr>]

Various typo in ArmPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Coeur <coeur@gmx.fr>
---
 .../Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c |  2 +-
 ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c           |  2 +-
 ArmPkg/Drivers/CpuDxe/Arm/Mmu.c               |  2 +-
 ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c          |  2 +-
 ArmPkg/Drivers/CpuDxe/CpuMpCore.c             |  4 +--
 ArmPkg/Drivers/CpuDxe/Exception.c             |  2 +-
 ArmPkg/Drivers/CpuPei/CpuPei.c                |  2 +-
 ArmPkg/Drivers/TimerDxe/TimerDxe.c            |  2 +-
 ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c |  2 +-
 ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h |  2 +-
 ArmPkg/Include/Library/ArmDisassemblerLib.h   |  4 +--
 .../Library/ArmArchTimerLib/ArmArchTimerLib.c |  2 +-
 .../ArmDisassemblerLib/Aarch64Disassembler.c  |  2 +-
 .../ArmDisassemblerLib/ArmDisassembler.c      |  4 +--
 .../ArmDisassemblerLib/ThumbDisassembler.c    | 14 ++++----
 .../ArmExceptionLib/Arm/ExceptionSupport.S    |  2 +-
 .../ArmExceptionLib/Arm/ExceptionSupport.asm  |  2 +-
 .../Library/ArmExceptionLib/ArmExceptionLib.c |  4 +--
 .../Library/ArmLib/AArch64/AArch64Support.S   |  6 ++--
 .../Library/ArmLib/AArch64/ArmLibSupportV8.S  |  2 +-
 .../Library/ArmMmuLib/AArch64/ArmMmuLibCore.c |  2 +-
 ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c  |  2 +-
 .../DebugPeCoffExtraActionLib.inf             |  2 +-
 .../AArch64/DefaultExceptionHandler.c         |  2 +-
 .../Arm/DefaultExceptionHandler.c             |  2 +-
 .../PlatformBootManagerLib/PlatformBm.c       |  4 +--
 .../RvdPeCoffExtraActionLib.c                 |  2 +-
 .../RvdPeCoffExtraActionLib.inf               |  2 +-
 ArmPkg/Library/SemiHostingDebugLib/DebugLib.c | 32 +++++++++----------
 .../SemiHostingSerialPortLib.inf              |  2 +-
 .../SemiHostingSerialPortLib/SerialPortLib.c  |  8 ++---
 31 files changed, 62 insertions(+), 62 deletions(-)

diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
index fecf6a87ad..9eb6691aac 100644
--- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
+++ b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
@@ -152,7 +152,7 @@ CpuIoCheckParameter (
   //
   // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
   // can also be the maximum integer value supported by the CPU, this range
-  // check must be adjusted to avoid all oveflow conditions.
+  // check must be adjusted to avoid all overflow conditions.
   //
   // The following form of the range check is equivalent but assumes that
   // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 3e216c7cb2..f4db4e13e5 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -287,7 +287,7 @@ GetMemoryRegionRec (
     BlockEntry++;
   } else if (EntryType == BlockEntryType) {
     // We have found the BlockEntry attached to the address. We save its start address (the start
-    // address might be before the 'BaseAdress') and attributes
+    // address might be before the 'BaseAddress') and attributes
     *BaseAddress      = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
     *RegionLength     = 0;
     *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 3b29d33d0a..ef49d5a595 100644
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -240,7 +240,7 @@ SyncCacheConfig (
   EFI_GCD_MEMORY_SPACE_DESCRIPTOR     *MemorySpaceMap;
 
 
-  DEBUG ((EFI_D_PAGE, "SyncCacheConfig()\n"));
+  DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
 
   // This code assumes MMU is enabled and filed with section translations
   ASSERT (ArmMmuEnabled ());
diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
index 8150486217..ddce2d57a0 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
@@ -194,7 +194,7 @@ CpuSetMemoryAttributes (
 
   if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
     // Minimum granularity is SIZE_4KB (4KB on ARM)
-    DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
+    DEBUG ((DEBUG_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum granularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
     return EFI_UNSUPPORTED;
   }
 
diff --git a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c b/ArmPkg/Drivers/CpuDxe/CpuMpCore.c
index 81d858ea25..240e2ee881 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuMpCore.c
@@ -67,7 +67,7 @@ PublishArmProcessorTable (
         // Allocate Runtime memory for ARM processor table
         ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
 
-        // Check if the memory allocation is succesful or not
+        // Check if the memory allocation is successful or not
         ASSERT(NULL != ArmProcessorTable);
 
         // Set ARM processor table to default values
@@ -87,7 +87,7 @@ PublishArmProcessorTable (
         ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
            ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
 
-        // Check if the memory allocation is succesful or not
+        // Check if the memory allocation is successful or not
         ASSERT(NULL != ArmProcessorTable->ArmCpus);
 
         // Copy ARM Processor Table data from HOB list to newly allocated memory
diff --git a/ArmPkg/Drivers/CpuDxe/Exception.c b/ArmPkg/Drivers/CpuDxe/Exception.c
index d806a5fdf9..f8a129cf41 100644
--- a/ArmPkg/Drivers/CpuDxe/Exception.c
+++ b/ArmPkg/Drivers/CpuDxe/Exception.c
@@ -33,7 +33,7 @@ InitializeExceptions (
     VectorInfo = VectorInfoList;
   }
 
-  // intialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
+  // initialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
   InitializeCpuExceptionHandlers(VectorInfo);
 
   Status = EFI_SUCCESS;
diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.c b/ArmPkg/Drivers/CpuPei/CpuPei.c
index e63519ff64..70534227d4 100644
--- a/ArmPkg/Drivers/CpuPei/CpuPei.c
+++ b/ArmPkg/Drivers/CpuPei/CpuPei.c
@@ -29,7 +29,7 @@ Abstract:
 //
 #include <PiPei.h>
 //
-// The protocols, PPI and GUID defintions for this module
+// The protocols, PPI and GUID definitions for this module
 //
 #include <Ppi/ArmMpCoreInfo.h>
 
diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c
index 478f1bece5..7d43ff757a 100644
--- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c
+++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c
@@ -371,7 +371,7 @@ TimerInitialize (
   UINT32      TimerHypIntrNum;
 
   if (ArmIsArchTimerImplemented () == 0) {
-    DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence cann't use this Driver \n"));
+    DEBUG ((DEBUG_ERROR, "ARM Architectural Timer is not available in the CPU, hence can't use this Driver \n"));
     ASSERT (0);
   }
 
diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
index 92aa5f8b0e..581584699d 100644
--- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
+++ b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c
@@ -697,7 +697,7 @@ FileGetPosition (
   @param[in]  Position  The byte position from the start of the file to set.
 
   @retval  EFI_SUCCESS       The position was set.
-  @retval  EFI_DEVICE_ERROR  The semi-hosting positionning operation failed.
+  @retval  EFI_DEVICE_ERROR  The semi-hosting positioning operation failed.
   @retval  EFI_UNSUPPORTED   The seek request for nonzero is not valid on open
                              directories.
   @retval  EFI_INVALID_PARAMETER  The parameter "This" is NULL.
diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
index 93395743ba..f434af7b26 100644
--- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
+++ b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h
@@ -163,7 +163,7 @@ FileGetPosition (
   @param[in]  Position  The byte position from the start of the file to set.
 
   @retval  EFI_SUCCESS       The position was set.
-  @retval  EFI_DEVICE_ERROR  The semi-hosting positionning operation failed.
+  @retval  EFI_DEVICE_ERROR  The semi-hosting positioning operation failed.
   @retval  EFI_UNSUPPORTED   The seek request for nonzero is not valid on open
                              directories.
 
diff --git a/ArmPkg/Include/Library/ArmDisassemblerLib.h b/ArmPkg/Include/Library/ArmDisassemblerLib.h
index d6a493f2cb..686c8cd34a 100644
--- a/ArmPkg/Include/Library/ArmDisassemblerLib.h
+++ b/ArmPkg/Include/Library/ArmDisassemblerLib.h
@@ -16,8 +16,8 @@
 #define __ARM_DISASSEBLER_LIB_H__
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.
diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
index b81293c5cf..a595527d99 100644
--- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
+++ b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
@@ -158,7 +158,7 @@ MicroSecondDelay (
 
   @param  NanoSeconds The minimum number of nanoseconds to delay.
 
-  @return The value of NanoSeconds inputed.
+  @return The value of NanoSeconds inputted.
 
 **/
 UINTN
diff --git a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c
index 3ecae77d33..9ca24ec0db 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c
@@ -19,7 +19,7 @@
 #include <Library/ArmDisassemblerLib.h>
 
 /**
-  Place a disassembly of of **OpCodePtr into buffer, and update OpCodePtr to
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
   point to next instruction.
 
   @param  OpCodePtrPtr  Pointer to pointer of instruction to disassemble.
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
index b449a5d3cd..661bddd901 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c
@@ -143,8 +143,8 @@ RotateRight (
 
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.
diff --git a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
index 8c7285bcae..1dabff833f 100644
--- a/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
+++ b/ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c
@@ -1,5 +1,5 @@
 /** @file
-  Thumb Dissassembler. Still a work in progress.
+  Thumb Disassembler. Still a work in progress.
 
   Wrong output is a bug, so please fix it.
   Hex output means there is not yet an entry or a decode bug.
@@ -109,7 +109,7 @@ typedef struct {
 } THUMB_INSTRUCTIONS;
 
 THUMB_INSTRUCTIONS gOpThumb[] = {
-// Thumb 16-bit instrucitons
+// Thumb 16-bit instructions
 //          Op       Mask   Format
   { "ADC" , 0x4140, 0xffc0, DATA_FORMAT5 },  // ADC <Rndn>, <Rm>
   { "ADR",  0xa000, 0xf800, ADR_FORMAT   },  // ADR <Rd>, <label>
@@ -453,7 +453,7 @@ SignExtend32 (
 
 //
 // Some instructions specify the PC is always considered aligned
-// The PC is after the instruction that is excuting. So you pass
+// The PC is after the instruction that is executing. So you pass
 // in the instruction address and you get back the aligned answer
 //
 UINT32
@@ -465,8 +465,8 @@ PCAlign4 (
 }
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.
@@ -1029,8 +1029,8 @@ DisassembleArmInstruction (
 
 
 /**
-  Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to
-  point to next instructin.
+  Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
+  point to next instruction.
 
   We cheat and only decode instructions that access
   memory. If the instruction is not found we dump the instruction in hex.
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S
index fa4087cfab..e3479ae8af 100644
--- a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S
+++ b/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S
@@ -233,7 +233,7 @@ ASM_PFX(AsmCommonExceptionEntry):
   ldr       R5, [SP, #0x58]         @ PC is the LR pushed by srsfd
                                     @ Check to see if we have to adjust for Thumb entry
   sub       r4, r0, #1              @ if (ExceptionType == 1 || ExceptionType == 2)) {
-  cmp       r4, #1                  @   // UND & SVC have differnt LR adjust for Thumb
+  cmp       r4, #1                  @   // UND & SVC have different LR adjust for Thumb
   bhi       NoAdjustNeeded
 
   tst       r1, #0x20               @   if ((CPSR & T)) == T) {  // Thumb Mode on entry
diff --git a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm b/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm
index 848a54babf..418272f3e7 100644
--- a/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm
+++ b/ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm
@@ -227,7 +227,7 @@ AsmCommonExceptionEntry
   ldr       R5, [SP, #0x58]         ; PC is the LR pushed by srsfd
                                     ; Check to see if we have to adjust for Thumb entry
   sub       r4, r0, #1              ; if (ExceptionType == 1 || ExceptionType == 2)) {
-  cmp       r4, #1                  ;   // UND & SVC have differnt LR adjust for Thumb
+  cmp       r4, #1                  ;   // UND & SVC have different LR adjust for Thumb
   bhi       NoAdjustNeeded
 
   tst       r1, #0x20               ;   if ((CPSR & T)) == T) {  // Thumb Mode on entry
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
index cebb26a4ce..8f6fa1e4b1 100644
--- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
+++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
@@ -100,7 +100,7 @@ InitializeCpuExceptionHandlers(
 
   Status = EFI_SUCCESS;
 
-  // if we are requested to copy exceptin handlers to another location
+  // if we are requested to copy exception handlers to another location
   if (gArmRelocateVectorTable) {
 
     VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
@@ -137,7 +137,7 @@ InitializeCpuExceptionHandlers(
 }
 
 /**
-Copies exception handlers to the speciifed address.
+Copies exception handlers to the specified address.
 
 Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
 persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 2d136d242b..331bea350c 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -436,13 +436,13 @@ ASM_FUNC(ArmReadMpidr)
   ret
 
 
-// Keep old function names for C compatibilty for now. Change later?
+// Keep old function names for C compatibility for now. Change later?
 ASM_FUNC(ArmReadTpidrurw)
   mrs   x0, tpidr_el0           // read tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
   ret
 
 
-// Keep old function names for C compatibilty for now. Change later?
+// Keep old function names for C compatibility for now. Change later?
 ASM_FUNC(ArmWriteTpidrurw)
   msr   tpidr_el0, x0           // write tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
   ret
@@ -459,7 +459,7 @@ ASM_FUNC(ArmReadIdPfr0)
   ret
 
 
-// Q: id_aa64pfr1_el1 not defined yet. What does this funtion want to access?
+// Q: id_aa64pfr1_el1 not defined yet. What does this function want to access?
 // A: used to setup arch timer. Check if we have security extensions, permissions to set stuff.
 //    See: ArmPkg/Library/ArmArchTimerLib/AArch64/ArmArchTimerLib.c
 //    Not defined yet, but stick in here for now, should read all zeros.
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
index 221dfc499a..4addfd9422 100644
--- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
+++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
@@ -29,7 +29,7 @@
 
 
 ASM_FUNC(ArmIsMpCore)
-  mrs   x0, mpidr_el1         // Read EL1 Mutliprocessor Affinty Reg (MPIDR)
+  mrs   x0, mpidr_el1         // Read EL1 Multiprocessor Affinty Reg (MPIDR)
   and   x0, x0, #MPIDR_U_MASK // U Bit clear, the processor is part of a multiprocessor system
   lsr   x0, x0, #MPIDR_U_BIT
   eor   x0, x0, #1
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
index 3498f520e3..4f882487ec 100644
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
@@ -358,7 +358,7 @@ UpdateRegionMapping (
 
   do {
     // Get the first Block Entry that matches the Virtual Address and also the information on the Table Descriptor
-    // such as the the size of the Block Entry and the address of the last BlockEntry of the Table Descriptor
+    // such as the size of the Block Entry and the address of the last BlockEntry of the Table Descriptor
     BlockEntrySize = RegionLength;
     BlockEntry = GetBlockEntryListFromAddress (RootTable, RegionStart, &TableLevel, &BlockEntrySize, &LastBlockEntry);
     if (BlockEntry == NULL) {
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
index baa085c384..7e9c5b3748 100644
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
@@ -697,7 +697,7 @@ UpdateSectionEntries (
   for(i=0; i<NumSections; i++) {
     CurrentDescriptor = FirstLevelTable[FirstLevelIdx + i];
 
-    // has this descriptor already been coverted to pages?
+    // has this descriptor already been converted to pages?
     if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) {
       // forward this 1MB range to page table function instead
       Status = UpdatePageEntries (
diff --git a/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf b/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
index c1f717e5bd..59716f83fb 100644
--- a/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
+++ b/ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
@@ -1,5 +1,5 @@
 #/** @file
-# PeCoff extra action libary for DXE phase that run Unix emulator.
+# PeCoff extra action library for DXE phase that run Unix emulator.
 #
 # Lib to provide memory journal status code reporting Routines
 # Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c
index 40d4b218be..ca85fd40f7 100644
--- a/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c
+++ b/ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c
@@ -143,7 +143,7 @@ BaseName (
 /**
   This is the default action to take on an unexpected exception
 
-  Since this is exception context don't do anything crazy like try to allcoate memory.
+  Since this is exception context don't do anything crazy like try to allocate memory.
 
   @param  ExceptionType    Type of the exception
   @param  SystemContext    Register state at the time of the Exception
diff --git a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c
index 476ec20610..2c3e0acef2 100644
--- a/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c
+++ b/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c
@@ -174,7 +174,7 @@ STATIC CHAR8 *gExceptionTypeString[] = {
 /**
   This is the default action to take on an unexpected exception
 
-  Since this is exception context don't do anything crazy like try to allcoate memory.
+  Since this is exception context don't do anything crazy like try to allocate memory.
 
   @param  ExceptionType    Type of the exception
   @param  SystemContext    Register state at the time of the Exception
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
index 81d36f2187..d835a02e59 100644
--- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -660,11 +660,11 @@ HandleCapsules (
   Do the platform specific action after the console is ready
   Possible things that can be done in PlatformBootManagerAfterConsole:
   > Console post action:
-    > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
+    > Dynamically switch output mode from 100x31 to 80x25 for certain scenario
     > Signal console ready platform customized event
   > Run diagnostics like memory testing
   > Connect certain devices
-  > Dispatch aditional option roms
+  > Dispatch additional option roms
   > Special boot: e.g.: USB boot, enter UI
 **/
 VOID
diff --git a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
index abe3c378d7..ea5d59764e 100644
--- a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
+++ b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c
@@ -27,7 +27,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 /**
   Append string to debugger script file, create file if needed.
 
-  This library can show up in mulitple places so we need to append the file every time we write to it.
+  This library can show up in multiple places so we need to append the file every time we write to it.
   For example Sec can use this to load the DXE core, and the DXE core would use this to load all the
   other modules. So we have two instances of the library in the system.
 
diff --git a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
index 3be0237a36..dbfb9d731d 100644
--- a/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+++ b/ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
@@ -1,5 +1,5 @@
 #/** @file
-# PeCoff extra action libary for DXE phase that run Unix emulator.
+# PeCoff extra action library for DXE phase that run Unix emulator.
 #
 # Lib to provide memory journal status code reporting Routines
 # Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
diff --git a/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c b/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c
index ec03edb774..473468d2be 100644
--- a/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c
+++ b/ArmPkg/Library/SemiHostingDebugLib/DebugLib.c
@@ -82,11 +82,11 @@ DebugPrint (
 
   Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
   to the debug output device.  If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
-  PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
-  DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+  PcdDebugPropertyMask is set then CpuBreakpoint() is called. Otherwise, if
+  DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugPropertyMask is set then
   CpuDeadLoop() is called.  If neither of these bits are set, then this function
   returns immediately after the message is printed to the debug output device.
-  DebugAssert() must actively prevent recusrsion.  If DebugAssert() is called while
+  DebugAssert() must actively prevent recursion.  If DebugAssert() is called while
   processing another DebugAssert(), then DebugAssert() must return immediately.
 
   If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.
@@ -156,7 +156,7 @@ DebugClearMemory (
   ASSERT (Buffer != NULL);
 
   //
-  // SetMem() checks for the the ASSERT() condition on Length and returns Buffer
+  // SetMem() checks for the ASSERT() condition on Length and returns Buffer
   //
   return SetMem (Buffer, Length, PcdGet8(PcdDebugClearMemoryValue));
 }
@@ -167,10 +167,10 @@ DebugClearMemory (
   Returns TRUE if ASSERT() macros are enabled.
 
   This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
-  PcdDebugProperyMask is set.  Otherwise FALSE is returned.
+  PcdDebugPropertyMask is set.  Otherwise FALSE is returned.
 
-  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
-  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugPropertyMask is set.
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugPropertyMask is clear.
 
 **/
 BOOLEAN
@@ -188,10 +188,10 @@ DebugAssertEnabled (
   Returns TRUE if DEBUG()macros are enabled.
 
   This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
-  PcdDebugProperyMask is set.  Otherwise FALSE is returned.
+  PcdDebugPropertyMask is set.  Otherwise FALSE is returned.
 
-  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
-  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugPropertyMask is set.
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugPropertyMask is clear.
 
 **/
 BOOLEAN
@@ -209,10 +209,10 @@ DebugPrintEnabled (
   Returns TRUE if DEBUG_CODE()macros are enabled.
 
   This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
-  PcdDebugProperyMask is set.  Otherwise FALSE is returned.
+  PcdDebugPropertyMask is set.  Otherwise FALSE is returned.
 
-  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
-  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPropertyMask is set.
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPropertyMask is clear.
 
 **/
 BOOLEAN
@@ -230,10 +230,10 @@ DebugCodeEnabled (
   Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
 
   This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
-  PcdDebugProperyMask is set.  Otherwise FALSE is returned.
+  PcdDebugPropertyMask is set.  Otherwise FALSE is returned.
 
-  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
-  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugPropertyMask is set.
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugPropertyMask is clear.
 
 **/
 BOOLEAN
diff --git a/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf b/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
index fedf3896ad..b02e461a16 100644
--- a/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
+++ b/ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
@@ -1,5 +1,5 @@
 #/** @file
-# Semihosting  serail port lib
+# Semihosting  serial port lib
 #
 # Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
 #
diff --git a/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c b/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
index bc4d691523..4c7ded753b 100644
--- a/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
+++ b/ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c
@@ -109,7 +109,7 @@ SerialPortWrite (
   @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
 
   @retval 0                Read data failed.
-  @retval !0               Aactual number of bytes read from serial device.
+  @retval !0               Actual number of bytes read from serial device.
 
 **/
 UINTN
@@ -126,10 +126,10 @@ SerialPortRead (
 
 
 /**
-  Check to see if any data is avaiable to be read from the debug device.
+  Check to see if any data is available to be read from the debug device.
 
-  @retval TRUE       At least one byte of data is avaiable to be read
-  @retval FALSE      No data is avaiable to be read
+  @retval TRUE       At least one byte of data is available to be read
+  @retval FALSE      No data is available to be read
 
 **/
 BOOLEAN
-- 
2.17.2 (Apple Git-113)