From: "Gerd Hoffmann" <kraxel@redhat.com>
To: Abdul Lateef Attar <abdattar@amd.com>
Cc: devel@edk2.groups.io,
Abdul Lateef Attar <AbdulLateef.Attar@amd.com>,
Paul Grimes <paul.grimes@amd.com>,
Garrett Kirkendall <garrett.kirkendall@amd.com>,
Abner Chang <abner.chang@amd.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Jiewen Yao <jiewen.yao@intel.com>,
Jordan Justen <jordan.l.justen@intel.com>
Subject: Re: [PATCH v9 7/9] UefiCpuPkg: Implements MmSaveStateLib for Ovmf
Date: Wed, 26 Apr 2023 13:01:24 +0200 [thread overview]
Message-ID: <vfdpb633rdvre4pnuibohogvzayfszxwihxe6bgzsemxsuzr2v@3khs3nuru54a> (raw)
In-Reply-To: <bf8a35dfc1e065be4d67f8222ea594e3b3c93924.1682493282.git.abdattar@amd.com>
On Wed, Apr 26, 2023 at 12:52:25PM +0530, Abdul Lateef Attar wrote:
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
>
> Implements MmSaveStateLib library interfaces
> to read and write save state
> registers for Ovmf/Qemu.
You can drop this patch and use the AMD version.
Additionally QemuSmramSaveStateMap.h can be removed and likewise
the AMD version used. See patch below. Feel free to include it
in your patch series.
take care,
Gerd
----------------------- cut here ---------------------
>From fbc0c8000588b6f7104de1007242177448b38141 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Wed, 26 Apr 2023 11:38:41 +0200
Subject: [PATCH 1/1] [testing] drop QemuSmramSaveStateMap.h, use
Amd/SmramSaveStateMap.h instead
---
.../Include/Register/QemuSmramSaveStateMap.h | 178 ------------------
.../PeiDxeMemEncryptSevLibInternal.c | 4 +-
.../SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 21 +--
3 files changed, 12 insertions(+), 191 deletions(-)
delete mode 100644 OvmfPkg/Include/Register/QemuSmramSaveStateMap.h
diff --git a/OvmfPkg/Include/Register/QemuSmramSaveStateMap.h b/OvmfPkg/Include/Register/QemuSmramSaveStateMap.h
deleted file mode 100644
index 8ffde0548c4c..000000000000
--- a/OvmfPkg/Include/Register/QemuSmramSaveStateMap.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/** @file
-SMRAM Save State Map Definitions.
-
-SMRAM Save State Map definitions based on contents of the
-Intel(R) 64 and IA-32 Architectures Software Developer's Manual
- Volume 3C, Section 34.4 SMRAM
- Volume 3C, Section 34.5 SMI Handler Execution Environment
- Volume 3C, Section 34.7 Managing Synchronous and Asynchronous SMIs
-
-and the AMD64 Architecture Programmer's Manual
- Volume 2, Section 10.2 SMM Resources
-
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-Copyright (c) 2015, Red Hat, Inc.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __QEMU_SMRAM_SAVE_STATE_MAP_H__
-#define __QEMU_SMRAM_SAVE_STATE_MAP_H__
-
-#pragma pack (1)
-
-///
-/// 32-bit SMRAM Save State Map
-///
-typedef struct {
- UINT8 Reserved0[0x200]; // 7c00h
- UINT8 Reserved1[0xf8]; // 7e00h
- UINT32 SMBASE; // 7ef8h
- UINT32 SMMRevId; // 7efch
- UINT16 IORestart; // 7f00h
- UINT16 AutoHALTRestart; // 7f02h
- UINT8 Reserved2[0x9C]; // 7f08h
- UINT32 IOMemAddr; // 7fa0h
- UINT32 IOMisc; // 7fa4h
- UINT32 _ES; // 7fa8h
- UINT32 _CS; // 7fach
- UINT32 _SS; // 7fb0h
- UINT32 _DS; // 7fb4h
- UINT32 _FS; // 7fb8h
- UINT32 _GS; // 7fbch
- UINT32 Reserved3; // 7fc0h
- UINT32 _TR; // 7fc4h
- UINT32 _DR7; // 7fc8h
- UINT32 _DR6; // 7fcch
- UINT32 _EAX; // 7fd0h
- UINT32 _ECX; // 7fd4h
- UINT32 _EDX; // 7fd8h
- UINT32 _EBX; // 7fdch
- UINT32 _ESP; // 7fe0h
- UINT32 _EBP; // 7fe4h
- UINT32 _ESI; // 7fe8h
- UINT32 _EDI; // 7fech
- UINT32 _EIP; // 7ff0h
- UINT32 _EFLAGS; // 7ff4h
- UINT32 _CR3; // 7ff8h
- UINT32 _CR0; // 7ffch
-} QEMU_SMRAM_SAVE_STATE_MAP32;
-
-///
-/// 64-bit SMRAM Save State Map
-///
-typedef struct {
- UINT8 Reserved0[0x200]; // 7c00h
-
- UINT16 _ES; // 7e00h
- UINT16 _ESAccessRights; // 7e02h
- UINT32 _ESLimit; // 7e04h
- UINT64 _ESBase; // 7e08h
-
- UINT16 _CS; // 7e10h
- UINT16 _CSAccessRights; // 7e12h
- UINT32 _CSLimit; // 7e14h
- UINT64 _CSBase; // 7e18h
-
- UINT16 _SS; // 7e20h
- UINT16 _SSAccessRights; // 7e22h
- UINT32 _SSLimit; // 7e24h
- UINT64 _SSBase; // 7e28h
-
- UINT16 _DS; // 7e30h
- UINT16 _DSAccessRights; // 7e32h
- UINT32 _DSLimit; // 7e34h
- UINT64 _DSBase; // 7e38h
-
- UINT16 _FS; // 7e40h
- UINT16 _FSAccessRights; // 7e42h
- UINT32 _FSLimit; // 7e44h
- UINT64 _FSBase; // 7e48h
-
- UINT16 _GS; // 7e50h
- UINT16 _GSAccessRights; // 7e52h
- UINT32 _GSLimit; // 7e54h
- UINT64 _GSBase; // 7e58h
-
- UINT32 _GDTRReserved1; // 7e60h
- UINT16 _GDTRLimit; // 7e64h
- UINT16 _GDTRReserved2; // 7e66h
- UINT64 _GDTRBase; // 7e68h
-
- UINT16 _LDTR; // 7e70h
- UINT16 _LDTRAccessRights; // 7e72h
- UINT32 _LDTRLimit; // 7e74h
- UINT64 _LDTRBase; // 7e78h
-
- UINT32 _IDTRReserved1; // 7e80h
- UINT16 _IDTRLimit; // 7e84h
- UINT16 _IDTRReserved2; // 7e86h
- UINT64 _IDTRBase; // 7e88h
-
- UINT16 _TR; // 7e90h
- UINT16 _TRAccessRights; // 7e92h
- UINT32 _TRLimit; // 7e94h
- UINT64 _TRBase; // 7e98h
-
- UINT64 IO_RIP; // 7ea0h
- UINT64 IO_RCX; // 7ea8h
- UINT64 IO_RSI; // 7eb0h
- UINT64 IO_RDI; // 7eb8h
- UINT32 IO_DWord; // 7ec0h
- UINT8 Reserved1[0x04]; // 7ec4h
- UINT8 IORestart; // 7ec8h
- UINT8 AutoHALTRestart; // 7ec9h
- UINT8 Reserved2[0x06]; // 7ecah
-
- UINT64 IA32_EFER; // 7ed0h
- UINT64 SVM_Guest; // 7ed8h
- UINT64 SVM_GuestVMCB; // 7ee0h
- UINT64 SVM_GuestVIntr; // 7ee8h
- UINT8 Reserved3[0x0c]; // 7ef0h
-
- UINT32 SMMRevId; // 7efch
- UINT32 SMBASE; // 7f00h
-
- UINT8 Reserved4[0x1c]; // 7f04h
- UINT64 SVM_GuestPAT; // 7f20h
- UINT64 SVM_HostIA32_EFER; // 7f28h
- UINT64 SVM_HostCR4; // 7f30h
- UINT64 SVM_HostCR3; // 7f38h
- UINT64 SVM_HostCR0; // 7f40h
-
- UINT64 _CR4; // 7f48h
- UINT64 _CR3; // 7f50h
- UINT64 _CR0; // 7f58h
- UINT64 _DR7; // 7f60h
- UINT64 _DR6; // 7f68h
- UINT64 _RFLAGS; // 7f70h
- UINT64 _RIP; // 7f78h
- UINT64 _R15; // 7f80h
- UINT64 _R14; // 7f88h
- UINT64 _R13; // 7f90h
- UINT64 _R12; // 7f98h
- UINT64 _R11; // 7fa0h
- UINT64 _R10; // 7fa8h
- UINT64 _R9; // 7fb0h
- UINT64 _R8; // 7fb8h
- UINT64 _RDI; // 7fc0h
- UINT64 _RSI; // 7fc8h
- UINT64 _RBP; // 7fd0h
- UINT64 _RSP; // 7fd8h
- UINT64 _RBX; // 7fe0h
- UINT64 _RDX; // 7fe8h
- UINT64 _RCX; // 7ff0h
- UINT64 _RAX; // 7ff8h
-} QEMU_SMRAM_SAVE_STATE_MAP64;
-
-///
-/// Union of 32-bit and 64-bit SMRAM Save State Maps
-///
-typedef union {
- QEMU_SMRAM_SAVE_STATE_MAP32 x86;
- QEMU_SMRAM_SAVE_STATE_MAP64 x64;
-} QEMU_SMRAM_SAVE_STATE_MAP;
-
-#pragma pack ()
-
-#endif
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c
index 78ea16ae06ff..43a2a3e3b7e3 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiDxeMemEncryptSevLibInternal.c
@@ -12,7 +12,7 @@
#include <Library/DebugLib.h>
#include <Library/MemEncryptSevLib.h>
#include <Library/PcdLib.h>
-#include <Register/QemuSmramSaveStateMap.h>
+#include <Register/Amd/SmramSaveStateMap.h>
#include <Register/SmramSaveStateMap.h>
#include <Uefi/UefiBaseType.h>
@@ -49,7 +49,7 @@ MemEncryptSevLocateInitialSmramSaveStateMapPages (
}
MapStart = SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET;
- MapEnd = MapStart + sizeof (QEMU_SMRAM_SAVE_STATE_MAP);
+ MapEnd = MapStart + sizeof (AMD_SMRAM_SAVE_STATE_MAP);
MapPagesStart = MapStart & ~(UINTN)EFI_PAGE_MASK;
MapPagesEnd = ALIGN_VALUE (MapEnd, EFI_PAGE_SIZE);
MapPagesSize = MapPagesEnd - MapPagesStart;
diff --git a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
index 4c354bafe42f..63822b126e3d 100644
--- a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
+++ b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
@@ -20,8 +20,7 @@
#include <Library/HobLib.h>
#include <Pcd/CpuHotEjectData.h>
#include <PiSmm.h>
-#include <Register/Intel/SmramSaveStateMap.h>
-#include <Register/QemuSmramSaveStateMap.h>
+#include <Register/Amd/SmramSaveStateMap.h>
#include <Guid/SmmBaseHob.h>
//
@@ -90,15 +89,15 @@ SmmCpuFeaturesInitializeProcessor (
IN CPU_HOT_PLUG_DATA *CpuHotPlugData
)
{
- QEMU_SMRAM_SAVE_STATE_MAP *CpuState;
+ AMD_SMRAM_SAVE_STATE_MAP *CpuState;
//
// Configure SMBASE.
//
- CpuState = (QEMU_SMRAM_SAVE_STATE_MAP *)(UINTN)(
- SMM_DEFAULT_SMBASE +
- SMRAM_SAVE_STATE_MAP_OFFSET
- );
+ CpuState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(
+ SMM_DEFAULT_SMBASE +
+ SMRAM_SAVE_STATE_MAP_OFFSET
+ );
if ((CpuState->x86.SMMRevId & 0xFFFF) == 0) {
CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
} else {
@@ -150,10 +149,10 @@ SmmCpuFeaturesHookReturnFromSmm (
IN UINT64 NewInstructionPointer
)
{
- UINT64 OriginalInstructionPointer;
- QEMU_SMRAM_SAVE_STATE_MAP *CpuSaveState;
+ UINT64 OriginalInstructionPointer;
+ AMD_SMRAM_SAVE_STATE_MAP *CpuSaveState;
- CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)CpuState;
+ CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
OriginalInstructionPointer = (UINT64)CpuSaveState->x86._EIP;
CpuSaveState->x86._EIP = (UINT32)NewInstructionPointer;
@@ -166,7 +165,7 @@ SmmCpuFeaturesHookReturnFromSmm (
}
} else {
OriginalInstructionPointer = CpuSaveState->x64._RIP;
- if ((CpuSaveState->x64.IA32_EFER & LMA) == 0) {
+ if ((CpuSaveState->x64.EFER & LMA) == 0) {
CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer32;
} else {
CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer;
--
2.40.0
next prev parent reply other threads:[~2023-04-26 11:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-26 7:22 [PATCH v9 0/9] Adds AmdSmmCpuFeaturesLib and MmSaveStateLib Abdul Lateef Attar
2023-04-26 7:22 ` [PATCH v9 1/9] MdePkg: Adds AMD SMRAM save state map Abdul Lateef Attar
2023-04-26 7:22 ` [PATCH v9 2/9] UefiCpuPkg: Adds MmSaveStateLib library class Abdul Lateef Attar
2023-04-26 7:22 ` [PATCH v9 3/9] UefiCpuPkg: Implements MmSaveStateLib library instance Abdul Lateef Attar
2023-04-26 7:22 ` [PATCH v9 4/9] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Abdul Lateef Attar
2023-04-26 7:22 ` [PATCH v9 5/9] UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family Abdul Lateef Attar
2023-04-29 7:33 ` Chang, Abner
2023-04-26 7:22 ` [PATCH v9 6/9] UefiCpuPkg: Implements MmSaveStateLib for Intel Abdul Lateef Attar
2023-04-26 7:22 ` [PATCH v9 7/9] UefiCpuPkg: Implements MmSaveStateLib for Ovmf Abdul Lateef Attar
2023-04-26 11:01 ` Gerd Hoffmann [this message]
2023-04-26 7:22 ` [PATCH v9 8/9] UefiCpuPkg: Removes SmmCpuFeaturesReadSaveStateRegister Abdul Lateef Attar
2023-04-29 7:37 ` [edk2-devel] " Chang, Abner
2023-04-26 7:22 ` [PATCH v9 9/9] OvmfPkg: Uses MmSaveStateLib library Abdul Lateef Attar
2023-04-29 7:39 ` [edk2-devel] [PATCH v9 0/9] Adds AmdSmmCpuFeaturesLib and MmSaveStateLib Chang, Abner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=vfdpb633rdvre4pnuibohogvzayfszxwihxe6bgzsemxsuzr2v@3khs3nuru54a \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox